--- /dev/null
+#
+#-*- coding: utf-8 -*-
+#
+# \file
+# <!--
+# This file is part of BeRTOS.
+#
+# Bertos is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+# As a special exception, you may use this file as part of a free software
+# library without restriction. Specifically, if other files instantiate
+# templates or use macros or inline functions from this file, or you compile
+# this file and link it with other files to produce an executable, this
+# file does not by itself cause the resulting executable to be covered by
+# the GNU General Public License. This exception does not however
+# invalidate any other reasons why the executable file might be covered by
+# the GNU General Public License.
+#
+# Copyright 2011 Develer S.r.l. (http://www.develer.com/)
+#
+# -->
+#
+# General CPU info definitions for Cortex-M3-based Atmel SAM3X8 cpu.
+#
+# This file contain all info for the BeRTOS wizard.
+#
+# \author Stefano Fedrigo <aleph@develer.com>
+#
+#
+
+# Import the common settings for the path.
+include("cm3.common")
+
+# CPU type used for flashing/debugging
+MK_PROGRAMMER_CPU = "sam3"
+MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-sam3.sh"
+
+# CPU default clock frequency
+CPU_DEFAULT_FREQ = "84000000UL"
+
+# Special CPU related tags.
+CPU_TAGS += ["sam3"]
+
+# Additional hw drivers.
+MK_CPU_CSRC += DRV_DIR + "clock_sam3.c "
+
+# Short description of the cpu.
+CPU_DESC += [ "512 Kbytes on-chip flash memory",
+ "64 Kbytes on-chip SRAM memory" ]
+
+# GCC flags for this cpu.
+MK_CPU_CPPFLAGS += " -D__ARM_SAM3X8__"
+MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "sam3x8_rom.ld"
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2011 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \author Stefano Fedrigo <aleph@develer.com>
+ *
+ * \brief Linker script for Atmel SAM3N4 Cortex M3 processor.
+ *
+ */
+
+/*
+ * Memory configuration for SAM3X8.
+ */
+MEMORY
+{
+ rom(rx) : org = 0x0, len = 512k
+ ram(rwx) : org = 0x20000000, len = 64k
+}
+
+INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld"
+
#define CPU_CM3_SAM3U 0
#define CPU_CM3_SAM3N2 0
#define CPU_CM3_SAM3N1 0
+ #define CPU_CM3_SAM3X 0
#else
#define CPU_CM3_SAM3N4 0
#endif
#define CPU_CM3_SAM3N 0
#define CPU_CM3_SAM3U 0
+ #define CPU_CM3_SAM3X 0
#else
#define CPU_CM3_SAM3S4 0
#endif
#define CPU_CM3_SAM3N 0
#define CPU_CM3_SAM3S 0
+ #define CPU_CM3_SAM3X 0
#else
#define CPU_CM3_SAM3U4 0
#endif
+ #if defined (__ARM_SAM3X8__)
+ #define CPU_CM3_SAM3 1
+ #define CPU_CM3_SAM3X 1
+ #define CPU_CM3_SAM3X8 1
+ #define CPU_NAME "SAM3X8"
+
+ #define CPU_CM3_SAM3N 0
+ #define CPU_CM3_SAM3S 0
+ #define CPU_CM3_SAM3U 0
+ #else
+ #define CPU_CM3_SAM3X8 0
+ #endif
+
#if defined (CPU_CM3_LM3S)
#if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
#error Luminary Cortex-M3 CPU configuration error
#define CPU_CM3_LM3S 0
#define CPU_CM3_SAM3 0
#elif defined (CPU_CM3_SAM3)
- #if CPU_CM3_SAM3N + 0 != 1
+ #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1
#error SAM3 Cortex-M3 CPU configuration error
#endif
- #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + 0 != 1
+ #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1
#error SAM3 Cortex-M3 CPU configuration error
#endif
#define CPU_CM3_LM3S 0
#define CPU_CM3_SAM3 0
#define CPU_CM3_SAM3N 0
#define CPU_CM3_SAM3N4 0
+ #define CPU_CM3_SAM3X 0
+ #define CPU_CM3_SAM3X8 0
#endif
#if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \