/**
* Clock Frequency for ADC conversion.
+ * This frequency will be rounded down to an integer
+ * submultiple of CPU_FREQ.
*
* $WIZ$ type = "int"
* $WIZ$ supports = "at91"
+ * $WIZ$ max = 5000000
*/
#define CONFIG_ADC_CLOCK 4800000UL
* Minimum time for starting up a conversion [us].
*
* $WIZ$ type = "int"
- * $WIZ$ min = 0
+ * $WIZ$ min = 20
* $WIZ$ supports = "at91"
*/
#define CONFIG_ADC_STARTUP_TIME 20
/**
- * Minimum time for sample and hold [us].
+ * Minimum time for sample and hold [ns].
*
* $WIZ$ type = "int"
- * $WIZ$ min = 0
+ * $WIZ$ min = 600
* $WIZ$ supports = "at91"
*/
#define CONFIG_ADC_SHTIME 834
*/
#define CONFIG_KDEBUG_BAUDRATE 115200UL
+/**
+ * Clock source for the UART module. You need to write the code to reprogram the respective clock at the required frequency in your project before calling kdbg_init().
+ *
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "kdbg_clk_src"
+ * $WIZ$ supports = "msp430"
+ */
+#define CONFIG_KDEBUG_CLOCK_SOURCE KDBG_UART_SMCLK
+
+/**
+ * Clock frequency. (Only if different from MCLK's frequency, otherwise leave it zero)
+ * $WIZ$ type = "int"; min = 0
+ * $WIZ$ supports = "msp430"
+ */
+#define CONFIG_KDEBUG_CLOCK_FREQ 0UL
+
#endif /* CFG_DEBUG_H */
#ifndef CFG_FAT_H
#define CFG_FAT_H
+/**
+ * Module logging level.
+ *
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "log_level"
+ */
+#define FAT_LOG_LEVEL LOG_LVL_ERR
+
+/**
+ * Module logging format.
+ *
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "log_format"
+ */
+#define FAT_LOG_FORMAT LOG_FMT_VERBOSE
+
+
/**
* Use word alignment to access FAT structure.
* $WIZ$ type = "boolean"
*/
#define CONFIG_LCD_ADDRESS_FAST 1
+/**
+ * Number of columns in LCD display.
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "lcd_hd44_cols"
+ */
+#define CONFIG_LCD_COLS LCD_HD44_COLS_16
+
+/**
+ * Number of rows in LCD display.
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "lcd_hd44_rows"
+ */
+#define CONFIG_LCD_ROWS LCD_HD44_ROWS_2
+
#endif /* CFG_LCD_H */
*
* \brief Configuration file for xmodem module.
*
- *
* \author Daniele Basile <asterix@develer.com>
*/
INISetting ini_set;
memset(&ini_set, 0, sizeof(ini_set));
- sd_ok = sd_init(&sd, &spi_dma.fd, 1);
+ sd_ok = sd_init(&sd, &spi_dma.fd, 0);
if (sd_ok)
{
ssS'ENABLED_MODULES'
p22
(lp23
-S'ser'
+S'adc'
p24
-aS'tmp123'
+aS'fat'
p25
-aS'formatwr'
+aS'tmp123'
p26
-aS'sd'
+aS'ini_reader'
p27
-aS'adc'
+aS'debug'
p28
-aS'sprintf'
+aS'ser'
p29
aS'kfile'
p30
-aS'fat'
+aS'sprintf'
p31
aS'timer'
p32
-aS'kfilefifo'
+aS'formatwr'
p33
-aS'ini_reader'
+aS'kfilefifo'
p34
-aS'debug'
+aS'sd'
p35
asS'CPU_NAME'
p36
# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_CSRC INSTEAD!
sd_fat_WIZARD_CSRC = \
+ bertos/fs/fatfs/diskio.c \
bertos/cpu/arm/drv/timer_at91.c \
- bertos/struct/kfile_fifo.c \
- bertos/fs/fat.c \
- bertos/kern/kfile.c \
- bertos/drv/tmp123.c \
- bertos/mware/ini_reader.c \
- bertos/cpu/arm/drv/sysirq_at91.c \
- bertos/cpu/arm/drv/adc_arm.c \
+ bertos/mware/sprintf.c \
+ bertos/cpu/arm/drv/adc_at91.c \
+ bertos/io/kfile.c \
bertos/cpu/arm/drv/ser_arm.c \
- bertos/cpu/arm/drv/timer_arm.c \
bertos/cpu/arm/drv/ser_at91.c \
bertos/drv/adc.c \
- bertos/mware/sprintf.c \
bertos/drv/timer.c \
bertos/fs/fatfs/ff.c \
- bertos/mware/event.c \
- bertos/cpu/arm/drv/adc_at91.c \
- bertos/mware/formatwr.c \
bertos/drv/ser.c \
bertos/mware/hex.c \
+ bertos/drv/tmp123.c \
+ bertos/mware/ini_reader.c \
+ bertos/cpu/arm/drv/adc_arm.c \
+ bertos/struct/kfile_fifo.c \
+ bertos/mware/formatwr.c \
bertos/drv/sd.c \
+ bertos/io/kblock.c \
+ bertos/mware/event.c \
+ bertos/cpu/arm/drv/sysirq_at91.c \
+ bertos/cpu/arm/drv/timer_arm.c \
+ bertos/fs/fat.c \
#
# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_PCSRC INSTEAD!