*
* -->
*
- * \brief Micron MT29F serial NAND driver for SAM3's static memory controller.
+ * \brief NAND driver for SAM3's static memory controller.
*
* \author Stefano Fedrigo <aleph@develer.com>
*/
-#include "mt29f_sam3.h"
-#include <drv/mt29f.h>
+#include "nand_sam3.h"
+#include <drv/nand.h>
#include <cfg/log.h>
#include <cfg/macros.h>
#include <io/sam3.h>
/*
* PIO definitions.
*/
-#define MT29F_PIN_CE BV(6)
-#define MT29F_PIN_RB BV(2)
-#define MT29F_PINS_PORTA (MT29F_PIN_CE | MT29F_PIN_RB)
-#define MT29F_PERIPH_PORTA PIO_PERIPH_B
+#define NAND_PIN_CE BV(6)
+#define NAND_PIN_RB BV(2)
+#define NAND_PINS_PORTA (NAND_PIN_CE | NAND_PIN_RB)
+#define NAND_PERIPH_PORTA PIO_PERIPH_B
-#define MT29F_PIN_OE BV(19)
-#define MT29F_PIN_WE BV(20)
-#define MT29F_PIN_IO 0x0000FFFF
-#define MT29F_PINS_PORTC (MT29F_PIN_OE | MT29F_PIN_WE | MT29F_PIN_IO)
-#define MT29F_PERIPH_PORTC PIO_PERIPH_A
+#define NAND_PIN_OE BV(19)
+#define NAND_PIN_WE BV(20)
+#define NAND_PIN_IO 0x0000FFFF
+#define NAND_PINS_PORTC (NAND_PIN_OE | NAND_PIN_WE | NAND_PIN_IO)
+#define NAND_PERIPH_PORTC PIO_PERIPH_A
-#define MT29F_PIN_CLE BV(9)
-#define MT29F_PIN_ALE BV(8)
-#define MT29F_PINS_PORTD (MT29F_PIN_CLE | MT29F_PIN_ALE)
-#define MT29F_PERIPH_PORTD PIO_PERIPH_A
+#define NAND_PIN_CLE BV(9)
+#define NAND_PIN_ALE BV(8)
+#define NAND_PINS_PORTD (NAND_PIN_CLE | NAND_PIN_ALE)
+#define NAND_PERIPH_PORTD PIO_PERIPH_A
/*
* signal.
* Return true for edge detection, false in case of timeout.
*/
-bool mt29f_waitReadyBusy(UNUSED_ARG(Mt29f *, chip), time_t timeout)
+bool nand_waitReadyBusy(UNUSED_ARG(Mt29f *, chip), time_t timeout)
{
time_t start = timer_clock();
cpu_relax();
if (timer_clock() - start > timeout)
{
- LOG_INFO("mt29f: R/B timeout\n");
+ LOG_INFO("nand: R/B timeout\n");
return false;
}
}
* Wait for transfer to complete until timeout.
* If transfer completes return true, false in case of timeout.
*/
-bool mt29f_waitTransferComplete(UNUSED_ARG(Mt29f *, chip), time_t timeout)
+bool nand_waitTransferComplete(UNUSED_ARG(Mt29f *, chip), time_t timeout)
{
time_t start = timer_clock();
cpu_relax();
if (timer_clock() - start > timeout)
{
- LOG_INFO("mt29f: xfer complete timeout\n");
+ LOG_INFO("nand: xfer complete timeout\n");
return false;
}
}
/*
* Send command to NAND and wait for completion.
*/
-void mt29f_sendCommand(Mt29f *chip,
+void nand_sendCommand(Mt29f *chip,
uint32_t cmd1, uint32_t cmd2,
int num_cycles, uint32_t cycle0, uint32_t cycle1234)
{
| cmd2 << 10;
// Check for commands transferring data
- if (cmd1 == MT29F_CMD_WRITE_1 || cmd1 == MT29F_CMD_READ_1 || cmd1 == MT29F_CMD_READID)
+ if (cmd1 == NAND_CMD_WRITE_1 || cmd1 == NAND_CMD_READ_1 || cmd1 == NAND_CMD_READID)
cmd_val |= NFC_CMD_NFCEN;
// Check for commands writing data
- if (cmd1 == MT29F_CMD_WRITE_1)
+ if (cmd1 == NAND_CMD_WRITE_1)
cmd_val |= NFC_CMD_NFCWR;
// Check for two command cycles
* NOTE: this is global between different chip selects, so returns
* the status register of the last used NAND chip.
*/
-uint8_t mt29f_getChipStatus(UNUSED_ARG(Mt29f *, chip))
+uint8_t nand_getChipStatus(UNUSED_ARG(Mt29f *, chip))
{
return (uint8_t)HWREG(NFC_CMD_BASE_ADDR);
}
-void *mt29f_dataBuffer(UNUSED_ARG(Mt29f *, chip))
+void *nand_dataBuffer(UNUSED_ARG(Mt29f *, chip))
{
return (void *)NFC_SRAM_BASE_ADDR;
}
-bool mt29f_checkEcc(Mt29f *chip)
+bool nand_checkEcc(Mt29f *chip)
{
uint32_t sr1 = SMC_ECC_SR1;
if (sr1)
{
LOG_INFO("ECC error, ECC_SR1=0x%lx\n", sr1);
- chip->status |= MT29F_ERR_ECC;
+ chip->status |= NAND_ERR_ECC;
return false;
}
else
* \param ecc pointer to buffer where computed ECC is stored
* \param ecc_size max size for ecc buffer
*/
-void mt29f_computeEcc(UNUSED_ARG(Mt29f *, chip),
+void nand_computeEcc(UNUSED_ARG(Mt29f *, chip),
UNUSED_ARG(const void *, buf), UNUSED_ARG(size_t, size), uint32_t *ecc, size_t ecc_size)
{
size_t i;
}
-void mt29f_hwInit(UNUSED_ARG(Mt29f *, chip))
+void nand_hwInit(UNUSED_ARG(Mt29f *, chip))
{
// FIXME: Parameters specific for MT29F8G08AAD
pmc_periphEnable(PIOC_ID);
pmc_periphEnable(PIOD_ID);
- PIO_PERIPH_SEL(PIOA_BASE, MT29F_PINS_PORTA, MT29F_PERIPH_PORTA);
- PIOA_PDR = MT29F_PINS_PORTA;
- PIOA_PUER = MT29F_PINS_PORTA;
+ PIO_PERIPH_SEL(PIOA_BASE, NAND_PINS_PORTA, NAND_PERIPH_PORTA);
+ PIOA_PDR = NAND_PINS_PORTA;
+ PIOA_PUER = NAND_PINS_PORTA;
- PIO_PERIPH_SEL(PIOC_BASE, MT29F_PINS_PORTC, MT29F_PERIPH_PORTC);
- PIOC_PDR = MT29F_PINS_PORTC;
- PIOC_PUER = MT29F_PINS_PORTC;
+ PIO_PERIPH_SEL(PIOC_BASE, NAND_PINS_PORTC, NAND_PERIPH_PORTC);
+ PIOC_PDR = NAND_PINS_PORTC;
+ PIOC_PUER = NAND_PINS_PORTC;
- PIO_PERIPH_SEL(PIOD_BASE, MT29F_PINS_PORTD, MT29F_PERIPH_PORTD);
- PIOD_PDR = MT29F_PINS_PORTD;
- PIOD_PUER = MT29F_PINS_PORTD;
+ PIO_PERIPH_SEL(PIOD_BASE, NAND_PINS_PORTD, NAND_PERIPH_PORTD);
+ PIOD_PDR = NAND_PINS_PORTD;
+ PIOD_PUER = NAND_PINS_PORTD;
pmc_periphEnable(SMC_SDRAMC_ID);
* Copyright 2011 Develer S.r.l. (http://www.develer.com/)
* -->
*
-* \brief Micron MT29F serial NAND driver
+* \brief NAND driver
*
-* This module allows read/write access to Micron MT29F serial
-* NANDs.
+* This module allows read/write access to ONFI 1.0 compliant NANDs.
*
* \author Stefano Fedrigo <aleph@develer.com>
*/
-#include "mt29f.h"
+#include "nand.h"
#include <cfg/log.h>
#include <struct/heap.h>
uint16_t mapped_blk; // Bad block the block containing this info is remapping
};
-#define MT29F_REMAP_TAG_OFFSET (CONFIG_MT29F_SPARE_SIZE - sizeof(struct RemapInfo))
-#define MT29F_REMAP_TAG 0x3e10c8ed
+#define NAND_REMAP_TAG_OFFSET (CONFIG_NAND_SPARE_SIZE - sizeof(struct RemapInfo))
+#define NAND_REMAP_TAG 0x3e10c8ed
-#define MT29F_ECC_NWORDS (CONFIG_MT29F_DATA_SIZE / 256)
+#define NAND_ECC_NWORDS (CONFIG_NAND_DATA_SIZE / 256)
// NAND flash status codes
-#define MT29F_STATUS_READY BV(6)
-#define MT29F_STATUS_ERROR BV(0)
+#define NAND_STATUS_READY BV(6)
+#define NAND_STATUS_ERROR BV(0)
/*
*/
static void getAddrCycles(uint32_t page, uint16_t offset, uint32_t *cycle0, uint32_t *cycle1234)
{
- ASSERT(offset < MT29F_PAGE_SIZE);
+ ASSERT(offset < NAND_PAGE_SIZE);
*cycle0 = offset & 0xff;
*cycle1234 = (page << 8) | ((offset >> 8) & 0xf);
- //LOG_INFO("mt29f addr: %lx %lx\n", *cycle1234, *cycle0);
+ //LOG_INFO("nand addr: %lx %lx\n", *cycle1234, *cycle0);
}
static void chipReset(Mt29f *chip)
{
- mt29f_sendCommand(chip, MT29F_CMD_RESET, 0, 0, 0, 0);
- mt29f_waitReadyBusy(chip, CONFIG_MT29F_TMOUT);
+ nand_sendCommand(chip, NAND_CMD_RESET, 0, 0, 0, 0);
+ nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT);
}
{
uint8_t status;
- mt29f_sendCommand(chip, MT29F_CMD_STATUS, 0, 0, 0, 0);
+ nand_sendCommand(chip, NAND_CMD_STATUS, 0, 0, 0, 0);
- status = mt29f_getChipStatus(chip);
- return (status & MT29F_STATUS_READY) && !(status & MT29F_STATUS_ERROR);
+ status = nand_getChipStatus(chip);
+ return (status & NAND_STATUS_READY) && !(status & NAND_STATUS_ERROR);
}
/**
* Erase the whole block.
*/
-int mt29f_blockErase(Mt29f *chip, uint16_t block)
+int nand_blockErase(Mt29f *chip, uint16_t block)
{
uint32_t cycle0;
uint32_t cycle1234;
uint16_t remapped_block = chip->block_map[block];
if (block != remapped_block)
{
- LOG_INFO("mt29f_blockErase: remapped block: blk %d->%d\n", block, remapped_block);
+ LOG_INFO("nand_blockErase: remapped block: blk %d->%d\n", block, remapped_block);
block = remapped_block;
}
getAddrCycles(PAGE(block), 0, &cycle0, &cycle1234);
- mt29f_sendCommand(chip, MT29F_CMD_ERASE_1, MT29F_CMD_ERASE_2, 3, 0, cycle1234 >> 8);
+ nand_sendCommand(chip, NAND_CMD_ERASE_1, NAND_CMD_ERASE_2, 3, 0, cycle1234 >> 8);
- mt29f_waitReadyBusy(chip, CONFIG_MT29F_TMOUT);
+ nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT);
if (!isOperationComplete(chip))
{
- LOG_ERR("mt29f: error erasing block\n");
- chip->status |= MT29F_ERR_ERASE;
+ LOG_ERR("nand: error erasing block\n");
+ chip->status |= NAND_ERR_ERASE;
return -1;
}
/**
* Read Device ID and configuration codes.
*/
-bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5])
+bool nand_getDevId(Mt29f *chip, uint8_t dev_id[5])
{
- mt29f_sendCommand(chip, MT29F_CMD_READID, 0, 1, 0, 0);
+ nand_sendCommand(chip, NAND_CMD_READID, 0, 1, 0, 0);
- mt29f_waitReadyBusy(chip, CONFIG_MT29F_TMOUT);
- if (!mt29f_waitTransferComplete(chip, CONFIG_MT29F_TMOUT))
+ nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT);
+ if (!nand_waitTransferComplete(chip, CONFIG_NAND_TMOUT))
{
- LOG_ERR("mt29f: getDevId timeout\n");
- chip->status |= MT29F_ERR_RD_TMOUT;
+ LOG_ERR("nand: getDevId timeout\n");
+ chip->status |= NAND_ERR_RD_TMOUT;
return false;
}
- memcpy(dev_id, mt29f_dataBuffer(chip), sizeof(dev_id));
+ memcpy(dev_id, nand_dataBuffer(chip), sizeof(dev_id));
return true;
}
-static bool mt29f_readPage(Mt29f *chip, uint32_t page, uint16_t offset)
+static bool nand_readPage(Mt29f *chip, uint32_t page, uint16_t offset)
{
uint32_t cycle0;
uint32_t cycle1234;
- //LOG_INFO("mt29f_readPage: page 0x%lx off 0x%x\n", page, offset);
+ //LOG_INFO("nand_readPage: page 0x%lx off 0x%x\n", page, offset);
getAddrCycles(page, offset, &cycle0, &cycle1234);
- mt29f_sendCommand(chip, MT29F_CMD_READ_1, MT29F_CMD_READ_2, 5, cycle0, cycle1234);
+ nand_sendCommand(chip, NAND_CMD_READ_1, NAND_CMD_READ_2, 5, cycle0, cycle1234);
- mt29f_waitReadyBusy(chip, CONFIG_MT29F_TMOUT);
- if (!mt29f_waitTransferComplete(chip, CONFIG_MT29F_TMOUT))
+ nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT);
+ if (!nand_waitTransferComplete(chip, CONFIG_NAND_TMOUT))
{
- LOG_ERR("mt29f: read timeout\n");
- chip->status |= MT29F_ERR_RD_TMOUT;
+ LOG_ERR("nand: read timeout\n");
+ chip->status |= NAND_ERR_RD_TMOUT;
return false;
}
* Read page data and ECC, checking for errors.
* TODO: fix errors with ECC when possible.
*/
-static bool mt29f_read(Mt29f *chip, uint32_t page, void *buf, uint16_t offset, uint16_t size)
+static bool nand_read(Mt29f *chip, uint32_t page, void *buf, uint16_t offset, uint16_t size)
{
struct RemapInfo remap_info;
uint32_t remapped_page = PAGE(chip->block_map[BLOCK(page)]) + PAGE_IN_BLOCK(page);
- //LOG_INFO("mt29f_read: page=%ld, offset=%d, size=%d\n", page, offset, size);
+ //LOG_INFO("nand_read: page=%ld, offset=%d, size=%d\n", page, offset, size);
if (page != remapped_page)
{
- LOG_INFO("mt29f_read: remapped block: blk %d->%d, pg %ld->%ld\n",
+ LOG_INFO("nand_read: remapped block: blk %d->%d, pg %ld->%ld\n",
BLOCK(page), chip->block_map[BLOCK(page)], page, remapped_page);
page = remapped_page;
}
- if (!mt29f_readPage(chip, page, 0))
+ if (!nand_readPage(chip, page, 0))
return false;
- memcpy(buf, (char *)mt29f_dataBuffer(chip) + offset, size);
+ memcpy(buf, (char *)nand_dataBuffer(chip) + offset, size);
/*
* Check for ECC hardware status only if a valid RemapInfo structure is found.
* That guarantees the page is written by us and a valid ECC is present.
*/
- memcpy(&remap_info, (char *)buf + MT29F_REMAP_TAG_OFFSET, sizeof(remap_info));
- if (remap_info.tag == MT29F_REMAP_TAG)
- return mt29f_checkEcc(chip);
+ memcpy(&remap_info, (char *)buf + NAND_REMAP_TAG_OFFSET, sizeof(remap_info));
+ if (remap_info.tag == NAND_REMAP_TAG)
+ return nand_checkEcc(chip);
else
return true;
}
/*
* Write data in NFC SRAM buffer to a NAND page, starting at a given offset.
- * Usually offset will be 0 to write data or CONFIG_MT29F_DATA_SIZE to write the spare
+ * Usually offset will be 0 to write data or CONFIG_NAND_DATA_SIZE to write the spare
* area.
*
* According to datasheet to get ECC computed by hardware is sufficient
* spare data in one write, at this point the last ECC_PR is correct and
* ECC data can be written in the spare area with a second program operation.
*/
-static bool mt29f_writePage(Mt29f *chip, uint32_t page, uint16_t offset)
+static bool nand_writePage(Mt29f *chip, uint32_t page, uint16_t offset)
{
uint32_t cycle0;
uint32_t cycle1234;
- //LOG_INFO("mt29f_writePage: page 0x%lx off 0x%x\n", page, offset);
+ //LOG_INFO("nand_writePage: page 0x%lx off 0x%x\n", page, offset);
getAddrCycles(page, offset, &cycle0, &cycle1234);
- mt29f_sendCommand(chip, MT29F_CMD_WRITE_1, 0, 5, cycle0, cycle1234);
+ nand_sendCommand(chip, NAND_CMD_WRITE_1, 0, 5, cycle0, cycle1234);
- if (!mt29f_waitTransferComplete(chip, CONFIG_MT29F_TMOUT))
+ if (!nand_waitTransferComplete(chip, CONFIG_NAND_TMOUT))
{
- LOG_ERR("mt29f: write timeout\n");
- chip->status |= MT29F_ERR_WR_TMOUT;
+ LOG_ERR("nand: write timeout\n");
+ chip->status |= NAND_ERR_WR_TMOUT;
return false;
}
- mt29f_sendCommand(chip, MT29F_CMD_WRITE_2, 0, 0, 0, 0);
+ nand_sendCommand(chip, NAND_CMD_WRITE_2, 0, 0, 0, 0);
- mt29f_waitReadyBusy(chip, CONFIG_MT29F_TMOUT);
+ nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT);
if (!isOperationComplete(chip))
{
- LOG_ERR("mt29f: error writing page\n");
- chip->status |= MT29F_ERR_WRITE;
+ LOG_ERR("nand: error writing page\n");
+ chip->status |= NAND_ERR_WRITE;
return false;
}
* For 2048 bytes pages and 1 ECC word each 256 bytes,
* 24 bytes of ECC data are stored.
*/
-static bool mt29f_write(Mt29f *chip, uint32_t page, const void *buf, size_t size)
+static bool nand_write(Mt29f *chip, uint32_t page, const void *buf, size_t size)
{
struct RemapInfo remap_info;
- uint32_t *nand_buf = (uint32_t *)mt29f_dataBuffer(chip);
+ uint32_t *nand_buf = (uint32_t *)nand_dataBuffer(chip);
uint32_t remapped_page = PAGE(chip->block_map[BLOCK(page)]) + PAGE_IN_BLOCK(page);
- ASSERT(size <= CONFIG_MT29F_DATA_SIZE);
+ ASSERT(size <= CONFIG_NAND_DATA_SIZE);
if (page != remapped_page)
- LOG_INFO("mt29f_write: remapped block: blk %d->%d, pg %ld->%ld\n",
+ LOG_INFO("nand_write: remapped block: blk %d->%d, pg %ld->%ld\n",
BLOCK(page), chip->block_map[BLOCK(page)], page, remapped_page);
// Data
- memset(nand_buf, 0xff, MT29F_PAGE_SIZE);
+ memset(nand_buf, 0xff, NAND_PAGE_SIZE);
memcpy(nand_buf, buf, size);
- if (!mt29f_writePage(chip, remapped_page, 0))
+ if (!nand_writePage(chip, remapped_page, 0))
return false;
// ECC
- memset(nand_buf, 0xff, CONFIG_MT29F_SPARE_SIZE);
- mt29f_computeEcc(chip, buf, size, nand_buf, MT29F_ECC_NWORDS);
+ memset(nand_buf, 0xff, CONFIG_NAND_SPARE_SIZE);
+ nand_computeEcc(chip, buf, size, nand_buf, NAND_ECC_NWORDS);
// Remap info
- remap_info.tag = MT29F_REMAP_TAG;
+ remap_info.tag = NAND_REMAP_TAG;
remap_info.mapped_blk = BLOCK(page);
- memcpy((char *)nand_buf + MT29F_REMAP_TAG_OFFSET, &remap_info, sizeof(remap_info));
+ memcpy((char *)nand_buf + NAND_REMAP_TAG_OFFSET, &remap_info, sizeof(remap_info));
- return mt29f_writePage(chip, remapped_page, CONFIG_MT29F_DATA_SIZE);
+ return nand_writePage(chip, remapped_page, CONFIG_NAND_DATA_SIZE);
}
*/
static bool blockIsGood(Mt29f *chip, uint16_t blk)
{
- uint8_t *first_byte = (uint8_t *)mt29f_dataBuffer(chip);
+ uint8_t *first_byte = (uint8_t *)nand_dataBuffer(chip);
bool good;
// Check first byte in spare area of first page in block
- mt29f_readPage(chip, PAGE(blk), CONFIG_MT29F_DATA_SIZE);
+ nand_readPage(chip, PAGE(blk), CONFIG_NAND_DATA_SIZE);
good = *first_byte != 0;
if (!good)
- LOG_INFO("mt29f: bad block %d\n", blk);
+ LOG_INFO("nand: bad block %d\n", blk);
return good;
}
*/
static int getBadBlockFromRemapBlock(Mt29f *chip, uint16_t dest_blk)
{
- struct RemapInfo *remap_info = (struct RemapInfo *)mt29f_dataBuffer(chip);
+ struct RemapInfo *remap_info = (struct RemapInfo *)nand_dataBuffer(chip);
- if (!mt29f_readPage(chip, PAGE(dest_blk), CONFIG_MT29F_DATA_SIZE + MT29F_REMAP_TAG_OFFSET))
+ if (!nand_readPage(chip, PAGE(dest_blk), CONFIG_NAND_DATA_SIZE + NAND_REMAP_TAG_OFFSET))
return -1;
- if (remap_info->tag == MT29F_REMAP_TAG)
+ if (remap_info->tag == NAND_REMAP_TAG)
return remap_info->mapped_blk;
else
return -1;
*/
static bool setMapping(Mt29f *chip, uint32_t src_blk, uint32_t dest_blk)
{
- struct RemapInfo *remap_info = (struct RemapInfo *)mt29f_dataBuffer(chip);
+ struct RemapInfo *remap_info = (struct RemapInfo *)nand_dataBuffer(chip);
- LOG_INFO("mt29f, setMapping(): src=%ld dst=%ld\n", src_blk, dest_blk);
+ LOG_INFO("nand, setMapping(): src=%ld dst=%ld\n", src_blk, dest_blk);
- if (!mt29f_readPage(chip, PAGE(dest_blk), CONFIG_MT29F_DATA_SIZE + MT29F_REMAP_TAG_OFFSET))
+ if (!nand_readPage(chip, PAGE(dest_blk), CONFIG_NAND_DATA_SIZE + NAND_REMAP_TAG_OFFSET))
return false;
- remap_info->tag = MT29F_REMAP_TAG;
+ remap_info->tag = NAND_REMAP_TAG;
remap_info->mapped_blk = src_blk;
- return mt29f_writePage(chip, PAGE(dest_blk), CONFIG_MT29F_DATA_SIZE + MT29F_REMAP_TAG_OFFSET);
+ return nand_writePage(chip, PAGE(dest_blk), CONFIG_NAND_DATA_SIZE + NAND_REMAP_TAG_OFFSET);
}
{
int blk;
- for (blk = chip->remap_start; blk < CONFIG_MT29F_NUM_BLOCK; blk++)
+ for (blk = chip->remap_start; blk < CONFIG_NAND_NUM_BLOCK; blk++)
{
if (blockIsGood(chip, blk))
{
}
}
- LOG_ERR("mt29f: reserved blocks for bad block remapping exhausted!\n");
+ LOG_ERR("nand: reserved blocks for bad block remapping exhausted!\n");
return 0;
}
*/
static bool chipIsMarked(Mt29f *chip)
{
- return getBadBlockFromRemapBlock(chip, MT29F_NUM_USER_BLOCKS) != -1;
+ return getBadBlockFromRemapBlock(chip, NAND_NUM_USER_BLOCKS) != -1;
}
int b, last;
// Default is for each block to not be remapped
- for (b = 0; b < CONFIG_MT29F_NUM_BLOCK; b++)
+ for (b = 0; b < CONFIG_NAND_NUM_BLOCK; b++)
chip->block_map[b] = b;
- chip->remap_start = MT29F_NUM_USER_BLOCKS;
+ chip->remap_start = NAND_NUM_USER_BLOCKS;
if (chipIsMarked(chip))
{
- LOG_INFO("mt29f: found initialized NAND, searching for remapped blocks\n");
+ LOG_INFO("nand: found initialized NAND, searching for remapped blocks\n");
// Scan for assigned blocks in remap area
- for (b = last = MT29F_NUM_USER_BLOCKS; b < CONFIG_MT29F_NUM_BLOCK; b++)
+ for (b = last = NAND_NUM_USER_BLOCKS; b < CONFIG_NAND_NUM_BLOCK; b++)
{
int remapped_blk = getBadBlockFromRemapBlock(chip, b);
if (remapped_blk != -1 && remapped_blk != b)
{
- LOG_INFO("mt29f: found remapped block %d->%d\n", remapped_blk, b);
+ LOG_INFO("nand: found remapped block %d->%d\n", remapped_blk, b);
chip->block_map[remapped_blk] = b;
last = b + 1;
}
{
bool remapped_anything = false;
- LOG_INFO("mt29f: found new NAND, searching for bad blocks\n");
+ LOG_INFO("nand: found new NAND, searching for bad blocks\n");
- for (b = 0; b < MT29F_NUM_USER_BLOCKS; b++)
+ for (b = 0; b < NAND_NUM_USER_BLOCKS; b++)
{
if (!blockIsGood(chip, b))
{
chip->block_map[b] = getFreeRemapBlock(chip);
setMapping(chip, b, chip->block_map[b]);
remapped_anything = true;
- LOG_INFO("mt29f: found new bad block %d, remapped to %d\n", b, chip->block_map[b]);
+ LOG_INFO("nand: found new bad block %d, remapped to %d\n", b, chip->block_map[b]);
}
}
*/
if (!remapped_anything)
{
- setMapping(chip, MT29F_NUM_USER_BLOCKS, MT29F_NUM_USER_BLOCKS);
- LOG_INFO("mt29f: no bad block founds, marked NAND\n");
+ setMapping(chip, NAND_NUM_USER_BLOCKS, NAND_NUM_USER_BLOCKS);
+ LOG_INFO("nand: no bad block founds, marked NAND\n");
}
}
}
* \note DON'T USE on production chips: this function will try to erase
* factory marked bad blocks too.
*/
-void mt29f_format(Mt29f *chip)
+void nand_format(Mt29f *chip)
{
int b;
- for (b = 0; b < CONFIG_MT29F_NUM_BLOCK; b++)
+ for (b = 0; b < CONFIG_NAND_NUM_BLOCK; b++)
{
- LOG_INFO("mt29f: erasing block %d\n", b);
+ LOG_INFO("nand: erasing block %d\n", b);
chip->block_map[b] = b;
- mt29f_blockErase(chip, b);
+ nand_blockErase(chip, b);
}
- chip->remap_start = MT29F_NUM_USER_BLOCKS;
+ chip->remap_start = NAND_NUM_USER_BLOCKS;
}
#ifdef _DEBUG
/*
* Create some bad blocks, erasing them and writing the bad block mark.
*/
-void mt29f_ruinSomeBlocks(Mt29f *chip)
+void nand_ruinSomeBlocks(Mt29f *chip)
{
int bads[] = { 7, 99, 555, 1003, 1004, 1432 };
unsigned i;
- LOG_INFO("mt29f: erasing mark\n");
- mt29f_blockErase(chip, MT29F_NUM_USER_BLOCKS);
+ LOG_INFO("nand: erasing mark\n");
+ nand_blockErase(chip, NAND_NUM_USER_BLOCKS);
for (i = 0; i < countof(bads); i++)
{
- LOG_INFO("mt29f: erasing block %d\n", bads[i]);
- mt29f_blockErase(chip, bads[i]);
+ LOG_INFO("nand: erasing block %d\n", bads[i]);
+ nand_blockErase(chip, bads[i]);
- LOG_INFO("mt29f: marking page %d as bad\n", PAGE(bads[i]));
- memset(mt29f_dataBuffer(chip), 0, CONFIG_MT29F_SPARE_SIZE);
- mt29f_writePage(chip, PAGE(bads[i]), CONFIG_MT29F_DATA_SIZE);
+ LOG_INFO("nand: marking page %d as bad\n", PAGE(bads[i]));
+ memset(nand_dataBuffer(chip), 0, CONFIG_NAND_SPARE_SIZE);
+ nand_writePage(chip, PAGE(bads[i]), CONFIG_NAND_DATA_SIZE);
}
}
memset(chip, 0, sizeof(Mt29f));
DB(chip->fd.priv.type = KBT_NAND);
- chip->fd.blk_size = MT29F_BLOCK_SIZE;
- chip->fd.blk_cnt = MT29F_NUM_USER_BLOCKS;
+ chip->fd.blk_size = NAND_BLOCK_SIZE;
+ chip->fd.blk_cnt = NAND_NUM_USER_BLOCKS;
chip->chip_select = chip_select;
- chip->block_map = heap_allocmem(heap, CONFIG_MT29F_NUM_BLOCK * sizeof(*chip->block_map));
+ chip->block_map = heap_allocmem(heap, CONFIG_NAND_NUM_BLOCK * sizeof(*chip->block_map));
if (!chip->block_map)
{
- LOG_ERR("mt29f: error allocating block map\n");
+ LOG_ERR("nand: error allocating block map\n");
return false;
}
- mt29f_hwInit(chip);
+ nand_hwInit(chip);
chipReset(chip);
initBlockMap(chip);
/**************** Kblock interface ****************/
-static size_t mt29f_writeDirect(struct KBlock *kblk, block_idx_t idx, const void *buf, size_t offset, size_t size)
+static size_t nand_writeDirect(struct KBlock *kblk, block_idx_t idx, const void *buf, size_t offset, size_t size)
{
- ASSERT(offset <= MT29F_BLOCK_SIZE);
- ASSERT(offset % CONFIG_MT29F_DATA_SIZE == 0);
- ASSERT(size <= MT29F_BLOCK_SIZE);
- ASSERT(size % CONFIG_MT29F_DATA_SIZE == 0);
+ ASSERT(offset <= NAND_BLOCK_SIZE);
+ ASSERT(offset % CONFIG_NAND_DATA_SIZE == 0);
+ ASSERT(size <= NAND_BLOCK_SIZE);
+ ASSERT(size % CONFIG_NAND_DATA_SIZE == 0);
- //LOG_INFO("mt29f_writeDirect: idx=%ld offset=%d size=%d\n", idx, offset, size);
+ //LOG_INFO("nand_writeDirect: idx=%ld offset=%d size=%d\n", idx, offset, size);
- mt29f_blockErase(MT29F_CAST(kblk), idx);
+ nand_blockErase(NAND_CAST(kblk), idx);
while (offset < size)
{
- uint32_t page = PAGE(idx) + (offset / CONFIG_MT29F_DATA_SIZE);
+ uint32_t page = PAGE(idx) + (offset / CONFIG_NAND_DATA_SIZE);
- if (!mt29f_write(MT29F_CAST(kblk), page, buf, CONFIG_MT29F_DATA_SIZE))
+ if (!nand_write(NAND_CAST(kblk), page, buf, CONFIG_NAND_DATA_SIZE))
break;
- offset += CONFIG_MT29F_DATA_SIZE;
- buf = (const char *)buf + CONFIG_MT29F_DATA_SIZE;
+ offset += CONFIG_NAND_DATA_SIZE;
+ buf = (const char *)buf + CONFIG_NAND_DATA_SIZE;
}
return offset;
}
-static size_t mt29f_readDirect(struct KBlock *kblk, block_idx_t idx, void *buf, size_t offset, size_t size)
+static size_t nand_readDirect(struct KBlock *kblk, block_idx_t idx, void *buf, size_t offset, size_t size)
{
uint32_t page;
size_t read_size;
size_t read_offset;
size_t nread = 0;
- ASSERT(offset < MT29F_BLOCK_SIZE);
- ASSERT(size <= MT29F_BLOCK_SIZE);
+ ASSERT(offset < NAND_BLOCK_SIZE);
+ ASSERT(size <= NAND_BLOCK_SIZE);
- //LOG_INFO("mt29f_readDirect: idx=%ld offset=%d size=%d\n", idx, offset, size);
+ //LOG_INFO("nand_readDirect: idx=%ld offset=%d size=%d\n", idx, offset, size);
while (nread < size)
{
- page = PAGE(idx) + (offset / CONFIG_MT29F_DATA_SIZE);
- read_offset = offset % CONFIG_MT29F_DATA_SIZE;
- read_size = MIN(size, CONFIG_MT29F_DATA_SIZE - read_offset);
+ page = PAGE(idx) + (offset / CONFIG_NAND_DATA_SIZE);
+ read_offset = offset % CONFIG_NAND_DATA_SIZE;
+ read_size = MIN(size, CONFIG_NAND_DATA_SIZE - read_offset);
- if (!mt29f_read(MT29F_CAST(kblk), page, (char *)buf + nread, read_offset, read_size))
+ if (!nand_read(NAND_CAST(kblk), page, (char *)buf + nread, read_offset, read_size))
break;
offset += read_size;
}
-static int mt29f_error(struct KBlock *kblk)
+static int nand_error(struct KBlock *kblk)
{
- Mt29f *chip = MT29F_CAST(kblk);
+ Mt29f *chip = NAND_CAST(kblk);
return chip->status;
}
-static void mt29f_clearError(struct KBlock *kblk)
+static void nand_clearError(struct KBlock *kblk)
{
- Mt29f *chip = MT29F_CAST(kblk);
+ Mt29f *chip = NAND_CAST(kblk);
chip->status = 0;
}
-static const KBlockVTable mt29f_buffered_vt =
+static const KBlockVTable nand_buffered_vt =
{
- .readDirect = mt29f_readDirect,
- .writeDirect = mt29f_writeDirect,
+ .readDirect = nand_readDirect,
+ .writeDirect = nand_writeDirect,
.readBuf = kblock_swReadBuf,
.writeBuf = kblock_swWriteBuf,
.load = kblock_swLoad,
.store = kblock_swStore,
- .error = mt29f_error,
- .clearerr = mt29f_clearError,
+ .error = nand_error,
+ .clearerr = nand_clearError,
};
-static const KBlockVTable mt29f_unbuffered_vt =
+static const KBlockVTable nand_unbuffered_vt =
{
- .readDirect = mt29f_readDirect,
- .writeDirect = mt29f_writeDirect,
+ .readDirect = nand_readDirect,
+ .writeDirect = nand_writeDirect,
- .error = mt29f_error,
- .clearerr = mt29f_clearError,
+ .error = nand_error,
+ .clearerr = nand_clearError,
};
/**
* Initialize NAND kblock driver in buffered mode.
*/
-bool mt29f_init(Mt29f *chip, struct Heap *heap, unsigned chip_select)
+bool nand_init(Mt29f *chip, struct Heap *heap, unsigned chip_select)
{
if (!commonInit(chip, heap, chip_select))
return false;
- chip->fd.priv.vt = &mt29f_buffered_vt;
+ chip->fd.priv.vt = &nand_buffered_vt;
chip->fd.priv.flags |= KB_BUFFERED;
- chip->fd.priv.buf = heap_allocmem(heap, MT29F_BLOCK_SIZE);
+ chip->fd.priv.buf = heap_allocmem(heap, NAND_BLOCK_SIZE);
if (!chip->fd.priv.buf)
{
- LOG_ERR("mt29f: error allocating block buffer\n");
+ LOG_ERR("nand: error allocating block buffer\n");
return false;
}
// Load the first block in the cache
- return mt29f_readDirect(&chip->fd, 0, chip->fd.priv.buf, 0, chip->fd.blk_size);
+ return nand_readDirect(&chip->fd, 0, chip->fd.priv.buf, 0, chip->fd.blk_size);
}
/**
* Initialize NAND kblock driver in unbuffered mode.
*/
-bool mt29f_initUnbuffered(Mt29f *chip, struct Heap *heap, unsigned chip_select)
+bool nand_initUnbuffered(Mt29f *chip, struct Heap *heap, unsigned chip_select)
{
if (!commonInit(chip, heap, chip_select))
return false;
- chip->fd.priv.vt = &mt29f_unbuffered_vt;
+ chip->fd.priv.vt = &nand_unbuffered_vt;
return true;
}
* Copyright 2011 Develer S.r.l. (http://www.develer.com/)
* -->
*
-* \brief Micron MT29F serial NAND driver
+* \brief NAND driver
*
* \author Stefano Fedrigo <aleph@develer.com>
*
-* $WIZ$ module_name = "mt29f"
+* $WIZ$ module_name = "nand"
* $WIZ$ module_depends = "timer", "kblock", "heap"
-* $WIZ$ module_configuration = "bertos/cfg/cfg_mt29f.h"
+* $WIZ$ module_configuration = "bertos/cfg/cfg_nand.h"
*/
-#ifndef DRV_MT29F_H
-#define DRV_MT29F_H
+#ifndef DRV_NAND_H
+#define DRV_NAND_H
-#include "cfg/cfg_mt29f.h"
+#include "cfg/cfg_nand.h"
#include <cfg/macros.h>
#include <io/kblock.h>
// Define log settings for cfg/log.h
-#define LOG_LEVEL CONFIG_MT29F_LOG_LEVEL
-#define LOG_FORMAT CONFIG_MT29F_LOG_FORMAT
+#define LOG_LEVEL CONFIG_NAND_LOG_LEVEL
+#define LOG_FORMAT CONFIG_NAND_LOG_FORMAT
/**
* \name Error codes.
* \{
*/
-#define MT29F_ERR_ERASE BV(1) ///< Error erasing a block
-#define MT29F_ERR_WRITE BV(2) ///< Error writing a page
-#define MT29F_ERR_RD_TMOUT BV(3) ///< Read timeout
-#define MT29F_ERR_WR_TMOUT BV(4) ///< Write timeout
-#define MT29F_ERR_ECC BV(5) ///< Unrecoverable ECC error
+#define NAND_ERR_ERASE BV(1) ///< Error erasing a block
+#define NAND_ERR_WRITE BV(2) ///< Error writing a page
+#define NAND_ERR_RD_TMOUT BV(3) ///< Read timeout
+#define NAND_ERR_WR_TMOUT BV(4) ///< Write timeout
+#define NAND_ERR_ECC BV(5) ///< Unrecoverable ECC error
/** \} */
-#define MT29F_PAGE_SIZE (CONFIG_MT29F_DATA_SIZE + CONFIG_MT29F_SPARE_SIZE)
-#define MT29F_BLOCK_SIZE (CONFIG_MT29F_DATA_SIZE * CONFIG_MT29F_PAGES_PER_BLOCK)
+#define NAND_PAGE_SIZE (CONFIG_NAND_DATA_SIZE + CONFIG_NAND_SPARE_SIZE)
+#define NAND_BLOCK_SIZE (CONFIG_NAND_DATA_SIZE * CONFIG_NAND_PAGES_PER_BLOCK)
// Number of usable blocks, and index of first remapping block
-#define MT29F_NUM_USER_BLOCKS (CONFIG_MT29F_NUM_BLOCK - CONFIG_MT29F_NUM_REMAP_BLOCKS)
+#define NAND_NUM_USER_BLOCKS (CONFIG_NAND_NUM_BLOCK - CONFIG_NAND_NUM_REMAP_BLOCKS)
// NAND commands
-#define MT29F_CMD_READ_1 0x00
-#define MT29F_CMD_READ_2 0x30
-#define MT29F_CMD_COPYBACK_READ_1 0x00
-#define MT29F_CMD_COPYBACK_READ_2 0x35
-#define MT29F_CMD_COPYBACK_PROGRAM_1 0x85
-#define MT29F_CMD_COPYBACK_PROGRAM_2 0x10
-#define MT29F_CMD_RANDOM_OUT 0x05
-#define MT29F_CMD_RANDOM_OUT_2 0xE0
-#define MT29F_CMD_RANDOM_IN 0x85
-#define MT29F_CMD_READID 0x90
-#define MT29F_CMD_WRITE_1 0x80
-#define MT29F_CMD_WRITE_2 0x10
-#define MT29F_CMD_ERASE_1 0x60
-#define MT29F_CMD_ERASE_2 0xD0
-#define MT29F_CMD_STATUS 0x70
-#define MT29F_CMD_RESET 0xFF
+#define NAND_CMD_READ_1 0x00
+#define NAND_CMD_READ_2 0x30
+#define NAND_CMD_COPYBACK_READ_1 0x00
+#define NAND_CMD_COPYBACK_READ_2 0x35
+#define NAND_CMD_COPYBACK_PROGRAM_1 0x85
+#define NAND_CMD_COPYBACK_PROGRAM_2 0x10
+#define NAND_CMD_RANDOM_OUT 0x05
+#define NAND_CMD_RANDOM_OUT_2 0xE0
+#define NAND_CMD_RANDOM_IN 0x85
+#define NAND_CMD_READID 0x90
+#define NAND_CMD_WRITE_1 0x80
+#define NAND_CMD_WRITE_2 0x10
+#define NAND_CMD_ERASE_1 0x60
+#define NAND_CMD_ERASE_2 0xD0
+#define NAND_CMD_STATUS 0x70
+#define NAND_CMD_RESET 0xFF
// Get block from page
-#define PAGE(blk) ((blk) * CONFIG_MT29F_PAGES_PER_BLOCK)
+#define PAGE(blk) ((blk) * CONFIG_NAND_PAGES_PER_BLOCK)
// Page from block and page in block
-#define BLOCK(page) ((uint16_t)((page) / CONFIG_MT29F_PAGES_PER_BLOCK))
-#define PAGE_IN_BLOCK(page) ((uint16_t)((page) % CONFIG_MT29F_PAGES_PER_BLOCK))
+#define BLOCK(page) ((uint16_t)((page) / CONFIG_NAND_PAGES_PER_BLOCK))
+#define PAGE_IN_BLOCK(page) ((uint16_t)((page) % CONFIG_NAND_PAGES_PER_BLOCK))
/**
- * MT29F context.
+ * NAND context.
*/
typedef struct Mt29f
{
/**
* Convert + ASSERT from generic KBlock to NAND context.
*/
-INLINE Mt29f *MT29F_CAST(KBlock *kb)
+INLINE Mt29f *NAND_CAST(KBlock *kb)
{
ASSERT(kb->priv.type == KBT_NAND);
return (Mt29f *)kb;
struct Heap;
// Kblock interface
-bool mt29f_init(Mt29f *chip, struct Heap *heap, unsigned chip_select);
-bool mt29f_initUnbuffered(Mt29f *chip, struct Heap *heap, unsigned chip_select);
+bool nand_init(Mt29f *chip, struct Heap *heap, unsigned chip_select);
+bool nand_initUnbuffered(Mt29f *chip, struct Heap *heap, unsigned chip_select);
// NAND specific functions
-bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5]);
-int mt29f_blockErase(Mt29f *chip, uint16_t block);
-void mt29f_format(Mt29f *chip);
+bool nand_getDevId(Mt29f *chip, uint8_t dev_id[5]);
+int nand_blockErase(Mt29f *chip, uint16_t block);
+void nand_format(Mt29f *chip);
#ifdef _DEBUG
-void mt29f_ruinSomeBlocks(Mt29f *chip);
+void nand_ruinSomeBlocks(Mt29f *chip);
#endif
// Hardware specific functions, implemented by cpu specific module
-bool mt29f_waitReadyBusy(Mt29f *chip, time_t timeout);
-bool mt29f_waitTransferComplete(Mt29f *chip, time_t timeout);
-void mt29f_sendCommand(Mt29f *chip, uint32_t cmd1, uint32_t cmd2,
+bool nand_waitReadyBusy(Mt29f *chip, time_t timeout);
+bool nand_waitTransferComplete(Mt29f *chip, time_t timeout);
+void nand_sendCommand(Mt29f *chip, uint32_t cmd1, uint32_t cmd2,
int num_cycles, uint32_t cycle0, uint32_t cycle1234);
-uint8_t mt29f_getChipStatus(Mt29f *chip);
-void *mt29f_dataBuffer(Mt29f *chip);
-bool mt29f_checkEcc(Mt29f *chip);
-void mt29f_computeEcc(Mt29f *chip, const void *buf, size_t size, uint32_t *ecc, size_t ecc_size);
-void mt29f_hwInit(Mt29f *chip);
+uint8_t nand_getChipStatus(Mt29f *chip);
+void *nand_dataBuffer(Mt29f *chip);
+bool nand_checkEcc(Mt29f *chip);
+void nand_computeEcc(Mt29f *chip, const void *buf, size_t size, uint32_t *ecc, size_t ecc_size);
+void nand_hwInit(Mt29f *chip);
-#endif /* DRV_MT29F_H */
+#endif /* DRV_NAND_H */
projects / bertos.git / commitdiff