STM32: GPIO: use uint16_t for the mask of pins that we want read/write

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4694 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/gpio_stm32.h b/bertos/cpu/cortex-m3/drv/gpio_stm32.h
index 6d1293a9c6fa25e81c75795af2e57ad62890f196..17be2f56cc048030ee90ac967e33caaac054c972 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/gpio_stm32.h
+++ b/bertos/cpu/cortex-m3/drv/gpio_stm32.h
@@ -74,7 +74,7 @@ enum
  * \param pins mask of pins that we want set or clear
  * \param val true to set selected pins of false to clear they.
  */
-INLINE void stm32_gpioPinWrite(struct stm32_gpio *base, uint32_t pins, bool val)
+INLINE void stm32_gpioPinWrite(struct stm32_gpio *base, uint16_t pins, bool val)
 {
        if (val)
                base->BSRR |= pins;
@@ -88,7 +88,7 @@ INLINE void stm32_gpioPinWrite(struct stm32_gpio *base, uint32_t pins, bool val)
  * \param base gpio register address
  * \param pins mask of pins that we want read
  */
-INLINE uint8_t stm32_gpioPinRead(struct stm32_gpio *base, uint32_t pins)
+INLINE uint16_t stm32_gpioPinRead(struct stm32_gpio *base, uint16_t pins)
 {
        return (base->IDR & pins);
 }