Add hw error detect.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3940 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/ser_stm32.c b/bertos/cpu/cortex-m3/drv/ser_stm32.c
index 6fdcf312feda3f98e354f894b38a69471e313e40..8a0ae8a31e81abc3e20f9e70dececa0dcbc84106 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/ser_stm32.c
+++ b/bertos/cpu/cortex-m3/drv/ser_stm32.c
@@ -233,6 +233,11 @@ static void uart_common_irq_handler(int port)
 
        /* Read and clear the IRQ status */
        status = base->SR;
+
+       /* Check hw errors */
+       ser_handles[port]->status = status &
+               (BV(SR_ORE) | BV(SR_FE) | BV(SR_PE) | BV(SR_NE));
+
        /* Process the IRQ */
        if (status & BV(CR1_RXNEIE))
        {

diff --git a/bertos/cpu/cortex-m3/drv/ser_stm32.h b/bertos/cpu/cortex-m3/drv/ser_stm32.h
index c0378a2238e3ebcb1cfcbd81740aed933a91c0e0..03a94fecb01e5b1f3ca16c487d7a41aac120c9f4 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/ser_stm32.h
+++ b/bertos/cpu/cortex-m3/drv/ser_stm32.h
@@ -55,17 +55,17 @@ enum
 };
 
 /* Software errors */
-#define SERRF_RXFIFOOVERRUN  BV(0) //< Rx FIFO buffer overrun
-#define SERRF_RXTIMEOUT      BV(1) //< Receive timeout
-#define SERRF_TXTIMEOUT      BV(2) //< Transmit timeout
+#define SERRF_RXFIFOOVERRUN  BV(6) //< Rx FIFO buffer overrun
+#define SERRF_RXTIMEOUT      BV(5) //< Receive timeout
+#define SERRF_TXTIMEOUT      BV(4) //< Transmit timeout
 
 /*
  * Hardware errors.
  */
-#define SERRF_RXSROVERRUN    0 //< Input overrun
-#define SERRF_FRAMEERROR     0 //< Stop bit missing
-#define SERRF_PARITYERROR    0 //< Parity error
-#define SERRF_NOISEERROR     0 //< Noise error
+#define SERRF_RXSROVERRUN    SR_ORE     //< Input overrun
+#define SERRF_FRAMEERROR     SR_FE   //< Stop bit missing
+#define SERRF_PARITYERROR    SR_PE   //< Parity error
+#define SERRF_NOISEERROR     SR_NE   //< Noise error
 
 /* Serial error/status flags */
 typedef uint32_t serstatus_t;

diff --git a/bertos/cpu/cortex-m3/io/stm32_uart.h b/bertos/cpu/cortex-m3/io/stm32_uart.h
index 13e31cde10527ad9347b449124e7afd9a1752cb0..c7e8abf05bf4e985cc128479fd75bd151e121fc8 100644 (file)
--- a/bertos/cpu/cortex-m3/io/stm32_uart.h
+++ b/bertos/cpu/cortex-m3/io/stm32_uart.h
@@ -172,6 +172,19 @@
 #define CR3_IREN_RESET            ((uint16_t)0xFFFD)  /* USART IrDA Disable MASK */
 #define CR3_CLEAR_MASK            ((uint16_t)0xFCFF)  /* USART CR3 MASK */
 
+
+/* Status */
+#define SR_CTS                                    9
+#define SR_LBD                                    8
+#define SR_TXE                                    7
+#define SR_TC                                     6
+#define SR_RXNE                                   5
+#define SR_IDLE                                   4
+#define SR_ORE                                    3
+#define SR_NE                                     2
+#define SR_FE                                     1
+#define SR_PE                                     0
+
 #define GTPR_LSB_MASK             ((uint16_t)0x00FF)  /* Guard Time Register LSB MASK */
 #define GTPR_MSB_MASK             ((uint16_t)0xFF00)  /* Guard Time Register MSB MASK */