#include <cfg/macros.h>
#include <io/sam3.h>
-#include <io/kblock.h>
#include <drv/timer.h>
#include <drv/mt29f.h>
#define MT29F_DATA_ADDR 0x60000000
-struct Mt29fHardware
-{
- uint8_t status;
-};
-
-
/*
* Translate flash page index plus a byte offset
* in the five address cycles format needed by NAND.
* Fourth BA15 BA14 BA13 BA12 BA11 BA10 BA9 BA8
* Fifth LOW LOW LOW LOW LOW LOW LOW BA16
*/
-static void mt29f_getAddrCycles(block_idx_t page, size_t offset, uint32_t *cycle0, uint32_t *cycle1234)
+static void getAddrCycles(uint32_t page, size_t offset, uint32_t *cycle0, uint32_t *cycle1234)
{
ASSERT(offset < MT29F_PAGE_SIZE);
}
-INLINE bool mt29f_isBusy(void)
+INLINE bool nfcIsBusy(void)
{
return HWREG(NFC_CMD_BASE_ADDR + NFC_CMD_NFCCMD) & 0x8000000;
}
-INLINE bool mt29f_isCmdDone(void)
+INLINE bool isCmdDone(void)
{
return SMC_SR & SMC_SR_CMDDONE;
}
-static bool mt29f_waitReadyBusy(void)
+static bool waitReadyBusy(void)
{
time_t start = timer_clock();
* Wait for transfer to complete until timeout.
* If transfer completes return true, false in case of timeout.
*/
-static bool mt29f_waitTransferComplete(void)
+static bool waitTransferComplete(void)
{
time_t start = timer_clock();
/*
* Send command to NAND and wait for completion.
*/
-static void mt29f_sendCommand(uint32_t cmd,
+static void sendCommand(uint32_t cmd,
int num_cycles, uint32_t cycle0, uint32_t cycle1234)
{
reg32_t *cmd_addr;
- while (mt29f_isBusy());
+ while (nfcIsBusy());
if (num_cycles == 5)
SMC_ADDR = cycle0;
cmd_addr = (reg32_t *)(NFC_CMD_BASE_ADDR + cmd);
*cmd_addr = cycle1234;
- while (!mt29f_isCmdDone());
+ while (!isCmdDone());
}
-static bool mt29f_isOperationComplete(void)
+static bool isOperationComplete(void)
{
uint8_t status;
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | MT29F_CSID | NFC_CMD_ACYCLE_NONE |
MT29F_CMD_STATUS << 2,
0, 0, 0);
}
-static void mt29f_reset(void)
+static void chipReset(void)
{
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | MT29F_CSID | NFC_CMD_ACYCLE_NONE |
MT29F_CMD_RESET << 2,
0, 0, 0);
- mt29f_waitReadyBusy();
+ waitReadyBusy();
}
/**
* Erase the whole block containing given page.
*/
-int mt29f_blockErase(Mt29f *fls, block_idx_t page)
+int mt29f_blockErase(Mt29f *chip, uint32_t page)
{
uint32_t cycle0;
uint32_t cycle1234;
- mt29f_getAddrCycles(page, 0, &cycle0, &cycle1234);
+ getAddrCycles(page, 0, &cycle0, &cycle1234);
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | MT29F_CSID | NFC_CMD_ACYCLE_THREE | NFC_CMD_VCMD2 |
(MT29F_CMD_ERASE_2 << 10) | (MT29F_CMD_ERASE_1 << 2),
3, 0, cycle1234 >> 8);
- mt29f_waitReadyBusy();
+ waitReadyBusy();
- if (!mt29f_isOperationComplete())
+ if (!isOperationComplete())
{
LOG_ERR("mt29f: error erasing block\n");
- fls->hw->status |= MT29F_ERR_ERASE;
+ chip->status |= MT29F_ERR_ERASE;
return -1;
}
/**
* Read Device ID and configuration codes.
*/
-bool mt29f_getDevId(Mt29f *fls, uint8_t dev_id[5])
+bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5])
{
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | NFC_CMD_NFCEN | MT29F_CSID | NFC_CMD_ACYCLE_ONE |
MT29F_CMD_READID << 2,
1, 0, 0);
- mt29f_waitReadyBusy();
- if (!mt29f_waitTransferComplete())
+ waitReadyBusy();
+ if (!waitTransferComplete())
{
LOG_ERR("mt29f: getDevId timeout\n");
- fls->hw->status |= MT29F_ERR_RD_TMOUT;
+ chip->status |= MT29F_ERR_RD_TMOUT;
return false;
}
}
-static size_t mt29f_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
+size_t mt29f_pageRead(Mt29f *chip, uint32_t page, void *buf, size_t offset, size_t size)
{
- Mt29f *fls = FLASH_CAST(blk);
uint32_t cycle0;
uint32_t cycle1234;
ASSERT(offset == 0);
- ASSERT(size == blk->blk_size);
- LOG_INFO("mt29f_readDirect\n");
+ LOG_INFO("mt29f_pageRead\n");
- mt29f_getAddrCycles(idx, 0, &cycle0, &cycle1234);
+ getAddrCycles(page, 0, &cycle0, &cycle1234);
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | NFC_CMD_NFCEN | MT29F_CSID | NFC_CMD_ACYCLE_FIVE | NFC_CMD_VCMD2 |
(MT29F_CMD_READ_2 << 10) | (MT29F_CMD_READ_1 << 2),
5, cycle0, cycle1234);
- mt29f_waitReadyBusy();
- if (!mt29f_waitTransferComplete())
+ waitReadyBusy();
+ if (!waitTransferComplete())
{
LOG_ERR("mt29f: read timeout\n");
- fls->hw->status |= MT29F_ERR_RD_TMOUT;
+ chip->status |= MT29F_ERR_RD_TMOUT;
return 0;
}
- if (!kblock_buffered(blk) && (buf != (void *)NFC_SRAM_BASE_ADDR))
- memcpy(buf, (void *)NFC_SRAM_BASE_ADDR, size);
+ memcpy(buf, (void *)NFC_SRAM_BASE_ADDR, size);
return size;
}
-static size_t mt29f_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
+size_t mt29f_pageWrite(Mt29f *chip, uint32_t page, const void *buf, size_t offset, size_t size)
{
- Mt29f *fls = FLASH_CAST(blk);
uint32_t cycle0;
uint32_t cycle1234;
ASSERT(offset == 0);
- ASSERT(size == blk->blk_size);
- LOG_INFO("mt29f_writeDirect\n");
+ LOG_INFO("mt29f_pageWrite\n");
- if (!kblock_buffered(blk) && (_buf != (void *)NFC_SRAM_BASE_ADDR))
- memcpy((void *)NFC_SRAM_BASE_ADDR, _buf, size);
+ memcpy((void *)NFC_SRAM_BASE_ADDR, buf, size);
- mt29f_getAddrCycles(idx, 0, &cycle0, &cycle1234);
+ getAddrCycles(page, 0, &cycle0, &cycle1234);
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | NFC_CMD_NFCWR | NFC_CMD_NFCEN | MT29F_CSID | NFC_CMD_ACYCLE_FIVE |
MT29F_CMD_WRITE_1 << 2,
5, cycle0, cycle1234);
- if (!mt29f_waitTransferComplete())
+ if (!waitTransferComplete())
{
LOG_ERR("mt29f: write timeout\n");
- fls->hw->status |= MT29F_ERR_WR_TMOUT;
+ chip->status |= MT29F_ERR_WR_TMOUT;
return 0;
}
- mt29f_sendCommand(
+ sendCommand(
NFC_CMD_NFCCMD | MT29F_CSID | NFC_CMD_ACYCLE_NONE |
MT29F_CMD_WRITE_2 << 2,
0, 0, 0);
- mt29f_waitReadyBusy();
+ waitReadyBusy();
- if (!mt29f_isOperationComplete())
+ if (!isOperationComplete())
{
LOG_ERR("mt29f: error writing page\n");
- fls->hw->status |= MT29F_ERR_WRITE;
+ chip->status |= MT29F_ERR_WRITE;
return 0;
}
}
-static int mt29f_error(struct KBlock *blk)
+int mt29f_error(Mt29f *chip)
{
- Mt29f *fls = FLASH_CAST(blk);
- return fls->hw->status;
+ return chip->status;
}
-static void mt29f_clearerror(struct KBlock *blk)
+void mt29f_clearError(Mt29f *chip)
{
- Mt29f *fls = FLASH_CAST(blk);
- fls->hw->status = 0;
+ chip->status = 0;
}
-static const KBlockVTable mt29f_buffered_vt =
-{
- .readDirect = mt29f_readDirect,
- .writeDirect = mt29f_writeDirect,
-
- .readBuf = kblock_swReadBuf,
- .writeBuf = kblock_swWriteBuf,
- .load = kblock_swLoad,
- .store = kblock_swStore,
-
- .close = kblock_swClose,
-
- .error = mt29f_error,
- .clearerr = mt29f_clearerror,
-};
-
-
-static const KBlockVTable mt29f_unbuffered_vt =
-{
- .readDirect = mt29f_readDirect,
- .writeDirect = mt29f_writeDirect,
-
- .close = kblock_swClose,
-
- .error = mt29f_error,
- .clearerr = mt29f_clearerror,
-};
-
-
-static struct Mt29fHardware mt29f_hw;
-
-
-static void common_init(Mt29f *fls)
+static void initPio(Mt29f *chip)
{
- memset(fls, 0, sizeof(*fls));
- DB(fls->blk.priv.type = KBT_MT29F);
-
- fls->hw = &mt29f_hw;
-
- fls->blk.blk_size = MT29F_PAGE_SIZE;
- fls->blk.blk_cnt = MT29F_SIZE / MT29F_PAGE_SIZE;
-
/*
* TODO: put following stuff in hw_ file dependent (and configurable cs?)
* Parameters for MT29F8G08AAD
PIOD_PUER = MT29F_PINS_PORTD;
pmc_periphEnable(SMC_SDRAMC_ID);
+}
+
+static void initSmc(Mt29f *chip)
+{
SMC_SETUP0 = SMC_SETUP_NWE_SETUP(0)
| SMC_SETUP_NCS_WR_SETUP(0)
| SMC_SETUP_NRD_SETUP(0)
SMC_CTRL = 0;
SMC_CTRL = SMC_CTRL_NFCEN;
- mt29f_reset();
+ // Enable ECC, 1 ECC per 256 bytes
+ SMC_ECC_CTRL = SMC_ECC_CTRL_SWRST;
+ SMC_ECC_MD = SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 | SMC_ECC_MD_TYPCORREC_C256B;
}
-void mt29f_init(Mt29f *fls)
+void mt29f_init(Mt29f *chip)
{
- common_init(fls);
- fls->blk.priv.vt = &mt29f_buffered_vt;
- fls->blk.priv.flags |= KB_BUFFERED;
- fls->blk.priv.buf = (void *)NFC_SRAM_BASE_ADDR;
-
- // Load the first block in the cache
- mt29f_readDirect(&fls->blk, 0, (void *)NFC_SRAM_BASE_ADDR, 0, MT29F_PAGE_SIZE);
-}
+ initPio(chip);
+ initSmc(chip);
+ mt29f_clearError(chip);
-void mt29f_initUnbuffered(Mt29f *fls)
-{
- common_init(fls);
- fls->blk.priv.vt = &mt29f_unbuffered_vt;
+ chipReset();
}
*
* Example usage:
* \code
-* Mt29f fls;
-* mt29f_init(&fls);
+* Mt29f chip;
+* mt29f_init(&chip);
* // enable access only on desired blocks
* // start block = 50, num blocks = 20
-* kblock_trim(&fls.blk, 50, 20);
+* kblock_trim(&chip.blk, 50, 20);
* // ...
* // now write to the flash
* // block number is automatically converted
-* kblock_write(&fls.blk, 0, buf, 0, 128);
+* kblock_write(&chip.blk, 0, buf, 0, 128);
* \endcode
*
* \author Stefano Fedrigo <aleph@develer.com>
#include "cfg/cfg_mt29f.h"
#include <cfg/macros.h>
-#include <cfg/compiler.h>
+//#include <cfg/compiler.h>
-#include <io/kblock.h>
-#include <io/kfile.h>
-#include <io/kfile_block.h>
-
-#include <cpu/attr.h>
+//#include <cpu/attr.h>
/**
- * \name Error codes
+ * \name Error codes.
* \{
*/
#define MT29F_ERR_ERASE BV(1) ///< Error erasing a block
#define MT29F_ERR_WR_TMOUT BV(2) ///< Write timeout
/** \} */
-struct Mt29fHardware;
/**
- * MT29F KBlock context structure.
+ * MT29F context.
*/
typedef struct Mt29f
{
- KBlock blk; ///< KBlock context
- struct Mt29fHardware *hw;
+ uint8_t status;
} Mt29f;
-/*
- * Kblock type ID.
- */
-#define KBT_MT29F MAKE_ID('M', 'T', '2', '9')
-
-/**
- * Convert + ASSERT from generic KBlock to Flash.
- */
-INLINE Mt29f *FLASH_CAST(KBlock *fls)
-{
- ASSERT(fls->priv.type == KBT_MT29F);
- return (Mt29f *)fls;
-}
+void mt29f_init(Mt29f *chip);
+bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5]);
+int mt29f_blockErase(Mt29f *chip, uint32_t blk);
+size_t mt29f_pageRead(Mt29f *chip, uint32_t page, void *buf, size_t offset, size_t size);
+size_t mt29f_pageWrite(Mt29f *chip, uint32_t page, const void *buf, size_t offset, size_t size);
+int mt29f_error(Mt29f *chip);
+void mt29f_clearError(Mt29f *chip);
-void mt29f_init(Mt29f *fls);
-void mt29f_initUnbuffered(Mt29f *fls);
-int mt29f_blockErase(Mt29f *fls, block_idx_t page);
-bool mt29f_getDevId(Mt29f *fls, uint8_t dev_id[5]);
#endif /* DRV_MT29F_H */
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