CM3: use a distinct stack for handler-mode and thread-mode.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3395 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/hw/crt_cm3.S b/bertos/cpu/cortex-m3/hw/crt_cm3.S
index a442bc59e0a07c12a665136c4778870140ecb5a6..c23d83741c0ee16421a682da411a33adde718386 100644 (file)
--- a/bertos/cpu/cortex-m3/hw/crt_cm3.S
+++ b/bertos/cpu/cortex-m3/hw/crt_cm3.S
@@ -35,6 +35,9 @@
  * \author Andrea Righi <arighi@develer.com>
  */
 
+#define CONTROL_UNPRIVILEGED   1
+#define CONTROL_PSP            2
+
 .syntax unified
 .thumb
 .section .init, "ax", %progbits
@@ -61,6 +64,11 @@ __dummy_init:
 __init0:
        /* Disable IRQs */
        cpsid i
+       /*
+        * Initialize process stack pointer.
+        */
+       ldr     r0, =__psp_end
+       msr     psp, r0
 
        /* Call the early hardware initialization routine */
        bl __init1
@@ -86,10 +94,18 @@ bss_loop:
        strlo r0, [r1], #4
        blo bss_loop
 
+       /* Switch to the process stack */
+       movs r0, CONTROL_PSP
+       msr control, r0
+       isb
+
        /* Call the hardware initialization routine */
        bl __init2
 
        /* Call the application's entry point */
+       cpsie i
+       mov r0, #0
+       mov r1, #0
        bl main
 end:
        wfi

diff --git a/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S
index bda6793cda4d4a1e01c8a56f4767038e85eb7ea3..e464d613ef5b382a49b535095f3e32e49d5479c6 100644 (file)
--- a/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S
+++ b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S
@@ -35,20 +35,24 @@
  * \author Andrea Righi <arighi@develer.com>
  */
 
+#include <cfg/cfg_proc.h>
+
 .syntax unified
 
+#if !CONFIG_KERN_PREEMPT
 /* void asm_switch_context(void **new_sp [r0], void **save_sp [r1]) */
 .global asm_switch_context
 .thumb_func
 asm_switch_context:
-       mrs r12, msp
+       mrs ip, psp
         /* Save registers */
-       stmdb r12!, {r4-r11, lr}
+       stmdb ip!, {r4-r11, lr}
         /* Save old stack pointer */
-       str r12, [r1]
+       str ip, [r1]
         /* Load new stack pointer */
-       ldr r12, [r0]
+       ldr ip, [r0]
         /* Load new registers */
-       ldmia r12!, {r4-r11, lr}
-       msr msp, r12
+       ldmia ip!, {r4-r11, lr}
+       msr psp, ip
        bx lr
+#endif /* CONFIG_KERN_PREEMPT */

diff --git a/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld
index b93a49f104ea25d38cdbc33935e83a0fc0acb9f2..e6c0e018bb3250dee085894ab6b69dd53fb8133a 100644 (file)
--- a/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld
+++ b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld
@@ -52,7 +52,7 @@ MEMORY
 /*
  * Define stack size here
  */
-MAIN_STACK_SIZE = 0x0400;
+STACK_SIZE = 0x1000;
 
 /*
  * Allocate section memory
@@ -103,10 +103,15 @@ SECTIONS
         * Allocated stack at the end of bss section.
         * Data heap is allocate at end of stack.
         */
-       PROVIDE (__stack_start = .);
+       PROVIDE (__msp_start = .);
        . = ALIGN(4);
-       . += MAIN_STACK_SIZE;
-       PROVIDE (__stack_end = .);
+       . += STACK_SIZE;
+       PROVIDE (__msp_end = .);
+
+       PROVIDE (__psp_start = .);
+       . = ALIGN(4);
+       . += STACK_SIZE;
+       PROVIDE (__psp_end = .);
 
        PROVIDE (__heap_start = .);
        . = ALIGN(4);