From: arighi <arighi@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Mon, 1 Nov 2010 16:26:07 +0000 (+0000)
Subject: CPU: introduce cpu_atomic_xchg()
X-Git-Tag: 2.6.0~5^2~35
X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=0505dc06d425b604fbe0977a11588755c507767b;hp=5a575c1b8547876925fb45fb2a0df43612f451f0;p=bertos.git

CPU: introduce cpu_atomic_xchg()

Add an architecture-optimized function to atomically exchange two
different cpu_atomic_t values.

More exactly, the function replaces the value of a cpu_atomic_t variable
and returns the old value, atomically.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4485 38d2e660-2303-0410-9eaa-f027e97ec537
---

diff --git a/bertos/cpu/byteorder.h b/bertos/cpu/byteorder.h
index ff1237ad..721f81e5 100644
--- a/bertos/cpu/byteorder.h
+++ b/bertos/cpu/byteorder.h
@@ -41,6 +41,7 @@
 #include <cfg/compiler.h>
 #include <cpu/attr.h>
 #include <cpu/detect.h>
+#include <cpu/types.h>
 #include <cfg/macros.h>
 
 /**
@@ -168,6 +169,37 @@ INLINE float net_to_host_float(float x)
 	return be_float_to_cpu(x);
 }
 
+#if CPU_ARM
+INLINE cpu_atomic_t
+cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val)
+{
+	cpu_atomic_t ret;
+
+	asm volatile(
+		"swp     %0, %1, [%2]"
+
+		: "=&r" (ret)
+		: "r" (val), "r" (ptr)
+		: "memory", "cc");
+
+	return ret;
+}
+#else /* CPU_ARM */
+#include <cpu/irq.h>
+
+INLINE cpu_atomic_t
+cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val)
+{
+	cpu_atomic_t ret;
+
+	ATOMIC(
+		ret = *ptr;
+		*ptr = val;
+	);
+	return ret;
+}
+#endif /* CPU_ARM */
+
 #ifdef __cplusplus
 
 /// Type generic byte swapping.