From: asterix Date: Mon, 28 Jun 2010 14:53:35 +0000 (+0000) Subject: Add first implementation of adc module for stm32 cpu. X-Git-Tag: 2.6.0~351 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=1cbb62896ac90d73f33e8339c334be09b931079c;p=bertos.git Add first implementation of adc module for stm32 cpu. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3956 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cpu/cortex-m3/drv/adc_cm3.c b/bertos/cpu/cortex-m3/drv/adc_cm3.c new file mode 100644 index 00000000..61dd0043 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_cm3.c @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Low-level ADC module for Cortex-m3 (inplementation). + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use adc_at91.c + + #include + + #if CPU_CM3_STM32 + #include "adc_stm32.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/bertos/cpu/cortex-m3/drv/adc_cm3.h b/bertos/cpu/cortex-m3/drv/adc_cm3.h new file mode 100644 index 00000000..a5f15a11 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_cm3.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Low-level ADC module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_STM32 + #include "adc_stm32.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/adc_stm32.c b/bertos/cpu/cortex-m3/drv/adc_stm32.c new file mode 100644 index 00000000..ef183865 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_stm32.c @@ -0,0 +1,141 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * This ADC module should be use both whit kernel or none. + * If you are using a kernel, the adc drive does not wait the finish of + * conversion but use a singal every time a required conversion are + * ended. This signal wake up a process that return a result of + * conversion. Otherwise, if you not use a kernl, this module wait + * whit a loop the finishing of conversion. + * + * + * \author Daniele Basile + */ + + +#include "adc_stm32.h" + +#include + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" + +#include +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include +#include +#include +#include + +#include + + +struct stm32_adc *adc = (struct stm32_adc *)ADC1_BASE; + +/** + * Select mux channel \a ch. + */ +void adc_hw_select_ch(uint8_t ch) +{ + kprintf("Select[%d]\n", ch); + adc->SQR1 |= (0x1 << SQR1_SQ_LEN_SHIFT); + adc->SQR3 = (ch & SQR3_SQ_MASK); +} + +static DECLARE_ISR(adc_redyRead) +{ + kputs("end\n"); +} +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADC_DRDY bit is done. + */ +uint16_t adc_hw_read(void) +{ + // Start convertion + adc->CR2 |= CR2_EXTTRIG_SWSTRT_SET; + + while (!(adc->SR & BV(SR_EOC))); + + //Return the last converted data + return (adc->DR); +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + /* Enable clocking on AFIO */ + RCC->APB2ENR |= RCC_APB2_AFIO; + RCC->APB2ENR |= RCC_APB2_GPIOC; + RCC->APB2ENR |= RCC_APB2_ADC1; + + /* Reset cr1 registry */ + adc->CR1 = 0; + adc->CR2 = 0; + + /* + * Configure ADC + * - Regular mode + * - scan mode + */ + adc->CR2 |= (BV(CR2_ADON) | ADC_EXTERNALTRIGCONV_NONE | BV(CR2_TSVREFE)); + /* + * Configure ADC settings + * - align rigth + * - enable adc + */ + adc->SQR1 = 0; + adc->SQR2 = 0; + adc->SQR3 = 0; + + /* Set 17.1usec sampling time on channel 16 and 17 */ + adc->SMPR1 |= ((ADC_SAMPLETIME_239CYCLES5 << ADC_CHANNEL_16) | + (ADC_SAMPLETIME_239CYCLES5 << ADC_CHANNEL_17)); + + /* Register the IRQ handler */ + sysirq_setHandler(ADC_IRQHANDLER, adc_redyRead); + //adc->CR1 |= BV(CR1_EOCIE); + +} diff --git a/bertos/cpu/cortex-m3/drv/adc_stm32.h b/bertos/cpu/cortex-m3/drv/adc_stm32.h new file mode 100644 index 00000000..f0af892b --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_stm32.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_ADC_STM32_H +#define DRV_ADC_STM32_H + +#include + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#define ADC_MUX_MAXCH 17 //Max number of channel for ADC. +#define ADC_BITS 12 //Bit resolution for ADC converter. + +/** + * Define PIO controller for enable ADC function. + * \{ + */ + +/*\}*/ + +/** + * Init the ADC pins. + * Implement it if necessary. + */ +#define ADC_INIT_PINS() \ + do { \ + } while (0) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_STM32_H */