From: qwert Date: Thu, 4 Sep 2008 16:44:45 +0000 (+0000) Subject: Add a new family of core: "Cortex-M3". This cpu have a different architecture compare... X-Git-Tag: 2.0.0~149 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=463815ea17ba2a28a3917ab4fc037b2a304c9c67;p=bertos.git Add a new family of core: "Cortex-M3". This cpu have a different architecture compared to other arm cpus. One of the most things that makes cortex core different from others arm cpu is the ISA: Only thumb2 instruction set is supported by this core. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1785 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cpu/cortex-m3/io/lm3s.h b/bertos/cpu/cortex-m3/io/lm3s.h new file mode 100644 index 00000000..46f2cb78 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Manuele Fanelli + * + * Luminary Micro Stellaris LM3S common definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef LM3S_H +#define LM3S_H + +#include + +#if CPU_ARM_LM3S1968 + #include "lm3s1968.h" + +#else + #error Missing I/O definitions for CPU. +#endif + +#endif /* LM3S_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s1968.h b/bertos/cpu/cortex-m3/io/lm3s1968.h new file mode 100644 index 00000000..d4388349 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s1968.h @@ -0,0 +1,103 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Manuele Fanelli + * + * Luminary Micro Stellaris lm3s1968 common definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef LM3S1968_H +#define LM3S1968_H + +#include + +#if CPU_ARM_LM3S1968 + #include "lm3s1968.h" + +#else + #error Missing I/O definitions for CPU. +#endif + +#include + +#if CPU_ARM_LM3S1968 + + #define FLASH_BASE 0x00000000 + #define RAM_BASE 0x20000000 + +#else + #error No base addrese register definition for selected ARM CPU + +#endif + +//TODO: add other peripherals + + + + + +#endif /* LM3S1968_H */ diff --git a/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld b/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld new file mode 100644 index 00000000..595e576b --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld @@ -0,0 +1,144 @@ +/** + * \file + * + * + * \version $Id:$ + * + * \author Manuele Fanelli + * + * \brief Linker script for Luminary LM3S1968 processor. + * + */ + + +ENTRY(_init) +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration. + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0100; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x0400; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > ram + + _etext = .; + PROVIDE (__etext = .); + + .data : AT (__etext) + { + PROVIDE (__data_start = .); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} + diff --git a/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld new file mode 100644 index 00000000..300752d4 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld @@ -0,0 +1,143 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Manuele Fanelli + * + * \brief Script for Luminary Micro LM3S1968 Cortex M3 family processors. + * + */ + + +ENTRY(_init) +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for LM3S1968 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0100; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x0400; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > rom + + _etext = .; + PROVIDE (__etext = .); + + .data : AT (_etext) + { + PROVIDE (__data_start = .); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} diff --git a/bertos/cpu/cortex-m3/scripts/lm3s_program.script b/bertos/cpu/cortex-m3/scripts/lm3s_program.script new file mode 100644 index 00000000..5898d1ce --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s_program.script @@ -0,0 +1,15 @@ +halt +sleep 200 +wait_halt +flash probe 0 +sleep 500 +flash info 0 +flash protect 0 0 31 off +flash erase 0 0 255 +sleep 200 +flash write 0 ../../../images/lm3s1968.bin 0 +sleep 200 +reset run +shutdown + + diff --git a/bertos/cpu/cortex-m3/scripts/openocd_lm3s1968_debug.cfg b/bertos/cpu/cortex-m3/scripts/openocd_lm3s1968_debug.cfg new file mode 100644 index 00000000..2e663c11 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/openocd_lm3s1968_debug.cfg @@ -0,0 +1,29 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +#ft2232_device_desc "Stellaris Evaluation Board A" +ft2232_layout evb_lm3s811 +ft2232_vid_pid 0x0403 0xbcd9 +jtag_speed 40 +#LM3S811 Evaluation Board has only srst +reset_config srst_only separate + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +#daemon_startup support deprecated on svn openocd version +daemon_startup attach +#target +#target arm7tdmi +target cortex_m3 little run_and_halt 0 lm3s +# 4k working area at base of ram +working_area 0 0x20000800 0x1200 nobackup + + +#flash configuration +flash bank stellaris 0 0 0 0 0 diff --git a/bertos/cpu/cortex-m3/scripts/openocd_lm3s1968_flash.cfg b/bertos/cpu/cortex-m3/scripts/openocd_lm3s1968_flash.cfg new file mode 100644 index 00000000..544077dd --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/openocd_lm3s1968_flash.cfg @@ -0,0 +1,35 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +#ft2232_device_desc "Stellaris Evaluation Board A" +ft2232_layout evb_lm3s811 +ft2232_vid_pid 0x0403 0xbcd9 +jtag_speed 40 +#LM3S811 Evaluation Board has only srst +reset_config srst_only separate + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +#daemon_startup deprecated on openocd svn +daemon_startup reset +#target +#target arm7tdmi +target cortex_m3 little run_and_init 0 lm3s +# 4k working area at base of ram +working_area 0 0x20000800 0x1200 nobackup + + +target_script 0 reset lm3s_program.script + + +#flash configuration +flash bank stellaris 0 0 0 0 0 + + +