From: arighi Date: Tue, 4 May 2010 08:55:17 +0000 (+0000) Subject: STM32: add a simple "blinky" example for Olimex STM32-P103. X-Git-Tag: 2.5.0~301 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=5e73dc4833ec0d8d10a03083fca31be9dcb55901;p=bertos.git STM32: add a simple "blinky" example for Olimex STM32-P103. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3607 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/Makefile b/Makefile index 44600dd6..84dce21d 100644 --- a/Makefile +++ b/Makefile @@ -19,6 +19,7 @@ include examples/demo/demo.mk #include examples/at91sam7/at91sam7x.mk #include examples/lm3s1968/lm3s1968.mk #include examples/lm3s8962/lm3s8962.mk +#include examples/stm32p103/stm32p103.mk #include examples/develgps/develgps.mk #include examples/lpc2378/lpc2378.mk #include examples/avr-kern/avr-kern.mk diff --git a/examples/stm32p103/cfg/cfg_debug.h b/examples/stm32p103/cfg/cfg_debug.h new file mode 100644 index 00000000..ef7c4a75 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_debug.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/examples/stm32p103/cfg/cfg_gfx.h b/examples/stm32p103/cfg/cfg_gfx.h new file mode 100644 index 00000000..8d8b6fa2 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_gfx.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/// Enable line clipping algorithm. +#define CONFIG_GFX_CLIPPING 1 + +/// Enable text rendering in bitmaps. +#define CONFIG_GFX_TEXT 1 + +/// Enable virtual coordinate system. +#define CONFIG_GFX_VCOORDS 1 + +/// Select bitmap pixel format. +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + + +#define CONFIG_CHART_TYPE_X uint8_t ///< Type for the chart dataset +#define CONFIG_CHART_TYPE_Y uint8_t ///< Type for the chart dataset + + +/// Enable button bar behind menus +#define CONFIG_MENU_MENUBAR 0 + +/// Level Edit Timeout +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/// Menu timeout +#define CONFIG_MENU_TIMEOUT 0 + +/// Enable smooth scrolling in menus +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_GFX_H */ + diff --git a/examples/stm32p103/cfg/cfg_heap.h b/examples/stm32p103/cfg/cfg_heap.h new file mode 100644 index 00000000..7d080012 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_heap.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/examples/stm32p103/cfg/cfg_kfile.h b/examples/stm32p103/cfg/cfg_kfile.h new file mode 100644 index 00000000..1b1989c9 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_kfile.h @@ -0,0 +1,62 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 1 + +#endif /* CFG_KFILE_H */ diff --git a/examples/stm32p103/cfg/cfg_lcd.h b/examples/stm32p103/cfg/cfg_lcd.h new file mode 100644 index 00000000..d48fa5df --- /dev/null +++ b/examples/stm32p103/cfg/cfg_lcd.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 0 + +/** + * LCD setting for 32122A (AVR implementation). + * $WIZ$ type = "boolean" + * $WIZ$ supports = "avr and False" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * LCD setting for 32122A (AVR implementation). + * $WIZ$ type = "boolean" + * $WIZ$ supports = "avr and False" + */ +#define CONFIG_LCD_WAIT 0 + + +#endif /* CFG_LCD_H */ + diff --git a/examples/stm32p103/cfg/cfg_monitor.h b/examples/stm32p103/cfg/cfg_monitor.h new file mode 100644 index 00000000..d0e24da4 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_monitor.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/examples/stm32p103/cfg/cfg_proc.h b/examples/stm32p103/cfg/cfg_proc.h new file mode 100644 index 00000000..eb5506b4 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 16384L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/examples/stm32p103/cfg/cfg_sem.h b/examples/stm32p103/cfg/cfg_sem.h new file mode 100644 index 00000000..51811da4 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_sem.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/examples/stm32p103/cfg/cfg_ser.h b/examples/stm32p103/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/examples/stm32p103/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/examples/stm32p103/cfg/cfg_signal.h b/examples/stm32p103/cfg/cfg_signal.h new file mode 100644 index 00000000..ce5324ec --- /dev/null +++ b/examples/stm32p103/cfg/cfg_signal.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/examples/stm32p103/cfg/cfg_timer.h b/examples/stm32p103/cfg/cfg_timer.h new file mode 100644 index 00000000..ae1a60b9 --- /dev/null +++ b/examples/stm32p103/cfg/cfg_timer.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/examples/stm32p103/main.c b/examples/stm32p103/main.c new file mode 100644 index 00000000..83481f8c --- /dev/null +++ b/examples/stm32p103/main.c @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief STM32-P103 Cortex-M3 testcase + * + * \author Andrea Righi + */ + +#include "cfg/compiler.h" +#include +#include +#include +#include + +#define LED_PIN (1 << 12) + +int main(void) +{ + IRQ_ENABLE; + timer_init(); + + /* Enable clocking on RCC APB2 */ + RCC->AHBENR |= 1; + /* Enable clocking on GPIOA and GPIOC */ + RCC->APB2ENR |= RCC_APB2_GPIOA | RCC_APB2_GPIOC; + + stm32_gpioPinConfig((struct stm32_gpio *)GPIOC_BASE, + LED_PIN, GPIO_MODE_OUT_PP, GPIO_SPEED_50MHZ); + while(1) + { + ticks_t clock = timer_clock_unlocked(); + + if (clock & 0x10) + stm32_gpioPinWrite((struct stm32_gpio *)GPIOC_BASE, LED_PIN, 1); + else + stm32_gpioPinWrite((struct stm32_gpio *)GPIOC_BASE, LED_PIN, 0); + } +} diff --git a/examples/stm32p103/stm32p103.mk b/examples/stm32p103/stm32p103.mk new file mode 100644 index 00000000..c13c4fc6 --- /dev/null +++ b/examples/stm32p103/stm32p103.mk @@ -0,0 +1,55 @@ +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# +# Makefile for the stm32p103 board example. +# +# Author: Andrea Righi + +# Set to 1 for debug builds +stm32p103_DEBUG = 0 + +include bertos/fonts/fonts.mk + +# Our target application +TRG += stm32p103 + +stm32p103_CSRC = \ + bertos/kern/proc.c \ + bertos/drv/timer.c \ + bertos/cpu/cortex-m3/drv/gpio_stm32.c \ + bertos/cpu/cortex-m3/drv/clock_stm32.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/cpu/cortex-m3/drv/irq_cm3.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/cpu/cortex-m3/hw/init_cm3.c \ + examples/stm32p103/main.c + +stm32p103_CPPASRC = \ + bertos/cpu/cortex-m3/hw/vectors_cm3.S \ + bertos/cpu/cortex-m3/hw/crt_cm3.S \ + # + +# This is an hosted application +stm32p103_PREFIX = arm-none-eabi- + +stm32p103_CPPAFLAGS = -mthumb +stm32p103_CPPFLAGS = -D'ARCH=0' -D__ARM_STM32P103__ -D'CPU_FREQ=(72000000L)' -D'WIZ_AUTOGEN' -mthumb -Iexamples/stm32p103 -Ibertos/cpu/cortex-m3 -fno-strict-aliasing -fwrapv +stm32p103_LDFLAGS = -nostartfiles -T bertos/cpu/cortex-m3/scripts/stm32p103_rom.ld -Wl,--no-warn-mismatch -mthumb + +stm32p103_CPU = cortex-m3 + +stm32p103_PROGRAMMER_CPU = stm32 +stm32p103_PROGRAMMER_TYPE = jtag-tiny +stm32p103_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-stm32.sh +stm32p103_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +stm32p103_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +stm32p103_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh + +ifeq ($(stm32p103_DEBUG),0) + # Production options + stm32p103_CFLAGS += -O0 + stm32p103_CXXFLAGS += -O0 +else + # Debug options + stm32p103_CPPAFLAGS += -g -gdwarf-2 + stm32p103_CPPFLAGS += -O0 -g3 -gdwarf-2 -fverbose-asm +endif