From: asterix Date: Thu, 14 Jul 2011 17:08:25 +0000 (+0000) Subject: Add first implementation of wm8731 audio codec module. X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=6ba16dfb2e010e0f7af8125ee3c060987135f2ef;p=bertos.git Add first implementation of wm8731 audio codec module. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4967 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cfg/cfg_wm8731.h b/bertos/cfg/cfg_wm8731.h new file mode 100644 index 00000000..046446f3 --- /dev/null +++ b/bertos/cfg/cfg_wm8731.h @@ -0,0 +1,43 @@ +/** + * \file + * + * + * \brief Configuration file for the WM8731 module. + * + * \author Daniele Basile + */ + +#ifndef CFG_WM8731_H +#define CFG_WM8731_H + + + +#endif /* CFG_WM8731_H */ diff --git a/bertos/drv/wm8731.c b/bertos/drv/wm8731.c new file mode 100644 index 00000000..2ce98314 --- /dev/null +++ b/bertos/drv/wm8731.c @@ -0,0 +1,168 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief WM8731 Audio codec 2 wire driver. + * + */ + +#include "hw/hw_wm8731.h" +#include "cfg/cfg_wm8731.h" + +#include + +#include + +/* Reset register*/ +#define WM8731_REG_RESET 0x0F + +/* Left Line in register */ +#define WM8731_REG_LEFT_LINEIN 0x0 +#define WM8731_LINVOL_BITS_MASK 0xF // Left line input volume control +#define WM8731_LINMUTE_BIT 7 // Left line input mute to ADC +#define WM8731_LRINBOTH_BIT 8 // Left to right channel line input volume and mute data load control + +/* Right Line in register */ +#define WM8731_REG_RIGHT_LINEIN 0x1 +#define WM8731_RINVOL_BITS_MASK 0xF // Right line input volume control +#define WM8731_RINMUTE_BIT 7 // Right line input mute to ADC +#define WM8731_RLINBOTH_BIT 8 // Right to right channel line input volume and mute data load control + +/* Left Headphone out register*/ +#define WM8731_REG_LEFT_HPOUT 0x2 +#define WM8731_LHPVOL_BITS_MASK 0x7 // Left chnnel headphone output volume control +#define WM8731_LZCEN_BIT 7 // Left channel zero cross detect enable +#define WM8731_LRHPBOTH_BIT 8 // Left to right channel headphone volume, mute and zero cross data load control + +/* Right Headphone out register*/ +#define WM8731_REG_RIGHT_HPOUT 0x3 +#define WM8731_RHPVOL_BITS_MASK 0x7 // Right chnnel headphone output volume control +#define WM8731_RZCEN_BIT 7 // Right channel zero cross detect enable +#define WM8731_RLHPBOTH_BIT 8 // Right to right channel headphone volume, mute and zero cross data load control + +/* Analogue audio path control register*/ +#define WM8731_REG_ANALOGUE_PATH_CTRL 0x4 +#define WM8731_MICBOOST 0 // Microphone Input Level Boost +#define WM8731_MUTEMIC 1 // Line input Mute to ADC +#define WM8731_INSEL 2 // Microphone/Line Select to ADC +#define WM8731_BYPASS 3 // Bypass switch +#define WM8731_DACSEL 4 // DAC select +#define WM8731_SIDETONE 5 // Side tone switch +#define WM8731_SIDEATT_MASK 0xC0 // Side tone attenuation +#define WM8731_SIDEATT_15dB 0xC0 // -15dB +#define WM8731_SIDEATT_12dB 0x80 // -12dB +#define WM8731_SIDEATT_9dB 0x40 // -9dB +#define WM8731_SIDEATT_6dB 0x00 // -6dB + + +/* Digital audio path control register*/ +#define WM8731_REG_DIGITAL_PATH_CTRL 0x5 +#define WM8731_ADCHPD 0 // ADC high pass filter enable +#define WM8731_DEEMP_MASK 0x6 // De-emphasis controll +#define WM8731_DEEMP_48kHz 0x6 // 48kHz +#define WM8731_DEEMP_44k1Hz 0x4 // 44.1kHz +#define WM8731_DEEMP_32kHz 0x2 // 32kHz +#define WM8731_DEEMP_DISABLE 0x0 // Disable +#define WM8731_DACMU 3 // DAC Soft Mute control + +/* Power down control register*/ +#define WM8731_REG_PWDOWN_CTRL 0x6 +#define WM8731_LINEINPD_BIT 0 // LineIn power down +#define WM8731_MICPD_BIT 1 // Mic power down +#define WM8731_ADCPD_BIT 2 // ADC power down +#define WM8731_DACPD_BIT 3 // DAC power down +#define WM8731_OUTPD_BIT 4 // OUT power down +#define WM8731_OSCBIT 5 // OSC power down +#define WM8731_CLKOUTPD_BIT 6 // CLKOUT powerdown +#define WM8731_POWEROFF_BIT 7 // Power off device + +/* Interface format register*/ +#define WM8731_REG_DA_INTERFACE_FORMAT 0x7 +#define WM8731_FORMAT_BITS_MASK 0x3 // Format +#define WM8731_FORMAT_MSB_LEFT_JUSTIFIED 0x0 // MSB-First, left justified +#define WM8731_FORMAT_MSB_RIGHT_JUSTIFIED 0x1 // MSB-First, right justified +#define WM8731_FORMAT_I2S 0x2 //I2S Format, MSB-First left-1 justified +#define WM8731_FORMAT_DSP 0x3 //DSP Mode, frame sync + 2 data packed words +#define WM8731_IWL_BITS 0xC // Input audio data bit length select +#define WM8731_IWL_16_BIT 0x0 // 16 bit +#define WM8731_IWL_20_BIT 0x4 // 20 bit +#define WM8731_IWL_24_BIT 0x8 // 24 bit +#define WM8731_IWL_32_BIT 0xC // 32 bit +#define WM8731_IRP_BITS 4 // DACLRC phase control +#define WM8731_IRSWAP_BIT 5 // DAC Left right clock swap +#define WM8731_MS_BIT 6 // Master slave mode control +#define WM8731_BCLKINV_BIT 7 // Bit clock invert + +/* Sampling control*/ +#define WM8731_REG_SAMPLECTRL 0x8 +#define WM8731_USBNORMAL_BIT 0 // Mode select, usb mode, normal mode +#define WM8731_BOSR_BIT 1 // Base over-sampling rate +#define WM8731_SR_BITS_MASK 0x3C // Sample rate control +#define WM8731_CLKIDIV2_BIT 6 // Core clock divider select +#define WM8731_CLKODIV2_BIT 7 // CLKOUT divider select + +/* Active control register*/ +#define WM8731_REG_ACTIVE_CTRL 0x9 +#define WM8731_ACTIVE_BIT 0 // Activate interface + +/* + * Codec has 7-bit address, the eighth is the R/W bit, so we + * write the codec address with one bit shifted left + */ +#define CODEC_ADDR 0x36 + + + + +static void wm8731_write(uint8_t reg, uint16_t value) +{ + + uint16_t tmp = ((reg & 0x7f) << 9) | (value & 0x1ff); + uint8_t msb = (tmp & 0xFF00) >> 8; + uint8_t lsb = tmp & 0xFF; + + kprintf("msb: %0x lsb: %0x\n", msb, lsb); +/* + i2c_start_w(&i2c, CODEC_ADDR, 2, I2C_STOP); + i2c_putc(&i2c, msb); + i2c_putc(&i2c, lsb); + + + if (i2c_error(&i2c)) + kputs("Errore!\n"); +*/ +} + +void wm8731_init(void) +{ +} diff --git a/bertos/drv/wm8731.h b/bertos/drv/wm8731.h new file mode 100644 index 00000000..54e5ca9c --- /dev/null +++ b/bertos/drv/wm8731.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief WM8731 Audio codec 2 wire driver. + * + * $WIZ$ module_name = "wm8731" + * $WIZ$ module_configuration = "bertos/cfg/cfg_wm8731.h" + * $WIZ$ module_depends = "i2c" + * $WIZ$ module_hw = "bertos/hw/hw_wm8731.h" + */ + +#ifndef DRV_WM8731_H +#define DRV_WM8731_H + +void wm8731_init(void); + +#endif /* DRV_WM8731_H */ diff --git a/bertos/hw/hw_wm8731.h b/bertos/hw/hw_wm8731.h new file mode 100644 index 00000000..8fd9e452 --- /dev/null +++ b/bertos/hw/hw_wm8731.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief HW pin handling for WM8731 audio codec. + * + * + * \author Daniele Basile + */ + +#ifndef HW_WM8731_H +#define HW_WM8731_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + + +#define WM8731_PIN_INIT() \ + do { \ + /* implement me */ \ + } while (0) + +#define WM8731_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_WM8731_H */