From: arighi <arighi@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Tue, 4 May 2010 08:55:07 +0000 (+0000)
Subject: CM3: unify architecture initialization routine for all the Cortex-M3 processors.
X-Git-Tag: 2.5.0~304
X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=9550884ef08501d68bda54d7ed3f41ccc24694eb;p=bertos.git

CM3: unify architecture initialization routine for all the Cortex-M3 processors.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3604 38d2e660-2303-0410-9eaa-f027e97ec537
---

diff --git a/bertos/cpu/cortex-m3/hw/init_cm3.c b/bertos/cpu/cortex-m3/hw/init_cm3.c
new file mode 100644
index 00000000..079f08a3
--- /dev/null
+++ b/bertos/cpu/cortex-m3/hw/init_cm3.c
@@ -0,0 +1,115 @@
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction.  Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License.  This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \brief Cortex-M3 architecture's entry point
+ *
+ * \author Andrea Righi <arighi@develer.com>
+ */
+
+#include <cfg/compiler.h>
+#include <cfg/cfg_proc.h> /* CONFIG_KERN_PREEMPT */
+#include <kern/proc_p.h>
+#include <cfg/debug.h>
+#include <cpu/attr.h> /* PAUSE */
+#include <cpu/irq.h> /* IRQ_DISABLE */
+#include <cpu/types.h>
+#include <drv/irq_cm3.h>
+#include "switch_ctx_cm3.h"
+
+#if CPU_CM3_LM3S
+#include <drv/clock_lm3s.h>
+#include <io/lm3s.h>
+#elif CPU_CM3_STM32
+#include <drv/clock_stm32.h>
+#include <io/stm32.h>
+#endif
+
+extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end;
+
+extern void __init2(void);
+
+/* Architecture's entry point */
+void __init2(void)
+{
+	/*
+	 * The main application expects IRQs disabled.
+	 */
+	IRQ_DISABLE;
+
+#if CPU_CM3_LM3S
+	/*
+	 * PLL may not function properly at default LDO setting.
+	 *
+	 * Description:
+	 *
+	 * In designs that enable and use the PLL module, unstable device
+	 * behavior may occur with the LDO set at its default of 2.5 volts or
+	 * below (minimum of 2.25 volts). Designs that do not use the PLL
+	 * module are not affected.
+	 *
+	 * Workaround: Prior to enabling the PLL module, it is recommended that
+	 * the default LDO voltage setting of 2.5 V be adjusted to 2.75 V using
+	 * the LDO Power Control (LDOPCTL) register.
+	 *
+	 * Silicon Revision Affected: A1, A2
+	 *
+	 * See also: Stellaris LM3S1968 A2 Errata documentation.
+	 */
+	if (REVISION_IS_A1 | REVISION_IS_A2)
+		HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V;
+#endif
+	/* Set the appropriate clocking configuration */
+	clock_init();
+
+	/* Initialize IRQ vector table in RAM */
+	sysirq_init();
+
+#if CONFIG_KERN_PREEMPT
+	/*
+	 * Voluntary context switch handler.
+	 *
+	 * This software interrupt can always be triggered and must be
+	 * dispatched as soon as possible, thus we just disable IRQ priority
+	 * for it.
+	 */
+	sysirq_setHandler(FAULT_SVCALL, svcall_handler);
+	sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX);
+	/*
+	 * Preemptible context switch handler
+	 *
+	 * The priority of this IRQ must be the lowest priority in the system
+	 * in order to run last in the interrupt service routines' chain.
+	 */
+	sysirq_setHandler(FAULT_PENDSV, pendsv_handler);
+	sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN);
+#endif
+}
diff --git a/bertos/cpu/cortex-m3/hw/init_lm3s.c b/bertos/cpu/cortex-m3/hw/init_lm3s.c
deleted file mode 100644
index 0c0a05b7..00000000
--- a/bertos/cpu/cortex-m3/hw/init_lm3s.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/**
- * \file
- * <!--
- * This file is part of BeRTOS.
- *
- * Bertos is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- *
- * As a special exception, you may use this file as part of a free software
- * library without restriction.  Specifically, if other files instantiate
- * templates or use macros or inline functions from this file, or you compile
- * this file and link it with other files to produce an executable, this
- * file does not by itself cause the resulting executable to be covered by
- * the GNU General Public License.  This exception does not however
- * invalidate any other reasons why the executable file might be covered by
- * the GNU General Public License.
- *
- * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
- *
- * -->
- *
- * \brief Cortex-M3 architecture's entry point
- *
- * \author Andrea Righi <arighi@develer.com>
- */
-
-#include <cfg/compiler.h>
-#include <cfg/cfg_proc.h> /* CONFIG_KERN_PREEMPT */
-#include <kern/proc_p.h>
-#include <cfg/debug.h>
-#include <cpu/attr.h> /* PAUSE */
-#include <cpu/irq.h> /* IRQ_DISABLE */
-#include <cpu/types.h>
-#include <drv/irq_cm3.h>
-#include <drv/clock_lm3s.h>
-#include <io/lm3s.h>
-#include "switch_ctx_cm3.h"
-
-extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end;
-
-extern void __init2(void);
-
-/* Architecture's entry point */
-void __init2(void)
-{
-	/*
-	 * The main application expects IRQs disabled.
-	 */
-	IRQ_DISABLE;
-
-	/*
-	 * PLL may not function properly at default LDO setting.
-	 *
-	 * Description:
-	 *
-	 * In designs that enable and use the PLL module, unstable device
-	 * behavior may occur with the LDO set at its default of 2.5 volts or
-	 * below (minimum of 2.25 volts). Designs that do not use the PLL
-	 * module are not affected.
-	 *
-	 * Workaround: Prior to enabling the PLL module, it is recommended that
-	 * the default LDO voltage setting of 2.5 V be adjusted to 2.75 V using
-	 * the LDO Power Control (LDOPCTL) register.
-	 *
-	 * Silicon Revision Affected: A1, A2
-	 *
-	 * See also: Stellaris LM3S1968 A2 Errata documentation.
-	 */
-	if (REVISION_IS_A1 | REVISION_IS_A2)
-		HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V;
-
-	/* Set the appropriate clocking configuration */
-	clock_set_rate();
-
-	/* Initialize IRQ vector table in RAM */
-	sysirq_init();
-
-#if CONFIG_KERN_PREEMPT
-	/*
-	 * Voluntary context switch handler.
-	 *
-	 * This software interrupt can always be triggered and must be
-	 * dispatched as soon as possible, thus we just disable IRQ priority
-	 * for it.
-	 */
-	sysirq_setHandler(FAULT_SVCALL, svcall_handler);
-	sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX);
-	/*
-	 * Preemptible context switch handler
-	 *
-	 * The priority of this IRQ must be the lowest priority in the system
-	 * in order to run last in the interrupt service routines' chain.
-	 */
-	sysirq_setHandler(FAULT_PENDSV, pendsv_handler);
-	sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN);
-#endif
-}
diff --git a/bertos/cpu/cortex-m3/info/cm3.common b/bertos/cpu/cortex-m3/info/cm3.common
index 23dfe2a3..380a02b5 100644
--- a/bertos/cpu/cortex-m3/info/cm3.common
+++ b/bertos/cpu/cortex-m3/info/cm3.common
@@ -78,4 +78,4 @@ MK_CPU_LDFLAGS = "-mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-misma
 
 # CRT files.
 MK_CPU_CPPASRC = HW_DIR + "crt_cm3.S " + HW_DIR + "vectors_cm3.S "
-MK_CPU_CSRC = HW_DIR + "init_lm3s.c " + DRV_DIR + "irq_cm3.c "
+MK_CPU_CSRC = HW_DIR + "init_cm3.c " + DRV_DIR + "irq_cm3.c "
diff --git a/examples/develgps/develgps.mk b/examples/develgps/develgps.mk
index b1415b7c..08a87f66 100644
--- a/examples/develgps/develgps.mk
+++ b/examples/develgps/develgps.mk
@@ -50,7 +50,7 @@ develgps_CSRC = \
 	bertos/cpu/cortex-m3/drv/timer_cm3.c \
 	bertos/cpu/cortex-m3/drv/irq_cm3.c \
 	bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \
-	bertos/cpu/cortex-m3/hw/init_lm3s.c
+	bertos/cpu/cortex-m3/hw/init_cm3.c
 
 develgps_CPPASRC = \
 	bertos/cpu/cortex-m3/hw/vectors_cm3.S \
diff --git a/examples/lm3s1968/lm3s1968.mk b/examples/lm3s1968/lm3s1968.mk
index fc4622f3..d93a6c1b 100644
--- a/examples/lm3s1968/lm3s1968.mk
+++ b/examples/lm3s1968/lm3s1968.mk
@@ -50,7 +50,7 @@ lm3s1968_CSRC = \
 	bertos/cpu/cortex-m3/drv/timer_cm3.c \
 	bertos/cpu/cortex-m3/drv/irq_cm3.c \
 	bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \
-	bertos/cpu/cortex-m3/hw/init_lm3s.c
+	bertos/cpu/cortex-m3/hw/init_cm3.c
 
 lm3s1968_CPPASRC = \
 	bertos/cpu/cortex-m3/hw/vectors_cm3.S \
diff --git a/examples/lm3s8962/lm3s8962.mk b/examples/lm3s8962/lm3s8962.mk
index c4ae958f..9e7ade13 100644
--- a/examples/lm3s8962/lm3s8962.mk
+++ b/examples/lm3s8962/lm3s8962.mk
@@ -45,7 +45,7 @@ lm3s8962_CSRC = \
 	bertos/cpu/cortex-m3/drv/timer_cm3.c \
 	bertos/cpu/cortex-m3/drv/irq_cm3.c \
 	bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \
-	bertos/cpu/cortex-m3/hw/init_lm3s.c
+	bertos/cpu/cortex-m3/hw/init_cm3.c
 
 lm3s8962_CPPASRC = \
 	bertos/cpu/cortex-m3/hw/vectors_cm3.S \