From: asterix <asterix@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Mon, 10 Oct 2011 16:08:30 +0000 (+0000)
Subject: Define new tag to fix wizard errors.
X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=9a5b40aa78c43cf8721a5e4e178556a7cef33072;p=bertos.git

Define new tag to fix wizard errors.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@5149 38d2e660-2303-0410-9eaa-f027e97ec537
---

diff --git a/bertos/cfg/cfg_ser.h b/bertos/cfg/cfg_ser.h
index 91a10e0b..e7d5cc43 100644
--- a/bertos/cfg/cfg_ser.h
+++ b/bertos/cfg/cfg_ser.h
@@ -160,14 +160,14 @@
  *
  * $WIZ$ type = "enum"
  * $WIZ$ value_list = "ser_order_bit"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
  */
 #define CONFIG_SPI_DATA_ORDER	SER_MSB_FIRST
 
 /**
  * SPI clock division factor.
  * $WIZ$ type = "int"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
  */
 #define CONFIG_SPI_CLOCK_DIV	16
 
@@ -175,7 +175,7 @@
  * SPI clock polarity: normal low or normal high.
  * $WIZ$ type = "enum"
  * $WIZ$ value_list = "ser_spi_pol"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
  */
 #define CONFIG_SPI_CLOCK_POL        SPI_NORMAL_LOW
 
@@ -184,7 +184,7 @@
  * sample on second clock edge.
  * $WIZ$ type = "enum"
  * $WIZ$ value_list = "ser_spi_phase"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
  */
 #define CONFIG_SPI_CLOCK_PHASE	    SPI_SAMPLE_ON_FIRST_EDGE
 
diff --git a/bertos/cpu/avr/info/ATxmega32D4.cdef b/bertos/cpu/avr/info/ATxmega32D4.cdef
index 57a1496e..9cae5eb0 100644
--- a/bertos/cpu/avr/info/ATxmega32D4.cdef
+++ b/bertos/cpu/avr/info/ATxmega32D4.cdef
@@ -53,4 +53,7 @@ CORE_CPU = "atxmega32d4"
 HW_DIR = CPU_DIR + "avr/hw/"
 MK_CPU_CSRC = HW_DIR + "init_xmega.c"
 
+# Special CPU related tags.
+CPU_TAGS += ["xmega32d"]
+
 include("avr_post.common")