From: lottaviano Date: Mon, 30 Aug 2010 12:12:37 +0000 (+0000) Subject: First support for MSP430 CPU X-Git-Tag: 2.6.0~194 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=a3f9ca9d86b7f8da31204746cc32e13c2dbe5ed0;p=bertos.git First support for MSP430 CPU Add detect macros, add kdebug code. Signed-off-by: Mohamed Tarek git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4196 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cfg/compiler.h b/bertos/cfg/compiler.h index 08ccdead..907b23e6 100644 --- a/bertos/cfg/compiler.h +++ b/bertos/cfg/compiler.h @@ -486,8 +486,8 @@ typedef unsigned char sigmask_t; /**< Type for signal masks. */ typedef long ssize_t; #elif CPU_ARM || CPU_CM3 typedef int ssize_t; - #elif CPU_AVR - /* 16bit (missing in avr-libc's sys/types.h). */ + #elif CPU_AVR || CPU_MSP430 + /* 16bit (missing in avr-/msp430-libc's sys/types.h). */ typedef int ssize_t; #else #error Unknown CPU diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h index 79896990..33901d06 100644 --- a/bertos/cpu/attr.h +++ b/bertos/cpu/attr.h @@ -246,6 +246,18 @@ #define CPU_RAM_START 0x100 #endif +#elif CPU_MSP430 + + #define CPU_REG_BITS 16 + #define CPU_REGS_CNT 12 + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x200 + + #define NOP __asm__ __volatile__ ("nop") + #else #error No CPU_... defined. #endif diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index 7e0d0835..a5420615 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -363,13 +363,26 @@ #define CPU_AVR_ATMEGA1280 0 #endif +#if defined (__MSP430__) + #define CPU_MSP430 1 + #define CPU_ID msp430 + + #if defined(__MSP430_2274__) + #define CPU_MSP430_2274 1 + #else + #define CPU_MSP430_2274 0 + #endif +#else + #define CPU_MSP430 0 +#endif + /* Self-check for the detection: only one CPU must be detected */ -#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0 +#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0 #error Unknown CPU #elif !defined(CPU_ID) #error CPU_ID not defined -#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1 +#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1 #error Internal CPU configuration error #endif diff --git a/bertos/cpu/frame.h b/bertos/cpu/frame.h index b65aaed7..f7eac47e 100644 --- a/bertos/cpu/frame.h +++ b/bertos/cpu/frame.h @@ -91,6 +91,12 @@ #define CPU_STACK_GROWS_UPWARD 0 #define CPU_SP_ON_EMPTY_SLOT 1 +#elif CPU_MSP430 + + #define CPU_SAVED_REGS_CNT 16 + #define CPU_STACK_GROWS_UPWARD 1 + #define CPU_SP_ON_EMPTY_SLOT 0 + #else #error No CPU_... defined. #endif diff --git a/bertos/cpu/irq.h b/bertos/cpu/irq.h index 153f7861..8e8abe20 100644 --- a/bertos/cpu/irq.h +++ b/bertos/cpu/irq.h @@ -527,6 +527,13 @@ #define ISR_PROTO_CONTEXT_SWITCH(vect) ISR(vect) #endif +#elif CPU_MSP430 + + /* Get the compiler defined macros */ + #include + #define IRQ_DISABLE dint() + #define IRQ_ENABLE eint() + #else #error No CPU_... defined. #endif diff --git a/bertos/cpu/msp430/drv/kdebug_msp430.c b/bertos/cpu/msp430/drv/kdebug_msp430.c new file mode 100644 index 00000000..b263efca --- /dev/null +++ b/bertos/cpu/msp430/drv/kdebug_msp430.c @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief MSP430 debug support (implementation). + * + * \author Mohamed Tarek + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for DIV_ROUND */ + +#include +#include + +#include + +#if CONFIG_KDEBUG_PORT == 0 + + #ifndef KDBG_UART0_BUS_INIT + #define KDBG_UART0_BUS_INIT do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_RX + #define KDBG_UART0_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_TX + #define KDBG_UART0_BUS_TX do {} while (0) + #endif + + /* USCI Register definitions */ + #define UCSTAT UCA0STAT + #define UCTXBUF UCA0TXBUF + #define UCRXBUF UCA0RXBUF + #define UCTXIFG UCA0TXIFG + #define UCRXIFG UCA0RXIFG + #define UCTXIE UCA0TXIE + #define UCRXIE UCA0RXIE + #define UCCTL0 UCA0CTL0 + #define UCCTL1 UCA0CTL1 + #define UCBR0 UCA0BR0 + #define UCBR1 UCA0BR1 + #define UCMCTL UCA0MCTL + #define IE IE2 + #define IFG IFG2 + + #if (CPU_MSP430_2274) + #define KDBG_MSP430_UART_PINS_INIT() do{ P3SEL = 0x30; }while(0) + #endif + +#else + + #if (CPU_MSP430_2274) + #error only 1 UART availbale, CONFIG_KDEBUG_PORT should be 0 + #endif + +#endif + +#define KDBG_WAIT_READY() do { while((UCSTAT & UCBUSY)); } while(0) +#define KDBG_WAIT_TXDONE() do { while(!(IFG & UCTXIFG)); } while(0) + +#define KDBG_WRITE_CHAR(c) do { UCTXBUF = (c); } while(0) + +#define KDBG_MASK_IRQ(old) do { \ + (old) = IE; \ + IE &= ~(UCTXIE|UCRXIE);\ +} while(0) + +#define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + IE = (old); \ +} while(0) + +typedef uint8_t kdbg_irqsave_t; + +INLINE void kdbg_hw_init(void) +{ + /* Assume SMCLK = MCLK = DCO = CPU_FREQ */ + /* Compute the baud rate */ + uint16_t quot = DIV_ROUND(CPU_FREQ, CONFIG_KDEBUG_BAUDRATE); + KDBG_MSP430_UART_PINS_INIT(); // Configure USCI TX/RX pins + UCCTL1 |= UCSSEL_2; // use SMCLK + UCBR0 = quot & 0xFF; + UCBR1 = quot >> 8; + UCMCTL = UCBRS0; // No Modulation + UCCTL0 = 0; // Default UART settings (8N1) + UCCTL1 &= ~UCSWRST; // Initialize USCI state machine + KDBG_MASK_IRQ(IE2); // Disable USCI interrupts +} + diff --git a/bertos/cpu/msp430/info/MSP430F2274.cdef b/bertos/cpu/msp430/info/MSP430F2274.cdef new file mode 100644 index 00000000..9cdcc253 --- /dev/null +++ b/bertos/cpu/msp430/info/MSP430F2274.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the MSP430f2274. +# +# This file contains all the info for the BeRTOS wizard. +# +# \author Mohamed Tarek +# +# + +# Import the common settings for the path. +include("msp430.common") + +# Short description of the cpu. +CPU_DESC += [ "32 Kbytes Flash", + "1 Kbyte internal SRAM", + "256 bytes Information Flash"] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "msp430x2274" + +include("msp430_post.common") diff --git a/bertos/cpu/msp430/info/msp430.common b/bertos/cpu/msp430/info/msp430.common new file mode 100644 index 00000000..c177ca94 --- /dev/null +++ b/bertos/cpu/msp430/info/msp430.common @@ -0,0 +1,69 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition AVR family. +# +# This file contains all the info for the BeRTOS wizard. +# +# \author Mohamed Tarek +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = [ "Texas Instruments MSP430 Microcontroller ", + "16-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "mspgcc" + +# Special CPU related tags. +CPU_TAGS = ["Von Neumann", TOOLCHAIN] + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "1000000UL" + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "msp430/scripts/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "msp430/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "msp430/stopflash.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "nodebug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "none.sh" + +# Common GCC flags. +MK_CPU_CPPFLAGS = "-Os -I" + CPU_DIR + "msp430/" + diff --git a/bertos/cpu/msp430/info/msp430_post.common b/bertos/cpu/msp430/info/msp430_post.common new file mode 100644 index 00000000..6705724a --- /dev/null +++ b/bertos/cpu/msp430/info/msp430_post.common @@ -0,0 +1,8 @@ +# CPU type used for flashing +MK_PROGRAMMER_CPU = CORE_CPU + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_MCU = CORE_CPU + +# Add CPU core to tags +CPU_TAGS += [ CORE_CPU ] diff --git a/bertos/cpu/types.h b/bertos/cpu/types.h index cbef8c41..ebd34171 100644 --- a/bertos/cpu/types.h +++ b/bertos/cpu/types.h @@ -120,6 +120,14 @@ #define SIZEOF_CPUSTACK_T 1 #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T +#elif CPU_MSP430 + + typedef uint16_t cpu_flags_t; + typedef uint16_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 2 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + #else #error No CPU_... defined. #endif diff --git a/bertos/mware/formatwr.c b/bertos/mware/formatwr.c index c0a82298..0f3c00d1 100644 --- a/bertos/mware/formatwr.c +++ b/bertos/mware/formatwr.c @@ -604,7 +604,7 @@ NEXT_FLAG: case 'p': case 'X': if (format_flag == 'p') -#if defined(__AVR__) || defined(__I196__) /* 16bit pointers */ +#if defined(__AVR__) || defined(__I196__) || defined(__MSP430__) /* 16bit pointers */ ulong = (unsigned long)(unsigned short)va_arg(ap, char *); #else /* 32bit pointers */ ulong = (unsigned long)va_arg(ap, char *);