From: batt Date: Thu, 27 May 2010 14:05:01 +0000 (+0000) Subject: Rename to correct CPU name. X-Git-Tag: 2.5.0~59 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=b7daab00fae8117ef4d1f63848874c1bedc68c01;p=bertos.git Rename to correct CPU name. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3858 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h index 65129b57..da3e08bc 100644 --- a/bertos/cpu/attr.h +++ b/bertos/cpu/attr.h @@ -171,7 +171,7 @@ #define CPU_HARVARD 0 /// Valid pointers should be >= than this value (used for debug) - #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32F103R8) + #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32F103RB) #define CPU_RAM_START 0x20000000 #else #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x200 diff --git a/bertos/cpu/cortex-m3/info/STM32F103R8.cdef b/bertos/cpu/cortex-m3/info/STM32F103R8.cdef deleted file mode 100644 index 857632b2..00000000 --- a/bertos/cpu/cortex-m3/info/STM32F103R8.cdef +++ /dev/null @@ -1,65 +0,0 @@ -# -#-*- coding: utf-8 -*- -# -# \file -# -# -# General CPU info denfinition for Cortex-M3-based STM32-P103 board. -# -# This file contain all info for the BeRTOS wizard. -# -# \author Andrea Righi -# -# - -# Import the common settings for the path. -include("cm3.common") - -# CPU type used for flashing/debugging -MK_PROGRAMMER_CPU = "stm32" -MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" - -# CPU default clock frequency -CPU_DEFAULT_FREQ = "72000000UL" - -# Special CPU related tags. -CPU_TAGS += ["stm32"] - -# Additional hw drivers. -MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " - -# Short description of the cpu. -CPU_DESC += [ "128 Kbytes on-chip flash memory", - "20 Kbytes on-chip SRAM memory" ] - -# GCC flags for this cpu. -MK_CPU_CPPFLAGS += " -D__ARM_STM32F103R8__" -MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "stm32f103r8_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/STM32F103RB.cdef b/bertos/cpu/cortex-m3/info/STM32F103RB.cdef new file mode 100644 index 00000000..add4cea6 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/STM32F103RB.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based STM32-P103 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "stm32" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "72000000UL" + +# Special CPU related tags. +CPU_TAGS += ["stm32"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes on-chip flash memory", + "20 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_STM32F103RB__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "stm32f103rb_rom.ld" diff --git a/bertos/cpu/cortex-m3/scripts/stm32f103r8_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f103r8_rom.ld deleted file mode 100644 index 522a8428..00000000 --- a/bertos/cpu/cortex-m3/scripts/stm32f103r8_rom.ld +++ /dev/null @@ -1,118 +0,0 @@ -/** - * \file - * - * - * \author Andrea Righi - * - * \brief Script for Olimex STM32-P103 Cortex-M3 board. - * - */ - -SEARCH_DIR(.) -OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -OUTPUT_ARCH(arm) - -/* - * Define memory configuration for STM32F103R8 - */ -MEMORY -{ - rom(rx) : org = 0x00000000, len = 128k - ram(rwx) : org = 0x20000000, len = 20k -} - -/* - * Define stack size here - */ -STACK_SIZE = 0x1000; - -/* - * Allocate section memory - */ -SECTIONS -{ - .text : - { - KEEP(*(.vectors)); - . = ALIGN (4); - KEEP(*(.init)); - . = ALIGN (4); - *(.rodata .rodata.*); - . = ALIGN (4); - *(.text .text.*); - . = ALIGN (4); - *(.glue_7t); - . = ALIGN(4); - *(.glue_7); - . = ALIGN(4); - } > rom - - __text_end = .; - PROVIDE (__text_end = .); - - .data : AT (__text_end) - { - PROVIDE (__data_start = .); - . = ALIGN (0x400); - *(vtable) - *(.data .data.*) - . = ALIGN (4); - _edata = .; - PROVIDE (__data_end = .); - } > ram - - .bss : - { - PROVIDE (__bss_start = .); - *(.bss .bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE (__bss_end = .); - } > ram - - /* - * Allocated stack at the end of bss section. - * Data heap is allocate at end of stack. - */ - PROVIDE (__msp_start = .); - . = ALIGN(8); - . += STACK_SIZE; - PROVIDE (__msp_end = .); - - PROVIDE (__psp_start = .); - . = ALIGN(8); - . += STACK_SIZE; - PROVIDE (__psp_end = .); - - PROVIDE (__heap_start = .); - . = ALIGN(8); -} diff --git a/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld new file mode 100644 index 00000000..522a8428 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Script for Olimex STM32-P103 Cortex-M3 board. + * + */ + +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for STM32F103R8 + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 128k + ram(rwx) : org = 0x20000000, len = 20k +} + +/* + * Define stack size here + */ +STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > rom + + __text_end = .; + PROVIDE (__text_end = .); + + .data : AT (__text_end) + { + PROVIDE (__data_start = .); + . = ALIGN (0x400); + *(vtable) + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__msp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__msp_end = .); + + PROVIDE (__psp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__psp_end = .); + + PROVIDE (__heap_start = .); + . = ALIGN(8); +} diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index 8e1a69fa..33f6178c 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -192,11 +192,11 @@ #define CPU_CM3_LM3S8962 0 #endif - #if defined (__ARM_STM32F103R8__) + #if defined (__ARM_STM32F103RB__) #define CPU_CM3_STM32 1 - #define CPU_CM3_STM32F103R8 1 + #define CPU_CM3_STM32F103RB 1 #else - #define CPU_CM3_STM32F103R8 0 + #define CPU_CM3_STM32F103RB 0 #endif #if defined (CPU_CM3_LM3S) @@ -205,7 +205,7 @@ #endif #define CPU_CM3_STM32 0 #elif defined (CPU_CM3_STM32) - #if CPU_CM3_STM32F103R8 + 0 != 1 + #if CPU_CM3_STM32F103RB + 0 != 1 #error STM32 Cortex-M3 CPU configuration error #endif #define CPU_CM3_LM3S 0 @@ -231,7 +231,7 @@ #define CPU_CM3_STM32 0 - #define CPU_CM3_STM32F103R8 0 + #define CPU_CM3_STM32F103RB 0 #endif #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \