From: batt Date: Wed, 17 Oct 2007 15:55:18 +0000 (+0000) Subject: Add debug and openocd scripts for rom/ram operations;remove old scripts. X-Git-Tag: 1.0.0~355 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=c851349ccff893a4483031832fe9aba7e926d581;p=bertos.git Add debug and openocd scripts for rom/ram operations;remove old scripts. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@886 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/cpu/arm/scripts/at91sam7s256_ram.ld b/cpu/arm/scripts/at91sam7s256_ram.ld new file mode 100644 index 00000000..7700e99f --- /dev/null +++ b/cpu/arm/scripts/at91sam7s256_ram.ld @@ -0,0 +1,185 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91 SAM7S256 processors. + * + */ + +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91 SAM7S256 processors. + * + */ + + +ENTRY(_init) +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for AT91SAM7S + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 256k + ram(rwx) : org = 0x00200000, len = 64k +} + + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0100; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x0400; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + * (.vectors); + . = ALIGN (4); + * (.init); + . = ALIGN (4); + * (.rodata); + . = ALIGN (4); + * (.rodata*); + . = ALIGN (4); + * (.text); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > ram + + _etext = .; + PROVIDE (__etext = .); + + .data : AT (__etext) + { + PROVIDE (__data_start = .); + * (.data) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss) + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + +/* + * Allocate stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); + +} diff --git a/cpu/arm/scripts/at91sam7s256_rom.ld b/cpu/arm/scripts/at91sam7s256_rom.ld new file mode 100644 index 00000000..26540d07 --- /dev/null +++ b/cpu/arm/scripts/at91sam7s256_rom.ld @@ -0,0 +1,185 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91 SAM7S256 processors. + * + */ + +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91 SAM7S256 processors. + * + */ + + +ENTRY(_init) +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for AT91SAM7S + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 256k + ram(rwx) : org = 0x00200000, len = 64k +} + + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0100; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x0400; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + * (.vectors); + . = ALIGN (4); + * (.init); + . = ALIGN (4); + * (.rodata); + . = ALIGN (4); + * (.rodata*); + . = ALIGN (4); + * (.text); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > rom + + _etext = .; + PROVIDE (__etext = .); + + .data : AT (__etext) + { + PROVIDE (__data_start = .); + * (.data) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss) + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + +/* + * Allocate stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); + +} diff --git a/cpu/arm/scripts/at91sam7s_ram.gdb b/cpu/arm/scripts/at91sam7s_ram.gdb new file mode 100644 index 00000000..a5006bd9 --- /dev/null +++ b/cpu/arm/scripts/at91sam7s_ram.gdb @@ -0,0 +1,36 @@ +target remote localhost:3333 +monitor reset +monitor sleep 500 +monitor poll +monitor soft_reset_halt +monitor arm7_9 sw_bkpts enable +#monitor arm7_9 force_hw_bkpts enable +# WDT_MR, disable watchdog +monitor mww 0xFFFFFD44 0x00008000 + +# RSTC_MR, enable user reset +monitor mww 0xfffffd08 0xa5000001 + +# CKGR_MOR +monitor mww 0xFFFFFC20 0x00000601 +monitor sleep 10 + +# CKGR_PLLR +monitor mww 0xFFFFFC2C 0x00481c0e +monitor sleep 10 + +# PMC_MCKR +monitor mww 0xFFFFFC30 0x00000007 +monitor sleep 10 + +# PMC_IER +monitor mww 0xFFFFFF60 0x00480100 +monitor sleep 100 + +#Remap RAM to address 0 +monitor mww 0xFFFFFF00 0x00000001 +monitor sleep 100 + +break main +load +continue diff --git a/cpu/arm/scripts/at91sam7s_rom.gdb b/cpu/arm/scripts/at91sam7s_rom.gdb new file mode 100644 index 00000000..dcecec96 --- /dev/null +++ b/cpu/arm/scripts/at91sam7s_rom.gdb @@ -0,0 +1,36 @@ +target remote localhost:3333 +monitor reset +monitor sleep 500 +monitor poll +monitor soft_reset_halt +#monitor arm7_9 sw_bkpts enable +monitor arm7_9 force_hw_bkpts enable +# WDT_MR, disable watchdog +monitor mww 0xFFFFFD44 0x00008000 + +# RSTC_MR, enable user reset +monitor mww 0xfffffd08 0xa5000001 + +# CKGR_MOR +monitor mww 0xFFFFFC20 0x00000601 +monitor sleep 10 + +# CKGR_PLLR +monitor mww 0xFFFFFC2C 0x00481c0e +monitor sleep 10 + +# PMC_MCKR +monitor mww 0xFFFFFC30 0x00000007 +monitor sleep 10 + +# PMC_IER +monitor mww 0xFFFFFF60 0x00480100 +monitor sleep 100 + +#Remap RAM to address 0 +#monitor mww 0xFFFFFF00 0x00000001 +#monitor sleep 100 + +break main +load +continue diff --git a/cpu/arm/scripts/eclipse_ram.gdb b/cpu/arm/scripts/eclipse_ram.gdb deleted file mode 100644 index acc71ce4..00000000 --- a/cpu/arm/scripts/eclipse_ram.gdb +++ /dev/null @@ -1,36 +0,0 @@ -target remote localhost:3333 -monitor reset -monitor sleep 500 -monitor poll -monitor soft_reset_halt -monitor arm7_9 sw_bkpts enable - -# WDT_MR, disable watchdog -monitor mww 0xFFFFFD44 0x00008000 - -# RSTC_MR, enable user reset -monitor mww 0xfffffd08 0xa5000001 - -# CKGR_MOR -monitor mww 0xFFFFFC20 0x00000601 -monitor sleep 10 - -# CKGR_PLLR -monitor mww 0xFFFFFC2C 0x00481c0e -monitor sleep 10 - -# PMC_MCKR -monitor mww 0xFFFFFC30 0x00000007 -monitor sleep 10 - -# PMC_IER -monitor mww 0xFFFFFF60 0x00480100 -monitor sleep 100 - -#Remap RAM to address 0 -monitor mww 0xFFFFFF00 0x00000001 -monitor sleep 100 - -break main -load -continue diff --git a/cpu/arm/scripts/openocd_at91sam7s_flash.script b/cpu/arm/scripts/openocd_at91sam7s_flash.script new file mode 100644 index 00000000..ccafad04 --- /dev/null +++ b/cpu/arm/scripts/openocd_at91sam7s_flash.script @@ -0,0 +1,38 @@ +# +# The following command wills be executed on +# reset (because of run_and_init in the config-file) +# - halt target +# - init ecr +# - flash content of file main.bin into target-memory +# - shutdown openocd +# +# created by Martin Thomas +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects +# based on information from Dominic Rath +# + +halt +sleep 10 + +# Init - taken form the script openocd_at91sam7_ecr.script +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +# arm7_9 force_hw_bkpts enable # program resides in flash + +# AT91SAM7 flash command-"batch" +# adapted by Martin Thomas based on information from Dominic Rath - Thanks +arm7_9 dcc_downloads enable +sleep 10 +poll +flash probe 0 +flash write 0 ../../../images/at91sam7s.bin 0x0 +reset run +sleep 10 +#shutdown diff --git a/cpu/arm/scripts/openocd_at91sam7s_ftdi_ram.cfg b/cpu/arm/scripts/openocd_at91sam7s_ftdi_ram.cfg new file mode 100644 index 00000000..c8de9d74 --- /dev/null +++ b/cpu/arm/scripts/openocd_at91sam7s_ftdi_ram.cfg @@ -0,0 +1,52 @@ +# +# Flash AT91SAM7S memory using openocd +# and a FTDI FT2232-based JTAG-interface +# +# created by Martin Thomas +# based on information from Dominic Rath +# + +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Amontec JTAGkey" +ft2232_layout jtagkey +ft2232_vid_pid 0x0403 0xcff8 +jtag_speed 0 +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +daemon_startup reset + +#target +#target arm7tdmi +target arm7tdmi little run_and_init 0 arm7tdmi +run_and_halt_time 0 30 + +# flash-options AT91 +target_script 0 reset openocd_at91sam7s_reset.script +working_area 0 0x00200000 0x10000 nobackup +flash bank at91sam7 0 0 0 0 0 + +# Information: +# erase command (telnet-interface) for complete flash: +# flash erase 0 numlockbits-1 (can be seen from output of flash info 0) +# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15 +# set/clear NVM-Bits: +# at91sam7 gpnvm +# disable locking from SAM-BA +# flash protect 0 0 1 off + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/cpu/arm/scripts/openocd_at91sam7s_ftdi_rom.cfg b/cpu/arm/scripts/openocd_at91sam7s_ftdi_rom.cfg new file mode 100644 index 00000000..ed63988d --- /dev/null +++ b/cpu/arm/scripts/openocd_at91sam7s_ftdi_rom.cfg @@ -0,0 +1,52 @@ +# +# Flash AT91SAM7S memory using openocd +# and a FTDI FT2232-based JTAG-interface +# +# created by Martin Thomas +# based on information from Dominic Rath +# + +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +#interface +interface ft2232 +ft2232_device_desc "Amontec JTAGkey" +ft2232_layout jtagkey +ft2232_vid_pid 0x0403 0xcff8 +jtag_speed 0 +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +#target configuration +daemon_startup reset + +#target +#target arm7tdmi +target arm7tdmi little run_and_init 0 arm7tdmi +run_and_halt_time 0 30 + +# flash-options AT91 +target_script 0 reset openocd_at91sam7s_flash.script +working_area 0 0x00100000 0x40000 nobackup +flash bank at91sam7 0 0 0 0 0 + +# Information: +# erase command (telnet-interface) for complete flash: +# flash erase 0 numlockbits-1 (can be seen from output of flash info 0) +# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15 +# set/clear NVM-Bits: +# at91sam7 gpnvm +# disable locking from SAM-BA +# flash protect 0 0 1 off + +# For more information about the configuration files, take a look at: +# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/cpu/arm/scripts/openocd_at91sam7s_reset.script b/cpu/arm/scripts/openocd_at91sam7s_reset.script new file mode 100644 index 00000000..ff609b01 --- /dev/null +++ b/cpu/arm/scripts/openocd_at91sam7s_reset.script @@ -0,0 +1,17 @@ +# +# Init - taken form the script openocd_at91sam7_ecr.script +# +# I take this script from the following page: +# +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html +# +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +sleep 100 diff --git a/cpu/arm/scripts/sam7s256_ram.ld b/cpu/arm/scripts/sam7s256_ram.ld deleted file mode 100644 index 4605aa50..00000000 --- a/cpu/arm/scripts/sam7s256_ram.ld +++ /dev/null @@ -1,132 +0,0 @@ -/**************************************************************************** -* Copyright (c) 2006 by Michael Fischer. All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* -* 1. Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* 2. Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in the -* documentation and/or other materials provided with the distribution. -* 3. Neither the name of the author nor the names of its contributors may -* be used to endorse or promote products derived from this software -* without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF -* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -* SUCH DAMAGE. -* -**************************************************************************** -* -* History: -* -* 30.03.06 mifi First Version -****************************************************************************/ - - -ENTRY(ResetHandler) -SEARCH_DIR(.) - -/* - * Define stack size here - */ -FIQ_STACK_SIZE = 0x0100; -IRQ_STACK_SIZE = 0x0100; -ABT_STACK_SIZE = 0x0100; -UND_STACK_SIZE = 0x0100; -SVC_STACK_SIZE = 0x0400; - - -MEMORY -{ - ram : org = 0x00000000, len = 64k -} - -/* - * Do not change the next code - */ -SECTIONS -{ - .text : - { - *(.vectors); - . = ALIGN(4); - *(.init); - . = ALIGN(4); - *(.text); - . = ALIGN(4); - *(.rodata); - . = ALIGN(4); - *(.rodata*); - . = ALIGN(4); - *(.glue_7t); - . = ALIGN(4); - *(.glue_7); - . = ALIGN(4); - etext = .; - } > ram - - .data : - { - PROVIDE (__data_start = .); - *(.data) - . = ALIGN(4); - edata = .; - _edata = .; - PROVIDE (__data_end = .); - } > ram - - .bss : - { - PROVIDE (__bss_start = .); - *(.bss) - *(COMMON) - . = ALIGN(4); - PROVIDE (__bss_end = .); - - . = ALIGN(256); - - PROVIDE (__stack_start = .); - - PROVIDE (__stack_fiq_start = .); - . += FIQ_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_fiq_end = .); - - PROVIDE (__stack_irq_start = .); - . += IRQ_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_irq_end = .); - - PROVIDE (__stack_abt_start = .); - . += ABT_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_abt_end = .); - - PROVIDE (__stack_und_start = .); - . += UND_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_und_end = .); - - PROVIDE (__stack_svc_start = .); - . += SVC_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_svc_end = .); - PROVIDE (__stack_end = .); - PROVIDE (__heap_start = .); - } > ram - -} -/*** EOF ***/ - diff --git a/cpu/arm/scripts/sam7s256_rom.ld b/cpu/arm/scripts/sam7s256_rom.ld deleted file mode 100644 index 26540d07..00000000 --- a/cpu/arm/scripts/sam7s256_rom.ld +++ /dev/null @@ -1,185 +0,0 @@ -/** - * \file - * - * - * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ - * - * \author Daniele Basile - * - * \brief Script linker for Atmel AT91 SAM7S256 processors. - * - */ - -/** - * \file - * - * - * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ - * - * \author Daniele Basile - * - * \brief Script linker for Atmel AT91 SAM7S256 processors. - * - */ - - -ENTRY(_init) -SEARCH_DIR(.) -OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -OUTPUT_ARCH(arm) - -/* - * Define memory configuration for AT91SAM7S - */ -MEMORY -{ - rom(rx) : org = 0x00100000, len = 256k - ram(rwx) : org = 0x00200000, len = 64k -} - - -/* - * Define stack size here - */ -FIQ_STACK_SIZE = 0x0100; -IRQ_STACK_SIZE = 0x0100; -ABT_STACK_SIZE = 0x0100; -UND_STACK_SIZE = 0x0100; -SVC_STACK_SIZE = 0x0400; - -/* - * Allocate section memory - */ -SECTIONS -{ - .text : - { - * (.vectors); - . = ALIGN (4); - * (.init); - . = ALIGN (4); - * (.rodata); - . = ALIGN (4); - * (.rodata*); - . = ALIGN (4); - * (.text); - . = ALIGN (4); - *(.glue_7t); - . = ALIGN(4); - *(.glue_7); - . = ALIGN(4); - } > rom - - _etext = .; - PROVIDE (__etext = .); - - .data : AT (__etext) - { - PROVIDE (__data_start = .); - * (.data) - . = ALIGN (4); - _edata = .; - PROVIDE (__data_end = .); - } > ram - - .bss : - { - PROVIDE (__bss_start = .); - *(.bss) - *(COMMON) - . = ALIGN(4); - PROVIDE (__bss_end = .); - } > ram - -/* - * Allocate stack at the end of bss section. - * Data heap is allocate at end of stack. - */ - PROVIDE (__stack_start = .); - - PROVIDE (__stack_fiq_start = .); - . += FIQ_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_fiq_end = .); - - PROVIDE (__stack_irq_start = .); - . += IRQ_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_irq_end = .); - - PROVIDE (__stack_abt_start = .); - . += ABT_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_abt_end = .); - - PROVIDE (__stack_und_start = .); - . += UND_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_und_end = .); - - PROVIDE (__stack_svc_start = .); - . += SVC_STACK_SIZE; - . = ALIGN(4); - PROVIDE (__stack_svc_end = .); - - PROVIDE (__stack_end = .); - - PROVIDE (__heap_start = .); - -}