From: lottaviano Date: Sat, 9 Apr 2011 13:42:16 +0000 (+0000) Subject: Add debug support for AVR XMega MCU. X-Git-Tag: 2.7.0~122 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=ce55bd008dd57b9e9caddd9e3de0b79a975adee5;p=bertos.git Add debug support for AVR XMega MCU. Signed-off-by: Onno git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4844 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cpu/avr/drv/kdebug_avr.c b/bertos/cpu/avr/drv/kdebug_avr.c index e5718c90..88a7b975 100644 --- a/bertos/cpu/avr/drv/kdebug_avr.c +++ b/bertos/cpu/avr/drv/kdebug_avr.c @@ -26,359 +26,22 @@ * invalidate any other reasons why the executable file might be covered by * the GNU General Public License. * - * Copyright 2003, 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/) - * Copyright 2000, 2001, 2002 Bernie Innocenti + * Copyright 2011 Develer S.r.l. (http://www.develer.com/) * * --> * - * \brief AVR debug support (implementation). * - * \author Bernie Innocenti - * \author Stefano Fedrigo - * \author Francesco Sacchi - */ - -#include /* for CPU_FREQ */ -#include "hw/hw_ser.h" /* Required for bus macros overrides */ - -#include "cfg/cfg_debug.h" -#include /* for BV(), DIV_ROUND */ - -#include -#include - -#include - -#if CONFIG_KDEBUG_PORT == 0 - - /* - * Support for special bus policies or external transceivers - * on UART0 (to be overridden in "hw/hw_ser.h"). - * - * HACK: if we don't set TXEN, kdbg disables the transmitter - * after each output statement until the serial driver - * is initialized. These glitches confuse the debug - * terminal that ends up printing some trash. - */ - #ifndef KDBG_UART0_BUS_INIT - #define KDBG_UART0_BUS_INIT do { \ - UCR = BV(TXEN0); \ - } while (0) - #endif - #ifndef KDBG_UART0_BUS_RX - #define KDBG_UART0_BUS_RX do {} while (0) - #endif - #ifndef KDBG_UART0_BUS_TX - #define KDBG_UART0_BUS_TX do {} while (0) - #endif - - #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \ - || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 - #define UCR UCSR0B - #define UDR UDR0 - #define USR UCSR0A - #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 - #define UCR UCSRB - #define USR UCSRA - #define TXEN0 TXEN - #define UDRE0 UDRE - #define TXC0 TXC - #define TXCIE0 TXCIE - #define UDRIE0 UDRIE - #else - #error Unknown CPU - #endif - - #define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0) - #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0) - - /* - * We must clear the TXC flag before sending a new character to allow - * KDBG_WAIT_TXDONE() to work properly. - * - * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware, - * a new TXC could be generated after we've cleared it and before the new - * character is written to UDR. On a 485 bus, the transceiver will be put - * in RX mode while still transmitting the last char. - */ - #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0) - - #define KDBG_MASK_IRQ(old) do { \ - (old) = UCR; \ - UCR |= BV(TXEN0); \ - UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \ - KDBG_UART0_BUS_TX; \ - } while(0) - - #define KDBG_RESTORE_IRQ(old) do { \ - KDBG_WAIT_TXDONE(); \ - KDBG_UART0_BUS_RX; \ - UCR = (old); \ - } while(0) - - typedef uint8_t kdbg_irqsave_t; - -#elif CONFIG_KDEBUG_PORT == 1 - - /* - * Support for special bus policies or external transceivers - * on UART1 (to be overridden in "hw/hw_ser.h"). - * - * HACK: if we don't set TXEN, kdbg disables the transmitter - * after each output statement until the serial driver - * is initialized. These glitches confuse the debug - * terminal that ends up printing some trash. - */ - #ifndef KDBG_UART1_BUS_INIT - #define KDBG_UART1_BUS_INIT do { \ - UCSR1B = BV(TXEN1); \ - } while (0) - #endif - #ifndef KDBG_UART1_BUS_RX - #define KDBG_UART1_BUS_RX do {} while (0) - #endif - #ifndef KDBG_UART1_BUS_TX - #define KDBG_UART1_BUS_TX do {} while (0) - #endif - - #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0) - #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0) - #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0) - - #define KDBG_MASK_IRQ(old) do { \ - (old) = UCSR1B; \ - UCSR1B |= BV(TXEN1); \ - UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \ - KDBG_UART1_BUS_TX; \ - } while(0) - - #define KDBG_RESTORE_IRQ(old) do { \ - KDBG_WAIT_TXDONE(); \ - KDBG_UART1_BUS_RX; \ - UCSR1B = (old); \ - } while(0) - - typedef uint8_t kdbg_irqsave_t; - -#elif CONFIG_KDEBUG_PORT == 2 - - /* - * Support for special bus policies or external transceivers - * on UART2 (to be overridden in "hw/hw_ser.h"). - * - * HACK: if we don't set TXEN, kdbg disables the transmitter - * after each output statement until the serial driver - * is initialized. These glitches confuse the debug - * terminal that ends up printing some trash. - */ - #ifndef KDBG_UART2_BUS_INIT - #define KDBG_UART2_BUS_INIT do { \ - UCSR2B = BV(TXEN2); \ - } while (0) - #endif - #ifndef KDBG_UART2_BUS_RX - #define KDBG_UART2_BUS_RX do {} while (0) - #endif - #ifndef KDBG_UART2_BUS_TX - #define KDBG_UART2_BUS_TX do {} while (0) - #endif - - #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR2A, UDRE2); } while(0) - #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR2A, TXC2); } while(0) - #define KDBG_WRITE_CHAR(c) do { UCSR2A |= BV(TXC2); UDR2 = (c); } while(0) - - #define KDBG_MASK_IRQ(old) do { \ - (old) = UCSR2B; \ - UCSR2B |= BV(TXEN2); \ - UCSR2B &= ~(BV(TXCIE2) | BV(UDRIE2)); \ - KDBG_UART2_BUS_TX; \ - } while(0) - - #define KDBG_RESTORE_IRQ(old) do { \ - KDBG_WAIT_TXDONE(); \ - KDBG_UART2_BUS_RX; \ - UCSR2B = (old); \ - } while(0) - - typedef uint8_t kdbg_irqsave_t; - -#elif CONFIG_KDEBUG_PORT == 3 - - /* - * Support for special bus policies or external transceivers - * on UART3 (to be overridden in "hw/hw_ser.h"). - * - * HACK: if we don't set TXEN, kdbg disables the transmitter - * after each output statement until the serial driver - * is initialized. These glitches confuse the debug - * terminal that ends up printing some trash. - */ - #ifndef KDBG_UART3_BUS_INIT - #define KDBG_UART3_BUS_INIT do { \ - UCSR3B = BV(TXEN3); \ - } while (0) - #endif - #ifndef KDBG_UART3_BUS_RX - #define KDBG_UART3_BUS_RX do {} while (0) - #endif - #ifndef KDBG_UART3_BUS_TX - #define KDBG_UART3_BUS_TX do {} while (0) - #endif - - #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR3A, UDRE3); } while(0) - #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR3A, TXC3); } while(0) - #define KDBG_WRITE_CHAR(c) do { UCSR3A |= BV(TXC3); UDR3 = (c); } while(0) - - #define KDBG_MASK_IRQ(old) do { \ - (old) = UCSR3B; \ - UCSR3B |= BV(TXEN3); \ - UCSR3B &= ~(BV(TXCIE3) | BV(UDRIE3)); \ - KDBG_UART3_BUS_TX; \ - } while(0) - - #define KDBG_RESTORE_IRQ(old) do { \ - KDBG_WAIT_TXDONE(); \ - KDBG_UART3_BUS_RX; \ - UCSR3B = (old); \ - } while(0) - - typedef uint8_t kdbg_irqsave_t; - - -/* - * Special debug port for BitBanged Serial see below for details... + * \author Luca Ottaviano + * + * \brief Low-level kdebug module for AVR (inplementation). */ -#elif CONFIG_KDEBUG_PORT == 666 - #include "hw/hw_ser.h" - #define KDBG_WAIT_READY() do { /*nop*/ } while(0) - #define KDBG_WRITE_CHAR(c) _kdebug_bitbang_putchar((c)) - #define KDBG_MASK_IRQ(old) do { IRQ_SAVE_DISABLE((old)); } while(0) - #define KDBG_RESTORE_IRQ(old) do { IRQ_RESTORE((old)); } while(0) - typedef cpu_flags_t kdbg_irqsave_t; - - #define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14 - static void _kdebug_bitbang_delay(void) - { - unsigned long i; +#include - for (i = 0; i < KDBG_DELAY; i++) - { - NOP; - NOP; - NOP; - NOP; - NOP; - } - } - - /** - * Putchar for BITBANG serial debug console. - * Sometimes, we can't permit to use a whole serial for debugging purpose. - * Since debug console is in output only it is useful to use a single generic I/O pin for debug. - * This is achieved by this simple function, that shift out the data like a UART, but - * in software :) - * The only requirement is that SER_BITBANG_* macros will be defined somewhere (usually hw_ser.h) - * \note All interrupts are disabled during debug prints! - */ - static void _kdebug_bitbang_putchar(char c) - { - int i; - uint16_t data = c; - - /* Add stop bit */ - data |= 0x0100; - - /* Add start bit*/ - data <<= 1; - - /* Shift out data */ - uint16_t shift = 1; - for (i = 0; i < 10; i++) - { - if (data & shift) - SER_BITBANG_HIGH; - else - SER_BITBANG_LOW; - _kdebug_bitbang_delay(); - shift <<= 1; - } - } +#if CPU_AVR_MEGA + #include "kdebug_mega.c" +#elif CPU_AVR_XMEGA + #include "kdebug_xmega.c" #else - #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 666 + #error Unknown CPU #endif - - -INLINE void kdbg_hw_init(void) -{ - #if CONFIG_KDEBUG_PORT == 666 - SER_BITBANG_INIT; - #else /* CONFIG_KDEBUG_PORT != 666 */ - /* Compute the baud rate */ - uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1; - - #if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281) - #if CONFIG_KDEBUG_PORT == 0 - UBRR0H = (uint8_t)(period>>8); - UBRR0L = (uint8_t)period; - KDBG_UART0_BUS_INIT; - #elif CONFIG_KDEBUG_PORT == 1 - UBRR1H = (uint8_t)(period>>8); - UBRR1L = (uint8_t)period; - KDBG_UART1_BUS_INIT; - #else - #error CONFIG_KDEBUG_PORT must be either 0 or 1 - #endif - - #elif CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 - #if CONFIG_KDEBUG_PORT == 0 - UBRR0H = (uint8_t)(period>>8); - UBRR0L = (uint8_t)period; - KDBG_UART0_BUS_INIT; - #elif CONFIG_KDEBUG_PORT == 1 - UBRR1H = (uint8_t)(period>>8); - UBRR1L = (uint8_t)period; - KDBG_UART1_BUS_INIT; - #elif CONFIG_KDEBUG_PORT == 2 - UBRR2H = (uint8_t)(period>>8); - UBRR2L = (uint8_t)period; - KDBG_UART2_BUS_INIT; - #elif CONFIG_KDEBUG_PORT == 3 - UBRR3H = (uint8_t)(period>>8); - UBRR3L = (uint8_t)period; - KDBG_UART3_BUS_INIT; - #else - #error CONFIG_KDEBUG_PORT must be either 0 or 1 or 2 or 3 - #endif - - #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P - #if CONFIG_KDEBUG_PORT == 0 - UBRR0H = (uint8_t)(period>>8); - UBRR0L = (uint8_t)period; - UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */ - KDBG_UART0_BUS_INIT; - #else - #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu - #endif - - #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 - #if CONFIG_KDEBUG_PORT == 0 - UBRRH = (uint8_t)(period>>8); - UBRRL = (uint8_t)period; - KDBG_UART0_BUS_INIT; - #else - #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu - #endif - #elif CPU_AVR_ATMEGA103 - #if CONFIG_KDEBUG_PORT == 0 - UBRR = (uint8_t)period; - KDBG_UART0_BUS_INIT; - #else - #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu - #endif - #else - #error Unknown CPU - #endif - #endif /* CONFIG_KDEBUG_PORT == 666 */ -} - diff --git a/bertos/cpu/avr/drv/kdebug_mega.c b/bertos/cpu/avr/drv/kdebug_mega.c new file mode 100644 index 00000000..e5718c90 --- /dev/null +++ b/bertos/cpu/avr/drv/kdebug_mega.c @@ -0,0 +1,384 @@ +/** + * \file + * + * + * \brief AVR debug support (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include +#include + +#include + +#if CONFIG_KDEBUG_PORT == 0 + + /* + * Support for special bus policies or external transceivers + * on UART0 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART0_BUS_INIT + #define KDBG_UART0_BUS_INIT do { \ + UCR = BV(TXEN0); \ + } while (0) + #endif + #ifndef KDBG_UART0_BUS_RX + #define KDBG_UART0_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_TX + #define KDBG_UART0_BUS_TX do {} while (0) + #endif + + #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \ + || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 + #define UCR UCSR0B + #define UDR UDR0 + #define USR UCSR0A + #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #define UCR UCSRB + #define USR UCSRA + #define TXEN0 TXEN + #define UDRE0 UDRE + #define TXC0 TXC + #define TXCIE0 TXCIE + #define UDRIE0 UDRIE + #else + #error Unknown CPU + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0) + + /* + * We must clear the TXC flag before sending a new character to allow + * KDBG_WAIT_TXDONE() to work properly. + * + * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware, + * a new TXC could be generated after we've cleared it and before the new + * character is written to UDR. On a 485 bus, the transceiver will be put + * in RX mode while still transmitting the last char. + */ + #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCR; \ + UCR |= BV(TXEN0); \ + UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \ + KDBG_UART0_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART0_BUS_RX; \ + UCR = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 1 + + /* + * Support for special bus policies or external transceivers + * on UART1 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART1_BUS_INIT + #define KDBG_UART1_BUS_INIT do { \ + UCSR1B = BV(TXEN1); \ + } while (0) + #endif + #ifndef KDBG_UART1_BUS_RX + #define KDBG_UART1_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART1_BUS_TX + #define KDBG_UART1_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR1B; \ + UCSR1B |= BV(TXEN1); \ + UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \ + KDBG_UART1_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART1_BUS_RX; \ + UCSR1B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 2 + + /* + * Support for special bus policies or external transceivers + * on UART2 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART2_BUS_INIT + #define KDBG_UART2_BUS_INIT do { \ + UCSR2B = BV(TXEN2); \ + } while (0) + #endif + #ifndef KDBG_UART2_BUS_RX + #define KDBG_UART2_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART2_BUS_TX + #define KDBG_UART2_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR2A, UDRE2); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR2A, TXC2); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR2A |= BV(TXC2); UDR2 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR2B; \ + UCSR2B |= BV(TXEN2); \ + UCSR2B &= ~(BV(TXCIE2) | BV(UDRIE2)); \ + KDBG_UART2_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART2_BUS_RX; \ + UCSR2B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 3 + + /* + * Support for special bus policies or external transceivers + * on UART3 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART3_BUS_INIT + #define KDBG_UART3_BUS_INIT do { \ + UCSR3B = BV(TXEN3); \ + } while (0) + #endif + #ifndef KDBG_UART3_BUS_RX + #define KDBG_UART3_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART3_BUS_TX + #define KDBG_UART3_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR3A, UDRE3); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR3A, TXC3); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR3A |= BV(TXC3); UDR3 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR3B; \ + UCSR3B |= BV(TXEN3); \ + UCSR3B &= ~(BV(TXCIE3) | BV(UDRIE3)); \ + KDBG_UART3_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART3_BUS_RX; \ + UCSR3B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + + +/* + * Special debug port for BitBanged Serial see below for details... + */ +#elif CONFIG_KDEBUG_PORT == 666 + #include "hw/hw_ser.h" + #define KDBG_WAIT_READY() do { /*nop*/ } while(0) + #define KDBG_WRITE_CHAR(c) _kdebug_bitbang_putchar((c)) + #define KDBG_MASK_IRQ(old) do { IRQ_SAVE_DISABLE((old)); } while(0) + #define KDBG_RESTORE_IRQ(old) do { IRQ_RESTORE((old)); } while(0) + typedef cpu_flags_t kdbg_irqsave_t; + + #define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14 + + static void _kdebug_bitbang_delay(void) + { + unsigned long i; + + for (i = 0; i < KDBG_DELAY; i++) + { + NOP; + NOP; + NOP; + NOP; + NOP; + } + } + + /** + * Putchar for BITBANG serial debug console. + * Sometimes, we can't permit to use a whole serial for debugging purpose. + * Since debug console is in output only it is useful to use a single generic I/O pin for debug. + * This is achieved by this simple function, that shift out the data like a UART, but + * in software :) + * The only requirement is that SER_BITBANG_* macros will be defined somewhere (usually hw_ser.h) + * \note All interrupts are disabled during debug prints! + */ + static void _kdebug_bitbang_putchar(char c) + { + int i; + uint16_t data = c; + + /* Add stop bit */ + data |= 0x0100; + + /* Add start bit*/ + data <<= 1; + + /* Shift out data */ + uint16_t shift = 1; + for (i = 0; i < 10; i++) + { + if (data & shift) + SER_BITBANG_HIGH; + else + SER_BITBANG_LOW; + _kdebug_bitbang_delay(); + shift <<= 1; + } + } +#else + #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 666 +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == 666 + SER_BITBANG_INIT; + #else /* CONFIG_KDEBUG_PORT != 666 */ + /* Compute the baud rate */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1; + + #if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281) + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 1 + UBRR1H = (uint8_t)(period>>8); + UBRR1L = (uint8_t)period; + KDBG_UART1_BUS_INIT; + #else + #error CONFIG_KDEBUG_PORT must be either 0 or 1 + #endif + + #elif CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 1 + UBRR1H = (uint8_t)(period>>8); + UBRR1L = (uint8_t)period; + KDBG_UART1_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 2 + UBRR2H = (uint8_t)(period>>8); + UBRR2L = (uint8_t)period; + KDBG_UART2_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 3 + UBRR3H = (uint8_t)(period>>8); + UBRR3L = (uint8_t)period; + KDBG_UART3_BUS_INIT; + #else + #error CONFIG_KDEBUG_PORT must be either 0 or 1 or 2 or 3 + #endif + + #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */ + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + + #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #if CONFIG_KDEBUG_PORT == 0 + UBRRH = (uint8_t)(period>>8); + UBRRL = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + #elif CPU_AVR_ATMEGA103 + #if CONFIG_KDEBUG_PORT == 0 + UBRR = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + #else + #error Unknown CPU + #endif + #endif /* CONFIG_KDEBUG_PORT == 666 */ +} + diff --git a/bertos/cpu/avr/drv/kdebug_xmega.c b/bertos/cpu/avr/drv/kdebug_xmega.c new file mode 100644 index 00000000..8f9cf87f --- /dev/null +++ b/bertos/cpu/avr/drv/kdebug_xmega.c @@ -0,0 +1,211 @@ +/** + * \file + * + * + * \brief AVR XMega debug support (implementation). + * + * This file is heavily inspired by the AVR implementation for BeRTOS, + * but uses a different approach for implementing the different debug + * ports, by using the USART_t structs. + * + * \author Onno + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" /* for debugging configuration settings */ +#include /* for BV(), DIV_ROUND */ + +#include +#include + +#include + +/* Set KDBG_USART, KDBG_USART_PORT and KDBG_USART_TX_PIN_bm + * according to the CONFIG_KDEBUG_PORT setting + * The Xmega A and D families support at least 2 UARTS + */ +#if CONFIG_KDEBUG_PORT == 0 + #define KDBG_USART USARTC0 + #define KDBG_USART_PORT PORTC + #define KDBG_USART_TX_PIN_bm PIN3_bm +#elif CONFIG_KDEBUG_PORT == 1 + #define KDBG_USART USARTD0 + #define KDBG_USART_PORT PORTD + #define KDBG_USART_TX_PIN_bm PIN3_bm +#endif +/* Allow the configuration of the extra 3 UARTS for the + * Xmega A family + */ +#ifdef CPU_AVR_XMEGA_A + #if CONFIG_KDEBUG_PORT == 2 + #define KDBG_USART USARTC1 + #define KDBG_USART_PORT PORTC + #define KDBG_USART_TX_PIN_bm PIN7_bm + #elif CONFIG_KDEBUG_PORT == 3 + #define KDBG_USART USARTD1 + #define KDBG_USART_PORT PORTD + #define KDBG_USART_TX_PIN_bm PIN7_bm + #elif CONFIG_KDEBUG_PORT == 4 + #define KDBG_USART USARTE0 + #define KDBG_USART_PORT PORTE + #define KDBG_USART_TX_PIN_bm PIN3_bm + #endif +#endif +/* Check if all required KDBG_ macros are defined + */ +#ifndef KDBG_USART + #if CPU_AVR_XMEGA_D + #error CONFIG_KDEBUG_PORT should be either 0 or 1 + #elif CPU_AVR_XMEGA_A + #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 4 + #endif +#endif + +/* + * Scalefactor to use for computing the baudrate + * this scalefactor should be an integer value between -7 + * and 7 + */ +#ifndef KDBG_USART_SCALE_FACTOR + #define KDBG_USART_SCALE_FACTOR (-7) +#else + #if KDBG_USART_SCALE_FACTOR > 7 || KDBG_USART_SCALE_FACTOR < -7 + #error KDBG_USART_SCALE_FACTOR should be an integer between -7 and 7 + #endif +#endif + +/* + * \name KDBG macros + * + * Used to set or alter the KDB_USART operation, + * enable the usart or send a byte. + * Some of these methods are called/included from kdbg_hw_init() + * others are called/included from the cpu independ kdebug implementation + * These macros are heavily imspired by the examples provided by atmel + * + * \{ + */ +#define KDBG_SET_FORMAT(_charSize, _parityMode, _twoStopBits) \ + (KDBG_USART).CTRLC = (uint8_t) _charSize | _parityMode | \ + (_twoStopBits ? USART_SBMODE_bm : 0) + +#define KDBG_SET_BAUDRATE(_bselValue, _bScaleFactor) \ + (KDBG_USART).BAUDCTRLA =(uint8_t)_bselValue; \ + (KDBG_USART).BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8) + +#define KDBG_TX_ENABLE() ((KDBG_USART).CTRLB |= USART_TXEN_bm) + +#define KDBG_SET_MODE(_usartMode) \ + ((KDBG_USART).CTRLC = ((KDBG_USART).CTRLC & (~USART_CMODE_gm)) | _usartMode) + +#define KDBG_WAIT_READY() do{ loop_until_bit_is_set((KDBG_USART).STATUS, USART_DREIF_bp); } while(0) +#define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set((KDBG_USART).STATUS, USART_TXCIF_bp); } while(0) +#define KDBG_WRITE_CHAR(c) do { (KDBG_USART).DATA = (c); } while(0) + +#define KDBG_SET_TX_INTERRUPTLEVEL(_txdIntLevel) \ + (KDBG_USART).CTRLA = ((KDBG_USART).CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel + +#define KDBG_SET_DRE_INTERRUPTLEVEL(_dreIntLevel) \ + (KDBG_USART).CTRLA = ((KDBG_USART).CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel + +/*\}*/ + +/* + * To restore the USART state, to registers need to be restored + * These registers (CTRLA and CTRLB) can be saved to the + * kdbg_avr_xmaga_irqsave structure + */ +struct kdbg_avr_xmega_irqsave +{ + uint8_t ctrlb; + uint8_t ctrla; +}; +typedef struct kdbg_avr_xmega_irqsave kdbg_irqsave_t; + +/* + * param is the kdbg_irqsave_t structure + * + * * Stores the current state of the USART.CTRLA and + * the USART.CTRLB registers + * * Disables Transmit Complete and Date Register Empty interrupts + * * Enabled the transmitter + */ +#define KDBG_MASK_IRQ(old) do { \ + (old).ctrlb = KDBG_USART.CTRLB; \ + (old).ctrla = KDBG_USART.CTRLA; \ + KDBG_SET_TX_INTERRUPTLEVEL(USART_TXCINTLVL_OFF_gc); \ + KDBG_SET_DRE_INTERRUPTLEVEL(USART_DREINTLVL_OFF_gc); \ + KDBG_TX_ENABLE(); \ +} while(0) + +/* + * param is the kdbg_irqsave_t structure + * + * * waits until all data has been transmitted + * * restores the USART.CTRLA and USART.CTRLB registers + */ +#define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_USART.CTRLB = (old).ctrlb; \ + KDBG_USART.CTRLA = (old).ctrla; \ +} while(0) + + +/* + * method included from the cpu independent kdebug.c file. + * it initializes KDBG_USART by: + * * Setting the KDBG_USART_TX_PIN_bm as an outputpin + * * Setting KDBG_USART to use 8 bits, No parity, 1 stopbit + * * Setting the baudrate to 115200 + * * Enabeling the transmitter + */ +INLINE void kdbg_hw_init(void) +{ + //set transmit pin as output + KDBG_USART_PORT.OUT = KDBG_USART_PORT.OUT & ~KDBG_USART_TX_PIN_bm; + KDBG_USART_PORT.DIRSET = KDBG_USART_TX_PIN_bm; + //set 8 bits, no parity, 1 stop bit + KDBG_SET_FORMAT(USART_CHSIZE_8BIT_gc, USART_PMODE_DISABLED_gc, false); + //compute and set the baud rate + /* Compute baud-rate period, this requires a valid USART_SCALE_FACTOR */ + #if KDBG_USART_SCALE_FACTOR < 0 + uint16_t bsel = DIV_ROUND((1 << (-(KDBG_USART_SCALE_FACTOR))) * (CPU_FREQ - (16 * CONFIG_KDEBUG_BAUDRATE)), 16 * CONFIG_KDEBUG_BAUDRATE); + #else + uint16_t bsel = DIV_ROUND(CPU_FREQ, (1 << (KDBG_USART_SCALE_FACTOR)) * 16 * CONFIG_KDEBUG_BAUDRATE) - 1; + #endif + KDBG_SET_BAUDRATE(bsel, KDBG_USART_SCALE_FACTOR); + //enable the Transmitter + KDBG_TX_ENABLE(); +}