From: asterix Date: Thu, 21 Jul 2011 15:50:07 +0000 (+0000) Subject: Add i2s implementation for the sam3x. X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=df98d42ba242738b92f0e24d244fb300e1bb9f10;p=bertos.git Add i2s implementation for the sam3x. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4978 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cpu/cortex-m3/drv/i2s_cm3.h b/bertos/cpu/cortex-m3/drv/i2s_cm3.h new file mode 100644 index 00000000..db57e996 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2s_cm3.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Low-level I2S module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_SAM3X + #include "i2s_sam3.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/i2s_sam3.c b/bertos/cpu/cortex-m3/drv/i2s_sam3.c index 129c9494..e83c9bc6 100644 --- a/bertos/cpu/cortex-m3/drv/i2s_sam3.c +++ b/bertos/cpu/cortex-m3/drv/i2s_sam3.c @@ -35,11 +35,6 @@ */ -/* - * TODO: Revise the public api of this module to be more generic. Evalutate to - * implement the more generic layer to be common to all I2S BeRTOS drivers. - */ -#include "i2s_sam3.h" #include "cfg/cfg_i2s.h" // Define log settings for cfg/log.h. @@ -48,58 +43,139 @@ #include #include -#include - +#include #include #include +struct I2sHardware +{ +}; +struct I2sHardware i2s_hw; -#define DATALEN (15 & SSC_DATLEN_MASK) -#define BITS_PER_CHANNEL 16 -#define N_OF_CHANNEL 2 -// TODO: check the computed value? -/* The last parameter (2) is due to the hadware on at91sam7s. */ -#define MCK_DIV (CPU_FREQ / (44100 * BITS_PER_CHANNEL * N_OF_CHANNEL* 2)) -#define CONFIG_DELAY 0 -#define CONFIG_PERIOD 15 -#define CONFIG_DATNB 1 -#define CONFIG_FSLEN 15 +/* We divite for 2 because the min clock for i2s i MCLK/2 */ +#define MCK_DIV (CPU_FREQ / (48000 * CONFIG_WORD_BIT_SIZE * CONFIG_CHANNEL_NUM * 2)) +#define DATALEN ((CONFIG_WORD_BIT_SIZE - 1) & SSC_DATLEN_MASK) +#define DELAY ((CONFIG_DELAY << SSC_STTDLY_SHIFT) & SSC_STTDLY_MASK) +#define PERIOD ((CONFIG_PERIOD << (SSC_PERIOD_SHIFT)) & SSC_PERIOD_MASK) +#define DATNB ((CONFIG_WORD_PER_FRAME << SSC_DATNB_SHIFT) & SSC_DATNB_MASK) +#define FSLEN ((CONFIG_FRAME_SYNC_SIZE << SSC_FSLEN_SHIFT) & SSC_FSLEN_MASK) +#define EXTRA_FSLEN (CONFIG_EXTRA_FRAME_SYNC_SIZE << SSC_FSLEN_EXT) -#define DELAY ((CONFIG_DELAY << SSC_STTDLY_SHIFT) & SSC_STTDLY_MASK) -#define PERIOD ((CONFIG_PERIOD << (SSC_PERIOD_SHIFT)) & SSC_PERIOD_MASK) -#define DATNB ((CONFIG_DATNB << SSC_DATNB_SHIFT) & SSC_DATNB_MASK) -#define FSLEN ((CONFIG_FSLEN << SSC_FSLEN_SHIFT) & SSC_FSLEN_MASK) +static void sam3_i2s_txStop(I2s *i2s) +{ + (void)i2s; + SSC_CR = BV(SSC_TXDIS); +} +static void sam3_i2s_txWait(I2s *i2s) +{ + (void)i2s; +} +static void sam3_i2s_txStart(I2s *i2s, void *buf, size_t len, size_t slice_len) +{ + (void)i2s; + (void)buf; + (void)len; + (void)slice_len; +} -void i2s_stop(void) +static void sam3_i2s_rxStop(I2s *i2s) { + (void)i2s; SSC_CR = BV(SSC_TXDIS); } +static void sam3_i2s_rxWait(I2s *i2s) +{ + (void)i2s; +} -bool i2s_start(void) +static void sam3_i2s_rxStart(I2s *i2s, void *buf, size_t len, size_t slice_len) { + (void)i2s; + (void)buf; + (void)len; + (void)slice_len; +} - /* enable output */ - SSC_CR = BV(SSC_TXEN); - return true; +static bool sam3_i2s_isTxFinish(struct I2s *i2s) +{ + (void)i2s; + return false; } +static bool sam3_i2s_isRxFinish(struct I2s *i2s) +{ + (void)i2s; + return false; +} -static DECLARE_ISR(irq_ssc) +static void sam3_i2s_txBuf(struct I2s *i2s, void *buf, size_t len) { + (void)i2s; + (void)buf; + (void)len; } -void i2s_init(void) +static void sam3_i2s_rxBuf(struct I2s *i2s, void *buf, size_t len) { + (void)i2s; + (void)buf; + (void)len; +} + +static int sam3_i2s_write(struct I2s *i2s, uint32_t sample) +{ + (void)i2s; + while(!(SSC_SR & BV(SSC_TXRDY))); + SSC_THR = sample; + return 0; +} + + + +static uint32_t sam3_i2s_read(struct I2s *i2s) +{ + (void)i2s; + while(!(SSC_SR & BV(SSC_RXRDY))); + return SSC_RHR; +} + +/* +static DECLARE_ISR(irq_ssc) +{ +} +*/ +void i2s_init(I2s *i2s, int channel) +{ + (void)channel; + i2s->ctx.write = sam3_i2s_write; + i2s->ctx.tx_buf = sam3_i2s_txBuf; + i2s->ctx.tx_isFinish = sam3_i2s_isTxFinish; + i2s->ctx.tx_start = sam3_i2s_txStart; + i2s->ctx.tx_wait = sam3_i2s_txWait; + i2s->ctx.tx_stop = sam3_i2s_txStop; + + i2s->ctx.read = sam3_i2s_read; + i2s->ctx.rx_buf = sam3_i2s_rxBuf; + i2s->ctx.rx_isFinish = sam3_i2s_isRxFinish; + i2s->ctx.rx_start = sam3_i2s_rxStart; + i2s->ctx.rx_wait = sam3_i2s_rxWait; + i2s->ctx.rx_stop = sam3_i2s_rxStop; + + DB(i2s->ctx._type = I2S_SAM3X;) + i2s->hw = &i2s_hw; + PIOA_PDR = BV(SSC_TK) | BV(SSC_TF) | BV(SSC_TD); PIO_PERIPH_SEL(SSC_PORT, BV(SSC_TK) | BV(SSC_TF) | BV(SSC_TD), PIO_PERIPH_B); + + /* clock the ssc */ pmc_periphEnable(SSC_ID); /* reset device */ @@ -124,5 +200,8 @@ void i2s_init(void) * - MSB * - Frame sync output selection negative */ - SSC_TFMR = DATALEN | DATNB | FSLEN | BV(SSC_MSBF) | SSC_FSOS_POSITIVE; + SSC_TFMR = DATALEN | DATNB | FSLEN | EXTRA_FSLEN | BV(SSC_MSBF) | SSC_FSOS_POSITIVE; + + SSC_IDR = 0xFFFFFFFF; + SSC_CR = BV(SSC_TXEN) | BV(SSC_RXEN); } diff --git a/bertos/cpu/cortex-m3/drv/i2s_sam3.h b/bertos/cpu/cortex-m3/drv/i2s_sam3.h index 62a96259..6df9b3e7 100644 --- a/bertos/cpu/cortex-m3/drv/i2s_sam3.h +++ b/bertos/cpu/cortex-m3/drv/i2s_sam3.h @@ -32,85 +32,22 @@ * * \brief I2S driver functions. * - * This driver uses a double buffering technique to keep i2s bus busy. First fill in the two buffers - * using i2s_getBuffer(), then start audio playing with i2s_start(). Then call i2s_getFreeBuffer() - * until you have finished your samples. The reproduction will automatically stop if you don't - * call i2s_getFreeBuffer() frequently enough. - * - * Example: - * \code - * // fill in the buffers before start - * buf = i2s_getBuffer(I2S_FIRST_BUF); - * // ... - * buf = i2s_getBuffer(I2S_SECOND_BUF); - * // ... - * // here the driver will play only the first two buffers... - * i2s_start(); - * // ...call getFreeBuffer() to continue playing. - * while (!(buf = i2s_getFreeBuffer())) - * ; - * // now fill the buffer again - * \endcode - * * \author Daniele Basile - * - * $WIZ$ module_name = "i2s" - * $WIZ$ module_configuration = "bertos/cfg/cfg_i2s.h" - * $WIZ$ module_supports = "sam3" */ #ifndef DRV_I2S_SAM3_H #define DRV_I2S_SAM3_H - -#include -#include #include -/** - * First buffer. - */ -#define I2S_FIRST_BUF 0 -/** - * Second buffer. - */ -#define I2S_SECOND_BUF 1 - -/** - * Initializes the module and sets current buffer to I2S_FIRST_BUF. - */ -void i2s_init(void); - -/** - * Returns one of the two buffers or NULL if none is available. - * - * You can't call this function if you have already started the player. - * \param buf_num The number of the buffer, ie I2S_FIRST_BUF or I2S_SECOND_BUF. - * \return A pointer to the buffer if the buffer is available (not full), 0 on errors - */ -uint8_t *i2s_getBuffer(unsigned buf_num); +enum +{ + SSC0, -/** - * Returns a buffer that will be played after the current one. - * - * You should fill it faster than your reproduction time. You can't call this function - * if the player is not running - * \return The next buffer to be played, 0 if both are busy. - */ -uint8_t *i2s_getFreeBuffer(void); + SSC_CNT +}; -/** - * Starts playing from I2S_FIRST_BUFFER. - * - * You must have filled both buffers before calling this function. Does nothing if already playing. - * \return false on errors, true otherwise. - */ -bool i2s_start(void); -void i2s_stop(void); -INLINE bool i2s_isPlaying(void) -{ - return !(SSC_SR & BV(SSC_TXEMPTY)); -} +#define I2S_SAM3X MAKE_ID('I', '2', 'S', '3') #endif /* DRV_I2S_SAM3_H */