From: aleph Date: Mon, 20 Sep 2010 16:57:50 +0000 (+0000) Subject: SAM3 port: move some definitions in appropriate places, and add missing includes. X-Git-Tag: 2.6.0~155 X-Git-Url: https://codewiz.org/gitweb?a=commitdiff_plain;h=f9fa848dab17e58e434b63e45bf341a561fa33c7;p=bertos.git SAM3 port: move some definitions in appropriate places, and add missing includes. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4246 38d2e660-2303-0410-9eaa-f027e97ec537 --- diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.h b/bertos/cpu/cortex-m3/drv/irq_cm3.h index b9aee904..93a75f53 100644 --- a/bertos/cpu/cortex-m3/drv/irq_cm3.h +++ b/bertos/cpu/cortex-m3/drv/irq_cm3.h @@ -44,6 +44,8 @@ #include #elif CPU_CM3_STM32 #include +#elif CPU_CM3_AT91SAM3 + #include /*#elif Add other families here */ #else #error Unknown CPU diff --git a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c index 32a099d0..e3472395 100644 --- a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c +++ b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c @@ -38,6 +38,7 @@ #include #include /* for BV() */ +#include #include #include #include @@ -47,16 +48,12 @@ #define UART_BASE UART0_BASE #define UART_INT INT_UART0 #define UART_GPIO_BASE GPIO_PORTA_BASE - #ifdef CPU_CM3_AT91SAM3U - #define UART_PINS (BV(12) | BV(11)) - #else - #define UART_PINS (BV(10) | BV(9)) - #endif + #define UART_PINS (GPIO_UART0_RX_PIN | GPIO_UART0_TX_PIN) #elif (CONFIG_KDEBUG_PORT == 1) && !defined(CPU_CM3_AT91SAM3U) #define UART_BASE UART1_BASE #define UART_INT INT_UART1 #define UART_GPIO_BASE GPIO_PORTB_BASE - #define UART_PINS (BV(3) | BV(2)) + #define UART_PINS (GPIO_UART1_RX_PIN | GPIO_UART1_TX_PIN) #else #error "UART port not supported in this board" #endif diff --git a/bertos/cpu/cortex-m3/io/cm3.h b/bertos/cpu/cortex-m3/io/cm3.h index 3b99e102..e3829958 100644 --- a/bertos/cpu/cortex-m3/io/cm3.h +++ b/bertos/cpu/cortex-m3/io/cm3.h @@ -42,6 +42,8 @@ #include "lm3s.h" #elif CPU_CM3_STM32 #include "stm32.h" +#elif CPU_CM3_AT91SAM3 + #include "sam3.h" /*#elif Add other Cortex-M3 CPUs here */ #else #error Unknown CPU diff --git a/bertos/cpu/cortex-m3/io/sam3.h b/bertos/cpu/cortex-m3/io/sam3.h index c3540db3..385221b2 100644 --- a/bertos/cpu/cortex-m3/io/sam3.h +++ b/bertos/cpu/cortex-m3/io/sam3.h @@ -42,6 +42,7 @@ #include #include "sam3_memmap.h" +#include "sam3_ints.h" #include "sam3_gpio.h" #include "sam3_nvic.h" #include "sam3_uart.h" diff --git a/bertos/cpu/cortex-m3/io/sam3_gpio.h b/bertos/cpu/cortex-m3/io/sam3_gpio.h index 7bfccafe..af80718b 100644 --- a/bertos/cpu/cortex-m3/io/sam3_gpio.h +++ b/bertos/cpu/cortex-m3/io/sam3_gpio.h @@ -99,4 +99,19 @@ #define GPIO_SCHMITT 0x100 //< Schmitt Trigger Register /*\}*/ +/** + * UART I/O pins + */ +/*\{*/ +#ifdef CPU_CM3_AT91SAM3U + #define GPIO_UART0_RX_PIN BV(11) + #define GPIO_UART0_TX_PIN BV(12) +#else + #define GPIO_UART0_RX_PIN BV(9) + #define GPIO_UART0_TX_PIN BV(10) + #define GPIO_UART1_RX_PIN BV(2) + #define GPIO_UART1_TX_PIN BV(3) +#endif +/*\}*/ + #endif /* SAM3_GPIO_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_pmc.h b/bertos/cpu/cortex-m3/io/sam3_pmc.h index 4664838d..ea5930de 100644 --- a/bertos/cpu/cortex-m3/io/sam3_pmc.h +++ b/bertos/cpu/cortex-m3/io/sam3_pmc.h @@ -36,34 +36,6 @@ #ifndef SAM3_PMC_H #define SAM3_PMC_H -// FIXME: move these in sam3(?)_int.h -#define INT_SUPC 0 ///< SAM3N Supply Controller (SUPC) -#define INT_RSTC 1 ///< SAM3N Reset Controller (RSTC) -#define INT_RTC 2 ///< SAM3N Real Time Clock (RTC) -#define INT_RTT 3 ///< SAM3N Real Time Timer (RTT) -#define INT_WDT 4 ///< SAM3N Watchdog Timer (WDT) -#define INT_PMC 5 ///< SAM3N Power Management Controller (PMC) -#define INT_EFC 6 ///< SAM3N Enhanced Flash Controller (EFC) -#define INT_UART0 8 ///< SAM3N UART 0 (UART0) -#define INT_UART1 9 ///< SAM3N UART 1 (UART1) -#define INT_PIOA 11 ///< SAM3N Parallel I/O Controller A (PIOA) -#define INT_PIOB 12 ///< SAM3N Parallel I/O Controller B (PIOB) -#define INT_PIOC 13 ///< SAM3N Parallel I/O Controller C (PIOC) -#define INT_USART0 14 ///< SAM3N USART 0 (USART0) -#define INT_USART1 15 ///< SAM3N USART 1 (USART1) -#define INT_TWI0 19 ///< SAM3N Two Wire Interface 0 (TWI0) -#define INT_TWI1 20 ///< SAM3N Two Wire Interface 1 (TWI1) -#define INT_SPI 21 ///< SAM3N Serial Peripheral Interface (SPI) -#define INT_TC0 23 ///< SAM3N Timer/Counter 0 (TC0) -#define INT_TC1 24 ///< SAM3N Timer/Counter 1 (TC1) -#define INT_TC2 25 ///< SAM3N Timer/Counter 2 (TC2) -#define INT_TC3 26 ///< SAM3N Timer/Counter 3 (TC3) -#define INT_TC4 27 ///< SAM3N Timer/Counter 4 (TC4) -#define INT_TC5 28 ///< SAM3N Timer/Counter 5 (TC5) -#define INT_ADC 29 ///< SAM3N Analog To Digital Converter (ADC) -#define INT_DACC 30 ///< SAM3N Digital To Analog Converter (DACC) -#define INT_PWM 31 ///< SAM3N Pulse Width Modulation (PWM) - /** * PMC registers. */ diff --git a/bertos/cpu/cortex-m3/io/sam3_uart.h b/bertos/cpu/cortex-m3/io/sam3_uart.h index f21bd051..dfe0d8c3 100644 --- a/bertos/cpu/cortex-m3/io/sam3_uart.h +++ b/bertos/cpu/cortex-m3/io/sam3_uart.h @@ -275,5 +275,4 @@ #define UART_PTSR_TXTEN BV(8) //< Transmitter Transfer Enable /*\}*/ - #endif /* SAM3_UART_H */