From f3f81709a0458c2c3b1028c04bf9a9522228bb2a Mon Sep 17 00:00:00 2001
From: asterix <asterix@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Wed, 3 Dec 2008 15:29:44 +0000
Subject: [PATCH 1/1] Add the gdb and openocd configuration script for the
 latest openocd version.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1967 38d2e660-2303-0410-9eaa-f027e97ec537
---
 bertos/cpu/cortex-m3/scripts/luminary_new.gdb |  8 +++
 .../scripts/openocd_new_luminary_ram.cfg      | 67 +++++++++++++++++++
 .../scripts/openocd_new_luminary_rom.cfg      | 67 +++++++++++++++++++
 3 files changed, 142 insertions(+)
 create mode 100644 bertos/cpu/cortex-m3/scripts/luminary_new.gdb
 create mode 100644 bertos/cpu/cortex-m3/scripts/openocd_new_luminary_ram.cfg
 create mode 100644 bertos/cpu/cortex-m3/scripts/openocd_new_luminary_rom.cfg

diff --git a/bertos/cpu/cortex-m3/scripts/luminary_new.gdb b/bertos/cpu/cortex-m3/scripts/luminary_new.gdb
new file mode 100644
index 00000000..0dc3e872
--- /dev/null
+++ b/bertos/cpu/cortex-m3/scripts/luminary_new.gdb
@@ -0,0 +1,8 @@
+target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor poll
+monitor soft_reset_halt
+break main
+load
+continue
diff --git a/bertos/cpu/cortex-m3/scripts/openocd_new_luminary_ram.cfg b/bertos/cpu/cortex-m3/scripts/openocd_new_luminary_ram.cfg
new file mode 100644
index 00000000..61b93518
--- /dev/null
+++ b/bertos/cpu/cortex-m3/scripts/openocd_new_luminary_ram.cfg
@@ -0,0 +1,67 @@
+# Script for luminary lm3s*
+
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+
+# GDB can also flash my flash!
+gdb_memory_map enable
+gdb_flash_program disable
+gdb_breakpoint_override soft
+
+# ftdi interface
+interface ft2232
+#ft2232_device_desc "LM3S811 Evaluation Board A"
+ft2232_layout evb_lm3s811
+ft2232_vid_pid 0x0403 0xbcd9
+
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME lm3s
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+  # this defaults to a little endian
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # force an error till we get a good number
+   set _CPUTAPID 0xffffffff
+}
+
+# jtag speed
+jtag_khz 500
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#LM3S811 Evaluation Board has only srst
+reset_config srst_only
+
+#jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
+
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+
+# 8k working area at base of ram
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x2000 -work-area-backup 0
+
+#flash configuration
+flash bank stellaris 0 0 0 0 0
+
diff --git a/bertos/cpu/cortex-m3/scripts/openocd_new_luminary_rom.cfg b/bertos/cpu/cortex-m3/scripts/openocd_new_luminary_rom.cfg
new file mode 100644
index 00000000..7971b65d
--- /dev/null
+++ b/bertos/cpu/cortex-m3/scripts/openocd_new_luminary_rom.cfg
@@ -0,0 +1,67 @@
+# Script for luminary lm3s*
+
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+
+# GDB can also flash my flash!
+gdb_memory_map enable
+gdb_flash_program enable
+gdb_breakpoint_override hard
+
+# ftdi interface
+interface ft2232
+#ft2232_device_desc "LM3S811 Evaluation Board A"
+ft2232_layout evb_lm3s811
+ft2232_vid_pid 0x0403 0xbcd9
+
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME lm3s
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+  # this defaults to a little endian
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # force an error till we get a good number
+   set _CPUTAPID 0xffffffff
+}
+
+# jtag speed
+jtag_khz 500
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#LM3S811 Evaluation Board has only srst
+reset_config srst_only
+
+#jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
+
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s
+
+# 8k working area at base of ram
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x2000 -work-area-backup 0
+
+#flash configuration
+flash bank stellaris 0 0 0 0 0
+
-- 
2.25.1