From 0797fa39b4027e4da1883be805405ba2de4df111 Mon Sep 17 00:00:00 2001
From: arighi <arighi@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Tue, 13 Apr 2010 16:28:50 +0000
Subject: [PATCH] rit128x96: small code optimizations.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3431 38d2e660-2303-0410-9eaa-f027e97ec537
---
 bertos/drv/lcd_rit128x96.c          |  6 +-----
 bertos/hw/hw_rit128x96.h            |  3 ---
 examples/lm3s1968/hw/hw_rit128x96.h | 22 ++++++++--------------
 3 files changed, 9 insertions(+), 22 deletions(-)

diff --git a/bertos/drv/lcd_rit128x96.c b/bertos/drv/lcd_rit128x96.c
index dc98055a..9922b6af 100644
--- a/bertos/drv/lcd_rit128x96.c
+++ b/bertos/drv/lcd_rit128x96.c
@@ -106,11 +106,7 @@ static const uint8_t horizontal_inc[] =
 static void lcd_dataWrite(const uint8_t *buf, size_t count)
 {
 	while (count--)
-	{
 		LCD_WRITE(*buf++);
-		/* Dummy read to drain the FIFO */
-		(void)LCD_READ;
-	}
 }
 
 /* Turn on the OLED display */
@@ -135,7 +131,7 @@ void rit128x96_lcd_off(void)
 void rit128x96_lcd_blitBitmap(const Bitmap *bm)
 {
 	uint8_t lcd_row[bm->width / 2];
-	uint8_t buffer[8];
+	uint8_t buffer[3];
 	uint8_t mask;
 	int i, l;
 
diff --git a/bertos/hw/hw_rit128x96.h b/bertos/hw/hw_rit128x96.h
index d1435f62..f9c2291a 100644
--- a/bertos/hw/hw_rit128x96.h
+++ b/bertos/hw/hw_rit128x96.h
@@ -68,9 +68,6 @@
 
 /* Send data to the display */
 #define LCD_WRITE(x)    ((void)x)/* Implement me! */
-
-/* Read data from the display */
-#define LCD_READ        (0 /* Implement me! */ )
 /*@}*/
 
 INLINE void lcd_bus_init(void)
diff --git a/examples/lm3s1968/hw/hw_rit128x96.h b/examples/lm3s1968/hw/hw_rit128x96.h
index 495c2e56..6e1c933c 100644
--- a/examples/lm3s1968/hw/hw_rit128x96.h
+++ b/examples/lm3s1968/hw/hw_rit128x96.h
@@ -73,24 +73,20 @@
 	lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN, GPIO_OLEDDC_PIN)
 
 /* Send data to the display */
-#define LCD_WRITE(x)	lm3s_ssiWriteFrame(SSI0_BASE, x)
-
-/* Read data from the display */
-#define LCD_READ					\
-	({						\
-		uint32_t frame;				\
-		lm3s_ssiReadFrame(SSI0_BASE, &frame);	\
-		frame;					\
-	})
+#define LCD_WRITE(x)							\
+	{								\
+		uint32_t _x;						\
+		lm3s_ssiWriteFrame(SSI0_BASE, x);			\
+		/* Dummy read to drain the FIFO */			\
+		while (!lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &_x));	\
+			cpu_relax();					\
+	}
 /*@}*/
 
 INLINE void lcd_bus_init(void)
 {
-	cpu_flags_t flags;
 	uint32_t dummy;
 
-	IRQ_SAVE_DISABLE(flags);
-
 	/* Enable the peripheral clock */
 	SYSCTL_RCGC1_R |= SYSCTL_RCGC1_SSI0;
 	SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA;
@@ -122,8 +118,6 @@ INLINE void lcd_bus_init(void)
 
 	/* Drain the SSI RX FIFO */
 	while (lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &dummy));
-
-	IRQ_RESTORE(flags);
 }
 
 #endif /* HW_RIT128x96_H */
-- 
2.25.1