From 0638e6c0ca69a05d5d023186abebe63645210b1b Mon Sep 17 00:00:00 2001 From: batt Date: Sat, 3 Apr 2010 11:03:02 +0000 Subject: [PATCH] Convert newlines to unix style. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3388 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/arm/hw/init_lpc2.c | 144 +++++++++++++++++----------------- 1 file changed, 72 insertions(+), 72 deletions(-) diff --git a/bertos/cpu/arm/hw/init_lpc2.c b/bertos/cpu/arm/hw/init_lpc2.c index 7e03bf6e..5f6ff507 100644 --- a/bertos/cpu/arm/hw/init_lpc2.c +++ b/bertos/cpu/arm/hw/init_lpc2.c @@ -33,11 +33,11 @@ * \author Francesco Sacchi * * \brief LPC2378 CRT. - */ -#include - -#include - + */ +#include + +#include + #if CPU_FREQ != 72000000UL /* Avoid errors on nightly test */ #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) @@ -52,70 +52,70 @@ #define PLL_MUL_VAL 11 #define PLL_DIV_VAL 0 #define LPC2_CPUCLOCK_DIV 3 - - -/* PLL feed sequence */ -#define PLL_FEED_SEQ() ATOMIC(PLLFEED = 0xAA; PLLFEED = 0x55;) - -static void configurePll(void) -{ - /* Disconnect and disable the PLL, if already active */ - if (PLLSTAT & (1 << 25)) - { - /* Disconnect PLL, but leave it enabled */ - PLLCON = 0x01; - PLL_FEED_SEQ(); - /* Disable PLL */ - PLLCON = 0; - PLL_FEED_SEQ(); - } - - /* Enable the main oscillator and wait for it to be stable */ - SCS |= (1 << 5); - while (!(SCS & (1 << 6))) ; - - /* Select the main oscillator as the PLL clock source */ - CLKSRCSEL = 0x01; - - /* Set up PLL mul and div */ - PLLCFG = PLL_MUL_VAL | (PLL_DIV_VAL << 16); - PLL_FEED_SEQ(); - - /* Enable PLL, disconnected */ - PLLCON = 0x01; - PLL_FEED_SEQ(); - - /* Set clock divider */ - CCLKCFG = LPC2_CPUCLOCK_DIV; - - /* Wait for the PLL to lock */ - while (!(PLLSTAT & (1 << 26))) ; - - /* Enable and connect the PLL */ - PLLCON = 0x03; - PLL_FEED_SEQ(); -} - -void __init1(void); - -void __init1(void) -{ - /* Map irq vectors to internal flash */ - MEMMAP = 0x01; - /* Configure PLL, switch from IRC to Main OSC */ - configurePll(); - - /* Set memory accelerator module flash timings */ -#if CPU_FREQ < 20000000UL - MAMTIM = 1; -#elif CPU_FREQ < 40000000UL - MAMTIM = 2; -#elif CPU_FREQ < 60000000UL - MAMTIM = 3; -#else - MAMTIM = 4; -#endif - - /* Memory accelerator module fully enabled */ - MAMCR = 0x02; -} + + +/* PLL feed sequence */ +#define PLL_FEED_SEQ() ATOMIC(PLLFEED = 0xAA; PLLFEED = 0x55;) + +static void configurePll(void) +{ + /* Disconnect and disable the PLL, if already active */ + if (PLLSTAT & (1 << 25)) + { + /* Disconnect PLL, but leave it enabled */ + PLLCON = 0x01; + PLL_FEED_SEQ(); + /* Disable PLL */ + PLLCON = 0; + PLL_FEED_SEQ(); + } + + /* Enable the main oscillator and wait for it to be stable */ + SCS |= (1 << 5); + while (!(SCS & (1 << 6))) ; + + /* Select the main oscillator as the PLL clock source */ + CLKSRCSEL = 0x01; + + /* Set up PLL mul and div */ + PLLCFG = PLL_MUL_VAL | (PLL_DIV_VAL << 16); + PLL_FEED_SEQ(); + + /* Enable PLL, disconnected */ + PLLCON = 0x01; + PLL_FEED_SEQ(); + + /* Set clock divider */ + CCLKCFG = LPC2_CPUCLOCK_DIV; + + /* Wait for the PLL to lock */ + while (!(PLLSTAT & (1 << 26))) ; + + /* Enable and connect the PLL */ + PLLCON = 0x03; + PLL_FEED_SEQ(); +} + +void __init1(void); + +void __init1(void) +{ + /* Map irq vectors to internal flash */ + MEMMAP = 0x01; + /* Configure PLL, switch from IRC to Main OSC */ + configurePll(); + + /* Set memory accelerator module flash timings */ +#if CPU_FREQ < 20000000UL + MAMTIM = 1; +#elif CPU_FREQ < 40000000UL + MAMTIM = 2; +#elif CPU_FREQ < 60000000UL + MAMTIM = 3; +#else + MAMTIM = 4; +#endif + + /* Memory accelerator module fully enabled */ + MAMCR = 0x02; +} -- 2.25.1