From 1980154662799f244ca0e9397ace08cf09e6a3cd Mon Sep 17 00:00:00 2001 From: aleph Date: Tue, 19 Oct 2010 18:43:56 +0000 Subject: [PATCH] sam3n serial/spi: use correct peripheral ids and interrupt numbers; initialize correctly all SPI I/O lines and peripheral alternate function. Some sam3n-ek board specific code in SPI init, to be removed when driver is completed. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4440 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/cortex-m3/drv/ser_sam3.c | 39 +++++++++++++++++++---------- 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/bertos/cpu/cortex-m3/drv/ser_sam3.c b/bertos/cpu/cortex-m3/drv/ser_sam3.c index be0f9642..6222ece5 100644 --- a/bertos/cpu/cortex-m3/drv/ser_sam3.c +++ b/bertos/cpu/cortex-m3/drv/ser_sam3.c @@ -181,10 +181,23 @@ * Default TXINIT macro - invoked in spi_init() * The default is no action. */ - #define SER_SPI0_BUS_TXINIT do { \ - /* Disable PIO on SPI pins */ \ - PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \ - } while (0) + #if CPU_CM3_AT91SAM3 + #define SER_SPI0_BUS_TXINIT do { \ + /* Disable PIO on SPI pins */ \ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO) | BV(30); \ + /* PIO is peripheral A */ \ + PIOA_ABCDSR1 &= ~(BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO)); \ + PIOA_ABCDSR2 &= ~(BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO)); \ + /* Peripheral B for chip select for display */ \ + PIOA_ABCDSR1 |= BV(30); \ + PIOA_ABCDSR2 &= ~BV(30); \ + } while (0) + #else + #define SER_SPI0_BUS_TXINIT do { \ + /* Disable PIO on SPI pins */ \ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \ + } while (0) + #endif #endif #ifndef SER_SPI0_BUS_TXCLOSE @@ -349,8 +362,8 @@ static void uart0_init( SER_UART0_BUS_TXINIT; - sysirq_setPriority(US0_ID, SERIRQ_PRIORITY); - sysirq_setHandler(US0_ID, uart0_irq_dispatcher); + sysirq_setPriority(INT_US0, SERIRQ_PRIORITY); + sysirq_setHandler(INT_US0, uart0_irq_dispatcher); SER_STROBE_INIT; } @@ -439,8 +452,8 @@ static void uart1_init( SER_UART1_BUS_TXINIT; - sysirq_setPriority(US1_ID, SERIRQ_PRIORITY); - sysirq_setHandler(US1_ID, uart1_irq_dispatcher); + sysirq_setPriority(INT_US1, SERIRQ_PRIORITY); + sysirq_setHandler(INT_US1, uart1_irq_dispatcher); SER_STROBE_INIT; } @@ -519,7 +532,7 @@ static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struc * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 */ - SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); // | SPI_PCS_2; /* * Set SPI mode. @@ -531,8 +544,8 @@ static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struc /* Disable all irqs */ SPI0_IDR = 0xFFFFFFFF; - sysirq_setPriority(SPI0_ID, SERIRQ_PRIORITY); - sysirq_setHandler(SPI0_ID, spi0_irq_handler); + //sysirq_setPriority(INT_SPI0, SERIRQ_PRIORITY); + sysirq_setHandler(INT_SPI0, spi0_irq_handler); PMC_PCER = BV(SPI0_ID); /* Enable interrupt on tx buffer empty */ @@ -605,8 +618,8 @@ static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struc /* Disable all SPI irqs */ SPI1_IDR = 0xFFFFFFFF; - sysirq_setPriority(SPI1_ID, SERIRQ_PRIORITY); - sysirq_setHandler(SPI1_ID, spi1_irq_dispatcher); + sysirq_setPriority(INT_SPI1, SERIRQ_PRIORITY); + sysirq_setHandler(INT_SPI1, spi1_irq_dispatcher); PMC_PCER = BV(SPI1_ID); /* Enable interrupt on tx buffer empty */ -- 2.25.1