From 1e4168b5fc0a9704a37bb8def5e5f90e145b646c Mon Sep 17 00:00:00 2001 From: arighi Date: Wed, 31 Mar 2010 14:41:52 +0000 Subject: [PATCH] CM3: define specific architecture attributes. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3353 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/attr.h | 21 ++++++++++++++++++--- bertos/cpu/frame.h | 11 ++++++++++- 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h index 5e24fa3c..8fdcb1c8 100644 --- a/bertos/cpu/attr.h +++ b/bertos/cpu/attr.h @@ -165,7 +165,7 @@ #elif CPU_CM3 #define CPU_REG_BITS 32 - #define CPU_REGS_CNT fixme + #define CPU_REGS_CNT 16 #define CPU_HARVARD 0 /// Valid pointers should be >= than this value (used for debug) @@ -181,12 +181,27 @@ #elif defined(__ARMEL__) #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN #else - #error Unable to detect Cortex-M3 endianness! + #error Unable to detect Cortex-M3 endianess! #endif - #define NOP fixme + #define NOP asm volatile ("nop") #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ + /* + * Builtin GCC memset() can be buggy! We need to redefine it here for + * this architecture. :( + */ + #include + #define memset __cm3_memset + INLINE void *__cm3_memset(void *s, int c, size_t n) + { + uint8_t *p = (uint8_t *)s; + + while (n--) + *p++ = c; + return s; + } + #elif CPU_PPC #define CPU_REG_BITS (CPU_PPC32 ? 32 : 64) diff --git a/bertos/cpu/frame.h b/bertos/cpu/frame.h index 9fd55b0b..e8d0f898 100644 --- a/bertos/cpu/frame.h +++ b/bertos/cpu/frame.h @@ -69,7 +69,7 @@ #elif CPU_CM3 - #define CPU_SAVED_REGS_CNT fixme + #define CPU_SAVED_REGS_CNT 8 #define CPU_STACK_GROWS_UPWARD 0 #define CPU_SP_ON_EMPTY_SLOT 0 @@ -155,6 +155,15 @@ CPU_PUSH_WORD((sp), 0x100); \ } while (0); +#elif CPU_CM3 + + + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), 0x01000000); /* xPSR */ \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* lr */ \ + } while (0); + #elif CPU_AVR /* * On AVR, addresses are pushed into the stack as little-endian, while -- 2.25.1