From 2019cf83a060edfb3f54da48da1475eb9fe055ca Mon Sep 17 00:00:00 2001 From: "(no author)" <(no author)@38d2e660-2303-0410-9eaa-f027e97ec537> Date: Thu, 23 Jul 2009 13:34:11 +0000 Subject: [PATCH] arm scripts: Add new openocd gdb and flash scripts git-svn-id: https://src.develer.com/svnoss/bertos/trunk@2762 38d2e660-2303-0410-9eaa-f027e97ec537 --- .../scripts/at91sam7_write_to_flash.script | 53 ++++++++++++++ .../scripts/openocd-0.2.0_at91sam7_gdb.cfg | 71 +++++++++++++++++++ .../openocd-0.2.0_at91sam7_rom_flash.cfg | 52 ++++++++++++++ 3 files changed, 176 insertions(+) create mode 100644 bertos/cpu/arm/scripts/at91sam7_write_to_flash.script create mode 100644 bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg create mode 100644 bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg diff --git a/bertos/cpu/arm/scripts/at91sam7_write_to_flash.script b/bertos/cpu/arm/scripts/at91sam7_write_to_flash.script new file mode 100644 index 00000000..9cbcb265 --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_write_to_flash.script @@ -0,0 +1,53 @@ +# +# The following command wills be executed on +# reset (because of run_and_init in the config-file) +# - halt target +# - init ecr +# - flash content of file main.bin into target-memory +# - shutdown openocd +# +# created by Martin Thomas +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects +# based on information from Dominic Rath +# modified for latest oocd - 4/29/09 -jkl +# + +halt +sleep 10 + +# moved from below +# AT91SAM7 flash command-"batch" +# adapted by Martin Thomas based on information from Dominic Rath - Thanks +arm7_9 dcc_downloads enable + +# added from internet script +armv4_5 core_state arm +arm7_9 fast_memory_access enable +# end added from script +# end moved section + +# Init - taken from the script openocd_at91sam7_ecr.script +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +# arm7_9 force_hw_bkpts enable # program resides in flash +sleep 10 + +# section was here + +poll +flash probe 0 +# added from script on internet +#flash protect 0 0 31 off +#flash erase_sector 0 0 31 +#flash erase_sector 0 0 31 +# end add from script +#flash write_bank 0 blink1ROM_rom.bin 0x0 +flash write_image ../../../../images/at91sam7s.bin 0x0100000 bin + diff --git a/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg new file mode 100644 index 00000000..04125964 --- /dev/null +++ b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg @@ -0,0 +1,71 @@ +# Change the default telnet port... +telnet_port 4444 + +# Port for TCL connection. +tcl_port 6666 + +# GDB connects here +gdb_port 3333 +gdb_memory_map enable + +interface ft2232 +ft2232_device_desc "Amontec JTAGkey" +ft2232_layout jtagkey +ft2232_vid_pid 0x0403 0xcff8 + + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME sam7 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x3f0f0f0f +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi + +$_TARGETNAME configure -event reset-start { + # disable watchdog + mww 0xfffffd44 0x00008000 + # enable user reset + mww 0xfffffd08 0xa5000001 + # CKGR_MOR : enable the main oscillator + mww 0xfffffc20 0x00000601 + sleep 10 + # CKGR_PLLR: 96.1097 MHz + mww 0xfffffc2c 0x00481c0e + sleep 10 + # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz + mww 0xfffffc30 0x00000007 + sleep 10 + # MC_FMR: flash mode (FWS=1,FMCN=60) + mww 0xffffff60 0x003c0100 + sleep 10 + # reset PC + reg pc 00000000 +} + +$_TARGETNAME configure -event gdb-detach { + shutdown +} + +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 + +#flash bank +flash bank at91sam7 0 0 0 0 0 diff --git a/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg new file mode 100644 index 00000000..6f939b12 --- /dev/null +++ b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg @@ -0,0 +1,52 @@ +# Change the default telnet port... +telnet_port 4444 + +# Port for TCL connection. +tcl_port 6666 + +# GDB connects here +gdb_port 3333 + +interface ft2232 +ft2232_device_desc "Amontec JTAGkey" +ft2232_layout jtagkey +ft2232_vid_pid 0x0403 0xcff8 + + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME sam7 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x3f0f0f0f +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi + +$_TARGETNAME configure -event reset-start "script at91sam7_write_to_flash.script" + +$_TARGETNAME configure -event reset-end "shutdown" + +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 + +#flash bank +flash bank at91sam7 0 0 0 0 0 + +init +reset run -- 2.25.1