From 2654dc2eff8a397ed1dd21d0f073bae553acbb61 Mon Sep 17 00:00:00 2001 From: batt Date: Mon, 30 Aug 2010 16:27:38 +0000 Subject: [PATCH] Release version 2.5.1. git-svn-id: https://src.develer.com/svnoss/bertos/tags/2.5.1@4203 38d2e660-2303-0410-9eaa-f027e97ec537 --- 2.5/.gdbinit | 3 + 2.5/Doxyfile | 38 + 2.5/Doxyfile-common | 1507 ++ 2.5/Doxyfile-offline | 40 + 2.5/Doxyfile-snapshot | 38 + 2.5/LICENSE.GPL | 340 + 2.5/Makefile | 20 + 2.5/Makefile.test | 10 + 2.5/VERSION | 1 + 2.5/bertos/algo/crc.c | 93 + 2.5/bertos/algo/crc.h | 115 + 2.5/bertos/algo/crc_ccitt.c | 84 + 2.5/bertos/algo/crc_ccitt.h | 83 + 2.5/bertos/algo/crc_test.c | 76 + 2.5/bertos/algo/md2.c | 337 + 2.5/bertos/algo/md2.h | 75 + 2.5/bertos/algo/mean.h | 41 + 2.5/bertos/algo/pid_control.c | 116 + 2.5/bertos/algo/pid_control.h | 116 + 2.5/bertos/algo/ramp.c | 201 + 2.5/bertos/algo/ramp.h | 167 + 2.5/bertos/algo/ramp_test.c | 187 + 2.5/bertos/algo/rand.c | 53 + 2.5/bertos/algo/rand.h | 45 + 2.5/bertos/algo/randpool.c | 258 + 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absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = doc/reference + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT += doc/Mainpage.online + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = doc/TracHeader.html + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = + diff --git a/2.5/Doxyfile-common b/2.5/Doxyfile-common new file mode 100644 index 00000000..1560e5c2 --- /dev/null +++ b/2.5/Doxyfile-common @@ -0,0 +1,1507 @@ +# Doxyfile 1.5.9 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project +# +# All text after a hash (#) is considered a comment and will be ignored +# The format is: +# TAG = value [value, ...] +# For lists items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (" ") + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# This tag specifies the encoding used for all characters in the config file +# that follow. The default is UTF-8 which is also the encoding used for all +# text before the first occurrence of this tag. Doxygen uses libiconv (or the +# iconv built into libc) for the transcoding. See +# http://www.gnu.org/software/libiconv for the list of possible encodings. + +DOXYFILE_ENCODING = UTF-8 + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded +# by quotes) that should identify the project. + +PROJECT_NAME = BeRTOS + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. +# This could be handy for archiving the generated documentation or +# if some version control system is used. + +PROJECT_NUMBER = + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create +# 4096 sub-directories (in 2 levels) under the output directory of each output +# format and will distribute the generated files over these directories. +# Enabling this option can be useful when feeding doxygen a huge amount of +# source files, where putting all generated files in the same directory would +# otherwise cause performance problems for the file system. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# The default language is English, other supported languages are: +# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional, +# Croatian, Czech, Danish, Dutch, Esperanto, Farsi, Finnish, French, German, +# Greek, Hungarian, Italian, Japanese, Japanese-en (Japanese with English +# messages), Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, +# Polish, Portuguese, Romanian, Russian, Serbian, Serbian-Cyrilic, Slovak, +# Slovene, Spanish, Swedish, Ukrainian, and Vietnamese. + +OUTPUT_LANGUAGE = English + +# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will +# include brief member descriptions after the members that are listed in +# the file and class documentation (similar to JavaDoc). +# Set to NO to disable this. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend +# the brief description of a member or function before the detailed description. +# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator +# that is used to form the text in various listings. Each string +# in this list, if found as the leading text of the brief description, will be +# stripped from the text and the result after processing the whole list, is +# used as the annotated text. Otherwise, the brief description is used as-is. +# If left blank, the following values are used ("$name" is automatically +# replaced with the name of the entity): "The $name class" "The $name widget" +# "The $name file" "is" "provides" "specifies" "contains" +# "represents" "a" "an" "the" + +ABBREVIATE_BRIEF = + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# Doxygen will generate a detailed section even if there is only a brief +# description. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full +# path before files name in the file list and in the header files. If set +# to NO the shortest path that makes the file name unique will be used. + +FULL_PATH_NAMES = NO + +# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag +# can be used to strip a user-defined part of the path. Stripping is +# only done if one of the specified strings matches the left-hand part of +# the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the +# path to strip. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of +# the path mentioned in the documentation of a class, which tells +# the reader which header file to include in order to use a class. +# If left blank only the name of the header file containing the class +# definition is used. Otherwise one should specify the include paths that +# are normally passed to the compiler using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter +# (but less readable) file names. This can be useful is your file systems +# doesn't support long names like on DOS, Mac, or CD-ROM. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen +# will interpret the first line (until the first dot) of a JavaDoc-style +# comment as the brief description. If set to NO, the JavaDoc +# comments will behave just like regular Qt-style comments +# (thus requiring an explicit @brief command for a brief description.) + +JAVADOC_AUTOBRIEF = YES + +# If the QT_AUTOBRIEF tag is set to YES then Doxygen will +# interpret the first line (until the first dot) of a Qt-style +# comment as the brief description. If set to NO, the comments +# will behave just like regular Qt-style comments (thus requiring +# an explicit \brief command for a brief description.) + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen +# treat a multi-line C++ special comment block (i.e. a block of //! or /// +# comments) as a brief description. This used to be the default behaviour. +# The new default is to treat a multi-line C++ comment block as a detailed +# description. Set this tag to YES if you prefer the old behaviour instead. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented +# member inherits the documentation from any documented member that it +# re-implements. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce +# a new page for each member. If set to NO, the documentation of a member will +# be part of the file/class/namespace that contains it. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. +# Doxygen uses this value to replace tabs by spaces in code fragments. + +TAB_SIZE = 4 + +# This tag can be used to specify a number of aliases that acts +# as commands in the documentation. An alias has the form "name=value". +# For example adding "sideeffect=\par Side Effects:\n" will allow you to +# put the command \sideeffect (or @sideeffect) in the documentation, which +# will result in a user-defined paragraph with heading "Side Effects:". +# You can put \n's in the value part of an alias to insert newlines. + +ALIASES = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C +# sources only. Doxygen will then generate output that is more tailored for C. +# For instance, some of the names that are used will be different. The list +# of all members will be omitted, etc. + +OPTIMIZE_OUTPUT_FOR_C = YES + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java +# sources only. Doxygen will then generate output that is more tailored for +# Java. For instance, namespaces will be presented as packages, qualified +# scopes will look different, etc. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources only. Doxygen will then generate output that is more tailored for +# Fortran. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for +# VHDL. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Doxygen selects the parser to use depending on the extension of the files it parses. +# With this tag you can assign which parser to use for a given extension. +# Doxygen has a built-in mapping, but you can override or extend it using this tag. +# The format is ext=language, where ext is a file extension, and language is one of +# the parsers supported by doxygen: IDL, Java, Javascript, C#, C, C++, D, PHP, +# Objective-C, Python, Fortran, VHDL, C, C++. For instance to make doxygen treat +# .inc files as Fortran files (default is PHP), and .f files as C (default is Fortran), +# use: inc=Fortran f=C. Note that for custom extensions you also need to set +# FILE_PATTERNS otherwise the files are not read by doxygen. + +# commented, generates warnings with old version of doxygen +#EXTENSION_MAPPING = + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should +# set this tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); v.s. +# func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. + +BUILTIN_STL_SUPPORT = YES + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only. +# Doxygen will parse them like normal C++ but will assume all classes use public +# instead of private inheritance when no explicit protection keyword is present. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate getter +# and setter methods for a property. Setting this option to YES (the default) +# will make doxygen to replace the get and set methods by a property in the +# documentation. This will only work if the methods are indeed getting or +# setting a simple type. If this is not the case, or you want to show the +# methods anyway, you should set this option to NO. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. + +DISTRIBUTE_GROUP_DOC = NO + +# Set the SUBGROUPING tag to YES (the default) to allow class member groups of +# the same type (for instance a group of public functions) to be put as a +# subgroup of that type (e.g. under the Public Functions section). Set it to +# NO to prevent subgrouping. Alternatively, this can be done per class using +# the \nosubgrouping command. + +SUBGROUPING = YES + +# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum +# is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically +# be useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. + +TYPEDEF_HIDES_STRUCT = NO + +# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to +# determine which symbols to keep in memory and which to flush to disk. +# When the cache is full, less often used symbols will be written to disk. +# For small to medium size projects (<1000 input files) the default value is +# probably good enough. For larger projects a too small cache size can cause +# doxygen to be busy swapping symbols to and from disk most of the time +# causing a significant performance penality. +# If the system has enough physical memory increasing the cache will improve the +# performance by keeping more symbols in memory. Note that the value works on +# a logarithmic scale so increasing the size by one will rougly double the +# memory usage. The cache size is given by this formula: +# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0, +# corresponding to a cache size of 2^16 = 65536 symbols + +SYMBOL_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. +# Private class members and static file members will be hidden unless +# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class +# will be included in the documentation. + +EXTRACT_PRIVATE = YES + +# If the EXTRACT_STATIC tag is set to YES all static members of a file +# will be included in the documentation. + +EXTRACT_STATIC = YES + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) +# defined locally in source files will be included in the documentation. +# If set to NO only classes defined in header files are included. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local +# methods, which are defined in the implementation section but not in +# the interface are included in the documentation. +# If set to NO (the default) only methods in the interface are included. + +EXTRACT_LOCAL_METHODS = NO + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base +# name of the file that contains the anonymous namespace. By default +# anonymous namespace are hidden. + +EXTRACT_ANON_NSPACES = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all +# undocumented members of documented classes, files or namespaces. +# If set to NO (the default) these members will be included in the +# various overviews, but no documentation section is generated. +# This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_MEMBERS = YES + +# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. +# If set to NO (the default) these classes will be included in the various +# overviews. This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_CLASSES = YES + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all +# friend (class|struct|union) declarations. +# If set to NO (the default) these declarations will be included in the +# documentation. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any +# documentation blocks found inside the body of a function. +# If set to NO (the default) these blocks will be appended to the +# function's detailed documentation block. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation +# that is typed after a \internal command is included. If the tag is set +# to NO (the default) then the documentation will be excluded. +# Set it to YES to include the internal documentation. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate +# file names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# and Mac users are advised to set this option to NO. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen +# will show members with their full class and namespace scopes in the +# documentation. If set to YES the scope will be hidden. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen +# will put a list of the files that are included by a file in the documentation +# of that file. + +SHOW_INCLUDE_FILES = YES + +# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] +# is inserted in the documentation for inline members. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen +# will sort the (detailed) documentation of file and class members +# alphabetically by member name. If set to NO the members will appear in +# declaration order. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the +# brief documentation of file, namespace and class members alphabetically +# by member name. If set to NO (the default) the members will appear in +# declaration order. + +SORT_BRIEF_DOCS = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the +# hierarchy of group names into alphabetical order. If set to NO (the default) +# the group names will appear in their defined order. + +SORT_GROUP_NAMES = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be +# sorted by fully-qualified names, including namespaces. If set to +# NO (the default), the class list will be sorted only by class name, +# not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the +# alphabetical list. + +SORT_BY_SCOPE_NAME = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or +# disable (NO) the todo list. This list is created by putting \todo +# commands in the documentation. + +GENERATE_TODOLIST = NO + +# The GENERATE_TESTLIST tag can be used to enable (YES) or +# disable (NO) the test list. This list is created by putting \test +# commands in the documentation. + +GENERATE_TESTLIST = NO + +# The GENERATE_BUGLIST tag can be used to enable (YES) or +# disable (NO) the bug list. This list is created by putting \bug +# commands in the documentation. + +GENERATE_BUGLIST = NO + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or +# disable (NO) the deprecated list. This list is created by putting +# \deprecated commands in the documentation. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional +# documentation sections, marked by \if sectionname ... \endif. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines +# the initial value of a variable or define consists of for it to appear in +# the documentation. If the initializer consists of more lines than specified +# here it will be hidden. Use a value of 0 to hide initializers completely. +# The appearance of the initializer of individual variables and defines in the +# documentation can be controlled using \showinitializer or \hideinitializer +# command in the documentation regardless of this setting. + +MAX_INITIALIZER_LINES = 30 + +# If the sources in your project are distributed over multiple directories +# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy +# in the documentation. The default is NO. + +SHOW_DIRECTORIES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. +# This will remove the Files entry from the Quick Index and from the +# Folder Tree View (if specified). The default is YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the +# Namespaces page. This will remove the Namespaces entry from the Quick Index +# and from the Folder Tree View (if specified). The default is YES. + +SHOW_NAMESPACES = NO + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command , where is the value of +# the FILE_VERSION_FILTER tag, and is the name of an input file +# provided by doxygen. Whatever the program writes to standard output +# is used as the file version. See the manual for examples. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed by +# doxygen. The layout file controls the global structure of the generated output files +# in an output format independent way. The create the layout file that represents +# doxygen's defaults, run doxygen with the -l option. You can optionally specify a +# file name after the option, if omitted DoxygenLayout.xml will be used as the name +# of the layout file. + +LAYOUT_FILE = + +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated +# by doxygen. Possible values are YES and NO. If left blank NO is used. + +QUIET = YES + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated by doxygen. Possible values are YES and NO. If left blank +# NO is used. + +WARNINGS = YES + +# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings +# for undocumented members. If EXTRACT_ALL is set to YES then this flag will +# automatically be disabled. + +WARN_IF_UNDOCUMENTED = NO + +# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some +# parameters in a documented function, or documenting parameters that +# don't exist or using markup commands wrongly. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be abled to get warnings for +# functions that are documented, but have no documentation for their parameters +# or return value. If set to NO (the default) doxygen will only warn about +# wrong or incomplete parameter documentation, but not about the absence of +# documentation. + +WARN_NO_PARAMDOC = NO + +# The WARN_FORMAT tag determines the format of the warning messages that +# doxygen can produce. The string should contain the $file, $line, and $text +# tags, which will be replaced by the file and line number from which the +# warning originated and the warning text. Optionally the format may contain +# $version, which will be replaced by the version of the file (if it could +# be obtained via FILE_VERSION_FILTER) + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning +# and error messages should be written. If left blank the output is written +# to stderr. + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT += bertos/ + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank the following patterns are tested: +# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx +# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90 + +FILE_PATTERNS = *.h \ + *.c + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is +# also the default input encoding. Doxygen uses libiconv (or the iconv built +# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for +# the list of possible encodings. + +INPUT_ENCODING = UTF-8 + +# The RECURSIVE tag can be used to turn specify whether or not subdirectories +# should be searched for input files as well. Possible values are YES and NO. +# If left blank NO is used. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. + +EXCLUDE = doc \ + CVS \ + .svn \ + qtext/qextftp.cpp \ + wizard \ + testout \ + testout.old + +# The EXCLUDE_SYMLINKS tag can be used select whether or not files or +# directories that are symbolic links (a Unix filesystem feature) are excluded +# from the input. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. Note that the wildcards are matched +# against the file with absolute path, so to exclude all test directories +# for example use the pattern */test/* + +EXCLUDE_PATTERNS = *_test.* \ + *_moc.* + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test + +EXCLUDE_SYMBOLS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or +# directories that contain example code fragments that are included (see +# the \include command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank all files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude +# commands irrespective of the value of the RECURSIVE tag. +# Possible values are YES and NO. If left blank NO is used. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or +# directories that contain image that are included in the documentation (see +# the \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command , where +# is the value of the INPUT_FILTER tag, and is the name of an +# input file. Doxygen will then use the output that the filter program writes +# to standard output. If FILTER_PATTERNS is specified, this tag will be +# ignored. + +INPUT_FILTER = "python doc/tag-filter.py" + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: +# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further +# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER +# is applied to all files. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will be used to filter the input files when producing source +# files to browse (i.e. when SOURCE_BROWSER is set to YES). + +FILTER_SOURCE_FILES = NO + +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will +# be generated. Documented entities will be cross-referenced with these sources. +# Note: To get rid of all source code in the generated output, make sure also +# VERBATIM_HEADERS is set to NO. + +SOURCE_BROWSER = YES + +# Setting the INLINE_SOURCES tag to YES will include the body +# of functions and classes directly in the documentation. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct +# doxygen to hide any special comment blocks from generated source code +# fragments. Normal C and C++ comments will always remain visible. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES +# then for each documented function all documented +# functions referencing it will be listed. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES +# then for each documented function all documented entities +# called/used by that function will be listed. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES (the default) +# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from +# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will +# link to the source code. Otherwise they will link to the documentation. + +REFERENCES_LINK_SOURCE = YES + +# If the USE_HTAGS tag is set to YES then the references to source code +# will point to the HTML generated by the htags(1) tool instead of doxygen +# built-in source browser. The htags tool is part of GNU's global source +# tagging system (see http://www.gnu.org/software/global/global.html). You +# will need version 4.8.6 or higher. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen +# will generate a verbatim copy of the header file for each class for +# which an include is specified. Set to NO to disable this. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index +# of all compounds will be generated. Enable this if the project +# contains a lot of classes, structs, unions or interfaces. + +ALPHABETICAL_INDEX = YES + +# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then +# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns +# in which this list will be split (can be a number in the range [1..20]) + +COLS_IN_ALPHA_INDEX = 1 + +# In case all classes in a project start with a common prefix, all +# classes will be put under the same header in the alphabetical index. +# The IGNORE_PREFIX tag can be used to specify one or more prefixes that +# should be ignored while generating the index headers. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES (the default) Doxygen will +# generate HTML output. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `html' will be used as the default path. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for +# each generated HTML page (for example: .htm,.php,.asp). If it is left blank +# doxygen will generate files with .html extension. + +HTML_FILE_EXTENSION = .html + +# The HTML_FOOTER tag can be used to specify a personal HTML footer for +# each generated HTML page. If it is left blank doxygen will generate a +# standard footer. + +HTML_FOOTER = doc/TracFooter.html + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading +# style sheet that is used by each HTML page. It can be used to +# fine-tune the look of the HTML output. If the tag is left blank doxygen +# will generate a default style sheet. Note that doxygen will try to copy +# the style sheet file to the HTML output directory, so don't put your own +# stylesheet in the HTML output directory as well, or it will be erased! + +HTML_STYLESHEET = doc/doxygen.css + +# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, +# files or namespaces will be aligned in HTML using tables. If set to +# NO a bullet list will be used. + +HTML_ALIGN_MEMBERS = YES + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. For this to work a browser that supports +# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox +# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari). + +HTML_DYNAMIC_SECTIONS = NO + +# If the GENERATE_DOCSET tag is set to YES, additional index files +# will be generated that can be used as input for Apple's Xcode 3 +# integrated development environment, introduced with OSX 10.5 (Leopard). +# To create a documentation set, doxygen will generate a Makefile in the +# HTML output directory. Running make will produce the docset in that +# directory and running "make install" will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find +# it at startup. +# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html for more information. + +GENERATE_DOCSET = NO + +# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the +# feed. A documentation feed provides an umbrella under which multiple +# documentation sets from a single provider (such as a company or product suite) +# can be grouped. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that +# should uniquely identify the documentation set bundle. This should be a +# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen +# will append .docset to the name. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can +# be used to specify the location (absolute path including file name) of +# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run +# the HTML help compiler on the generated index.hhp. + +HHC_LOCATION = + +# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag +# controls if a separate .chi index file is generated (YES) or that +# it should be included in the master .chm file (NO). + +GENERATE_CHI = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING +# is used to encode HtmlHelp index (hhk), content (hhc) and project file +# content. + +CHM_INDEX_ENCODING = + +# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag +# controls whether a binary table of contents is generated (YES) or a +# normal table of contents (NO) in the .chm file. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members +# to the contents of the HTML help documentation and to the tree view. + +TOC_EXPAND = NO + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and QHP_VIRTUAL_FOLDER +# are set, an additional index file will be generated that can be used as input for +# Qt's qhelpgenerator to generate a Qt Compressed Help (.qch) of the generated +# HTML documentation. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can +# be used to specify the file name of the resulting .qch file. +# The path specified is relative to the HTML output folder. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating +# Qt Help Project output. For more information please see +# http://doc.trolltech.com/qthelpproject.html#namespace + +QHP_NAMESPACE = org.doxygen.Project + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating +# Qt Help Project output. For more information please see +# http://doc.trolltech.com/qthelpproject.html#virtual-folders + +QHP_VIRTUAL_FOLDER = doc + +# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to add. +# For more information please see +# http://doc.trolltech.com/qthelpproject.html#custom-filters + +# commented, generates warnings with old version of doxygen +#QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the custom filter to add.For more information please see +# Qt Help Project / Custom Filters. + +# commented, generates warnings with old version of doxygen +#QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this project's +# filter section matches. +# Qt Help Project / Filter Attributes. + +# commented, generates warnings with old version of doxygen +#QHP_SECT_FILTER_ATTRS = + +# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can +# be used to specify the location of Qt's qhelpgenerator. +# If non-empty doxygen will try to run qhelpgenerator on the generated +# .qhp file. + +QHG_LOCATION = + +# The DISABLE_INDEX tag can be used to turn on/off the condensed index at +# top of each HTML page. The value NO (the default) enables the index and +# the value YES disables it. + +DISABLE_INDEX = NO + +# This tag can be used to set the number of enum values (range [1..20]) +# that doxygen will group on one line in the generated HTML documentation. + +ENUM_VALUES_PER_LINE = 4 + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. +# If the tag value is set to FRAME, a side panel will be generated +# containing a tree-like index structure (just like the one that +# is generated for HTML Help). For this to work a browser that supports +# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, +# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are +# probably better off using the HTML help feature. Other possible values +# for this tag are: HIERARCHIES, which will generate the Groups, Directories, +# and Class Hierarchy pages using a tree view instead of an ordered list; +# ALL, which combines the behavior of FRAME and HIERARCHIES; and NONE, which +# disables this behavior completely. For backwards compatibility with previous +# releases of Doxygen, the values YES and NO are equivalent to FRAME and NONE +# respectively. + +GENERATE_TREEVIEW = NONE + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be +# used to set the initial width (in pixels) of the frame in which the tree +# is shown. + +TREEVIEW_WIDTH = 250 + +# Use this tag to change the font size of Latex formulas included +# as images in the HTML documentation. The default is 10. Note that +# when you change the font size after a successful doxygen run you need +# to manually remove any form_*.png images from the HTML output directory +# to force them to be regenerated. + +FORMULA_FONTSIZE = 10 + +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- + +# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will +# generate Latex output. + +GENERATE_LATEX = NO + +# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `latex' will be used as the default path. + +LATEX_OUTPUT = latex + +# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be +# invoked. If left blank `latex' will be used as the default command name. + +LATEX_CMD_NAME = latex + +# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to +# generate index for LaTeX. If left blank `makeindex' will be used as the +# default command name. + +MAKEINDEX_CMD_NAME = makeindex + +# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact +# LaTeX documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_LATEX = YES + +# The PAPER_TYPE tag can be used to set the paper type that is used +# by the printer. Possible values are: a4, a4wide, letter, legal and +# executive. If left blank a4wide will be used. + +PAPER_TYPE = a4wide + +# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX +# packages that should be included in the LaTeX output. + +EXTRA_PACKAGES = + +# The LATEX_HEADER tag can be used to specify a personal LaTeX header for +# the generated latex document. The header should contain everything until +# the first chapter. If it is left blank doxygen will generate a +# standard header. Notice: only use this tag if you know what you are doing! + +LATEX_HEADER = + +# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated +# is prepared for conversion to pdf (using ps2pdf). The pdf file will +# contain links (just like the HTML output) instead of page references +# This makes the output suitable for online browsing using a pdf viewer. + +PDF_HYPERLINKS = YES + +# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of +# plain latex in the generated Makefile. Set this option to YES to get a +# higher quality PDF documentation. + +USE_PDFLATEX = YES + +# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. +# command to the generated LaTeX files. This will instruct LaTeX to keep +# running if errors occur, instead of asking the user for help. +# This option is also used when generating formulas in HTML. + +LATEX_BATCHMODE = YES + +# If LATEX_HIDE_INDICES is set to YES then doxygen will not +# include the index chapters (such as File Index, Compound Index, etc.) +# in the output. + +LATEX_HIDE_INDICES = NO + +# If LATEX_SOURCE_CODE is set to YES then doxygen will include +# source code with syntax highlighting in the LaTeX output. +# Note that which sources are shown also depends on other settings +# such as SOURCE_BROWSER. + +# commented, generates warnings with old version of doxygen +#LATEX_SOURCE_CODE = NO + +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- + +# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output +# The RTF output is optimized for Word 97 and may not look very pretty with +# other RTF readers or editors. + +GENERATE_RTF = NO + +# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `rtf' will be used as the default path. + +RTF_OUTPUT = rtf + +# If the COMPACT_RTF tag is set to YES Doxygen generates more compact +# RTF documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_RTF = YES + +# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated +# will contain hyperlink fields. The RTF file will +# contain links (just like the HTML output) instead of page references. +# This makes the output suitable for online browsing using WORD or other +# programs which support those fields. +# Note: wordpad (write) and others do not support links. + +RTF_HYPERLINKS = NO + +# Load stylesheet definitions from file. Syntax is similar to doxygen's +# config file, i.e. a series of assignments. You only have to provide +# replacements, missing definitions are set to their default value. + +RTF_STYLESHEET_FILE = + +# Set optional variables used in the generation of an rtf document. +# Syntax is similar to doxygen's config file. + +RTF_EXTENSIONS_FILE = + +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- + +# If the GENERATE_MAN tag is set to YES (the default) Doxygen will +# generate man pages + +GENERATE_MAN = NO + +# The MAN_OUTPUT tag is used to specify where the man pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `man' will be used as the default path. + +MAN_OUTPUT = man + +# The MAN_EXTENSION tag determines the extension that is added to +# the generated man pages (default is the subroutine's section .3) + +MAN_EXTENSION = .3 + +# If the MAN_LINKS tag is set to YES and Doxygen generates man output, +# then it will generate one additional man file for each entity +# documented in the real man page(s). These additional files +# only source the real man page, but without them the man command +# would be unable to find the correct page. The default is NO. + +MAN_LINKS = NO + +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- + +# If the GENERATE_XML tag is set to YES Doxygen will +# generate an XML file that captures the structure of +# the code including all documentation. + +GENERATE_XML = NO + +# The XML_OUTPUT tag is used to specify where the XML pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `xml' will be used as the default path. + +XML_OUTPUT = xml + +# The XML_SCHEMA tag can be used to specify an XML schema, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_SCHEMA = + +# The XML_DTD tag can be used to specify an XML DTD, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_DTD = + +# If the XML_PROGRAMLISTING tag is set to YES Doxygen will +# dump the program listings (including syntax highlighting +# and cross-referencing information) to the XML output. Note that +# enabling this will significantly increase the size of the XML output. + +XML_PROGRAMLISTING = YES + +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- + +# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will +# generate an AutoGen Definitions (see autogen.sf.net) file +# that captures the structure of the code including all +# documentation. Note that this feature is still experimental +# and incomplete at the moment. + +GENERATE_AUTOGEN_DEF = NO + +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- + +# If the GENERATE_PERLMOD tag is set to YES Doxygen will +# generate a Perl module file that captures the structure of +# the code including all documentation. Note that this +# feature is still experimental and incomplete at the +# moment. + +GENERATE_PERLMOD = NO + +# If the PERLMOD_LATEX tag is set to YES Doxygen will generate +# the necessary Makefile rules, Perl scripts and LaTeX code to be able +# to generate PDF and DVI output from the Perl module output. + +PERLMOD_LATEX = NO + +# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be +# nicely formatted so it can be parsed by a human reader. This is useful +# if you want to understand what is going on. On the other hand, if this +# tag is set to NO the size of the Perl module output will be much smaller +# and Perl will parse it just the same. + +PERLMOD_PRETTY = YES + +# The names of the make variables in the generated doxyrules.make file +# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. +# This is useful so different doxyrules.make files included by the same +# Makefile don't overwrite each other's variables. + +PERLMOD_MAKEVAR_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will +# evaluate all C-preprocessor directives found in the sources and include +# files. + +ENABLE_PREPROCESSING = YES + +# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro +# names in the source code. If set to NO (the default) only conditional +# compilation will be performed. Macro expansion can be done in a controlled +# way by setting EXPAND_ONLY_PREDEF to YES. + +MACRO_EXPANSION = YES + +# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES +# then the macro expansion is limited to the macros specified with the +# PREDEFINED and EXPAND_AS_DEFINED tags. + +EXPAND_ONLY_PREDEF = YES + +# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files +# in the INCLUDE_PATH (see below) will be search if a #include is found. + +SEARCH_INCLUDES = YES + +# The INCLUDE_PATH tag can be used to specify one or more directories that +# contain include files that are not input files but should be processed by +# the preprocessor. + +INCLUDE_PATH = + +# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard +# patterns (like *.h and *.hpp) to filter out the header-files in the +# directories. If left blank, the patterns specified with FILE_PATTERNS will +# be used. + +INCLUDE_FILE_PATTERNS = + +# The PREDEFINED tag can be used to specify one or more macro names that +# are defined before the preprocessor is started (similar to the -D option of +# gcc). The argument of the tag is a list of macros of the form: name +# or name=definition (no spaces). If the definition and the = are +# omitted =1 is assumed. To prevent a macro definition from being +# undefined via #undef or recursively expanded use the := operator +# instead of the = operator. + +PREDEFINED = __doxygen__ \ + __linux__ \ + __unix__ \ + __GNUC__ \ + __declspec(x) \ + _DEBUG=1 \ + FORMAT(x,y,z)= \ + PGM_FUNC(x)=x \ + INLINE=inline \ + CONFIG_FAT_DRIVES=1 \ + CONFIG_KERN_PRI=1 \ + CONFIG_TIMER_EVENTS=1 \ + CONFIG_TIMER_UDELAY=1 \ + CONFIG_KERN_SIGNALS=1 \ + CONFIG_PRINTF=4 \ + CONFIG_KFILE_GETS=1 \ + CONFIG_XMODEM_RECV=1 \ + CONFIG_XMODEM_SEND=1 \ + COMPILER_VARIADIC_MACROS=1 + +# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then +# this tag can be used to specify a list of macro names that should be expanded. +# The macro definition that is found in the sources will be used. +# Use the PREDEFINED tag if you want to use a different macro definition. + +EXPAND_AS_DEFINED = + +# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then +# doxygen's preprocessor will remove all function-like macros that are alone +# on a line, have an all uppercase name, and do not end with a semicolon. Such +# function macros are typically used for boiler-plate code, and will confuse +# the parser if not removed. + +SKIP_FUNCTION_MACROS = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- + +# The TAGFILES option can be used to specify one or more tagfiles. +# Optionally an initial location of the external documentation +# can be added for each tagfile. The format of a tag file without +# this location is as follows: +# TAGFILES = file1 file2 ... +# Adding location for the tag files is done as follows: +# TAGFILES = file1=loc1 "file2 = loc2" ... +# where "loc1" and "loc2" can be relative or absolute paths or +# URLs. If a location is present for each tag, the installdox tool +# does not have to be run to correct the links. +# Note that each tag file must have a unique name +# (where the name does NOT include the path) +# If a tag file is not located in the directory in which doxygen +# is run, you must also specify the path to the tagfile here. + +TAGFILES = + +# When a file name is specified after GENERATE_TAGFILE, doxygen will create +# a tag file that is based on the input files it reads. + +GENERATE_TAGFILE = + +# If the ALLEXTERNALS tag is set to YES all external classes will be listed +# in the class index. If set to NO only the inherited external classes +# will be listed. + +ALLEXTERNALS = NO + +# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed +# in the modules index. If set to NO, only the current project's groups will +# be listed. + +EXTERNAL_GROUPS = YES + +# The PERL_PATH should be the absolute path and name of the perl script +# interpreter (i.e. the result of `which perl'). + +PERL_PATH = /usr/bin/perl + +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- + +# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will +# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base +# or super classes. Setting the tag to NO turns the diagrams off. Note that +# this option is superseded by the HAVE_DOT option below. This is only a +# fallback. It is recommended to install and use dot, since it yields more +# powerful graphs. + +CLASS_DIAGRAMS = NO + +# You can define message sequence charts within doxygen comments using the \msc +# command. Doxygen will then run the mscgen tool (see +# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the +# documentation. The MSCGEN_PATH tag allows you to specify the directory where +# the mscgen tool resides. If left empty the tool is assumed to be found in the +# default search path. + +MSCGEN_PATH = + +# If set to YES, the inheritance and collaboration graphs will hide +# inheritance and usage relations if the target is undocumented +# or is not a class. + +HIDE_UNDOC_RELATIONS = YES + +# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is +# available from the path. This tool is part of Graphviz, a graph visualization +# toolkit from AT&T and Lucent Bell Labs. The other options in this section +# have no effect if this option is set to NO (the default) + +HAVE_DOT = NO + +# By default doxygen will write a font called FreeSans.ttf to the output +# directory and reference it in all dot files that doxygen generates. This +# font does not include all possible unicode characters however, so when you need +# these (or just want a differently looking font) you can specify the font name +# using DOT_FONTNAME. You need need to make sure dot is able to find the font, +# which can be done by putting it in a standard location or by setting the +# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory +# containing the font. + +DOT_FONTNAME = FreeSans + +# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs. +# The default size is 10pt. + +DOT_FONTSIZE = 10 + +# By default doxygen will tell dot to use the output directory to look for the +# FreeSans.ttf font (which doxygen will put there itself). If you specify a +# different font using DOT_FONTNAME you can set the path where dot +# can find it using this tag. + +DOT_FONTPATH = + +# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect inheritance relations. Setting this tag to YES will force the +# the CLASS_DIAGRAMS tag to NO. + +CLASS_GRAPH = YES + +# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect implementation dependencies (inheritance, containment, and +# class references variables) of the class with other documented classes. + +COLLABORATION_GRAPH = YES + +# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for groups, showing the direct groups dependencies + +GROUP_GRAPHS = YES + +# If the UML_LOOK tag is set to YES doxygen will generate inheritance and +# collaboration diagrams in a style similar to the OMG's Unified Modeling +# Language. + +UML_LOOK = NO + +# If set to YES, the inheritance and collaboration graphs will show the +# relations between templates and their instances. + +TEMPLATE_RELATIONS = YES + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT +# tags are set to YES then doxygen will generate a graph for each documented +# file showing the direct and indirect include dependencies of the file with +# other documented files. + +INCLUDE_GRAPH = NO + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and +# HAVE_DOT tags are set to YES then doxygen will generate a graph for each +# documented header file showing the documented files that directly or +# indirectly include this file. + +INCLUDED_BY_GRAPH = NO + +# If the CALL_GRAPH and HAVE_DOT options are set to YES then +# doxygen will generate a call dependency graph for every global function +# or class method. Note that enabling this option will significantly increase +# the time of a run. So in most cases it will be better to enable call graphs +# for selected functions only using the \callgraph command. + +CALL_GRAPH = NO + +# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then +# doxygen will generate a caller dependency graph for every global function +# or class method. Note that enabling this option will significantly increase +# the time of a run. So in most cases it will be better to enable caller +# graphs for selected functions only using the \callergraph command. + +CALLER_GRAPH = NO + +# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen +# will graphical hierarchy of all classes instead of a textual one. + +GRAPHICAL_HIERARCHY = YES + +# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES +# then doxygen will show the dependencies a directory has on other directories +# in a graphical way. The dependency relations are determined by the #include +# relations between the files in the directories. + +DIRECTORY_GRAPH = YES + +# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images +# generated by dot. Possible values are png, jpg, or gif +# If left blank png will be used. + +DOT_IMAGE_FORMAT = png + +# The tag DOT_PATH can be used to specify the path where the dot tool can be +# found. If left blank, it is assumed the dot tool can be found in the path. + +DOT_PATH = + +# The DOTFILE_DIRS tag can be used to specify one or more directories that +# contain dot files that are included in the documentation (see the +# \dotfile command). + +DOTFILE_DIRS = + +# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of +# nodes that will be shown in the graph. If the number of nodes in a graph +# becomes larger than this value, doxygen will truncate the graph, which is +# visualized by representing a node as a red box. Note that doxygen if the +# number of direct children of the root node in a graph is already larger than +# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note +# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH. + +DOT_GRAPH_MAX_NODES = 50 + +# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the +# graphs generated by dot. A depth value of 3 means that only nodes reachable +# from the root by following a path via at most 3 edges will be shown. Nodes +# that lay further from the root node will be omitted. Note that setting this +# option to 1 or 2 may greatly reduce the computation time needed for large +# code bases. Also note that the size of a graph can be further restricted by +# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction. + +MAX_DOT_GRAPH_DEPTH = 0 + +# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent +# background. This is disabled by default, because dot on Windows does not +# seem to support this out of the box. Warning: Depending on the platform used, +# enabling this option may lead to badly anti-aliased labels on the edges of +# a graph (i.e. they become hard to read). + +DOT_TRANSPARENT = NO + +# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output +# files in one run (i.e. multiple -o and -T options on the command line). This +# makes dot run faster, but since only newer versions of dot (>1.8.10) +# support this, this feature is disabled by default. + +DOT_MULTI_TARGETS = NO + +# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will +# generate a legend page explaining the meaning of the various boxes and +# arrows in the dot generated graphs. + +GENERATE_LEGEND = YES + +# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will +# remove the intermediate dot files that are used to generate +# the various graphs. + +DOT_CLEANUP = YES + +#--------------------------------------------------------------------------- +# Options related to the search engine +#--------------------------------------------------------------------------- + +# The SEARCHENGINE tag specifies whether or not a search engine should be +# used. If set to NO the values of all tags below this one will be ignored. + +SEARCHENGINE = NO diff --git a/2.5/Doxyfile-offline b/2.5/Doxyfile-offline new file mode 100644 index 00000000..80b361a8 --- /dev/null +++ b/2.5/Doxyfile-offline @@ -0,0 +1,40 @@ +# Doxyfile 1.5.9 + +@INCLUDE = Doxyfile-common + + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = doc/offline-reference + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT += doc/README.bertos \ + doc/STATUS + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = YES + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = bertos-doc.chm + diff --git a/2.5/Doxyfile-snapshot b/2.5/Doxyfile-snapshot new file mode 100644 index 00000000..d4bbed28 --- /dev/null +++ b/2.5/Doxyfile-snapshot @@ -0,0 +1,38 @@ +# Doxyfile 1.5.9 + +@INCLUDE = Doxyfile-common + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = doc/reference-snapshot + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT += doc/Mainpage.snapshot + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = doc/TracHeader.html + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = + diff --git a/2.5/LICENSE.GPL b/2.5/LICENSE.GPL new file mode 100644 index 00000000..d60c31a9 --- /dev/null +++ b/2.5/LICENSE.GPL @@ -0,0 +1,340 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Library General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. To prevent this, we have made it clear that any +patent must be licensed for everyone's free use or not licensed at all. + + The precise terms and conditions for copying, distribution and +modification follow. + + GNU GENERAL PUBLIC LICENSE + TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION + + 0. This License applies to any program or other work which contains +a notice placed by the copyright holder saying it may be distributed +under the terms of this General Public License. The "Program", below, +refers to any such program or work, and a "work based on the Program" +means either the Program or any derivative work under copyright law: +that is to say, a work containing the Program or a portion of it, +either verbatim or with modifications and/or translated into another +language. (Hereinafter, translation is included without limitation in +the term "modification".) Each licensee is addressed as "you". + +Activities other than copying, distribution and modification are not +covered by this License; they are outside its scope. The act of +running the Program is not restricted, and the output from the Program +is covered only if its contents constitute a work based on the +Program (independent of having been made by running the Program). +Whether that is true depends on what the Program does. + + 1. You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. You may modify your copy or copies of the Program or any portion +of it, thus forming a work based on the Program, and copy and +distribute such modifications or work under the terms of Section 1 +above, provided that you also meet all of these conditions: + + a) You must cause the modified files to carry prominent notices + stating that you changed the files and the date of any change. + + b) You must cause any work that you distribute or publish, that in + whole or in part contains or is derived from the Program or any + part thereof, to be licensed as a whole at no charge to all third + parties under the terms of this License. + + c) If the modified program normally reads commands interactively + when run, you must cause it, when started running for such + interactive use in the most ordinary way, to print or display an + announcement including an appropriate copyright notice and a + notice that there is no warranty (or else, saying that you provide + a warranty) and that users may redistribute the program under + these conditions, and telling the user how to view a copy of this + License. (Exception: if the Program itself is interactive but + does not normally print such an announcement, your work based on + the Program is not required to print an announcement.) + +These requirements apply to the modified work as a whole. If +identifiable sections of that work are not derived from the Program, +and can be reasonably considered independent and separate works in +themselves, then this License, and its terms, do not apply to those +sections when you distribute them as separate works. But when you +distribute the same sections as part of a whole which is a work based +on the Program, the distribution of the whole must be on the terms of +this License, whose permissions for other licensees extend to the +entire whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest +your rights to work written entirely by you; rather, the intent is to +exercise the right to control the distribution of derivative or +collective works based on the Program. + +In addition, mere aggregation of another work not based on the Program +with the Program (or with a work based on the Program) on a volume of +a storage or distribution medium does not bring the other work under +the scope of this License. + + 3. You may copy and distribute the Program (or a work based on it, +under Section 2) in object code or executable form under the terms of +Sections 1 and 2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable + source code, which must be distributed under the terms of Sections + 1 and 2 above on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three + years, to give any third party, for a charge no more than your + cost of physically performing source distribution, a complete + machine-readable copy of the corresponding source code, to be + distributed under the terms of Sections 1 and 2 above on a medium + customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer + to distribute corresponding source code. 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Each time you redistribute the Program (or any work based on the +Program), the recipient automatically receives a license from the +original licensor to copy, distribute or modify the Program subject to +these terms and conditions. You may not impose any further +restrictions on the recipients' exercise of the rights granted herein. +You are not responsible for enforcing compliance by third parties to +this License. + + 7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), +conditions are imposed on you (whether by court order, agreement or +otherwise) that contradict the conditions of this License, they do not +excuse you from the conditions of this License. If you cannot +distribute so as to satisfy simultaneously your obligations under this +License and any other pertinent obligations, then as a consequence you +may not distribute the Program at all. For example, if a patent +license would not permit royalty-free redistribution of the Program by +all those who receive copies directly or indirectly through you, then +the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under +any particular circumstance, the balance of the section is intended to +apply and the section as a whole is intended to apply in other +circumstances. + +It is not the purpose of this section to induce you to infringe any +patents or other property right claims or to contest validity of any +such claims; this section has the sole purpose of protecting the +integrity of the free software distribution system, which is +implemented by public license practices. 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The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/2.5/Makefile b/2.5/Makefile new file mode 100644 index 00000000..4aee97b2 --- /dev/null +++ b/2.5/Makefile @@ -0,0 +1,20 @@ +# +# $Id$ +# Copyright 2002, 2003, 2004, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Bernie Innocenti +# + +# Set to 1 for verbose build output, 0 for terse output +V := 0 + +default: all + +include bertos/config.mk + +#Include subtargets +include examples/demo/demo.mk +#include examples/lm3s8962/lm3s8962.mk + +include bertos/rules.mk diff --git a/2.5/Makefile.test b/2.5/Makefile.test new file mode 100644 index 00000000..5b485c11 --- /dev/null +++ b/2.5/Makefile.test @@ -0,0 +1,10 @@ +#Makefile for BeRTOS test. +#This makefile was generated automatically. + +V:= 0 +default: all + +include bertos/config.mk +include ./examples/test/avrtest.mk +include ./examples/test/armtest.mk +include bertos/rules.mk diff --git a/2.5/VERSION b/2.5/VERSION new file mode 100644 index 00000000..7f36a713 --- /dev/null +++ b/2.5/VERSION @@ -0,0 +1 @@ +BeRTOS 2.5.1 diff --git a/2.5/bertos/algo/crc.c b/2.5/bertos/algo/crc.c new file mode 100644 index 00000000..c7444740 --- /dev/null +++ b/2.5/bertos/algo/crc.c @@ -0,0 +1,93 @@ +/** + * \file + * + * + * \brief CRC table and support routines + * + * \author Bernie Innocenti + */ + +#include "crc.h" + +/** + * crctab calculated by Mark G. Mendel, Network Systems Corporation + */ +#if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT)) + #define CRC_TABLE const uint16_t PROGMEM crc16tab[256] +#else + #define CRC_TABLE const uint16_t crc16tab[256] +#endif + +CRC_TABLE = { + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 +}; + +uint16_t crc16(uint16_t crc, const void *buffer, size_t len) +{ + const unsigned char *buf = (const unsigned char *)buffer; + while(len--) + crc = UPDCRC16(*buf++, crc); + + return crc; +} + diff --git a/2.5/bertos/algo/crc.h b/2.5/bertos/algo/crc.h new file mode 100644 index 00000000..c5c1eefd --- /dev/null +++ b/2.5/bertos/algo/crc.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Cyclic Redundancy Check 16 (CRC). This algorithm is the one used by the XMODEM protocol. + * + * \note This algorithm is incompatible with the CCITT-CRC16. + * + * This code is based on the article Copyright 1986 Stephen Satchell. + * + * Programmers may incorporate any or all code into their programs, + * giving proper credit within the source. Publication of the + * source routines is permitted so long as proper credit is given + * to Stephen Satchell, Satchell Evaluations and Chuck Forsberg, + * Omen Technology. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "crc16" + */ + +#ifndef ALGO_CRC_H +#define ALGO_CRC_H + +#include "cfg/cfg_arch.h" + +#include +#include + +EXTERN_C_BEGIN + +/* CRC table */ +extern const uint16_t crc16tab[256]; + + +/** + * \brief Compute the updated CRC16 value for one octet (macro version) + * + * \note This version is only intended for old/broken compilers. + * Use the inline function in new code. + * + * \param c New octet (range 0-255) + * \param oldcrc Previous CRC16 value (referenced twice, beware of side effects) + */ +#if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT)) + #define UPDCRC16(c, oldcrc) (pgm_read_uint16_t(&crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8)) +#else + #define UPDCRC16(c, oldcrc) ((crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8)) +#endif + +/** CRC-16 init value */ +#define CRC16_INIT_VAL ((uint16_t)0) + +#ifdef INLINE +/** + * \brief Compute the updated CRC16 value for one octet (inline version) + */ +INLINE uint16_t updcrc16(uint8_t c, uint16_t oldcrc) +{ +#if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT)) + return pgm_read_uint16_t(&crc16tab[(oldcrc >> 8) ^ c]) ^ (oldcrc << 8); +#else + return crc16tab[(oldcrc >> 8) ^ c] ^ (oldcrc << 8); +#endif +} +#endif // INLINE + + +/** + * This function implements the CRC 16 calculation on a buffer. + * + * \param crc Current CRC16 value. + * \param buf The buffer to perform CRC calculation on. + * \param len The length of the Buffer. + * + * \return The updated CRC16 value. + */ +extern uint16_t crc16(uint16_t crc, const void *buf, size_t len); + +int crc_testSetup(void); +int crc_testRun(void); +int crc_testTearDown(void); + +EXTERN_C_END + +#endif /* ALGO_CRC_H */ diff --git a/2.5/bertos/algo/crc_ccitt.c b/2.5/bertos/algo/crc_ccitt.c new file mode 100644 index 00000000..aed99147 --- /dev/null +++ b/2.5/bertos/algo/crc_ccitt.c @@ -0,0 +1,84 @@ +/** + * \file + * + * + * \brief CRC-CCITT table and support routines + * + * \version $Id: crc.c 2770 2009-08-05 07:57:59Z $ + * \author Francesco Sacchi + */ + +#include "crc_ccitt.h" + +const uint16_t PROGMEM crc_ccitt_tab[256] = { + 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, + 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, + 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, + 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, + 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, + 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, + 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, + 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, + 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, + 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, + 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, + 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, + 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, + 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, + 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, + 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, + 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, + 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, + 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, + 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, + 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, + 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, + 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, + 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, + 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, + 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, + 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, + 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, + 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, + 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, + 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, + 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78, +}; + +uint16_t crc_ccitt(uint16_t crc, const void *buffer, size_t len) +{ + const unsigned char *buf = (const unsigned char *)buffer; + while (len--) + crc = updcrc_ccitt(*buf++, crc); + + return crc; +} + diff --git a/2.5/bertos/algo/crc_ccitt.h b/2.5/bertos/algo/crc_ccitt.h new file mode 100644 index 00000000..40e4a81d --- /dev/null +++ b/2.5/bertos/algo/crc_ccitt.h @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief CCITT Cyclic Redundancy Check (CRC-CCITT). + * + * \note This algorithm is incompatible with the CRC16. + * + * \version $Id: crc.h 2771 2009-08-06 07:01:06Z lottaviano $ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "crc-ccitt" + */ + +#ifndef ALGO_CRC_CCITT_H +#define ALGO_CRC_CCITT_H + +#include +#include + +EXTERN_C_BEGIN + +/* CRC table */ +extern const uint16_t crc_ccitt_tab[256]; + +/** + * \brief Compute the updated CRC-CCITT value for one octet (inline version) + */ +INLINE uint16_t updcrc_ccitt(uint8_t c, uint16_t oldcrc) +{ +#if CPU_HARVARD + return (oldcrc >> 8) ^ pgm_read_uint16_t(&crc_ccitt_tab[(oldcrc ^ c) & 0xff]); +#else + return (oldcrc >> 8) ^ crc_ccitt_tab[(oldcrc ^ c) & 0xff]; +#endif +} + +/** CRC-CCITT init value */ +#define CRC_CCITT_INIT_VAL ((uint16_t)0xFFFF) + + +/** + * This function implements the CRC-CCITT calculation on a buffer. + * + * \param crc Current CRC-CCITT value. + * \param buf The buffer to perform CRC calculation on. + * \param len The length of the Buffer. + * + * \return The updated CRC-CCITT value. + */ +extern uint16_t crc_ccitt(uint16_t crc, const void *buf, size_t len); + +EXTERN_C_END + +#endif /* ALGO_CRC_CCITT_H */ diff --git a/2.5/bertos/algo/crc_test.c b/2.5/bertos/algo/crc_test.c new file mode 100644 index 00000000..7e2908d1 --- /dev/null +++ b/2.5/bertos/algo/crc_test.c @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief CRC-CCITT table and support routines + * + * \version $Id: crc.c 2770 2009-08-05 07:57:59Z $ + * \author Francesco Sacchi + */ + +#include "crc_ccitt.h" +#include "crc.h" + +#include +#include + + +int crc_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int crc_testTearDown(void) +{ + return 0; +} + +int crc_testRun(void) +{ + char vector[9] = "123456789"; + + uint16_t crc = CRC_CCITT_INIT_VAL; + + crc = crc_ccitt(crc, vector, sizeof(vector)); + kprintf("crc_ccitt [%04X]\n", crc); + ASSERT(crc == 0x6F91); + + crc = CRC16_INIT_VAL; + crc = crc16(crc, vector, sizeof(vector)); + kprintf("crc16 [%04X]\n", crc); + ASSERT(crc == 0x31C3); + + return 0; +} + +TEST_MAIN(crc); diff --git a/2.5/bertos/algo/md2.c b/2.5/bertos/algo/md2.c new file mode 100644 index 00000000..a36cc763 --- /dev/null +++ b/2.5/bertos/algo/md2.c @@ -0,0 +1,337 @@ +/** + * \file + * + * + * \brief MD2 Message-Digest algorithm. + * + * The MD2 algorithm work with a constant array of 256 permutationt + * defined in RFC1319. If you don't want to use a standard array of + * permutatione you can use a md2_perm() function that generate an + * array of 256 "casual" permutation. To swich from a standard array + * to md2_perm function you must chanche CONFIG_MD2_STD_PERM defined in + * appconfig.h. + * If you need to store array in program memory you must define + * a macro _PROGMEM (for more info see cpu/pgm.h). + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#include "md2.h" + +#include //memset(), memcpy(); +#include +#include //ASSERT() +#include //MIN(), countof(), ROTR(); +#include + + +#if CONFIG_MD2_STD_PERM + /* + * Official array of 256 byte pemutation contructed from digits of pi, defined + * in the RFC 1319. + */ + static const uint8_t PGM_ATTR md2_perm[256] = + { + 41, 46, 67, 201, 162, 216, 124, 1, 61, 54, 84, 161, 236, 240, 6, + 19, 98, 167, 5, 243, 192, 199, 115, 140, 152, 147, 43, 217, 188, + 76, 130, 202, 30, 155, 87, 60, 253, 212, 224, 22, 103, 66, 111, 24, + 138, 23, 229, 18, 190, 78, 196, 214, 218, 158, 222, 73, 160, 251, + 245, 142, 187, 47, 238, 122, 169, 104, 121, 145, 21, 178, 7, 63, + 148, 194, 16, 137, 11, 34, 95, 33, 128, 127, 93, 154, 90, 144, 50, + 39, 53, 62, 204, 231, 191, 247, 151, 3, 255, 25, 48, 179, 72, 165, + 181, 209, 215, 94, 146, 42, 172, 86, 170, 198, 79, 184, 56, 210, + 150, 164, 125, 182, 118, 252, 107, 226, 156, 116, 4, 241, 69, 157, + 112, 89, 100, 113, 135, 32, 134, 91, 207, 101, 230, 45, 168, 2, 27, + 96, 37, 173, 174, 176, 185, 246, 28, 70, 97, 105, 52, 64, 126, 15, + 85, 71, 163, 35, 221, 81, 175, 58, 195, 92, 249, 206, 186, 197, + 234, 38, 44, 83, 13, 110, 133, 40, 132, 9, 211, 223, 205, 244, 65, + 129, 77, 82, 106, 220, 55, 200, 108, 193, 171, 250, 36, 225, 123, + 8, 12, 189, 177, 74, 120, 136, 149, 139, 227, 99, 232, 109, 233, + 203, 213, 254, 59, 0, 29, 57, 242, 239, 183, 14, 102, 88, 208, 228, + 166, 119, 114, 248, 235, 117, 75, 10, 49, 68, 80, 180, 143, 237, + 31, 26, 219, 153, 141, 51, 159, 17, 131, 20 + }; + + #define MD2_PERM(x) PGM_READ_CHAR(&md2_perm[x]) +#else + /** + * Md2_perm() function generate an array of 256 "casual" permutation. + */ + + /** + * Costant define for computing an array of 256 "casual" permutation. + * \{ + */ + #define K1 5 + #define K2 3 + #define R 2 + #define X 172 + /*\}*/ + + static uint8_t md2_perm(uint8_t i) + { + + i = i * K1; + i = ROTR(i, R); + i ^= X; + i = i * K2; + + return i; + } + + #define MD2_PERM(x) md2_perm(x) + +#endif + + +/** + * Pad function. Put len_pad unsigned char in + * input block. + */ +static void md2_pad(void *_block, size_t len_pad) +{ + uint8_t *block; + + block = (uint8_t *)_block; + + ASSERT(len_pad <= CONFIG_MD2_BLOCK_LEN); + + /* + * Fill input block with len_pad char. + */ + memset(block, len_pad, len_pad); + +} + +static void md2_compute(void *_state, void *_checksum, void *_block) +{ + int i = 0; + uint16_t t = 0; + uint8_t compute_array[COMPUTE_ARRAY_LEN]; + uint8_t *state; + uint8_t *checksum; + uint8_t *block; + + state = (uint8_t *)_state; + checksum = (uint8_t *)_checksum; + block = (uint8_t *)_block; + + /* + * Copy state and checksum context in compute array. + */ + memcpy(compute_array, state, CONFIG_MD2_BLOCK_LEN); + memcpy(compute_array + CONFIG_MD2_BLOCK_LEN, block, CONFIG_MD2_BLOCK_LEN); + + /* + * Fill compute array with state XOR block + */ + for(i = 0; i < CONFIG_MD2_BLOCK_LEN; i++) + compute_array[i + (CONFIG_MD2_BLOCK_LEN * 2)] = state[i] ^ block[i]; + + /* + * Encryt block. + */ + for(i = 0; i < NUM_COMPUTE_ROUNDS; i++) + { + for(int j = 0; j < COMPUTE_ARRAY_LEN; j++) + { + compute_array[j] ^= MD2_PERM(t); + t = compute_array[j]; + } + + t = (t + i) & 0xff; //modulo 256. + } + /* + * Update checksum. + */ + t = checksum[CONFIG_MD2_BLOCK_LEN - 1]; + + for(i = 0; i < CONFIG_MD2_BLOCK_LEN; i++) + { + checksum[i] ^= MD2_PERM(block[i] ^ t); + t = checksum[i]; + } + + /* + * Update state and clean compute array. + */ + memcpy(state, compute_array, CONFIG_MD2_BLOCK_LEN); + memset(compute_array, 0, sizeof(compute_array)); +} + +/** + * Algorithm initialization. + * + * \param context empty context. + */ +void md2_init(Md2Context *context) +{ + + memset(context, 0, sizeof(Md2Context)); + +} + +/** + * Update block. + */ +void md2_update(Md2Context *context, const void *_block_in, size_t block_len) +{ + + const uint8_t *block_in; + size_t cpy_len; + + + block_in = (const uint8_t *)_block_in; + + while(block_len > 0) + { + /* + * Choose a number of block that fill input context buffer. + */ + cpy_len = MIN(block_len, CONFIG_MD2_BLOCK_LEN - context->counter); + + + /* + * Copy in the buffer input block. + */ + memcpy(&context->buffer[context->counter], block_in, cpy_len); + + /* + * Update a context counter, input block length and remaning + * context buffer block lenght. + */ + context->counter += cpy_len; + block_len -= cpy_len; + block_in += cpy_len; + + /* + * If buffer is full, compute it. + */ + if (context->counter >= CONFIG_MD2_BLOCK_LEN) + { + md2_compute(context->state, context->checksum, context->buffer); + context->counter = 0; + } + } + + +} +/** + * Ends an MD2 message digest operation. + * This fuction take an context and return a pointer + * to context state. + * + * \param context in input. + * \return a pointer to context state (message digest). + */ +uint8_t *md2_end(Md2Context *context) +{ + + uint8_t buf[CONFIG_MD2_BLOCK_LEN]; + + /* + * Fill remaning empty context buffer. + */ + md2_pad(buf, CONFIG_MD2_BLOCK_LEN - context->counter); + + /* + * Update context buffer and compute it. + */ + md2_update(context, buf, CONFIG_MD2_BLOCK_LEN - context->counter); + + /* + * Add context checksum to message input. + */ + md2_update(context, context->checksum, CONFIG_MD2_BLOCK_LEN); + + + return context->state; //return a pointer to message digest. +} +/** + * MD2 test fuction. + * This function test MD2 algorithm with a standard string specified + * in RFC 1319. + * + * \note This test work with official array of 256 byte pemutation + * contructed from digits of pi, defined in the RFC 1319. + * + */ +bool md2_test(void) +{ + + Md2Context context; + + const char *test[] = + { + "", + "message digest", + "abcdefghijklmnopqrstuvwxyz", + "12345678901234567890123456789012345678901234567890123456789012345678901234567890" + }; + + + const char *result[] = { + "\x83\x50\xe5\xa3\xe2\x4c\x15\x3d\xf2\x27\x5c\x9f\x80\x69\x27\x73", + "\xab\x4f\x49\x6b\xfb\x2a\x53\x0b\x21\x9f\xf3\x30\x31\xfe\x06\xb0", + "\x4e\x8d\xdf\xf3\x65\x02\x92\xab\x5a\x41\x08\xc3\xaa\x47\x94\x0b", + "\xd5\x97\x6f\x79\xd8\x3d\x3a\x0d\xc9\x80\x6c\x3c\x66\xf3\xef\xd8", + }; + + + for (size_t i = 0; i < countof(test); i++) + { + md2_init(&context); + md2_update(&context, test[i], strlen(test[i])); + + if(memcmp(result[i], md2_end(&context), MD2_DIGEST_LEN)) + return false; + } + + return true; +} + +#if 0 + +#include +int main(int argc, char * argv[]) +{ + + if(md2_test()) + printf("MD2 algorithm work well!\n"); + else + printf("MD2 algorithm doesn't work well.\n"); + +} + +#endif + diff --git a/2.5/bertos/algo/md2.h b/2.5/bertos/algo/md2.h new file mode 100644 index 00000000..6ddc9513 --- /dev/null +++ b/2.5/bertos/algo/md2.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MD2 Message-Digest algorithm. + * + * The algorithm takes as input a message of arbitrary length and produces + * as output a 128-bit message digest of the input. + * It is conjectured that it is computationally infeasible to produce + * two messages having the same message digest, or to produce any + * message having a given prespecified target message digest. + * + * + * \version $Id$ + * \author Daniele Basile + * + * $WIZ$ module_name = "md2" + * $WIZ$ module_configuration = "bertos/cfg/cfg_md2.h" + */ + +#ifndef ALGO_MD2_H +#define ALGO_MD2_H + +#include "cfg/cfg_md2.h" +#include + +#define NUM_COMPUTE_ROUNDS 18 ///< Number of compute rounds. +#define COMPUTE_ARRAY_LEN CONFIG_MD2_BLOCK_LEN * 3 ///< Lenght of compute array. +#define MD2_DIGEST_LEN CONFIG_MD2_BLOCK_LEN +/** + * Context for MD2 computation. + */ +typedef struct Md2Context +{ + uint8_t buffer[CONFIG_MD2_BLOCK_LEN]; ///< Input buffer. + uint8_t state[CONFIG_MD2_BLOCK_LEN]; ///< Current state buffer. + uint8_t checksum[CONFIG_MD2_BLOCK_LEN]; ///< Checksum. + size_t counter; ///< Counter of remaining bytes. + +} Md2Context; + +void md2_init(Md2Context *context); +void md2_update(Md2Context *context, const void *block_in, size_t block_len); +uint8_t *md2_end(Md2Context *context); +bool md2_test(void); + +#endif /* ALGO_MD2_H */ diff --git a/2.5/bertos/algo/mean.h b/2.5/bertos/algo/mean.h new file mode 100644 index 00000000..893241e2 --- /dev/null +++ b/2.5/bertos/algo/mean.h @@ -0,0 +1,41 @@ +#warning revise me! + + +/** + * DECLARE_SMEAN(temperature, uint8_t, uint16_t); + * for (i = 0; i < TEMP_MEANS; ++i) + * SMEAN_ADD(temperature, adc_get(), TEMP_MEANS); + * printf("mean temperature = %d\n", SMEAN_GET(temperature)); + */ + +/** + * Instantiate a mean instance + */ +#define DECLARE_SMEAN(name, Type, SumType) \ + struct { \ + SumType sum; \ + Type result; \ + int count; \ + } name = { 0, 0, 0 } + +/** + * Insert a new sample into the mean. + * + * \note \a mean and \a max_samples are evaluated multiple times + */ +#define SMEAN_ADD(mean, sample, max_samples) \ + do { \ + (mean).sum += (sample); \ + if ((mean).count++ >= (max_samples)) \ + { \ + (mean).result = (mean).sum / (max_samples); \ + (mean).sum = 0; \ + (mean).count = 0; \ + } \ + } while (0) + +/** + * Return current mean value. + */ +#define SMEAN_GET(mean) ((mean).result) + diff --git a/2.5/bertos/algo/pid_control.c b/2.5/bertos/algo/pid_control.c new file mode 100644 index 00000000..df127e43 --- /dev/null +++ b/2.5/bertos/algo/pid_control.c @@ -0,0 +1,116 @@ +/** + * \file + * + * + * + * \brief Proportional, integral, derivative controller (PID controller) (implementation) + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#include "pid_control.h" + +#include "cfg/cfg_pid.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PID_LOG_LEVEL +#define LOG_VERBOSITY PID_LOG_FORMAT + +#include +#include + +/** + * Compute next value for reaching \a target point. + */ +piddata_t pid_control_update(PidContext *pid_ctx, piddata_t target, piddata_t curr_pos) +{ + piddata_t P; + piddata_t I; + piddata_t D; + piddata_t err; + + //Compute current error. + err = target - curr_pos; + + /* + * Compute Proportional contribute + */ + P = err * pid_ctx->cfg->kp; + + //Update integral state error + pid_ctx->i_state += err; + + //Clamp integral state between i_min and i_max + pid_ctx->i_state = MINMAX(pid_ctx->cfg->i_min, pid_ctx->i_state, pid_ctx->cfg->i_max); + + /* + * Compute Integral contribute + * + * note: for computing the integral contribute we use a sample period in seconds + * and so we divide sample_period in microsenconds for 1000. + */ + I = pid_ctx->i_state * pid_ctx->cfg->ki * ((piddata_t)pid_ctx->cfg->sample_period / 1000); + + + /* + * Compute derivative contribute + */ + D = (err - pid_ctx->prev_err) * pid_ctx->cfg->kd / ((piddata_t)pid_ctx->cfg->sample_period / 1000); + + + LOG_INFO("curr_pos[%lf],tgt[%lf],err[%f],P[%f],I[%f],D[%f]", curr_pos, target, err, P, I, D); + + + //Store the last error value + pid_ctx->prev_err = err; + piddata_t pid = MINMAX(pid_ctx->cfg->out_min, (P + I + D), pid_ctx->cfg->out_max); + + LOG_INFO("pid[%lf]",pid); + + //Clamp out between out_min and out_max + return pid; +} + +/** + * Init PID control. + */ +void pid_control_init(PidContext *pid_ctx, const PidCfg *pid_cfg) +{ + /* + * Init all values of pid control struct + */ + pid_ctx->cfg = pid_cfg; + + pid_control_reset(pid_ctx); + +} + diff --git a/2.5/bertos/algo/pid_control.h b/2.5/bertos/algo/pid_control.h new file mode 100644 index 00000000..ead5faa7 --- /dev/null +++ b/2.5/bertos/algo/pid_control.h @@ -0,0 +1,116 @@ +/** + * \file + * + * + * + * \brief Proportional, integral, derivative controller (PID controller). + * + * \version $Id$ + * + * \author Daniele Basile + * + * $WIZ$ module_name = "pid_control" + * $WIZ$ module_depends = "timer" + */ + +#ifndef ALGO_PID_CONTROL_H +#define ALGO_PID_CONTROL_H + +#include + +/** + * Data type for pid coefficient. + */ +typedef float pidk_t; +typedef float piddata_t; + +/** + * PID context structure. + */ +typedef struct PidCfg +{ + pidk_t kp; ///< Proportional term of PID control method (Gain). + pidk_t ki; ///< Integral term of PID control method (Integral Gain). + pidk_t kd; ///< Derivative of PID control method (Derivative Gain). + + piddata_t i_max; ///< Max value of integral term. + piddata_t i_min; ///< Min value of integral term. + + piddata_t out_max; ///< Man value of output. + piddata_t out_min; ///< Min value of output. + + mtime_t sample_period; ///< Sample period in milliseconds. + +} PidCfg; + + +/** + * PID context structure. + */ +typedef struct PidContext +{ + const PidCfg *cfg; + + piddata_t prev_err; ///< Previous error. + piddata_t i_state; ///< Integrator state (sum of all the preceding errors). + +} PidContext; + +/** + * Set Kp, Ki, Kd constants of PID control. + */ +INLINE void pid_control_setPid(PidCfg *pid_cfg, pidk_t kp, pidk_t ki, pidk_t kd) +{ + pid_cfg->kp = kp; + pid_cfg->ki = ki; + pid_cfg->kd = kd; +} + +/** + * Set sample period for PID control. + */ +INLINE void pid_control_setPeriod(PidCfg *pid_cfg, mtime_t sample_period) +{ + pid_cfg->sample_period = sample_period; +} + +/** + * Clear a pid control structure + */ +INLINE void pid_control_reset(PidContext *pid_ctx) +{ + pid_ctx->i_state = 0; + pid_ctx->prev_err = 0; +} + +piddata_t pid_control_update(PidContext *pid_ctx, piddata_t target, piddata_t curr_pos); +void pid_control_init(PidContext *pid_ctx, const PidCfg *pid_cfg); + +#endif /* ALGO_PID_CONTROL_H */ diff --git a/2.5/bertos/algo/ramp.c b/2.5/bertos/algo/ramp.c new file mode 100644 index 00000000..1b5dd9cd --- /dev/null +++ b/2.5/bertos/algo/ramp.c @@ -0,0 +1,201 @@ +/*! + * \file + * + * + * \brief Compute, save and load ramps for stepper motors (implementation) + * + * \version $Id$ + * + * \author Simone Zinanni + * \author Bernie Innocenti + * \author Giovanni Bajo + * \author Daniele Basile + * + * + * The formula used by the ramp is the following: + * + * 
+ *            a * b
+ * f(t) = -------------
+ *         lerp(a,b,t)
+ *
+ * + * Where a and b are the maximum and minimum speed + * respectively (minimum and maximum wavelength respectively), and lerp + * is a linear interpolation with a factor: + * + * 
+ * lerp(a,b,t) =  a + t * (b - a)  =  (a * (1 - t)) + (b * t)
+ *
+ * + * t must be in the [0,1] interval. It is easy to see that the + * following holds true: + * + * 
+ * f(0) = b,   f(1) = a
+ *
+ * + * And that the function is monotonic. So, the function effectively interpolates + * between the maximum and minimum speed through its domain ([0,1] -> [b,a]). + * + * The curve drawn by this function is similar to 1 / (sqrt(n)), so it is slower + * than a linear acceleration (which would be 1/n). + * + * The floating point version uses a slightly modified function which accepts + * the parameter in the domain [0, MT] (where MT is maxTime, the length of the + * ramp, which is a setup parameter for the ramp). This is done to reduce the + * number of operations per step. The formula looks like this: + * + * 
+ *               a * b * MT
+ * g(t) = ----------------------------
+ *           (a * MT) + t * (b - a)
+ *
+ * + * It can be shown that this g(t) = f(t * MT). The denominator + * is a linear interpolation in the range [b*MT, a*MT], as t moves in the + * interval [0, MT]. So the interpolation interval of the function is again + * [b, a]. The implementation caches the value of the numerator and parts + * of the denominator, so that the formula becomes: + * + * 
+ * alpha = a * b * MT
+ * beta = a * MT
+ * gamma = b - a
+ *
+ *                alpha
+ * g(t) = ----------------------
+ *           beta + t * gamma
+ *
+ * + * and t is exactly the parameter that ramp_evaluate() gets, + * that is the current time (in range [0, MT]). The operations performed + * for each step are just an addition, a multiplication and a division. + * + * The fixed point version of the formula instead transforms the original + * function as follows: + * + * 
+ *                   a * b                         a
+ *  f(t) =  -------------------------  =  --------------------
+ *                 a                         a
+ *           b * ( - * (1 - t) + t )         - * (1 - t) + t
+ *                 b                         b
+ *
+ * + * t must be computed by dividing the current time (24 bit integer) + * by the maximum time (24 bit integer). This is done by precomputing the + * reciprocal of the maximum time as a 0.32 fixed point number, and multiplying + * it to the current time. Multiplication is performed 8-bits a time by + * FIX_MULT32(), so that we end up with a 0.16 fixed point number for + * t (and 1-t is just its twos-complement negation). + * a/b is in the range [0,1] (because a is always less than b, + * being the minimum wavelength), so it is precomputed as a 0.16 fixed point. + * The final step is then computing the denominator and executing the division + * (32 cycles using the 1-step division instruction in the DSP). + * + * The assembly implementation is needed for efficiency, but a C version of it + * can be easily written, in case it is needed in the future. + * + */ + +#include "ramp.h" +#include + +#include // memcpy() + +void ramp_compute(struct Ramp *ramp, uint32_t clocksRamp, uint16_t clocksMinWL, uint16_t clocksMaxWL) +{ + ASSERT(clocksMaxWL >= clocksMinWL); + + // Save values in ramp struct + ramp->clocksRamp = clocksRamp; + ramp->clocksMinWL = clocksMinWL; + ramp->clocksMaxWL = clocksMaxWL; + +#if RAMP_USE_FLOATING_POINT + ramp->precalc.gamma = ramp->clocksMaxWL - ramp->clocksMinWL; + ramp->precalc.beta = (float)ramp->clocksMinWL * (float)ramp->clocksRamp; + ramp->precalc.alpha = ramp->precalc.beta * (float)ramp->clocksMaxWL; + +#else + ramp->precalc.max_div_min = ((uint32_t)clocksMinWL << 16) / (uint32_t)clocksMaxWL; + + /* Calcola 1/total_time in fixed point .32. Assumiamo che la rampa possa al + * massimo avere 25 bit (cioé valore in tick fino a 2^25, che con il + * prescaler=3 sono circa 7 secondi). Inoltre, togliamo qualche bit di precisione + * da destra (secondo quanto specificato in RAMP_CLOCK_SHIFT_PRECISION). + */ + ASSERT(ramp->clocksRamp < (1UL << (24 + RAMP_CLOCK_SHIFT_PRECISION))); + ramp->precalc.inv_total_time = 0xFFFFFFFFUL / (ramp->clocksRamp >> RAMP_CLOCK_SHIFT_PRECISION); + ASSERT(ramp->precalc.inv_total_time < 0x1000000UL); + +#endif +} + + +void ramp_setup(struct Ramp* ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq) +{ + uint32_t minWL, maxWL; + + minWL = TIME2CLOCKS(FREQ2MICROS(maxFreq)); + maxWL = TIME2CLOCKS(FREQ2MICROS(minFreq)); + + ASSERT2(minWL < 65536UL, "Maximum frequency too high"); + ASSERT2(maxWL < 65536UL, "Minimum frequency too high"); + ASSERT(maxFreq > minFreq); + + ramp_compute( + ramp, + TIME2CLOCKS(length), + TIME2CLOCKS(FREQ2MICROS(maxFreq)), + TIME2CLOCKS(FREQ2MICROS(minFreq)) + ); +} + +void ramp_default(struct Ramp *ramp) +{ + ramp_setup(ramp, RAMP_DEF_TIME, RAMP_DEF_MINFREQ, RAMP_DEF_MAXFREQ); +} + +#if RAMP_USE_FLOATING_POINT + +float ramp_evaluate(const struct Ramp* ramp, float curClock) +{ + return ramp->precalc.alpha / (curClock * ramp->precalc.gamma + ramp->precalc.beta); +} + +#else + +INLINE uint32_t fix_mult32(uint32_t m1, uint32_t m2) +{ + uint32_t accum = 0; + accum += m1 * ((m2 >> 0) & 0xFF); + accum >>= 8; + accum += m1 * ((m2 >> 8) & 0xFF); + accum >>= 8; + accum += m1 * ((m2 >> 16) & 0xFF); + return accum; +} + +// a*b >> 16 +INLINE uint16_t fix_mult16(uint16_t a, uint32_t b) +{ + return (b*(uint32_t)a) >> 16; +} + +uint16_t FAST_FUNC ramp_evaluate(const struct Ramp* ramp, uint32_t curClock) +{ + uint16_t t = FIX_MULT32(curClock >> RAMP_CLOCK_SHIFT_PRECISION, ramp->precalc.inv_total_time); + uint16_t denom = fix_mult16((uint16_t)~t + 1, ramp->precalc.max_div_min) + t; + uint16_t cur_delta = ((uint32_t)ramp->clocksMinWL << 16) / denom; + + return cur_delta; +} + +#endif + + diff --git a/2.5/bertos/algo/ramp.h b/2.5/bertos/algo/ramp.h new file mode 100644 index 00000000..6ec37c8c --- /dev/null +++ b/2.5/bertos/algo/ramp.h @@ -0,0 +1,167 @@ +/** + * \file + * + * + * \brief Compute, save and load ramps for stepper motors. + * + * The acceleration ramp is used to properly accelerate a stepper motor. The main + * entry point is the function ramp_evaluate(), which must be called at every step + * of the motor: it gets as input the time elapsed since the stepper started + * accelerating, and returns the time to wait before sending the next step. A pseudo + * usage pattern is as follows: + * + * 
+ *  float time = 0;
+ *  while (1)
+ *  {
+ *      float delta = ramp_evaluate(&my_ramp, time);
+ *      sleep(delta);
+ *      do_motor_step();
+ *      time += delta;
+ *  }
+ *
+ * + * A similar pattern can be used to decelerate (it is sufficient to move the total + * time backward, such as "time -= delta"). + * + * The ramp can be configured with ramp_setup(), providing it with the minimum and + * maximum operating frequency of the motor, and the total acceleration time in + * milliseconds (that is, the time that will be needed to accelerate from the + * minimum frequency to the maximum frequency). + * + * Both a very precise floating point and a very fast fixed point implementation + * of the ramp evaluation are provided. The fixed point is hand-optimized assembly + * for DSP56000 (but a portable C version of it can be easily written, see the + * comments in the code). + * + * \version $Id$ + * + * \author Simone Zinanni + * \author Giovanni Bajo + * \author Daniele Basile + * + * $WIZ$ module_name = "ramp" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ramp.h" + */ + +#ifndef ALGO_RAMP_H +#define ALGO_RAMP_H + +#include "hw/hw_stepper.h" + +#include "cfg/cfg_ramp.h" + +#include + + +/** + * Convert microseconds to timer clock ticks + */ +#define TIME2CLOCKS(micros) ((uint32_t)(micros) * (STEPPER_CLOCK / 1000000)) + +/** + * Convert timer clock ticks back to microseconds + */ +#define CLOCKS2TIME(clocks) ((uint32_t)(clocks) / (STEPPER_CLOCK / 1000000)) + +/** + * Convert microseconds to Hz + */ +#define MICROS2FREQ(micros) (1000000UL / ((uint32_t)(micros))) + +/** + * Convert frequency (in Hz) to time (in microseconds) + */ +#define FREQ2MICROS(hz) (1000000UL / ((uint32_t)(hz))) + +/** + * Multiply \p a and \p b two integer at 32 bit and extract the high 16 bit word. + */ +#define FIX_MULT32(a,b) (((uint64_t)(a)*(uint32_t)(b)) >> 16) + +/** + * Structure holding pre-calculated data for speeding up real-time evaluation + * of the ramp. This structure is totally different between the fixed and the + * floating point version of the code. + * + * Consult the file-level documentation of ramp.c for more information about + * the values of this structure. + */ +struct RampPrecalc +{ +#if RAMP_USE_FLOATING_POINT + float beta; + float alpha; + float gamma; +#else + uint16_t max_div_min; + uint32_t inv_total_time; +#endif +}; + + +/** + * Ramp structure + */ +struct Ramp +{ + uint32_t clocksRamp; + uint16_t clocksMinWL; + uint16_t clocksMaxWL; + + struct RampPrecalc precalc; ///< pre-calculated values for speed +}; + + +/* + * Function prototypes + */ +void ramp_compute( + struct Ramp * ramp, + uint32_t clocksInRamp, + uint16_t clocksInMinWavelength, + uint16_t clocksInMaxWavelength); + + +/** Setup an acceleration ramp for a stepper motor + * + * \param ramp Ramp to fill + * \param length Length of the ramp (milliseconds) + * \param minFreq Minimum operating frequency of the motor (hertz) + * \param maxFreq Maximum operating frequency of the motor (hertz) + * + */ +void ramp_setup(struct Ramp* ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq); + + +/** + * Initialize a new ramp with default values + */ +void ramp_default(struct Ramp *ramp); + + +/** + * Evaluate the ramp at the given point. Given a \a ramp, and the current \a clock since + * the start of the acceleration, compute the next step, that is the interval at which + * send the signal to the motor. + * + * \note The fixed point version does not work when curClock is zero. Anyway, + * the first step is always clocksMaxWL, as stored within the ramp structure. + */ +#if RAMP_USE_FLOATING_POINT + float ramp_evaluate(const struct Ramp* ramp, float curClock); +#else + uint16_t ramp_evaluate(const struct Ramp* ramp, uint32_t curClock); +#endif + + +/** Self test */ +int ramp_testSetup(void); +int ramp_testRun(void); +int ramp_testTearDown(void); + +#endif /* ALGO_RAMP_H */ + diff --git a/2.5/bertos/algo/ramp_test.c b/2.5/bertos/algo/ramp_test.c new file mode 100644 index 00000000..7666662f --- /dev/null +++ b/2.5/bertos/algo/ramp_test.c @@ -0,0 +1,187 @@ +/*! + * \file + * + * + * \brief Test for compute, save and load ramps for stepper motors (implementation) + * + * \version $Id$ + * + * \author Simone Zinanni + * \author Bernie Innocenti + * \author Giovanni Bajo + * \author Daniele Basile + * + * + * The formula used by the ramp is the following: + * + * 
+ *            a * b
+ * f(t) = -------------
+ *         lerp(a,b,t)
+ *
+ * + * Where a and b are the maximum and minimum speed + * respectively (minimum and maximum wavelength respectively), and lerp + * is a linear interpolation with a factor: + * + * 
+ * lerp(a,b,t) =  a + t * (b - a)  =  (a * (1 - t)) + (b * t)
+ *
+ * + * t must be in the [0,1] interval. It is easy to see that the + * following holds true: + * + * 
+ * f(0) = b,   f(1) = a
+ *
+ * + * And that the function is monotonic. So, the function effectively interpolates + * between the maximum and minimum speed through its domain ([0,1] -> [b,a]). + * + * The curve drawn by this function is similar to 1 / (sqrt(n)), so it is slower + * than a linear acceleration (which would be 1/n). + * + * The floating point version uses a slightly modified function which accepts + * the parameter in the domain [0, MT] (where MT is maxTime, the length of the + * ramp, which is a setup parameter for the ramp). This is done to reduce the + * number of operations per step. The formula looks like this: + * + * 
+ *               a * b * MT
+ * g(t) = ----------------------------
+ *           (a * MT) + t * (b - a)
+ *
+ * + * It can be shown that this g(t) = f(t * MT). The denominator + * is a linear interpolation in the range [b*MT, a*MT], as t moves in the + * interval [0, MT]. So the interpolation interval of the function is again + * [b, a]. The implementation caches the value of the numerator and parts + * of the denominator, so that the formula becomes: + * + * 
+ * alpha = a * b * MT
+ * beta = a * MT
+ * gamma = b - a
+ *
+ *                alpha
+ * g(t) = ----------------------
+ *           beta + t * gamma
+ *
+ * + * and t is exactly the parameter that ramp_evaluate() gets, + * that is the current time (in range [0, MT]). The operations performed + * for each step are just an addition, a multiplication and a division. + * + * The fixed point version of the formula instead transforms the original + * function as follows: + * + * 
+ *                   a * b                         a
+ *  f(t) =  -------------------------  =  --------------------
+ *                 a                         a
+ *           b * ( - * (1 - t) + t )         - * (1 - t) + t
+ *                 b                         b
+ *
+ * + * t must be computed by dividing the current time (24 bit integer) + * by the maximum time (24 bit integer). This is done by precomputing the + * reciprocal of the maximum time as a 0.32 fixed point number, and multiplying + * it to the current time. Multiplication is performed 8-bits a time by + * FIX_MULT32(), so that we end up with a 0.16 fixed point number for + * t (and 1-t is just its twos-complement negation). + * a/b is in the range [0,1] (because a is always less than b, + * being the minimum wavelength), so it is precomputed as a 0.16 fixed point. + * The final step is then computing the denominator and executing the division + * (32 cycles using the 1-step division instruction in the DSP). + * + * The assembly implementation is needed for efficiency, but a C version of it + * can be easily written, in case it is needed in the future. + * + */ + +#include "ramp.h" +#include +#include + + +static bool ramp_test_single(uint32_t minFreq, uint32_t maxFreq, uint32_t length) +{ + struct Ramp r; + uint16_t cur, old; + uint32_t clock; + uint32_t oldclock; + + ramp_setup(&r, length, minFreq, maxFreq); + + cur = old = r.clocksMaxWL; + clock = 0; + oldclock = 0; + + kprintf("testing ramp: (length=%lu, min=%lu, max=%lu)\n", (unsigned long)length, (unsigned long)minFreq, (unsigned long)maxFreq); + kprintf(" [length=%lu, max=%04x, min=%04x]\n", (unsigned long)r.clocksRamp, r.clocksMaxWL, r.clocksMinWL); + + int i = 0; + int nonbyte = 0; + + while (clock + cur < r.clocksRamp) + { + oldclock = clock; + old = cur; + + clock += cur; + cur = ramp_evaluate(&r, clock); + + if (old < cur) + { + uint16_t t1 = FIX_MULT32(oldclock >> RAMP_CLOCK_SHIFT_PRECISION, r.precalc.inv_total_time); + uint16_t t2 = FIX_MULT32(clock >> RAMP_CLOCK_SHIFT_PRECISION, r.precalc.inv_total_time); + uint16_t denom1 = FIX_MULT32((uint16_t)((~t1) + 1), r.precalc.max_div_min) + t1; + uint16_t denom2 = FIX_MULT32((uint16_t)((~t2) + 1), r.precalc.max_div_min) + t2; + + kprintf(" Failed: %04x @ %lu --> %04x @ %lu\n", old, (unsigned long)oldclock, cur, (unsigned long)clock); + kprintf(" T: %04x -> %04x\n", t1, t2); + kprintf(" DENOM: %04x -> %04x\n", denom1, denom2); + + cur = ramp_evaluate(&r, clock); + return false; + } + i++; + if ((old-cur) >= 256) + nonbyte++; + } + + + + kprintf("Test finished: %04x @ %lu [min=%04x, totlen=%lu, numsteps:%d, nonbyte:%d]\n", cur, (unsigned long)clock, r.clocksMinWL, (unsigned long)r.clocksRamp, i, nonbyte); + + return true; +} + +int ramp_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int ramp_testTearDown(void) +{ + return 0; +} + +int ramp_testRun(void) +{ + #define TEST_RAMP(min, max, len) do { \ + if (!ramp_test_single(min, max, len)) \ + return -1; \ + } while(0) + + TEST_RAMP(200, 5000, 3000000); + TEST_RAMP(1000, 2000, 1000000); + + return 0; +} + +TEST_MAIN(ramp); diff --git a/2.5/bertos/algo/rand.c b/2.5/bertos/algo/rand.c new file mode 100644 index 00000000..64785176 --- /dev/null +++ b/2.5/bertos/algo/rand.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Very simple rand() algorithm. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "rand.h" + +/** + * This would really belong to libc + */ +int rand(void) +{ + static unsigned long seed; + + /* Randomize seed */ + seed = (seed ^ 0x4BAD5A39UL) + 6513973UL; + + return (int)(seed>>16); +} diff --git a/2.5/bertos/algo/rand.h b/2.5/bertos/algo/rand.h new file mode 100644 index 00000000..b724c3db --- /dev/null +++ b/2.5/bertos/algo/rand.h @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Very simple rand() algorithm. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef RAND_H +#define RAND_H + +int rand(void); + +#endif diff --git a/2.5/bertos/algo/randpool.c b/2.5/bertos/algo/randpool.c new file mode 100644 index 00000000..e231c165 --- /dev/null +++ b/2.5/bertos/algo/randpool.c @@ -0,0 +1,258 @@ +/** + * \file + * + * + * \brief API function for to manage entropy pool. + * + * \version $Id$ + * \author Daniele Basile + */ + +#include "randpool.h" +#include "md2.h" + +#include +#include //ASSERT() +#include //MIN(), ROUND_UP(); + +#include //sprintf(); +#include //memset(), memcpy(); + +#if CONFIG_RANDPOOL_TIMER + #include //timer_clock(); +#endif + + + +/* + * Insert bytes in entropy pool, making a XOR of bytes present + * in entropy pool. + */ +static void randpool_push(EntropyPool *pool, void *_byte, size_t n_byte) +{ + size_t i = pool->pos_add; // Current number of byte insert in entropy pool. + uint8_t *byte; + + byte = (uint8_t *)_byte; + + /* + * Insert a bytes in entropy pool. + */ + for(size_t j = 0; j < n_byte; j++) + { + pool->pool_entropy[i] = pool->pool_entropy[i] ^ byte[j]; + i++; + i = i % CONFIG_SIZE_ENTROPY_POOL; + } + + pool->pos_add = i; // Update a insert bytes. +} + + +/* + * This function stir entropy pool with MD2 function hash. + * + */ +static void randpool_stir(EntropyPool *pool) +{ + size_t entropy = pool->entropy; //Save current calue of entropy. + Md2Context context; + uint8_t tmp_buf[((sizeof(size_t) * 2) + sizeof(int)) * 2 + 1]; //Temporary buffer. + + md2_init(&context); //Init MD2 algorithm. + + randpool_add(pool, NULL, 0); + + for (int i = 0; i < (CONFIG_SIZE_ENTROPY_POOL / MD2_DIGEST_LEN); i++) + { + sprintf((char *)tmp_buf, "%0x%0x%0x", pool->counter, i, pool->pos_add); + + /* + * Hash with MD2 algorithm the entropy pool. + */ + md2_update(&context, pool->pool_entropy, CONFIG_SIZE_ENTROPY_POOL); + + md2_update(&context, tmp_buf, sizeof(tmp_buf) - 1); + + /*Insert a message digest in entropy pool.*/ + randpool_push(pool, md2_end(&context), MD2_DIGEST_LEN); + + pool->counter = pool->counter + 1; + + } + + /*Insert in pool the difference between a two call of this function (see above).*/ + randpool_add(pool, NULL, 0); + + pool->entropy = entropy; //Restore old value of entropy. We haven't add entropy. +} + +/** + * Add \param entropy bits from \param data buffer to the entropy \param pool + */ +void randpool_add(EntropyPool *pool, void *data, size_t entropy) +{ + uint8_t sep[] = "\xaa\xaa\xaa\xaa"; // ?? + size_t data_len = ROUND_UP(entropy, 8) / 8; //Number of entropy byte in input. + + randpool_push(pool, data, data_len); //Insert data to entropy pool. + +#if CONFIG_RANDPOOL_TIMER + + ticks_t event = timer_clock(); + ticks_t delta; + + /*Difference of time between a two accese to entropy pool.*/ + delta = event - pool->last_counter; + + randpool_push(pool, &event, sizeof(ticks_t)); + randpool_push(pool, sep, sizeof(sep) - 1); // ?? + randpool_push(pool, &delta, sizeof(delta)); + + /* + * Count of number entropy bit add with delta. + */ + delta = delta & 0xff; + while(delta) + { + delta >>= 1; + entropy++; + } + + pool->last_counter = event; + +#endif + + pool->entropy += entropy; //Update a entropy of the pool. +} + +/** + * Randpool function initialization. + * The entropy pool can be initialize also with + * a previous entropy pool. + */ +void randpool_init(EntropyPool *pool, void *_data, size_t len) +{ + uint8_t *data; + + data = (uint8_t *)_data; + + memset(pool, 0, sizeof(EntropyPool)); + pool->pos_get = MD2_DIGEST_LEN; + +#if CONFIG_RANDPOOL_TIMER + pool->last_counter = timer_clock(); +#endif + + if(data) + { + /* + * Initialize a entropy pool with a + * previous pool, and assume all pool as + * entropy. + */ + len = MIN(len,(size_t)CONFIG_SIZE_ENTROPY_POOL); + memcpy(pool->pool_entropy, data, len); + pool->entropy = len; + } + +} + +/** + * Get the actual value of entropy. + */ +size_t randpool_size(EntropyPool *pool) +{ + return pool->entropy; +} + +/** + * Get \param n_byte from entropy pool. If n_byte is larger than number + * byte of entropy in entropy pool, randpool_get continue + * to generate pseudocasual value from previous state of + * pool. + * \param n_byte number fo bytes to read. + * \param pool is the pool entropy context. + * \param _data is the pointer to write the random data to. + */ +void randpool_get(EntropyPool *pool, void *_data, size_t n_byte) +{ + Md2Context context; + size_t i = pool->pos_get; + size_t n = n_byte; + size_t pos_write = 0; //Number of block has been written in data. + size_t len = MIN((size_t)MD2_DIGEST_LEN, n_byte); + uint8_t *data; + + data = (uint8_t *)_data; + + /* Test if i + CONFIG_MD2_BLOCK_LEN is inside of entropy pool.*/ + ASSERT((MD2_DIGEST_LEN + i) <= CONFIG_SIZE_ENTROPY_POOL); + + md2_init(&context); + + while(n > 0) + { + + /*Hash previous state of pool*/ + md2_update(&context, &pool->pool_entropy[i], MD2_DIGEST_LEN); + + memcpy(&data[pos_write], md2_end(&context), len); + + pos_write += len; //Update number of block has been written in data. + n -= len; //Number of byte copied in data. + + len = MIN(n,(size_t)MD2_DIGEST_LEN); + + i = (i + MD2_DIGEST_LEN) % CONFIG_SIZE_ENTROPY_POOL; + + /* If we haven't more entropy pool to hash, we stir it.*/ + if(i < MD2_DIGEST_LEN) + { + randpool_stir(pool); + i = pool->pos_get; + } + + } + + pool->pos_get = i; //Current number of byte we get from pool. + pool->entropy -= n_byte; //Update a entropy. + +} + +/** + * Return a pointer to entropy pool. + */ +uint8_t *randpool_pool(EntropyPool *pool) +{ + return pool->pool_entropy; +} + diff --git a/2.5/bertos/algo/randpool.h b/2.5/bertos/algo/randpool.h new file mode 100644 index 00000000..b3e678cb --- /dev/null +++ b/2.5/bertos/algo/randpool.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Collection of functions to manage entropy pool. + * + * + * \version $Id$ + * \author Daniele Basile + * + * $WIZ$ module_name = "randpool" + * $WIZ$ module_depends = "timer", "sprintf" + * $WIZ$ module_configuration = "bertos/cfg/cfg_randpool.h" + */ + +#ifndef ALGO_RANDPOOL_H +#define ALGO_RANDPOOL_H + +#include "cfg/cfg_randpool.h" +#include + + +/** + * Sturct data of entropy pool. + */ +typedef struct EntropyPool +{ + size_t entropy; ///< Actual value of entropy (byte). + size_t pos_add; ///< Number of byte added in entropy pool. + size_t pos_get; ///< Number of byte got in entropy pool. + size_t counter; ///< Counter. + +#if CONFIG_RANDPOOL_TIMER + size_t last_counter; ///< Last timer value. +#endif + + uint8_t pool_entropy[CONFIG_SIZE_ENTROPY_POOL]; ///< Entropy pool. + +} EntropyPool; + + +void randpool_add(EntropyPool *pool, void *data, size_t entropy); +void randpool_init(EntropyPool *pool, void *_data, size_t len); +size_t randpool_size(EntropyPool *pool); +void randpool_get(EntropyPool *pool, void *data, size_t n_byte); +uint8_t *randpool_pool(EntropyPool *pool); + +#endif /* ALGO_RANDPOOL_H */ diff --git a/2.5/bertos/algo/reverse_test.c b/2.5/bertos/algo/reverse_test.c new file mode 100644 index 00000000..d09de0e9 --- /dev/null +++ b/2.5/bertos/algo/reverse_test.c @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief REVERSE macro test. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include +#include +#include + + +/* Silent compiler warning */ +int reverse_testSetup(void); +int reverse_testRun(void); +int reverse_testTearDown(void); + + +int reverse_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int reverse_testTearDown(void) +{ + return 0; +} + +/** + * Naive reverse implementation. + */ +static uint8_t reverse(uint8_t b) +{ + uint8_t r = 0; + + for (int i = 0; i < 8; i++) + { + r <<= 1; + r |= (b & BV(i)) ? 1 : 0; + } + + return r; +} + +int reverse_testRun(void) +{ + for (int i = 0; i < 256; i++) + { + kprintf("i [%02X], REVERSE(i) [%02X], reverse(i) [%02X]\n", i, REVERSE_UINT8(i), reverse(i)); + ASSERT(reverse(i) == REVERSE_UINT8(i)); + } + return 0; +} + +TEST_MAIN(reverse); diff --git a/2.5/bertos/algo/rle.c b/2.5/bertos/algo/rle.c new file mode 100644 index 00000000..66701e94 --- /dev/null +++ b/2.5/bertos/algo/rle.c @@ -0,0 +1,151 @@ +/** + * \file + * + * + * \brief General-purpose run-length {en,de}coding algorithm (implementation) + * + * Original source code from http://www.compuphase.com/compress.htm + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "rle.h" + + +/** + * Run-length encode \a len bytes from the \a input buffer + * to the \a output buffer. + */ +int rle(unsigned char *output, const unsigned char *input, int len) +{ + int count, index, i; + unsigned char first; + unsigned char *out; + + + out = output; + count = 0; + while (count < len) + { + index = count; + first = input[index++]; + + /* Scan for bytes identical to the first one */ + while ((index < len) && (index - count < 127) && (input[index] == first)) + index++; + + if (index - count == 1) + { + /* Failed to "replicate" the current byte. See how many to copy. + */ + while ((index < len) && (index - count < 127)) + { + /* Avoid a replicate run of only 2-bytes after a literal run. + * There is no gain in this, and there is a risc of loss if the + * run after the two identical bytes is another literal run. + * So search for 3 identical bytes. + */ + if ((input[index] == input[index - 1]) && + ((index > 1) && (input[index] == input[index - 2]))) + { + /* Reset the index so we can back up these three identical + * bytes in the next run. + */ + index -= 2; + break; + } + + index++; + } + + /* Output a run of uncompressed bytes: write length and values */ + *out++ = (unsigned char)(count - index); + for (i = count; i < index; i++) + *out++ = input[i]; + } + else + { + /* Output a compressed run: write length and value */ + *out++ = (unsigned char)(index - count); + *out++ = first; + } + + count = index; + } + + /* Output EOF marker */ + *out++ = 0; + + return (out - output); +} + + +/** + * Run-length decode from the \a input buffer to the \a output + * buffer. + * + * \note The output buffer must be large enough to accomodate + * all decoded output. + */ +int unrle(unsigned char *output, const unsigned char *input) +{ + signed char count; + unsigned char *out; + unsigned char value; + + + out = output; + + for (;;) + { + count = (signed char)*input++; + if (count > 0) + { + /* replicate run */ + value = *input++; + while (count--) + *out++ = value; + } + else if (count < 0) + { + /* literal run */ + while (count++) + *out++ = *input++; + } + else + /* EOF */ + break; + } + + return (out - output); +} diff --git a/2.5/bertos/algo/rle.h b/2.5/bertos/algo/rle.h new file mode 100644 index 00000000..7cb34b1b --- /dev/null +++ b/2.5/bertos/algo/rle.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief General-purpose run-length {en,de}coding algorithm. + * + * \version $Id$ + * \author Bernie Innocenti + * + * $WIZ$ module_name = "rle" + */ +#ifndef RLE_H +#define RLE_H + +int rle(unsigned char *output, const unsigned char *input, int length); +int unrle(unsigned char *output, const unsigned char *input); + +#endif /* RLE_H */ diff --git a/2.5/bertos/algo/rotating_hash.h b/2.5/bertos/algo/rotating_hash.h new file mode 100644 index 00000000..abdde51a --- /dev/null +++ b/2.5/bertos/algo/rotating_hash.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * \brief Rotating Hash algorithm. + * + * This is a simple yet powerfull checksum algorithm. + * Instead of just xor-ing the data, rotating hash + * circular shift the checksum 4 place left before xoring. + * This is a bit more stronger than simply sum the data. + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "rotating_hash" + */ + + +#ifndef ALGO_ROTATING_H +#define ALGO_ROTATING_H + +#include + +typedef uint16_t rotating_t; + + +/** + * Init rotating checksum. + */ +INLINE void rotating_init(rotating_t *rot) +{ + *rot = 0; +} + +/** + * Update checksum pointed by \c rot with \c c data. + */ +INLINE void rotating_update1(uint8_t c, rotating_t *rot) +{ + *rot = (*rot << 4) ^ (*rot >> 12) ^ c; +} + +/** + * Update checksum pointed by \c rot with data supplied in \c buf. + */ +INLINE void rotating_update(const void *_buf, size_t len, rotating_t *rot) +{ + const uint8_t *buf = (const uint8_t *)_buf; + + while (len--) + rotating_update1(*buf++, rot); +} + + +#endif // ALGO_ROTATING_H diff --git a/2.5/bertos/algo/tea.c b/2.5/bertos/algo/tea.c new file mode 100644 index 00000000..b855cfbf --- /dev/null +++ b/2.5/bertos/algo/tea.c @@ -0,0 +1,132 @@ +/** + * \file + * + * + * \brief TEA Tiny Encription Algorith functions (implementation). + * + * \version $Id$ + * \author Francesco Sacchi + * + * The Tiny Encryption Algorithm (TEA) by David Wheeler and Roger Needham + * of the Cambridge Computer Laboratory + * + * Placed in the Public Domain by David Wheeler and Roger Needham. + * + * **** ANSI C VERSION **** + * + * Notes: + * + * TEA is a Feistel cipher with XOR and and addition as the non-linear + * mixing functions. + * + * Takes 64 bits of data in v[0] and v[1]. Returns 64 bits of data in w[0] + * and w[1]. Takes 128 bits of key in k[0] - k[3]. + * + * TEA can be operated in any of the modes of DES. Cipher Block Chaining is, + * for example, simple to implement. + * + * n is the number of iterations. 32 is ample, 16 is sufficient, as few + * as eight may be OK. The algorithm achieves good dispersion after six + * iterations. The iteration count can be made variable if required. + * + * Note this is optimised for 32-bit CPUs with fast shift capabilities. It + * can very easily be ported to assembly language on most CPUs. + * + * delta is chosen to be the real part of (the golden ratio Sqrt(5/4) - + * 1/2 ~ 0.618034 multiplied by 2^32). + */ + +#include "tea.h" +#include + +static uint32_t tea_func(uint32_t *in, uint32_t *sum, uint32_t *k) +{ + return ((*in << 4) + cpu_to_le32(k[0])) ^ (*in + *sum) ^ ((*in >> 5) + cpu_to_le32(k[1])); +} + +/** + * \brief TEA encryption function. + * This function encrypts v with k and returns the + * encrypted data in v. + * \param _v Array of two long values containing the data block. + * \param _k Array of four long values containing the key. + */ +void tea_enc(void *_v, void *_k) +{ + uint32_t y, z; + uint32_t sum = 0; + uint8_t n = ROUNDS; + uint32_t *v = (uint32_t *)_v; + uint32_t *k = (uint32_t *)_k; + + y=cpu_to_le32(v[0]); + z=cpu_to_le32(v[1]); + + while(n-- > 0) + { + sum += DELTA; + y += tea_func(&z, &sum, &(k[0])); + z += tea_func(&y, &sum, &(k[2])); + } + + v[0] = le32_to_cpu(y); + v[1] = le32_to_cpu(z); +} + +/** + * \brief TEA decryption function. + * This function decrypts v with k and returns the + * decrypted data in v. + * \param _v Array of two long values containing the data block. + * \param _k Array of four long values containing the key. + */ +void tea_dec(void *_v, void *_k) +{ + uint32_t y, z; + uint32_t sum = DELTA * ROUNDS; + uint8_t n = ROUNDS; + uint32_t *v = (uint32_t *)_v; + uint32_t *k = (uint32_t *)_k; + + y = cpu_to_le32(v[0]); + z = cpu_to_le32(v[1]); + + while(n-- > 0) + { + z -= tea_func(&y, &sum, &(k[2])); + y -= tea_func(&z, &sum, &(k[0])); + sum -= DELTA; + } + + v[0] = le32_to_cpu(y); + v[1] = le32_to_cpu(z); +} + diff --git a/2.5/bertos/algo/tea.h b/2.5/bertos/algo/tea.h new file mode 100644 index 00000000..712a4ea9 --- /dev/null +++ b/2.5/bertos/algo/tea.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief TEA Tiny Encription Algorith functions. + * + * Documentation for TEA is available at + * http://www.cl.cam.ac.uk/ftp/users/djw3/tea.ps. + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "tea" + */ + +#ifndef ALGO_TEA_H +#define ALGO_TEA_H + +#include + +#define TEA_KEY_LEN 16 //!< TEA key size. +#define TEA_BLOCK_LEN 8 //!< TEA block length. + +#define DELTA 0x9E3779B9 //!< Magic value. (Golden number * 2^31) +#define ROUNDS 32 //!< Number of rounds. + +void tea_enc(void *_v, void *_k); +void tea_dec(void *_v, void *_k); + +#endif /* ALGO_TEA_H */ + diff --git a/2.5/bertos/benchmark/context_switch.c b/2.5/bertos/benchmark/context_switch.c new file mode 100644 index 00000000..12298892 --- /dev/null +++ b/2.5/bertos/benchmark/context_switch.c @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief Context switch benchmark + * + * \author Andrea Righi + * \author Daniele Basiele + */ + +#include "context_switch.h" + +#include "hw/hw_led.h" + +#include "cfg/cfg_context_switch.h" +#include + +#include +#include + +#include +#if CONFIG_USE_HP_TIMER +#include +static Serial out; +#endif + +#include + +#define PROC_STACK_SIZE KERN_MINSTACKSIZE + +static PROC_DEFINE_STACK(hp_stack, PROC_STACK_SIZE); +static PROC_DEFINE_STACK(lp_stack, PROC_STACK_SIZE); + +static Process *hp_proc, *lp_proc, *main_proc; +#if CONFIG_USE_HP_TIMER +static hptime_t start, end; +#endif + +static void NORETURN hp_process(void) +{ + while (1) + { + sig_wait(SIG_USER0); + #if CONFIG_USE_LED + LED_ON(); + #endif + #if CONFIG_USE_HP_TIMER + end = timer_hw_hpread(); + #endif + sig_send(main_proc, SIG_USER0); + } +} + +static void NORETURN lp_process(void) +{ + while (1) + { + sig_wait(SIG_USER0); + #if CONFIG_USE_LED + LED_ON(); + LED_OFF(); + #endif + #if CONFIG_USE_HP_TIMER + start = timer_hw_hpread(); + #endif + sig_send(hp_proc, SIG_USER0); + } +} + + +void NORETURN context_switch(void) +{ + IRQ_ENABLE; + timer_init(); + proc_init(); + + #if CONFIG_USE_HP_TIMER + ser_init(&out, CONFIG_CTX_DEBUG_PORT); + ser_setbaudrate(&out, CONFIG_CTX_DEBUG_BAUDRATE); + #endif + + #if CONFIG_USE_LED + LED_INIT(); + #endif + + proc_forbid(); + hp_proc = proc_new(hp_process, NULL, PROC_STACK_SIZE, hp_stack); + lp_proc = proc_new(lp_process, NULL, PROC_STACK_SIZE, lp_stack); + main_proc = proc_current(); + proc_setPri(hp_proc, 2); + proc_setPri(lp_proc, 1); + proc_permit(); + + while (1) + { + timer_delay(100); + + sig_send(lp_proc, SIG_USER0); + sig_wait(SIG_USER0); + + #if CONFIG_USE_HP_TIMER + kfile_printf(&out.fd, + "Switch: %lu.%lu usec\n\r", + hptime_to_us((end - start)), + hptime_to_us((end - start) * 1000) % 1000); + #endif + } +} diff --git a/2.5/bertos/benchmark/context_switch.h b/2.5/bertos/benchmark/context_switch.h new file mode 100644 index 00000000..350a5312 --- /dev/null +++ b/2.5/bertos/benchmark/context_switch.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Context switch benchmark + * + * \author Andrea Righi + * \author Daniele Basiele + * + * $WIZ$ module_name = "context_switch" + * $WIZ$ module_depends = "kfile", "kern", "signal", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_context_switch.h" + * $WIZ$ module_hw = "bertos/hw/hw_led.h" + */ + +#ifndef BENCHMARK_CONTEXT_SWITCH_H +#define BENCHMARK_CONTEXT_SWITCH_H + +void context_switch(void); + +#endif /* BENCHMARK_CONTEXT_SWITCH_H */ diff --git a/2.5/bertos/benchmark/kernel_footprint.c b/2.5/bertos/benchmark/kernel_footprint.c new file mode 100644 index 00000000..b3cd0458 --- /dev/null +++ b/2.5/bertos/benchmark/kernel_footprint.c @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \author Luca Ottaviano + * \author Andrea Righi + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + */ + +#include "kernel_footprint.h" + +#include + +#include +#include +#include +#include + +MsgPort in_port; + +static void init(void) +{ + IRQ_ENABLE; + proc_init(); +} + +static PROC_DEFINE_STACK(proc1_stack, KERN_MINSTACKSIZE); + +static NORETURN void proc1_main(void) +{ + int i; + for(;;) + { + i++; + } +} + +void kernel_footprint(void) +{ + init(); + + // generate code for process + struct Process *p = + proc_new(proc1_main, 0, sizeof(proc1_stack), proc1_stack); + proc_setPri(p, 5); + proc_yield(); + + // generate code for msg + Msg msg; + msg_initPort(&in_port, event_createSignal(p, SIG_USER1)); + msg_put(&in_port, &msg); + msg_peek(&in_port); + Msg *msg_re = msg_get(&in_port); + msg_reply(msg_re); + + // generate code for signals + sig_send(p, SIG_USER0); + + // generate code for msg + Semaphore sem; + sem_init(&sem); + sem_obtain(&sem); + sem_release(&sem); + + sig_wait(SIG_USER0); +} diff --git a/2.5/bertos/benchmark/kernel_footprint.h b/2.5/bertos/benchmark/kernel_footprint.h new file mode 100644 index 00000000..3df0a0c6 --- /dev/null +++ b/2.5/bertos/benchmark/kernel_footprint.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * $WIZ$ module_name = "kernel_footprint" + * $WIZ$ module_depends = "kfile", "kern", "signal", "msg", "semaphores", "event" + */ + +#ifndef BENCHMARK_KERNEL_FOOTPRINT_H +#define BENCHMARK_KERNEL_FOOTPRINT_H + +void kernel_footprint(void); + +#endif /* BENCHMARK_KERNEL_FOOTPRINT_H */ diff --git a/2.5/bertos/cfg/cfg_adc.h b/2.5/bertos/cfg/cfg_adc.h new file mode 100644 index 00000000..35e58661 --- /dev/null +++ b/2.5/bertos/cfg/cfg_adc.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * This frequency will be rounded down to an integer + * submultiple of CPU_FREQ. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + * $WIZ$ max = 5000000 + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 20 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [ns]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 600 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/bertos/cfg/cfg_afsk.h b/2.5/bertos/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/bertos/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/bertos/cfg/cfg_arch.h b/2.5/bertos/cfg/cfg_arch.h new file mode 100644 index 00000000..4b196a41 --- /dev/null +++ b/2.5/bertos/cfg/cfg_arch.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Set system configuration. + * + * \version $Id$ + * + * \author Bernie Innocenti + * + */ + + +#ifndef CFG_ARCH_CONFIG_H +#define CFG_ARCH_CONFIG_H + +#define ARCH_DEFAULT (1<<0) ///< Default architecture + +#define ARCH_EMUL (1<<2) ///< EMUL architecture +#define ARCH_QT (1<<3) ///< QT architecture +#define ARCH_UNITTEST (1<<4) ///< UNITTEST architecture +#define ARCH_NIGHTTEST (1<<5) ///< NIGHTTEST architecture + +#endif /* CFG_ARCH_CONFIG_H */ diff --git a/2.5/bertos/cfg/cfg_attr.h b/2.5/bertos/cfg/cfg_attr.h new file mode 100644 index 00000000..2bd23fbc --- /dev/null +++ b/2.5/bertos/cfg/cfg_attr.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_ATTR_H +#define CFG_ATTR_H + +/// Put a function or critical code in fast memory. +#define CONFIG_FAST_MEM 0 + + +#endif /* CFG_ATTR_H */ diff --git a/2.5/bertos/cfg/cfg_ax25.h b/2.5/bertos/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/bertos/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/bertos/cfg/cfg_battfs.h b/2.5/bertos/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/bertos/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/bertos/cfg/cfg_boot.h b/2.5/bertos/cfg/cfg_boot.h new file mode 100644 index 00000000..96319e1a --- /dev/null +++ b/2.5/bertos/cfg/cfg_boot.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Configuration file for bootloader module. + */ + +#ifndef CFG_BOOT_H +#define CFG_BOOT_H + +/// Bootloader log level +#define CONFIG_BOOT_LOG_LEVEL LOG_LVL_INFO + +/// Bootoloader log format +#define CONFIG_BOOT_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_FLASH_AT91_H */ diff --git a/2.5/bertos/cfg/cfg_buzzerled.h b/2.5/bertos/cfg/cfg_buzzerled.h new file mode 100644 index 00000000..e13b29b0 --- /dev/null +++ b/2.5/bertos/cfg/cfg_buzzerled.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for buzzerled module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_BUZZERLED_H +#define CFG_BUZZERLED_H + +/// TODO +#define CONFIG_NUM_BLDS 1 + + +#endif /* CFG_BUZZERLED_H */ + diff --git a/2.5/bertos/cfg/cfg_context_switch.h b/2.5/bertos/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/bertos/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/bertos/cfg/cfg_dataflash.h b/2.5/bertos/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/bertos/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/bertos/cfg/cfg_dc_motor.h b/2.5/bertos/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/bertos/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/bertos/cfg/cfg_debug.h b/2.5/bertos/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/bertos/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/bertos/cfg/cfg_fat.h b/2.5/bertos/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/bertos/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/bertos/cfg/cfg_flash25.h b/2.5/bertos/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/bertos/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/bertos/cfg/cfg_flash_at91.h b/2.5/bertos/cfg/cfg_flash_at91.h new file mode 100644 index 00000000..ef8e990e --- /dev/null +++ b/2.5/bertos/cfg/cfg_flash_at91.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Configuration file for flash_at91 module. + */ + +#ifndef CFG_FLASH_AT91_H +#define CFG_FLASH_AT91_H + +/// Bootloader log level +#define CONFIG_FLASH_AT91_LOG_LEVEL LOG_LVL_ERR + +/// Bootoloader log format +#define CONFIG_FLASH_AT91_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_FLASH_AT91_H */ diff --git a/2.5/bertos/cfg/cfg_flash_avr.h b/2.5/bertos/cfg/cfg_flash_avr.h new file mode 100644 index 00000000..a49b2f8b --- /dev/null +++ b/2.5/bertos/cfg/cfg_flash_avr.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \version $Id$ + * \author Manuele Fanelli + * + * \brief Configuration file for flash_avr module. + */ + +#ifndef CFG_FLASH_AVR_H +#define CFG_FLASH_AVR_H + +/** + * Bootloader section size. + * \note Remember to update this define when changing bootloader size fuses. + */ +#define CONFIG_FLASH_AVR_BOOTSIZE 8192 + +/// Bootloader log level +#define CONFIG_FLASH_AVR_LOG_LEVEL LOG_LVL_ERR + +/// Bootoloader log format +#define CONFIG_FLASH_AVR_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_BOOT_H */ diff --git a/2.5/bertos/cfg/cfg_formatwr.h b/2.5/bertos/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/bertos/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/bertos/cfg/cfg_gfx.h b/2.5/bertos/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/bertos/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/bertos/cfg/cfg_hashtable.h b/2.5/bertos/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/bertos/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/bertos/cfg/cfg_heap.h b/2.5/bertos/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/bertos/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/bertos/cfg/cfg_i2c.h b/2.5/bertos/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/bertos/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/bertos/cfg/cfg_i2s.h b/2.5/bertos/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/bertos/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/bertos/cfg/cfg_ini_reader.h b/2.5/bertos/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/bertos/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/bertos/cfg/cfg_kbd.h b/2.5/bertos/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/bertos/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/bertos/cfg/cfg_kern.h b/2.5/bertos/cfg/cfg_kern.h new file mode 100644 index 00000000..988e6de9 --- /dev/null +++ b/2.5/bertos/cfg/cfg_kern.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters (deprecated) + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_KERN_H +#define CFG_KERN_H + +#warning This file is deprecated, you should use the correct combination of cfg_proc.h, cfg_sem.h, cfg_signal.h and cfg_monitor.h +#include "cfg_proc.h" +#include "cfg_sem.h" +#include "cfg_signal.h" +#include "cfg_monitor.h" + + +/** + * Left for backwards compatibility. + * Do not use this anymore, will be deprecated soon. + */ +#define CONFIG_KERN_SCHED CONFIG_KERN + +#endif /* CFG_KERN_H */ diff --git a/2.5/bertos/cfg/cfg_keytag.h b/2.5/bertos/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/bertos/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/bertos/cfg/cfg_kfile.h b/2.5/bertos/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/bertos/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/bertos/cfg/cfg_lcd_32122a.h b/2.5/bertos/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/bertos/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/bertos/cfg/cfg_lcd_hd44.h b/2.5/bertos/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..7bea4376 --- /dev/null +++ b/2.5/bertos/cfg/cfg_lcd_hd44.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +/** + * Number of columns in LCD display. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "lcd_hd44_cols" + */ +#define CONFIG_LCD_COLS LCD_HD44_COLS_16 + +/** + * Number of rows in LCD display. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "lcd_hd44_rows" + */ +#define CONFIG_LCD_ROWS LCD_HD44_ROWS_2 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/bertos/cfg/cfg_lm75.h b/2.5/bertos/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/bertos/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/bertos/cfg/cfg_md2.h b/2.5/bertos/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/bertos/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/bertos/cfg/cfg_menu.h b/2.5/bertos/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/bertos/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/bertos/cfg/cfg_monitor.h b/2.5/bertos/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/bertos/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/bertos/cfg/cfg_nmea.h b/2.5/bertos/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/bertos/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/bertos/cfg/cfg_ntc.h b/2.5/bertos/cfg/cfg_ntc.h new file mode 100644 index 00000000..09b57e22 --- /dev/null +++ b/2.5/bertos/cfg/cfg_ntc.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for NTC module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NTC_H +#define CFG_NTC_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_NTC_LOG_LEVEL LOG_LVL_INFO +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_NTC_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_NTC_H */ diff --git a/2.5/bertos/cfg/cfg_parser.h b/2.5/bertos/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/bertos/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/bertos/cfg/cfg_phase.h b/2.5/bertos/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/bertos/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/bertos/cfg/cfg_pid.h b/2.5/bertos/cfg/cfg_pid.h new file mode 100644 index 00000000..5a8375bb --- /dev/null +++ b/2.5/bertos/cfg/cfg_pid.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PID_H +#define CFG_PID_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PID_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PID_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PID_H */ diff --git a/2.5/bertos/cfg/cfg_pocketbus.h b/2.5/bertos/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/bertos/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/bertos/cfg/cfg_proc.h b/2.5/bertos/cfg/cfg_proc.h new file mode 100644 index 00000000..3c9439fb --- /dev/null +++ b/2.5/bertos/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/bertos/cfg/cfg_pwm.h b/2.5/bertos/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/bertos/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/bertos/cfg/cfg_ramp.h b/2.5/bertos/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/bertos/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/bertos/cfg/cfg_randpool.h b/2.5/bertos/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/bertos/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/bertos/cfg/cfg_sem.h b/2.5/bertos/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/bertos/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/bertos/cfg/cfg_ser.h b/2.5/bertos/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/bertos/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/bertos/cfg/cfg_signal.h b/2.5/bertos/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/bertos/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/bertos/cfg/cfg_spi_bitbang.h b/2.5/bertos/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/bertos/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/bertos/cfg/cfg_spi_dma.h b/2.5/bertos/cfg/cfg_spi_dma.h new file mode 100644 index 00000000..0a69f757 --- /dev/null +++ b/2.5/bertos/cfg/cfg_spi_dma.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for spi dma module. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef CFG_SPI_DMA_H +#define CFG_SPI_DMA_H + +/** + * Size of the outbound FIFO buffer for SPI DMA [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_SPI_DMA_TXBUFSIZE 512 + + +/** + * Max size received for each DMA transfer [bytes]. + * Longer buffers will be split in two or more transfers of this size. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SPI_DMA_MAX_RX 512 + + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SPI_DMA_TX_TIMEOUT -1 + + +#endif /* CFG_SER_H */ diff --git a/2.5/bertos/cfg/cfg_stepper.h b/2.5/bertos/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/bertos/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/bertos/cfg/cfg_tas5706a.h b/2.5/bertos/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/bertos/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/bertos/cfg/cfg_thermo.h b/2.5/bertos/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/bertos/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/bertos/cfg/cfg_timer.h b/2.5/bertos/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/bertos/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/bertos/cfg/cfg_wdt.h b/2.5/bertos/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/bertos/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/bertos/cfg/cfg_xmodem.h b/2.5/bertos/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/bertos/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/bertos/cfg/compiler.h b/2.5/bertos/cfg/compiler.h new file mode 100644 index 00000000..a56ef870 --- /dev/null +++ b/2.5/bertos/cfg/compiler.h @@ -0,0 +1,553 @@ +/** + * \file + * + * + * \brief Additional support macros for compiler independance + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef BERTOS_COMPILER_H +#define BERTOS_COMPILER_H + +#include + + +#if defined __GNUC__ && defined __GNUC_MINOR__ + #define GNUC_PREREQ(maj, min) \ + ((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min)) +#else + #define GNUC_PREREQ(maj, min) 0 +#endif + +/* Some CW versions do not allow enabling C99 from the settings panel. */ +#if defined(__MWERKS__) + #pragma c99 on +#endif + +#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) + #define COMPILER_C99 1 +#else + #define COMPILER_C99 0 +#endif + + +/** Concatenate two different preprocessor tokens (allowing macros to expand) */ +#define PP_CAT(x,y) PP_CAT__(x,y) +#define PP_CAT__(x,y) x ## y +#define PP_CAT3(x,y,z) PP_CAT(PP_CAT(x,y),z) +#define PP_CAT4(x,y,z,w) PP_CAT(PP_CAT3(x,y,z),w) +#define PP_CAT5(x,y,z,w,j) PP_CAT(PP_CAT4(x,y,z,w),j) + +/** String-ize a token (allowing macros to expand) */ +#define PP_STRINGIZE(x) PP_STRINGIZE__(x) +#define PP_STRINGIZE__(x) #x + + +#if defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__) + + #pragma language=extended + + #if CPU_ARM + + #define COMPILER_VARIADIC_MACROS 1 + + #define INTERRUPT(x) __irq __arm void x (void) + #define INLINE static inline + + /* Include some standard C89/C99 stuff */ + #include + #include + #include + + #elif CPU_I196 + + // IAR has size_t as built-in type, but does not define this symbol. + #define _SIZE_T_DEFINED + + #define INTERRUPT(x) interrupt [x] + #define REGISTER shortad + #define INLINE /* unsupported */ + + /* + * Imported from . Unfortunately, we can't just include + * this header because it typedefs jmp_buf to be an array of chars. + * This would allow the compiler to place the buffer on an odd address. + * The CPU _should_ be able to perform word accesses to + * unaligned data, but there are *BUGS* in the 80196KC with + * some combinations of opcodes and addressing modes. One of + * these, "ST SP,[?GR]+" is used in the longjmp() implementation + * provided by the IAR compiler ANSI C library. When ?GR contains + * an odd address, surprisingly the CPU will copy the high order + * byte of the source operand (SP) in the low order byte of the + * destination operand (the memory location pointed to by ?GR). + * + * We also need to replace the library setjmp()/longjmp() with + * our own versions because the IAR implementation "forgets" to + * save the contents of local registers (?LR). + */ + struct _JMP_BUF + { + void *sp; /* Stack pointer */ + void *return_addr; /* Return address */ + int lr[6]; /* 6 local registers */ + }; + + typedef struct _JMP_BUF jmp_buf[1]; + + int setjmp(jmp_buf env); + void longjmp(jmp_buf env, int val); + + /* Fake bool support */ + #define true (1==1) + #define false (1!=1) + typedef unsigned char bool; + + #else + #error Unsupported CPU + #endif + +#elif defined(_MSC_VER) /* Win32 emulation support */ + + /* MSVC doesn't provide . */ + #ifndef __cplusplus + #define true (1==1) + #define false (1!=1) + typedef int bool; + #endif /* !__cplusplus */ + + /* These C99 functions are oddly named in MSVCRT32.lib */ + #define snprintf _snprintf + #define vsnprintf _vsnprintf + + /* MSVC doesn't support C99's __func__, but has a similar extension. */ + #define __func__ __FUNCTION__ + + /* MSVC doesn't support C99's inline keyword */ + #ifndef __cplusplus + #define INLINE __inline + #endif + +#elif defined(__GNUC__) + + /* Compiler features */ + #define COMPILER_VARIADIC_MACROS 1 /* Even in C++ */ + #define COMPILER_TYPEOF 1 + #define COMPILER_STATEMENT_EXPRESSIONS 1 + + /* GCC attributes */ + #define FORMAT(type,fmt,first) __attribute__((__format__(type, fmt, first))) + #define NORETURN __attribute__((__noreturn__)) + #define UNUSED_ARG(type,arg) __attribute__((__unused__)) type arg + #define UNUSED_VAR(type,name) __attribute__((__unused__)) type name + #define USED_VAR(type,name) __attribute__((__used__)) type name + #define INLINE static inline __attribute__((__always_inline__)) + #define NOINLINE __attribute__((noinline)) + #define LIKELY(x) __builtin_expect(!!(x), 1) + #define UNLIKELY(x) __builtin_expect(!!(x), 0) + #define PURE_FUNC __attribute__((pure)) + #define CONST_FUNC __attribute__((const)) + #define UNUSED_FUNC __attribute__((unused)) + #define USED_FUNC __attribute__((__used__)) + #define RESTRICT __restrict__ + #define MUST_CHECK __attribute__((warn_unused_result)) + #define PACKED __attribute__((packed)) + #if CPU_ARM | CPU_CM3 + #define NAKED __attribute__((naked)) + #else + #define NAKED + #endif + + /** + * Force compiler to realod context variable. + */ + #define MEMORY_BARRIER asm volatile ("" : : : "memory") + + #if GNUC_PREREQ(3,1) + #define DEPRECATED __attribute__((__deprecated__)) + #endif + + #if GNUC_PREREQ(4,5) + #define UNREACHABLE() __builtin_unreachable() + #endif + + #ifndef __cplusplus + #define ASSERT_TYPE_EQUAL(var1, var2) \ + STATIC_ASSERT(__builtin_types_compatible_p(typeof(var1), typeof(var2))) + #define ASSERT_TYPE_IS(var, type) \ + STATIC_ASSERT(__builtin_types_compatible_p(typeof(var), type)) + #endif + + /* Include some standard C89/C99 stuff */ + #include + #include + #include + #if !CPU_AVR + #include /* for ssize_t */ + #endif + + #ifndef __cplusplus + /* + * Disallow some C++ keywords as identifiers in C programs, + * for improved portability. + */ + #pragma GCC poison new delete class template typename + #pragma GCC poison private protected public operator + #pragma GCC poison friend mutable using namespace + #pragma GCC poison cin cout cerr clog + #endif + + + +#elif defined(__MWERKS__) + + /* Compiler features */ + #define COMPILER_VARIADIC_MACROS 1 + #define COMPILER_TYPEOF 1 + #define COMPILER_STATEMENT_EXPRESSIONS 1 + + #define typeof __typeof__ + + #define UNUSED_ARG(type,arg) type + + #include + #include + #include + + // CodeWarrior has size_t as built-in type, but does not define this symbol. + #define _SIZE_T_DEFINED + +#else + #error unknown compiler +#endif + + +/* Defaults for compiler extensions. */ + +/** + * \def COMPILER_VARIADIC_MACROS + * Support for macros with variable arguments. + */ +#ifndef COMPILER_VARIADIC_MACROS +#define COMPILER_VARIADIC_MACROS (COMPILER_C99 != 0) +#endif + +/** + * \def COMPILER_TYPEOF + * Support for dynamic type identification. + */ +#ifndef COMPILER_TYPEOF +#define COMPILER_TYPEOF 0 +#endif + +/** + * \def COMPILER_STATEMENT_EXPRESSIONS + * Support for statement expressions. + */ +#ifndef COMPILER_STATEMENT_EXPRESSIONS +#define COMPILER_STATEMENT_EXPRESSIONS 0 +#endif + +/* A few defaults for missing compiler features. */ +#ifndef INLINE +#define INLINE static inline +#endif +#ifndef NOINLINE +#define NOINLINE /* nothing */ +#endif +#ifndef NORETURN +#define NORETURN /* nothing */ +#endif +#ifndef FORMAT +#define FORMAT(type,fmt,first) /* nothing */ +#endif +#ifndef DEPRECATED +#define DEPRECATED /* nothing */ +#endif +#ifndef UNUSED_ARG +#define UNUSED_ARG(type,arg) type arg +#endif +#ifndef UNUSED_VAR +#define UNUSED_VAR(type,name) type name +#endif +#ifndef USED_VAR +#define USED_VAR(type,name) type name +#endif +#ifndef REGISTER +#define REGISTER /* nothing */ +#endif +#ifndef LIKELY +#define LIKELY(x) x +#endif +#ifndef UNLIKELY +#define UNLIKELY(x) x +#endif +#ifndef PURE_FUNC +#define PURE_FUNC /* nothing */ +#endif +#ifndef CONST_FUNC +#define CONST_FUNC /* nothing */ +#endif +#ifndef UNUSED_FUNC +#define UNUSED_FUNC /* nothing */ +#endif +#ifndef USED_FUNC +#define USED_FUNC /* nothing */ +#endif +#ifndef RESTRICT +#define RESTRICT /* nothing */ +#endif +#ifndef MUST_CHECK +#define MUST_CHECK /* nothing */ +#endif +#ifndef PACKED +#define PACKED /* nothing */ +#endif +#ifndef MEMORY_BARRIER +#define MEMORY_BARRIER /* nothing */ +#warning No memory barrier defined for select compiler. If you use the kernel check it. +#endif +#ifndef UNREACHABLE +#define UNREACHABLE() for (;;) +#endif + + +/* Misc definitions */ +#ifndef NULL +#define NULL (void *)0 +#endif +#ifndef EOF +#define EOF (-1) +#endif + +/* Support for hybrid C/C++ applications. */ +#ifdef __cplusplus + #define EXTERN_C extern "C" + #define EXTERN_C_BEGIN extern "C" { + #define EXTERN_C_END } + #define EXTERN_CONST extern const + #define CONST_CAST(TYPE,EXPR) (const_cast(EXPR)) +#else + #define EXTERN_C extern + #define EXTERN_C_BEGIN /* nothing */ + #define EXTERN_C_END /* nothing */ + #define EXTERN_CONST const + #define CONST_CAST(TYPE,EXPR) ((TYPE)(EXPR)) /* FIXME: How can we suppress the warning in C? */ +#endif + + +#if defined(_MSC_VER) \ + || ((defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__)) && CPU_I196) + /** + * \name ISO C99 fixed-size types + * + * These should be in , but a few compilers lack them. + * \{ + */ + typedef signed char int8_t; + typedef unsigned char uint8_t; + typedef short int int16_t; + typedef unsigned short int uint16_t; + typedef long int int32_t; /* _WIN64 safe */ + typedef unsigned long int uint32_t; /* _WIN64 safe */ + + #ifdef _MSC_VER + typedef __int64 int64_t; + typedef unsigned __int64 uint64_t; + #else + typedef long long int64_t; + typedef unsigned long long uint64_t; + #endif + /* \} */ +#else + /* This is the standard location. */ + #include +#endif + +#if CPU_AVR_ATMEGA8 + /* + * The ATmega8 has a very small Flash, so we can't afford + * to link in support routines for 32bit integer arithmetic. + */ + typedef int16_t ticks_t; /**< Type for time expressed in ticks. */ + typedef int16_t mtime_t; /**< Type for time expressed in milliseconds. */ + typedef int16_t utime_t; /**< Type for time expressed in microseconds. */ + #define SIZEOF_MTIME_T (16 / CPU_BITS_PER_CHAR) + #define SIZEOF_UTIME_T (16 / CPU_BITS_PER_CHAR) + #define MTIME_INFINITE 0x7FFFL +#else + typedef int32_t ticks_t; /**< Type for time expressed in ticks. */ + + typedef int32_t utime_t; /**< Type for time expressed in microseconds. */ + #define SIZEOF_UTIME_T (32 / CPU_BITS_PER_CHAR) + + #ifndef DEVLIB_MTIME_DEFINED + #define DEVLIB_MTIME_DEFINED 1 /* Resolve conflict with */ + typedef int32_t mtime_t; /**< Type for time expressed in milliseconds. */ + #define SIZEOF_MTIME_T (32 / CPU_BITS_PER_CHAR) + #define MTIME_INFINITE 0x7FFFFFFFL + #endif +#endif + +/** Bulk storage large enough for both pointers or integers. */ +typedef void * iptr_t; + +/** Bulk storage large enough for both pointers to constants or integers. */ +typedef const void * const_iptr_t; + +typedef unsigned char sigbit_t; /**< Type for signal bits. */ +typedef unsigned char sigmask_t; /**< Type for signal masks. */ + + +/** + * \name Standard type definitions. + * + * These should be in or , but many compilers + * and C libraries lack them. + * + * We check for some common definitions to avoid redefinitions: + * + * glibc, avr-libc: _SIZE_T_DEFINED, __ssize_t_defined + * Darwin libc: _BSD_SIZE_T_DEFINED_, _SIZE_T + * IAR ARM: _SIZE_T + * + * \{ + */ +#if !(defined(size_t) || defined(_SIZE_T_DEFINED) || defined(_BSD_SIZE_T_DEFINED_) \ + || defined(_SIZE_T)) + #if CPU_X86 + /* 32bit or 64bit (32bit for _WIN64). */ + typedef unsigned long size_t; + #else + #error Unknown CPU + #endif +#endif + +#if !(defined(ssize_t) || defined(_SSIZE_T) || defined(__ssize_t_defined)) + #if CPU_X86 + /* 32bit or 64bit (32bit for _WIN64). */ + typedef long ssize_t; + #elif CPU_ARM || CPU_CM3 + typedef int ssize_t; + #elif CPU_AVR + /* 16bit (missing in avr-libc's sys/types.h). */ + typedef int ssize_t; + #else + #error Unknown CPU + #endif +#endif +/*\}*/ + + +/** + * \name Types for hardware registers. + * + * Only use these types for registers whose contents can + * be changed asynchronously by external hardware. + * + * \{ + */ +#if CPU_DSP56K + /* Registers can be accessed only through 16-bit pointers */ + typedef volatile uint16_t reg16_t; +#else + typedef volatile uint8_t reg8_t; + typedef volatile uint16_t reg16_t; + typedef volatile uint32_t reg32_t; +#endif +/*\}*/ + + +/* Quasi-ANSI macros */ +#ifndef offsetof + /** + * Return the byte offset of the member \a m in struct \a s. + * + * \note This macro should be defined in "stddef.h" and is sometimes + * compiler-specific (g++ has a builtin for it). + */ + #define offsetof(s,m) (size_t)&(((s *)0)->m) +#endif +#ifndef countof + /** + * Count the number of elements in the static array \a a. + * + * \note This macro is non-standard, but implements a very common idiom + */ + #define countof(a) (sizeof(a) / sizeof(*(a))) +#endif +#ifndef alignof + /** + * Return the alignment in memory of a generic data type. + * + * \note We need to worry about alignment when allocating memory that + * will be used later by unknown objects (e.g., malloc()) or, more + * generally, whenever creating generic container types. + */ + #define alignof(type) offsetof(struct { char c; type member; }, member) +#endif + +/** + * Cast a member of a structure out to the containing structure. + * + * \param ptr the pointer to the member. + * \param type the type of the container struct this is embedded in. + * \param member the name of the member within the struct. + */ +#if COMPILER_TYPEOF && COMPILER_STATEMENT_EXPRESSIONS + #define containerof(ptr, type, member) ({ \ + typeof( ((type *)0)->member ) *_mptr = (ptr); /* type check */ \ + (type *)(void *)((char *)_mptr - offsetof(type, member)); \ + }) +#else + #define containerof(ptr, type, member) \ + ( (type *)(void *)((char *)(ptr) - offsetof(type, member)) ) +#endif + +/** Issue a compilation error if the \a condition is false */ +#define STATIC_ASSERT(condition) \ + UNUSED_VAR(extern char, STATIC_ASSERTION_FAILED__[(condition) ? 1 : -1]) + +#ifndef ASSERT_TYPE_EQUAL + /** Ensure two variables have the same type. */ + #define ASSERT_TYPE_EQUAL(var1, var2) \ + do { (void)(&(var1) == &(var2)); } while(0) +#endif + +#ifndef ASSERT_TYPE_IS + /** Ensure variable is of specified type. */ + #define ASSERT_TYPE_IS(var, type) \ + do { (void)(&(var) == (type *)0); } while(0) +#endif + +#endif /* BERTOS_COMPILER_H */ diff --git a/2.5/bertos/cfg/debug.h b/2.5/bertos/cfg/debug.h new file mode 100644 index 00000000..cccaf8cc --- /dev/null +++ b/2.5/bertos/cfg/debug.h @@ -0,0 +1,327 @@ +/** + * \file + * + * + * \brief Simple debug facilities for hosted and embedded C/C++ applications. + * + * Debug output goes to stderr in hosted applications. + * Freestanding (AKA embedded) applications use \c drv/kdebug.c to output + * diagnostic messages to a serial terminal or a JTAG debugger. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "debug" + * $WIZ$ module_configuration = "bertos/cfg/cfg_debug.h" + * $WIZ$ DEBUG = 1 + * $WIZ$ module_depends = "formatwr" + * $WIZ$ module_supports = "not atmega103" + */ + +#ifndef BERTOS_DEBUG_H +#define BERTOS_DEBUG_H + +#include +#include + + +/* + * Defaults for rarely used config stuff. + */ +#ifndef CONFIG_KDEBUG_DISABLE_TRACE +#define CONFIG_KDEBUG_DISABLE_TRACE 0 +#endif + +#ifndef CONFIG_KDEBUG_ASSERT_NO_TEXT +#define CONFIG_KDEBUG_ASSERT_NO_TEXT 0 +#endif + +#if defined(__doxygen__) + /** + * Preprocessor symbol defined only for debug builds. + * + * The build infrastructure must arrange for _DEBUG to + * be predefined for all the source files being compiled. + * + * This is compatible with the MSVC convention for the + * default Debug and Release project targets. + */ + #define _DEBUG 1 +#endif + +#ifdef _DEBUG + // STLport specific: enable extra checks + #define __STL_DEBUG 1 + + // MSVC specific: Enable memory allocation debug + #if defined(_MSC_VER) + #include + #endif + + /* + * On UNIX systems the extabilished practice is to define + * NDEBUG for release builds and nothing for debug builds. + */ + #ifdef NDEBUG + #undef NDEBUG + #endif + + /** + * This macro duplicates the old MSVC trick of redefining + * THIS_FILE locally to avoid the overhead of many duplicate + * strings in ASSERT(). + */ + #ifndef THIS_FILE + #define THIS_FILE __FILE__ + #endif + + /** + * This macro can be used to conditionally exclude one or more + * statements conditioned on \c _DEBUG, avoiding the clutter + * of ifdef/endif pairs. + * + * \code + * struct FooBar + * { + * int foo; + * bool bar; + * DB(int ref_count;) // Track number of users + * + * void release() + * { + * DB(--ref_count;) + * } + * }; + * \endcode + */ + #define DB(x) x + + #include "cfg/cfg_debug.h" /* CONFIG_KDEBUG_ASSERT_NO_TEXT */ + #include /* CPU_HARVARD */ + + /* These are implemented in drv/kdebug.c */ + void kdbg_init(void); + void kputchar(char c); + int kputnum(int num); + void kdump(const void *buf, size_t len); + void __init_wall(long *wall, int size); + + #if CPU_HARVARD + #include + void kputs_P(const char *PROGMEM str); + void kprintf_P(const char *PROGMEM fmt, ...) FORMAT(__printf__, 1, 2); + int __bassert_P(const char *PROGMEM cond, const char *PROGMEM file, int line); + void __trace_P(const char *func); + void __tracemsg_P(const char *func, const char *PROGMEM fmt, ...); + int __invalid_ptr_P(void *p, const char *PROGMEM name, const char *PROGMEM file, int line); + int __check_wall_P(long *wall, int size, const char * PGM_ATTR name, const char * PGM_ATTR file, int line); + #define kputs(str) kputs_P(PSTR(str)) + #define kprintf(fmt, ...) kprintf_P(PSTR(fmt) ,## __VA_ARGS__) + #define __bassert(cond, file, line) __bassert_P(PSTR(cond), PSTR(file), (line)) + #define __trace(func) __trace_P(func) + #define __tracemsg(func, fmt, ...) __tracemsg_P(func, PSTR(fmt), ## __VA_ARGS__) + #define __invalid_ptr(p, name, file, line) __invalid_ptr_P((p), PSTR(name), PSTR(file), (line)) + #define __check_wall(wall, size, name, file, line) __check_wall_P(wall, size, PSTR(name), PSTR(file), (line)) + #else /* !CPU_HARVARD */ + void kputs(const char *str); + void kprintf(const char *fmt, ...) FORMAT(__printf__, 1, 2); + int __bassert(const char *cond, const char *file, int line); + void __trace(const char *func); + void __tracemsg(const char *func, const char *fmt, ...) FORMAT(__printf__, 2, 3); + int __invalid_ptr(void *p, const char *name, const char *file, int line); + int __check_wall(long *wall, int size, const char *name, const char *file, int line); + #endif /* !CPU_HARVARD */ + + #if !CONFIG_KDEBUG_ASSERT_NO_TEXT + #define ASSERT(x) ((void)(LIKELY(x) ? 0 : __bassert(#x, THIS_FILE, __LINE__))) + #define ASSERT2(x, help) ((void)(LIKELY(x) ? 0 : __bassert(help " (" #x ")", THIS_FILE, __LINE__))) + #else + #define ASSERT(x) ((void)(LIKELY(x) ? 0 : __bassert("", THIS_FILE, __LINE__))) + #define ASSERT2(x, help) ((void)ASSERT(x)) + #endif + + /** + * Check that the given pointer is either NULL or pointing to valid memory. + * + * The assumption here is that valid pointers never point to low + * memory regions. This helps catching pointers taken from + * struct/class memebers when the struct pointer was NULL. + * + * \see ASSERT_VALID_PTR_OR_NULL() + */ + #define ASSERT_VALID_PTR(p) ((void)(LIKELY((void *)(p) >= (void *)CPU_RAM_START) \ + ? 0 : __invalid_ptr(p, #p, THIS_FILE, __LINE__))) + + /** + * Check that the given pointer is not pointing to invalid memory. + * + * \note The check for invalid memory is architecture specific and + * conservative. The current implementation only checks against + * a lower bound. + * + * \see ASSERT_VALID_PTR() + */ + #define ASSERT_VALID_PTR_OR_NULL(p) ((void)(LIKELY((p == NULL) \ + || ((void *)(p) >= (void *)CPU_RAM_START)) \ + ? 0 : __invalid_ptr((p), #p, THIS_FILE, __LINE__))) + + #if !CONFIG_KDEBUG_DISABLE_TRACE + #define TRACE __trace(__func__) + #define TRACEMSG(msg,...) __tracemsg(__func__, msg, ## __VA_ARGS__) + #else + #define TRACE do {} while(0) + #define TRACEMSG(...) do {} while(0) + #endif + + + /** + * \name Walls to detect data corruption + * \{ + */ + #define WALL_SIZE 8 + #define WALL_VALUE (long)0xABADCAFEL + #define DECLARE_WALL(name,size) long name[(size) / sizeof(long)]; + #define FWD_DECLARE_WALL(name,size) extern long name[(size) / sizeof(long)]; + #define INIT_WALL(name) __init_wall((name), countof(name)) + #define CHECK_WALL(name) __check_wall((name), countof(name), #name, THIS_FILE, __LINE__) + /*\}*/ + + /** + * Check that the given pointer actually points to an object + * of the specified type. + */ + #define ASSERT_VALID_OBJ(_t, _o) do { \ + ASSERT_VALID_PTR((_o)); \ + ASSERT(dynamic_cast<_t>((_o)) != NULL); \ + } + + /** + * \name Debug object creation and destruction. + * + * These macros help track some kinds of leaks in C++ programs. + * Usage is as follows: + * + * \code + * class Foo + * { + * DECLARE_INSTANCE_TRACKING(Foo) + * + * Foo() + * { + * NEW_INSTANCE(Foo); + * // ... + * } + * + * ~Foo() + * { + * DELETE_INSTANCE(Foo); + * // ... + * } + * }; + * + * // Put this in the implementation file of the class + * IMPLEMENT_INSTANCE_TRACKING(Foo) + * + * // Client code + * int main(void) + * { + * Foo *foo = new Foo; + * cout << GET_INSTANCE_COUNT(Foo) << endl; // prints "1" + * delete foo; + * ASSERT_ZERO_INSTANCES(Foo); // OK + * } + * \endcode + * \{ + */ + #define NEW_INSTANCE(CLASS) do { ++CLASS::__instances } while (0) + #define DELETE_INSTANCE(CLASS) do { --CLASS::__instances } while (0) + #define ASSERT_ZERO_INSTANCES(CLASS) ASSERT(CLASS::__instances == 0) + #define GET_INSTANCE_COUNT(CLASS) (CLASS::__instances) + #define DECLARE_INSTANCE_TRACKING(CLASS) static int __instances + #define IMPLEMENT_INSTANCE_TRACKING(CLASS) int CLASS::__instances = 0 + /*\}*/ + +#else /* !_DEBUG */ + + /* + * On UNIX systems the extabilished practice is to define + * NDEBUG for release builds and nothing for debug builds. + */ + #ifndef NDEBUG + #define NDEBUG 1 + #endif + + #define DB(x) /* nothing */ + #ifndef ASSERT + #define ASSERT(x) ((void)0) + #endif /* ASSERT */ + #define ASSERT2(x, help) ((void)0) + #define ASSERT_VALID_PTR(p) ((void)0) + #define ASSERT_VALID_PTR_OR_NULL(p) ((void)0) + #define ASSERT_VALID_OBJ(_t, _o) ((void)0) + #define TRACE do {} while (0) + #if COMPILER_VARIADIC_MACROS + #define TRACEMSG(x, ...) do {} while (0) + #else + INLINE void TRACEMSG(UNUSED_ARG(const char *, msg), ...) + { + /* NOP */ + } + #endif + + #define DECLARE_WALL(name, size) /* nothing */ + #define FWD_DECLARE_WALL(name, size) /* nothing */ + #define INIT_WALL(name) do {} while (0) + #define CHECK_WALL(name) do {} while (0) + + #define NEW_INSTANCE(CLASS) do {} while (0) + #define DELETE_INSTANCE(CLASS) do {} while (0) + #define ASSERT_ZERO_INSTANCES(CLASS) do {} while (0) + #define GET_INSTANCE_COUNT(CLASS) ERROR_ONLY_FOR_DEBUG + #define DECLARE_INSTANCE_TRACKING(CLASS) + #define IMPLEMENT_INSTANCE_TRACKING(CLASS) + + INLINE void kdbg_init(void) { /* nop */ } + INLINE void kputchar(UNUSED_ARG(char, c)) { /* nop */ } + INLINE int kputnum(UNUSED_ARG(int, num)) { return 0; } + INLINE void kputs(UNUSED_ARG(const char *, str)) { /* nop */ } + INLINE void kdump(UNUSED_ARG(const void *, buf), UNUSED_ARG(size_t, len)) { /* nop */ } + + #if defined(__cplusplus) && COMPILER_VARIADIC_MACROS + /* G++ can't inline functions with variable arguments... */ + #define kprintf(fmt,...) do { (void)(fmt); } while(0) + #else + /* ...but GCC can. */ + INLINE void kprintf(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #endif + +#endif /* _DEBUG */ + +#endif /* BERTOS_DEBUG_H */ diff --git a/2.5/bertos/cfg/depend.h b/2.5/bertos/cfg/depend.h new file mode 100644 index 00000000..dcbbfac7 --- /dev/null +++ b/2.5/bertos/cfg/depend.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Depend module. + * + * \author Bernie Innocenti + * + */ + +#ifndef CFG_DEPEND_H +#define CFG_DEPEND_H + +#include // STATIC_ASSERT() + +/** + * Compile-time enforcement of dependencies between configuration options + */ +#define CONFIG_DEPEND(FEATURE, DEPS) STATIC_ASSERT(!(FEATURE) || !!(DEPS)) + +#endif // CFG_DEPEND_H diff --git a/2.5/bertos/cfg/kfile_debug.c b/2.5/bertos/cfg/kfile_debug.c new file mode 100644 index 00000000..e358c485 --- /dev/null +++ b/2.5/bertos/cfg/kfile_debug.c @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief KFile interface over debug. + * + * \author Francesco Sacchi + */ + +#include "kfile_debug.h" + +#include + +#include + + +static size_t kfiledebug_write(struct KFile *_fd, const void *buf, size_t size) +{ + KFILEDEBUG_CAST(_fd); + + kprintf("%.*s", size, (const char *)buf); + + return size; +} + +void kfiledebug_init(KFileDebug *kd) +{ + ASSERT(kd); + + memset(kd, 0, sizeof(*kd)); + + kfile_init(&kd->fd); + kd->fd.write = kfiledebug_write; + DB(kd->fd._type = KFT_KFILEDEBUG); +} diff --git a/2.5/bertos/cfg/kfile_debug.h b/2.5/bertos/cfg/kfile_debug.h new file mode 100644 index 00000000..4cd31ddf --- /dev/null +++ b/2.5/bertos/cfg/kfile_debug.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief KFile interface over a debug console. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfiledebug" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef CFG_KFILE_DEBUG +#define CFG_KFILE_DEBUG + +#include + +/** + * Context for KFile over debug console. + */ +typedef struct KFileDebug +{ + KFile fd; ///< KFile base class +} KFileDebug; + +/** + * ID for KFileDebug. + */ +#define KFT_KFILEDEBUG MAKE_ID('K', 'D', 'B', 'G') + +/** + * Convert + ASSERT from generic KFile to KFileDebug. + */ +INLINE KFileDebug * KFILEDEBUG_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEDEBUG); + return (KFileDebug *)fd; +} + +/** + * Initialize KFileMem struct. + * + * \param km Interface to initialize. + */ +void kfiledebug_init(KFileDebug *km); + +#endif /* CFG_KFILE_DEBUG */ diff --git a/2.5/bertos/cfg/log.h b/2.5/bertos/cfg/log.h new file mode 100644 index 00000000..e9e8f9f1 --- /dev/null +++ b/2.5/bertos/cfg/log.h @@ -0,0 +1,170 @@ +/** + * \file + * + * + * \brief Logging system module. + * + * This module implement a simple interface to use the multi level logging system. + * The log message have the priority order, like this: + * + * - error message (highest) + * - warning message + * - info message (lowest) + * + * With this priority system we can log only the message that have egual or major + * priority than log level that you has been configurate. Further you can have a + * differ log level for each module that you want. To do this you just need to + * define LOG_LEVEL in cfg of select module. + * When you set a log level, the system logs only the message that have priority + * egual or major that you have define, but the other logs function are not include + * at compile time, so all used logs function are linked, but the other no. + * + * To use logging system you should include this module in your drive and use + * a LOG_ERROR, LOG_WARNING and LOG_INFO macros to set the level log of the message. + * Then you should define a LOG_LEVEL and LOG_VERBOSE costant in your + * \c cfg/cfg_\.h using the follow policy: + * + * - in your file \c cfg/cfg_\.h, you define the logging + * level and verbosity mode for your specific module: + * + * \code + * /// Module logging level. + * #define _LOG_LEVEL LOG_LVL_INFO + * + * /// Module logging format. + * #define _LOG_FORMAT LOG_FMT_VERBOSE + * \endcode + * + * - then, in the module that you use a logging macros you should define + * a LOG_LEVEL and LOG_FORMAT using the previous value that you have define + * in cfg_.h header. After this you should include the cfg/log.h + * module: + * + * \code + * // Define log settings for cfg/log.h. + * #define LOG_LEVEL _LOG_LEVEL + * #define LOG_FORMAT _LOG_FORMAT + * #include + * \endcode + * + * if you include a log.h module without define the LOG_LEVEL and LOG_VERBOSE + * macros, the module use the default setting (see below). + * + * WARNING: when use the log.h module, and you want to set a your log level + * make sure to include this module after a \c cfg_.h, because the + * LOG_LEVEL and LOG_VERBOSE macros must be defined before to include log module, + * otherwise the log module use a default settings. + * + * \version $Id$ + * \author Daniele Basile + * + * $WIZ$ + */ + +#ifndef CFG_LOG_H +#define CFG_LOG_H + +#include + + +// Use a default setting if nobody defined a log level +#ifndef LOG_LEVEL +#define LOG_LEVEL LOG_LVL_ERR +#endif + +// Use a default setting if nobody defined a log format +#ifndef LOG_FORMAT +#define LOG_FORMAT LOG_FMT_TERSE +#endif + +/** + * \name Logging level definition + * + * When you choose a log level messages you choose + * also which print function are linked. + * If you choose a low level of log you link all log function (error, warning and info), + * but if choose a hight level you link only that have the priority egual or hight. + * The priority level go from error (highest) to info (lowest) (see cfg/debug.h + * for more detail). + * + * $WIZ$ log_level = "LOG_LVL_NONE", "LOG_LVL_ERR", "LOG_LVL_WARN", "LOG_LVL_INFO" + * } + */ +#define LOG_LVL_NONE 0 +#define LOG_LVL_ERR 1 +#define LOG_LVL_WARN 2 +#define LOG_LVL_INFO 3 + +/** + * \name Logging format + * + * There are two logging format: terse and verbose. The latter prepends + * function names and line number information to each log entry. + * + * $WIZ$ log_format = "LOG_FMT_VERBOSE", "LOG_FMT_TERSE" + */ +#define LOG_FMT_VERBOSE 1 +#define LOG_FMT_TERSE 0 + +#if LOG_FORMAT == LOG_FMT_VERBOSE + #define LOG_PRINT(str_level, str,...) kprintf("%s():%d:%s: " str, __func__, __LINE__, str_level, ## __VA_ARGS__) +#elif LOG_FORMAT == LOG_FMT_TERSE + #define LOG_PRINT(str_level, str,...) kprintf("%s: " str, str_level, ## __VA_ARGS__) +#else + #error No LOG_FORMAT defined +#endif + +#if LOG_LEVEL >= LOG_LVL_ERR + #define LOG_ERR(str,...) LOG_PRINT("ERR", str, ## __VA_ARGS__) + #define LOG_ERRB(x) x +#else + INLINE void LOG_ERR(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_ERRB(x) /* Nothing */ +#endif + +#if LOG_LEVEL >= LOG_LVL_WARN + #define LOG_WARN(str,...) LOG_PRINT("WARN", str, ## __VA_ARGS__) + #define LOG_WARNB(x) x +#else + INLINE void LOG_WARN(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_WARNB(x) /* Nothing */ +#endif + +#if LOG_LEVEL >= LOG_LVL_INFO + #define LOG_INFO(str,...) LOG_PRINT("INFO", str, ## __VA_ARGS__) + #define LOG_INFOB(x) x +#else + INLINE void LOG_INFO(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_INFOB(x) /* Nothing */ +#endif + + +#endif /* CFG_LOG_H */ diff --git a/2.5/bertos/cfg/macros.h b/2.5/bertos/cfg/macros.h new file mode 100644 index 00000000..caa2340f --- /dev/null +++ b/2.5/bertos/cfg/macros.h @@ -0,0 +1,359 @@ +/** + * \file + * + * + * \brief Common and handy function macros + * + * \version $Id$ + * \author Bernie Innocenti + * \author Giovanni Bajo + */ +#ifndef CFG_MACROS_H +#define CFG_MACROS_H + +#include + +/* avr-gcc does not seem to support libstdc++ */ +#if defined(__cplusplus) && !CPU_AVR + /* Type-generic macros implemented with template functions. */ + #include + + template inline T ABS(T n) { return n >= 0 ? n : -n; } + #define MIN(a,b) std::min(a, b) + #define MAX(a,b) std::max(a, b) + #define SWAP(a,b) std::swap(a, b) +#elif (COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) + /* Type-generic macros implemented with statement expressions. */ + #define ABS(n) ({ \ + typeof(n) _n = (n); \ + (_n < 0) ? -_n : _n; \ + }) + #define MIN(a,b) ({ \ + typeof(a) _a = (a); \ + typeof(b) _b = (b); \ + ASSERT_TYPE_EQUAL(_a, _b); \ + /** \ + * The (typeof(_a)) cast in necessary: \ + * result type of conditional expressions is \ + * *NOT* the type of the value returned but \ + * the type that would be produced if _a and _b \ + * were mixed in an expression. \ + * Even in _a and _b are of the same type, \ + * if mixed in an expression the type will be \ + * (at least) promoted to int! \ + */ \ + ((typeof(_a))((_a < _b) ? _a : _b)); \ + }) + #define MAX(a,b) ({ \ + typeof(a) _a = (a); \ + typeof(b) _b = (b); \ + ASSERT_TYPE_EQUAL(_a, _b); \ + /** \ + * The (typeof(_a)) cast in necessary: \ + * result type of conditional expressions is \ + * *NOT* the type of the value returned but \ + * the type that would be produced if _a and _b \ + * were mixed in an expression. \ + * Even in _a and _b are of the same type, \ + * if mixed in an expression the type will be \ + * (at least) promoted to int! \ + */ \ + ((typeof(_a))((_a > _b) ? _a : _b)); \ + }) +#else /* !(COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) */ + /* Buggy macros for inferior compilers. */ + #define ABS(a) (((a) < 0) ? -(a) : (a)) + #define MIN(a,b) (((a) < (b)) ? (a) : (b)) + #define MAX(a,b) (((a) > (b)) ? (a) : (b)) +#endif /* !(COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) */ + +/** Bound \a x between \a min and \a max. */ +#define MINMAX(min,x,max) (MIN(MAX(min, x), max)) + +#ifdef __cplusplus + /* Use standard implementation from */ + #define SWAP(a,b) std::swap(a, b) +#elif COMPILER_TYPEOF + /** + * Type-generic macro to swap \a a with \a b. + * + * \note Arguments are evaluated multiple times. + */ + #define SWAP(a, b) \ + do { \ + typeof(a) tmp; \ + ASSERT_TYPE_EQUAL(a, b); \ + tmp = (a); \ + (a) = (b); \ + (b) = tmp; \ + } while (0) +#else /* !COMPILER_TYPEOF */ + /* Sub-optimal implementation that only works with integral types. */ + #define SWAP(a, b) \ + do { \ + (a) ^= (b); \ + (b) ^= (a); \ + (a) ^= (b); \ + } while (0) + +#endif /* COMPILER_TYPEOF */ + +/** + * Shuffle the content of \a array that counts \a len elements. + */ +#define SHUFFLE(array, len) \ + do { \ + int i, j; \ + for (i = (len) - 1; i > 0; i--) \ + { \ + j = ((i + 1) * (rand() / (RAND_MAX + 1.0))); \ + SWAP((array)[i], (array)[j]); \ + } \ + } while (0) + +/** + * Macro to swap \a a with \a b, with explicit type \a T for dumb C89 compilers. + * + * \note Arguments are evaluated multiple times. + */ +#define SWAP_T(a, b, T) \ + do { \ + T tmp; \ + ASSERT_TYPE_IS(a, T); \ + ASSERT_TYPE_IS(b, T); \ + tmp = (a); \ + (a) = (b); \ + (b) = tmp; \ + } while (0) + +/** + * Reverse the bits contained in b (LSB becomes the MSB and so on). + * \note \a b is evaluated twice + */ +#define REVERSE_UINT8(b) \ + ((uint8_t)((((b) * 0x0802UL & 0x22110UL) | ((b) * 0x8020UL & 0x88440UL)) * 0x10101UL >> 16)) + +#ifndef BV + /** Convert a bit value to a binary flag. */ + #define BV(x) (1<<(x)) +#endif + +/** Same as BV() but with 32 bit result */ +#define BV32(x) ((uint32_t)1<<(x)) + +/** Same as BV() but with 16 bit result */ +#define BV16(x) ((uint16_t)1<<(x)) + +/** Same as BV() but with 8 bit result */ +#define BV8(x) ((uint8_t)1<<(x)) + +/** + * Perform an integer division rounding the result to the nearest int value. + * \note \a divisor should preferibly be a costant, otherwise this macro generates + * 2 division. Also divisor is evaluated twice. + */ +#define DIV_ROUND(dividend, divisor) (((dividend) + (divisor) / 2) / (divisor)) + +/** + * Perform an integer division rounding the result to the upper int value. + * \note \a divisor should preferibly be a costant, otherwise this macro generates + * 2 division. Also divisor is evaluated twice. + */ +#define DIV_ROUNDUP(dividend, divisor) (((dividend) + (divisor) - 1) / (divisor)) + +/** Round up \a x to an even multiple of the 2's power \a pad. */ +#define ROUND_UP2(x, pad) (((x) + ((pad) - 1)) & ~((pad) - 1)) + +/** + * \name Integer round macros. + * + * Round \a x to a multiple of \a base. + * \note If \a x is signed these macros generate a lot of code. + * \{ + */ +#define ROUND_DOWN(x, base) ( (x) - ((x) % (base)) ) +#define ROUND_UP(x, base) ( ((x) + (base) - 1) - (((x) + (base) - 1) % (base)) ) +#define ROUND_NEAREST(x, base) ( ((x) + (base) / 2) - (((x) + (base) / 2) % (base)) ) +/* \} */ + +/** Check if \a x is an integer power of 2. */ +#define IS_POW2(x) (!(bool)((x) & ((x)-1))) + +/** Calculate a compile-time log2 for a uint8_t */ +#define UINT8_LOG2(x) \ + ((x) < 2 ? 0 : \ + ((x) < 4 ? 1 : \ + ((x) < 8 ? 2 : \ + ((x) < 16 ? 3 : \ + ((x) < 32 ? 4 : \ + ((x) < 64 ? 5 : \ + ((x) < 128 ? 6 : 7))))))) + +/** Calculate a compile-time log2 for a uint16_t */ +#define UINT16_LOG2(x) \ + ((x < 256) ? UINT8_LOG2(x) : UINT8_LOG2((x) >> 8) + 8) + +/** Calculate a compile-time log2 for a uint32_t */ +#define UINT32_LOG2(x) \ + ((x < 65536UL) ? UINT16_LOG2(x) : UINT16_LOG2((x) >> 16) + 16) + +#if COMPILER_VARIADIC_MACROS + /** Count the number of arguments (up to 16). */ + #define PP_COUNT(...) \ + PP_COUNT__(__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0) + #define PP_COUNT__(a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,count,...) \ + count +#endif + +#if COMPILER_VARIADIC_MACROS + /** + * \def BIT_CHANGE(reg, (mask, value), ...) + * + * This macro allows for efficient and compact bit toggling in a hardware + * register. It is meant to replace hand-coded cruft which toggles bits + * in sequence. + * + * It is possible to specify an unlimited pair of (mask, value) parameters. + * For instance: + * + * \code + * void set_timer(bool start) + * { + * BIT_CHANGE(REG_CTRL_TIMER, + * (TIMER_MODE, MODE_COUNT), + * (OVL_IRQ, 1), + * (CMP_IRQ, 1), + * (START, start) + * ); + * } + * \endcode + * + * The macro expansion will be roughly the following: + * + * \code + * REG_CTRL_TIMER = (REG_CTRL_TIMER & ~(TIMER_MODE|OVL_IRQ|CMP_IRQ|START) + * | (MODE_COUNT|OVL_IRQ|CMP_IRQ|(start ? START : 0)); + * \endcode + * + * It is up to the compiler to produce the optimal code. We checked that GCC produces + * the best code in most cases. We preferred this expansion over the use of a block + * with a local variable because CodeWarrior 6.1 was not able to remove completely the + * allocation of the local from the stack. + * + * \note This macro is available only in C99 because it makes use of variadic macros. + * It would be possible to make up an implementation with a slightly different syntax + * for use with C90 compilers, through Boost Preprocessor. + */ + + /** + * \def BIT_CHANGE_BV(reg, (bit, value), ...) + * + * Similar to BIT_CHANGE(), but get bits instead of masks (and applies BV() to convert + * them to masks). + */ + + #define BIT_EXTRACT_FLAG_0(bit, value) bit + #define BIT_EXTRACT_FLAG_1(bit, value) BV(bit) + #define BIT_EXTRACT_VALUE__(bit, value) value + + #define BIT_MASK_SINGLE__(use_bv, index, max, arg) \ + ((index < max) ? (PP_CAT(BIT_EXTRACT_FLAG_, use_bv) arg) : 0) \ + /* */ + + #define BIT_MASK_IF_SINGLE__(use_bv, index, max, arg) \ + (((index < max) && (BIT_EXTRACT_VALUE__ arg)) ? (PP_CAT(BIT_EXTRACT_FLAG_, use_bv) arg) : 0) \ + /* */ + + #define BIT_ITER__2(macro, use_bv, max, a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15, ...) \ + (macro(use_bv, 0, max, a0) | \ + macro(use_bv, 1, max, a1) | \ + macro(use_bv, 2, max, a2) | \ + macro(use_bv, 3, max, a3) | \ + macro(use_bv, 4, max, a4) | \ + macro(use_bv, 5, max, a5) | \ + macro(use_bv, 6, max, a6) | \ + macro(use_bv, 7, max, a7) | \ + macro(use_bv, 8, max, a8) | \ + macro(use_bv, 9, max, a9) | \ + macro(use_bv, 10, max, a10) | \ + macro(use_bv, 11, max, a11) | \ + macro(use_bv, 12, max, a12) | \ + macro(use_bv, 13, max, a13) | \ + macro(use_bv, 14, max, a14) | \ + macro(use_bv, 15, max, a15)) \ + /* */ + + #define BIT_ITER__(macro, use_bv, ...) \ + BIT_ITER__2(macro, use_bv, PP_COUNT(__VA_ARGS__), __VA_ARGS__, (0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1)) \ + /* */ + + #define BIT_MASKS__(use_bv, ...) \ + BIT_ITER__(BIT_MASK_SINGLE__, use_bv, __VA_ARGS__) + /* */ + + #define BIT_MASKS_CONDITIONAL__(use_bv, ...) \ + BIT_ITER__(BIT_MASK_IF_SINGLE__, use_bv, __VA_ARGS__) + /* */ + + #define BIT_CHANGE__(reg, use_bv, ...) \ + ((reg) = ((reg) & ~BIT_MASKS__(use_bv, __VA_ARGS__)) | BIT_MASKS_CONDITIONAL__(use_bv, __VA_ARGS__)) \ + /* */ + + #define BIT_CHANGE(reg, ...) BIT_CHANGE__(reg, 0, __VA_ARGS__) + #define BIT_CHANGE_BV(reg, ...) BIT_CHANGE__(reg, 1, __VA_ARGS__) + +#endif /* COMPILER_VARIADIC_MACROS */ + +/** + * Macro for rotating bit left or right. + * \{ + */ +#define ROTR(var, rot) (((var) >> (rot)) | ((var) << ((sizeof(var) * 8) - (rot)))) +#define ROTL(var, rot) (((var) << (rot)) | ((var) >> ((sizeof(var) * 8) - (rot)))) +/*\}*/ + +/** + * Make an id from 4 letters, useful for + * file formats and kfile ids. + */ +#define MAKE_ID(a,b,c,d) \ + ( ((uint32_t)(a) << 24) \ + | ((uint32_t)(b) << 16) \ + | ((uint32_t)(c) << 8) \ + | ((uint32_t)(d) << 0) ) + +/** + * Type for id generated by MAKE_ID(). + */ +typedef uint32_t id_t; + +#endif /* MACROS_H */ + diff --git a/2.5/bertos/cfg/module.h b/2.5/bertos/cfg/module.h new file mode 100644 index 00000000..15b6f215 --- /dev/null +++ b/2.5/bertos/cfg/module.h @@ -0,0 +1,124 @@ +/** + * \file + * + * + * \brief Debug macros for inter-module dependency checking. + * + * These macros expand to nothing in release builds. In debug + * builds, they perform run-time dependency checks for modules. + * + * The usage pattern looks like this: + * + * \code + * MOD_DEFINE(phaser) + * + * void phaser_init(void) + * { + * MOD_CHECK(computer); + * MOD_CHECK(warp_core); + * + * [...charge weapons...] + * + * MOD_INIT(phaser); + * } + * + * void phaser_cleanup(void) + * { + * MOD_CLEANUP(phaser); + * + * [...disarm phaser...] + * } + * \endcode + * + * \version $Id$ + * \author Bernie Innocenti + */ +#ifndef CFG_MODULE_H +#define CFG_MODULE_H + +#include + +/** + * Declare a global variable for module dependency check. + * + * \see MOD_INIT(), MOD_CHECK() + */ +#define MOD_DEFINE(module) DB(extern bool module ## _initialized; bool module ## _initialized;) + +/** + * Check that \a module was already initialized. + * + * Put this check just before accessing any facility + * provided by a module that requires prior initialization. + * + * \see MOD_INIT() + */ + +#define MOD_CHECK(module) \ +do { \ + DB(extern bool module ## _initialized;) \ + ASSERT(module ## _initialized); \ +} while (0) + +/** + * Mark module as initialized. + * + * Marking initialization requires the global data + * previously defined by MOD_DEFINE(). + * + * To prevent double initialization bugs, an initialized + * module must first be cleaned up with MOD_CLEANUP() before + * calling MOD_INIT() another time. + * + * \see MOD_CLEANUP(), MOD_CHECK(), MOD_DEFINE() + */ +#define MOD_INIT(module) \ +do { \ + ASSERT(!module ## _initialized); \ + DB(module ## _initialized = true;) \ +} while (0) + +/** + * Mark module as being no longer initialized. + * + * Marking initialization requires the global data + * previously defined by MOD_DEFINE(). + * + * \see MOD_INIT(), MOD_CHECK(), MOD_DEFINE() + */ +#define MOD_CLEANUP(module) \ +do { \ + ASSERT(module ## _initialized); \ + DB(module ## _initialized = false;) \ +} while (0) + +#endif /* CFG_MODULE_H */ + diff --git a/2.5/bertos/cfg/os.h b/2.5/bertos/cfg/os.h new file mode 100644 index 00000000..2e393599 --- /dev/null +++ b/2.5/bertos/cfg/os.h @@ -0,0 +1,220 @@ +/** + * \file + * + * + * \brief OS-specific definitions + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_OS_H +#define CFG_OS_H + +#include "cfg/cfg_proc.h" + +/* + * OS autodetection (Some systems trigger multiple OS definitions) + */ +#ifdef _WIN32 + #define OS_WIN32 1 + #define OS_ID win32 + + // FIXME: Maybe disable Win32 exceptions? + typedef int cpu_flags_t; + #define IRQ_DISABLE FIXME + #define IRQ_ENABLE FIXME + #define IRQ_SAVE_DISABLE(old_sigs) FIXME + #define IRQ_RESTORE(old_sigs) FIXME + +#else + #define OS_WIN32 0 +#endif + +#if defined(__unix__) || (defined(__APPLE__) && defined(__MACH__)) + #define OS_UNIX 1 + #define OS_POSIX 1 /* Not strictly UNIX, but no way to autodetect it. */ + #define OS_ID posix + + /* + * The POSIX moral equivalent of disabling IRQs is disabling signals. + */ + #include + typedef sigset_t cpu_flags_t; + + #define SET_ALL_SIGNALS(sigs) \ + do { \ + sigfillset(&sigs); \ + sigdelset(&sigs, SIGINT); \ + sigdelset(&sigs, SIGSTOP); \ + sigdelset(&sigs, SIGCONT); \ + } while(0) + + #define IRQ_DISABLE \ + do { \ + sigset_t sigs; \ + SET_ALL_SIGNALS(sigs); \ + sigprocmask(SIG_BLOCK, &sigs, NULL); \ + } while (0) + + #define IRQ_ENABLE \ + do { \ + sigset_t sigs; \ + SET_ALL_SIGNALS(sigs); \ + sigprocmask(SIG_UNBLOCK, &sigs, NULL); \ + } while (0) + + #define IRQ_SAVE_DISABLE(old_sigs) \ + do { \ + sigset_t sigs; \ + SET_ALL_SIGNALS(sigs); \ + sigprocmask(SIG_BLOCK, &sigs, &old_sigs); \ + } while (0) + + #define IRQ_RESTORE(old_sigs) \ + do { \ + sigprocmask(SIG_SETMASK, &old_sigs, NULL); \ + } while (0) + + #define IRQ_ENABLED() \ + ({ \ + sigset_t sigs__; \ + sigprocmask(SIG_SETMASK, NULL, &sigs__); \ + sigismember(&sigs__, SIGALRM) ? false : true; \ + }) + + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + #define DECLARE_ISR_CONTEXT_SWITCH(vect) \ + void vect(UNUSED_ARG(int, arg)); \ + INLINE void __isr_##vect(void); \ + void vect(UNUSED_ARG(int, arg)) \ + { \ + __isr_##vect(); \ + IRQ_PREEMPT_HANDLER(); \ + } \ + INLINE void __isr_##vect(void) + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer ISR, + * that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(vect) \ + DECLARE_ISR_CONTEXT_SWITCH(vect) + #endif /* CONFIG_KERN_PRI */ + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(vect) \ + void vect(UNUSED_ARG(int, arg)) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(vect) \ + void vect(UNUSED_ARG(int, arg)) + #endif + +#else + #define OS_UNIX 0 + #define OS_POSIX 0 +#endif + +#ifdef __linux__ + #define OS_LINUX 1 +#else + #define OS_LINUX 0 +#endif + +#if defined(__APPLE__) && defined(__MACH__) + #define OS_DARWIN 1 +#else + #define OS_DARWIN 0 +#endif + + +#include "cfg/cfg_arch.h" /* For ARCH_QT */ + +/* + * We want Qt and other frameworks to look like OSes because you would + * tipically want their portable abstractions if you're using one of these. + */ +#if defined(_QT) || (defined(ARCH_QT) && (ARCH & ARCH_QT)) + #define OS_QT 1 + #undef OS_ID + #define OS_ID qt +#else + #define OS_QT 0 +#endif + +/* + * Summarize hosted environments as OS_HOSTED and embedded + * environment with OS_EMBEDDED. + */ +#if OS_WIN32 || OS_UNIX || OS_DARWIN || OS_QT + #define OS_HOSTED 1 + #define OS_EMBEDDED 0 +#else + #define OS_HOSTED 0 + #define OS_EMBEDDED 1 + + /* Embedded environments fall back to CPU-specific code. */ + #define OS_ID CPU_ID +#endif + +/* Self-check for the detection */ +#if !defined(OS_ID) + #error OS_ID not defined +#endif +#if OS_HOSTED && OS_EMBEDDED + #error Both hosted and embedded OS environment +#endif +#if !OS_HOSTED && !OS_EMBEDDED + #error Neither hosted nor embedded OS environment +#endif + +#if OS_HOSTED + + /// Macro to include OS-specific headers. + #define OS_HEADER(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).h) + + /// Macro to include OS-specific source files. + #define OS_CSOURCE(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).c) + +#else + // Fallbacks for embedded systems + #define OS_HEADER(module) CPU_HEADER(module) + #define OS_CSOURCE(module) CPU_CSOURCE(module) +#endif + +#endif /* CFG_OS_H */ diff --git a/2.5/bertos/cfg/test.h b/2.5/bertos/cfg/test.h new file mode 100644 index 00000000..aacf7e15 --- /dev/null +++ b/2.5/bertos/cfg/test.h @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \brief Utility for the test suite. + * + * \version $Id$ + * + * \author Daniele Basile + * \author Francesco Sacchi + * + * When you want to test a module that is emulable on hosted + * platforms, these macros come in handy. + * Your module_test should supply three basic functions: + * + * \code + * int module_testSetup(void) + * int module_testRun(void) + * int module_testTearDown(void) + * \endcode + * + * All of these should return 0 if ok or a value != 0 on errors. + * + * Then, at the end of your module_test you can write: + * \code + * #if UNIT_TEST + * #include + * #include + * #include <...> + * + * TEST_MAIN(module); + * #endif + * \endcode + * + * Including directly into your module the file.c you need to + * run the test allows you to build and run the test compiling + * only one file. + * + * To achieve this you also need a main() that is supplied by + * the TEST_MAIN macro. + * This will expand to a full main that calls, in sequence: + * Setup, Run and TearDown of your module. + */ + +#ifndef CFG_TEST_H +#define CFG_TEST_H + +#include "cfg/cfg_arch.h" + +#if defined(ARCH_UNITTEST) && (ARCH & ARCH_UNITTEST) + #define UNIT_TEST 1 + + /** + * Macro used to generate a main() for a test to be compiled + * on hosted platform. + */ + #define TEST_MAIN(module) \ + int main(void) \ + { \ + if (module##_testSetup() != 0) \ + return 1; \ + if (module##_testRun() != 0) \ + return 2; \ + if (module##_testTearDown() != 0) \ + return 3; \ + return 0; \ + } +#else /* !TEST */ + #define UNIT_TEST 0 + + #define TEST_MAIN(module) /* nothing */ +#endif /* TEST */ + + +/** + * Silent an assert in a test. + * + * This is useful when we run a test and we want to test + * an error condition. We know that an assert will fail but + * this is not really an error. To ignore that we mark it + * with this macro, where str is the message string of the assert + * that we want to drop. + * To use this macro copy the assert log message and paste as argument + * of this macro. In assert message log is reported also the line number + * of the code that have generated the assert. + * In this way you can trap only the selected assert message. + */ +#define SILENT_ASSERT(str) kputs("SILENT_ASSERT:$"str"$\n") + +#endif /* CFG_TEST_H */ diff --git a/2.5/bertos/config.mk b/2.5/bertos/config.mk new file mode 100644 index 00000000..752313a3 --- /dev/null +++ b/2.5/bertos/config.mk @@ -0,0 +1,115 @@ +# +# $Id$ +# Copyright 2002,2003, 2004, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Bernie Innocenti +# Based on: GCC-AVR standard Makefile part 1, Volker Oth 1/2000 +# + +# +# Programmer type +# see local pgm_config.mk for programmer customization. + +OPTCFLAGS = -ffunction-sections -fdata-sections +#OPTCFLAGS = -funsafe-loop-optimizations + +# For AVRStudio +#DEBUGCFLAGS = -gdwarf-2 + +# For GDB +DEBUGCFLAGS = -ggdb + +# +# define some variables based on the AVR base path in $(AVR) +# +CC = gcc +CXX = g++ +AR = ar +AS = $(CC) -x assembler-with-cpp +LD = $(CC) +LDXX = $(CXX) +OBJCOPY = objcopy +STRIP = strip +INSTALL = cp -a +RM = rm -f +RM_R = rm -rf +RN = mv +MKDIR_P = mkdir -p +SHELL = /bin/sh +CHECKER = sparse +DOXYGEN = doxygen +AVRDUDE = avrdude +FLEXCAT = $(top_srcdir)/tools/flexcat/flexcat + +# For conversion from ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. +COFFCONVERT=$(OBJCOPY) \ + --debugging \ + --change-section-address .data-0x800000 \ + --change-section-address .bss-0x800000 \ + --change-section-address .noinit-0x800000 \ + --change-section-address .eeprom-0x810000 + +INCDIR = -I. -Ibertos +LIBDIR = lib +OBJDIR = obj +OUTDIR = images + +# output format can be srec, ihex (avrobj is always created) +FORMAT = srec +#FORMAT = ihex + +# Compiler flags for generating dependencies +DEP_FLAGS = -MMD -MP + +# Compiler flags for generating source listings +LIST_FLAGS = -Wa,-anhlmsd=$(@:.o=.lst) -dp + +# Linker flags for generating map files +# Only in embedded related projects generate map files +MAP_FLAGS_EMB = -Wl,-Map=$(@:%.elf=%.map),--cref +MAP_FLAGS_HOST = + +# Compiler warning flags for both C and C++ +WARNFLAGS = \ + -W -Wformat -Wall -Wundef -Wpointer-arith -Wcast-qual \ + -Wcast-align -Wwrite-strings -Wsign-compare \ + -Wmissing-noreturn \ + -Wextra -Wstrict-aliasing=2 \ +# -Wunsafe-loop-optimizations + +# Compiler warning flags for C only +C_WARNFLAGS = \ + -Wmissing-prototypes -Wstrict-prototypes + +# Default C preprocessor flags (for C, C++ and cpp+as) +CPPFLAGS = $(INCDIR) + +# Default C compiler flags +CFLAGS = $(OPTCFLAGS) $(DEBUGCFLAGS) $(WARNFLAGS) $(C_WARNFLAGS) \ + $(DEP_FLAGS) $(LIST_FLAGS) -std=gnu99 + +# Default C++ compiler flags +CXXFLAGS = $(OPTCFLAGS) $(DEBUGCFLAGS) $(WARNFLAGS) \ + $(DEP_FLAGS) $(LIST_FLAGS) + +# Default compiler assembly flags +CPPAFLAGS = $(DEBUGCFLAGS) -MMD + +# Default assembler flags +ASFLAGS = $(DEBUGCFLAGS) + +# Default linker flags +#LDFLAGS = $(MAP_FLAGS) + +#bernie: does not complain for missing symbols! +LDFLAGS = -Wl,--gc-sections + +# Flags for avrdude +AVRDUDEFLAGS = $(DPROG) + +# additional libs +LIB = -lm + +# Archiver flags +ARFLAGS = rcs diff --git a/2.5/bertos/cpu/arm/drv/adc_arm.c b/2.5/bertos/cpu/arm/drv/adc_arm.c new file mode 100644 index 00000000..f2906721 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/adc_arm.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Low-level ADC module for ARM (inplementation). + * + * + * \version $Id$ + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use adc_at91.c + + #include + + #if CPU_ARM_AT91 + #include "adc_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/2.5/bertos/cpu/arm/drv/adc_arm.h b/2.5/bertos/cpu/arm/drv/adc_arm.h new file mode 100644 index 00000000..63e7dafa --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/adc_arm.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Low-level ADC module for ARM (interface). + * + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "adc_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/adc_at91.c b/2.5/bertos/cpu/arm/drv/adc_at91.c new file mode 100644 index 00000000..4ac35861 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/adc_at91.c @@ -0,0 +1,211 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * This ADC module should be use both whit kernel or none. + * If you are using a kernel, the adc drive does not wait the finish of + * conversion but use a singal every time a required conversion are + * ended. This signal wake up a process that return a result of + * conversion. Otherwise, if you not use a kernl, this module wait + * whit a loop the finishing of conversion. + * + * + * \version $Id$ + * \author Daniele Basile + */ + + +#include "adc_at91.h" + +#include + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include + +#include + +#if CONFIG_KERN + #include + #include + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_USER0 + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + static DECLARE_ISR(adc_conversion_end_irq) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + } + + static void adc_enable_irq(void) + { + + // Disable all interrupt + ADC_IDR = 0xFFFFFFFF; + + //Register interrupt vector + AIC_SVR(ADC_ID) = adc_conversion_end_irq; + AIC_SMR(ADC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + AIC_IECR = BV(ADC_ID); + + //Enable data ready irq + ADC_IER = BV(ADC_DRDY); + } + +#endif /* CONFIG_KERN */ + + +/** + * Select mux channel \a ch. + * \todo only first 8 channels are selectable! + */ +void adc_hw_select_ch(uint8_t ch) +{ + //Disable all channels + ADC_CHDR = ADC_CH_MASK; + //Enable select channel + ADC_CHER = BV(ch); +} + + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADC_DRDY bit is done. + */ +uint16_t adc_hw_read(void) +{ + #if CONFIG_KERN + /* Ensure ADC is not already in use by another process */ + ASSERT(adc_process == NULL); + adc_process = proc_current(); + #endif + + // Start convertion + ADC_CR = BV(ADC_START); + + #if CONFIG_KERN + // Ensure IRQs enabled. + IRQ_ASSERT_ENABLED(); + sig_wait(SIG_ADC_COMPLETE); + + /* Prevent race condition in case of preemptive kernel */ + uint16_t ret = ADC_LCDR; + MEMORY_BARRIER; + adc_process = NULL; + return ret; + #else + //Wait in polling until is done + while (!(ADC_SR & BV(ADC_DRDY))); + + //Return the last converted data + return(ADC_LCDR); + #endif +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + //Init ADC pins. + ADC_INIT_PINS(); + + /* + * Set adc mode register: + * - Disable hardware trigger and enable software trigger. + * - Select normal mode. + * - Set ADC_BITS bit convertion resolution. + * + * \{ + */ + ADC_MR = 0; + #if ADC_BITS == 10 + ADC_MR &= ~BV(ADC_LOWRES); + #elif ADC_BITS == 8 + ADC_MR |= BV(ADC_LOWRES); + #else + #error No select bit resolution is supported to this CPU + #endif + /* \} */ + + LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_COMPUTED_CLOCK); + LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME, ADC_COMPUTED_SHTIME); + + + //Apply computed prescaler value + ADC_MR &= ~ADC_PRESCALER_MASK; + ADC_MR |= ((ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); + LOG_INFO("prescaler[%ld]\n", (ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); + + //Apply computed start up time + ADC_MR &= ~ADC_STARTUP_MASK; + ADC_MR |= ((ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + LOG_INFO("sttime[%ld]\n", (ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + + //Apply computed sample and hold time + ADC_MR &= ~ADC_SHTIME_MASK; + ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK); + LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK); + + #if CONFIG_KERN + //Register and enable irq for adc. + adc_enable_irq(); + #endif + +} diff --git a/2.5/bertos/cpu/arm/drv/adc_at91.h b/2.5/bertos/cpu/arm/drv/adc_at91.h new file mode 100644 index 00000000..2ec0cdb5 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/adc_at91.h @@ -0,0 +1,98 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief ADC hardware-specific definition + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef DRV_ADC_AT91_H +#define DRV_ADC_AT91_H + +#include + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#define ADC_MUX_MAXCH 8 //Max number of channel for ADC. +#define ADC_BITS 10 //Bit resolution for ADC converter. + +/** + * Macro for computing correct value to write into ADC + * register. + */ +#define ADC_COMPUTED_PRESCALER (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1) +#define ADC_COMPUTED_CLOCK (CPU_FREQ / ((ADC_COMPUTED_PRESCALER + 1) * 2)) +#define ADC_COMPUTED_STARTUPTIME (((CONFIG_ADC_STARTUP_TIME * ADC_COMPUTED_CLOCK) / 8000000UL) - 1) +#define ADC_COMPUTED_SHTIME ((uint32_t)((CONFIG_ADC_SHTIME * (uint64_t)ADC_COMPUTED_CLOCK) / 1000000000UL) - 1) + +/** + * Init pins macro for adc. + */ + +/** + * Define PIO controller for enable ADC function. + * \{ + */ +#if CPU_ARM_SAM7X + #define ADC_PIO_DISABLE PIOB_PDR + #define ADC_PIO_EN_FUNC PIOB_ASR + +#elif CPU_ARM_SAM7S_LARGE + #define ADC_PIO_DISABLE PIOA_PDR + #define ADC_PIO_EN_FUNC PIOA_BSR + +#else + #error No ADC pins name definitions for selected ARM CPU +#endif +/*\}*/ + +/** + * Init the ADC pins. + * Implement it if necessary. + */ +#define ADC_INIT_PINS() \ + do { \ + } while (0) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_AT91_H */ diff --git a/2.5/bertos/cpu/arm/drv/flash_arm.h b/2.5/bertos/cpu/arm/drv/flash_arm.h new file mode 100644 index 00000000..50b84b91 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/flash_arm.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Low-level flash module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "flash_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/flash_at91.c b/2.5/bertos/cpu/arm/drv/flash_at91.c new file mode 100644 index 00000000..06ff71e4 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/flash_at91.c @@ -0,0 +1,378 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief At91sam7 Internal flash read/write driver. + * + * + */ + +#include "flash_at91.h" + +#include "cfg/cfg_flash_at91.h" +#include + +#include "hw/hw_boot.h" + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_AT91_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_AT91_LOG_FORMAT +#include + + +#include +#include +#include + +#include + +#include + +#include +#include + +#include + +/* + * Check if flash memory is ready to accept other commands. + */ +RAM_FUNC static bool flash_at91_isReady(void) +{ + return (MC_FSR & BV(MC_FRDY)); +} + +/** + * Send write command. + * + * After WR command cpu write bufferd page into flash memory. + */ +RAM_FUNC static void flash_at91_sendWRcmd(uint32_t page) +{ + cpu_flags_t flags; + + // Wait for end of command + while(!flash_at91_isReady()) + { + cpu_relax(); + } + + IRQ_SAVE_DISABLE(flags); + + // Send the 'write page' command + MC_FCR = MC_KEY | MC_FCMD_WP | (MC_PAGEN_MASK & (page << 8)); + + // Wait for end of command + while(!flash_at91_isReady()) + { + cpu_relax(); + } + + IRQ_RESTORE(flags); +} + +/** + * Return 0 if no error are occurred after flash memory + * read or write operation, otherwise return error code. + */ +RAM_FUNC static int flash_at91_getStatus(struct KFile *_fd) +{ + (void)_fd; + + + /* + * This bit is set to one if we programming of at least one locked lock + * region. + */ + if(MC_FSR & BV(MC_LOCKE)) + return -1; + + /* + * This bit is set to one if an invalid command and/or a bad keywords was/were + * written in the Flash Command Register. + */ + if(MC_FSR & BV(MC_PROGE)) + return -2; + + return 0; +} + + +/** + * Write modified page on internal latch, and then send write command to + * flush page to internal flash. + */ +RAM_FUNC static void flash_at91_flush(Flash *fd) +{ + if (fd->page_dirty) + { + //Compute page address of current page. + page_addr_t *addr = (page_addr_t *)((fd->curr_page * FLASH_PAGE_SIZE_BYTES) + FLASH_BASE); + + //Copy modified page into internal latch. + for (page_addr_t page_addr = 0; page_addr < FLASH_PAGE_SIZE_BYTES; page_addr += 4) + { + uint32_t data; + memcpy(&data, &fd->page_buf[page_addr], sizeof(data)); + *addr = data; + addr++; + } + + // Send write command to transfer page from latch to internal flash memory. + flash_at91_sendWRcmd(fd->curr_page); + } +} + +/** + * Flush At91 flash function. + * + * Write current buffered page in flash memory (if modified). + * This function erase flash memory page before writing. + */ +static int flash_at91_kfileFlush(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + flash_at91_flush(fd); + return 0; +} + + +/** + * Check current page and if \a page is different, load it in + * temporary buffer. + */ +static void flash_at91_loadPage(Flash *fd, page_t page) +{ + if (page != fd->curr_page) + { + flash_at91_flush(fd); + // Load page + memcpy(fd->page_buf, (const char *)((page * FLASH_PAGE_SIZE_BYTES) + FLASH_BASE), FLASH_PAGE_SIZE_BYTES); + fd->curr_page = page; + LOG_INFO("Loaded page %lu\n", fd->curr_page); + } +} + + +/** + * Write program memory. + * Write \a size bytes from buffer \a _buf to file \a fd + * \note Write operations are buffered. + */ +static size_t flash_at91_write(struct KFile *_fd, const void *_buf, size_t size) +{ + Flash *fd = FLASH_CAST(_fd); + const uint8_t *buf =(const uint8_t *)_buf; + + page_t page; + page_addr_t page_addr; + size_t total_write = 0; + + size = MIN((kfile_off_t)size, (kfile_off_t)(fd->fd.size - (fd->fd.seek_pos - FLASH_BASE))); + + LOG_INFO("Writing at pos[%lu]\n", fd->fd.seek_pos); + while (size) + { + page = (fd->fd.seek_pos - FLASH_BASE) / FLASH_PAGE_SIZE_BYTES; + page_addr = (fd->fd.seek_pos - FLASH_BASE) % FLASH_PAGE_SIZE_BYTES; + + flash_at91_loadPage(fd, page); + + size_t wr_len = MIN(size, (size_t)(FLASH_PAGE_SIZE_BYTES - page_addr)); + + memcpy(fd->page_buf + page_addr, buf, wr_len); + fd->page_dirty = true; + + buf += wr_len; + fd->fd.seek_pos += wr_len; + size -= wr_len; + total_write += wr_len; + } + LOG_INFO("written %u bytes\n", total_write); + return total_write; +} + +/** + * Close file \a fd + */ +static int flash_at91_close(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + flash_at91_flush(fd); + LOG_INFO("Flash file closed\n"); + + return 0; +} + +/** + * Open flash file \a fd + * \a name and \a mode are unused, cause flash memory is + * threated like one file. + */ +static void flash_at91_open(struct Flash *fd) +{ + fd->fd.size = FLASH_BASE + FLASH_MEM_SIZE; + fd->fd.seek_pos = FLASH_BASE + FLASH_BOOT_SIZE; + fd->curr_page = (fd->fd.seek_pos - FLASH_BASE) / FLASH_PAGE_SIZE_BYTES; + + memcpy(fd->page_buf, (const char *)((fd->curr_page * FLASH_PAGE_SIZE_BYTES) + FLASH_BASE), FLASH_PAGE_SIZE_BYTES); + + fd->page_dirty = false; + LOG_INFO("Flash file opened\n"); +} + + +/** + * Move \a fd file seek position of \a offset bytes from \a whence. + * + */ +static kfile_off_t flash_at91_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence) +{ + Flash *fd = FLASH_CAST(_fd); + kfile_off_t seek_pos; + + switch (whence) + { + + case KSM_SEEK_SET: + seek_pos = FLASH_BASE + FLASH_BOOT_SIZE; + break; + case KSM_SEEK_END: + seek_pos = fd->fd.size; + break; + case KSM_SEEK_CUR: + seek_pos = fd->fd.seek_pos; + break; + default: + ASSERT(0); + return EOF; + break; + } + + #if LOG_LEVEL >= LOG_LVL_INFO + /* Bound check */ + if (seek_pos + offset > fd->fd.size) + LOG_INFO("seek outside EOF\n"); + #endif + + fd->fd.seek_pos = seek_pos + offset; + + return fd->fd.seek_pos - (FLASH_BASE + FLASH_BOOT_SIZE); +} + +/** + * Reopen file \a fd + */ +static struct KFile *flash_at91_reopen(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + flash_at91_close(_fd); + flash_at91_open(fd); + + return _fd; +} + +/** + * Read from file \a fd \a size bytes and put it in buffer \a buf + * \return the number of bytes read. + */ +static size_t flash_at91_read(struct KFile *_fd, void *_buf, size_t size) +{ + Flash *fd = FLASH_CAST(_fd); + uint8_t *buf =(uint8_t *)_buf; + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Reading at pos[%lu]\n", fd->fd.seek_pos); + + // Flush current buffered page (if modified). + flash_at91_flush(fd); + + uint32_t *addr = (uint32_t *)fd->fd.seek_pos; + memcpy(buf, (uint8_t *)addr, size); + + fd->fd.seek_pos += size; + + LOG_INFO("Read %u bytes\n", size); + return size; +} + + +/** + * Init module to perform write and read operation on internal + * flash memory. + */ +void flash_hw_init(struct Flash *fd) +{ + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_FLASH); + + // Set up flash programming functions. + fd->fd.reopen = flash_at91_reopen; + fd->fd.close = flash_at91_close; + fd->fd.write = flash_at91_write; + fd->fd.read = flash_at91_read; + fd->fd.seek = flash_at91_seek; + fd->fd.error = flash_at91_getStatus; + fd->fd.flush = flash_at91_kfileFlush; + + flash_at91_open(fd); + + uint32_t fmcn; + uint32_t fws = 0; + + + /* + * Compute values to insert into mode register. + */ + + /* main clocks in 1.5uS */ + fmcn = (CPU_FREQ/1000000ul) + (CPU_FREQ/2000000ul) + 1; + + /* hard overclocking */ + if (fmcn > 0xFF) + fmcn = 0xFF; + + /* Only allow fmcn=0 if clock period is > 30 us = 33kHz. */ + if (CPU_FREQ <= 33333ul) + fmcn = 0; + + /* Only allow fws=0 if clock frequency is < 30 MHz. */ + if (CPU_FREQ > 30000000ul) + { + fws = 1; + } + + // Set wait states and number of MCK cycles in 1.5 usecs + MC_FMR = fmcn << 16 | fws << 8; + +} diff --git a/2.5/bertos/cpu/arm/drv/flash_at91.h b/2.5/bertos/cpu/arm/drv/flash_at91.h new file mode 100644 index 00000000..0b6c8d66 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/flash_at91.h @@ -0,0 +1,105 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief At91sam7 Internal flash read/write driver. + * + * + */ + +#ifndef FLASH_AT91_H +#define FLASH_AT91_H + +#include + +#include + +#include + + +#define FLASH_PAGE_SIZE FLASH_PAGE_SIZE_BYTES + +/** + * Define data type to manage page and memory address. + */ +typedef uint32_t page_t; +typedef uint32_t page_addr_t; + +struct Flash; + +/** + * FlashAt91 KFile context structure. + * + * DEPREACTED STRUCTURE! + * Use EmbFlash instead + * + * \{ + */ +typedef struct FlashAt91 +{ + /** + * File descriptor. + */ + KFile fd; + + /** + * Flag for checking if current page is modified. + */ + bool page_dirty; + + /** + * Current buffered page. + */ + page_t curr_page; + + /** + * Temporary buffer cointaing data block to + * write on flash. + */ + uint8_t page_buf[FLASH_PAGE_SIZE_BYTES]; +} FlashAt91; +/* \} */ + +void flash_hw_init(struct Flash *fd); + +/** + * WARNING! + * This function is DEPRECADED! + * use the emb_flash module instead. + */ +INLINE void flash_at91_init(struct FlashAt91 *fd) +{ + flash_hw_init((struct Flash *)fd); +} + +#endif /* DRV_FLASH_ARM_H */ diff --git a/2.5/bertos/cpu/arm/drv/i2s_at91.c b/2.5/bertos/cpu/arm/drv/i2s_at91.c new file mode 100644 index 00000000..edb8ba04 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/i2s_at91.c @@ -0,0 +1,175 @@ +/** + * \file + * + * + * \brief I2S driver implementation. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#include "i2s_at91.h" + +#include +#include +#include + +#define DATALEN (15 & SSC_DATLEN_MASK) +// FIXME: this is not correct for 16 <= DATALEN < 24 +#define PDC_DIV ((DATALEN / 8) + 1) +/* PDC_DIV must be 1, 2 or 4, which are the bytes that are transferred + * each time the PDC reads from memory. + */ +STATIC_ASSERT(PDC_DIV % 2 == 0); +#define PDC_COUNT (CONFIG_PLAY_BUF_LEN / PDC_DIV) + +static uint8_t play_buf1[CONFIG_PLAY_BUF_LEN]; +static uint8_t play_buf2[CONFIG_PLAY_BUF_LEN]; + +// the buffer in PDC next is play_buf2 +volatile bool is_second_buf_next; + +uint8_t *i2s_getBuffer(unsigned buf_num) +{ + LOG_INFO("getBuffer start\n"); + + if (i2s_isPlaying()) + { + ASSERT(0); + return 0; + } + + if (buf_num == I2S_SECOND_BUF) + return play_buf2; + else if (buf_num == I2S_FIRST_BUF) + return play_buf1; + else + return 0; +} + +uint8_t *i2s_getFreeBuffer(void) +{ + if (!i2s_isPlaying()) + { + ASSERT(0); + return 0; + } + + // wait PDC transmission end + if (!(SSC_SR & BV(SSC_ENDTX))) + return 0; + + uint8_t *ret_buf = 0; + // the last time we got called, the second buffer was in PDC next + if (is_second_buf_next) + { + is_second_buf_next = false; + ret_buf = play_buf1; + } + // the last time the first buffer was in PDC next + else + { + is_second_buf_next = true; + ret_buf = play_buf2; + } + + if (ret_buf) + { + SSC_TNPR = (reg32_t) ret_buf; + SSC_TNCR = PDC_COUNT; + } + return ret_buf; +} + +bool i2s_start(void) +{ + /* Some time must pass between disabling and enabling again the transmission + * on SSC. A good empirical value seems >15 us. We try to avoid putting an + * explicit delay, instead we disable the transmitter when a sound finishes + * and hope that the delay has passed before we enter here again. + */ + SSC_CR = BV(SSC_TXDIS); + timer_delay(10); + + SSC_PTCR = BV(PDC_TXTDIS); + SSC_TPR = (reg32_t)play_buf1; + SSC_TCR = PDC_COUNT; + SSC_TNPR = (reg32_t)play_buf2; + SSC_TNCR = PDC_COUNT; + is_second_buf_next = true; + + SSC_PTCR = BV(PDC_TXTEN); + + /* enable output */ + SSC_CR = BV(SSC_TXEN); + + return true; +} + +#define BITS_PER_CHANNEL 16 +#define N_OF_CHANNEL 2 +// TODO: check the computed value? +/* The last parameter (2) is due to the hadware on at91sam7s. */ +#define MCK_DIV (CPU_FREQ / CONFIG_SAMPLE_FREQ / BITS_PER_CHANNEL / N_OF_CHANNEL / 2) + +#define CONFIG_DELAY 1 +#define CONFIG_PERIOD 15 +#define CONFIG_DATNB 1 +#define CONFIG_FSLEN 15 + +#define DELAY ((CONFIG_DELAY << SSC_STTDLY_SHIFT) & SSC_STTDLY_MASK) +#define PERIOD ((CONFIG_PERIOD << (SSC_PERIOD_SHIFT)) & SSC_PERIOD_MASK) +#define DATNB ((CONFIG_DATNB << SSC_DATNB_SHIFT) & SSC_DATNB_MASK) +#define FSLEN ((CONFIG_FSLEN << SSC_FSLEN_SHIFT) & SSC_FSLEN_MASK) + +#define SSC_DMA_IRQ_PRIORITY 5 + +void i2s_init(void) +{ + PIOA_PDR = BV(SSC_TK) | BV(SSC_TF) | BV(SSC_TD); + /* reset device */ + SSC_CR = BV(SSC_SWRST); + + SSC_CMR = MCK_DIV & SSC_DIV_MASK; + SSC_TCMR = SSC_CKS_DIV | SSC_CKO_CONT | SSC_CKG_NONE | DELAY | PERIOD | SSC_START_FALL_F; + SSC_TFMR = DATALEN | DATNB | FSLEN | BV(SSC_MSBF) | SSC_FSOS_NEGATIVE; + + /* Disable all irqs */ + SSC_IDR = 0xFFFFFFFF; + + /* Enable the SSC IRQ */ + AIC_IECR = BV(SSC_ID); + + /* enable i2s */ + PMC_PCER = BV(SSC_ID); + + /* Enable SSC */ + SSC_CR = BV(SSC_TXEN); +} diff --git a/2.5/bertos/cpu/arm/drv/i2s_at91.h b/2.5/bertos/cpu/arm/drv/i2s_at91.h new file mode 100644 index 00000000..abdbdc28 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/i2s_at91.h @@ -0,0 +1,117 @@ +/** + * \file + * + * + * \brief I2S driver functions. + * + * This driver uses a double buffering technique to keep i2s bus busy. First fill in the two buffers + * using i2s_getBuffer(), then start audio playing with i2s_start(). Then call i2s_getFreeBuffer() + * until you have finished your samples. The reproduction will automatically stop if you don't + * call i2s_getFreeBuffer() frequently enough. + * + * Example: + * \code + * // fill in the buffers before start + * buf = i2s_getBuffer(I2S_FIRST_BUF); + * // ... + * buf = i2s_getBuffer(I2S_SECOND_BUF); + * // ... + * // here the driver will play only the first two buffers... + * i2s_start(); + * // ...call getFreeBuffer() to continue playing. + * while (!(buf = i2s_getFreeBuffer())) + * ; + * // now fill the buffer again + * \endcode + * + * \version $Id$ + * \author Luca Ottaviano + * + * $WIZ$ module_name = "i2s" + * $WIZ$ module_configuration = "bertos/cfg/cfg_i2s.h" + * $WIZ$ module_supports = "at91" + */ + +#ifndef I2S_H +#define I2S_H + +#include "cfg/cfg_i2s.h" + +#include +#include +#include + +/** + * First buffer. + */ +#define I2S_FIRST_BUF 0 +/** + * Second buffer. + */ +#define I2S_SECOND_BUF 1 + +/** + * Initializes the module and sets current buffer to I2S_FIRST_BUF. + */ +void i2s_init(void); + +/** + * Returns one of the two buffers or NULL if none is available. + * + * You can't call this function if you have already started the player. + * \param buf_num The number of the buffer, ie I2S_FIRST_BUF or I2S_SECOND_BUF. + * \return A pointer to the buffer if the buffer is available (not full), 0 on errors + */ +uint8_t *i2s_getBuffer(unsigned buf_num); + +/** + * Returns a buffer that will be played after the current one. + * + * You should fill it faster than your reproduction time. You can't call this function + * if the player is not running + * \return The next buffer to be played, 0 if both are busy. + */ +uint8_t *i2s_getFreeBuffer(void); + +/** + * Starts playing from I2S_FIRST_BUFFER. + * + * You must have filled both buffers before calling this function. Does nothing if already playing. + * \return false on errors, true otherwise. + */ +bool i2s_start(void); + +INLINE bool i2s_isPlaying(void) +{ + return !(SSC_SR & BV(SSC_TXEMPTY)); +} + +#endif /* I2S_H */ diff --git a/2.5/bertos/cpu/arm/drv/kdebug_arm.c b/2.5/bertos/cpu/arm/drv/kdebug_arm.c new file mode 100644 index 00000000..5ec3cded --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/kdebug_arm.c @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief Low-level kdebug module for ARM (inplementation). + */ + +#include + +#if CPU_ARM_AT91 + #include "kdebug_at91.c" +#elif CPU_ARM_LPC2 + #include "kdebug_lpc2.c" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/kdebug_at91.c b/2.5/bertos/cpu/arm/drv/kdebug_at91.c new file mode 100644 index 00000000..5f1b6023 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/kdebug_at91.c @@ -0,0 +1,94 @@ +/** + * \file + * + * + * \brief ARM debug support (implementation). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "kdebug_at91.h" +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include + +#if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU + #define KDBG_WAIT_READY() while (!(DBGU_SR & BV(US_TXRDY))) {} + #define KDBG_WAIT_TXDONE() while (!(DBGU_SR & BV(US_TXEMPTY))) {} + + #define KDBG_WRITE_CHAR(c) do { DBGU_THR = (c); } while(0) + + /* Debug unit is used only for debug purposes so does not generate interrupts. */ + #define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + + /* Debug unit is used only for debug purposes so does not generate interrupts. */ + #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + + typedef uint32_t kdbg_irqsave_t; + +#else + #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU + /* Disable all DBGU interrupts. */ + DBGU_IDR = 0xFFFFFFFF; + /* Reset DBGU */ + DBGU_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS); + /* Set baudrate */ + DBGU_BRGR = DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE); + /* Set DBGU mode to 8 data bits, no parity and 1 stop bit. */ + DBGU_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1; + /* Enable DBGU transmitter. */ + DBGU_CR = BV(US_TXEN); + /* Disable PIO on DGBU tx pin. */ + PIOA_PDR = BV(DTXD); + PIOA_ASR = BV(DTXD); + + #if 0 /* Disable Rx for now */ + /* Enable DBGU receiver. */ + DBGU_CR = BV(US_RXEN); + /* Disable PIO on DGBU rx pin. */ + PIOA_PDR = BV(DRXD); + PIOA_ASR = BV(DRXD); + #endif + #else + #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU + #endif /* CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU */ +} diff --git a/2.5/bertos/cpu/arm/drv/kdebug_at91.h b/2.5/bertos/cpu/arm/drv/kdebug_at91.h new file mode 100644 index 00000000..165764e5 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/kdebug_at91.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief ARM debug support (interface). + */ + +#ifndef DRV_KDEBUG_AT91_H +#define DRV_KDEBUG_AT91_H + +/** + * \name Values for CONFIG_KDEBUG_PORT. + * + * Select which hardware UART to use for system debug. + * + * \{ + */ +#define KDEBUG_PORT_DBGU 0 ///< Debug on Debug Unit. + +#define KDEBUG_PORT_DEFAULT KDEBUG_PORT_DBGU ///< Default debug port. +/* \} */ + +#endif /* DRV_KDEBUG_AT91_H */ diff --git a/2.5/bertos/cpu/arm/drv/kdebug_lpc2.c b/2.5/bertos/cpu/arm/drv/kdebug_lpc2.c new file mode 100644 index 00000000..0de6fb33 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/kdebug_lpc2.c @@ -0,0 +1,92 @@ +/** + * \file + * + * + * \brief ARM debug support (implementation). + * + * \author Francesco Sacchi + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include + +#if CONFIG_KDEBUG_PORT == 0 + #define KDBG_WAIT_READY() while (!(U0LSR & BV(5))) {} + #define KDBG_WAIT_TXDONE() while (!(U0LSR & BV(6))) {} + + #define KDBG_WRITE_CHAR(c) do { U0THR = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = U0IER; \ + U0IER &= ~BV(1); \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + U0IER = (old); \ + } while(0) + + typedef uint32_t kdbg_irqsave_t; + +#else + #error CONFIG_KDEBUG_PORT should be 0 +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == 0 + /* Enable clock for UART0 */ + PCONP = BV(3); + /* Set UART0 clk to CPU_FREQ */ + PCLKSEL0 &= ~0xC0; + PCLKSEL0 |= 0x40; + /* Set 8bit, 1 stop bit, no parity, DLAB = 1 (enable divisor modify) */ + U0LCR = 0x83; + U0DLL = DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) & 0xFF; + U0DLM = (DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) >> 8) & 0xFF; + U0FDR = 0x10; + /* Assign TX pin to UART0*/ + PINSEL0 &= ~0x30; + PINSEL0 |= 0x10; + /* Set 8bit, 1 stop bit, no parity, DLAB = 0 (disable divisor modify) */ + U0LCR = 0x03; + /* Enable transmitter */ + U0TER = BV(7); + #else + #error CONFIG_KDEBUG_PORT should be 0 + #endif /* CONFIG_KDEBUG_PORT == 0 */ +} diff --git a/2.5/bertos/cpu/arm/drv/pwm_arm.c b/2.5/bertos/cpu/arm/drv/pwm_arm.c new file mode 100644 index 00000000..975d8db7 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/pwm_arm.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Low-level PWM module for ARM (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use pwm_at91.c + + #include + + #if CPU_ARM_AT91 + #include "pwm_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ + diff --git a/2.5/bertos/cpu/arm/drv/pwm_arm.h b/2.5/bertos/cpu/arm/drv/pwm_arm.h new file mode 100644 index 00000000..f3e95e1c --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/pwm_arm.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level PWM module for ARM (interface). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "pwm_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/pwm_at91.c b/2.5/bertos/cpu/arm/drv/pwm_at91.c new file mode 100644 index 00000000..39fd4a66 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/pwm_at91.c @@ -0,0 +1,251 @@ +/** + * \file + * + * + * + * \brief PWM hardware-specific implementation + * + * \version $Id$ + * \author Daniele Basile + */ + +#include "pwm_at91.h" +#include "hw/pwm_map.h" +#include +#include "cfg/cfg_pwm.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PWM_LOG_LEVEL +#define LOG_FORMAT PWM_LOG_FORMAT +#include + +#include +#include + +#include + + +/** + * Register structure for pwm driver. + * This array content all data and register pointer + * to manage pwm peripheral device. + */ +static PwmChannel pwm_map[PWM_CNT] = +{ + {//PWM Channel 0 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM0), + .mode_reg = &PWM_CMR0, + .duty_reg = &PWM_CDTY0, + .period_reg = &PWM_CPRD0, + .update_reg = &PWM_CUPD0, + }, + {//PWM Channel 1 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM1), + .mode_reg = &PWM_CMR1, + .duty_reg = &PWM_CDTY1, + .period_reg = &PWM_CPRD1, + .update_reg = &PWM_CUPD1, + }, + {//PWM Channel 2 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM2), + .mode_reg = &PWM_CMR2, + .duty_reg = &PWM_CDTY2, + .period_reg = &PWM_CPRD2, + .update_reg = &PWM_CUPD2, + }, + {//PWM Channel 3 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM3), + .mode_reg = &PWM_CMR3, + .duty_reg = &PWM_CDTY3, + .period_reg = &PWM_CPRD3, + .update_reg = &PWM_CUPD3, + } +}; + + +/** + * Get preiod from select channel + * + * \a dev channel + */ +pwm_period_t pwm_hw_getPeriod(PwmDev dev) +{ + return *pwm_map[dev].period_reg; +} + +/** + * Set pwm waveform frequecy. + * + * \a freq in Hz + */ +void pwm_hw_setFrequency(PwmDev dev, uint32_t freq) +{ + uint32_t period = 0; + + for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++) + { + period = CPU_FREQ / (BV(i) * freq); + LOG_INFO("period[%ld], prescale[%d]\n", period, i); + if ((period < PWM_HW_MAX_PERIOD) && (period != 0)) + { + //Clean previous channel prescaler, and set new + *pwm_map[dev].mode_reg &= ~PWM_CPRE_MCK_MASK; + *pwm_map[dev].mode_reg |= i; + //Set pwm period + *pwm_map[dev].period_reg = period; + break; + } + } + + LOG_INFO("PWM ch[%d] period[%ld]\n", dev, period); +} + +/** + * Set pwm duty cycle. + * + * \a duty value 0 - 2^16 + */ +void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty) +{ + ASSERT(duty <= (uint16_t)*pwm_map[dev].period_reg); + + + /* + * If polarity flag is true we must invert + * PWM polarity. + */ + if (pwm_map[dev].pol) + { + duty = (uint16_t)*pwm_map[dev].period_reg - duty; + LOG_INFO("Inverted duty[%d], pol[%d]\n", duty, pwm_map[dev].pol); + } + + /* + * WARNING: is forbidden to write 0 to duty cycle value, + * and so for duty = 0 we must enable PIO and clear output! + */ + if (!duty) + { + PWM_PIO_CODR = pwm_map[dev].pwm_pin; + PWM_PIO_PER = pwm_map[dev].pwm_pin; + pwm_map[dev].duty_zero = true; + } + else + { + PWM_PIO_PDR = pwm_map[dev].pwm_pin; + PWM_PIO_ABSR = pwm_map[dev].pwm_pin; + + *pwm_map[dev].update_reg = duty; + pwm_map[dev].duty_zero = false; + } + + PWM_ENA = BV(dev); + LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n", dev, duty, *pwm_map[dev].period_reg); +} + + +/** + * Enable select pwm channel + */ +void pwm_hw_enable(PwmDev dev) +{ + if (!pwm_map[dev].duty_zero) + { + PWM_PIO_PDR = pwm_map[dev].pwm_pin; + PWM_PIO_ABSR = pwm_map[dev].pwm_pin; + } +} + +/** + * Disable select pwm channel + */ +void pwm_hw_disable(PwmDev dev) +{ + PWM_PIO_PER = pwm_map[dev].pwm_pin; +} + +/** + * Set PWM polarity to select pwm channel + */ +void pwm_hw_setPolarity(PwmDev dev, bool pol) +{ + pwm_map[dev].pol = pol; + LOG_INFO("Set pol[%d]\n", pwm_map[dev].pol); +} + +/** + * Init pwm. + */ +void pwm_hw_init(void) +{ + + /* + * Init pwm: + * WARNING: is forbidden to write 0 to duty cycle value, + * and so for duty = 0 we must enable PIO and clear output! + * - clear PIO outputs + * - enable PIO outputs + * - Disable PIO and enable PWM functions + * - Power on PWM + */ + PWM_PIO_CODR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PWM_PIO_OER = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PWM_PIO_PDR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PWM_PIO_ABSR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PMC_PCER |= BV(PWMC_ID); + + /* Disable all channels. */ + PWM_DIS = 0xFFFFFFFF; + /* Disable prescalers A and B */ + PWM_MR = 0; + + /* + * Set pwm mode: + * - set period alidned to left + * - set output waveform to start at high level + * - allow duty cycle modify at next period event + */ + for (int ch = 0; ch < PWM_CNT; ch++) + { + *pwm_map[ch].mode_reg = 0; + *pwm_map[ch].mode_reg = BV(PWM_CPOL); + } + +} + diff --git a/2.5/bertos/cpu/arm/drv/pwm_at91.h b/2.5/bertos/cpu/arm/drv/pwm_at91.h new file mode 100644 index 00000000..c8b0fd47 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/pwm_at91.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * + * \brief PWM hardware-specific definition + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef DRV_PWM_AT91_H +#define DRV_PWM_AT91_H + +#include "hw/pwm_map.h" + +#include +#include + +#include + + +#define PWM_HW_MAX_PRESCALER_STEP 10 +#define PWM_HW_MAX_PERIOD 0xFFFF + +/** + * Type definition for pwm period. + */ +typedef uint16_t pwm_period_t; + +/** + * Structur definition for pwm driver. + */ +typedef struct PwmChannel +{ + bool duty_zero; ///< True if duty cyle is zero, false otherwise. + bool pol; ///< PWM polarty flag. + int pwm_pin; ///< PWM pin. + reg32_t *mode_reg; ///< PWM mode register. + reg32_t *duty_reg; ///< PWM duty cycle register. + reg32_t *period_reg; ///< PWM periodic register. + reg32_t *update_reg; ///< Update setting register for PWM. + +} PwmChannel; + + +void pwm_hw_init(void); +void pwm_hw_setFrequency(PwmDev dev, uint32_t freq); +void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty); +void pwm_hw_disable(PwmDev dev); +void pwm_hw_enable(PwmDev dev); +void pwm_hw_setPolarity(PwmDev dev, bool pol); +pwm_period_t pwm_hw_getPeriod(PwmDev dev); + +#endif /* DRV_ADC_AT91_H */ diff --git a/2.5/bertos/cpu/arm/drv/ser_arm.c b/2.5/bertos/cpu/arm/drv/ser_arm.c new file mode 100644 index 00000000..1fd0f6a5 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/ser_arm.c @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Low-level serial module for ARM (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use ser_at91.c + + #include + + #if CPU_ARM_AT91 + #include "ser_at91.c" + #elif CPU_ARM_LPC2378 + #include "ser_lpc2.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/2.5/bertos/cpu/arm/drv/ser_arm.h b/2.5/bertos/cpu/arm/drv/ser_arm.h new file mode 100644 index 00000000..8c39fcf7 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/ser_arm.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Low-level serial module for ARM (interface). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "ser_at91.h" +#elif CPU_ARM_LPC2378 + #include "ser_lpc2.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/ser_at91.c b/2.5/bertos/cpu/arm/drv/ser_at91.c new file mode 100644 index 00000000..ffa5a440 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/ser_at91.c @@ -0,0 +1,919 @@ +/** + * \file + * + * + * \brief ARM UART and SPI I/O driver + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#include "hw/hw_ser.h" /* Required for bus macros overrides */ +#include /* CPU_FREQ */ + +#include "cfg/cfg_ser.h" +#include + + +#include + +#include + +#include +#include + +#include + + +#define SERIRQ_PRIORITY 4 ///< default priority for serial irqs. + +/** + * \name Overridable serial bus hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as half-duplex, 485, etc. + * + * + * \code + * TXBEGIN TXCHAR TXEND TXOFF + * | __________|__________ | | + * | | | | | | | | | + * v v v v v v v v v + * ______ __ __ __ __ __ __ ________________ + * \/ \/ \/ \/ \/ \/ \/ + * ______/\__/\__/\__/\__/\__/\__/ + * + * \endcode + * + * \{ + */ + +#ifndef SER_UART0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart0_init() + * + * - Disable GPIO on USART0 tx/rx pins + */ + #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X + #warning Check USART0 pins! + #endif + #define SER_UART0_BUS_TXINIT do { \ + PIOA_PDR = BV(RXD0) | BV(TXD0); \ + } while (0) + +#endif + +#ifndef SER_UART0_BUS_TXBEGIN + /** + * Invoked before starting a transmission + */ + #define SER_UART0_BUS_TXBEGIN +#endif + +#ifndef SER_UART0_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART0_BUS_TXCHAR(c) do { \ + US0_THR = (c); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + */ + #define SER_UART0_BUS_TXEND +#endif + +/* End USART0 macros */ + +#ifndef SER_UART1_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart1_init() + * + * - Disable GPIO on USART1 tx/rx pins + */ + #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X + #warning Check USART1 pins! + #endif + #define SER_UART1_BUS_TXINIT do { \ + PIOA_PDR = BV(RXD1) | BV(TXD1); \ + } while (0) + +#endif + +#ifndef SER_UART1_BUS_TXBEGIN + /** + * Invoked before starting a transmission + */ + #define SER_UART1_BUS_TXBEGIN +#endif + +#ifndef SER_UART1_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART1_BUS_TXCHAR(c) do { \ + US1_THR = (c); \ + } while (0) +#endif + +#ifndef SER_UART1_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + */ + #define SER_UART1_BUS_TXEND +#endif + +/** +* \name Overridable SPI hooks +* +* These can be redefined in hw.h to implement +* special bus policies such as slave select pin handling, etc. +* +* \{ +*/ + +#ifndef SER_SPI0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI0_BUS_TXINIT +#endif + +#ifndef SER_SPI0_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI0_BUS_TXCLOSE +#endif + +#if CPU_ARM_SAM7X + + #ifndef SER_SPI1_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI1_BUS_TXINIT + #endif + + #ifndef SER_SPI1_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI1_BUS_TXCLOSE + #endif +#endif +/*\}*/ + + + + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; + +static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; +static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; + +static unsigned char spi0_txbuffer[CONFIG_SPI0_TXBUFSIZE]; +static unsigned char spi0_rxbuffer[CONFIG_SPI0_RXBUFSIZE]; +#if CPU_ARM_SAM7X +static unsigned char spi1_txbuffer[CONFIG_SPI1_TXBUFSIZE]; +static unsigned char spi1_rxbuffer[CONFIG_SPI1_RXBUFSIZE]; +#endif + +/** + * Internal hardware state structure + * + * The \a sending variable is true while the transmission + * interrupt is retriggering itself. + * + * For the USARTs the \a sending flag is useful for taking specific + * actions before sending a burst of data, at the start of a trasmission + * but not before every char sent. + * + * For the SPI, this flag is necessary because the SPI sends and receives + * bytes at the same time and the SPI IRQ is unique for send/receive. + * The only way to start transmission is to write data in SPDR (this + * is done by spi_starttx()). We do this *only* if a transfer is + * not already started. + */ +struct ArmSerial +{ + struct SerialHardware hw; + volatile bool sending; +}; + +static ISR_PROTO(uart0_irq_dispatcher); +static ISR_PROTO(uart1_irq_dispatcher); +static ISR_PROTO(spi0_irq_handler); +#if CPU_ARM_SAM7X +static ISR_PROTO(spi1_irq_handler); +#endif +/* + * Callbacks for USART0 + */ +static void uart0_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + US0_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(US0_ID) = uart0_irq_dispatcher; + /* Initialize to level sensitive with defined priority. */ + AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY; + PMC_PCER = BV(US0_ID); + + /* + * - Reset USART0 + * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + US0_CR = BV(US_RSTRX) | BV(US_RSTTX); + US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; + US0_CR = BV(US_RXEN) | BV(US_TXEN); + US0_IER = BV(US_RXRDY); + + SER_UART0_BUS_TXINIT; + + /* Enable the USART IRQ */ + AIC_IECR = BV(US0_ID); + + SER_STROBE_INIT; +} + +static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + US0_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA); +} + +static void uart0_enabletxirq(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + /* + * - Enable the transmitter + * - Enable TX empty interrupt + */ + SER_UART0_BUS_TXBEGIN; + US0_IER = BV(US_TXEMPTY); + } +} + +static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + US0_BRGR = CPU_FREQ / (16 * rate); + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + US0_MR &= ~US_PAR_MASK; + /* Set UART parity */ + switch(parity) + { + case SER_PARITY_NONE: + { + /* Parity none. */ + US0_MR |= US_PAR_NO; + break; + } + case SER_PARITY_EVEN: + { + /* Even parity. */ + US0_MR |= US_PAR_EVEN; + break; + } + case SER_PARITY_ODD: + { + /* Odd parity. */ + US0_MR |= US_PAR_ODD; + break; + } + default: + ASSERT(0); + } + +} +/* + * Callbacks for USART1 + */ +static void uart1_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + US1_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(US1_ID) = uart1_irq_dispatcher; + /* Initialize to level sensitive with defined priority. */ + AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY; + PMC_PCER = BV(US1_ID); + + /* + * - Reset USART1 + * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + US1_CR = BV(US_RSTRX) | BV(US_RSTTX); + US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; + US1_CR = BV(US_RXEN) | BV(US_TXEN); + US1_IER = BV(US_RXRDY); + + SER_UART1_BUS_TXINIT; + + /* Enable the USART IRQ */ + AIC_IECR = BV(US1_ID); + + SER_STROBE_INIT; +} + +static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + US1_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA); +} + +static void uart1_enabletxirq(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + /* + * - Enable the transmitter + * - Enable TX empty interrupt + */ + SER_UART1_BUS_TXBEGIN; + US1_IER = BV(US_TXEMPTY); + } +} + +static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + US1_BRGR = CPU_FREQ / (16 * rate); + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + US1_MR &= ~US_PAR_MASK; + /* Set UART parity */ + switch(parity) + { + case SER_PARITY_NONE: + { + /* Parity none. */ + US1_MR |= US_PAR_NO; + break; + } + case SER_PARITY_EVEN: + { + /* Even parity. */ + US1_MR |= US_PAR_EVEN; + break; + } + case SER_PARITY_ODD: + { + /* Odd parity. */ + US1_MR |= US_PAR_ODD; + break; + } + default: + ASSERT(0); + } + +} + +/* SPI driver */ +static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); + + /* Reset device */ + SPI0_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(SPI0_ID) = spi0_irq_handler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SPI0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY; + /* Enable the USART IRQ */ + AIC_IECR = BV(SPI0_ID); + PMC_PCER = BV(SPI0_ID); + + /* Enable interrupt on tx buffer empty */ + SPI0_IER = BV(SPI_TXEMPTY); + + /* Enable SPI */ + SPI0_CR = BV(SPI_SPIEN); + + + SER_SPI0_BUS_TXINIT; + + SER_STROBE_INIT; +} + +static void spi0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + /* Disable SPI */ + SPI0_CR = BV(SPI_SPIDIS); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + + SER_SPI0_BUS_TXCLOSE; + + /* Enable PIO on SPI pins */ + PIOA_PER = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); +} + +static void spi0_starttx(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI0]->txfifo)) + { + hw->sending = true; + SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo); + } + + IRQ_RESTORE(flags); +} + +static void spi0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + SPI0_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} + +#if CPU_ARM_SAM7X +/* SPI driver */ +static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); + + /* SPI1 pins are on B peripheral function! */ + PIOA_BSR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); + + /* Reset device */ + SPI1_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI1_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI1_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI1_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(SPI1_ID) = spi1_irq_handler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SPI1_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY; + /* Enable the USART IRQ */ + AIC_IECR = BV(SPI1_ID); + PMC_PCER = BV(SPI1_ID); + + /* Enable interrupt on tx buffer empty */ + SPI1_IER = BV(SPI_TXEMPTY); + + /* Enable SPI */ + SPI1_CR = BV(SPI_SPIEN); + + + SER_SPI1_BUS_TXINIT; + + SER_STROBE_INIT; +} + +static void spi1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + /* Disable SPI */ + SPI1_CR = BV(SPI_SPIDIS); + + /* Disable all irqs */ + SPI1_IDR = 0xFFFFFFFF; + + SER_SPI1_BUS_TXCLOSE; + + /* Enable PIO on SPI pins */ + PIOA_PER = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); +} + +static void spi1_starttx(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI1]->txfifo)) + { + hw->sending = true; + SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo); + } + + IRQ_RESTORE(flags); +} + +static void spi1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + SPI1_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI1_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} +#endif + +static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity)) +{ + // nop +} + + +static bool tx_sending(struct SerialHardware* _hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + return hw->sending; +} + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures + */ +static const struct SerialHardwareVT UART0_VT = +{ + C99INIT(init, uart0_init), + C99INIT(cleanup, uart0_cleanup), + C99INIT(setBaudrate, uart0_setbaudrate), + C99INIT(setParity, uart0_setparity), + C99INIT(txStart, uart0_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +static const struct SerialHardwareVT UART1_VT = +{ + C99INIT(init, uart1_init), + C99INIT(cleanup, uart1_cleanup), + C99INIT(setBaudrate, uart1_setbaudrate), + C99INIT(setParity, uart1_setparity), + C99INIT(txStart, uart1_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +static const struct SerialHardwareVT SPI0_VT = +{ + C99INIT(init, spi0_init), + C99INIT(cleanup, spi0_cleanup), + C99INIT(setBaudrate, spi0_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi0_starttx), + C99INIT(txSending, tx_sending), +}; +#if CPU_ARM_SAM7X +static const struct SerialHardwareVT SPI1_VT = +{ + C99INIT(init, spi1_init), + C99INIT(cleanup, spi1_cleanup), + C99INIT(setBaudrate, spi1_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi1_starttx), + C99INIT(txSending, tx_sending), +}; +#endif + +static struct ArmSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &UART0_VT), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(sending, false), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &UART1_VT), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(sending, false), + }, + + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI0_VT), + C99INIT(txbuffer, spi0_txbuffer), + C99INIT(rxbuffer, spi0_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi0_rxbuffer)), + }, + C99INIT(sending, false), + }, + #if CPU_ARM_SAM7X + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI1_VT), + C99INIT(txbuffer, spi1_txbuffer), + C99INIT(rxbuffer, spi1_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi1_rxbuffer)), + }, + C99INIT(sending, false), + } + + #endif +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} + +/** + * Serial 0 TX interrupt handler + */ +INLINE void uart0_irq_tx(void) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + + if (fifo_isempty(txfifo)) + { + /* + * - Disable the TX empty interrupts + */ + US0_IDR = BV(US_TXEMPTY); + SER_UART0_BUS_TXEND; + UARTDescs[SER_UART0].sending = false; + } + else + { + char c = fifo_pop(txfifo); + SER_UART0_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +/** + * Serial 0 RX complete interrupt handler. + */ +INLINE void uart0_irq_rx(void) +{ + SER_STROBE_ON; + + /* Should be read before US_CRS */ + ser_handles[SER_UART0]->status |= US0_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + US0_CR = BV(US_RSTSTA); + + char c = US0_RHR; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + + SER_STROBE_OFF; +} + +/** + * Serial IRQ dispatcher for USART0. + */ +static DECLARE_ISR(uart0_irq_dispatcher) +{ + if (US0_CSR & BV(US_RXRDY)) + uart0_irq_rx(); + + if (US0_CSR & BV(US_TXEMPTY)) + uart0_irq_tx(); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +/** + * Serial 1 TX interrupt handler + */ +INLINE void uart1_irq_tx(void) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + + if (fifo_isempty(txfifo)) + { + /* + * - Disable the TX empty interrupts + */ + US1_IDR = BV(US_TXEMPTY); + SER_UART1_BUS_TXEND; + UARTDescs[SER_UART1].sending = false; + } + else + { + char c = fifo_pop(txfifo); + SER_UART1_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +/** + * Serial 1 RX complete interrupt handler. + */ +INLINE void uart1_irq_rx(void) +{ + SER_STROBE_ON; + + /* Should be read before US_CRS */ + ser_handles[SER_UART1]->status |= US1_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + US1_CR = BV(US_RSTSTA); + + char c = US1_RHR; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + + SER_STROBE_OFF; +} + +/** + * Serial IRQ dispatcher for USART1. + */ +static DECLARE_ISR(uart1_irq_dispatcher) +{ + if (US1_CSR & BV(US_RXRDY)) + uart1_irq_rx(); + + if (US1_CSR & BV(US_TXEMPTY)) + uart1_irq_tx(); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +/** + * SPI0 interrupt handler + */ +static DECLARE_ISR(spi0_irq_handler) +{ + SER_STROBE_ON; + + char c = SPI0_RDR; + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI0]->rxfifo)) + fifo_push(&ser_handles[SER_SPI0]->rxfifo, c); + /* + * FIXME + else + ser_handles[SER_SPI0]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI0]->txfifo)) + SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo); + else + UARTDescs[SER_SPI0].sending = false; + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + SER_STROBE_OFF; +} + + +#if CPU_ARM_SAM7X +/** + * SPI1 interrupt handler + */ +static DECLARE_ISR(spi1_irq_handler) +{ + SER_STROBE_ON; + + char c = SPI1_RDR; + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI1]->rxfifo)) + fifo_push(&ser_handles[SER_SPI1]->rxfifo, c); + /* + * FIXME + else + ser_handles[SER_SPI1]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI1]->txfifo)) + SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo); + else + UARTDescs[SER_SPI1].sending = false; + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + SER_STROBE_OFF; +} +#endif diff --git a/2.5/bertos/cpu/arm/drv/ser_at91.h b/2.5/bertos/cpu/arm/drv/ser_at91.h new file mode 100644 index 00000000..d345a9e9 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/ser_at91.h @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief High level serial I/O API + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef SER_AT91_H +#define SER_AT91_H + +#include /* BV() */ +#include /* uint32_t */ +#include /* CPU_* */ + +/** \name Serial Error/status flags. */ +/*\{*/ +typedef uint32_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + +/* + * Hardware errors. + * These flags map directly to the ARM USART Channel Status Register (US_CSR). + */ +#define SERRF_RXSROVERRUN BV(5) /**< Rx shift register overrun */ +#define SERRF_FRAMEERROR BV(6) /**< Stop bit missing */ +#define SERRF_PARITYERROR BV(7) /**< Parity error */ +#define SERRF_NOISEERROR 0 /**< Unsupported */ +/*\}*/ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +SER_UART0, +SER_UART1, +SER_SPI0, +#if CPU_ARM_SAM7X +SER_SPI1, +#endif +SER_CNT /**< Number of serial ports */ +}; +/*\}*/ + +#endif /* SER_AT91_H */ diff --git a/2.5/bertos/cpu/arm/drv/ser_lpc2.c b/2.5/bertos/cpu/arm/drv/ser_lpc2.c new file mode 100644 index 00000000..4c169571 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/ser_lpc2.c @@ -0,0 +1,487 @@ +/** + * \file + * + * + * \brief LPC23xx UART driver. + * + * \author Andrea Righi + * + * notest:arm + */ + +#include /* for BV() */ +#include /* cpu_relax() */ +#include +#include +#include /* vic_handler_t */ +#include +#include "cfg/cfg_ser.h" +#include "ser_lpc2.h" + +/* IRQ numbers */ +#define INT_UART0 6 +#define INT_UART1 7 +#define INT_UART2 28 +#define INT_UART3 29 + +/* Register offsets */ +#define RBR 0x00 +#define THR 0x00 +#define DLL 0x00 +#define DLM 0x04 +#define IER 0x04 +#define IIR 0x08 +#define FCR 0x08 +#define LCR 0x0c +#define LSR 0x14 +#define SCR 0x1c +#define ACR 0x20 +#define ICR 0x24 +#define FDR 0x28 +#define TER 0x30 + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +struct LPC2Serial +{ + struct SerialHardware hw; + bool sending; + int irq; +}; + +/* Forward declaration */ +static struct LPC2Serial UARTDesc[SER_CNT]; + +struct uart_config +{ + uint32_t base; + uint32_t pconp; + uint32_t pclksel0; + uint32_t pclksel0_mask; + uint32_t pclksel1; + uint32_t pclksel1_mask; + uint32_t pinsel0; + uint32_t pinsel0_mask; + uint32_t pinsel4; + uint32_t pinsel4_mask; +}; + +/* UART registers configuration */ +static const struct uart_config uart_param[] = +{ + /* UART0 */ + { + .base = UART0_BASE_ADDR, + .pconp = BV(3), + + .pclksel0 = BV(6), + .pclksel0_mask = BV(7) | BV(6), + + .pclksel1 = 0, + .pclksel1_mask = 0, + + .pinsel0 = BV(6) | BV(4), + .pinsel0_mask = BV(7) | BV(6) | BV(5) | BV(4), + + .pinsel4 = 0, + .pinsel4_mask = 0, + }, + /* UART1 */ + { + .base = UART1_BASE_ADDR, + .pconp = BV(4), + + .pclksel0 = BV(8), + .pclksel0_mask = BV(9) | BV(8), + + .pclksel1 = 0, + .pclksel1_mask = 0, + + .pinsel0 = 0, + .pinsel0_mask = 0, + + .pinsel4 = BV(3) | BV(1), + .pinsel4_mask = BV(3) | BV(2) | BV(1) | BV(0), + }, + /* UART2 */ + { + .base = UART2_BASE_ADDR, + .pconp = BV(24), + + .pclksel0 = 0, + .pclksel0_mask = 0, + + .pclksel1 = BV(16), + .pclksel1_mask = BV(17) | BV(16), + + .pinsel0 = 0, + .pinsel0_mask = 0, + + .pinsel4 = BV(19) | BV(17), + .pinsel4_mask = BV(19) | BV(18) | BV(17) | BV(16), + }, + /* UART3 */ + { + .base = UART3_BASE_ADDR, + .pconp = BV(25), + + .pclksel0 = 0, + .pclksel0_mask = 0, + + .pclksel1 = BV(18), + .pclksel1_mask = BV(19) | BV(18), + + .pinsel0 = BV(3) | BV(1), + .pinsel0_mask = BV(3) | BV(2) | BV(1) | BV(0), + + .pinsel4 = 0, + .pinsel4_mask = 0, + }, +}; + +static void lpc2_uartSetBaudRate(int port, unsigned long baud) +{ + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + /* LCR: DLAB = 1 (enable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) |= 0x80; + /* DLL */ + *(reg8_t *)(uart_param[port].base + DLL) = + DIV_ROUND(CPU_FREQ, 16 * baud) & 0xFF; + /* DLM */ + *(reg8_t *)(uart_param[port].base + DLM) = + (DIV_ROUND(CPU_FREQ, 16 * baud) >> 8) & 0xFF; + *(reg32_t *)(uart_param[port].base + LCR) &= ~0x80; + /* LCR: DLAB = 0 (disable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) &= ~0x80; + + IRQ_RESTORE(flags); +} + +static void lpc2_uartSetParity(int port, int parity) +{ + /* Set 8-bit word, one stop bit by default */ + uint32_t config = BV(1) | BV(0); + + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + switch(parity) + { + case SER_PARITY_NONE: + break; + case SER_PARITY_ODD: + config |= BV(3); + break; + case SER_PARITY_EVEN: + config |= BV(4) | BV(3); + break; + default: + ASSERT(0); + IRQ_RESTORE(flags); + return; + } + /* LCR */ + *(reg8_t *)(uart_param[port].base + LCR) = config; + + IRQ_RESTORE(flags); +} + +static void lpc2_uartPutChar(uint32_t base, uint8_t c) +{ + reg8_t *lsr = (reg8_t *)base + LSR; + reg8_t *thr = (reg8_t *)base + THR; + + while (!(*lsr & BV(6))) + cpu_relax(); + *thr = c; +} + +void lpc2_uartInit(int port) +{ + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + /* Power-on the device */ + PCONP |= uart_param[port].pconp; + /* Set UART clk to CPU_FREQ */ + PCLKSEL0 &= ~uart_param[port].pclksel0_mask; + PCLKSEL0 |= uart_param[port].pclksel0; + PCLKSEL1 &= ~uart_param[port].pclksel1_mask; + PCLKSEL1 |= uart_param[port].pclksel1; + + /* LCR: 8bit, 1 stop bit, no parity, DLAB = 1 (enable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) = 0x83; + /* DLL */ + *(reg8_t *)(uart_param[port].base + DLL) = + DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) & 0xFF; + /* DLM */ + *(reg8_t *)(uart_param[port].base + DLM) = + (DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) >> 8) & 0xFF; + /* FDR */ + *(reg32_t *)(uart_param[port].base + FDR) = 0x10; + + /* Assign TX pin to UART0*/ + PINSEL0 &= ~uart_param[port].pinsel0_mask; + PINSEL0 |= uart_param[port].pinsel0; + PINSEL4 &= ~uart_param[port].pinsel4_mask; + PINSEL4 |= uart_param[port].pinsel4; + /* LCR: set 8bit, 1 stop bit, no parity, DLAB = 0 (disable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) = 0x03; + + /* TER: Enable transmitter */ + *(reg8_t *)(uart_param[port].base + TER) = BV(7); + /* IER: Enable RBR interrupt */ + *(reg8_t *)(uart_param[port].base + IER) = BV(0); + + IRQ_RESTORE(flags); +} + +static bool tx_sending(struct SerialHardware *_hw) +{ + struct LPC2Serial *hw = (struct LPC2Serial *)_hw; + return hw->sending; +} + +INLINE bool lpc2_uartRxReady(int port) +{ + /* LSR: check Receiver Data Ready (RDR) bit */ + return *(reg8_t *)(uart_param[port].base + LSR) & BV(0) ? true : false; +} + +static void uart_irq_rx(int port) +{ + struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo; + char c; + + while (lpc2_uartRxReady(port)) + { + /* RBR: read a character from the Receiver Buffer Register */ + c = *(reg8_t *)(uart_param[port].base + RBR); + if (fifo_isfull(rxfifo)) + ser_handles[port]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + } +} + +INLINE bool lpc2_uartTxReady(int port) +{ + /* LSR: check Transmitter Holding Register Empty (THRE) bit */ + return *(reg8_t *)(uart_param[port].base + LSR) & BV(5) ? true : false; +} + +static void uart_irq_tx(int port) +{ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; + + while (lpc2_uartTxReady(port)) + { + /* + * Disable TX empty interrupts if there're no more + * characters to transmit. + */ + if (fifo_isempty(txfifo)) + { + /* IER: Disable THRE interrupt */ + *(reg8_t *)(uart_param[port].base + IER) &= ~BV(1); + UARTDesc[port].sending = false; + break; + } + /* THR: put a character to the Transmit Holding Register */ + *(reg8_t *)(uart_param[port].base + THR) = fifo_pop(txfifo); + } +} + +static void uart_common_irq_handler(int port) +{ + /* IIR: identify the interrupt source */ + uint32_t status = *(reg32_t *)(uart_param[port].base + IIR) >> 1 & 0x7; + + /* Receiver Data Ready (RDR) */ + if (status == 0x02) + uart_irq_rx(port); + /* Transmit Holding Register Empty (THRE) */ + else if (status == 0x01) + uart_irq_tx(port); + /* Signal the VIC we have completed the ISR */ + VICVectAddr = 0; +} + +static void lpc2_uartIRQEnable(int port, vic_handler_t handler) +{ + vic_setVector(UARTDesc[port].irq, handler); + vic_enable(UARTDesc[port].irq); +} + +static void lpc2_uartIRQDisable(int port) +{ + vic_disable(UARTDesc[port].irq); +} + +/* UART class definition */ +#define UART_PORT(port) \ + /* UART TX and RX buffers */ \ + static unsigned char \ + uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \ + static unsigned char \ + uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE]; \ + \ + /* UART interrupt handler */ \ + static DECLARE_ISR(uart ## port ## _irq_handler) \ + { \ + uart_common_irq_handler(port); \ + } \ + \ + /* UART public methods */ \ + static void \ + uart ## port ## _txStart(struct SerialHardware *_hw) \ + { \ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; \ + struct LPC2Serial *hw = (struct LPC2Serial *)_hw; \ + \ + if (hw->sending) \ + return; \ + lpc2_uartPutChar(UART ## port ## _BASE_ADDR, fifo_pop(txfifo)); \ + if (!fifo_isempty(txfifo)) \ + { \ + hw->sending = true; \ + /* IER: Enable THRE interrupt */ \ + *(reg8_t *)(uart_param[port].base + IER) |= BV(1); \ + } \ + } \ + \ + static void \ + uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \ + unsigned long baud) \ + { \ + lpc2_uartSetBaudRate(port, baud); \ + } \ + \ + static void \ + uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \ + int parity) \ + { \ + lpc2_uartSetParity(port, parity); \ + } \ + \ + static void \ + uart ## port ## _cleanup(struct SerialHardware *_hw) \ + { \ + struct LPC2Serial *hw = (struct LPC2Serial *)_hw; \ + \ + hw->sending = false; \ + lpc2_uartIRQDisable(port); \ + } \ + \ + static void \ + uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw), \ + UNUSED_ARG(struct Serial *, ser)) \ + { \ + lpc2_uartInit(port); \ + lpc2_uartIRQEnable(port, uart ## port ## _irq_handler); \ + } \ + \ + /* UART operations */ \ + static const struct SerialHardwareVT UART ## port ## _VT = \ + { \ + .init = uart ## port ## _init, \ + .cleanup = uart ## port ## _cleanup, \ + .setBaudrate = uart ## port ## _setbaudrate, \ + .setParity = uart ## port ## _setparity, \ + .txStart = uart ## port ## _txStart, \ + .txSending = tx_sending, \ + }; + +/* UART port instances */ +UART_PORT(0) +UART_PORT(1) +UART_PORT(2) +UART_PORT(3) + +static struct LPC2Serial UARTDesc[SER_CNT] = +{ + { + .hw = { + .table = &UART0_VT, + .txbuffer = uart0_txbuffer, + .rxbuffer = uart0_rxbuffer, + .txbuffer_size = sizeof(uart0_txbuffer), + .rxbuffer_size = sizeof(uart0_rxbuffer), + }, + .sending = false, + .irq = INT_UART0, + }, + { + .hw = { + .table = &UART1_VT, + .txbuffer = uart1_txbuffer, + .rxbuffer = uart1_rxbuffer, + .txbuffer_size = sizeof(uart1_txbuffer), + .rxbuffer_size = sizeof(uart1_rxbuffer), + }, + .sending = false, + .irq = INT_UART1, + }, + { + .hw = { + .table = &UART2_VT, + .txbuffer = uart2_txbuffer, + .rxbuffer = uart2_rxbuffer, + .txbuffer_size = sizeof(uart2_txbuffer), + .rxbuffer_size = sizeof(uart2_rxbuffer), + }, + .sending = false, + .irq = INT_UART2, + }, + { + .hw = { + .table = &UART3_VT, + .txbuffer = uart3_txbuffer, + .rxbuffer = uart3_rxbuffer, + .txbuffer_size = sizeof(uart3_txbuffer), + .rxbuffer_size = sizeof(uart3_rxbuffer), + }, + .sending = false, + .irq = INT_UART3, + }, +}; + +struct SerialHardware *ser_hw_getdesc(int port) +{ + ASSERT(port >= 0 && port < SER_CNT); + return &UARTDesc[port].hw; +} diff --git a/2.5/bertos/cpu/arm/drv/ser_lpc2.h b/2.5/bertos/cpu/arm/drv/ser_lpc2.h new file mode 100644 index 00000000..cd0669d0 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/ser_lpc2.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief LPC23xx UART driver. + * + * \author Andrea Righi + */ + +#ifndef SER_LPC2_H +#define SER_LPC2_H + +#include +#include + +/* Serial hardware numbers */ +enum +{ + SER_UART0, + SER_UART1, + SER_UART2, + SER_UART3, + + SER_CNT //< Number of serial ports +}; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) //< Rx FIFO buffer overrun +#define SERRF_RXTIMEOUT BV(1) //< Receive timeout +#define SERRF_TXTIMEOUT BV(2) //< Transmit timeout + +/* + * Hardware errors. + */ +#define SERRF_RXSROVERRUN 0 //< Input overrun +#define SERRF_FRAMEERROR 0 //< Stop bit missing +#define SERRF_PARITYERROR 0 //< Parity error +#define SERRF_NOISEERROR 0 //< Noise error + +/* Serial error/status flags */ +typedef uint32_t serstatus_t; + +void lpc2_uartInit(int port); + +#endif /* SER_LPC2_H */ diff --git a/2.5/bertos/cpu/arm/drv/spi_dma_at91.c b/2.5/bertos/cpu/arm/drv/spi_dma_at91.c new file mode 100644 index 00000000..8576fc07 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/spi_dma_at91.c @@ -0,0 +1,249 @@ +/** + * \file + * + * + * \brief SPI driver with DMA. + * + * \version $Id$ + * \author Francesco Sacchi + * \author Luca Ottaviano + */ + +#include "cfg/cfg_spi_dma.h" + +#include "spi_dma_at91.h" +#include "hw/hw_spi_dma.h" + +#include +#include +#include +#include + +#include +#include + +#include /* memset */ + +static uint8_t tx_fifo_buffer[CONFIG_SPI_DMA_TXBUFSIZE]; +static FIFOBuffer tx_fifo; +static KFileFifo kfifo; + + +INLINE void spi_dma_startTx(void) +{ + if (fifo_isempty(&tx_fifo)) + return; + + if (SPI0_SR & BV(SPI_TXBUFE)) + { + SPI0_PTCR = BV(PDC_TXTDIS); + SPI0_TPR = (reg32_t)tx_fifo.head; + if (tx_fifo.head < tx_fifo.tail) + SPI0_TCR = tx_fifo.tail - tx_fifo.head; + else + SPI0_TCR = tx_fifo.end - tx_fifo.head + 1; + + SPI0_PTCR = BV(PDC_TXTEN); + } +} + +static DECLARE_ISR(spi0_dma_write_irq_handler) +{ + SPI_DMA_STROBE_ON(); + /* Pop sent chars from FIFO */ + tx_fifo.head = (uint8_t *)SPI0_TPR; + if (tx_fifo.head > tx_fifo.end) + tx_fifo.head = tx_fifo.begin; + + spi_dma_startTx(); + + AIC_EOICR = 0; + SPI_DMA_STROBE_OFF(); +} + + +void spi_dma_setclock(uint32_t rate) +{ + SPI0_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} + +static size_t spi_dma_write(UNUSED_ARG(struct KFile *, fd), const void *_buf, size_t size) +{ + size_t count, total_wr = 0; + const uint8_t *buf = (const uint8_t *) _buf; + + // copy buffer to internal fifo + while (size) + { + #if CONFIG_SPI_DMA_TX_TIMEOUT != -1 + ticks_t start = timer_clock(); + while (fifo_isfull(&tx_fifo) && (timer_clock() - start < ms_to_ticks(CONFIG_SPI_DMA_TX_TIMEOUT))) + cpu_relax(); + + if (fifo_isfull(&tx_fifo)) + break; + #else + while (fifo_isfull(&tx_fifo)) + cpu_relax(); + #endif /* CONFIG_SPI_DMA_TX_TIMEOUT */ + + // FIXME: improve copy performance + count = kfile_write(&kfifo.fd, buf, size); + size -= count; + buf += count; + total_wr += count; + spi_dma_startTx(); + } + + return total_wr; +} + +static int spi_dma_flush(UNUSED_ARG(struct KFile *, fd)) +{ + /* Wait FIFO flush */ + while (!fifo_isempty(&tx_fifo)) + cpu_relax(); + + /* Wait until last bit has been shifted out */ + while (!(SPI0_SR & BV(SPI_TXEMPTY))) + cpu_relax(); + + return 0; +} + +static DECLARE_ISR(spi0_dma_read_irq_handler) +{ + /* do nothing */ + AIC_EOICR = 0; +} + +/* + * Dummy buffer used to transmit 0xff chars while receiving data. + * This buffer is completetly constant and the compiler should allocate it + * in flash memory. + */ +static const uint8_t tx_dummy_buf[CONFIG_SPI_DMA_MAX_RX] = { [0 ... (CONFIG_SPI_DMA_MAX_RX - 1)] = 0xFF }; + +static size_t spi_dma_read(struct KFile *fd, void *_buf, size_t size) +{ + size_t count, total_rx = 0; + uint8_t *buf = (uint8_t *)_buf; + + spi_dma_flush(fd); + + /* Dummy irq handler that do nothing */ + AIC_SVR(SPI0_ID) = spi0_dma_read_irq_handler; + + while (size) + { + count = MIN(size, (size_t)CONFIG_SPI_DMA_MAX_RX); + + SPI0_PTCR = BV(PDC_TXTDIS) | BV(PDC_RXTDIS); + + SPI0_RPR = (reg32_t)buf; + SPI0_RCR = count; + SPI0_TPR = (reg32_t)tx_dummy_buf; + SPI0_TCR = count; + + /* Avoid reading the previous sent char */ + *buf = SPI0_RDR; + + /* Start transfer */ + SPI0_PTCR = BV(PDC_RXTEN) | BV(PDC_TXTEN); + + /* wait for transfer to finish */ + while (!(SPI0_SR & BV(SPI_ENDRX))) + cpu_relax(); + + size -= count; + total_rx += count; + buf += count; + } + SPI0_PTCR = BV(PDC_RXTDIS) | BV(PDC_TXTDIS); + + /* set write irq handler back in place */ + AIC_SVR(SPI0_ID) = spi0_dma_write_irq_handler; + + return total_rx; +} + +#define SPI_DMA_IRQ_PRIORITY 4 + +void spi_dma_init(SpiDmaAt91 *spi) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); + + /* Reset device */ + SPI0_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(SPI0_ID) = spi0_dma_write_irq_handler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SPI0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SPI_DMA_IRQ_PRIORITY; + /* Enable the USART IRQ */ + AIC_IECR = BV(SPI0_ID); + PMC_PCER = BV(SPI0_ID); + + /* Enable interrupt on tx buffer empty */ + SPI0_IER = BV(SPI_ENDTX); + + /* Enable SPI */ + SPI0_CR = BV(SPI_SPIEN); + + DB(spi->fd._type = KFT_SPIDMAAT91); + spi->fd.write = spi_dma_write; + spi->fd.read = spi_dma_read; + spi->fd.flush = spi_dma_flush; + + fifo_init(&tx_fifo, tx_fifo_buffer, sizeof(tx_fifo_buffer)); + kfilefifo_init(&kfifo, &tx_fifo); + + SPI_DMA_STROBE_INIT(); +} diff --git a/2.5/bertos/cpu/arm/drv/spi_dma_at91.h b/2.5/bertos/cpu/arm/drv/spi_dma_at91.h new file mode 100644 index 00000000..6ceef4aa --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/spi_dma_at91.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief SPI driver with DMA. + * + * \note Only one copy of SpiDmaAt91 is allowed for each application. + * + * \version $Id$ + * \author Francesco Sacchi + * \author Luca Ottaviano + */ + +#ifndef DRV_SPI_DMA_AT91_H +#define DRV_SPI_DMA_AT91_H + +#include + +typedef struct SpiDmaAt91 +{ + KFile fd; +} SpiDmaAt91; + +#define KFT_SPIDMAAT91 MAKE_ID('S', 'P', 'I', 'A') + +INLINE SpiDmaAt91 * SPIDMAAT91_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SPIDMAAT91); + return (SpiDmaAt91 *)fd; +} + +/** + * Init DMA SPI driver. + * \param spi A pointer to a SpiDmaAt91 structure. + */ +void spi_dma_init(SpiDmaAt91 *spi); + +/** + * Set the clock rate for SPI bus. + * + * \param rate The rate you want to set for SPI. + */ +void spi_dma_setclock(uint32_t rate); + +#endif /* DRV_SPI_DMA_AT91_H */ diff --git a/2.5/bertos/cpu/arm/drv/stepper_arm.c b/2.5/bertos/cpu/arm/drv/stepper_arm.c new file mode 100644 index 00000000..446ba1da --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/stepper_arm.c @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for ARM (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + */ +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use stepper_at91.c + + #include + + #if CPU_ARM_AT91 + #include "stepper_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ + diff --git a/2.5/bertos/cpu/arm/drv/stepper_arm.h b/2.5/bertos/cpu/arm/drv/stepper_arm.h new file mode 100644 index 00000000..ab96e5d7 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/stepper_arm.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for ARM (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "stepper_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/stepper_at91.c b/2.5/bertos/cpu/arm/drv/stepper_at91.c new file mode 100644 index 00000000..2c2e193d --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/stepper_at91.c @@ -0,0 +1,418 @@ +/** + * \file + * + * + * \brief Stepper driver interface implementation. + * + * This module use the three timer on the at91 family, to generate a + * six periodic variable pwm waveform. The pulse width is fix, and could + * change by setting the STEPPER_DELAY_ON_COMPARE_C define, but you make + * an attention to do this, becouse the pulse width is not exactly + * STEPPER_DELAY_ON_COMPARE_C. The pulse width depend also to latency + * time of cpu to serve an interrupt, this generate an pwm waveform affect + * to noise. This noise not effect the period but only the pulse width, + * becouse the raising edge is generate by hardware comply with the our + * period settings. + * + * Note: is most important to set STEPPER_DELAY_ON_COMPARE_C value minor + * than a interrupt time service, becouse the falling edge must be happen + * inside to inerrupt service to guarantee a correct functionaly of pwm + * generator. + * + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#include "stepper_at91.h" + +#include "cfg/cfg_stepper.h" +#include +#include + +#include +#include + +#include + + +/* + * Delay to set C compare to clear output + * on select TIO output + */ +#define STEPPER_DELAY_ON_COMPARE_C 20 + +/* + * Forward declaration for interrupt handler + */ +static ISR_PROTO(stepper_tc0_irq); +static ISR_PROTO(stepper_tc1_irq); +static ISR_PROTO(stepper_tc2_irq); + +///< Static array of timer counter struct for stepper. +static struct TimerCounter stepper_timers[CONFIG_TC_STEPPER_MAX_NUM] = +{ + { //Timer Counter settings for TIOA0 output pin + .timer_id = TC0_ID, + .blk_ctrl_set = TC_NONEXC0, + .chl_mode_reg = &TC0_CMR, + .chl_ctrl_reg = &TC0_CCR, + .comp_effect_mask = TC_ACPA_MASK, + .comp_effect_set = TC_ACPA_SET_OUTPUT, + .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_ACPC_MASK, + .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC0, + .comp_reg = &TC0_RA, + .comp_c_reg = &TC0_RC, + .count_val_reg = &TC0_CV, + .irq_enable_reg = &TC0_IER, + .irq_disable_reg = &TC0_IDR, + .irq_set_mask = BV(TC_CPAS), + .irq_mask_reg = &TC0_IMR, + .isr = stepper_tc0_irq, + .status_reg = &TC0_SR, + .tio_pin = TIOA0, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOB0 output pin + .timer_id = TC0_ID, + .blk_ctrl_set = TC_NONEXC0, + .chl_mode_reg = &TC0_CMR, + .chl_ctrl_reg = &TC0_CCR, + .comp_reg = &TC0_RB, + .comp_c_reg = &TC0_RC, + .count_val_reg = &TC0_CV, + .comp_effect_mask = TC_BCPB_MASK, + .comp_effect_set = TC_BCPB_SET_OUTPUT, + .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_BCPC_MASK, + .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC0, + .irq_enable_reg = &TC0_IER, + .irq_disable_reg = &TC0_IDR, + .irq_set_mask = BV(TC_CPBS), + .irq_mask_reg = &TC0_IMR, + .isr = stepper_tc0_irq, + .status_reg = &TC0_SR, + .tio_pin = TIOB0, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOA1 output pin + .timer_id = TC1_ID, + .blk_ctrl_set = TC_NONEXC1, + .chl_mode_reg = &TC1_CMR, + .chl_ctrl_reg = &TC1_CCR, + .comp_reg = &TC1_RA, + .comp_c_reg = &TC1_RC, + .count_val_reg = &TC1_CV, + .comp_effect_mask = TC_ACPA_MASK, + .comp_effect_set = TC_ACPA_SET_OUTPUT, + .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_ACPC_MASK, + .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC1, + .irq_enable_reg = &TC1_IER, + .irq_disable_reg = &TC1_IDR, + .irq_set_mask = BV(TC_CPAS), + .irq_mask_reg = &TC1_IMR, + .isr = stepper_tc1_irq, + .status_reg = &TC1_SR, + .tio_pin = TIOA1, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOB1 output pin + .timer_id = TC1_ID, + .blk_ctrl_set = TC_NONEXC1, + .chl_mode_reg = &TC1_CMR, + .chl_ctrl_reg = &TC1_CCR, + .comp_reg = &TC1_RB, + .comp_c_reg = &TC1_RC, + .count_val_reg = &TC1_CV, + .comp_effect_mask = TC_BCPB_MASK, + .comp_effect_set = TC_BCPB_SET_OUTPUT, + .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_BCPC_MASK, + .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC1, + .irq_enable_reg = &TC1_IER, + .irq_disable_reg = &TC1_IDR, + .irq_set_mask = BV(TC_CPBS), + .irq_mask_reg = &TC1_IMR, + .isr = stepper_tc1_irq, + .status_reg = &TC1_SR, + .tio_pin = TIOB1, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOA2 output pin + .timer_id = TC2_ID, + .blk_ctrl_set = TC_NONEXC2, + .chl_mode_reg = &TC2_CMR, + .chl_ctrl_reg = &TC2_CCR, + .comp_reg = &TC2_RA, + .comp_c_reg = &TC2_RC, + .count_val_reg = &TC2_CV, + .comp_effect_mask = TC_ACPA_MASK, + .comp_effect_set = TC_ACPA_SET_OUTPUT, + .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_ACPC_MASK, + .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC2, + .irq_enable_reg = &TC2_IER, + .irq_disable_reg = &TC2_IDR, + .irq_set_mask = BV(TC_CPAS), + .irq_mask_reg = &TC2_IMR, + .isr = stepper_tc2_irq, + .status_reg = &TC2_SR, + .tio_pin = TIOA2, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOB2 output pin + .timer_id = TC2_ID, + .blk_ctrl_set = TC_NONEXC2, + .chl_mode_reg = &TC2_CMR, + .chl_ctrl_reg = &TC2_CCR, + .comp_reg = &TC2_RB, + .comp_c_reg = &TC2_RC, + .count_val_reg = &TC2_CV, + .comp_effect_mask = TC_BCPB_MASK, + .comp_effect_set = TC_BCPB_SET_OUTPUT, + .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_BCPC_MASK, + .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC2, + .irq_enable_reg = &TC2_IER, + .irq_disable_reg = &TC2_IDR, + .irq_set_mask = BV(TC_CPBS), + .irq_mask_reg = &TC2_IMR, + .isr = stepper_tc2_irq, + .status_reg = &TC2_SR, + .tio_pin = TIOB2, + .callback = NULL, + .motor = NULL, + } +}; + +/** + * Generic TIO interrupt handler. + */ +INLINE void stepper_tc_tio_irq(struct TimerCounter * t) +{ + // + *t->chl_mode_reg &= ~t->comp_effect_c_mask; + *t->chl_mode_reg |= t->comp_effect_c_clear; + + /* + * Cleat TIO output on c register compare. + * This generate an pulse with variable lenght, this + * depend to delay that interrupt is realy service. + */ + *t->comp_c_reg = *t->count_val_reg + STEPPER_DELAY_ON_COMPARE_C; + + //Call the associate callback + t->callback(t->motor); + + *t->chl_mode_reg &= ~t->comp_effect_c_mask; +} + + +/* + * Interrupt handler for timer counter TCKL0 + */ +DECLARE_ISR(stepper_tc0_irq) +{ + /* + * Warning: when we read the status_reg register, we reset it. + * That mean if is occur an interrupt event we can read only + * the last that has been occur. To not miss an interrupt event + * we save the status_reg register and then we read it. + */ + uint32_t status_reg = TC0_SR & TC0_IMR; + + if (status_reg & BV(TC_CPAS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOA0]); + + if (status_reg & BV(TC_CPBS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOB0]); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + +} + +/* + * Interrupt handler for timer counter TCKL1 + */ +DECLARE_ISR(stepper_tc1_irq) +{ + /* + * Warning: when we read the status_reg register, we reset it. + * That mean if is occur an interrupt event we can read only + * the last that has been occur. To not miss an interrupt event + * we save the status_reg register and then we read it. + */ + uint32_t status_reg = TC1_SR & TC1_IMR; + + if (status_reg & BV(TC_CPAS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOA1]); + + if (status_reg & BV(TC_CPBS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOB1]); + + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + + +/* + * Interrupt handler for timer counter TCKL2 + */ +DECLARE_ISR(stepper_tc2_irq) +{ + + /* + * Warning: when we read the status_reg register, we reset it. + * That mean if is occur an interrupt event we can read only + * the last that has been occur. To not miss an interrupt event + * we save the status_reg register and then we read it. + */ + uint32_t status_reg = TC2_SR & TC2_IMR; + + if (status_reg & BV(TC_CPAS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOA2]); + + if (status_reg & BV(TC_CPBS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOB2]); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + +} + +/** + * Timer couter setup. + * + * This function apply to select timer couter all needed settings. + * Every settings are stored in stepper_timers[]. + */ +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor) +{ + ASSERT(index < CONFIG_TC_STEPPER_MAX_NUM); + + motor->timer = &stepper_timers[index]; + + //Disable PIO controller and enable TIO function + TIO_PIO_PDR = BV(motor->timer->tio_pin); + TIO_PIO_ABSR = BV(motor->timer->tio_pin); + + /* + * Sets timer counter in waveform mode. + * We set as default: + * - Waveform mode 00 (see datasheet for more detail.) + * - Master clock prescaler to STEPPER_MCK_PRESCALER + * - Set none external event + * - Clear pin output on comp_reg + * - None effect on reg C compare + */ + *motor->timer->chl_mode_reg = BV(TC_WAVE); + *motor->timer->chl_mode_reg |= motor->timer->ext_event_set; + *motor->timer->chl_mode_reg &= ~TC_WAVSEL_MASK; + *motor->timer->chl_mode_reg |= TC_WAVSEL_UP; + *motor->timer->chl_mode_reg |= STEPPER_MCK_PRESCALER; + *motor->timer->chl_mode_reg |= motor->timer->comp_effect_clear; + *motor->timer->chl_mode_reg &= ~motor->timer->comp_effect_c_mask; + + //Reset comp_reg and C compare register + *motor->timer->comp_reg = 0; + *motor->timer->comp_c_reg = 0; + + //Register interrupt vector + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Warning: To guarantee a correct management of interrupt event, we must + * trig the interrupt on level sensitive. This becouse, we have only a common + * line for interrupt request, and if we have at the same time two interrupt + * request could be that the is service normaly but the second will never + * been detected and interrupt will stay active but never serviced. + */ + AIC_SVR(motor->timer->timer_id) = motor->timer->isr; + AIC_SMR(motor->timer->timer_id) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE; + AIC_IECR = BV(motor->timer->timer_id); + + // Disable interrupt on select timer counter + stepper_tc_irq_disable(motor->timer); + + IRQ_RESTORE(flags); + + //Register callback + motor->timer->callback = callback; + motor->timer->motor = motor; +} + +/** + * Timer counter init. + */ +void stepper_tc_init(void) +{ + STEPPER_STROBE_INIT; + + ASSERT(CONFIG_NUM_STEPPER_MOTORS <= CONFIG_TC_STEPPER_MAX_NUM); + + /* + * Enable timer counter: + * - power on all timer counter + * - disable all interrupt + * - disable all external event/timer source + */ + for (int i = 0; i < CONFIG_TC_STEPPER_MAX_NUM; i++) + { + PMC_PCER = BV(stepper_timers[i].timer_id); + *stepper_timers[i].irq_disable_reg = 0xFFFFFFFF; + TC_BMR = stepper_timers[i].blk_ctrl_set; + } + + /* + * Enable timer counter and start it. + */ + for (int i = 0; i < CONFIG_TC_STEPPER_MAX_NUM; i++) + *stepper_timers[i].chl_ctrl_reg = (BV(TC_CLKEN) | BV(TC_SWTRG)); + +} + diff --git a/2.5/bertos/cpu/arm/drv/stepper_at91.h b/2.5/bertos/cpu/arm/drv/stepper_at91.h new file mode 100644 index 00000000..7f1d4d41 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/stepper_at91.h @@ -0,0 +1,186 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#include +#include +#include +#include + +/** + * Setting master clock prescaler for all timer couter + * + * You could choise one of these: + * - TC_CLKS_MCK2: Selects MCK / 2 + * - TC_CLKS_MCK8: Selects MCK / 8 + * - TC_CLKS_MCK32: Selects MCK / 32 + * - TC_CLKS_MCK128: Selects MCK / 128 + * - TC_CLKS_MCK1024: Selects MCK / 1024 + */ +#if STEPPER_PRESCALER_LOG2 == 1 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK2 +#elif STEPPER_PRESCALER_LOG2 == 3 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK8 +#elif STEPPER_PRESCALER_LOG2 == 5 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK32 +#elif STEPPER_PRESCALER_LOG2 == 7 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK128 +#elif STEPPER_PRESCALER_LOG2 == 10 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK1024 +#else + #error Unsupported stepper prescaler value. +#endif + +/** + * Timer counter hw enumeration. + */ +enum +{ + TC_TIOA0 = 0, + TC_TIOB0, + TC_TIOA1, + TC_TIOB1, + TC_TIOA2, + TC_TIOB2, + + TC_CNT +}; + +/** + * IRQ callback function type definition. + */ +typedef void (*irq_t)(void); + +/** + * Timer contex structure. + */ +typedef struct TimerCounter +{ + int timer_id; ///< Timer counter ID + uint32_t blk_ctrl_set; ///< Control block setting for this timer + reg32_t *chl_mode_reg; ///< Channel mode register + reg32_t *chl_ctrl_reg; ///< Channel control register + reg32_t *comp_reg; ///< Compare register + reg32_t *comp_c_reg; ///< C compare register + reg32_t *count_val_reg; ///< Current timer counter value + uint32_t comp_effect_mask; ///< Bit mask for TIO register compare effects + uint32_t comp_effect_set; ///< Set TIO on register compare event + uint32_t comp_effect_clear; ///< Clear TIO on register compare event + uint32_t comp_effect_c_mask; ///< Bit mask for TIO on C register compare effects + uint32_t comp_effect_c_clear; ///< Clear TIO on C register compare event + uint32_t ext_event_set; ///< Setting for extern event trigger for TIOB + reg32_t *irq_enable_reg; ///< Enable interrupt register + reg32_t *irq_disable_reg; ///< Disable interrupt register + uint32_t irq_set_mask; ///< IRQ flag bit for select TIO + reg32_t *irq_mask_reg; ///< IRQ mask register + irq_t isr; ///< IRQ handler + reg32_t *status_reg; ///< Timer status register + int tio_pin; ///< Timer I/O pin + stepper_isr_t callback; ///< Interrupt callback pointer + struct Stepper *motor; ///< Stepper context structure + +} TimerCounter; + +/** + * Enable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_enable(struct TimerCounter *timer) +{ + *timer->irq_enable_reg = timer->irq_set_mask; +} + +/** + * Disable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_disable(struct TimerCounter *timer) +{ + *timer->irq_disable_reg = timer->irq_set_mask; +} + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_setDelay(struct TimerCounter *timer, stepper_time_t delay) +{ + *timer->comp_reg += delay; +} + + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_resetTimer(struct TimerCounter *timer) +{ + *timer->comp_reg = 0; +} + +/** + * Programm timer counter to generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_doPulse(struct TimerCounter *timer) +{ + *timer->chl_mode_reg &= ~timer->comp_effect_mask; + *timer->chl_mode_reg |= timer->comp_effect_set; +} + +/** + * Programm timer counter to not generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_skipPulse(struct TimerCounter *timer) +{ + *timer->chl_mode_reg &= ~timer->comp_effect_mask; +} + +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor); +void stepper_tc_init(void); + +/* + * Test the hardware timer counter on board. + * This test generate a square waveform through irq, setting + * the timer register. + */ +void stepper_timer_test_brute(void); +/* + * Test the timer driver structure. + * This test generate a square waveform through irq. + * The irq callback is programmable, and all timer setting + * are save in one data structure. Every pulse is generate through + * a call of this irq callback. + */ +void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index); diff --git a/2.5/bertos/cpu/arm/drv/stepper_at91_hwtest.c b/2.5/bertos/cpu/arm/drv/stepper_at91_hwtest.c new file mode 100644 index 00000000..d40da084 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/stepper_at91_hwtest.c @@ -0,0 +1,175 @@ +/** + * \file + * + * + * \brief Low level test for stepper driver interface implementation. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#include "stepper_at91.h" + +#include "cfg/cfg_stepper.h" +#include +#include + +#include +#include + +#include + + +#warning FIXME:This test is incomplete.. you MUST review.. + +#if 0 +static void stepper_test_irq_schedule(struct Stepper *motor, stepper_time_t delay) +{ + stepper_tc_doPulse(motor->timer); + stepper_tc_setDelay(motor->timer, delay); +} + +static void stepper_test_irq(struct Stepper *motor) +{ + + stepper_test_irq_schedule(motor, 300); +} +/* + * Test a timer couter driver + */ +void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index) +{ + local_cfg->pulse = 300; + + local_motor->cfg = local_cfg; + stepper_tc_init(index, &stepper_test_irq, local_motor); + stepper_tc_irq_enable(local_motor->timer); +} + + +bool su = true; +bool sub = true; +uint16_t periodo_st0 = 100; +uint16_t periodo_st1 = 233; + +static void tc_irq(void) __attribute__ ((interrupt)); +static void tc_irq(void) +{ + uint32_t status_reg = TC2_SR & TC2_IMR; + + if (status_reg & BV(TC_CPAS)) + { + TC2_CMR &= ~TC_ACPA_MASK; + if (su) + { + TC2_CMR |= TC_ACPA_CLEAR_OUTPUT; + TC2_RA += periodo_st0; + } + else + { + TC2_CMR |= TC_ACPA_SET_OUTPUT; + TC2_RA += periodo_st1; + } + su = !su; + } + if (status_reg & BV(TC_CPBS)) + { + TC2_CMR &= ~TC_BCPB_MASK ; + if (sub) + { + TC2_CMR |= TC_BCPB_CLEAR_OUTPUT; + TC2_RB += periodo_st0; + } + else + { + TC2_CMR |= TC_BCPB_SET_OUTPUT; + TC2_RB += periodo_st1; + } + sub = !sub; + } + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +/* + * Test a timer couter hardware + */ +void stepper_timer_test_brute(void) +{ + PIOA_PDR |= BV(26) | BV(27); + PIOA_BSR |= BV(26) | BV(27); + + // Power on TCLK0 + PMC_PCER |= BV(TC2_ID);// | BV(TC1_ID) | BV(TC2_ID); + + TC_BCR = 1; + TC_BMR |= TC_NONEXC2; + + // Select waveform mode + TC2_CMR = BV(TC_WAVE); + + TC2_CMR |= TC_EEVT_XC2; + TC2_CMR |= TC_WAVSEL_UP; + TC2_CMR |= TC_CLKS_MCK8; + + //Set waveform on TIOA and TIOB + TC2_CMR |= TC_ACPA_SET_OUTPUT; + TC2_CMR |= TC_BCPB_SET_OUTPUT; + + + //Reset all comp_reg register + TC2_RA = 0; + TC2_RB = 0; + + cpuflags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Set the vector. */ + AIC_SVR(TC2_ID) = tc_irq; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(TC2_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + /* Enable the USART IRQ */ + AIC_IECR = BV(TC2_ID); + + IRQ_RESTORE(flags); + + // Disable all interrupt + TC2_IDR = 0xFFFFFFFF; + + //Enable interrupt on RA, RB + TC2_IER = BV(TC_CPAS) | BV(TC_CPBS); + + //Enable timer and trig it + TC2_CCR = BV(TC_CLKEN) | BV(TC_SWTRG); +} +#endif + diff --git a/2.5/bertos/cpu/arm/drv/sysirq_at91.c b/2.5/bertos/cpu/arm/drv/sysirq_at91.c new file mode 100644 index 00000000..6de17602 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/sysirq_at91.c @@ -0,0 +1,177 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief System IRQ handler for Atmel AT91 ARM7 processors. + * + * In Atmel AT91 ARM7TDMI processors, there are various + * peripheral interrupt sources. + * In general, every source has its own interrupt vector, so it + * is possible to assign a specific handler for each interrupt + * independently. + * However, there are a few sources called "system sources" that + * share a common IRQ line and vector, called "system IRQ". + * So a unique system IRQ dispatcher is implemented here. + * This module also contains an interface to manage every source + * independently. It is possible to assign to every system IRQ + * a specific IRQ handler. + * + * \see sysirq_setHandler + * \see sysirq_setEnable + */ + +#include "sysirq_at91.h" +#include +#include +#include +#include +#include + +/** + * Enable/disable the Periodic Interrupt Timer + * interrupt. + */ +INLINE void pit_setEnable(bool enable) +{ + if (enable) + PIT_MR |= BV(PITIEN); + else + PIT_MR &= ~BV(PITIEN); +} + +/** + * Table containing all system irqs. + */ +static SysIrq sysirq_tab[] = +{ + /* PIT, Periodic Interval Timer (System timer)*/ + { + .enabled = false, + .setEnable = pit_setEnable, + .handler = NULL, + }, + /* TODO: add other system sources here */ +}; + +STATIC_ASSERT(countof(sysirq_tab) == SYSIRQ_CNT); + +/** + * System IRQ dispatcher. + * This is the entry point for all system IRQs in AT91. + * This function checks for interrupt enable state of + * various sources (system timer, etc..) and calls + * the corresponding handler. + * + * \note On AT91SAM7, all system IRQs (timer included) are handled + * by the sysirq_dispatcher, so we can't differentiate between + * context-switch and non-context-switch ISR inside this + * class of IRQs. + */ +static DECLARE_ISR_CONTEXT_SWITCH(sysirq_dispatcher) +{ + unsigned int i; + + for (i = 0; i < countof(sysirq_tab); i++) + { + if (sysirq_tab[i].enabled + && sysirq_tab[i].handler) + sysirq_tab[i].handler(); + } + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +#define SYSIRQ_PRIORITY 0 ///< default priority for system irqs. + + +MOD_DEFINE(sysirq); + +/** + * Init system IRQ handling. + * \note all system interrupts are disabled. + */ +void sysirq_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Disable all system interrupts */ + for (unsigned i = 0; i < countof(sysirq_tab); i++) + sysirq_tab[i].setEnable(false); + + /* Set the vector. */ + AIC_SVR(SYSC_ID) = sysirq_dispatcher; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SYSC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SYSIRQ_PRIORITY; + /* Clear pending interrupt */ + AIC_ICCR = BV(SYSC_ID); + /* Enable the system IRQ */ + AIC_IECR = BV(SYSC_ID); + + IRQ_RESTORE(flags); + MOD_INIT(sysirq); +} + + +/** + * Helper function used to set handler for system IRQ \a irq. + */ +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler) +{ + ASSERT(irq < SYSIRQ_CNT); + sysirq_tab[irq].handler = handler; +} + +/** + * Helper function used to enable/disable system IRQ \a irq. + */ +void sysirq_setEnable(sysirq_t irq, bool enable) +{ + ASSERT(irq < SYSIRQ_CNT); + + sysirq_tab[irq].setEnable(enable); + sysirq_tab[irq].enabled = enable; +} + +/** + * Helper function used to get system IRQ \a irq state. + */ +bool sysirq_enabled(sysirq_t irq) +{ + ASSERT(irq < SYSIRQ_CNT); + + return sysirq_tab[irq].enabled; +} diff --git a/2.5/bertos/cpu/arm/drv/sysirq_at91.h b/2.5/bertos/cpu/arm/drv/sysirq_at91.h new file mode 100644 index 00000000..ad094fca --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/sysirq_at91.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief System irq handler for Atmel AT91 ARM7 processors (interface). + */ + +#ifndef DRV_AT91_SYSIRQ_H +#define DRV_AT91_SYSIRQ_H + +#include + +typedef void (* sysirq_handler_t)(void); ///< Type for system irq handler. +typedef void (* sysirq_setEnable_t)(bool); ///< Type for system irq enable/disable function. + +/** + * Structure used to define a system interrupt source. + */ +typedef struct SysIrq +{ + bool enabled; ///< Getter for irq enable/disable state. + sysirq_setEnable_t setEnable; ///< Setter for irq enable/disable state. + sysirq_handler_t handler; ///< IRQ handler. +} SysIrq; + +/** + * System IRQ ID list. + */ +typedef enum sysirq_t +{ + SYSIRQ_PIT, ///< Periodic Interval Timer + /* TODO: add all system irqs */ + SYSIRQ_CNT +} sysirq_t; + +void sysirq_init(void); +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler); +void sysirq_setEnable(sysirq_t irq, bool enable); +bool sysirq_enabled(sysirq_t irq); + +#endif /* ARCH_ARM_SYSIRQ_H */ diff --git a/2.5/bertos/cpu/arm/drv/timer_arm.c b/2.5/bertos/cpu/arm/drv/timer_arm.c new file mode 100644 index 00000000..adeee6f6 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/timer_arm.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for ARM (inplementation). + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use timer_at91.c + + #include + #include + + #if CPU_ARM_AT91 + #include "timer_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif + +#endif /* WIZ_AUTOGEN */ diff --git a/2.5/bertos/cpu/arm/drv/timer_arm.h b/2.5/bertos/cpu/arm/drv/timer_arm.h new file mode 100644 index 00000000..2b4f2510 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/timer_arm.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for ARM (interface). + */ + +#include + +#if CPU_ARM_AT91 + #include "timer_at91.h" +#elif CPU_ARM_LPC2 + #include "timer_lpc2.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/timer_at91.c b/2.5/bertos/cpu/arm/drv/timer_at91.c new file mode 100644 index 00000000..beab00d6 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/timer_at91.c @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for Atmel AT91 (inplementation). + */ + +#include "timer_at91.h" +#include +#include "sysirq_at91.h" + +#include // BV() +#include +#include +#include + + +/** HW dependent timer initialization */ +#if (CONFIG_TIMER == TIMER_ON_PIT) + + ISR_PROTO_CONTEXT_SWITCH(timer_handler); + + void timer_hw_init(void) + { + sysirq_init(); + + cpu_flags_t flags; + + MOD_CHECK(sysirq); + + IRQ_SAVE_DISABLE(flags); + + PIT_MR = TIMER_HW_CNT; + /* Register system interrupt handler. */ + sysirq_setHandler(SYSIRQ_PIT, timer_handler); + + /* Enable interval timer and interval timer interrupts */ + PIT_MR |= BV(PITEN); + sysirq_setEnable(SYSIRQ_PIT, true); + + /* Reset counters, this is needed to start timer and interrupt flags */ + uint32_t dummy = PIVR; + (void) dummy; + + IRQ_RESTORE(flags); + } + +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ diff --git a/2.5/bertos/cpu/arm/drv/timer_at91.h b/2.5/bertos/cpu/arm/drv/timer_at91.h new file mode 100644 index 00000000..0628d394 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/timer_at91.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for Atmel AT91 (interface). + */ + +#ifndef DRV_AT91_TIMER_H +#define DRV_AT91_TIMER_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* BV */ + +#include + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * + * $WIZ$ timer_select = "TIMER_ON_PIT", "TIMER_DEFAULT" + */ +#define TIMER_ON_PIT 1 ///< System timer on Periodic interval timer + +#define TIMER_DEFAULT TIMER_ON_PIT ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER_ON_PIT) + + /* + * On ARM all system IRQs are handled by the sysirq_dispatcher, so the actual + * timer handler can be treated like any other normal routine. + */ + #define DEFINE_TIMER_ISR void timer_handler(void); \ + void timer_handler(void) + + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT (CPU_FREQ / (16 * TIMER_TICKS_PER_SEC) - 1) + + /** Frequency of the hardware high-precision timer. */ + #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ / 16) + + /** Type of time expressed in ticks of the hardware high-precision timer */ + typedef uint32_t hptime_t; + #define SIZEOF_HPTIME_T 4 + + INLINE void timer_hw_irq(void) + { + /* Reset counters, this is needed to reset timer and interrupt flags */ + uint32_t dummy = PIVR; + (void) dummy; + } + + INLINE bool timer_hw_triggered(void) + { + return PIT_SR & BV(PITS); + } + + INLINE hptime_t timer_hw_hpread(void) + { + /* In the upper part of PIT_PIIR there is unused data */ + return PIIR & CPIV_MASK; + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +void timer_hw_init(void); + + +#endif /* DRV_TIMER_AT91_H */ diff --git a/2.5/bertos/cpu/arm/drv/timer_lpc2.c b/2.5/bertos/cpu/arm/drv/timer_lpc2.c new file mode 100644 index 00000000..cd4ac56a --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/timer_lpc2.c @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for LPC2xxx (implementation). + * + * notest:arm + */ +#include "cfg/cfg_timer.h" +#include // BV() +#include // BV() + +#include +#include +#include "timer_lpc2.h" + +/** HW dependent timer initialization */ +#if (CONFIG_TIMER == TIMER0_COMPARE0) + #define TIMER0_ID 4 + void timer_hw_init(void) + { + /* Power on timer0 */ + PCONP |= BV(1); + + /* Set TIMER0 clk to CPU_FREQ */ + PCLKSEL0 &= ~0x0C; + PCLKSEL0 |= 0x04; + + /* reset prescaler counter */ + T0PR = 0; + + /* Set match register 0 */ + T0MR0 = TIMER_HW_CNT; + /* IRQ and reset counter on compare match 0 */ + T0MCR &= ~0x03; + T0MCR |= 0x03; + /* Reset timer0 counter and prescaler */ + T0TCR = 0x02; + + vic_setVector(TIMER0_ID, timer_handler); + vic_enable(TIMER0_ID); + + /* Start timer0 */ + T0TCR = 0x01; + } + + +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + diff --git a/2.5/bertos/cpu/arm/drv/timer_lpc2.h b/2.5/bertos/cpu/arm/drv/timer_lpc2.h new file mode 100644 index 00000000..7a796406 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/timer_lpc2.h @@ -0,0 +1,103 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for NXP LPC2xxx (interface). + */ + +#ifndef DRV_LPC2_TIMER_H +#define DRV_LPC2_TIMER_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* BV */ + +#include + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * + * $WIZ$ timer_select = "TIMER0_COMPARE0", "TIMER_DEFAULT" + */ +#define TIMER0_COMPARE0 0 ///< System timer on Timer0 Compare match0 + +#define TIMER_DEFAULT TIMER0_COMPARE0 ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER0_COMPARE0) + ISR_PROTO_CONTEXT_SWITCH(timer_handler); + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_handler) + + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT (CPU_FREQ / TIMER_TICKS_PER_SEC - 1) + + /** Frequency of the hardware high-precision timer. */ + #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ) + + /** Type of time expressed in ticks of the hardware high-precision timer */ + typedef uint32_t hptime_t; + #define SIZEOF_HPTIME_T 4 + + INLINE void timer_hw_irq(void) + { + /* Reset The match0 irq flag */ + T0IR = 0x01; + /* Signal the VIC we have completed the ISR */ + VICVectAddr = 0; + } + + INLINE bool timer_hw_triggered(void) + { + return true; + } + + INLINE hptime_t timer_hw_hpread(void) + { + return T0TC; + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +void timer_hw_init(void); + + +#endif /* DRV_LPC2_TIMER_H */ diff --git a/2.5/bertos/cpu/arm/drv/twi_arm.c b/2.5/bertos/cpu/arm/drv/twi_arm.c new file mode 100644 index 00000000..8395f392 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/twi_arm.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Low-level TWI module for ARM (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use twi_at91.c + + #include + + #if CPU_ARM_AT91 + #include "twi_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/2.5/bertos/cpu/arm/drv/twi_arm.h b/2.5/bertos/cpu/arm/drv/twi_arm.h new file mode 100644 index 00000000..4242956c --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/twi_arm.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level TWI module for ARM (interface). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "twi_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/arm/drv/twi_at91.c b/2.5/bertos/cpu/arm/drv/twi_at91.c new file mode 100644 index 00000000..cb2097ea --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/twi_at91.c @@ -0,0 +1,268 @@ +/** + * \file + * + * + * \brief Driver for the AT91 ARM TWI (implementation) + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#include "twi_at91.h" + +#include "cfg/cfg_i2c.h" +#include +#include +#include +#include + +#include + +#include + +/** + * Timeout for ACK slave waiting. + */ +#define TWI_TIMEOUT ms_to_ticks(50) + +/** + * Send \a size bytes over the twi line to slave \a id. + * If the device requires internal addressing before writing, \a byte1 \a byte2 and \a byte3 can + * be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes + * are required for internal addressing you *must* first use \a byte1 and than \a byte2. + * \note Atmel TWI implementation is broken so it was not possible to supply a better + * interface. Additionally NACK handling is also broken, so if the i2c device reply nack + * this function will return after TWI_TIMEOUT. + * \return true if ok, false on slave timeout. + */ +bool twi_write(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t size) +{ + uint8_t addr_size = 0; + const uint8_t *buf = (const uint8_t *)_buf; + ticks_t start; + + /* At least 1 byte *must* be transmitted, thanks to crappy hw implementation */ + ASSERT(size >= 1); + + /* Check internal byte address presence */ + if (byte1 != TWI_NO_IADDR) + addr_size++; + + if (byte2 != TWI_NO_IADDR) + { + ASSERT(addr_size == 1); + addr_size++; + } + + if (byte3 != TWI_NO_IADDR) + { + ASSERT(addr_size == 2); + addr_size++; + } + + start = timer_clock(); + /* Wait tx buffer empty */ + while (!(TWI_SR & BV(TWI_TXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + /* Set slave address and (optional) internal slave addresses */ + TWI_MMR = (uint32_t)id << TWI_DADR_SHIFT | (uint32_t)addr_size << TWI_IADRSZ_SHIFT; + + TWI_IADR = ((uint32_t)(byte3 & 0xff) << 16) | ((uint32_t)(byte2 & 0xff) << 8) | ((uint32_t)(byte1 & 0xff)); + + while (size--) + { + /* Send data */ + TWI_THR = *buf++; + + start = timer_clock(); + /* Wait tx buffer empty */ + while (!(TWI_SR & BV(TWI_TXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + } + + /* Wait transmit complete bit */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_TXCOMP))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + return true; +} + + +/** + * Read \a size bytes from the twi line from slave \a id. + * If the device requires internal addressing before reading, \a byte1 \a byte2 and \a byte3 must + * be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes + * are required for internal addressing you *must* first use \a byte1 and than \a byte2. + * \note Atmel TWI implementation is broken so it was not possible to supply a better + * interface. Additionally NACK handling is also broken, so if the i2c device reply nack + * this function will return after TWI_TIMEOUT. + * \return true if ok, false on slave timeout. + */ +bool twi_read(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t size) +{ + uint8_t addr_size = 0; + uint8_t *buf = (uint8_t *)_buf; + bool stopped = false; + ticks_t start; + + /* At least 1 byte *must* be transmitted, thanks to crappy twi implementation */ + ASSERT(size >= 1); + + /* Check internal byte address presence */ + if (byte1 != TWI_NO_IADDR) + addr_size++; + + if (byte2 != TWI_NO_IADDR) + { + ASSERT(addr_size == 1); + addr_size++; + } + + if (byte3 != TWI_NO_IADDR) + { + ASSERT(addr_size == 2); + addr_size++; + } + + /* Wait tx buffer empty */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_TXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + + /* Set slave address and (optional) internal slave addresses */ + TWI_MMR = ((uint32_t)id << TWI_DADR_SHIFT) | BV(TWI_MREAD) | ((uint32_t)addr_size << TWI_IADRSZ_SHIFT); + + TWI_IADR = ((uint32_t)(byte3 & 0xff) << 16) | ((uint32_t)(byte2 & 0xff) << 8) | ((uint32_t)(byte1 & 0xff)); + + /* + * Start reception. + * Kludge: if we want to receive only 1 byte, the stop but *must* be set here + * (thanks to crappy twi implementation again). + */ + if (size == 1) + { + TWI_CR = BV(TWI_START) | BV(TWI_STOP); + stopped = true; + } + else + TWI_CR = BV(TWI_START); + + while (size--) + { + /* If we are at the last byte, inform the crappy hw that we + want to stop the reception. */ + if (!size && !stopped) + TWI_CR = BV(TWI_STOP); + + /* Wait until a byte is received */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_RXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + { + TWI_CR = BV(TWI_STOP); + return false; + } + } + + + *buf++ = TWI_RHR; + } + + /* Wait transmit complete bit */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_TXCOMP))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + return true; +} + +MOD_DEFINE(twi); + +/** + * Init the (broken) sam7 twi driver. + */ +void twi_init(void) +{ + /* Disable PIO on TWI pins */ + PIOA_PDR = BV(TWD) | BV(TWCK); + + /* Enable oper drain on TWI pins */ + PIOA_MDER = BV(TWD); + + /* Disable all irqs */ + TWI_IDR = 0xFFFFFFFF; + + TWI_CR = BV(TWI_SWRST); + + /* Enable master mode */ + TWI_CR = BV(TWI_MSEN); + + PMC_PCER = BV(TWI_ID); + + /* + * Compute twi clock. + * CLDIV = ((Tlow * 2^CKDIV) -3) * Tmck + * CHDIV = ((THigh * 2^CKDIV) -3) * Tmck + * Only CLDIV is computed since CLDIV = CHDIV (50% duty cycle) + */ + uint16_t cldiv, ckdiv = 0; + while ((cldiv = ((CPU_FREQ / (2 * CONFIG_I2C_FREQ)) - 3) / (1 << ckdiv)) > 255) + ckdiv++; + + /* Atmel errata states that ckdiv *must* be less than 5 for unknown reason */ + ASSERT(ckdiv < 5); + + TWI_CWGR = ((uint32_t)ckdiv << TWI_CKDIV_SHIFT) | (cldiv << TWI_CLDIV_SHIFT) | (cldiv << TWI_CHDIV_SHIFT); + TRACEMSG("TWI_CWGR [%08lx]", TWI_CWGR); + + MOD_INIT(twi); +} + diff --git a/2.5/bertos/cpu/arm/drv/twi_at91.h b/2.5/bertos/cpu/arm/drv/twi_at91.h new file mode 100644 index 00000000..ecf4974e --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/twi_at91.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Driver for the AT91 ARM TWI (implementation) + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + + +#ifndef DRV_AT91_TWI_H +#define DRV_AT91_TWI_H + +#include + +typedef int16_t twi_iaddr_t; + +#define TWI_NO_IADDR (-1) + +void twi_init(void); +bool twi_read(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t len); +bool twi_write(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t len); + +#endif /* DRV_AT91_TWI_H */ diff --git a/2.5/bertos/cpu/arm/drv/vic_lpc2.c b/2.5/bertos/cpu/arm/drv/vic_lpc2.c new file mode 100644 index 00000000..066e7fee --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/vic_lpc2.c @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Vectored Interrupt Controller VIC driver. + * + * notest:arm + */ +#include "vic_lpc2.h" +#include + + +void NORETURN vic_defaultHandler(void) +{ + IRQ_DISABLE; + LOG_ERR("Unhandled IRQ\n" + "VICIRQStatus %08lX\n" + "VICFIQStatus %08lX\n", VICIRQStatus, VICFIQStatus); + while (1) + PAUSE; +} diff --git a/2.5/bertos/cpu/arm/drv/vic_lpc2.h b/2.5/bertos/cpu/arm/drv/vic_lpc2.h new file mode 100644 index 00000000..22a2bda7 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/vic_lpc2.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Vectored Interrupt Controller VIC driver. + */ + +#ifndef DRV_VIC_LPC2_H +#define DRV_VIC_LPC2_H + +#include +#include + +#if CPU_ARM_LPC2378 + #include + #define vic_vector(i) (*(&VICVectAddr0 + i)) + #define vic_priority(i) (*(&VICVectCntl0 + i)) + #define VIC_SRC_CNT 32 + #define vic_enable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnable = BV(i); } while (0) + #define vic_disable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnClr = BV(i); } while (0) + + typedef void vic_handler_t(void); + void vic_defaultHandler(void); + + INLINE void vic_init(void) + { + IRQ_DISABLE; + /* Assign all sources to IRQ (not to FIQ) */ + VICIntSelect = 0; + /* Disable all sw interrupts */ + VICSoftIntClr = 0xFFFFFFFF; + /* Disable all interrupts */ + VICIntEnClr = 0xFFFFFFFF; + + for (int i = 0; i < VIC_SRC_CNT; i++) + vic_vector(i) = (reg32_t)vic_defaultHandler; + } + + INLINE void vic_setVector(int id, vic_handler_t *handler) + { + ASSERT(id < VIC_SRC_CNT); + vic_vector(id) = (reg32_t)handler; + } +#else + #error Unknown CPU +#endif + +#endif /* DRV_VIC_LPC2_H */ diff --git a/2.5/bertos/cpu/arm/drv/wdt_arm.h b/2.5/bertos/cpu/arm/drv/wdt_arm.h new file mode 100644 index 00000000..02e49906 --- /dev/null +++ b/2.5/bertos/cpu/arm/drv/wdt_arm.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Watchdog interface for ARM architecture. + * + * \version $Id$ + * + * \author Luca Ottaviano + * + */ +#ifndef DRV_WDT_ARM_H +#define DRV_WDT_ARM_H + +#include // INLINE + +#warning TODO: This module is not implemented for at91 CPUs + +INLINE void wdt_start(uint32_t _timeout) { (void) _timeout; /* implement me */ } +INLINE void wdt_stop(void) { /*implement me */ } +INLINE void wdt_reset(void) { /* implement me */ } + +#endif //DRV_WDT_ARM_H diff --git a/2.5/bertos/cpu/arm/hw/crt_arm7tdmi.S b/2.5/bertos/cpu/arm/hw/crt_arm7tdmi.S new file mode 100644 index 00000000..bf80e7e3 --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/crt_arm7tdmi.S @@ -0,0 +1,192 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief ARM7TDMI CRT. + */ + +#define ARM_MODE_USR 0x10 +#define ARM_MODE_FIQ 0x11 +#define ARM_MODE_IRQ 0x12 +#define ARM_MODE_SVC 0x13 +#define ARM_MODE_ABORT 0x17 +#define ARM_MODE_UNDEF 0x1B +#define ARM_MODE_SYS 0x1F + +#define IRQ_BIT 0x80 +#define FIQ_BIT 0x40 + + +/* + * Hardware initialization. + */ + .section .init, "ax", %progbits +__init0: + /* + * Set stack pointers + */ + ldr r0, =__stack_fiq_end + msr CPSR_c, #ARM_MODE_FIQ | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_irq_end + msr CPSR_c, #ARM_MODE_IRQ | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_abt_end + msr CPSR_c, #ARM_MODE_ABORT | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_und_end + msr CPSR_c, #ARM_MODE_UNDEF | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_svc_end + msr CPSR_c, #ARM_MODE_SVC | IRQ_BIT | FIQ_BIT + mov r13, r0 + + /* + * Early hw initialization #1. + * Called before clearing .bss and + * loading .data segments. + */ + bl __init1 + + /* + * Clear .bss + */ + ldr r1, =__bss_start + ldr r2, =__bss_end + ldr r3, =0 + +bss_loop: + cmp r1, r2 + strne r3, [r1], #+4 + bne bss_loop + + /* + * Relocate .data section (Copy from ROM to RAM). + */ + ldr r1, =__etext + ldr r2, =__data_start + ldr r3, =__data_end + +data_loop: + cmp r2, r3 + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo data_loop + + /* + * Early hw initialization #2. + * Called after setting up .bss and .data segments + * but before calling main(). + */ + bl __init2 + + /* + * Jump to main + */ + bl main + +end: + b end + +__dummy_init: + mov pc, lr + + /* + * Redefine your own __init() in order to supply + * a completely custom initialization routine. + */ + .weak __init + .set __init, __init0 + + /* + * Redefine your own __init1() in order to supply + * an hardware initialization routine. + * Remember that __init1() is called *before* + * clearing .bss and loading .data sections. + */ + .weak __init1 + .set __init1, __dummy_init + + /* + * Redefine your own __init2() in order to supply + * an hardware initialization routine. + * Remember that __init2() is called *after* + * clearing .bss and loading .data sections, just + * before calling main(). + */ + .weak __init2 + .set __init2, __dummy_init + + /* + * Redefine your own __undef() in order to supply + * a custom handler for undefined instruction exception. + */ + .weak __undef + .set __undef, __xcpt_dummy_undef + + /* + * Redefine your own __swi() in order to supply + * a custom handler for software interrupt exception. + */ + .weak __swi + .set __swi, __xcpt_dummy_swi + + /* + * Redefine your own __prefetch_abort() in order to supply + * a custom handler for prefetch abort exception. + */ + .weak __prefetch_abort + .set __prefetch_abort, __xcpt_dummy_pref + + /* + * Redefine your own __data_abort() in order to supply + * a custom handler for data abort exception. + */ + .weak __data_abort + .set __data_abort, __xcpt_dummy_dab + + .ltorg + + .section .exceptions, "ax", %progbits + +__xcpt_dummy_undef: + b __xcpt_dummy_undef + +__xcpt_dummy_swi: + b __xcpt_dummy_swi + +__xcpt_dummy_pref: + b __xcpt_dummy_pref + +__xcpt_dummy_dab: + b __xcpt_dummy_dab diff --git a/2.5/bertos/cpu/arm/hw/crtat91sam7_rom.S b/2.5/bertos/cpu/arm/hw/crtat91sam7_rom.S new file mode 100644 index 00000000..9bd9d46c --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/crtat91sam7_rom.S @@ -0,0 +1,378 @@ +/** + * \file + * + * + * \version $Id: $ + * + * \author Francesco Sacchi + * + * \brief AT91SAM7S256 CRT, adapted from NUt/OS, see license below. + */ + +/* + * Copyright (C) 2005-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + * + */ + +#include +#include "cfg/cfg_arch.h" + + +#if CPU_FREQ != 48023000L + /* Avoid errors on nightly test */ + #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) + #warning Clock registers set for 48.023MHz operation, revise following code if you want a different clock. + #endif +#endif + + +#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X + /* + * With a 18.420MHz cristal, master clock is: + * (((18.420 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023MHz + */ + #define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */ + #define PLL_DIV_VAL 14 + #define AT91MCK_PRES PMC_PRES_CLK_2 + + /* + * Register I/O adresses. + */ + #define MC_BASE 0xFFFFFF00 + #define MC_FMR_OFF 0x00000060 + #define MC_FWS_2R3W 0x00000100 + + #define AIC_BASE 0xFFFFF000 + #define AIC_EOICR_OFF 0x00000130 + #define AIC_IDCR_OFF 0x00000124 + + #define WDT_BASE 0xFFFFFD40 + #define WDT_MR_OFF 0x00000004 + #define WDT_WDDIS (1 << 15) + + #define PMC_BASE 0xFFFFFC00 + #define PMC_PCER_OFF 0x00000010 + #define PMC_SR_OFF 0x00000068 + #define PMC_MCKR_OFF 0x00000030 + #define PMC_MOSCS (1 << 0) + #define PMC_LOCK (1 << 2) + #define PMC_MCKRDY (1 << 3) + #define PMC_CSS_MASK 0x00000003 + #define PMC_CSS_PLL_CLK 0x00000003 + #define PMC_PRES_MASK 0x0000001C + #define PMC_PRES_CLK_2 0x00000004 + + #if CPU_ARM_SAM7S_LARGE + #define PMC_PIO_CLK_EN (1 << 2) + #elif CPU_ARM_SAM7X + #define PMC_PIO_CLK_EN ((1 << 2) | (1 << 3)) + #else + #error CPU not supported + #endif + + #define CKGR_MOR_OFF 0x00000020 + #define CKGR_PLLR_OFF 0x0000002C + #define CKGR_MOSCEN (1 << 0) + #define CKGR_MUL_SHIFT 16 + #define CKGR_PLLCOUNT_SHIFT 8 + + #define RSTC_MR 0xFFFFFD08 + #define RSTC_KEY 0xA5000000 + #define RSTC_URSTEN (1 << 0) + + #define ARM_MODE_USR 0x10 + #define ARM_MODE_FIQ 0x11 + #define ARM_MODE_IRQ 0x12 + #define ARM_MODE_SVC 0x13 + #define ARM_MODE_ABORT 0x17 + #define ARM_MODE_UNDEF 0x1B + #define ARM_MODE_SYS 0x1F + +#else + #error No register I/O definition for selected ARM CPU +#endif +/*\}*/ + +/* + * Section 0: Vector table and reset entry. + */ + .section .vectors,"ax",%progbits + + .global __vectors +__vectors: + ldr pc, [pc, #24] /* Reset */ + ldr pc, [pc, #24] /* Undefined instruction */ + ldr pc, [pc, #24] /* Software interrupt */ + ldr pc, [pc, #24] /* Prefetch abort */ + ldr pc, [pc, #24] /* Data abort */ + ldr pc, [pc, #24] /* Reserved */ + + /* + * On IRQ the PC will be loaded from AIC_IVR, which + * provides the address previously set in AIC_SVR. + * The interrupt routine will be called in ARM_MODE_IRQ + * with IRQ disabled and FIQ unchanged. + */ + ldr pc, [pc, #-0xF20] /* Interrupt request, auto vectoring. */ + ldr pc, [pc, #-0xF20] /* Fast interrupt request, auto vectoring. */ + + .word _init + .word __undef + .word __swi + .word __prefetch_abort + .word __data_abort + + .weak __undef + .set __undef, __xcpt_dummy_undef + .weak __swi + .set __swi, __xcpt_dummy_swi + .weak __prefetch_abort + .set __prefetch_abort, __xcpt_dummy_pref + .weak __data_abort + .set __data_abort, __xcpt_dummy_dab + +/** .global __xcpt_dummy*/ +__xcpt_dummy_undef: + b __xcpt_dummy_undef + +__xcpt_dummy_swi: + b __xcpt_dummy_swi + +__xcpt_dummy_pref: + b __xcpt_dummy_pref + +__xcpt_dummy_dab: + b __xcpt_dummy_dab + + + .ltorg +/* + * Hardware initialization. + */ + .section .init, "ax", %progbits + .globl _init +_init: + /* + * Use 2 cycles for flash access. + */ + ldr r1, =MC_BASE + mov r0, #MC_FWS_2R3W + str r0, [r1, #MC_FMR_OFF] + + /* + * Disable all interrupts. Useful for debugging w/o target reset. + */ + ldr r1, =AIC_BASE + mvn r0, #0 + str r0, [r1, #AIC_EOICR_OFF] + str r0, [r1, #AIC_IDCR_OFF] + + /* + * The watchdog is enabled after processor reset. Disable it. + */ + ldr r1, =WDT_BASE + ldr r0, =WDT_WDDIS + str r0, [r1, #WDT_MR_OFF] + + /* + * Enable the main oscillator. Set startup time of 6 * 8 slow + * clock cycles and wait until oscillator is stabilized. + */ + ldr r1, =PMC_BASE + mov r0, #(6 << 8) + orr r0, r0, #CKGR_MOSCEN + str r0, [r1, #CKGR_MOR_OFF] +wait_moscs: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MOSCS + beq wait_moscs + + /* + * Switch to Slow oscillator clock. + */ + ldr r0, [r1, #PMC_MCKR_OFF] + and r0, r0, #~PMC_CSS_MASK + str r0, [r1, #PMC_MCKR_OFF] +wait_slowosc: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_slowosc + + /* + * Switch to prescaler div 1 factor. + */ + ldr r0, [r1, #PMC_MCKR_OFF] + and r0, r0, #~PMC_PRES_MASK + str r0, [r1, #PMC_MCKR_OFF] +wait_presc: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_presc + + /* + * Set PLL: + * PLLfreq = crystal / divider * (multiplier + 1) + * Wait 28 clock cycles until PLL is locked. + */ + ldr r0, =((PLL_MUL_VAL << CKGR_MUL_SHIFT) | (28 << CKGR_PLLCOUNT_SHIFT) | PLL_DIV_VAL) + + str r0, [r1, #CKGR_PLLR_OFF] +wait_lock: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_LOCK + beq wait_lock + + /* + * Set master clock prescaler. + */ + mov r0, #AT91MCK_PRES + str r0, [r1, #PMC_MCKR_OFF] +wait_presrdy: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_presrdy + + /* + * Switch to PLL clock. Trying to set this together with the + * prescaler fails (see datasheets). + */ + ldr r0, [r1, #PMC_MCKR_OFF] + orr r0, r0, #PMC_CSS_PLL_CLK + str r0, [r1, #PMC_MCKR_OFF] +wait_pllsel: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_pllsel + + /* + * Enable external reset key. + */ + ldr r0, =(RSTC_KEY | RSTC_URSTEN) + ldr r1, =RSTC_MR + str r0, [r1, #0] + + /* + * Set exception stack pointers + */ + ldr r0, =__stack_fiq_end + msr CPSR_c, #ARM_MODE_FIQ | 0xC0 + mov r13, r0 + ldr r0, =__stack_irq_end + msr CPSR_c, #ARM_MODE_IRQ | 0xC0 + mov r13, r0 + ldr r0, =__stack_abt_end + msr CPSR_c, #ARM_MODE_ABORT | 0xC0 + mov r13, r0 + ldr r0, =__stack_und_end + msr CPSR_c, #ARM_MODE_UNDEF | 0xC0 + mov r13, r0 + ldr r0, =__stack_svc_end + msr CPSR_c, #ARM_MODE_SVC | 0xC0 + mov r13, r0 + + /* + * Clear .bss + */ + ldr r1, =__bss_start + ldr r2, =__bss_end + ldr r3, =0 + +_40: + cmp r1, r2 + strne r3, [r1], #+4 + bne _40 + + /* + * Relocate .data section (Copy from ROM to RAM). + */ + ldr r1, =__etext + ldr r2, =__data_start + ldr r3, =__data_end + +_41: + cmp r2, r3 + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo _41 + + /* + * Initialize user stack pointer. + */ + /* msr CPSR_c, #ARM_MODE_SYS | 0xC0 */ + ldr r13, =__stack_end + + + /* + * Enable clock for PIO(s) + */ + ldr r1, =PMC_BASE + mov r0, #PMC_PIO_CLK_EN + str r0, [r1, #PMC_PCER_OFF] + + + /* + * Jump to main + */ + ldr r0, =main + bx r0 + +End: + b End + + .ltorg diff --git a/2.5/bertos/cpu/arm/hw/init_at91.c b/2.5/bertos/cpu/arm/hw/init_at91.c new file mode 100644 index 00000000..1bba1c22 --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/init_at91.c @@ -0,0 +1,240 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief AT91SAM7S256 CRT. + */ + +#include +#include + +#define USE_FIXED_PLL 1 + +#define XTAL_FREQ 18420000UL + +#if USE_FIXED_PLL + #if CPU_FREQ != 48023000L + /* Avoid errors on nightly test */ + #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) + #warning Clock registers set for 48.023MHz operation, revise following code if you want a different clock. + #endif + #endif + + /* + * With a 18.420MHz cristal, master clock is: + * (((18.420 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023MHz + */ + #define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */ + #define PLL_DIV_VAL 14 + #define AT91MCK_PRES PMC_PRES_CLK_2 + +#else /* !USE_FIXED_PLL*/ + + #define PLL_IN_MIN 1000000UL + #define PLL_IN_MAX 32000000UL + #define PLL_OUT_MIN 80000000UL + #define PLL_OUT_MAX 160000000UL + + #define DIV_HARD_MIN 1 + #define DIV_HARD_MAX 255 + + #define DIV_MIN (DIV_ROUND(XTAL_FREQ, PLL_IN_MAX) \ + < DIV_HARD_MIN ? DIV_HARD_MIN : DIV_ROUND(XTAL_FREQ, PLL_IN_MAX)) + + #define DIV_MAX (DIV_ROUND(XTAL_FREQ, PLL_IN_MIN) \ + > DIV_HARD_MAX ? DIV_HARD_MAX : DIV_ROUND(XTAL_FREQ, PLL_IN_MIN)) + + #define MUL_MIN 0 + #define MUL_MAX 2047 + + typedef struct PllRegs + { + uint32_t mul; + uint32_t div; + uint32_t pres; + } PllRegs; + + /** + * Code used to automatically compute the PLL registers. + * Since the processor uses the internal 32kHz oscillator + * this function takes a lot of time to be executed (~3s!). + */ + static const PllRegs pllCostants(void) + { + uint32_t best_err = CPU_FREQ; + PllRegs res; + + for (uint32_t div = DIV_MIN; div <= DIV_MAX; div++) + { + for (uint32_t pres = 0; pres < 8; pres++) + { + uint32_t mul = DIV_ROUND((CPU_FREQ * div) << pres, XTAL_FREQ) - 1; + if (mul <= MUL_MAX) + { + uint32_t pll = (XTAL_FREQ * (mul + 1)) / div; + if (pll >= PLL_OUT_MIN && pll <= PLL_OUT_MAX) + { + uint32_t err = ABS((int32_t)((pll >> pres) - CPU_FREQ)); + if (err == 0) + { + res.div = div; + res.mul = mul; + res.pres = pres; + return res; + } + if (err < best_err) + { + best_err = err; + res.div = div; + res.mul = mul; + res.pres = pres; + } + } + } + } + } + return res; + } +#endif /* !USE_FIXED_PLL*/ + +/* + * Override dummy hardware init functions supplied by the ASM startup + * routine. + */ + +void __init1(void); +void __init2(void); + +/** + * Early hardware initialization routine1. + * This will be called by the ASM CRT routine just + * *before* clearing .bss and loading .data sections. + * Usually only basic tasks are performed here (i.e. setting the PLL). + * For more generic tasks, __init2() should be used. + * + * \note Please keep in mind that since .bss and .data are not yet set, care + * must be taken. No static data can be used inside this funcition. + * Also some libc functions or floating point operations could potentially + * use initialized static data, be aware! + */ +void __init1(void) +{ + /* + * Compute number of master clock cycles in 1.5us. + * Needed by flash writing functions. + * The maximum FMCN value is 0xFF and 0 can be used only if + * master clock is less than 33kHz. + */ + #define MCN DIV_ROUNDUP(CPU_FREQ, 666667UL) + #define FMCN (CPU_FREQ <= 33333UL ? 0 : (MCN < 0xFF ? MCN : 0xFF)) + + #if CPU_FREQ < 30000000UL + /* Use 1 cycles for flash access. */ + MC_FMR = FMCN << MC_FMCN_SHIFT | MC_FWS_1R2W; + #else + /* Use 2 cycles for flash access. */ + MC_FMR = FMCN << MC_FMCN_SHIFT | MC_FWS_2R3W; + #endif + + /* Disable all interrupts. Useful for debugging w/o target reset. */ + AIC_EOICR = 0xFFFFFFFF; + AIC_IDCR = 0xFFFFFFFF; + + /* The watchdog is enabled after processor reset. Disable it. */ + WDT_MR = BV(WDT_WDDIS); + + /* + * Enable the main oscillator. Set startup time of 6 * 8 slow + * clock cycles and wait until oscillator is stabilized. + */ + CKGR_MOR = (6 << 8) | BV(CKGR_MOSCEN); + while (!(PMC_SR & BV(PMC_MOSCS))) ; + + /* Switch to Slow oscillator clock. */ + PMC_MCKR &= ~PMC_CSS_MASK; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; + + /* Switch to prescaler div 1 factor. */ + PMC_MCKR &= ~PMC_PRES_MASK; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; + + uint32_t div, pres, mul; + #if USE_FIXED_PLL + div = PLL_DIV_VAL; + mul = PLL_MUL_VAL; + pres = AT91MCK_PRES; + #else + PllRegs pll = pllCostants(); + div = pll.div; + mul = pll.mul; + pres = pll.pres << PMC_PRES_SHIFT; + #endif + + /* + * Set PLL: + * PLLfreq = crystal / divider * (multiplier + 1) + * Wait 28 clock cycles until PLL is locked. + */ + CKGR_PLLR = ((mul << CKGR_MUL_SHIFT) + | (28 << CKGR_PLLCOUNT_SHIFT) | div); + while (!(PMC_SR & BV(PMC_LOCK))) ; + + /* Set master clock prescaler. */ + PMC_MCKR = pres; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; + + /* + * Switch to PLL clock. Trying to set this together with the + * prescaler fails (see datasheets). + */ + PMC_MCKR |= PMC_CSS_PLL_CLK; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; +} + +/** + * Early hardware initialization routine2. + * This will be called by the ASM CRT routine just + * *after* clearing .bss and loading .data sections and before calling main(). + */ +void __init2(void) +{ + /* Enable external reset key. */ + RSTC_MR = (RSTC_KEY | BV(RSTC_URSTEN)); + + /* Enable clock for PIO(s) */ + PMC_PCER = BV(PIOA_ID); + #if CPU_ARM_SAM7X + PMC_PCER |= BV(PIOB_ID); + #endif +} diff --git a/2.5/bertos/cpu/arm/hw/init_lpc2.c b/2.5/bertos/cpu/arm/hw/init_lpc2.c new file mode 100644 index 00000000..033216d1 --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/init_lpc2.c @@ -0,0 +1,129 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief LPC2378 CRT. + * notest:arm + */ +#include +#include +#include + +#if CPU_FREQ != 72000000UL + /* Avoid errors on nightly test */ + #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) + #warning Clock registers set for 72MHz operation, revise following code if you want a different clock. + #endif +#endif + +/* + * With a 12MHz cristal, master clock is: + * (((2 * 12 * (PLL_MUL_VAL + 1)) / (PLL_DIV_VAL + 1)) / (LPC2_CPUCLOCK_DIV + 1))= 72MHz + */ +#define PLL_MUL_VAL 11 +#define PLL_DIV_VAL 0 +#define LPC2_CPUCLOCK_DIV 3 + + +/* PLL feed sequence */ +#define PLL_FEED_SEQ() ATOMIC(PLLFEED = 0xAA; PLLFEED = 0x55;) + +static void configurePll(void) +{ + /* Disconnect and disable the PLL, if already active */ + if (PLLSTAT & (1 << 25)) + { + /* Disconnect PLL, but leave it enabled */ + PLLCON = 0x01; + PLL_FEED_SEQ(); + /* Disable PLL */ + PLLCON = 0; + PLL_FEED_SEQ(); + } + + /* Enable the main oscillator and wait for it to be stable */ + SCS |= (1 << 5); + while (!(SCS & (1 << 6))) ; + + /* Select the main oscillator as the PLL clock source */ + CLKSRCSEL = 0x01; + + /* Set up PLL mul and div */ + PLLCFG = PLL_MUL_VAL | (PLL_DIV_VAL << 16); + PLL_FEED_SEQ(); + + /* Enable PLL, disconnected */ + PLLCON = 0x01; + PLL_FEED_SEQ(); + + /* Set clock divider */ + CCLKCFG = LPC2_CPUCLOCK_DIV; + + /* Wait for the PLL to lock */ + while (!(PLLSTAT & (1 << 26))) ; + + /* Enable and connect the PLL */ + PLLCON = 0x03; + PLL_FEED_SEQ(); +} + +void __init1(void); + +void __init1(void) +{ + /* Map irq vectors to internal flash */ + MEMMAP = 0x01; + /* Configure PLL, switch from IRC to Main OSC */ + configurePll(); + + /* Set memory accelerator module flash timings */ +#if CPU_FREQ < 20000000UL + MAMTIM = 1; +#elif CPU_FREQ < 40000000UL + MAMTIM = 2; +#elif CPU_FREQ < 60000000UL + MAMTIM = 3; +#else + MAMTIM = 4; +#endif + + /* Memory accelerator module fully enabled */ + MAMCR = 0x02; +} + +void __init2(void); + +void __init2(void) +{ + vic_init(); +} diff --git a/2.5/bertos/cpu/arm/hw/pll_at91.h b/2.5/bertos/cpu/arm/hw/pll_at91.h new file mode 100644 index 00000000..50f4a0c4 --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/pll_at91.h @@ -0,0 +1,153 @@ +/** + * \file + * + * + * + * \author Giovanni Bajo + * + * \brief AT91SAM7S256 CRT. + */ + +#include +#include + +#if 1 +// Versione completamente unrollata + +#define CREATE_PLL_STEP(xtal, cpufreq) + +#define PLL_STEP(xtal, cpufreq, d, k) \ + do { \ + uint32_t m = (((cpufreq * (1LL << k) * (d)) + (xtal / 2)) / xtal) - 1; \ + if (m < 2048) \ + { \ + uint32_t pll = (d != 0) ? (xtal * (m + 1)) / (d) : 0; \ + if (80000000 <= pll && pll <= 160000000) \ + { \ + uint32_t err = ABS((int32_t)((pll >> k) - cpufreq)); \ + if (err < best_err) \ + { \ + best_err=err; best_m=m; best_k=k; best_d=d; \ + } \ + } \ + } \ + } while (0) + +#else + +// Versione con funzione nestata (GCC only) +// Tempo di compilazione più rapido + +#define CREATE_PLL_STEP(xtal, cpufreq) \ + void __attribute__((always_inline)) PLL_STEP(int u1, int u2, int32_t d, long long k) \ + { \ + (void)u1; (void)u2; \ + uint32_t m = ((((cpufreq * (1LL << k) * (d)) + (xtal / 2)) / xtal) - 1; \ + if (m < 2048) \ + { \ + uint32_t pll = (xtal * (m + 1)) / (d); \ + if (80000000UL <= pll && pll <= 160000000UL) \ + { \ + uint32_t err = ABS((int32_t)((pll >> k) - cpufreq)); \ + if (err < best_err) \ + { \ + best_err=err; best_m=m; best_k=k; best_d=d; \ + } \ + } \ + } \ + } + +#endif + +#define PLL_MACRO_STEP(xtal, cpufreq, d) \ + do { \ + if ((d) > 0 && (d) <= 255 && \ + (d) <= xtal / 1000000 && (d) >= xtal / 32000000) \ + { \ + PLL_STEP(xtal, cpufreq, d, 0); \ + PLL_STEP(xtal, cpufreq, d, 1); \ + PLL_STEP(xtal, cpufreq, d, 2); \ + PLL_STEP(xtal, cpufreq, d, 3); \ + PLL_STEP(xtal, cpufreq, d, 4); \ + PLL_STEP(xtal, cpufreq, d, 5); \ + PLL_STEP(xtal, cpufreq, d, 6); \ + } \ + } while (0) + +#define PLL_ITERATION_4(xtal, cpufreq, d) \ + PLL_MACRO_STEP(xtal, cpufreq, d) + +#define PLL_ITERATION_3(xtal, cpufreq, d) \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+0); \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+1); \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+2); \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+3); + +#define PLL_ITERATION_2(xtal, cpufreq, d) \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+0); \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+1); \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+2); \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+3); + +#define PLL_ITERATION_1(xtal, cpufreq, d) \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+0); \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+1); \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+2); \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+3); + +#define PLL_ITERATION(xtal, cpufreq) \ + PLL_ITERATION_1(xtal, cpufreq, 0); \ + PLL_ITERATION_1(xtal, cpufreq, 1); \ + PLL_ITERATION_1(xtal, cpufreq, 2); \ + PLL_ITERATION_1(xtal, cpufreq, 3) + +#define PLL_CALC(xtal, cpufreq, m, d, k) do \ + { \ + uint32_t best_err=cpufreq, best_m, best_k, best_d; \ + CREATE_PLL_STEP(xtal, cpufreq) \ + PLL_ITERATION(xtal, cpufreq); \ + *(m)=best_m; *(d)=best_d; *(k)=best_k; \ + } while (0) + +#if 0 +int main(int argc, char *argv[]) +{ + int32_t m, d, k; + PLL_CALC(18420000, 48023000, &m, &d, &k); + + if (__builtin_constant_p(m) && __builtin_constant_p(k) && __builtin_constant_p(d)) + printf("SUCCESS -- compile time evaluation\n"); + else + printf("FAILURE -- run time evaluation\n"); + + printf("M:%d D:%d K:%d\n", m, d, k); +} +#endif diff --git a/2.5/bertos/cpu/arm/hw/switch_arm.S b/2.5/bertos/cpu/arm/hw/switch_arm.S new file mode 100644 index 00000000..0e7d6972 --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/switch_arm.S @@ -0,0 +1,6 @@ +#include + +#if !(ARCH & ARCH_NIGHTTEST) + #warning This file is deprecated, use switch_ctx_arm.S + #include "switch_ctx_arm.S" +#endif diff --git a/2.5/bertos/cpu/arm/hw/switch_ctx_arm.S b/2.5/bertos/cpu/arm/hw/switch_ctx_arm.S new file mode 100644 index 00000000..db4f297f --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/switch_ctx_arm.S @@ -0,0 +1,99 @@ +/** + * \file + * + * + * \brief ARM context switch + * + * + * \author Stefano Fedrigo + * \author Francesco Sacchi + * \author Andrea Righi + */ + +#include "cfg/cfg_proc.h" + +/* void asm_switch_context(void **new_sp [r0], void **save_sp [r1]) */ +.globl asm_switch_context +asm_switch_context: + /* Save registers */ + stmfd sp!, {r4 - r11, lr} + /* Save old stack pointer */ + str sp, [r1] + /* Load new stack pointer */ + ldr sp, [r0] + /* Load new registers */ + ldmfd sp!, {r4 - r11, pc} + +#if CONFIG_KERN_PREEMPT + +/* ARM interrupt mode with IRQ and FIQ disabled */ +#define ARM_IRQ_MODE 0xD2 +/* ARM supervisor mode with IRQ and FIQ disabled */ +#define ARM_SVC_MODE 0xD3 + +.globl asm_irq_switch_context +asm_irq_switch_context: + /* Return if preemption is not needed */ + bl proc_needPreempt + cmp r0, #0 + ldmeqfd sp!, {r0 - r3, ip, pc}^ + + /* Otherwise restore regs used by the ISR */ + ldmfd sp!, {r0 - r3, ip, lr} + + /* Save current process context */ + msr cpsr_c, #ARM_SVC_MODE + stmfd sp!, {r0 - r3, ip, lr} + + /* Save lr_irq and spsr_irq in process stack */ + msr cpsr_c, #ARM_IRQ_MODE + mov r0, lr + mrs r1, spsr + msr cpsr_c, #ARM_SVC_MODE + stmfd sp!, {r0, r1} + + /* Perform the context switch */ + bl proc_preempt + + /* Restore lr_irq and spsr_irq from process stack */ + ldmfd sp!, {r0, r1} + msr cpsr_c, #ARM_IRQ_MODE + mov lr, r0 + msr spsr_cxsf, r1 + + /* Restore process regs */ + msr cpsr_c, #ARM_SVC_MODE + ldmfd sp!, {r0 - r3, ip, lr} + + /* Exit from ISR */ + msr cpsr_c, #ARM_IRQ_MODE + movs pc, lr +#endif /* CONFIG_KERN_PREEMPT */ diff --git a/2.5/bertos/cpu/arm/hw/vectors_at91.S b/2.5/bertos/cpu/arm/hw/vectors_at91.S new file mode 100644 index 00000000..ce4991e4 --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/vectors_at91.S @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Atmel AT91SAM interrupt vectors. + */ + +#include "cfg/cfg_arch.h" +#if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) + /* Avoid errors during nigthly test */ + #define __vectors __vectors_at91 +#endif + + +/* + * Section 0: Vector table and reset entry. + */ + .section .vectors,"ax",%progbits + + .global __vectors +__vectors: + ldr pc, _init /* Reset */ + ldr pc, _undef /* Undefined instruction */ + ldr pc, _swi /* Software interrupt */ + ldr pc, _prefetch_abort /* Prefetch abort */ + ldr pc, _data_abort /* Data abort */ + .word 0 /* Reserved */ + + /* + * On IRQ the PC will be loaded from AIC_IVR, which + * provides the address previously set in AIC_SVR. + * The interrupt routine will be called in ARM_MODE_IRQ + * with IRQ disabled and FIQ unchanged. + */ + ldr pc, [pc, #-0xF20] /* Interrupt request, auto vectoring. */ + ldr pc, [pc, #-0xF20] /* Fast interrupt request, auto vectoring. */ + +_init: + .word __init +_undef: + .word __undef +_swi: + .word __swi +_prefetch_abort: + .word __prefetch_abort +_data_abort: + .word __data_abort + + .ltorg diff --git a/2.5/bertos/cpu/arm/hw/vectors_lpc2.S b/2.5/bertos/cpu/arm/hw/vectors_lpc2.S new file mode 100644 index 00000000..06d0a7df --- /dev/null +++ b/2.5/bertos/cpu/arm/hw/vectors_lpc2.S @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief NXP LPC2xxx interrupt vectors. + */ + +#include +#include "cfg/cfg_arch.h" +#if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) + /* Avoid errors during nigthly test */ + #define __vectors __vectors_lpc2 +#endif + +/* + * Section 0: Vector table and reset entry. + */ + .section .vectors,"ax",%progbits + + .global __vectors +__vectors: + ldr pc, _init /* Reset */ + ldr pc, _undef /* Undefined instruction */ + ldr pc, _swi /* Software interrupt */ + ldr pc, _prefetch_abort /* Prefetch abort */ + ldr pc, _data_abort /* Data abort */ +#if CPU_ARM_LPC2378 + .word 0xb9206e58 /* In LPX2xxx, this location holds the checksum of the previous vectors */ + ldr pc, [pc, #-0x120] /* Use VIC */ +#else + .word 0xb9205f88 /* In LPX2xxx, this location holds the checksum of the previous vectors */ + #if CPU_ARM_LPC2 + #warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030 + #endif + ldr pc, [pc, #-0xFF0] /* Use VIC */ +#endif + ldr pc, _fiq /* Fast interrupt request */ +_init: + .word __init +_undef: + .word __undef +_swi: + .word __swi +_prefetch_abort: + .word __prefetch_abort +_data_abort: + .word __data_abort +_fiq: + .word __fiq + + .weak __fiq +__fiq: + b __fiq + + .ltorg diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7S128.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7S128.cdef new file mode 100644 index 00000000..b825fa3f --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7S128.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S128. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes internal flash memory", + "32 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S128__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_128_rom.ld" + diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7S256.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7S256.cdef new file mode 100644 index 00000000..3e7c3bd8 --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7S256.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S256. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S256__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_256_rom.ld" + + diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7S512.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7S512.cdef new file mode 100644 index 00000000..33ee75ec --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7S512.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S512. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S512__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_512_rom.ld" + diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7S64.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7S64.cdef new file mode 100644 index 00000000..1675dcb4 --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7S64.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S64. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "64 Kbytes internal flash memory", + "16 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S64__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_64_rom.ld" + diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7X128.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7X128.cdef new file mode 100644 index 00000000..3f7920e7 --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7X128.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7X128. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes internal flash memory", + "32 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7X128__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_128_rom.ld" + diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7X256.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7X256.cdef new file mode 100644 index 00000000..d52e940b --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7X256.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7X256. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7X256__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_256_rom.ld" + diff --git a/2.5/bertos/cpu/arm/info/AT91SAM7X512.cdef b/2.5/bertos/cpu/arm/info/AT91SAM7X512.cdef new file mode 100644 index 00000000..547b456a --- /dev/null +++ b/2.5/bertos/cpu/arm/info/AT91SAM7X512.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7X512. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7 family. +include("at91sam7.common") + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7X512__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "at91sam7_512_rom.ld" + diff --git a/2.5/bertos/cpu/arm/info/LPC2378.cdef b/2.5/bertos/cpu/arm/info/LPC2378.cdef new file mode 100644 index 00000000..461ee209 --- /dev/null +++ b/2.5/bertos/cpu/arm/info/LPC2378.cdef @@ -0,0 +1,56 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for NXP LPC2 family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Francesco Sacchi +# +# + +# Import the common settings for the lpc2xxx family. +include("lpc2.common") + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes internal flash memory", + "32 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_LPC2378__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "lpc2378.ld" + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "lpc2378" + diff --git a/2.5/bertos/cpu/arm/info/at91sam7.common b/2.5/bertos/cpu/arm/info/at91sam7.common new file mode 100644 index 00000000..0026de91 --- /dev/null +++ b/2.5/bertos/cpu/arm/info/at91sam7.common @@ -0,0 +1,87 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for AT91SAM7 family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = ["ATMEL AT91 ARM", + "ARMTDMI ARM Thumb Processor", + "32-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "arm" + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "arm7tdmi" + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "at91sam7" + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_CPU = CORE_CPU + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "48023000UL" + +# Special CPU related tags. +CPU_TAGS = ["at91", CORE_CPU, TOOLCHAIN] + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "arm/scripts/" +HW_DIR = CPU_DIR + "arm/hw/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/debug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" + +GDB_INIT_SCRIPT = PRG_SCRIPTS_DIR + "arm/openocd/gdbinit-sam7" + +# Common GCC flags. +MK_CPU_CPPAFLAGS = "-g -gdwarf-2" +MK_CPU_CPPFLAGS = "-O0 -g3 -gdwarf-2 -fverbose-asm -I" + CPU_DIR + "arm/" +MK_CPU_LDFLAGS = "-nostartfiles -Wl,--no-warn-mismatch" + +# CRT files. +MK_CPU_CPPASRC = HW_DIR + "crt_arm7tdmi.S " + HW_DIR + "vectors_at91.S" +MK_CPU_CSRC = HW_DIR + "init_at91.c" diff --git a/2.5/bertos/cpu/arm/info/lpc2.common b/2.5/bertos/cpu/arm/info/lpc2.common new file mode 100644 index 00000000..b6b80043 --- /dev/null +++ b/2.5/bertos/cpu/arm/info/lpc2.common @@ -0,0 +1,85 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for NXP LPC2 family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Francesco Sacchi +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = ["NXP LPC2xxx ARM", + "ARMTDMI ARM Thumb Processor", + "32-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "arm" + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "arm7tdmi" + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_CPU = CORE_CPU + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "72000000UL" + +# Special CPU related tags. +CPU_TAGS = ["lpc2", CORE_CPU, TOOLCHAIN] + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "arm/scripts/" +HW_DIR = CPU_DIR + "arm/hw/" +DRV_DIR = CPU_DIR + "arm/drv/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/debug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" + +GDB_INIT_SCRIPT = PRG_SCRIPTS_DIR + "arm/openocd/gdbinit-sam7" + +# Common GCC flags. +MK_CPU_CPPAFLAGS = "-g -gdwarf-2" +MK_CPU_CPPFLAGS = "-O0 -g3 -gdwarf-2 -fverbose-asm -I" + CPU_DIR + "arm/" +MK_CPU_LDFLAGS = "-nostartfiles -Wl,--no-warn-mismatch" + +# CRT files. +MK_CPU_CPPASRC = HW_DIR + "crt_arm7tdmi.S " + HW_DIR + "vectors_lpc2.S" +MK_CPU_CSRC = HW_DIR + "init_lpc2.c " + DRV_DIR + "vic_lpc2.c" diff --git a/2.5/bertos/cpu/arm/io/arm.h b/2.5/bertos/cpu/arm/io/arm.h new file mode 100644 index 00000000..62cb4113 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/arm.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * ARM I/O registers. + */ + + +#ifndef ARM_H +#define ARM_H + +#include + +#if CPU_ARM_AT91 + #include "at91.h" +#elif CPU_ARM_LPC2 + #include "lpc23xx.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif + + +#endif /* ARM_H */ diff --git a/2.5/bertos/cpu/arm/io/at91.h b/2.5/bertos/cpu/arm/io/at91.h new file mode 100644 index 00000000..9e350b48 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 common definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_H +#define AT91_H + +#include + +#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X + #include "at91sam7.h" + +#else + #error Missing I/O definitions for CPU. +#endif + +#endif /* AT91_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_adc.h b/2.5/bertos/cpu/arm/io/at91_adc.h new file mode 100644 index 00000000..2abe435b --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_adc.h @@ -0,0 +1,199 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Daniele Basile + * + * AT91SAM7 Analog to Digital Converter. + * + */ + + +#ifndef AT91_ADC_H +#define AT91_ADC_H + + +/** + * ADC control register + */ +#define ADC_CR_OFF 0x00000000 ///< Control register offeset. +#define ADC_CR (*((reg32_t *)(ADC_BASE + ADC_CR_OFF))) ///< Control register address. +#define ADC_SWRST 0 ///< Software reset. +#define ADC_START 1 ///< Start conversion. + + +/** + * ADC mode register + */ +#define ADC_MR_OFF 0x00000004 ///< Mode register offeset. +#define ADC_MR (*((reg32_t *)(ADC_BASE + ADC_MR_OFF))) ///< Mode register address. +#define ADC_TRGEN 0 ///< Trigger enable. + +#define ADC_TRGSEL_TIOA0 0x00000000 ///< TIOA output of the timer counter channel 0. +#define ADC_TRGSEL_TIOA1 0x00000002 ///< TIOA output of the timer counter channel 1. +#define ADC_TRGSEL_TIOA2 0x00000004 ///< TIOA output of the timer counter channel 2. +#define ADC_TRGSEL_EXT 0x0000000C ///< External trigger. + +#define ADC_LOWRES 4 ///< Resolution 0: 10-bit, 1: 8-bit. +#define ADC_SLEEP 5 ///< Sleep mode. + +/** + * Prescaler rate selection. + * ADCClock = MCK / ((ADC_PRESCALER_VALUE + 1) * 2) + */ +#define ADC_PRESCALER_MASK 0x00003F00 ///< Prescaler rate selection mask. +#define ADC_PRESCALER_SHIFT 8 ///< Prescale rate selection shift. + +/** + * Start up timer. + * Startup time = (ADC_STARTUP_VALUE + 1) * 8 /ADCClock + */ +#define ADC_STARTUP_MASK 0x001F0000 ///< Start up timer mask. +#define ADC_STARTUP_SHIFT 16 ///< Start up timer shift. + + +/** + * Sample & hold time. + * Sample & hold time = (ADC_SHTIM_VALUE + 1) * 8 /ADCClock + */ +#define ADC_SHTIME_MASK 0x0F000000 ///< Sample & hold time mask. +#define ADC_SHTIME_SHIFT 24 ///< Sample & hold time shift. + + +/** + * ADC channel enable register + */ +#define ADC_CHER_OFF 0x00000010 ///< Channel enable register offeset. +#define ADC_CHER (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF))) ///< Channel enable register address. + +/** + * ADC channel disable register + */ +#define ADC_CHDR_OFF 0x00000014 ///< Channel disable register offeset. +#define ADC_CHDR (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF))) ///< Channel disable register address. + +/** + * ADC channel status register + */ +#define ADC_CHSR_OFF 0x00000018 ///< Channel status register offeset. +#define ADC_CHSR (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF))) ///< Channel status register address. + +#define ADC_CH_MASK 0x000000FF ///< Channel mask. +#define ADC_CH0 0 ///< Channel 0 +#define ADC_CH1 1 ///< Channel 1 +#define ADC_CH2 2 ///< Channel 2 +#define ADC_CH3 3 ///< Channel 3 +#define ADC_CH4 4 ///< Channel 4 +#define ADC_CH5 5 ///< Channel 5 +#define ADC_CH6 6 ///< Channel 6 +#define ADC_CH7 7 ///< Channel 7 + +/** + * ADC status register + */ +#define ADC_SR_OFF 0x0000001C ///< Status register offeset. +#define ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address. + +/** + * ADC Interrupt enable register. + */ +#define ADC_IER_OFF 0x00000024 ///< Interrupt enable register offeset. +#define ADC_IER (*((reg32_t *)(ADC_BASE + ADC_IER_OFF))) ///< Interrupt enable register. + +/** + * ADC Interrupt disable register. + */ +#define ADC_IDR_OFF 0x00000028 ///< Interrupt disable register offeset. +#define ADC_IDR (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF))) ///< Interrupt disable register. + +/** + * ADC Interrupt mask register. + */ +#define ADC_IMR_OFF 0x0000002C ///< Interrupt mask register offeset. +#define ADC_IMR (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF))) ///< Interrupt mask register. + +#define ADC_EOC_MASK 0x000000FF ///< End of converison mask. +#define ADC_EOC0 0 ///< End of conversion channel 0. +#define ADC_EOC1 1 ///< End of conversion channel 1. +#define ADC_EOC2 2 ///< End of conversion channel 2. +#define ADC_EOC3 3 ///< End of conversion channel 3. +#define ADC_EOC4 4 ///< End of conversion channel 4. +#define ADC_EOC5 5 ///< End of conversion channel 5. +#define ADC_EOC6 6 ///< End of conversion channel 6. +#define ADC_EOC7 7 ///< End of conversion channel 7. + +#define ADC_OVRE0 8 ///< Overrun error channel 0. +#define ADC_OVRE1 9 ///< Overrun error channel 1. +#define ADC_OVRE2 10 ///< Overrun error channel 2. +#define ADC_OVRE3 11 ///< Overrun error channel 3. +#define ADC_OVRE4 12 ///< Overrun error channel 4. +#define ADC_OVRE5 13 ///< Overrun error channel 5. +#define ADC_OVRE6 14 ///< Overrun error channel 6. +#define ADC_OVRE7 15 ///< Overrun error channel 7. + +#define ADC_DRDY 16 ///< Data ready. +#define ADC_GOVRE 17 ///< General overrun error. +#define ADC_ENDRX 18 ///< End of RX buffer. +#define ADC_RXBUFF 19 ///< Rx buffer full. + +/** + * ADC last convert data register. + */ +#define ADC_LCDR_OFF 0x00000020 ///< Last converted data register offeset. +#define ADC_LCDR (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF))) ///< Last converted data register. + +/** + * ADC channel data register. + * + * \{ + */ +#define ADC_CDR0_OFF 0x00000030 ///< Channel data register 0 offeset. +#define ADC_CDR1_OFF 0x00000034 ///< Channel data register 1 offeset. +#define ADC_CDR2_OFF 0x00000038 ///< Channel data register 2 offeset. +#define ADC_CDR3_OFF 0x0000003C ///< Channel data register 3 offeset. +#define ADC_CDR4_OFF 0x00000040 ///< Channel data register 4 offeset. +#define ADC_CDR5_OFF 0x00000044 ///< Channel data register 5 offeset. +#define ADC_CDR6_OFF 0x00000048 ///< Channel data register 6 offeset. +#define ADC_CDR7_OFF 0x0000004C ///< Channel data register 7 offeset. + +#define ADC_CDR0 (*((reg32_t *)(ADC_BASE + ADC_CDR0_OFF))) ///< Channel data register 0. +#define ADC_CDR1 (*((reg32_t *)(ADC_BASE + ADC_CDR1_OFF))) ///< Channel data register 1. +#define ADC_CDR2 (*((reg32_t *)(ADC_BASE + ADC_CDR2_OFF))) ///< Channel data register 2. +#define ADC_CDR3 (*((reg32_t *)(ADC_BASE + ADC_CDR3_OFF))) ///< Channel data register 3. +#define ADC_CDR4 (*((reg32_t *)(ADC_BASE + ADC_CDR4_OFF))) ///< Channel data register 4. +#define ADC_CDR5 (*((reg32_t *)(ADC_BASE + ADC_CDR5_OFF))) ///< Channel data register 5. +#define ADC_CDR6 (*((reg32_t *)(ADC_BASE + ADC_CDR6_OFF))) ///< Channel data register 6. +#define ADC_CDR7 (*((reg32_t *)(ADC_BASE + ADC_CDR7_OFF))) ///< Channel data register 7. +/* \} */ + +#endif /* AT91_ADC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_aic.h b/2.5/bertos/cpu/arm/io/at91_aic.h new file mode 100644 index 00000000..8fdd2914 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_aic.h @@ -0,0 +1,223 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 advanced interrupt controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_AIC_H +#define AT91_AIC_H + +#include + + + +/** + * Source mode register array. + */ +#define AIC_SMR(i) (*((reg32_t *)(AIC_BASE + (i) * 4))) + +/** + * Priority mask. + * Priority levels can be between 0 (lowest) and 7 (highest). + */ +#define AIC_PRIOR_MASK 0x00000007 + +/** + * Interrupt source type mask. + * Internal interrupts can level sensitive or edge triggered. + * + * External interrupts can triggered on positive or negative levels or + * on rising or falling edges. + */ +/*\{*/ +#define AIC_SRCTYPE_MASK 0x00000060 + +#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00000000 ///< Internal level sensitive. +#define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x00000020 ///< Internal edge triggered. +#define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00000000 ///< External low level. +#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x00000020 ///< External falling edge. +#define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x00000040 ///< External high level. +#define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x00000060 ///< External rising edge. +/*\}*/ + + +/** + * Type for interrupt handlers. + */ +typedef void (*irq_handler_t)(void); + +/** Interrupt Source Vector Registers */ +/*\{*/ +/** Source vector register array. + * + * Stores the addresses of the corresponding interrupt handlers. + */ +#define AIC_SVR(i) (*((volatile irq_handler_t *)(AIC_BASE + 0x80 + (i) * 4))) +/*\}*/ + +/** Interrupt Vector Register */ +/*\{*/ +#define AIC_IVR_OFF 0x00000100 ///< IRQ vector register offset. +#define AIC_IVR (*((reg32_t *)(AIC_BASE + AIC_IVR_OFF))) ///< IRQ vector register address. +/*\}*/ + +/** Fast Interrupt Vector Register */ +/*\{*/ +#define AIC_FVR_OFF 0x00000104 ///< FIQ vector register offset. +#define AIC_FVR (*((reg32_t *)(AIC_BASE + AIC_FVR_OFF))) ///< FIQ vector register address. +/*\}*/ + +/** Interrupt Status Register */ +/*\{*/ +#define AIC_ISR_OFF 0x00000108 ///< Interrupt status register offset. +#define AIC_ISR (*((reg32_t *)(AIC_BASE + AIC_ISR_OFF))) ///< Interrupt status register address. +#define AIC_IRQID_MASK 0x0000001F ///< Current interrupt identifier mask. +/*\}*/ + +/** Interrupt Pending Register */ +/*\{*/ +#define AIC_IPR_OFF 0x0000010C ///< Interrupt pending register offset. +#define AIC_IPR (*((reg32_t *)(AIC_BASE + AIC_IPR_OFF))) ///< Interrupt pending register address. +/*\}*/ + +/** Interrupt Mask Register */ +/*\{*/ +#define AIC_IMR_OFF 0x00000110 ///< Interrupt mask register offset. +#define AIC_IMR (*((reg32_t *)(AIC_BASE + AIC_IMR_OFF))) ///< Interrupt mask register address. +/*\}*/ + +/** Interrupt Core Status Register */ +/*\{*/ +#define AIC_CISR_OFF 0x00000114 ///< Core interrupt status register offset. +#define AIC_CISR (*((reg32_t *)(AIC_BASE + AIC_CISR_OFF))) ///< Core interrupt status register address. +#define AIC_NFIQ 1 ///< Core FIQ Status +#define AIC_NIRQ 2 ///< Core IRQ Status +/*\}*/ + +/** Interrupt Enable Command Register */ +/*\{*/ +#define AIC_IECR_OFF 0x00000120 ///< Interrupt enable command register offset. +#define AIC_IECR (*((reg32_t *)(AIC_BASE + AIC_IECR_OFF))) ///< Interrupt enable command register address. +/*\}*/ + +/** Interrupt Disable Command Register */ +/*\{*/ +#define AIC_IDCR_OFF 0x00000124 ///< Interrupt disable command register offset. +#define AIC_IDCR (*((reg32_t *)(AIC_BASE + AIC_IDCR_OFF))) ///< Interrupt disable command register address. +/*\}*/ + +/** Interrupt Clear Command Register */ +/*\{*/ +#define AIC_ICCR_OFF 0x00000128 ///< Interrupt clear command register offset. +#define AIC_ICCR (*((reg32_t *)(AIC_BASE + AIC_ICCR_OFF))) ///< Interrupt clear command register address. +/*\}*/ + +/** Interrupt Set Command Register */ +/*\{*/ +#define AIC_ISCR_OFF 0x0000012C ///< Interrupt set command register offset. +#define AIC_ISCR (*((reg32_t *)(AIC_BASE + AIC_ISCR_OFF))) ///< Interrupt set command register address. +/*\}*/ + +/** End Of Interrupt Command Register */ +/*\{*/ +#define AIC_EOICR_OFF 0x00000130 ///< End of interrupt command register offset. +#define AIC_EOICR (*((reg32_t *)(AIC_BASE + AIC_EOICR_OFF))) ///< End of interrupt command register address. +/*\}*/ + +/** Spurious Interrupt Vector Register */ +/*\{*/ +#define AIC_SPU_OFF 0x00000134 ///< Spurious vector register offset. +#define AIC_SPU (*((reg32_t *)(AIC_BASE + AIC_SPU_OFF)== ///< Spurious vector register address. +/*\}*/ + +/** Debug Control Register */ +/*\{*/ +#define AIC_DCR_OFF 0x0000138 ///< Debug control register offset. +#define AIC_DCR (*((reg32_t *)(AIC_BASE + AIC_DCR_OFF))) ///< Debug control register address. +/*\}*/ + +/** Fast Forcing Enable Register */ +/*\{*/ +#define AIC_FFER_OFF 0x00000140 ///< Fast forcing enable register offset. +#define AIC_FFER (*((reg32_t *)(AIC_BASE + AIC_FFER_OFF))) ///< Fast forcing enable register address. +/*\}*/ + +/** Fast Forcing Disable Register */ +/*\{*/ +#define AIC_FFDR_OFF 0x00000144 ///< Fast forcing disable register address. +#define AIC_FFDR (*((reg32_t *)(AIC_BASE + AIC_FFDR_OFF))) ///< Fast forcing disable register address. +/*\}*/ + +/** Fast Forcing Status Register */ +/*\{*/ +#define AIC_FFSR_OFF 0x00000148 ///< Fast forcing status register address. +#define AIC_FFSR (*((reg32_t *)(AIC_BASE + AIC_FFSR_OFF))) ///< Fast forcing status register address. +/*\}*/ + +#endif /* AT91_AIC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_dbgu.h b/2.5/bertos/cpu/arm/io/at91_dbgu.h new file mode 100644 index 00000000..5fa700de --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_dbgu.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 Debug unit. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ +#ifndef AT91_DBGU_H +#define AT91_DBGU_H + +#define DBGU_CR (*((reg32_t *)(DBGU_BASE + US_CR_OFF))) /// + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 Memory controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_MC_H +#define AT91_MC_H + +#define MC_RCR_OFF 0x00000000 ///< MC remap control register offset. +#define MC_RCR (*((reg32_t *)(MC_BASE + MC_RCR_OFF))) ///< MC remap control register address. +#define MC_RCB 0 ///< Remap command. + +#define MC_ASR_OFF 0x00000004 ///< MC abort status register offset. +#define MC_ASR (*((reg32_t *)(MC_BASE + MC_ASR_OFF))) ///< MC abort status register address. +#define MC_UNDADD 0 ///< Undefined Addess Abort status. +#define MC_MISADD 1 ///< Misaligned Addess Abort status. +#define MC_ABTSZ_MASK 0x00000300 ///< Abort size status mask. +#define MC_ABTSZ_BYTE 0x00000000 ///< Byte size abort. +#define MC_ABTSZ_HWORD 0x00000100 ///< Half-word size abort. +#define MC_ABTSZ_WORD 0x00000200 ///< Word size abort. +#define MC_ABTTYP_MASK 0x00000C00 ///< Abort type status mask. +#define MC_ABTTYP_DATAR 0x00000000 ///< Data read abort. +#define MC_ABTTYP_DATAW 0x00000400 ///< Data write abort. +#define MC_ABTTYP_FETCH 0x00000800 ///< Code fetch abort. +#define MC_MST_PDC 0x00020000 ///< PDC abort source. +#define MC_MST_ARM 0x00040000 ///< ARM abort source. +#define MC_SVMST_PDC 0x02000000 ///< Saved PDC abort source. +#define MC_SVMST_ARM 0x04000000 ///< Saved ARM abort source. + +#define MC_AASR_OFF 0x00000008 ///< MC abort address status register offset. +#define MC_AASR (*((reg32_t *)(MC_BASE + MC_AASR_OFF))) ///< MC abort address status register address. + +#define MC_FMR_OFF 0x00000060 ///< MC flash mode register offset. +#define MC_FMR (*((reg32_t *)(MC_BASE + MC_FMR_OFF))) ///< MC flash mode register address. +#define MC_FRDY 0 ///< Flash ready. +#define MC_LOCKE 2 ///< Lock error. +#define MC_PROGE 3 ///< Programming error. +#define MC_NEBP 7 ///< No erase before programming. +#define MC_FWS_MASK 0x00000300 ///< Flash wait state mask. +#define MC_FWS_1R2W 0x00000000 ///< 1 cycle for read, 2 for write operations. +#define MC_FWS_2R3W 0x00000100 ///< 2 cycles for read, 3 for write operations. +#define MC_FWS_3R4W 0x00000200 ///< 3 cycles for read, 4 for write operations. +#define MC_FWS_4R4W 0x00000300 ///< 4 cycles for read and write operations. +#define MC_FMCN_MASK 0x00FF0000 ///< Flash microsecond cycle number mask. +#define MC_FMCN_SHIFT 16 ///< Flash microsecond cycle number shift. + +#define MC_FCR_OFF 0x00000064 ///< MC flash command register offset. +#define MC_FCR (*((reg32_t *)(MC_BASE + MC_FCR_OFF))) ///< MC flash command register address. +#define MC_FCMD_MASK 0x0000000F ///< Flash command mask. +#define MC_FCMD_NOP 0x00000000 ///< No command. +#define MC_FCMD_WP 0x00000001 ///< Write page. +#define MC_FCMD_SLB 0x00000002 ///< Set lock bit. +#define MC_FCMD_WPL 0x00000003 ///< Write page and lock. +#define MC_FCMD_CLB 0x00000004 ///< Clear lock bit. +#define MC_FCMD_EA 0x00000008 ///< Erase all. +#define MC_FCMD_SGPB 0x0000000B ///< Set general purpose NVM bit. +#define MC_FCMD_CGPB 0x0000000D ///< Clear general purpose NVM bit. +#define MC_FCMD_SSB 0x0000000F ///< Set security bit. +#define MC_PAGEN_MASK 0x0003FF00 ///< Page number mask. +#define MC_KEY 0x5A000000 ///< Writing protect key. + +#define MC_FSR_OFF 0x00000068 ///< MC flash status register offset. +#define MC_FSR (*((reg32_t *)(MC_BASE + MC_FSR_OFF))) ///< MC flash status register address. +#define MC_SECURITY 4 ///< Security bit status. + +#define MC_GPNVM0 8 ///< General purpose NVM bit 0. +#define MC_GPNVM1 9 ///< General purpose NVM bit 1. +#define MC_GPNVM2 10 ///< General purpose NVM bit 2. + +#define MC_LOCKS0 16 ///< Lock region 0 lock status. +#define MC_LOCKS1 17 ///< Lock region 1 lock status. +#define MC_LOCKS2 18 ///< Lock region 2 lock status. +#define MC_LOCKS3 19 ///< Lock region 3 lock status. +#define MC_LOCKS4 20 ///< Lock region 4 lock status. +#define MC_LOCKS5 21 ///< Lock region 5 lock status. +#define MC_LOCKS6 22 ///< Lock region 6 lock status. +#define MC_LOCKS7 23 ///< Lock region 7 lock status. +#define MC_LOCKS8 24 ///< Lock region 8 lock status. +#define MC_LOCKS9 25 ///< Lock region 9 lock status. +#define MC_LOCKS10 26 ///< Lock region 10 lock status. +#define MC_LOCKS11 27 ///< Lock region 11 lock status. +#define MC_LOCKS12 28 ///< Lock region 12 lock status. +#define MC_LOCKS13 29 ///< Lock region 13 lock status. +#define MC_LOCKS14 30 ///< Lock region 14 lock status. +#define MC_LOCKS15 31 ///< Lock region 15 lock status. + +#endif /* AT91_MC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_pio.h b/2.5/bertos/cpu/arm/io/at91_pio.h new file mode 100644 index 00000000..3aa47565 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_pio.h @@ -0,0 +1,297 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 Parallel input/output controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_PIO_H +#define AT91_PIO_H + +/** PIO Register Offsets */ +/*\{*/ +#define PIO_PER_OFF 0x00000000 ///< PIO enable register offset. +#define PIO_PDR_OFF 0x00000004 ///< PIO disable register offset. +#define PIO_PSR_OFF 0x00000008 ///< PIO status register offset. +#define PIO_OER_OFF 0x00000010 ///< Output enable register offset. +#define PIO_ODR_OFF 0x00000014 ///< Output disable register offset. +#define PIO_OSR_OFF 0x00000018 ///< Output status register offset. +#define PIO_IFER_OFF 0x00000020 ///< Input filter enable register offset. +#define PIO_IFDR_OFF 0x00000024 ///< Input filter disable register offset. +#define PIO_IFSR_OFF 0x00000028 ///< Input filter status register offset. +#define PIO_SODR_OFF 0x00000030 ///< Set output data register offset. +#define PIO_CODR_OFF 0x00000034 ///< Clear output data register offset. +#define PIO_ODSR_OFF 0x00000038 ///< Output data status register offset. +#define PIO_PDSR_OFF 0x0000003C ///< Pin data status register offset. +#define PIO_IER_OFF 0x00000040 ///< Interrupt enable register offset. +#define PIO_IDR_OFF 0x00000044 ///< Interrupt disable register offset. +#define PIO_IMR_OFF 0x00000048 ///< Interrupt mask register offset. +#define PIO_ISR_OFF 0x0000004C ///< Interrupt status register offset. +#if PIO_HAS_MULTIDRIVER +#define PIO_MDER_OFF 0x00000050 ///< Multi-driver enable register offset. +#define PIO_MDDR_OFF 0x00000054 ///< Multi-driver disable register offset. +#define PIO_MDSR_OFF 0x00000058 ///< Multi-driver status register offset. +#endif /* PIO_HAS_MULTIDRIVER */ +#if PIO_HAS_PULLUP +#define PIO_PUDR_OFF 0x00000060 ///< Pull-up disable register offset. +#define PIO_PUER_OFF 0x00000064 ///< Pull-up enable register offset. +#define PIO_PUSR_OFF 0x00000068 ///< Pull-up status register offset. +#endif /* PIO_HAS_PULLUP */ +#if PIO_HAS_PERIPHERALSELECT +#define PIO_ASR_OFF 0x00000070 ///< PIO peripheral A select register offset. +#define PIO_BSR_OFF 0x00000074 ///< PIO peripheral B select register offset. +#define PIO_ABSR_OFF 0x00000078 ///< PIO peripheral AB status register offset. +#endif /* PIO_HAS_PERIPHERALSELECT */ +#if PIO_HAS_OUTPUTWRITEENABLE +#define PIO_OWER_OFF 0x000000A0 ///< PIO output write enable register offset. +#define PIO_OWDR_OFF 0x000000A4 ///< PIO output write disable register offset. +#define PIO_OWSR_OFF 0x000000A8 ///< PIO output write status register offset. +#endif /* PIO_HAS_OUTPUTWRITEENABLE */ +/*\}*/ + +/** Single PIO Register Addresses */ +/*\{*/ +#if defined(PIO_BASE) + #define PIO_ACCESS(offset) (*((reg32_t *)(PIO_BASE + (offset)))) + + #define PIO_PER PIO_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIO_PDR PIO_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIO_PSR PIO_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIO_OER PIO_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIO_ODR PIO_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIO_OSR PIO_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIO_IFER PIO_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIO_IFDR PIO_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIO_IFSR PIO_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIO_SODR PIO_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIO_CODR PIO_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIO_ODSR PIO_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIO_PDSR PIO_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIO_IER PIO_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIO_IDR PIO_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIO_IMR PIO_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIO_ISR PIO_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIO_MDER PIO_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIO_MDDR PIO_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIO_MDSR PIO_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIO_PUDR PIO_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIO_PUER PIO_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIO_PUSR PIO_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIO_ASR PIO_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIO_BSR PIO_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIO_ABSR PIO_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIO_OWER PIO_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIO_OWDR PIO_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIO_OWSR PIO_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIO_BASE */ +/*\}*/ + +/** PIO A Register Addresses */ +/*\{*/ +#if defined(PIOA_BASE) + #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset)))) + + #define PIOA_PER PIOA_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOA_PDR PIOA_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOA_PSR PIOA_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOA_OER PIOA_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOA_ODR PIOA_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOA_OSR PIOA_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOA_IFER PIOA_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOA_IFDR PIOA_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOA_IFSR PIOA_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOA_SODR PIOA_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOA_CODR PIOA_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOA_ODSR PIOA_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOA_PDSR PIOA_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOA_IER PIOA_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOA_IDR PIOA_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOA_IMR PIOA_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOA_ISR PIOA_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIOA_MDER PIOA_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOA_MDDR PIOA_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOA_MDSR PIOA_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIOA_PUDR PIOA_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOA_PUER PIOA_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOA_PUSR PIOA_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIOA_ASR PIOA_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIOA_BSR PIOA_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIOA_ABSR PIOA_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIOA_OWER PIOA_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOA_OWDR PIOA_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOA_OWSR PIOA_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIOA_BASE */ +/*\}*/ + +/** PIO B Register Addresses */ +/*\{*/ +#if defined(PIOB_BASE) + #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset)))) + + #define PIOB_PER PIOB_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOB_PDR PIOB_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOB_PSR PIOB_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOB_OER PIOB_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOB_ODR PIOB_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOB_OSR PIOB_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOB_IFER PIOB_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOB_IFDR PIOB_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOB_IFSR PIOB_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOB_SODR PIOB_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOB_CODR PIOB_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOB_ODSR PIOB_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOB_PDSR PIOB_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOB_IER PIOB_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOB_IDR PIOB_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOB_IMR PIOB_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOB_ISR PIOB_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIOB_MDER PIOB_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOB_MDDR PIOB_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOB_MDSR PIOB_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIOB_PUDR PIOB_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOB_PUER PIOB_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOB_PUSR PIOB_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIOB_ASR PIOB_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIOB_BSR PIOB_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIOB_ABSR PIOB_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIOB_OWER PIOB_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOB_OWDR PIOB_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOB_OWSR PIOB_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIOB_BASE */ +/*\}*/ + +/** PIO C Register Addresses */ +/*\{*/ +#if defined(PIOC_BASE) + #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset)))) + + #define PIOC_PER PIOC_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOC_PDR PIOC_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOC_PSR PIOC_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOC_OER PIOC_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOC_ODR PIOC_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOC_OSR PIOC_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOC_IFER PIOC_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOC_IFDR PIOC_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOC_IFSR PIOC_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOC_SODR PIOC_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOC_CODR PIOC_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOC_ODSR PIOC_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOC_PDSR PIOC_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOC_IER PIOC_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOC_IDR PIOC_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOC_IMR PIOC_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOC_ISR PIOC_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIOC_MDER PIOC_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOC_MDDR PIOC_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOC_MDSR PIOC_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIOC_PUDR PIOC_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOC_PUER PIOC_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOC_PUSR PIOC_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIOC_ASR PIOC_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIOC_BSR PIOC_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIOC_ABSR PIOC_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIOC_OWER PIOC_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOC_OWDR PIOC_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOC_OWSR PIOC_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIOC_BASE */ +/*\}*/ + +#endif /* AT91_PIO_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_pit.h b/2.5/bertos/cpu/arm/io/at91_pit.h new file mode 100644 index 00000000..9bfc3f98 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_pit.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 periodic interval timer. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_PIT_H +#define AT91_PIT_H + +#include +/** + *Periodic Inverval Timer Mode Register + *\{ + */ +#define PIT_MR_OFF 0x00000000 ///< Mode register offset. +#define PIT_MR (*((reg32_t *)(PIT_BASE + PIT_MR_OFF))) ///< Mode register address. + +#define PIV_MASK 0x000FFFFF ///< Periodic interval value mask. +#define PIV_SHIFT 0 ///< Periodic interval value shift. +#define PITEN 24 ///< Periodic interval timer enable. +#define PITIEN 25 ///< Periodic interval timer interrupt enable. +/*\}*/ + +/** + * Periodic Inverval Timer Status Register + *\{ + */ +#define PIT_SR_OFF 0x00000004 ///< Status register offset. +#define PIT_SR (*((reg32_t *)(PIT_BASE + PIT_SR_OFF))) ///< Status register address. + +#define PITS 0 ///< Timer has reached PIV. +/*\}*/ + +/** + * Periodic Inverval Timer Value and Image Registers + *\{ + */ +#define PIVR_OFF 0x00000008 ///< Value register offset. +#define PIVR (*((reg32_t *)(PIT_BASE + PIVR_OFF))) ///< Value register address. + +#define PIIR_OFF 0x0000000C ///< Image register offset. +#define PIIR (*((reg32_t *)(PIT_BASE + PIIR_OFF))) ///< Image register address. +#define CPIV_MASK 0x000FFFFF ///< Current periodic interval value mask. +#define CPIV_SHIFT 0 ///< Current periodic interval value SHIFT. +#define PICNT_MASK 0xFFF00000 ///< Periodic interval counter mask. +#define PICNT_SHIFT 20 ///< Periodic interval counter LSB. +/*\}*/ + +#endif /* AT91_PIT_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_pmc.h b/2.5/bertos/cpu/arm/io/at91_pmc.h new file mode 100644 index 00000000..b7d5b4f5 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_pmc.h @@ -0,0 +1,195 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 power management controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_PMC_H +#define AT91_PMC_H + +/** System Clock Enable, Disable and Status Register */ +/*\{*/ +#define PMC_SCER_OFF 0x00000000 ///< System clock enable register offset. +#define PMC_SCER (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF))) ///< System clock enable register address. +#define PMC_SCDR_OFF 0x00000004 ///< System clock disable register offset. +#define PMC_SCDR (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF))) ///< System clock disable register address. +#define PMC_SCSR_OFF 0x00000008 ///< System clock status register offset. +#define PMC_SCSR (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF))) ///< System clock status register address. + +#define PMC_PCK 0 ///< Processor clock. +#define PMC_UDP 7 ///< USB device port clock. +#define PMC_PCK0 8 ///< Programmable clock 0 output. +#define PMC_PCK1 9 ///< Programmable clock 1 output. +#define PMC_PCK2 10 ///< Programmable clock 2 output. +/*\}*/ + +/** Peripheral Clock Enable, Disable and Status Register */ +/*\{*/ +#define PMC_PCER_OFF 0x00000010 ///< Peripheral clock enable register offset. +#define PMC_PCER (*((reg32_t *)(PMC_BASE + PMC_PCER_OFF))) ///< Peripheral clock enable register address. +#define PMC_PCDR_OFF 0x00000014 ///< Peripheral clock disable register offset. +#define PMC_PCDR (*((reg32_t *)(PMC_BASE + PMC_PCDR_OFF))) ///< Peripheral clock disable register address. +#define PMC_PCSR_OFF 0x00000018 ///< Peripheral clock status register offset. +#define PMC_PCSR (*((reg32_t *)(PMC_BASE + PMC_PCSR_OFF))) ///< Peripheral clock status register address. +/*\}*/ + +/** Clock Generator Main Oscillator Register */ +/*\{*/ +#define CKGR_MOR_OFF 0x00000020 ///< Main oscillator register offset. +#define CKGR_MOR (*((reg32_t *)(PMC_BASE + CKGR_MOR_OFF))) ///< Main oscillator register address. + +#define CKGR_MOSCEN 0 ///< Main oscillator enable. +#define CKGR_OSCBYPASS 1 ///< Main oscillator bypass. +#define CKGR_OSCOUNT_MASK 0x0000FF00 ///< Main oscillator start-up time mask. +#define CKGR_OSCOUNT_SHIFT 8 ///< Main oscillator start-up time LSB. +/*\}*/ + +/** Clock Generator Main Clock Frequency Register */ +/*\{*/ +#define CKGR_MCFR_OFF 0x00000024 ///< Main clock frequency register offset. +#define CKGR_MCFR (*((reg32_t *)(PMC_BASE + CKGR_MCFR_OFF))) ///< Main clock frequency register address. + +#define CKGR_MAINF_MASK 0x0000FFFF ///< Main clock frequency mask mask. +#define CKGR_MAINRDY 16 ///< Main clock ready. +/*\}*/ + +/** PLL Registers */ +/*\{*/ +#define CKGR_PLLR_OFF 0x0000002C ///< Clock generator PLL register offset. +#define CKGR_PLLR (*((reg32_t *)(PMC_BASE + CKGR_PLLR_OFF))) ///< Clock generator PLL register address. + +#define CKGR_DIV_MASK 0x000000FF ///< Divider. +#define CKGR_DIV_SHIFT 0 ///< Least significant bit of the divider. +#define CKGR_DIV_0 0x00000000 ///< Divider output is 0. +#define CKGR_DIV_BYPASS 0x00000001 ///< Divider is bypassed. +#define CKGR_PLLCOUNT_MASK 0x00003F00 ///< PLL counter mask. +#define CKGR_PLLCOUNT_SHIFT 8 ///< PLL counter LSB. + +#define CKGR_OUT_MASK 0x0000C000 ///< PLL output frequency range. +#define CKGR_OUT_0 0x00000000 ///< Please refer to the PLL datasheet. +#define CKGR_OUT_1 0x00004000 ///< Please refer to the PLL datasheet. +#define CKGR_OUT_2 0x00008000 ///< Please refer to the PLL datasheet. +#define CKGR_OUT_3 0x0000C000 ///< Please refer to the PLL datasheet. +#define CKGR_MUL_MASK 0x07FF0000 ///< PLL multiplier. +#define CKGR_MUL_SHIFT 16 ///< Least significant bit of the PLL multiplier. + +#define CKGR_USBDIV_MASK 0x30000000 ///< Divider for USB clocks. +#define CKGR_USBDIV_1 0x00000000 ///< Divider output is PLL clock output. +#define CKGR_USBDIV_2 0x10000000 ///< Divider output is PLL clock output divided by 2. +#define CKGR_USBDIV_4 0x20000000 ///< Divider output is PLL clock output divided by 4. +/*\}*/ + +/** Master Clock Register */ +/*\{*/ +#define PMC_MCKR_OFF 0x00000030 ///< Master clock register offset. +#define PMC_MCKR (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF))) ///< Master clock register address. + +#define PMC_PCKR0_OFF 0x00000040 ///< Programmable clock 0 register offset. +#define PMC_PCKR0 (*((reg32_t *)(PMC_BASE + PMC_PCKR0_OFF))) ///< Programmable clock 0 register address. +#define PMC_PCKR1_OFF 0x00000044 ///< Programmable clock 1 register offset. +#define PMC_PCKR1 (*((reg32_t *)(PMC_BASE + PMC_PCKR1_OFF))) ///< Programmable clock 1 register address. +#define PMC_PCKR2_OFF 0x00000048 ///< Programmable clock 2 register offset. +#define PMC_PCKR2 (*((reg32_t *)(PMC_BASE + PMC_PCKR2_OFF))) ///< Programmable clock 2 register address. + +#define PMC_CSS_MASK 0x00000003 ///< Clock selection mask. +#define PMC_CSS_SLOW_CLK 0x00000000 ///< Slow clock selected. +#define PMC_CSS_MAIN_CLK 0x00000001 ///< Main clock selected. +#define PMC_CSS_PLL_CLK 0x00000003 ///< PLL clock selected. + +#define PMC_PRES_MASK 0x0000001C ///< Clock prescaler mask. +#define PMC_PRES_SHIFT 2 ///< Clock prescaler LSB. +#define PMC_PRES_CLK 0x00000000 ///< Selected clock, not divided. +#define PMC_PRES_CLK_2 0x00000004 ///< Selected clock divided by 2. +#define PMC_PRES_CLK_4 0x00000008 ///< Selected clock divided by 4. +#define PMC_PRES_CLK_8 0x0000000C ///< Selected clock divided by 8. +#define PMC_PRES_CLK_16 0x00000010 ///< Selected clock divided by 16. +#define PMC_PRES_CLK_32 0x00000014 ///< Selected clock divided by 32. +#define PMC_PRES_CLK_64 0x00000018 ///< Selected clock divided by 64. +/*\}*/ + +/** Power Management Status and Interrupt Registers */ +/*\{*/ +#define PMC_IER_OFF 0x00000060 ///< Interrupt enable register offset. +#define PMC_IER (*((reg32_t *)(PMC_BASE + PMC_IER_OFF))) ///< Interrupt enable register address. +#define PMC_IDR_OFF 0x00000064 ///< Interrupt disable register offset. +#define PMC_IDR (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF))) ///< Interrupt disable register address. +#define PMC_SR_OFF 0x00000068 ///< Status register offset. +#define PMC_SR (*((reg32_t *)(PMC_BASE + PMC_SR_OFF))) ///< Status register address. +#define PMC_IMR_OFF 0x0000006C ///< Interrupt mask register offset. +#define PMC_IMR (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF))) ///< Interrupt mask register address. + +#define PMC_MOSCS 0 ///< Main oscillator. +#define PMC_LOCK 2 ///< PLL lock. +#define PMC_MCKRDY 3 ///< Master clock ready. +#define PMC_PCKRDY0 8 ///< Programmable clock 0 ready. +#define PMC_PCKRDY1 9 ///< Programmable clock 1 ready. +#define PMC_PCKRDY2 10 ///< Programmable clock 2 ready. +/*\}*/ + +#endif /* AT91_PMC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_pwm.h b/2.5/bertos/cpu/arm/io/at91_pwm.h new file mode 100644 index 00000000..f6502f13 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_pwm.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91SAM7 Pulse Width Modulation Controller. + */ + +#ifndef AT91_PWM_H +#define AT91_PWM_H + +/** + * PWM Mode Register. + */ +/*\{*/ +#define PWM_MR_OFF 0x00000000 ///< PWM Mode Register offset. +#define PWM_MR (*((reg32_t *)(PWMC_BASE + PWM_MR_OFF))) ///< PWM Mode Register. +#define PWM_MR_DIVA_MASK 0x000000FF ///< PWM Mode Divide factor A Mask. +#define PWM_MR_DIVA_SHIFT 0 ///< PWM Mode Divide factor A LSB. +#define PWM_MR_DIVB_MASK 0x00FF0000 ///< PWM Mode Divide factor B Mask. +#define PWM_MR_DIVB_SHIFT 16 ///< PWM Mode Divide factor B LSB. + +#define PWM_MR_PREA_MASK 0x00000F00 ///< PWM Mode prescaler A Mask. +#define PWM_MR_PREA_SHIFT 8 ///< PWM Mode prescaler A LSB. +#define PWM_MR_PREB_MASK 0x0F000000 ///< PWM Mode prescaler B Mask. +#define PWM_MR_PREB_SHIFT 24 ///< PWM Mode prescaler B LSB. + +#define PWM_MR_PRE_MCK 0 ///< PWM Mode prescaler set to MCK. +#define PWM_MR_PRE_MCK_DIV2 1 ///< PWM Mode prescaler set to MCK/2. +#define PWM_MR_PRE_MCK_DIV4 2 ///< PWM Mode prescaler set to MCK/4. +#define PWM_MR_PRE_MCK_DIV8 3 ///< PWM Mode prescaler set to MCK/8. +#define PWM_MR_PRE_MCK_DIV16 4 ///< PWM Mode prescaler set to MCK/16. +#define PWM_MR_PRE_MCK_DIV32 5 ///< PWM Mode prescaler set to MCK/32. +#define PWM_MR_PRE_MCK_DIV64 6 ///< PWM Mode prescaler set to MCK/64. +#define PWM_MR_PRE_MCK_DIV128 7 ///< PWM Mode prescaler set to MCK/128. +#define PWM_MR_PRE_MCK_DIV256 8 ///< PWM Mode prescaler set to MCK/256. +#define PWM_MR_PRE_MCK_DIV512 9 ///< PWM Mode prescaler set to MCK/512. +#define PWM_MR_PRE_MCK_DIV1024 10 ///< PWM Mode prescaler set to MCK/1024. +/*\}*/ + +/** + * PWM Channel IDs. + */ +/*\{*/ +#define PWM_CHID_MASK 0x0000000F +#define PWM_CHID0 0 +#define PWM_CHID1 1 +#define PWM_CHID2 2 +#define PWM_CHID3 3 +/*\}*/ + +/** + * PWM Enable Register. + */ +/*\{*/ +#define PWM_ENA_OFF 0x00000004 ///< PWM Enable Register offset. +#define PWM_ENA (*((reg32_t *)(PWMC_BASE + PWM_ENA_OFF))) ///< PWM Enable Register. +/*\}*/ + +/** + * PWM Disable Register. + */ +/*\{*/ +#define PWM_DIS_OFF 0x00000008 ///< PWM Disable Register offset. +#define PWM_DIS (*((reg32_t *)(PWMC_BASE + PWM_DIS_OFF))) ///< PWM Disable Register. +/*\}*/ + +/** + * PWM Status Register. + */ +/*\{*/ +#define PWM_SR_OFF 0x0000000C ///< PWM Status Register offset. +#define PWM_SR (*((reg32_t *)(PWMC_BASE + PWM_SR_OFF))) ///< PWM Status Register. +/*\}*/ + +/** + * PWM Interrupt Enable Register. + */ +/*\{*/ +#define PWM_IER_OFF 0x00000010 ///< PWM Interrupt Enable Register offset. +#define PWM_IER (*((reg32_t *)(PWMC_BASE + PWM_IER_OFF))) ///< PWM Interrupt Enable Register. +/*\}*/ + +/** + * PWM Interrupt Disable Register. + */ +/*\{*/ +#define PWM_IDR_OFF 0x00000014 ///< PWM Interrupt Disable Register offset. +#define PWM_IDR (*((reg32_t *)(PWMC_BASE + PWM_IDR_OFF))) ///< PWM Interrupt Disable Register. +/*\}*/ + +/** + * PWM Interrupt Mask Register. + */ +/*\{*/ +#define PWM_IMR_OFF 0x00000018 ///< PWM Interrupt Mask Register offset. +#define PWM_IMR (*((reg32_t *)(PWMC_BASE + PWM_IMR_OFF))) ///< PWM Interrupt Mask Register. +/*\}*/ + +/** + * PWM Interrupt Status Register. + */ +/*\{*/ +#define PWM_ISR_OFF 0x0000001C ///< PWM Interrupt Status Register offset. +#define PWM_ISR (*((reg32_t *)(PWMC_BASE + PWM_ISR_OFF))) ///< PWM Interrupt Status Register. +/*\}*/ + +#define PWM_CH0_OFF 0x00000200 ///< PWM Channel 0 registers offset. +#define PWM_CH1_OFF 0x00000220 ///< PWM Channel 1 registers offset. +#define PWM_CH2_OFF 0x00000240 ///< PWM Channel 2 registers offset. +#define PWM_CH3_OFF 0x00000260 ///< PWM Channel 3 registers offset. + +/** + * PWM Channel Mode Register. + */ +/*\{*/ +#define PWM_CMR_OFF 0x00000000 ///< PWM Channel Mode Register offset. +#define PWM_CMR0 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Mode Register. +#define PWM_CMR1 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Mode Register. +#define PWM_CMR2 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Mode Register. +#define PWM_CMR3 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Mode Register. + +#define PWM_CPRE_MCK_MASK 0x0000000F ///< PWM Mode prescaler mask. +#define PWM_CPRE_MCK 0 ///< PWM Mode prescaler set to MCK. +#define PWM_CPRE_MCK_DIV2 1 ///< PWM Mode prescaler set to MCK/2. +#define PWM_CPRE_MCK_DIV4 2 ///< PWM Mode prescaler set to MCK/4. +#define PWM_CPRE_MCK_DIV8 3 ///< PWM Mode prescaler set to MCK/8. +#define PWM_CPRE_MCK_DIV16 4 ///< PWM Mode prescaler set to MCK/16. +#define PWM_CPRE_MCK_DIV32 5 ///< PWM Mode prescaler set to MCK/32. +#define PWM_CPRE_MCK_DIV64 6 ///< PWM Mode prescaler set to MCK/64. +#define PWM_CPRE_MCK_DIV128 7 ///< PWM Mode prescaler set to MCK/128. +#define PWM_CPRE_MCK_DIV256 8 ///< PWM Mode prescaler set to MCK/256. +#define PWM_CPRE_MCK_DIV512 9 ///< PWM Mode prescaler set to MCK/512. +#define PWM_CPRE_MCK_DIV1024 10 ///< PWM Mode prescaler set to MCK/1024. +#define PWM_CPRE_CLKA 11 ///< PWM Mode prescaler set to CLKA. +#define PWM_CPRE_CLKB 12 ///< PWM Mode prescaler set to CLKB. + +#define PWM_CALG 8 ///< PWM Mode channel alignment. +#define PWM_CPOL 9 ///< PWM Mode channel polarity. +#define PWM_CPD 10 ///< PWM Mode channel update period. +/*\}*/ + + +/** + * PWM Channel Duty Cycle Register. + */ +/*\{*/ +#define PWM_CDTY_OFF 0x00000004 ///< PWM Channel Duty Cycle Register offset. +#define PWM_CDTY0 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Duty Cycle Register. +#define PWM_CDTY1 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Duty Cycle Register. +#define PWM_CDTY2 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Duty Cycle Register. +#define PWM_CDTY3 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Duty Cycle Register. +/*\}*/ + + +/** + * PWM Channel Period Register. + */ +/*\{*/ +#define PWM_CPRD_OFF 0x00000008 ///< PWM Channel Period Register offset. +#define PWM_CPRD0 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Period Register. +#define PWM_CPRD1 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Period Register. +#define PWM_CPRD2 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Period Register. +#define PWM_CPRD3 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Period Register. +/*\}*/ + + +/** + * PWM Channel Counter Register. + */ +/*\{*/ +#define PWM_CCNT_OFF 0x0000000C ///< PWM Channel Counter Register offset. +#define PWM_CCNT0 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Counter Register. +#define PWM_CCNT1 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Counter Register. +#define PWM_CCNT2 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Counter Register. +#define PWM_CCNT3 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Counter Register. +/*\}*/ + + +/** + * PWM Channel Update Register. + */ +/*\{*/ +#define PWM_CUPD_OFF 0x00000010 ///< PWM Channel Update Register offset. +#define PWM_CUPD0 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Update Register. +#define PWM_CUPD1 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Update Register. +#define PWM_CUPD2 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Update Register. +#define PWM_CUPD3 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Update Register. +/*\}*/ + +#endif /* AT91_PWM_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_rstc.h b/2.5/bertos/cpu/arm/io/at91_rstc.h new file mode 100644 index 00000000..96be7c34 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_rstc.h @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 reset controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_RTSC_H +#define AT91_RTSC_H + +/** Reset Controller Control Register */ +/*\{*/ +#define RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00))) ///< Reset controller control register address. +#define RSTC_PROCRST 0 ///< Processor reset. +#define RSTC_PERRST 2 ///< Peripheral reset. +#define RSTC_EXTRST 3 ///< External reset. +#define RSTC_KEY 0xA5000000 ///< Password. +/*\}*/ + +/** Reset Controller Status Register */ +/*\{*/ +#define RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04))) ///< Reset controller status register address. +#define RSTC_URSTS 0 ///< User reset status. +#define RSTC_BODSTS 1 ///< Brownout detection status. +#define RSTC_RSTTYP_MASK 0x00000700 ///< Reset type. +#define RSTC_RSTTYP_POWERUP 0x00000000 ///< Power-up reset. +//#define RSTC_RSTTYP_WAKEUP 0x00000100 ///< VDDCORE rising. +#define RSTC_RSTTYP_WATCHDOG 0x00000200 ///< Watchdog reset. +#define RSTC_RSTTYP_SOFTWARE 0x00000300 ///< Software reset. +#define RSTC_RSTTYP_USER 0x00000400 ///< User reset. +#define RSTC_RSTTYP_BROWNOUT 0x00000500 ///< Brownout reset. +#define RSTC_NRSTL 16 ///< NRST pin level. +#define RSTC_SRCMP 17 ///< Software reset command in progress. +/*\}*/ + +/** Reset Controller Mode Register */ +/*\{*/ +#define RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08))) ///< Reset controller mode register address. +#define RSTC_URSTEN 0 ///< User reset enable. +#define RSTC_URSTIEN 4 ///< User reset interrupt enable. +#define RSTC_ERSTL_MASK 0x00000F00 ///< External reset length. +#define RSTC_ERSTL_SHIFT 8 ///< Least significant bit of external reset length. +#define RSTC_BODIEN 16 ///< Brown-out detection interrupt enable. +/*\}*/ + + +#endif /* AT91_RTSC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_spi.h b/2.5/bertos/cpu/arm/io/at91_spi.h new file mode 100644 index 00000000..fd6bb746 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_spi.h @@ -0,0 +1,282 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91SAM7 SPI register definitions. + * This file is based on NUT/OS implementation. See license below. + + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + + */ + +#ifndef AT91_SPI_H +#define AT91_SPI_H + +/** + * SPI Control Register + */ +/*\{*/ +#define SPI_CR_OFF 0x00000000 ///< Control register offset. + +#define SPI_SPIEN 0 ///< SPI enable. +#define SPI_SPIDIS 1 ///< SPI disable. +#define SPI_SWRST 7 ///< Software reset. +#define SPI_LASTXFER 24 ///< Last transfer. +/*\}*/ + +/** + * SPI Mode Register + */ +/*\{*/ +#define SPI_MR_OFF 0x00000004 ///< Mode register offset. + +#define SPI_MSTR 0 ///< Master mode. +#define SPI_PS 1 ///< Peripheral select. +#define SPI_PCSDEC 2 ///< Chip select decode. +#define SPI_FDIV 3 ///< Clock selection. +#define SPI_MODFDIS 4 ///< Mode fault detection. +#define SPI_LLB 7 ///< Local loopback enable. +#define SPI_PCS 0x000F0000 ///< Peripheral chip select mask. +#define SPI_PCS_0 0x000E0000 ///< Peripheral chip select 0. +#define SPI_PCS_1 0x000D0000 ///< Peripheral chip select 1. +#define SPI_PCS_2 0x000B0000 ///< Peripheral chip select 2. +#define SPI_PCS_3 0x00070000 ///< Peripheral chip select 3. +#define SPI_PCS_SHIFT 16 ///< Least significant bit of peripheral chip select. +#define SPI_DLYBCS 0xFF000000 ///< Mask for delay between chip selects. +#define SPI_DLYBCS_SHIFT 24 ///< Least significant bit of delay between chip selects. +/*\}*/ + +/** + * SPI Receive Data Register + */ +/*\{*/ +#define SPI_RDR_OFF 0x00000008 ///< Receive data register offset. + +#define SPI_RD 0x0000FFFF ///< Receive data mask. +#define SPI_RD_SHIFT 0 ///< Least significant bit of receive data. +/*\}*/ + +/** + * SPI Transmit Data Register + */ +/*\{*/ +#define SPI_TDR_OFF 0x0000000C ///< Transmit data register offset. + +#define SPI_TD 0x0000FFFF ///< Transmit data mask. +#define SPI_TD_SHIFT 0 ///< Least significant bit of transmit data. +/*\}*/ + +/** + * SPI Status and Interrupt Register + */ +/*\{*/ +#define SPI_SR_OFF 0x00000010 ///< Status register offset. +#define SPI_IER_OFF 0x00000014 ///< Interrupt enable register offset. +#define SPI_IDR_OFF 0x00000018 ///< Interrupt disable register offset. +#define SPI_IMR_OFF 0x0000001C ///< Interrupt mask register offset. + +#define SPI_RDRF 0 ///< Receive data register full. +#define SPI_TDRE 1 ///< Transmit data register empty. +#define SPI_MODF 2 ///< Mode fault error. +#define SPI_OVRES 3 ///< Overrun error status. +#define SPI_ENDRX 4 ///< End of RX buffer. +#define SPI_ENDTX 5 ///< End of TX buffer. +#define SPI_RXBUFF 6 ///< RX buffer full. +#define SPI_TXBUFE 7 ///< TX buffer empty. +#define SPI_NSSR 8 ///< NSS rising. +#define SPI_TXEMPTY 9 ///< Transmission register empty. +#define SPI_SPIENS 16 ///< SPI enable status. +/*\}*/ + +/** + * SPI Chip Select Registers + */ +/*\{*/ +#define SPI_CSR0_OFF 0x00000030 ///< Chip select register 0 offset. +#define SPI_CSR1_OFF 0x00000034 ///< Chip select register 1 offset. +#define SPI_CSR2_OFF 0x00000038 ///< Chip select register 2 offset. +#define SPI_CSR3_OFF 0x0000003C ///< Chip select register 3 offset. + +#define SPI_CPOL 0 ///< Clock polarity. +#define SPI_NCPHA 1 ///< Clock phase. +#define SPI_CSAAT 3 ///< Chip select active after transfer. +#define SPI_BITS 0x000000F0 ///< Bits per transfer mask. +#define SPI_BITS_8 0x00000000 ///< 8 bits per transfer. +#define SPI_BITS_9 0x00000010 ///< 9 bits per transfer. +#define SPI_BITS_10 0x00000020 ///< 10 bits per transfer. +#define SPI_BITS_11 0x00000030 ///< 11 bits per transfer. +#define SPI_BITS_12 0x00000040 ///< 12 bits per transfer. +#define SPI_BITS_13 0x00000050 ///< 13 bits per transfer. +#define SPI_BITS_14 0x00000060 ///< 14 bits per transfer. +#define SPI_BITS_15 0x00000070 ///< 15 bits per transfer. +#define SPI_BITS_16 0x00000080 ///< 16 bits per transfer. +#define SPI_BITS_SHIFT 4 ///< Least significant bit of bits per transfer. +#define SPI_SCBR 0x0000FF00 ///< Serial clock baud rate mask. +#define SPI_SCBR_SHIFT 8 ///< Least significant bit of serial clock baud rate. +#define SPI_DLYBS 0x00FF0000 ///< Delay before SPCK mask. +#define SPI_DLYBS_SHIFT 16 ///< Least significant bit of delay before SPCK. +#define SPI_DLYBCT 0xFF000000 ///< Delay between consecutive transfers mask. +#define SPI_DLYBCT_SHIFT 24 ///< Least significant bit of delay between consecutive transfers. +/*\}*/ + +/** + * Single SPI Register Addresses + */ +/*\{*/ +#if defined(SPI_BASE) + #define SPI0_BASE SPI_BASE + #define SPI_CR SPI0_CR ///< SPI Control Register Write-only. + #define SPI_MR SPI0_MR ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI_RDR SPI0_RDR ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI_TDR SPI0_TDR ///< SPI Transmit Data Register Write-only . + #define SPI_SR SPI0_SR ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI_IER SPI0_IER ///< SPI Interrupt Enable Register Write-only. + #define SPI_IDR SPI0_IDR ///< SPI Interrupt Disable Register Write-only. + #define SPI_IMR SPI0_IMR ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI_CSR0 SPI0_CSR0 ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI_CSR1 SPI0_CSR1 ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI_CSR2 SPI0_CSR2 ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI_CSR3 SPI0_CSR3 ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI_RPR SPI0_RPR ///< PDC channel 0 receive pointer register. + #define SPI_RCR SPI0_RCR ///< PDC channel 0 receive counter register. + #define SPI_TPR SPI0_TPR ///< PDC channel 0 transmit pointer register. + #define SPI_TCR SPI0_TCR ///< PDC channel 0 transmit counter register. + #define SPI_RNPR SPI0_RNPR ///< PDC channel 0 receive next pointer register. + #define SPI_RNCR SPI0_RNCR ///< PDC channel 0 receive next counter register. + #define SPI_TNPR SPI0_TNPR ///< PDC channel 0 transmit next pointer register. + #define SPI_TNCR SPI0_TNCR ///< PDC channel 0 transmit next counter register. + #define SPI_PTCR SPI0_PTCR ///< PDC channel 0 transfer control register. + #define SPI_PTSR SPI0_PTSR ///< PDC channel 0 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI_BASE */ +/*\}*/ + +/** + * SPI 0 Register Addresses + */ +/*\{*/ +#if defined(SPI0_BASE) + #define SPI0_CR (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI0_MR (*((reg32_t *)(SPI0_BASE + SPI_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI0_RDR (*((reg32_t *)(SPI0_BASE + SPI_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI0_TDR (*((reg32_t *)(SPI0_BASE + SPI_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI0_SR (*((reg32_t *)(SPI0_BASE + SPI_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI0_IER (*((reg32_t *)(SPI0_BASE + SPI_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI0_IDR (*((reg32_t *)(SPI0_BASE + SPI_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI0_IMR (*((reg32_t *)(SPI0_BASE + SPI_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI0_CSR0 (*((reg32_t *)(SPI0_BASE + SPI_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI0_CSR1 (*((reg32_t *)(SPI0_BASE + SPI_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI0_CSR2 (*((reg32_t *)(SPI0_BASE + SPI_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI0_CSR3 (*((reg32_t *)(SPI0_BASE + SPI_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI0_RPR (*((reg32_t *)(SPI0_BASE + PERIPH_RPR_OFF))) ///< PDC channel 0 receive pointer register. + #define SPI0_RCR (*((reg32_t *)(SPI0_BASE + PERIPH_RCR_OFF))) ///< PDC channel 0 receive counter register. + #define SPI0_TPR (*((reg32_t *)(SPI0_BASE + PERIPH_TPR_OFF))) ///< PDC channel 0 transmit pointer register. + #define SPI0_TCR (*((reg32_t *)(SPI0_BASE + PERIPH_TCR_OFF))) ///< PDC channel 0 transmit counter register. + #define SPI0_RNPR (*((reg32_t *)(SPI0_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define SPI0_RNCR (*((reg32_t *)(SPI0_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define SPI0_TNPR (*((reg32_t *)(SPI0_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define SPI0_TNCR (*((reg32_t *)(SPI0_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define SPI0_PTCR (*((reg32_t *)(SPI0_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define SPI0_PTSR (*((reg32_t *)(SPI0_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI0_BASE */ +/*\}*/ + +/** + * SPI 1 Register Addresses + */ +/*\{*/ +#if defined(SPI1_BASE) + #define SPI1_CR (*((reg32_t *)(SPI1_BASE + SPI_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI1_MR (*((reg32_t *)(SPI1_BASE + SPI_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI1_RDR (*((reg32_t *)(SPI1_BASE + SPI_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI1_TDR (*((reg32_t *)(SPI1_BASE + SPI_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI1_SR (*((reg32_t *)(SPI1_BASE + SPI_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI1_IER (*((reg32_t *)(SPI1_BASE + SPI_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI1_IDR (*((reg32_t *)(SPI1_BASE + SPI_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI1_IMR (*((reg32_t *)(SPI1_BASE + SPI_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI1_CSR0 (*((reg32_t *)(SPI1_BASE + SPI_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI1_CSR1 (*((reg32_t *)(SPI1_BASE + SPI_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI1_CSR2 (*((reg32_t *)(SPI1_BASE + SPI_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI1_CSR3 (*((reg32_t *)(SPI1_BASE + SPI_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI1_RPR (*((reg32_t *)(SPI1_BASE + PERIPH_RPR_OFF))) ///< PDC channel 1 receive pointer register. + #define SPI1_RCR (*((reg32_t *)(SPI1_BASE + PERIPH_RCR_OFF))) ///< PDC channel 1 receive counter register. + #define SPI1_TPR (*((reg32_t *)(SPI1_BASE + PERIPH_TPR_OFF))) ///< PDC channel 1 transmit pointer register. + #define SPI1_TCR (*((reg32_t *)(SPI1_BASE + PERIPH_TCR_OFF))) ///< PDC channel 1 transmit counter register. + #define SPI1_RNPR (*((reg32_t *)(SPI1_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 1 receive next pointer register. + #define SPI1_RNCR (*((reg32_t *)(SPI1_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 1 receive next counter register. + #define SPI1_TNPR (*((reg32_t *)(SPI1_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 1 transmit next pointer register. + #define SPI1_TNCR (*((reg32_t *)(SPI1_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 1 transmit next counter register. + #define SPI1_PTCR (*((reg32_t *)(SPI1_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 1 transfer control register. + #define SPI1_PTSR (*((reg32_t *)(SPI1_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 1 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI1_BASE */ +/*\}*/ + +#endif /* AT91_SPI_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_ssc.h b/2.5/bertos/cpu/arm/io/at91_ssc.h new file mode 100644 index 00000000..51a34bc5 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_ssc.h @@ -0,0 +1,265 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Luca Ottaviano + * + * AT91SAM7 SSC register definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_SSC_H +#define AT91_SSC_H + +#include + +/** + * SSC Control Register + */ +/*\{*/ +#define SSC_CR_OFF 0x00000000 ///< Control register offset. + +#define SSC_RXEN 0 ///< Receive enable. +#define SSC_RXDIS 1 ///< Receive disable. +#define SSC_TXEN 8 ///< Transmit enable. +#define SSC_TXDIS 9 ///< Transmit disable. +#define SSC_SWRST 15 ///< Software reset. +/*\}*/ + +/** + * SSC Clock Mode Register + */ +/*\{*/ +#define SSC_CMR_OFF 0x00000004 ///< Clock mode register offset. + +#define SSC_DIV_MASK 0x00000FFF ///< Clock divider. +/*\}*/ + +/** + * SSC Receive/Transmit Clock Mode Register + */ +/*\{*/ +#define SSC_RCMR_OFF 0x00000010 ///< Receive clock mode register offset. +#define SSC_TCMR_OFF 0x00000018 ///< Transmit clock mode register offset. + +#define SSC_CKS_MASK 0x00000003 ///< Receive clock selection. +#define SSC_CKS_DIV 0x00000000 ///< Divided clock. +#define SSC_CKS_CLK 0x00000001 ///< RK/TK clock signal. +#define SSC_CKS_PIN 0x00000002 ///< TK/RK pin. +#define SSC_CKO_MASK 0x0000001C ///< Receive clock output mode selection. +#define SSC_CKO_NONE 0x00000000 ///< None. +#define SSC_CKO_CONT 0x00000004 ///< Continous receive clock. +#define SSC_CKO_TRAN 0x00000008 ///< Receive clock only during data transfers. +#define SSC_CKI 5 ///< Receive clock inversion. +#define SSC_CKG_MASK 0x000000C0 ///< Receive clock gating selection. +#define SSC_CKG_NONE 0x00000000 ///< None, continous clock. +#define SSC_CKG_FL 0x00000040 ///< Continous receive clock. +#define SSC_CKG_FH 0x00000080 ///< Receive clock only during data transfers. +#define SSC_START_MASK 0x00000F00 ///< Receive start selection. +#define SSC_START_CONT 0x00000000 ///< Receive start as soon as enabled. +#define SSC_START_TX 0x00000100 ///< Receive start on transmit start. +#define SSC_START_RX 0x00000100 ///< Receive start on receive start. +#define SSC_START_LOW_F 0x00000200 ///< Receive start on low level RF. +#define SSC_START_HIGH_F 0x00000300 ///< Receive start on high level RF. +#define SSC_START_FALL_F 0x00000400 ///< Receive start on falling edge RF. +#define SSC_START_RISE_F 0x00000500 ///< Receive start on rising edge RF. +#define SSC_START_LEVEL_F 0x00000600 ///< Receive start on any RF level change. +#define SSC_START_EDGE_F 0x00000700 ///< Receive start on any RF edge. +#define SSC_START_COMP0 0x00000800 ///< Receive on compare 0. +#define SSC_STOP 12 ///< Receive stop selection. +#define SSC_STTDLY_MASK 0x00FF0000 ///< Receive start delay. +#define SSC_STTDLY_SHIFT 16 ///< Least significant bit of receive start delay. +#define SSC_PERIOD_MASK 0xFF000000 ///< Receive period divider selection. +#define SSC_PERIOD_SHIFT 24 ///< Least significant bit of receive period divider selection. +/*\}*/ + +/** + * SSC Receive/Transmit Frame Mode Registers + */ +/*\{*/ +#define SSC_RFMR_OFF 0x00000014 ///< Receive frame mode register offset. +#define SSC_TFMR_OFF 0x0000001C ///< Transmit frame mode register offset. + +#define SSC_DATLEN_MASK 0x0000001F ///< Data length. +#define SSC_LOOP 5 ///< Receiver loop mode. +#define SSC_DATDEF 5 ///< Transmit default value. + +#define SSC_MSBF 7 ///< Most significant bit first. +#define SSC_DATNB_MASK 0x00000F00 ///< Data number per frame. +#define SSC_DATNB_SHIFT 8 ///< Least significant bit of data number per frame. +#define SSC_FSLEN_MASK 0x000F0000 ///< Receive frame sync. length. +#define SSC_FSLEN_SHIFT 16 ///< Least significant bit of receive frame sync. length. +#define SSC_FSOS 0x00700000 ///< Receive frame sync. output selection. +#define SSC_FSOS_NONE 0x00000000 ///< No frame sync. Line set to input. +#define SSC_FSOS_NEGATIVE 0x00100000 ///< Negative pulse. +#define SSC_FSOS_POSITIVE 0x00200000 ///< Positive pulse. +#define SSC_FSOS_LOW 0x00300000 ///< Low during transfer. +#define SSC_FSOS_HIGH 0x00400000 ///< High during transfer. +#define SSC_FSOS_TOGGLE 0x00500000 ///< Toggling at each start. +#define SSC_FSDEN 23 ///< Frame sync. data enable. +#define SSC_FSEDGE 24 ///< Frame sync. edge detection. +/*\}*/ + +/** + * SSC Receive Holding Register + */ +/*\{*/ +#define SSC_RHR_OFF 0x00000020 ///< Receive holding register offset. +/*\}*/ + +/** + * SSC Transmit Holding Register + */ +/*\{*/ +#define SSC_THR_OFF 0x00000024 ///< Transmit holding register offset. +/*\}*/ + +/** + * SSC Receive Sync. Holding Register + */ +/*\{*/ +#define SSC_RSHR_OFF 0x00000030 ///< Receive sync. holding register offset. +/*\}*/ + +/** + * SSC Transmit Sync. Holding Register + */ +/*\{*/ +#define SSC_TSHR_OFF 0x00000034 ///< Transmit sync. holding register offset. +/*\}*/ + +/** + * SSC Receive Compare 0 Register + */ +/*\{*/ +#define SSC_RC0R_OFF 0x00000038 ///< Receive compare 0 register offset. +/*\}*/ + +/** + * SSC Receive Compare 1 Register + */ +/*\{*/ +#define SSC_RC1R_OFF 0x0000003C ///< Receive compare 1 register offset. +/*\}*/ + +/** + * SSC Status and Interrupt Register + */ +/*\{*/ +#define SSC_SR_OFF 0x00000040 ///< Status register offset. +#define SSC_IER_OFF 0x00000044 ///< Interrupt enable register offset. +#define SSC_IDR_OFF 0x00000048 ///< Interrupt disable register offset. +#define SSC_IMR_OFF 0x0000004C ///< Interrupt mask register offset. + +#define SSC_TXRDY 0 ///< Transmit ready. +#define SSC_TXEMPTY 1 ///< Transmit empty. +#define SSC_ENDTX 2 ///< End of transmission. +#define SSC_TXBUFE 3 ///< Transmit buffer empty. +#define SSC_RXRDY 4 ///< Receive ready. +#define SSC_OVRUN 5 ///< Receive overrun. +#define SSC_ENDRX 6 ///< End of receiption. +#define SSC_RXBUFF 7 ///< Receive buffer full. +#define SSC_CP0 8 ///< Compare 0. +#define SSC_CP1 9 ///< Compare 1. +#define SSC_TXSYN 10 ///< Transmit sync. +#define SSC_RXSYN 11 ///< Receive sync. +#define SSC_TXENA 16 ///< Transmit enable. +#define SSC_RXENA 17 ///< Receive enable. + + +#if defined(SSC_BASE) + #define SSC_CR (*((reg32_t *)(SSC_BASE + SSC_CR_OFF))) ///< Control register address. + #define SSC_CMR (*((reg32_t *)(SSC_BASE + SSC_CMR_OFF))) ///< Clock mode register address. + #define SSC_RCMR (*((reg32_t *)(SSC_BASE + SSC_RCMR_OFF))) ///< Receive clock mode register address. + #define SSC_TCMR (*((reg32_t *)(SSC_BASE + SSC_TCMR_OFF))) ///< Transmit clock mode register address. + #define SSC_RFMR (*((reg32_t *)(SSC_BASE + SSC_RFMR_OFF))) ///< Receive frame mode register address. + #define SSC_TFMR (*((reg32_t *)(SSC_BASE + SSC_TFMR_OFF))) ///< Transmit frame mode register address. + #define SSC_RHR (*((reg32_t *)(SSC_BASE + SSC_RHR_OFF))) ///< Receive holding register address. + #define SSC_THR (*((reg32_t *)(SSC_BASE + SSC_THR_OFF))) ///< Transmit holding register address. + #define SSC_RSHR (*((reg32_t *)(SSC_BASE + SSC_RSHR_OFF))) ///< Receive sync. holding register address. + #define SSC_TSHR (*((reg32_t *)(SSC_BASE + SSC_TSHR_OFF))) ///< Transmit sync. holding register address. + #define SSC_RC0R (*((reg32_t *)(SSC_BASE + SSC_RC0R_OFF))) ///< Receive compare 0 register address. + #define SSC_RC1R (*((reg32_t *)(SSC_BASE + SSC_RC1R_OFF))) ///< Receive compare 1 register address. + #define SSC_SR (*((reg32_t *)(SSC_BASE + SSC_SR_OFF))) ///< Status register address. + #define SSC_IER (*((reg32_t *)(SSC_BASE + SSC_IER_OFF))) ///< Interrupt enable register address. + #define SSC_IDR (*((reg32_t *)(SSC_BASE + SSC_IDR_OFF))) ///< Interrupt disable register address. + #define SSC_IMR (*((reg32_t *)(SSC_BASE + SSC_IMR_OFF))) ///< Interrupt mask register address. + #if defined(SSC_HAS_PDC) + #define SSC_RPR (*((reg32_t *)(SSC_BASE + PERIPH_RPR_OFF))) ///< PDC receive pointer register address. + #define SSC_RCR (*((reg32_t *)(SSC_BASE + PERIPH_RCR_OFF))) ///< PDC receive counter register address. + #define SSC_TPR (*((reg32_t *)(SSC_BASE + PERIPH_TPR_OFF))) ///< PDC transmit pointer register address. + #define SSC_TCR (*((reg32_t *)(SSC_BASE + PERIPH_TCR_OFF))) ///< PDC transmit counter register address. + #define SSC_RNPR (*((reg32_t *)(SSC_BASE + PERIPH_RNPR_OFF))) ///< PDC receive next pointer register address. + #define SSC_RNCR (*((reg32_t *)(SSC_BASE + PERIPH_RNCR_OFF))) ///< PDC receive next counter register address. + #define SSC_TNPR (*((reg32_t *)(SSC_BASE + PERIPH_TNPR_OFF))) ///< PDC transmit next pointer register address. + #define SSC_TNCR (*((reg32_t *)(SSC_BASE + PERIPH_TNCR_OFF))) ///< PDC transmit next counter register address. + #define SSC_PTCR (*((reg32_t *)(SSC_BASE + PERIPH_PTCR_OFF))) ///< PDC transfer control register address. + #define SSC_PTSR (*((reg32_t *)(SSC_BASE + PERIPH_PTSR_OFF))) ///< PDC transfer status register address. + #endif /* SSC_HAS_PDC */ + +#endif /* SSC_BASE */ + + +#endif /* AT91_SSC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_tc.h b/2.5/bertos/cpu/arm/io/at91_tc.h new file mode 100644 index 00000000..92cee1dd --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_tc.h @@ -0,0 +1,321 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Daniele Basile + * + * AT91SAM7 Conunter timer definition. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_TC_H +#define AT91_TC_H + + +/** + * Timer Counter Control Register + */ +#define TC_TC0_OFF 0x00000000 ///< Channel 0 control register offset. +#define TC_TC1_OFF 0x00000040 ///< Channel 1 control register offset. +#define TC_TC2_OFF 0x00000080 ///< Channel 2 control register offset. +#define TC0_CCR (*((reg32_t *)(TC_BASE + TC_TC0_OFF))) ///< Channel 0 control register address. +#define TC1_CCR (*((reg32_t *)(TC_BASE + TC_TC1_OFF))) ///< Channel 1 control register address. +#define TC2_CCR (*((reg32_t *)(TC_BASE + TC_TC2_OFF))) ///< Channel 2 control register address. +#define TC_CLKEN 0 ///< Clock enable command. +#define TC_CLKDIS 1 ///< Clock disable command. +#define TC_SWTRG 2 ///< Software trigger command. + +/** + * Timer Counter Channel Mode Register + */ +#define TC_CMR_OFF 0x00000004 ///< Mode register offset. +#define TC0_CMR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CMR_OFF))) ///< Channel 0 mode register address. +#define TC1_CMR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CMR_OFF))) ///< Channel 1 mode register address. +#define TC2_CMR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CMR_OFF))) ///< Channel 2 mode register address. + +#define TC_CLKS_MASK 0x00000007 ///< Clock selection mask. +#define TC_CLKS_MCK2 0x00000000 ///< Selects MCK / 2. +#define TC_CLKS_MCK8 0x00000001 ///< Selects MCK / 8. +#define TC_CLKS_MCK32 0x00000002 ///< Selects MCK / 32. +#define TC_CLKS_MCK128 0x00000003 ///< Selects MCK / 128. +#define TC_CLKS_MCK1024 0x00000004 ///< Selects MCK / 1024. +#define TC_CLKS_XC0 0x00000005 ///< Selects external clock 0. +#define TC_CLKS_XC1 0x00000006 ///< Selects external clock 1. +#define TC_CLKS_XC2 0x00000007 ///< Selects external clock 2. + +#define TC_CLKI 3 ///< Increments on falling edge. + +#define TC_BURST_MASK 0x00000030 ///< Burst signal selection mask. +#define TC_BURST_NONE 0x00000000 ///< Clock is not gated by an external signal. +#define TC_BUSRT_XC0 0x00000010 ///< ANDed with external clock 0. +#define TC_BURST_XC1 0x00000020 ///< ANDed with external clock 1. +#define TC_BURST_XC2 0x00000030 ///< ANDed with external clock 2. + + + +#define TC_WAVE 15 ///< Selects waveform mode. +//To select capture mode you must set TC_WAVE bit to 0. +//#define TC_CAPT 15 ///< Selects capture mode. + +/** + * Capture Mode + */ +#define TC_CPCTRG 14 ///< RC Compare Enable Trigger Enable. +#define TC_LDBSTOP 6 ///< Counter clock stopped on RB loading. +#define TC_LDBDIS 7 ///< Counter clock disabled on RB loading. + +#define TC_ETRGEDG_MASK 0x00000300 ///< External trigger edge selection mask. +#define TC_ETRGEDG_RISING_EDGE 0x00000100 ///< Trigger on external rising edge. +#define TC_ETRGEDG_FALLING_EDGE 0x00000200 ///< Trigger on external falling edge. +#define TC_ETRGEDG_BOTH_EDGE 0x00000300 ///< Trigger on both external edges. + +#define TC_ABETRG_MASK 0x00000400 ///< TIOA or TIOB external trigger selection mask. +#define TC_ABETRG_TIOA 10 ///< TIOA used as an external trigger. +//To use external trigger TIOB you must set TC_ABETRG_TIOA bit to 0. +//#define TC_ABETRG_TIOB 10 ///< TIOB used as an external trigger. + + +#define TC_LDRA_MASK 0x00030000 ///< RA loading selection mask. +#define TC_LDRA_RISING_EDGE 0x00010000 ///< Load RA on rising edge of TIOA. +#define TC_LDRA_FALLING_EDGE 0x00020000 ///< Load RA on falling edge of TIOA. +#define TC_LDRA_BOTH_EDGE 0x00030000 ///< Load RA on any edge of TIOA. + +#define TC_LDRB_MASK 0x000C0000 ///< RB loading selection mask. +#define TC_LDRB_RISING_EDGE 0x00040000 ///< Load RB on rising edge of TIOA. +#define TC_LDRB_FALLING_EDGE 0x00080000 ///< Load RB on falling edge of TIOA. +#define TC_LDRB_BOTH_EDGE 0x000C0000 ///< Load RB on any edge of TIOA. + + +/** + * Waveform Mode + */ +#define TC_CPCSTOP 6 ///< Counter clock stopped on RC compare. +#define TC_CPCDIS 7 ///< Counter clock disabled on RC compare. + +#define TC_EEVTEDG_MASK 0x00000300 ///< External event edge selection mask. +#define TC_EEVTEDG_RISING_EDGE 0x00000100 ///< External event on rising edge.. +#define TC_EEVTEDG_FALLING_EDGE 0x00000200 ///< External event on falling edge.. +#define TC_EEVTEDG_BOTH_EDGE 0x00000300 ///< External event on any edge.. + +#define TC_EEVT_MASK 0x00000C00 ///< External event selection mask. +#define TC_EEVT_TIOB 0x00000000 ///< TIOB selected as external event. +#define TC_EEVT_XC0 0x00000400 ///< XC0 selected as external event. +#define TC_EEVT_XC1 0x00000800 ///< XC1 selected as external event. +#define TC_EEVT_XC2 0x00000C00 ///< XC2 selected as external event. + +#define TC_ENETRG 12 ///< External event trigger enable. + +#define TC_WAVSEL_MASK 0x00006000 ///< Waveform selection mask. +#define TC_WAVSEL_UP 0x00000000 ///< UP mode whitout automatic trigger on RC compare. +#define TC_WAVSEL_UP_RC_TRG 0x00004000 ///< UP mode whit automatic trigger on RC compare. +#define TC_WAVSEL_UPDOWN 0x00002000 ///< UPDOWN mode whitout automatic trigger on RC compare. +#define TC_WAVSEL_UPDOWN_RC_TRG 0x00003000 ///< UPDOWN mode whit automatic trigger on RC compare. + + +#define TC_ACPA_MASK 0x00030000 ///< Masks RA compare effect on TIOA. +#define TC_ACPA_SET_OUTPUT 0x00010000 ///< RA compare sets TIOA. +#define TC_ACPA_CLEAR_OUTPUT 0x00020000 ///< RA compare clears TIOA. +#define TC_ACPA_TOGGLE_OUTPUT 0x00030000 ///< RA compare toggles TIOA. + +#define TC_ACPC_MASK 0x000C0000 ///< Masks RC compare effect on TIOA. +#define TC_ACPC_SET_OUTPUT 0x00040000 ///< RC compare sets TIOA. +#define TC_ACPC_CLEAR_OUTPUT 0x00080000 ///< RC compare clears TIOA. +#define TC_ACPC_TOGGLE_OUTPUT 0x000C0000 ///< RC compare toggles TIOA. + +#define TC_AEEVT_MASK 0x00300000 ///< Masks external event effect on TIOA. +#define TC_AEEVT_SET_OUTPUT 0x00100000 ///< External event sets TIOA. +#define TC_AEEVT_CLEAR_OUTPUT 0x00200000 ///< External event clears TIOA. +#define TC_AEEVT_TOGGLE_OUTPUT 0x00300000 ///< External event toggles TIOA. + +#define TC_ASWTRG_MASK 0x00C00000 ///< Masks software trigger effect on TIOA. +#define TC_ASWTRG_SET_OUTPUT 0x00400000 ///< Software trigger sets TIOA. +#define TC_ASWTRG_CLEAR_OUTPUT 0x00800000 ///< Software trigger clears TIOA. +#define TC_ASWTRG_TOGGLE_OUTPUT 0x00C00000 ///< Software trigger toggles TIOA. + +#define TC_BCPB_MASK 0x03000000 ///< Masks RB compare effect on TIOB. +#define TC_BCPB_SET_OUTPUT 0x01000000 ///< RB compare sets TIOB. +#define TC_BCPB_CLEAR_OUTPUT 0x02000000 ///< RB compare clears TIOB. +#define TC_BCPB_TOGGLE_OUTPUT 0x03000000 ///< RB compare toggles TIOB. + +#define TC_BCPC_MASK 0x0C000000 ///< Masks RC compare effect on TIOB. +#define TC_BCPC_SET_OUTPUT 0x04000000 ///< RC compare sets TIOB. +#define TC_BCPC_CLEAR_OUTPUT 0x08000000 ///< RC compare clears TIOB. +#define TC_BCPC_TOGGLE_OUTPUT 0x0C000000 ///< RC compare toggles TIOB. + +#define TC_BEEVT_MASK 0x30000000 ///< Masks external event effect on TIOB. +#define TC_BEEVT_SET_OUTPUT 0x10000000 ///< External event sets TIOB. +#define TC_BEEVT_CLEAR_OUTPUT 0x20000000 ///< External event clears TIOB. +#define TC_BEEVT_TOGGLE_OUTPUT 0x30000000 ///< External event toggles TIOB. + +#define TC_BSWTRG_MASK 0xC0000000 ///< Masks software trigger effect on TIOB. +#define TC_BSWTRG_SET_OUTPUT 0x40000000 ///< Software trigger sets TIOB. +#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000 ///< Software trigger clears TIOB. +#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000 ///< Software trigger toggles TIOB. + +/** + * Counter Value Register + */ +#define TC_CV_OFF 0x00000010 ///< Counter register value offset. +#define TC0_CV (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CV_OFF))) ///< Counter 0 value. +#define TC1_CV (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CV_OFF))) ///< Counter 1 value. +#define TC2_CV (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CV_OFF))) ///< Counter 2 value. + +/** + * Timer Counter Register A + */ +#define TC_RA_OFF 0x00000014 ///< Register A offset. +#define TC0_RA (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RA_OFF))) ///< Channel 0 register A. +#define TC1_RA (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RA_OFF))) ///< Channel 1 register A. +#define TC2_RA (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RA_OFF))) ///< Channel 2 register A. + + +/** + * Timer Counter Register B + */ +#define TC_RB_OFF 0x00000018 ///< Register B offset. +#define TC0_RB (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RB_OFF))) ///< Channel 0 register B. +#define TC1_RB (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RB_OFF))) ///< Channel 1 register B. +#define TC2_RB (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RB_OFF))) ///< Channel 2 register B. + + +/** + * Timer Counter Register C + */ +#define TC_RC_OFF 0x0000001C ///< Register C offset. +#define TC0_RC (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RC_OFF))) ///< Channel 0 register C. +#define TC1_RC (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RC_OFF))) ///< Channel 1 register C. +#define TC2_RC (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RC_OFF))) ///< Channel 2 register C. + + + +/** + * Timer Counter Status and Interrupt Registers + */ +#define TC_SR_OFF 0x00000020 ///< Status Register offset. +#define TC0_SR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_SR_OFF))) ///< Status register address. +#define TC1_SR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_SR_OFF))) ///< Status register address. +#define TC2_SR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_SR_OFF))) ///< Status register address. + +#define TC_IER_OFF 0x00000024 ///< Interrupt Enable Register offset. +#define TC0_IER (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IER_OFF))) ///< Channel 0 interrupt enable register address. +#define TC1_IER (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IER_OFF))) ///< Channel 1 interrupt enable register address. +#define TC2_IER (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IER_OFF))) ///< Channel 2 interrupt enable register address. + +#define TC_IDR_OFF 0x00000028 ///< Interrupt Disable Register offset. +#define TC0_IDR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IDR_OFF))) ///< Channel 0 interrupt disable register address. +#define TC1_IDR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IDR_OFF))) ///< Channel 1 interrupt disable register address. +#define TC2_IDR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IDR_OFF))) ///< Channel 2 interrupt disable register address. + +#define TC_IMR_OFF 0x0000002C ///< Interrupt Mask Register offset. +#define TC0_IMR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IMR_OFF))) ///< Channel 0 interrupt mask register address. +#define TC1_IMR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IMR_OFF))) ///< Channel 1 interrupt mask register address. +#define TC2_IMR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IMR_OFF))) ///< Channel 2 interrupt mask register address. + +#define TC_COVFS 0 ///< Counter overflow flag. +#define TC_LOVRS 1 ///< Load overrun flag. +#define TC_CPAS 2 ///< RA compare flag. +#define TC_CPBS 3 ///< RB compare flag. +#define TC_CPCS 4 ///< RC compare flag. +#define TC_LDRAS 5 ///< RA loading flag. +#define TC_LDRBS 6 ///< RB loading flag. +#define TC_ETRGS 7 ///< External trigger flag. +#define TC_CLKSTA 16 ///< Clock enable flag. +#define TC_MTIOA 17 ///< TIOA flag. +#define TC_MTIOB 18 ///< TIOB flag. + + +/** + * Timer Counter Block Control Register + */ +#define TC_BCR_OFF 0x000000C0 ///< Block control register offset. +#define TC_BCR (*((reg32_t *)(TC_BASE + TC_BCR_OFF))) ///< Block control register address. +#define TC_SYNC 0 ///< Synchronisation trigger + + +/** + * Timer Counter Block Mode Register + */ +#define TC_BMR_OFF 0x000000C4 ///< Block mode register offset. +#define TC_BMR (*((reg32_t *)(TC_BASE + TC_BMR_OFF))) ///< Block mode register address. +#define TC_TC0XC0S 0x00000003 ///< External clock signal 0 selection mask. +#define TC_TCLK0XC0 0x00000000 ///< Selects TCLK0. +#define TC_NONEXC0 0x00000001 ///< None selected. +#define TC_TIOA1XC0 0x00000002 ///< Selects TIOA1. +#define TC_TIOA2XC0 0x00000003 ///< Selects TIOA2. + +#define TC_TC1XC1S 0x0000000C ///< External clock signal 1 selection mask. +#define TC_TCLK1XC1 0x00000000 ///< Selects TCLK1. +#define TC_NONEXC1 0x00000004 ///< None selected. +#define TC_TIOA0XC1 0x00000008 ///< Selects TIOA0. +#define TC_TIOA2XC1 0x0000000C ///< Selects TIOA2. + +#define TC_TC2XC2S 0x00000030 ///< External clock signal 2 selection mask. +#define TC_TCLK2XC2 0x00000000 ///< Selects TCLK2. +#define TC_NONEXC2 0x00000010 ///< None selected. +#define TC_TIOA0XC2 0x00000020 ///< Selects TIOA0. +#define TC_TIOA1XC2 0x00000030 ///< Selects TIOA1. + + +#endif /* AT91_TC_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_twi.h b/2.5/bertos/cpu/arm/io/at91_twi.h new file mode 100644 index 00000000..3fbe7dc9 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_twi.h @@ -0,0 +1,191 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91SAM7 Two wire interface. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (*((reg32_t *)(INCLUDING NEGLIGENCE OR OTHERWISE))) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_TWI_H +#define AT91_TWI_H + + +/** + * TWI Control Register. + * \{ + */ +#define TWI_CR_OFF 0x00000000 ///< Control register offset. +#define TWI_CR (*((reg32_t *)(TWI_BASE + TWI_CR_OFF))) ///< Control register address. +#define TWI_START 0 ///< Send start condition. +#define TWI_STOP 1 ///< Send stop condition. +#define TWI_MSEN 2 ///< Enable master mode. +#define TWI_MSDIS 3 ///< Disable master mode. +/* +#define TWI_SVEN 4 ///< Enable slave mode. +#define TWI_SVDIS 5 ///< Disable slave mode. +*/ +#define TWI_SWRST 7 ///< Software reset. +/*\}*/ + +/** + * TWI Master Mode Register. + * \{ + */ +#define TWI_MMR_OFF 0x00000004 ///< Master mode register offset. +#define TWI_MMR (*((reg32_t *)(TWI_BASE + TWI_MMR_OFF))) ///< Master mode register address. +#define TWI_IADRSZ_SHIFT 8 ///< Internal device address size shift. +#define TWI_IADRSZ 0x00000300 ///< Internal device address size mask. +#define TWI_IADRSZ_NONE 0x00000000 ///< No internal device address. +#define TWI_IADRSZ_1BYTE 0x00000100 ///< One byte internal device address. +#define TWI_IADRSZ_2BYTE 0x00000200 ///< Two byte internal device address. +#define TWI_IADRSZ_3BYTE 0x00000300 ///< Three byte internal device address. +#define TWI_MREAD 12 ///< Master read direction. +#define TWI_DADR 0x007F0000 ///< Device address mask. +#define TWI_DADR_SHIFT 16 ///< Device address LSB. +/*\}*/ + +/** + * TWI Internal Address Register. + * \{ + */ +#define TWI_IADR_OFF 0x0000000C ///< Internal address register offset. +#define TWI_IADR (*((reg32_t *)(TWI_BASE + TWI_IADR_OFF))) ///< Internal address register address. +#define TWI_IADR_MASK 0x00FFFFFF ///< Internal address mask. +#define TWI_IADR_SHIFT 0 ///< Internal address LSB. +/*\}*/ + +/** + * TWI Clock Waveform Generator Register. + * \{ + */ +#define TWI_CWGR_OFF 0x00000010 ///< Clock waveform generator register offset. +#define TWI_CWGR (*((reg32_t *)(TWI_BASE + TWI_CWGR_OFF))) ///< Clock waveform generator register address. +#define TWI_CLDIV 0x000000FF ///< Clock low divider mask. +#define TWI_CLDIV_SHIFT 0 ///< Clock low divider LSB. +#define TWI_CHDIV 0x0000FF00 ///< Clock high divider mask. +#define TWI_CHDIV_SHIFT 8 ///< Clock high divider LSB. +#define TWI_CKDIV 0x00070000 ///< Clock divider mask. +#define TWI_CKDIV_SHIFT 16 ///< Clock divider LSB. +/*\}*/ + +/** + * TWI Status and Interrupt Registers. + * \{ + */ +#define TWI_SR_OFF 0x00000020 ///< Status register offset. +#define TWI_SR (*((reg32_t *)(TWI_BASE + TWI_SR_OFF))) ///< Status register address. + +#define TWI_IER_OFF 0x00000024 ///< Interrupt enable register offset. +#define TWI_IER (*((reg32_t *)(TWI_BASE + TWI_IER_OFF))) ///< Interrupt enable register address. + +#define TWI_IDR_OFF 0x00000028 ///< Interrupt disable register offset. +#define TWI_IDR (*((reg32_t *)(TWI_BASE + TWI_IDR_OFF))) ///< Interrupt disable register address. + +#define TWI_IMR_OFF 0x0000002C ///< Interrupt mask register offset. +#define TWI_IMR (*((reg32_t *)(TWI_BASE + TWI_IMR_OFF))) ///< Interrupt mask register address. + +#define TWI_TXCOMP 0 ///< Transmission completed. +#define TWI_RXRDY 1 ///< Receive holding register ready. +#define TWI_TXRDY 2 ///< Transmit holding register ready. + +/* +#define TWI_SVREAD 0x00000008 ///< Slave read. +#define TWI_SVACC 0x00000010 ///< Slave access. +#define TWI_GACC 0x00000020 ///< General call access. +*/ + +#if CPU_ARM_SAM7X +#define TWI_OVRE 6 ///< Overrun error. +#define TWI_UNRE 7 ///< Underrun error. +#endif + +#define TWI_NACK 8 ///< Not acknowledged. +/* +#define TWI_ARBLST 0x00000200 ///< Arbitration lost. +#define TWI_SCLWS 0x00000400 ///< Clock wait state. +#define TWI_EOSACC 0x00000800 ///< End of slave access. +*/ +/*\}*/ + +/** + * TWI Receive Holding Register. + * \{ + */ +#define TWI_RHR_OFF 0x00000030 ///< Receive holding register offset. +#define TWI_RHR (*((reg32_t *)(TWI_BASE + TWI_RHR_OFF))) ///< Receive holding register address. +/*\}*/ + +/** + * TWI Transmit Holding Register. + * \{ + */ +#define TWI_THR_OFF 0x00000034 ///< Transmit holding register offset. +#define TWI_THR (*((reg32_t *)(TWI_BASE + TWI_THR_OFF))) ///< Transmit holding register address. +/*\}*/ + + +#endif /* AT91_TWI_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_us.h b/2.5/bertos/cpu/arm/io/at91_us.h new file mode 100644 index 00000000..fd9bf667 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_us.h @@ -0,0 +1,344 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Daniele Basile + * + * AT91 UART User interface. + * This file is based on NUT/OS implementation. See license below. + */ +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_US_H +#define AT91_US_H + +/** + * USART Control Register + */ +/*\{*/ +#define US_CR_OFF 0x00000000 ///< USART control register offset. +#define US0_CR (*((reg32_t *)(USART0_BASE + US_CR_OFF))) ///< Channel 0 control register address. +#define US1_CR (*((reg32_t *)(USART1_BASE + US_CR_OFF))) ///< Channel 1 control register address. +#define US_RSTRX 2 ///< Reset receiver. +#define US_RSTTX 3 ///< Reset transmitter. +#define US_RXEN 4 ///< Receiver enable. +#define US_RXDIS 5 ///< Receiver disable. +#define US_TXEN 6 ///< Transmitter enable. +#define US_TXDIS 7 ///< Transmitter disable. +#define US_RSTSTA 8 ///< Reset status bits. +#define US_STTBRK 9 ///< Start break. +#define US_STPBRK 10 ///< Stop break. +#define US_STTTO 11 ///< Start timeout. +#define US_SENDA 12 ///< Send next byte with address bit set. +#define US_RSTIT 13 ///< Reset interations. +#define US_RSTNAK 14 ///< Reset non acknowledge. +#define US_RETTO 15 ///< Rearm time out. +#define US_DTREN 16 ///< Data terminal ready enable. +#define US_DTRDIS 17 ///< Data terminal ready disable. +#define US_RTSEN 18 ///< Request to send enable. +#define US_RTSDIS 19 ///< Request to send disable. +/*\}*/ + +/** + * Mode Register + */ +/*\{*/ +#define US_MR_OFF 0x00000004 ///< USART mode register offset. +#define US0_MR (*((reg32_t *)(USART0_BASE + US_MR_OFF))) ///< Channel 0 mode register address. +#define US1_MR (*((reg32_t *)(USART1_BASE + US_MR_OFF))) ///< Channel 1 mode register address. + +#define US_USART_MODE_MASK 0x0000000F ///< USART mode mask. +#define US_USART_MODE_NORMA 0x00000000 ///< Normal. +#define US_USART_MODE_RS485 0x00000001 ///< RS485. +#define US_USART_MODE_HW_HDSH 0x00000002 ///< Hardware handshaking. +#define US_USART_MODE_MODEM 0x00000003 ///< Modem. +#define US_USART_MODE_ISO7816T0 0x00000004 ///< ISO7816 protocol: T=0. +#define US_USART_MODE_ISO7816T1 0x00000006 ///< ISO7816 protocol: T=1. +#define US_USART_MODE_IRDA 0x00000008 ///< IrDA. + +#define US_CLKS_MASK 0x00000030 ///< Clock selection mask. +#define US_CLKS_MCK 0x00000000 ///< Master clock. +#define US_CLKS_MCK8 0x00000010 ///< Master clock divided by 8. +#define US_CLKS_SCK 0x00000020 ///< External clock. +#define US_CLKS_SLCK 0x00000030 ///< Slow clock. + +#define US_CHRL_MASK 0x000000C0 ///< Masks data length. +#define US_CHRL_5 0x00000000 ///< 5 data bits. +#define US_CHRL_6 0x00000040 ///< 6 data bits. +#define US_CHRL_7 0x00000080 ///< 7 data bits. +#define US_CHRL_8 0x000000C0 ///< 8 data bits. + +#define US_SYNC 8 ///< Synchronous mode enable. + +#define US_PAR_MASK 0x00000E00 ///< Parity mode mask. +#define US_PAR_EVEN 0x00000000 ///< Even parity. +#define US_PAR_ODD 0x00000200 ///< Odd parity. +#define US_PAR_SPACE 0x00000400 ///< Space parity. +#define US_PAR_MARK 0x00000600 ///< Marked parity. +#define US_PAR_NO 0x00000800 ///< No parity. +#define US_PAR_MULTIDROP 0x00000C00 ///< Multi-drop mode. + +#define US_NBSTOP_MASK 0x00003000 ///< Masks stop bit length. +#define US_NBSTOP_1 0x00000000 ///< 1 stop bit. +#define US_NBSTOP_1_5 0x00001000 ///< 1.5 stop bits. +#define US_NBSTOP_2 0x00002000 ///< 2 stop bits. + +#define US_CHMODE_MASK 0x0000C000 ///< Channel mode mask. +#define US_CHMODE_NORMAL 0x00000000 ///< Normal mode. +#define US_CHMODE_AUTOMATIC_ECHO 0x00004000 ///< Automatic echo. +#define US_CHMODE_LOCAL_LOOPBACK 0x00008000 ///< Local loopback. +#define US_CHMODE_REMOTE_LOOPBACK 0x0000C000 ///< Remote loopback. + +#define US_MSBF 16 ///< Bit order. +#define US_MODE9 17 ///< 9 bit mode. +#define US_CLKO 18 ///< Clock output select. +#define US_OVER 19 ///< Oversampling mode. +#define US_INACK 20 ///< Inhibit non acknowledge. +#define US_DSNACK 21 ///< Disable successive nack. + +#define US_MAX_INTERATION_MASK 0x07000000 ///< Max numer of interation in mode ISO7816 T=0. + +#define US_FILTER 28 ///< Infrared receive line filter. + +/*\}*/ + +/** + * Status and Interrupt Register + */ +/*\{*/ +#define US_IER_OFF 0x00000008 ///< USART interrupt enable register offset. +#define US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF))) ///< Channel 0 interrupt enable register address. +#define US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF))) ///< Channel 1 interrupt enable register address. + +#define US_IDR_OFF 0x0000000C ///< USART interrupt disable register offset. +#define US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF))) ///< Channel 0 interrupt disable register address. +#define US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF))) ///< Channel 1 interrupt disable register address. + +#define US_IMR_OFF 0x00000010 ///< USART interrupt mask register offset. +#define US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF))) ///< Channel 0 interrupt mask register address. +#define US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF))) ///< Channel 1 interrupt mask register address. + +#define US_CSR_OFF 0x00000014 ///< USART status register offset. +#define US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF))) ///< Channel 0 status register address. +#define US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF))) ///< Channel 1 status register address. +#define US_CSR_RI 20 ///< Image of RI input. +#define US_CSR_DSR 21 ///< Image of DSR input. +#define US_CSR_DCD 22 ///< Image of DCD input. +#define US_CSR_CTS 23 ///< Image of CTS input. + +#define US_RXRDY 0 ///< Receiver ready. +#define US_TXRDY 1 ///< Transmitter ready. +#define US_RXBRK 2 ///< Receiver break. +#define US_ENDRX 3 ///< End of receiver PDC transfer. +#define US_ENDTX 4 ///< End of transmitter PDC transfer. +#define US_OVRE 5 ///< Overrun error. +#define US_FRAME 6 ///< Framing error. +#define US_PARE 7 ///< Parity error. +#define US_TIMEOUT 8 ///< Receiver timeout. +#define US_TXEMPTY 9 ///< Transmitter empty. +#define US_ITERATION 10 ///< Iteration interrupt enable. +#define US_TXBUFE 11 ///< Buffer empty interrupt enable. +#define US_RXBUFF 12 ///< Buffer full interrupt enable. +#define US_NACK 13 ///< Non acknowledge interrupt enable. +#define US_RIIC 16 ///< Ring indicator input change enable. +#define US_DSRIC 17 ///< Data set ready input change enable. +#define US_DCDIC 18 ///< Data carrier detect input change interrupt enable. +#define US_CTSIC 19 ///< Clear to send input change interrupt enable. + +/** + * Receiver Holding Register + */ +/*\{*/ +#define US_RHR_OFF 0x00000018 ///< USART receiver holding register offset. +#define US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF))) ///< Channel 0 receiver holding register address. +#define US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF))) ///< Channel 1 receiver holding register address. +#define US_RHR_RXCHR_MASK 0x000001FF ///< Last char received if US_RXRDY is set. +#define US_RHR_RXSYNH 15 ///< Received sync. +/*\}*/ + +/** + * Transmitter Holding Register + */ +/*\{*/ +#define US_THR_OFF 0x0000001C ///< USART transmitter holding register offset. +#define US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF))) ///< Channel 0 transmitter holding register address. +#define US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF))) ///< Channel 1 transmitter holding register address. +#define US_THR_TXCHR_MASK 0x000001FF ///< Next char to be trasmitted. +#define US_THR_TXSYNH 15 ///< Sync field to be trasmitted. +/*\}*/ + +/** + * Baud Rate Generator Register + */ +/*\{*/ +#define US_BRGR_OFF 0x00000020 ///< USART baud rate register offset. +#define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF))) ///< Channel 0 baud rate register address. +#define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF))) ///< Channel 1 baud rate register address. +/*\}*/ + +/** + * Receiver Timeout Register + */ +/*\{*/ +#define US_RTOR_OFF 0x00000024 ///< USART receiver timeout register offset. +#define US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF))) ///< Channel 0 receiver timeout register address. +#define US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF))) ///< Channel 1 receiver timeout register address. +/*\}*/ + +/** + * Transmitter Time Guard Register + */ +/*\{*/ +#define US_TTGR_OFF 0x00000028 ///< USART transmitter time guard register offset. +#define US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF))) ///< Channel 0 transmitter time guard register address. +#define US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF))) ///< Channel 1 transmitter time guard register address. +/*\}*/ + +/** + * FI DI Ratio Register +*/ +/*\{*/ +#define US_FIDI_OFF 0x00000040 ///< USART FI DI ratio register offset. +#define US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF))) ///< Channel 0 FI DI ratio register address. +#define US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF))) ///< Channel 1 FI DI ratio register address. +/*\}*/ + +/** + * Error Counter Register + */ +/*\{*/ +#define US_NER_OFF 0x00000044 ///< USART error counter register offset. +#define US0_NER (*((reg32_t *)(USART0_BASE + US_NER_OFF))) ///< Channel 0 error counter register address. +#define US1_NER (*((reg32_t *)(USART1_BASE + US_NER_OFF))) ///< Channel 1 error counter register address. +/*\}*/ + +/** + * IrDA Filter Register + */ +/*\{*/ +#define US_IF_OFF 0x0000004C ///< USART IrDA filter register offset. +#define US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF))) ///< Channel 0 IrDA filter register address. +#define US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF))) ///< Channel 1 IrDA filter register address. +/*\}*/ + +#if USART_HAS_PDC + + /** + * Receive Pointer Register + */ + /*\{*/ + #define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF))) ///< Channel 0 receive pointer register address. + #define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF))) ///< Channel 1 receive pointer register address. + /*\}*/ + + /** + * Receive Counter Register + */ + /*\{*/ + #define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF))) ///< Channel 0 receive counter register address. + #define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF))) ///< Channel 1 receive counter register address. + /*\}*/ + + /** + * Transmit Pointer Register + */ + /*\{*/ + #define US0_TPR (*((reg32_t *)(USART0_BASE + PERIPH_TPR_OFF))) ///< Channel 0 transmit pointer register address. + #define US1_TPR (*((reg32_t *)(USART1_BASE + PERIPH_TPR_OFF))) ///< Channel 1 transmit pointer register address. + /*\}*/ + + /** + * Transmit Counter Register + */ + /*\{*/ + #define US0_TCR (*((reg32_t *)(USART0_BASE + PERIPH_TCR_OFF))) ///< Channel 0 transmit counter register address. + #define US1_TCR (*((reg32_t *)(USART1_BASE + PERIPH_TCR_OFF))) ///< Channel 1 transmit counter register address. + /*\}*/ + + #if defined(PERIPH_RNPR_OFF) && defined(PERIPH_RNCR_OFF) + #define US0_RNPR (*((reg32_t *)(USART0_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define US1_RNPR (*((reg32_t *)(USART1_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 1 receive next pointer register. + #define US0_RNCR (*((reg32_t *)(USART0_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define US1_RNCR (*((reg32_t *)(USART1_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 1 receive next counter register. + #endif + + #if defined(PERIPH_TNPR_OFF) && defined(PERIPH_TNCR_OFF) + #define US0_TNPR (*((reg32_t *)(USART0_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define US1_TNPR (*((reg32_t *)(USART1_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 1 transmit next pointer register. + #define US0_TNCR (*((reg32_t *)(USART0_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define US1_TNCR (*((reg32_t *)(USART1_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 1 transmit next counter register. + #endif + + #if defined(PERIPH_PTCR_OFF) + #define US0_PTCR (*((reg32_t *)(USART0_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define US1_PTCR (*((reg32_t *)(USART1_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 1 transfer control register. + #endif + + #if defined(PERIPH_PTSR_OFF) + #define US0_PTSR (*((reg32_t *)(USART0_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #define US1_PTSR (*((reg32_t *)(USART1_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 1 transfer status register. + #endif + +#endif /* USART_HAS_PDC */ + +#endif /* AT91_US_H */ diff --git a/2.5/bertos/cpu/arm/io/at91_wdt.h b/2.5/bertos/cpu/arm/io/at91_wdt.h new file mode 100644 index 00000000..ed394665 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91_wdt.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * AT91 Watchdog. + * This file is based on NUT/OS implementation. See license below. + */ + + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_WDT_H +#define AT91_WDT_H + + +/** Watch Dog Control Register */ +/*\{*/ +#define WDT_CR_OFF 0x00000000 ///< Watchdog control register offset. +#define WDT_CR (*((reg32_t *)(WDT_BASE + WDT_CR_OFF))) ///< Watchdog control register address. +#define WDT_WDRSTT 0 ///< Watchdog restart. +#define WDT_KEY 0xA5000000 ///< Watchdog password. +/*\}*/ + +/** Watch Dog Mode Register */ +/*\{*/ +#define WDT_MR_OFF 0x00000004 ///< Mode register offset. +#define WDT_MR (*((reg32_t *)(WDT_BASE + WDT_MR_OFF))) ///< Mode register address. +#define WDT_WDV_MASK 0x00000FFF ///< Counter value mask. +#define WDT_WDV_SHIFT 0 ///< Counter value LSB. +#define WDT_WDFIEN 12 ///< Fault interrupt enable. +#define WDT_WDRSTEN 13 ///< Reset enable. +#define WDT_WDRPROC 14 ///< Eset processor enable. +#define WDT_WDDIS 15 ///< Watchdog disable. +#define WDT_WDD_MASK 0x0FFF0000 ///< Delta value mask. +#define WDT_WDD_SHIFT 16 ///< Delta value LSB. +#define WDT_WDDBGHLT 28 ///< Watchdog debug halt. +#define WDT_WDIDLEHLT 29 ///< Watchdog idle halt. +/*\}*/ + +/** Watch Dog Status Register */ +/*\{*/ +#define WDT_SR_OFF 0x00000008 ///< Status register offset. +#define WDT_SR (*((reg32_t *)(WDT_BASE + WDT_SR_OFF))) ///< Status register address. +#define WDT_WDUNF 0 ///< Watchdog underflow. +#define WDT_WDERR 1 ///< Watchdog error. +/*\}*/ + + +#endif /* AT91_WDT_H */ diff --git a/2.5/bertos/cpu/arm/io/at91sam7.h b/2.5/bertos/cpu/arm/io/at91sam7.h new file mode 100644 index 00000000..9a2e6db8 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/at91sam7.h @@ -0,0 +1,433 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * AT91SAM7 register definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91SAM7_H +#define AT91SAM7_H + +#include + +#if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE + #define FLASH_BASE 0x100000UL + #define RAM_BASE 0x200000UL + + #define TC_BASE 0xFFFA0000 ///< Timer/counter base address. + #define UDP_BASE 0xFFFB0000 ///< USB device port base address. + #define TWI_BASE 0xFFFB8000 ///< Two-wire interface base address. + #define USART0_BASE 0xFFFC0000 ///< USART 0 base address. + #define USART1_BASE 0xFFFC4000 ///< USART 1 base address. + #define PWMC_BASE 0xFFFCC000 ///< PWM controller base address. + #define SSC_BASE 0xFFFD4000 ///< Serial synchronous controller base address. + #define ADC_BASE 0xFFFD8000 ///< ADC base address. + + #define AIC_BASE 0xFFFFF000 ///< AIC base address. + #define DBGU_BASE 0xFFFFF200 ///< DBGU base address. + #define PIOA_BASE 0xFFFFF400 ///< PIO A base address. + #define PMC_BASE 0xFFFFFC00 ///< PMC base address. + #define RSTC_BASE 0xFFFFFD00 ///< Resect controller register base address. + #define RTT_BASE 0xFFFFFD20 ///< Realtime timer base address. + #define PIT_BASE 0xFFFFFD30 ///< Periodic interval timer base address. + #define WDT_BASE 0xFFFFFD40 ///< Watch Dog register base address. + #define VREG_BASE 0xFFFFFD60 ///< Voltage regulator mode controller base address. + #define MC_BASE 0xFFFFFF00 ///< Memory controller base. + + #if CPU_ARM_SAM7X + #define CAN_BASE 0xFFFD0000 ///< PWM controller base address. + #define EMAC_BASE 0xFFFDC000 ///< Ethernet MAC address. + #define SPI0_BASE 0xFFFE0000 ///< SPI0 base address. + #define SPI1_BASE 0xFFFE4000 ///< SPI1 base address. + #define PIOB_BASE 0xFFFFF600 ///< PIO base address. + #endif + + #if CPU_ARM_SAM7S_LARGE + #define SPI_BASE 0xFFFE0000 ///< SPI0 base address. + #endif + + #define PIO_HAS_MULTIDRIVER 1 + #define PIO_HAS_PULLUP 1 + #define PIO_HAS_PERIPHERALSELECT 1 + #define PIO_HAS_OUTPUTWRITEENABLE 1 + + #define DBGU_HAS_PDC 1 + #define SPI_HAS_PDC 1 + #define SSC_HAS_PDC 1 + #define USART_HAS_PDC 1 + + /* PDC registers */ + #define PERIPH_RPR_OFF 0x100 ///< Receive Pointer Register. + #define PERIPH_RCR_OFF 0x104 ///< Receive Counter Register. + #define PERIPH_TPR_OFF 0x108 ///< Transmit Pointer Register. + #define PERIPH_TCR_OFF 0x10C ///< Transmit Counter Register. + #define PERIPH_RNPR_OFF 0x110 ///< Receive Next Pointer Register. + #define PERIPH_RNCR_OFF 0x114 ///< Receive Next Counter Register. + #define PERIPH_TNPR_OFF 0x118 ///< Transmit Next Pointer Register. + #define PERIPH_TNCR_OFF 0x11C ///< Transmit Next Counter Register. + #define PERIPH_PTCR_OFF 0x120 ///< PDC Transfer Control Register. + #define PERIPH_PTSR_OFF 0x124 ///< PDC Transfer Status Register. + + #define PDC_RXTEN 0 + #define PDC_RXTDIS 1 + #define PDC_TXTEN 8 + #define PDC_TXTDIS 9 + +#else + #error No base address register definition for selected ARM CPU + +#endif + +#if CPU_ARM_AT91SAM7S64 + #define FLASH_MEM_SIZE 0x10000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 128 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 1 ///< Number of flash banks + #define FLASH_SECTORS_NUM 16 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 32 ///< Number of page for sector + +#elif CPU_ARM_AT91SAM7S128 || CPU_ARM_AT91SAM7X128 + #define FLASH_MEM_SIZE 0x20000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 256 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 1 ///< Number of flash banks + #define FLASH_SECTORS_NUM 8 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 64 ///< Number of page for sector + +#elif CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X256 + #define FLASH_MEM_SIZE 0x40000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 256 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 1 ///< Number of flash banks + #define FLASH_SECTORS_NUM 16 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 64 ///< Number of page for sector + +#elif CPU_ARM_AT91SAM7S512 || CPU_ARM_AT91SAM7X512 + #define FLASH_MEM_SIZE 0x80000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 256 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 2 ///< Number of flash banks + #define FLASH_SECTORS_NUM 32 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 64 ///< Number of page for sector + +#else + #error Memory size definition for selected ARM CPU +#endif + +#include "at91_aic.h" +#include "at91_pit.h" +#include "at91_pmc.h" +#include "at91_mc.h" +#include "at91_wdt.h" +#include "at91_rstc.h" +#include "at91_pio.h" +#include "at91_us.h" +#include "at91_dbgu.h" +#include "at91_tc.h" +#include "at91_adc.h" +#include "at91_pwm.h" +#include "at91_spi.h" +#include "at91_twi.h" +#include "at91_ssc.h" +//TODO: add other peripherals + +/** + * Peripheral Identifiers and Interrupts + *\{ + */ +#if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE + #define FIQ_ID 0 ///< Fast interrupt ID. + #define SYSC_ID 1 ///< System controller interrupt. + #define US0_ID 6 ///< USART 0 ID. + #define US1_ID 7 ///< USART 1 ID. + #define SSC_ID 8 ///< Synchronous serial controller ID. + #define TWI_ID 9 ///< Two-wire interface ID. + #define PWMC_ID 10 ///< PWM controller ID. + #define UDP_ID 11 ///< USB device port ID. + #define TC0_ID 12 ///< Timer 0 ID. + #define TC1_ID 13 ///< Timer 1 ID. + #define TC2_ID 14 ///< Timer 2 ID. + + #define IRQ0_ID 30 ///< External interrupt 0 ID. + #define IRQ1_ID 31 ///< External interrupt 1 ID. + + #if CPU_ARM_SAM7X + #define PIOA_ID 2 ///< Parallel A I/O controller ID. + #define PIOB_ID 3 ///< Parallel B I/O controller ID. + #define SPI0_ID 4 ///< Serial peripheral interface 0 ID. + #define SPI1_ID 5 ///< Serial peripheral interface 1 ID. + #define CAN_ID 15 ///< CAN controller ID. + #define EMAC_ID 16 ///< Ethernet MAC ID. + #define ADC_ID 17 ///< Analog to digital converter ID. + /* 18-29 Reserved */ + + #endif + + #if CPU_ARM_SAM7S_LARGE + #define PIOA_ID 2 ///< Parallel I/O controller ID. + /* ID 3 is reserved */ + #define ADC_ID 4 ///< Analog to digital converter ID. + #define SPI_ID 5 ///< Serial peripheral interface ID. + #define SPI0_ID SPI_ID ///< Alias + #endif + +#else + #error No peripheral ID and interrupts definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * USART & DEBUG pin names + *\{ + */ +#if CPU_ARM_SAM7S_LARGE + #define RXD0 5 + #define TXD0 6 + #define RXD1 21 + #define TXD1 22 + #define DTXD 10 + #define DRXD 9 +#elif CPU_ARM_SAM7X + #define RXD0 0 // PA0 + #define TXD0 1 // PA1 + #define RXD1 5 // PA5 + #define TXD1 6 // PA6 + #define DTXD 28 // PA28 + #define DRXD 27 // PA27 +#else + #error No USART & debug pin names definition for selected ARM CPU +#endif +/*\}*/ + +/** + * SPI pins name + *\{ + */ +#if CPU_ARM_SAM7S_LARGE + #define SPI0_NPCS0 11 // Same as NSS pin. + #define SPI0_MISO 12 + #define SPI0_MOSI 13 + #define SPI0_SPCK 14 + +#elif CPU_ARM_SAM7X + #define SPI0_NPCS0 12 // Same as NSS pin. PA12 + #define SPI0_NPCS1 13 // PA13 + #define SPI0_NPCS2 14 // PA14 + #define SPI0_NPCS3 15 // PA15 + #define SPI0_MISO 16 // PA16 + #define SPI0_MOSI 17 // PA17 + #define SPI0_SPCK 18 // PA18 + + #define SPI1_NPCS0 21 // Same as NSS pin. PA21 + #define SPI1_NPCS1 25 // PA25 + #define SPI1_NPCS2 26 // PA26 + #define SPI1_NPCS3 29 // PA29 + #define SPI1_MISO 24 // PA24 + #define SPI1_MOSI 23 // PA23 + #define SPI1_SPCK 22 // PA22 + +#else + #error No SPI pins name definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * SSC pins name + *\{ + */ +#if CPU_ARM_SAM7S_LARGE + + #define SSC_TF 15 // PA15 + #define SSC_TK 16 // PA16 + #define SSC_TD 17 // PA17 + #define SSC_RD 18 // PA18 + #define SSC_RK 19 // PA19 + #define SSC_RF 20 // PA20 + +#elif CPU_ARM_SAM7X + + #define SSC_TF 21 // PA21 + #define SSC_TK 22 // PA22 + #define SSC_TD 23 // PA23 + #define SSC_RD 24 // PA24 + #define SSC_RK 25 // PA25 + #define SSC_RF 26 // PA26 + +#else + #error No SSC pins name definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * Timer counter pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define TIOA0 23 // PB23 + #define TIOB0 24 // PB24 + #define TIOA1 25 // PB25 + #define TIOB1 26 // PB26 + #define TIOA2 27 // PB27 + #define TIOB2 28 // PB28 + + #define TIO_PIO_PDR PIOB_PDR + #define TIO_PIO_ABSR PIOB_ASR + +#elif CPU_ARM_SAM7S_LARGE + #define TIOA0 0 // PA0 + #define TIOB0 1 // PA1 + #define TIOA1 15 // PA15 + #define TIOB1 16 // PA16 + #define TIOA2 26 // PA26 + #define TIOB2 27 // PA27 + + #define TIO_PIO_PDR PIOA_PDR + #define TIO_PIO_ABSR PIOA_BSR + +#else + #error No Timer Counter names of pins definition for selected ARM CPU + +#endif +/*\}*/ + + +/** + * PWM pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define PWM0 19 // PB19 + #define PWM1 20 // PB20 + #define PWM2 21 // PB21 + #define PWM3 22 // PB22 + + #define PWM_PIO_PDR PIOB_PDR + #define PWM_PIO_PER PIOB_PER + #define PWM_PIO_CODR PIOB_CODR + #define PWM_PIO_OER PIOB_OER + #define PWM_PIO_ABSR PIOB_ASR + +#elif CPU_ARM_SAM7S_LARGE + #define PWM0 11 // PA11 + #define PWM1 12 // PA12 + #define PWM2 13 // PA13 + #define PWM3 14 // PA14 + + #define PWM_PIO_PDR PIOA_PDR + #define PWM_PIO_PER PIOA_PER + #define PWM_PIO_CODR PIOA_CODR + #define PWM_PIO_OER PIOA_OER + #define PWM_PIO_ABSR PIOA_BSR + +#else + #error No PWM names of pins definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * TWI pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define TWD 10 + #define TWCK 11 + +#elif CPU_ARM_SAM7S_LARGE + #define TWD 3 //PA3 + #define TWCK 4 //PA4 + +#else + #error No TWI names of pins definition for selected ARM CPU +#endif + +/** + * ADC pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define ADTRG 18 // PB18 + #define AD0 23 // PB27 + #define AD1 24 // PB28 + #define AD2 25 // PB29 + #define AD3 26 // PB30 + +#elif CPU_ARM_SAM7S_LARGE + #define ADTRG 18 // PA8 + #define AD0 0 // PA17 + #define AD1 1 // PA18 + #define AD2 15 // PA19 + #define AD3 16 // PA20 + +#else + #error No ADC names of pins definition for selected ARM CPU + +#endif +/*\}*/ + +#endif /* AT91SAM7_H */ diff --git a/2.5/bertos/cpu/arm/io/lpc23xx.h b/2.5/bertos/cpu/arm/io/lpc23xx.h new file mode 100644 index 00000000..caee0953 --- /dev/null +++ b/2.5/bertos/cpu/arm/io/lpc23xx.h @@ -0,0 +1,1155 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * LPC23xx I/O registers. + */ + +#ifndef LPC23XX_H +#define LPC23XX_H + +#include + +/* Vectored Interrupt Controller (VIC) */ +#define VIC_BASE_ADDR 0xFFFFF000 +#define VICIRQStatus (*(reg32_t *)(VIC_BASE_ADDR + 0x000)) +#define VICFIQStatus (*(reg32_t *)(VIC_BASE_ADDR + 0x004)) +#define VICRawIntr (*(reg32_t *)(VIC_BASE_ADDR + 0x008)) +#define VICIntSelect (*(reg32_t *)(VIC_BASE_ADDR + 0x00C)) +#define VICIntEnable (*(reg32_t *)(VIC_BASE_ADDR + 0x010)) +#define VICIntEnClr (*(reg32_t *)(VIC_BASE_ADDR + 0x014)) +#define VICSoftInt (*(reg32_t *)(VIC_BASE_ADDR + 0x018)) +#define VICSoftIntClr (*(reg32_t *)(VIC_BASE_ADDR + 0x01C)) +#define VICProtection (*(reg32_t *)(VIC_BASE_ADDR + 0x020)) +#define VICSWPrioMask (*(reg32_t *)(VIC_BASE_ADDR + 0x024)) + +#define VICVectAddr0 (*(reg32_t *)(VIC_BASE_ADDR + 0x100)) +#define VICVectAddr1 (*(reg32_t *)(VIC_BASE_ADDR + 0x104)) +#define VICVectAddr2 (*(reg32_t *)(VIC_BASE_ADDR + 0x108)) +#define VICVectAddr3 (*(reg32_t *)(VIC_BASE_ADDR + 0x10C)) +#define VICVectAddr4 (*(reg32_t *)(VIC_BASE_ADDR + 0x110)) +#define VICVectAddr5 (*(reg32_t *)(VIC_BASE_ADDR + 0x114)) +#define VICVectAddr6 (*(reg32_t *)(VIC_BASE_ADDR + 0x118)) +#define VICVectAddr7 (*(reg32_t *)(VIC_BASE_ADDR + 0x11C)) +#define VICVectAddr8 (*(reg32_t *)(VIC_BASE_ADDR + 0x120)) +#define VICVectAddr9 (*(reg32_t *)(VIC_BASE_ADDR + 0x124)) +#define VICVectAddr10 (*(reg32_t *)(VIC_BASE_ADDR + 0x128)) +#define VICVectAddr11 (*(reg32_t *)(VIC_BASE_ADDR + 0x12C)) +#define VICVectAddr12 (*(reg32_t *)(VIC_BASE_ADDR + 0x130)) +#define VICVectAddr13 (*(reg32_t *)(VIC_BASE_ADDR + 0x134)) +#define VICVectAddr14 (*(reg32_t *)(VIC_BASE_ADDR + 0x138)) +#define VICVectAddr15 (*(reg32_t *)(VIC_BASE_ADDR + 0x13C)) +#define VICVectAddr16 (*(reg32_t *)(VIC_BASE_ADDR + 0x140)) +#define VICVectAddr17 (*(reg32_t *)(VIC_BASE_ADDR + 0x144)) +#define VICVectAddr18 (*(reg32_t *)(VIC_BASE_ADDR + 0x148)) +#define VICVectAddr19 (*(reg32_t *)(VIC_BASE_ADDR + 0x14C)) +#define VICVectAddr20 (*(reg32_t *)(VIC_BASE_ADDR + 0x150)) +#define VICVectAddr21 (*(reg32_t *)(VIC_BASE_ADDR + 0x154)) +#define VICVectAddr22 (*(reg32_t *)(VIC_BASE_ADDR + 0x158)) +#define VICVectAddr23 (*(reg32_t *)(VIC_BASE_ADDR + 0x15C)) +#define VICVectAddr24 (*(reg32_t *)(VIC_BASE_ADDR + 0x160)) +#define VICVectAddr25 (*(reg32_t *)(VIC_BASE_ADDR + 0x164)) +#define VICVectAddr26 (*(reg32_t *)(VIC_BASE_ADDR + 0x168)) +#define VICVectAddr27 (*(reg32_t *)(VIC_BASE_ADDR + 0x16C)) +#define VICVectAddr28 (*(reg32_t *)(VIC_BASE_ADDR + 0x170)) +#define VICVectAddr29 (*(reg32_t *)(VIC_BASE_ADDR + 0x174)) +#define VICVectAddr30 (*(reg32_t *)(VIC_BASE_ADDR + 0x178)) +#define VICVectAddr31 (*(reg32_t *)(VIC_BASE_ADDR + 0x17C)) + +/* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx, +these registers are known as "VICVectPriority(x)". */ +#define VICVectCntl0 (*(reg32_t *)(VIC_BASE_ADDR + 0x200)) +#define VICVectCntl1 (*(reg32_t *)(VIC_BASE_ADDR + 0x204)) +#define VICVectCntl2 (*(reg32_t *)(VIC_BASE_ADDR + 0x208)) +#define VICVectCntl3 (*(reg32_t *)(VIC_BASE_ADDR + 0x20C)) +#define VICVectCntl4 (*(reg32_t *)(VIC_BASE_ADDR + 0x210)) +#define VICVectCntl5 (*(reg32_t *)(VIC_BASE_ADDR + 0x214)) +#define VICVectCntl6 (*(reg32_t *)(VIC_BASE_ADDR + 0x218)) +#define VICVectCntl7 (*(reg32_t *)(VIC_BASE_ADDR + 0x21C)) +#define VICVectCntl8 (*(reg32_t *)(VIC_BASE_ADDR + 0x220)) +#define VICVectCntl9 (*(reg32_t *)(VIC_BASE_ADDR + 0x224)) +#define VICVectCntl10 (*(reg32_t *)(VIC_BASE_ADDR + 0x228)) +#define VICVectCntl11 (*(reg32_t *)(VIC_BASE_ADDR + 0x22C)) +#define VICVectCntl12 (*(reg32_t *)(VIC_BASE_ADDR + 0x230)) +#define VICVectCntl13 (*(reg32_t *)(VIC_BASE_ADDR + 0x234)) +#define VICVectCntl14 (*(reg32_t *)(VIC_BASE_ADDR + 0x238)) +#define VICVectCntl15 (*(reg32_t *)(VIC_BASE_ADDR + 0x23C)) +#define VICVectCntl16 (*(reg32_t *)(VIC_BASE_ADDR + 0x240)) +#define VICVectCntl17 (*(reg32_t *)(VIC_BASE_ADDR + 0x244)) +#define VICVectCntl18 (*(reg32_t *)(VIC_BASE_ADDR + 0x248)) +#define VICVectCntl19 (*(reg32_t *)(VIC_BASE_ADDR + 0x24C)) +#define VICVectCntl20 (*(reg32_t *)(VIC_BASE_ADDR + 0x250)) +#define VICVectCntl21 (*(reg32_t *)(VIC_BASE_ADDR + 0x254)) +#define VICVectCntl22 (*(reg32_t *)(VIC_BASE_ADDR + 0x258)) +#define VICVectCntl23 (*(reg32_t *)(VIC_BASE_ADDR + 0x25C)) +#define VICVectCntl24 (*(reg32_t *)(VIC_BASE_ADDR + 0x260)) +#define VICVectCntl25 (*(reg32_t *)(VIC_BASE_ADDR + 0x264)) +#define VICVectCntl26 (*(reg32_t *)(VIC_BASE_ADDR + 0x268)) +#define VICVectCntl27 (*(reg32_t *)(VIC_BASE_ADDR + 0x26C)) +#define VICVectCntl28 (*(reg32_t *)(VIC_BASE_ADDR + 0x270)) +#define VICVectCntl29 (*(reg32_t *)(VIC_BASE_ADDR + 0x274)) +#define VICVectCntl30 (*(reg32_t *)(VIC_BASE_ADDR + 0x278)) +#define VICVectCntl31 (*(reg32_t *)(VIC_BASE_ADDR + 0x27C)) + +#define VICVectAddr (*(reg32_t *)(VIC_BASE_ADDR + 0xF00)) + + +/* Pin Connect Block */ +#define PINSEL_BASE_ADDR 0xE002C000 +#define PINSEL0 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x00)) +#define PINSEL1 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x04)) +#define PINSEL2 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x08)) +#define PINSEL3 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x0C)) +#define PINSEL4 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x10)) +#define PINSEL5 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x14)) +#define PINSEL6 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x18)) +#define PINSEL7 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x1C)) +#define PINSEL8 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x20)) +#define PINSEL9 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x24)) +#define PINSEL10 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x28)) + +#define PINMODE0 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x40)) +#define PINMODE1 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x44)) +#define PINMODE2 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x48)) +#define PINMODE3 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x4C)) +#define PINMODE4 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x50)) +#define PINMODE5 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x54)) +#define PINMODE6 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x58)) +#define PINMODE7 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x5C)) +#define PINMODE8 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x60)) +#define PINMODE9 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x64)) + +/* General Purpose Input/Output (GPIO) */ +#define GPIO_BASE_ADDR 0xE0028000 +#define IOPIN0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x00)) +#define IOSET0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x04)) +#define IODIR0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x08)) +#define IOCLR0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x0C)) +#define IOPIN1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x10)) +#define IOSET1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x14)) +#define IODIR1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x18)) +#define IOCLR1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x1C)) + +/* GPIO Interrupt Registers */ +#define IO0_INT_EN_R (*(reg32_t *)(GPIO_BASE_ADDR + 0x90)) +#define IO0_INT_EN_F (*(reg32_t *)(GPIO_BASE_ADDR + 0x94)) +#define IO0_INT_STAT_R (*(reg32_t *)(GPIO_BASE_ADDR + 0x84)) +#define IO0_INT_STAT_F (*(reg32_t *)(GPIO_BASE_ADDR + 0x88)) +#define IO0_INT_CLR (*(reg32_t *)(GPIO_BASE_ADDR + 0x8C)) + +#define IO2_INT_EN_R (*(reg32_t *)(GPIO_BASE_ADDR + 0xB0)) +#define IO2_INT_EN_F (*(reg32_t *)(GPIO_BASE_ADDR + 0xB4)) +#define IO2_INT_STAT_R (*(reg32_t *)(GPIO_BASE_ADDR + 0xA4)) +#define IO2_INT_STAT_F (*(reg32_t *)(GPIO_BASE_ADDR + 0xA8)) +#define IO2_INT_CLR (*(reg32_t *)(GPIO_BASE_ADDR + 0xAC)) + +#define IO_INT_STAT (*(reg32_t *)(GPIO_BASE_ADDR + 0x80)) + +#define PARTCFG_BASE_ADDR 0x3FFF8000 +#define PARTCFG (*(reg32_t *)(PARTCFG_BASE_ADDR + 0x00)) + +/* Fast I/O setup */ +#define FIO_BASE_ADDR 0x3FFFC000 +#define FIO0DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x00)) +#define FIO0MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x10)) +#define FIO0PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x14)) +#define FIO0SET (*(reg32_t *)(FIO_BASE_ADDR + 0x18)) +#define FIO0CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x1C)) + +#define FIO1DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x20)) +#define FIO1MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x30)) +#define FIO1PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x34)) +#define FIO1SET (*(reg32_t *)(FIO_BASE_ADDR + 0x38)) +#define FIO1CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x3C)) + +#define FIO2DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x40)) +#define FIO2MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x50)) +#define FIO2PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x54)) +#define FIO2SET (*(reg32_t *)(FIO_BASE_ADDR + 0x58)) +#define FIO2CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x5C)) + +#define FIO3DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x60)) +#define FIO3MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x70)) +#define FIO3PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x74)) +#define FIO3SET (*(reg32_t *)(FIO_BASE_ADDR + 0x78)) +#define FIO3CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x7C)) + +#define FIO4DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x80)) +#define FIO4MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x90)) +#define FIO4PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x94)) +#define FIO4SET (*(reg32_t *)(FIO_BASE_ADDR + 0x98)) +#define FIO4CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x9C)) + +/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ +#define FIO0DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x01)) +#define FIO1DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x21)) +#define FIO2DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x41)) +#define FIO3DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x61)) +#define FIO4DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x81)) + +#define FIO0DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x03)) +#define FIO1DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x23)) +#define FIO2DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x43)) +#define FIO3DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x63)) +#define FIO4DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x83)) + +#define FIO0DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x11)) +#define FIO1MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x21)) +#define FIO2MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x51)) +#define FIO3MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x71)) +#define FIO4MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x91)) + +#define FIO0MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x13)) +#define FIO1MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x33)) +#define FIO2MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x53)) +#define FIO3MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x73)) +#define FIO4MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x93)) + +#define FIO0MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x15)) +#define FIO1PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x25)) +#define FIO2PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x55)) +#define FIO3PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x75)) +#define FIO4PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x95)) + +#define FIO0PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x17)) +#define FIO1PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x37)) +#define FIO2PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x57)) +#define FIO3PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x77)) +#define FIO4PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x97)) + +#define FIO0PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x19)) +#define FIO1SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x29)) +#define FIO2SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x59)) +#define FIO3SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x79)) +#define FIO4SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x99)) + +#define FIO0SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x1B)) +#define FIO1SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x3B)) +#define FIO2SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x5B)) +#define FIO3SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x7B)) +#define FIO4SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x9B)) + +#define FIO0SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x1D)) +#define FIO1CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x2D)) +#define FIO2CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x5D)) +#define FIO3CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x7D)) +#define FIO4CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x9D)) + +#define FIO0CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x9E)) + +#define FIO0CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x1F)) +#define FIO1CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x3F)) +#define FIO2CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x5F)) +#define FIO3CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x7F)) +#define FIO4CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x9F)) + +#define FIO0CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x9E)) + + +/* System Control Block(SCB) modules include Memory Accelerator Module, +Phase Locked Loop, VPB divider, Power Control, External Interrupt, +Reset, and Code Security/Debugging */ +#define SCB_BASE_ADDR 0xE01FC000 + +/* Memory Accelerator Module (MAM) */ +#define MAMCR (*(reg32_t *)(SCB_BASE_ADDR + 0x000)) +#define MAMTIM (*(reg32_t *)(SCB_BASE_ADDR + 0x004)) +#define MEMMAP (*(reg32_t *)(SCB_BASE_ADDR + 0x040)) + +/* Phase Locked Loop (PLL) */ +#define PLLCON (*(reg32_t *)(SCB_BASE_ADDR + 0x080)) +#define PLLCFG (*(reg32_t *)(SCB_BASE_ADDR + 0x084)) +#define PLLSTAT (*(reg32_t *)(SCB_BASE_ADDR + 0x088)) +#define PLLFEED (*(reg32_t *)(SCB_BASE_ADDR + 0x08C)) + +/* Power Control */ +#define PCON (*(reg32_t *)(SCB_BASE_ADDR + 0x0C0)) +#define PCONP (*(reg32_t *)(SCB_BASE_ADDR + 0x0C4)) + +/* Clock Divider */ +// #define APBDIV (*(reg32_t *)(SCB_BASE_ADDR + 0x100)) +#define CCLKCFG (*(reg32_t *)(SCB_BASE_ADDR + 0x104)) +#define USBCLKCFG (*(reg32_t *)(SCB_BASE_ADDR + 0x108)) +#define CLKSRCSEL (*(reg32_t *)(SCB_BASE_ADDR + 0x10C)) +#define PCLKSEL0 (*(reg32_t *)(SCB_BASE_ADDR + 0x1A8)) +#define PCLKSEL1 (*(reg32_t *)(SCB_BASE_ADDR + 0x1AC)) + +/* External Interrupts */ +#define EXTINT (*(reg32_t *)(SCB_BASE_ADDR + 0x140)) +#define INTWAKE (*(reg32_t *)(SCB_BASE_ADDR + 0x144)) +#define EXTMODE (*(reg32_t *)(SCB_BASE_ADDR + 0x148)) +#define EXTPOLAR (*(reg32_t *)(SCB_BASE_ADDR + 0x14C)) + +/* Reset, reset source identification */ +#define RSIR (*(reg32_t *)(SCB_BASE_ADDR + 0x180)) + +/* RSID, code security protection */ +#define CSPR (*(reg32_t *)(SCB_BASE_ADDR + 0x184)) + +/* AHB configuration */ +#define AHBCFG1 (*(reg32_t *)(SCB_BASE_ADDR + 0x188)) +#define AHBCFG2 (*(reg32_t *)(SCB_BASE_ADDR + 0x18C)) + +/* System Controls and Status */ +#define SCS (*(reg32_t *)(SCB_BASE_ADDR + 0x1A0)) + +/* MPMC(EMC) registers, note: all the external memory controller(EMC) registers +are for LPC24xx only. */ +#define STATIC_MEM0_BASE 0x80000000 +#define STATIC_MEM1_BASE 0x81000000 +#define STATIC_MEM2_BASE 0x82000000 +#define STATIC_MEM3_BASE 0x83000000 + +#define DYNAMIC_MEM0_BASE 0xA0000000 +#define DYNAMIC_MEM1_BASE 0xB0000000 +#define DYNAMIC_MEM2_BASE 0xC0000000 +#define DYNAMIC_MEM3_BASE 0xD0000000 + +/* External Memory Controller (EMC) */ +#define EMC_BASE_ADDR 0xFFE08000 +#define EMC_CTRL (*(reg32_t *)(EMC_BASE_ADDR + 0x000)) +#define EMC_STAT (*(reg32_t *)(EMC_BASE_ADDR + 0x004)) +#define EMC_CONFIG (*(reg32_t *)(EMC_BASE_ADDR + 0x008)) + +/* Dynamic RAM access registers */ +#define EMC_DYN_CTRL (*(reg32_t *)(EMC_BASE_ADDR + 0x020)) +#define EMC_DYN_RFSH (*(reg32_t *)(EMC_BASE_ADDR + 0x024)) +#define EMC_DYN_RD_CFG (*(reg32_t *)(EMC_BASE_ADDR + 0x028)) +#define EMC_DYN_RP (*(reg32_t *)(EMC_BASE_ADDR + 0x030)) +#define EMC_DYN_RAS (*(reg32_t *)(EMC_BASE_ADDR + 0x034)) +#define EMC_DYN_SREX (*(reg32_t *)(EMC_BASE_ADDR + 0x038)) +#define EMC_DYN_APR (*(reg32_t *)(EMC_BASE_ADDR + 0x03C)) +#define EMC_DYN_DAL (*(reg32_t *)(EMC_BASE_ADDR + 0x040)) +#define EMC_DYN_WR (*(reg32_t *)(EMC_BASE_ADDR + 0x044)) +#define EMC_DYN_RC (*(reg32_t *)(EMC_BASE_ADDR + 0x048)) +#define EMC_DYN_RFC (*(reg32_t *)(EMC_BASE_ADDR + 0x04C)) +#define EMC_DYN_XSR (*(reg32_t *)(EMC_BASE_ADDR + 0x050)) +#define EMC_DYN_RRD (*(reg32_t *)(EMC_BASE_ADDR + 0x054)) +#define EMC_DYN_MRD (*(reg32_t *)(EMC_BASE_ADDR + 0x058)) + +#define EMC_DYN_CFG0 (*(reg32_t *)(EMC_BASE_ADDR + 0x100)) +#define EMC_DYN_RASCAS0 (*(reg32_t *)(EMC_BASE_ADDR + 0x104)) +#define EMC_DYN_CFG1 (*(reg32_t *)(EMC_BASE_ADDR + 0x140)) +#define EMC_DYN_RASCAS1 (*(reg32_t *)(EMC_BASE_ADDR + 0x144)) +#define EMC_DYN_CFG2 (*(reg32_t *)(EMC_BASE_ADDR + 0x160)) +#define EMC_DYN_RASCAS2 (*(reg32_t *)(EMC_BASE_ADDR + 0x164)) +#define EMC_DYN_CFG3 (*(reg32_t *)(EMC_BASE_ADDR + 0x180)) +#define EMC_DYN_RASCAS3 (*(reg32_t *)(EMC_BASE_ADDR + 0x184)) + +/* static RAM access registers */ +#define EMC_STA_CFG0 (*(reg32_t *)(EMC_BASE_ADDR + 0x200)) +#define EMC_STA_WAITWEN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x204)) +#define EMC_STA_WAITOEN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x208)) +#define EMC_STA_WAITRD0 (*(reg32_t *)(EMC_BASE_ADDR + 0x20C)) +#define EMC_STA_WAITPAGE0 (*(reg32_t *)(EMC_BASE_ADDR + 0x210)) +#define EMC_STA_WAITWR0 (*(reg32_t *)(EMC_BASE_ADDR + 0x214)) +#define EMC_STA_WAITTURN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x218)) + +#define EMC_STA_CFG1 (*(reg32_t *)(EMC_BASE_ADDR + 0x220)) +#define EMC_STA_WAITWEN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x224)) +#define EMC_STA_WAITOEN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x228)) +#define EMC_STA_WAITRD1 (*(reg32_t *)(EMC_BASE_ADDR + 0x22C)) +#define EMC_STA_WAITPAGE1 (*(reg32_t *)(EMC_BASE_ADDR + 0x230)) +#define EMC_STA_WAITWR1 (*(reg32_t *)(EMC_BASE_ADDR + 0x234)) +#define EMC_STA_WAITTURN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x238)) + +#define EMC_STA_CFG2 (*(reg32_t *)(EMC_BASE_ADDR + 0x240)) +#define EMC_STA_WAITWEN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x244)) +#define EMC_STA_WAITOEN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x248)) +#define EMC_STA_WAITRD2 (*(reg32_t *)(EMC_BASE_ADDR + 0x24C)) +#define EMC_STA_WAITPAGE2 (*(reg32_t *)(EMC_BASE_ADDR + 0x250)) +#define EMC_STA_WAITWR2 (*(reg32_t *)(EMC_BASE_ADDR + 0x254)) +#define EMC_STA_WAITTURN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x258)) + +#define EMC_STA_CFG3 (*(reg32_t *)(EMC_BASE_ADDR + 0x260)) +#define EMC_STA_WAITWEN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x264)) +#define EMC_STA_WAITOEN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x268)) +#define EMC_STA_WAITRD3 (*(reg32_t *)(EMC_BASE_ADDR + 0x26C)) +#define EMC_STA_WAITPAGE3 (*(reg32_t *)(EMC_BASE_ADDR + 0x270)) +#define EMC_STA_WAITWR3 (*(reg32_t *)(EMC_BASE_ADDR + 0x274)) +#define EMC_STA_WAITTURN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x278)) + +#define EMC_STA_EXT_WAIT (*(reg32_t *)(EMC_BASE_ADDR + 0x880)) + + +/* Timer 0 */ +#define TMR0_BASE_ADDR 0xE0004000 +#define T0IR (*(reg32_t *)(TMR0_BASE_ADDR + 0x00)) +#define T0TCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x04)) +#define T0TC (*(reg32_t *)(TMR0_BASE_ADDR + 0x08)) +#define T0PR (*(reg32_t *)(TMR0_BASE_ADDR + 0x0C)) +#define T0PC (*(reg32_t *)(TMR0_BASE_ADDR + 0x10)) +#define T0MCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x14)) +#define T0MR0 (*(reg32_t *)(TMR0_BASE_ADDR + 0x18)) +#define T0MR1 (*(reg32_t *)(TMR0_BASE_ADDR + 0x1C)) +#define T0MR2 (*(reg32_t *)(TMR0_BASE_ADDR + 0x20)) +#define T0MR3 (*(reg32_t *)(TMR0_BASE_ADDR + 0x24)) +#define T0CCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x28)) +#define T0CR0 (*(reg32_t *)(TMR0_BASE_ADDR + 0x2C)) +#define T0CR1 (*(reg32_t *)(TMR0_BASE_ADDR + 0x30)) +#define T0CR2 (*(reg32_t *)(TMR0_BASE_ADDR + 0x34)) +#define T0CR3 (*(reg32_t *)(TMR0_BASE_ADDR + 0x38)) +#define T0EMR (*(reg32_t *)(TMR0_BASE_ADDR + 0x3C)) +#define T0CTCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x70)) + +/* Timer 1 */ +#define TMR1_BASE_ADDR 0xE0008000 +#define T1IR (*(reg32_t *)(TMR1_BASE_ADDR + 0x00)) +#define T1TCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x04)) +#define T1TC (*(reg32_t *)(TMR1_BASE_ADDR + 0x08)) +#define T1PR (*(reg32_t *)(TMR1_BASE_ADDR + 0x0C)) +#define T1PC (*(reg32_t *)(TMR1_BASE_ADDR + 0x10)) +#define T1MCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x14)) +#define T1MR0 (*(reg32_t *)(TMR1_BASE_ADDR + 0x18)) +#define T1MR1 (*(reg32_t *)(TMR1_BASE_ADDR + 0x1C)) +#define T1MR2 (*(reg32_t *)(TMR1_BASE_ADDR + 0x20)) +#define T1MR3 (*(reg32_t *)(TMR1_BASE_ADDR + 0x24)) +#define T1CCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x28)) +#define T1CR0 (*(reg32_t *)(TMR1_BASE_ADDR + 0x2C)) +#define T1CR1 (*(reg32_t *)(TMR1_BASE_ADDR + 0x30)) +#define T1CR2 (*(reg32_t *)(TMR1_BASE_ADDR + 0x34)) +#define T1CR3 (*(reg32_t *)(TMR1_BASE_ADDR + 0x38)) +#define T1EMR (*(reg32_t *)(TMR1_BASE_ADDR + 0x3C)) +#define T1CTCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x70)) + +/* Timer 2 */ +#define TMR2_BASE_ADDR 0xE0070000 +#define T2IR (*(reg32_t *)(TMR2_BASE_ADDR + 0x00)) +#define T2TCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x04)) +#define T2TC (*(reg32_t *)(TMR2_BASE_ADDR + 0x08)) +#define T2PR (*(reg32_t *)(TMR2_BASE_ADDR + 0x0C)) +#define T2PC (*(reg32_t *)(TMR2_BASE_ADDR + 0x10)) +#define T2MCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x14)) +#define T2MR0 (*(reg32_t *)(TMR2_BASE_ADDR + 0x18)) +#define T2MR1 (*(reg32_t *)(TMR2_BASE_ADDR + 0x1C)) +#define T2MR2 (*(reg32_t *)(TMR2_BASE_ADDR + 0x20)) +#define T2MR3 (*(reg32_t *)(TMR2_BASE_ADDR + 0x24)) +#define T2CCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x28)) +#define T2CR0 (*(reg32_t *)(TMR2_BASE_ADDR + 0x2C)) +#define T2CR1 (*(reg32_t *)(TMR2_BASE_ADDR + 0x30)) +#define T2CR2 (*(reg32_t *)(TMR2_BASE_ADDR + 0x34)) +#define T2CR3 (*(reg32_t *)(TMR2_BASE_ADDR + 0x38)) +#define T2EMR (*(reg32_t *)(TMR2_BASE_ADDR + 0x3C)) +#define T2CTCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x70)) + +/* Timer 3 */ +#define TMR3_BASE_ADDR 0xE0074000 +#define T3IR (*(reg32_t *)(TMR3_BASE_ADDR + 0x00)) +#define T3TCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x04)) +#define T3TC (*(reg32_t *)(TMR3_BASE_ADDR + 0x08)) +#define T3PR (*(reg32_t *)(TMR3_BASE_ADDR + 0x0C)) +#define T3PC (*(reg32_t *)(TMR3_BASE_ADDR + 0x10)) +#define T3MCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x14)) +#define T3MR0 (*(reg32_t *)(TMR3_BASE_ADDR + 0x18)) +#define T3MR1 (*(reg32_t *)(TMR3_BASE_ADDR + 0x1C)) +#define T3MR2 (*(reg32_t *)(TMR3_BASE_ADDR + 0x20)) +#define T3MR3 (*(reg32_t *)(TMR3_BASE_ADDR + 0x24)) +#define T3CCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x28)) +#define T3CR0 (*(reg32_t *)(TMR3_BASE_ADDR + 0x2C)) +#define T3CR1 (*(reg32_t *)(TMR3_BASE_ADDR + 0x30)) +#define T3CR2 (*(reg32_t *)(TMR3_BASE_ADDR + 0x34)) +#define T3CR3 (*(reg32_t *)(TMR3_BASE_ADDR + 0x38)) +#define T3EMR (*(reg32_t *)(TMR3_BASE_ADDR + 0x3C)) +#define T3CTCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x70)) + + +/* Pulse Width Modulator (PWM) */ +#define PWM0_BASE_ADDR 0xE0014000 +#define PWM0IR (*(reg32_t *)(PWM0_BASE_ADDR + 0x00)) +#define PWM0TCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x04)) +#define PWM0TC (*(reg32_t *)(PWM0_BASE_ADDR + 0x08)) +#define PWM0PR (*(reg32_t *)(PWM0_BASE_ADDR + 0x0C)) +#define PWM0PC (*(reg32_t *)(PWM0_BASE_ADDR + 0x10)) +#define PWM0MCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x14)) +#define PWM0MR0 (*(reg32_t *)(PWM0_BASE_ADDR + 0x18)) +#define PWM0MR1 (*(reg32_t *)(PWM0_BASE_ADDR + 0x1C)) +#define PWM0MR2 (*(reg32_t *)(PWM0_BASE_ADDR + 0x20)) +#define PWM0MR3 (*(reg32_t *)(PWM0_BASE_ADDR + 0x24)) +#define PWM0CCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x28)) +#define PWM0CR0 (*(reg32_t *)(PWM0_BASE_ADDR + 0x2C)) +#define PWM0CR1 (*(reg32_t *)(PWM0_BASE_ADDR + 0x30)) +#define PWM0CR2 (*(reg32_t *)(PWM0_BASE_ADDR + 0x34)) +#define PWM0CR3 (*(reg32_t *)(PWM0_BASE_ADDR + 0x38)) +#define PWM0EMR (*(reg32_t *)(PWM0_BASE_ADDR + 0x3C)) +#define PWM0MR4 (*(reg32_t *)(PWM0_BASE_ADDR + 0x40)) +#define PWM0MR5 (*(reg32_t *)(PWM0_BASE_ADDR + 0x44)) +#define PWM0MR6 (*(reg32_t *)(PWM0_BASE_ADDR + 0x48)) +#define PWM0PCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x4C)) +#define PWM0LER (*(reg32_t *)(PWM0_BASE_ADDR + 0x50)) +#define PWM0CTCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x70)) + +#define PWM1_BASE_ADDR 0xE0018000 +#define PWM1IR (*(reg32_t *)(PWM1_BASE_ADDR + 0x00)) +#define PWM1TCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x04)) +#define PWM1TC (*(reg32_t *)(PWM1_BASE_ADDR + 0x08)) +#define PWM1PR (*(reg32_t *)(PWM1_BASE_ADDR + 0x0C)) +#define PWM1PC (*(reg32_t *)(PWM1_BASE_ADDR + 0x10)) +#define PWM1MCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x14)) +#define PWM1MR0 (*(reg32_t *)(PWM1_BASE_ADDR + 0x18)) +#define PWM1MR1 (*(reg32_t *)(PWM1_BASE_ADDR + 0x1C)) +#define PWM1MR2 (*(reg32_t *)(PWM1_BASE_ADDR + 0x20)) +#define PWM1MR3 (*(reg32_t *)(PWM1_BASE_ADDR + 0x24)) +#define PWM1CCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x28)) +#define PWM1CR0 (*(reg32_t *)(PWM1_BASE_ADDR + 0x2C)) +#define PWM1CR1 (*(reg32_t *)(PWM1_BASE_ADDR + 0x30)) +#define PWM1CR2 (*(reg32_t *)(PWM1_BASE_ADDR + 0x34)) +#define PWM1CR3 (*(reg32_t *)(PWM1_BASE_ADDR + 0x38)) +#define PWM1EMR (*(reg32_t *)(PWM1_BASE_ADDR + 0x3C)) +#define PWM1MR4 (*(reg32_t *)(PWM1_BASE_ADDR + 0x40)) +#define PWM1MR5 (*(reg32_t *)(PWM1_BASE_ADDR + 0x44)) +#define PWM1MR6 (*(reg32_t *)(PWM1_BASE_ADDR + 0x48)) +#define PWM1PCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x4C)) +#define PWM1LER (*(reg32_t *)(PWM1_BASE_ADDR + 0x50)) +#define PWM1CTCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x70)) + + +/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ +#define UART0_BASE_ADDR 0xE000C000 +#define U0RBR (*(reg32_t *)(UART0_BASE_ADDR + 0x00)) +#define U0THR (*(reg32_t *)(UART0_BASE_ADDR + 0x00)) +#define U0DLL (*(reg32_t *)(UART0_BASE_ADDR + 0x00)) +#define U0DLM (*(reg32_t *)(UART0_BASE_ADDR + 0x04)) +#define U0IER (*(reg32_t *)(UART0_BASE_ADDR + 0x04)) +#define U0IIR (*(reg32_t *)(UART0_BASE_ADDR + 0x08)) +#define U0FCR (*(reg32_t *)(UART0_BASE_ADDR + 0x08)) +#define U0LCR (*(reg32_t *)(UART0_BASE_ADDR + 0x0C)) +#define U0LSR (*(reg32_t *)(UART0_BASE_ADDR + 0x14)) +#define U0SCR (*(reg32_t *)(UART0_BASE_ADDR + 0x1C)) +#define U0ACR (*(reg32_t *)(UART0_BASE_ADDR + 0x20)) +#define U0ICR (*(reg32_t *)(UART0_BASE_ADDR + 0x24)) +#define U0FDR (*(reg32_t *)(UART0_BASE_ADDR + 0x28)) +#define U0TER (*(reg32_t *)(UART0_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ +#define UART1_BASE_ADDR 0xE0010000 +#define U1RBR (*(reg32_t *)(UART1_BASE_ADDR + 0x00)) +#define U1THR (*(reg32_t *)(UART1_BASE_ADDR + 0x00)) +#define U1DLL (*(reg32_t *)(UART1_BASE_ADDR + 0x00)) +#define U1DLM (*(reg32_t *)(UART1_BASE_ADDR + 0x04)) +#define U1IER (*(reg32_t *)(UART1_BASE_ADDR + 0x04)) +#define U1IIR (*(reg32_t *)(UART1_BASE_ADDR + 0x08)) +#define U1FCR (*(reg32_t *)(UART1_BASE_ADDR + 0x08)) +#define U1LCR (*(reg32_t *)(UART1_BASE_ADDR + 0x0C)) +#define U1MCR (*(reg32_t *)(UART1_BASE_ADDR + 0x10)) +#define U1LSR (*(reg32_t *)(UART1_BASE_ADDR + 0x14)) +#define U1MSR (*(reg32_t *)(UART1_BASE_ADDR + 0x18)) +#define U1SCR (*(reg32_t *)(UART1_BASE_ADDR + 0x1C)) +#define U1ACR (*(reg32_t *)(UART1_BASE_ADDR + 0x20)) +#define U1FDR (*(reg32_t *)(UART1_BASE_ADDR + 0x28)) +#define U1TER (*(reg32_t *)(UART1_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ +#define UART2_BASE_ADDR 0xE0078000 +#define U2RBR (*(reg32_t *)(UART2_BASE_ADDR + 0x00)) +#define U2THR (*(reg32_t *)(UART2_BASE_ADDR + 0x00)) +#define U2DLL (*(reg32_t *)(UART2_BASE_ADDR + 0x00)) +#define U2DLM (*(reg32_t *)(UART2_BASE_ADDR + 0x04)) +#define U2IER (*(reg32_t *)(UART2_BASE_ADDR + 0x04)) +#define U2IIR (*(reg32_t *)(UART2_BASE_ADDR + 0x08)) +#define U2FCR (*(reg32_t *)(UART2_BASE_ADDR + 0x08)) +#define U2LCR (*(reg32_t *)(UART2_BASE_ADDR + 0x0C)) +#define U2LSR (*(reg32_t *)(UART2_BASE_ADDR + 0x14)) +#define U2SCR (*(reg32_t *)(UART2_BASE_ADDR + 0x1C)) +#define U2ACR (*(reg32_t *)(UART2_BASE_ADDR + 0x20)) +#define U2ICR (*(reg32_t *)(UART2_BASE_ADDR + 0x24)) +#define U2FDR (*(reg32_t *)(UART2_BASE_ADDR + 0x28)) +#define U2TER (*(reg32_t *)(UART2_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ +#define UART3_BASE_ADDR 0xE007C000 +#define U3RBR (*(reg32_t *)(UART3_BASE_ADDR + 0x00)) +#define U3THR (*(reg32_t *)(UART3_BASE_ADDR + 0x00)) +#define U3DLL (*(reg32_t *)(UART3_BASE_ADDR + 0x00)) +#define U3DLM (*(reg32_t *)(UART3_BASE_ADDR + 0x04)) +#define U3IER (*(reg32_t *)(UART3_BASE_ADDR + 0x04)) +#define U3IIR (*(reg32_t *)(UART3_BASE_ADDR + 0x08)) +#define U3FCR (*(reg32_t *)(UART3_BASE_ADDR + 0x08)) +#define U3LCR (*(reg32_t *)(UART3_BASE_ADDR + 0x0C)) +#define U3LSR (*(reg32_t *)(UART3_BASE_ADDR + 0x14)) +#define U3SCR (*(reg32_t *)(UART3_BASE_ADDR + 0x1C)) +#define U3ACR (*(reg32_t *)(UART3_BASE_ADDR + 0x20)) +#define U3ICR (*(reg32_t *)(UART3_BASE_ADDR + 0x24)) +#define U3FDR (*(reg32_t *)(UART3_BASE_ADDR + 0x28)) +#define U3TER (*(reg32_t *)(UART3_BASE_ADDR + 0x30)) + +/* I2C Interface 0 */ +#define I2C0_BASE_ADDR 0xE001C000 +#define I20CONSET (*(reg32_t *)(I2C0_BASE_ADDR + 0x00)) +#define I20STAT (*(reg32_t *)(I2C0_BASE_ADDR + 0x04)) +#define I20DAT (*(reg32_t *)(I2C0_BASE_ADDR + 0x08)) +#define I20ADR (*(reg32_t *)(I2C0_BASE_ADDR + 0x0C)) +#define I20SCLH (*(reg32_t *)(I2C0_BASE_ADDR + 0x10)) +#define I20SCLL (*(reg32_t *)(I2C0_BASE_ADDR + 0x14)) +#define I20CONCLR (*(reg32_t *)(I2C0_BASE_ADDR + 0x18)) + +/* I2C Interface 1 */ +#define I2C1_BASE_ADDR 0xE005C000 +#define I21CONSET (*(reg32_t *)(I2C1_BASE_ADDR + 0x00)) +#define I21STAT (*(reg32_t *)(I2C1_BASE_ADDR + 0x04)) +#define I21DAT (*(reg32_t *)(I2C1_BASE_ADDR + 0x08)) +#define I21ADR (*(reg32_t *)(I2C1_BASE_ADDR + 0x0C)) +#define I21SCLH (*(reg32_t *)(I2C1_BASE_ADDR + 0x10)) +#define I21SCLL (*(reg32_t *)(I2C1_BASE_ADDR + 0x14)) +#define I21CONCLR (*(reg32_t *)(I2C1_BASE_ADDR + 0x18)) + +/* I2C Interface 2 */ +#define I2C2_BASE_ADDR 0xE0080000 +#define I22CONSET (*(reg32_t *)(I2C2_BASE_ADDR + 0x00)) +#define I22STAT (*(reg32_t *)(I2C2_BASE_ADDR + 0x04)) +#define I22DAT (*(reg32_t *)(I2C2_BASE_ADDR + 0x08)) +#define I22ADR (*(reg32_t *)(I2C2_BASE_ADDR + 0x0C)) +#define I22SCLH (*(reg32_t *)(I2C2_BASE_ADDR + 0x10)) +#define I22SCLL (*(reg32_t *)(I2C2_BASE_ADDR + 0x14)) +#define I22CONCLR (*(reg32_t *)(I2C2_BASE_ADDR + 0x18)) + +/* SPI0 (Serial Peripheral Interface 0) */ +#define SPI0_BASE_ADDR 0xE0020000 +#define S0SPCR (*(reg32_t *)(SPI0_BASE_ADDR + 0x00)) +#define S0SPSR (*(reg32_t *)(SPI0_BASE_ADDR + 0x04)) +#define S0SPDR (*(reg32_t *)(SPI0_BASE_ADDR + 0x08)) +#define S0SPCCR (*(reg32_t *)(SPI0_BASE_ADDR + 0x0C)) +#define S0SPINT (*(reg32_t *)(SPI0_BASE_ADDR + 0x1C)) + +/* SSP0 Controller */ +#define SSP0_BASE_ADDR 0xE0068000 +#define SSP0CR0 (*(reg32_t *)(SSP0_BASE_ADDR + 0x00)) +#define SSP0CR1 (*(reg32_t *)(SSP0_BASE_ADDR + 0x04)) +#define SSP0DR (*(reg32_t *)(SSP0_BASE_ADDR + 0x08)) +#define SSP0SR (*(reg32_t *)(SSP0_BASE_ADDR + 0x0C)) +#define SSP0CPSR (*(reg32_t *)(SSP0_BASE_ADDR + 0x10)) +#define SSP0IMSC (*(reg32_t *)(SSP0_BASE_ADDR + 0x14)) +#define SSP0RIS (*(reg32_t *)(SSP0_BASE_ADDR + 0x18)) +#define SSP0MIS (*(reg32_t *)(SSP0_BASE_ADDR + 0x1C)) +#define SSP0ICR (*(reg32_t *)(SSP0_BASE_ADDR + 0x20)) +#define SSP0DMACR (*(reg32_t *)(SSP0_BASE_ADDR + 0x24)) + +/* SSP1 Controller */ +#define SSP1_BASE_ADDR 0xE0030000 +#define SSP1CR0 (*(reg32_t *)(SSP1_BASE_ADDR + 0x00)) +#define SSP1CR1 (*(reg32_t *)(SSP1_BASE_ADDR + 0x04)) +#define SSP1DR (*(reg32_t *)(SSP1_BASE_ADDR + 0x08)) +#define SSP1SR (*(reg32_t *)(SSP1_BASE_ADDR + 0x0C)) +#define SSP1CPSR (*(reg32_t *)(SSP1_BASE_ADDR + 0x10)) +#define SSP1IMSC (*(reg32_t *)(SSP1_BASE_ADDR + 0x14)) +#define SSP1RIS (*(reg32_t *)(SSP1_BASE_ADDR + 0x18)) +#define SSP1MIS (*(reg32_t *)(SSP1_BASE_ADDR + 0x1C)) +#define SSP1ICR (*(reg32_t *)(SSP1_BASE_ADDR + 0x20)) +#define SSP1DMACR (*(reg32_t *)(SSP1_BASE_ADDR + 0x24)) + + +/* Real Time Clock */ +#define RTC_BASE_ADDR 0xE0024000 +#define RTC_ILR (*(reg32_t *)(RTC_BASE_ADDR + 0x00)) +#define RTC_CTC (*(reg32_t *)(RTC_BASE_ADDR + 0x04)) +#define RTC_CCR (*(reg32_t *)(RTC_BASE_ADDR + 0x08)) +#define RTC_CIIR (*(reg32_t *)(RTC_BASE_ADDR + 0x0C)) +#define RTC_AMR (*(reg32_t *)(RTC_BASE_ADDR + 0x10)) +#define RTC_CTIME0 (*(reg32_t *)(RTC_BASE_ADDR + 0x14)) +#define RTC_CTIME1 (*(reg32_t *)(RTC_BASE_ADDR + 0x18)) +#define RTC_CTIME2 (*(reg32_t *)(RTC_BASE_ADDR + 0x1C)) +#define RTC_SEC (*(reg32_t *)(RTC_BASE_ADDR + 0x20)) +#define RTC_MIN (*(reg32_t *)(RTC_BASE_ADDR + 0x24)) +#define RTC_HOUR (*(reg32_t *)(RTC_BASE_ADDR + 0x28)) +#define RTC_DOM (*(reg32_t *)(RTC_BASE_ADDR + 0x2C)) +#define RTC_DOW (*(reg32_t *)(RTC_BASE_ADDR + 0x30)) +#define RTC_DOY (*(reg32_t *)(RTC_BASE_ADDR + 0x34)) +#define RTC_MONTH (*(reg32_t *)(RTC_BASE_ADDR + 0x38)) +#define RTC_YEAR (*(reg32_t *)(RTC_BASE_ADDR + 0x3C)) +#define RTC_CISS (*(reg32_t *)(RTC_BASE_ADDR + 0x40)) +#define RTC_ALSEC (*(reg32_t *)(RTC_BASE_ADDR + 0x60)) +#define RTC_ALMIN (*(reg32_t *)(RTC_BASE_ADDR + 0x64)) +#define RTC_ALHOUR (*(reg32_t *)(RTC_BASE_ADDR + 0x68)) +#define RTC_ALDOM (*(reg32_t *)(RTC_BASE_ADDR + 0x6C)) +#define RTC_ALDOW (*(reg32_t *)(RTC_BASE_ADDR + 0x70)) +#define RTC_ALDOY (*(reg32_t *)(RTC_BASE_ADDR + 0x74)) +#define RTC_ALMON (*(reg32_t *)(RTC_BASE_ADDR + 0x78)) +#define RTC_ALYEAR (*(reg32_t *)(RTC_BASE_ADDR + 0x7C)) +#define RTC_PREINT (*(reg32_t *)(RTC_BASE_ADDR + 0x80)) +#define RTC_PREFRAC (*(reg32_t *)(RTC_BASE_ADDR + 0x84)) + + +/* A/D Converter 0 (AD0) */ +#define AD0_BASE_ADDR 0xE0034000 +#define AD0CR (*(reg32_t *)(AD0_BASE_ADDR + 0x00)) +#define AD0GDR (*(reg32_t *)(AD0_BASE_ADDR + 0x04)) +#define AD0INTEN (*(reg32_t *)(AD0_BASE_ADDR + 0x0C)) +#define AD0DR0 (*(reg32_t *)(AD0_BASE_ADDR + 0x10)) +#define AD0DR1 (*(reg32_t *)(AD0_BASE_ADDR + 0x14)) +#define AD0DR2 (*(reg32_t *)(AD0_BASE_ADDR + 0x18)) +#define AD0DR3 (*(reg32_t *)(AD0_BASE_ADDR + 0x1C)) +#define AD0DR4 (*(reg32_t *)(AD0_BASE_ADDR + 0x20)) +#define AD0DR5 (*(reg32_t *)(AD0_BASE_ADDR + 0x24)) +#define AD0DR6 (*(reg32_t *)(AD0_BASE_ADDR + 0x28)) +#define AD0DR7 (*(reg32_t *)(AD0_BASE_ADDR + 0x2C)) +#define AD0STAT (*(reg32_t *)(AD0_BASE_ADDR + 0x30)) + + +/* D/A Converter */ +#define DAC_BASE_ADDR 0xE006C000 +#define DACR (*(reg32_t *)(DAC_BASE_ADDR + 0x00)) + + +/* Watchdog */ +#define WDG_BASE_ADDR 0xE0000000 +#define WDMOD (*(reg32_t *)(WDG_BASE_ADDR + 0x00)) +#define WDTC (*(reg32_t *)(WDG_BASE_ADDR + 0x04)) +#define WDFEED (*(reg32_t *)(WDG_BASE_ADDR + 0x08)) +#define WDTV (*(reg32_t *)(WDG_BASE_ADDR + 0x0C)) +#define WDCLKSEL (*(reg32_t *)(WDG_BASE_ADDR + 0x10)) + +/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ +#define CAN_ACCEPT_BASE_ADDR 0xE003C000 +#define CAN_AFMR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x00)) +#define CAN_SFF_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x04)) +#define CAN_SFF_GRP_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x08)) +#define CAN_EFF_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) +#define CAN_EFF_GRP_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x10)) +#define CAN_EOT (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x14)) +#define CAN_LUT_ERR_ADR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x18)) +#define CAN_LUT_ERR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) + +#define CAN_CENTRAL_BASE_ADDR 0xE0040000 +#define CAN_TX_SR (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x00)) +#define CAN_RX_SR (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x04)) +#define CAN_MSR (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x08)) + +#define CAN1_BASE_ADDR 0xE0044000 +#define CAN1MOD (*(reg32_t *)(CAN1_BASE_ADDR + 0x00)) +#define CAN1CMR (*(reg32_t *)(CAN1_BASE_ADDR + 0x04)) +#define CAN1GSR (*(reg32_t *)(CAN1_BASE_ADDR + 0x08)) +#define CAN1ICR (*(reg32_t *)(CAN1_BASE_ADDR + 0x0C)) +#define CAN1IER (*(reg32_t *)(CAN1_BASE_ADDR + 0x10)) +#define CAN1BTR (*(reg32_t *)(CAN1_BASE_ADDR + 0x14)) +#define CAN1EWL (*(reg32_t *)(CAN1_BASE_ADDR + 0x18)) +#define CAN1SR (*(reg32_t *)(CAN1_BASE_ADDR + 0x1C)) +#define CAN1RFS (*(reg32_t *)(CAN1_BASE_ADDR + 0x20)) +#define CAN1RID (*(reg32_t *)(CAN1_BASE_ADDR + 0x24)) +#define CAN1RDA (*(reg32_t *)(CAN1_BASE_ADDR + 0x28)) +#define CAN1RDB (*(reg32_t *)(CAN1_BASE_ADDR + 0x2C)) + +#define CAN1TFI1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x30)) +#define CAN1TID1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x34)) +#define CAN1TDA1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x38)) +#define CAN1TDB1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x3C)) +#define CAN1TFI2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x40)) +#define CAN1TID2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x44)) +#define CAN1TDA2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x48)) +#define CAN1TDB2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x4C)) +#define CAN1TFI3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x50)) +#define CAN1TID3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x54)) +#define CAN1TDA3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x58)) +#define CAN1TDB3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x5C)) + +#define CAN2_BASE_ADDR 0xE0048000 +#define CAN2MOD (*(reg32_t *)(CAN2_BASE_ADDR + 0x00)) +#define CAN2CMR (*(reg32_t *)(CAN2_BASE_ADDR + 0x04)) +#define CAN2GSR (*(reg32_t *)(CAN2_BASE_ADDR + 0x08)) +#define CAN2ICR (*(reg32_t *)(CAN2_BASE_ADDR + 0x0C)) +#define CAN2IER (*(reg32_t *)(CAN2_BASE_ADDR + 0x10)) +#define CAN2BTR (*(reg32_t *)(CAN2_BASE_ADDR + 0x14)) +#define CAN2EWL (*(reg32_t *)(CAN2_BASE_ADDR + 0x18)) +#define CAN2SR (*(reg32_t *)(CAN2_BASE_ADDR + 0x1C)) +#define CAN2RFS (*(reg32_t *)(CAN2_BASE_ADDR + 0x20)) +#define CAN2RID (*(reg32_t *)(CAN2_BASE_ADDR + 0x24)) +#define CAN2RDA (*(reg32_t *)(CAN2_BASE_ADDR + 0x28)) +#define CAN2RDB (*(reg32_t *)(CAN2_BASE_ADDR + 0x2C)) + +#define CAN2TFI1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x30)) +#define CAN2TID1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x34)) +#define CAN2TDA1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x38)) +#define CAN2TDB1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x3C)) +#define CAN2TFI2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x40)) +#define CAN2TID2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x44)) +#define CAN2TDA2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x48)) +#define CAN2TDB2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x4C)) +#define CAN2TFI3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x50)) +#define CAN2TID3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x54)) +#define CAN2TDA3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x58)) +#define CAN2TDB3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x5C)) + + +/* MultiMedia Card Interface(MCI) Controller */ +#define MCI_BASE_ADDR 0xE008C000 +#define MCI_POWER (*(reg32_t *)(MCI_BASE_ADDR + 0x00)) +#define MCI_CLOCK (*(reg32_t *)(MCI_BASE_ADDR + 0x04)) +#define MCI_ARGUMENT (*(reg32_t *)(MCI_BASE_ADDR + 0x08)) +#define MCI_COMMAND (*(reg32_t *)(MCI_BASE_ADDR + 0x0C)) +#define MCI_RESP_CMD (*(reg32_t *)(MCI_BASE_ADDR + 0x10)) +#define MCI_RESP0 (*(reg32_t *)(MCI_BASE_ADDR + 0x14)) +#define MCI_RESP1 (*(reg32_t *)(MCI_BASE_ADDR + 0x18)) +#define MCI_RESP2 (*(reg32_t *)(MCI_BASE_ADDR + 0x1C)) +#define MCI_RESP3 (*(reg32_t *)(MCI_BASE_ADDR + 0x20)) +#define MCI_DATA_TMR (*(reg32_t *)(MCI_BASE_ADDR + 0x24)) +#define MCI_DATA_LEN (*(reg32_t *)(MCI_BASE_ADDR + 0x28)) +#define MCI_DATA_CTRL (*(reg32_t *)(MCI_BASE_ADDR + 0x2C)) +#define MCI_DATA_CNT (*(reg32_t *)(MCI_BASE_ADDR + 0x30)) +#define MCI_STATUS (*(reg32_t *)(MCI_BASE_ADDR + 0x34)) +#define MCI_CLEAR (*(reg32_t *)(MCI_BASE_ADDR + 0x38)) +#define MCI_MASK0 (*(reg32_t *)(MCI_BASE_ADDR + 0x3C)) +#define MCI_MASK1 (*(reg32_t *)(MCI_BASE_ADDR + 0x40)) +#define MCI_FIFO_CNT (*(reg32_t *)(MCI_BASE_ADDR + 0x48)) +#define MCI_FIFO (*(reg32_t *)(MCI_BASE_ADDR + 0x80)) + + +/* I2S Interface Controller (I2S) */ +#define I2S_BASE_ADDR 0xE0088000 +#define I2S_DAO (*(reg32_t *)(I2S_BASE_ADDR + 0x00)) +#define I2S_DAI (*(reg32_t *)(I2S_BASE_ADDR + 0x04)) +#define I2S_TX_FIFO (*(reg32_t *)(I2S_BASE_ADDR + 0x08)) +#define I2S_RX_FIFO (*(reg32_t *)(I2S_BASE_ADDR + 0x0C)) +#define I2S_STATE (*(reg32_t *)(I2S_BASE_ADDR + 0x10)) +#define I2S_DMA1 (*(reg32_t *)(I2S_BASE_ADDR + 0x14)) +#define I2S_DMA2 (*(reg32_t *)(I2S_BASE_ADDR + 0x18)) +#define I2S_IRQ (*(reg32_t *)(I2S_BASE_ADDR + 0x1C)) +#define I2S_TXRATE (*(reg32_t *)(I2S_BASE_ADDR + 0x20)) +#define I2S_RXRATE (*(reg32_t *)(I2S_BASE_ADDR + 0x24)) + + +/* General-purpose DMA Controller */ +#define DMA_BASE_ADDR 0xFFE04000 +#define GPDMA_INT_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x000)) +#define GPDMA_INT_TCSTAT (*(reg32_t *)(DMA_BASE_ADDR + 0x004)) +#define GPDMA_INT_TCCLR (*(reg32_t *)(DMA_BASE_ADDR + 0x008)) +#define GPDMA_INT_ERR_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x00C)) +#define GPDMA_INT_ERR_CLR (*(reg32_t *)(DMA_BASE_ADDR + 0x010)) +#define GPDMA_RAW_INT_TCSTAT (*(reg32_t *)(DMA_BASE_ADDR + 0x014)) +#define GPDMA_RAW_INT_ERR_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x018)) +#define GPDMA_ENABLED_CHNS (*(reg32_t *)(DMA_BASE_ADDR + 0x01C)) +#define GPDMA_SOFT_BREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x020)) +#define GPDMA_SOFT_SREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x024)) +#define GPDMA_SOFT_LBREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x028)) +#define GPDMA_SOFT_LSREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x02C)) +#define GPDMA_CONFIG (*(reg32_t *)(DMA_BASE_ADDR + 0x030)) +#define GPDMA_SYNC (*(reg32_t *)(DMA_BASE_ADDR + 0x034)) + +/* DMA channel 0 registers */ +#define GPDMA_CH0_SRC (*(reg32_t *)(DMA_BASE_ADDR + 0x100)) +#define GPDMA_CH0_DEST (*(reg32_t *)(DMA_BASE_ADDR + 0x104)) +#define GPDMA_CH0_LLI (*(reg32_t *)(DMA_BASE_ADDR + 0x108)) +#define GPDMA_CH0_CTRL (*(reg32_t *)(DMA_BASE_ADDR + 0x10C)) +#define GPDMA_CH0_CFG (*(reg32_t *)(DMA_BASE_ADDR + 0x110)) + +/* DMA channel 1 registers */ +#define GPDMA_CH1_SRC (*(reg32_t *)(DMA_BASE_ADDR + 0x120)) +#define GPDMA_CH1_DEST (*(reg32_t *)(DMA_BASE_ADDR + 0x124)) +#define GPDMA_CH1_LLI (*(reg32_t *)(DMA_BASE_ADDR + 0x128)) +#define GPDMA_CH1_CTRL (*(reg32_t *)(DMA_BASE_ADDR + 0x12C)) +#define GPDMA_CH1_CFG (*(reg32_t *)(DMA_BASE_ADDR + 0x130)) + + +/* USB Controller */ +#define USB_INT_BASE_ADDR 0xE01FC1C0 +#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ + +#define USB_INT_STAT (*(reg32_t *)(USB_INT_BASE_ADDR + 0x00)) + +/* USB Device Interrupt Registers */ +#define DEV_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x00)) +#define DEV_INT_EN (*(reg32_t *)(USB_BASE_ADDR + 0x04)) +#define DEV_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0x08)) +#define DEV_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0x0C)) +#define DEV_INT_PRIO (*(reg32_t *)(USB_BASE_ADDR + 0x2C)) + +/* USB Device Endpoint Interrupt Registers */ +#define EP_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x30)) +#define EP_INT_EN (*(reg32_t *)(USB_BASE_ADDR + 0x34)) +#define EP_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0x38)) +#define EP_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0x3C)) +#define EP_INT_PRIO (*(reg32_t *)(USB_BASE_ADDR + 0x40)) + +/* USB Device Endpoint Realization Registers */ +#define REALIZE_EP (*(reg32_t *)(USB_BASE_ADDR + 0x44)) +#define EP_INDEX (*(reg32_t *)(USB_BASE_ADDR + 0x48)) +#define MAXPACKET_SIZE (*(reg32_t *)(USB_BASE_ADDR + 0x4C)) + +/* USB Device Command Reagisters */ +#define CMD_CODE (*(reg32_t *)(USB_BASE_ADDR + 0x10)) +#define CMD_DATA (*(reg32_t *)(USB_BASE_ADDR + 0x14)) + +/* USB Device Data Transfer Registers */ +#define RX_DATA (*(reg32_t *)(USB_BASE_ADDR + 0x18)) +#define TX_DATA (*(reg32_t *)(USB_BASE_ADDR + 0x1C)) +#define RX_PLENGTH (*(reg32_t *)(USB_BASE_ADDR + 0x20)) +#define TX_PLENGTH (*(reg32_t *)(USB_BASE_ADDR + 0x24)) +#define USB_CTRL (*(reg32_t *)(USB_BASE_ADDR + 0x28)) + +/* USB Device DMA Registers */ +#define DMA_REQ_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x50)) +#define DMA_REQ_CLR (*(reg32_t *)(USB_BASE_ADDR + 0x54)) +#define DMA_REQ_SET (*(reg32_t *)(USB_BASE_ADDR + 0x58)) +#define UDCA_HEAD (*(reg32_t *)(USB_BASE_ADDR + 0x80)) +#define EP_DMA_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x84)) +#define EP_DMA_EN (*(reg32_t *)(USB_BASE_ADDR + 0x88)) +#define EP_DMA_DIS (*(reg32_t *)(USB_BASE_ADDR + 0x8C)) +#define DMA_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x90)) +#define DMA_INT_EN (*(reg32_t *)(USB_BASE_ADDR + 0x94)) +#define EOT_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0xA0)) +#define EOT_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0xA4)) +#define EOT_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0xA8)) +#define NDD_REQ_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0xAC)) +#define NDD_REQ_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0xB0)) +#define NDD_REQ_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0xB4)) +#define SYS_ERR_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0xB8)) +#define SYS_ERR_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0xBC)) +#define SYS_ERR_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0xC0)) + +/* USB Host and OTG registers are for LPC24xx only */ +/* USB Host Controller */ +#define USBHC_BASE_ADDR 0xFFE0C000 +#define HC_REVISION (*(reg32_t *)(USBHC_BASE_ADDR + 0x00)) +#define HC_CONTROL (*(reg32_t *)(USBHC_BASE_ADDR + 0x04)) +#define HC_CMD_STAT (*(reg32_t *)(USBHC_BASE_ADDR + 0x08)) +#define HC_INT_STAT (*(reg32_t *)(USBHC_BASE_ADDR + 0x0C)) +#define HC_INT_EN (*(reg32_t *)(USBHC_BASE_ADDR + 0x10)) +#define HC_INT_DIS (*(reg32_t *)(USBHC_BASE_ADDR + 0x14)) +#define HC_HCCA (*(reg32_t *)(USBHC_BASE_ADDR + 0x18)) +#define HC_PERIOD_CUR_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x1C)) +#define HC_CTRL_HEAD_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x20)) +#define HC_CTRL_CUR_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x24)) +#define HC_BULK_HEAD_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x28)) +#define HC_BULK_CUR_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x2C)) +#define HC_DONE_HEAD (*(reg32_t *)(USBHC_BASE_ADDR + 0x30)) +#define HC_FM_INTERVAL (*(reg32_t *)(USBHC_BASE_ADDR + 0x34)) +#define HC_FM_REMAINING (*(reg32_t *)(USBHC_BASE_ADDR + 0x38)) +#define HC_FM_NUMBER (*(reg32_t *)(USBHC_BASE_ADDR + 0x3C)) +#define HC_PERIOD_START (*(reg32_t *)(USBHC_BASE_ADDR + 0x40)) +#define HC_LS_THRHLD (*(reg32_t *)(USBHC_BASE_ADDR + 0x44)) +#define HC_RH_DESCA (*(reg32_t *)(USBHC_BASE_ADDR + 0x48)) +#define HC_RH_DESCB (*(reg32_t *)(USBHC_BASE_ADDR + 0x4C)) +#define HC_RH_STAT (*(reg32_t *)(USBHC_BASE_ADDR + 0x50)) +#define HC_RH_PORT_STAT1 (*(reg32_t *)(USBHC_BASE_ADDR + 0x54)) +#define HC_RH_PORT_STAT2 (*(reg32_t *)(USBHC_BASE_ADDR + 0x58)) + +/* USB OTG Controller */ +#define USBOTG_BASE_ADDR 0xFFE0C100 +#define OTG_INT_STAT (*(reg32_t *)(USBOTG_BASE_ADDR + 0x00)) +#define OTG_INT_EN (*(reg32_t *)(USBOTG_BASE_ADDR + 0x04)) +#define OTG_INT_SET (*(reg32_t *)(USBOTG_BASE_ADDR + 0x08)) +#define OTG_INT_CLR (*(reg32_t *)(USBOTG_BASE_ADDR + 0x0C)) +/* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */ +#define OTG_STAT_CTRL (*(reg32_t *)(USBOTG_BASE_ADDR + 0x10)) +#define OTG_TIMER (*(reg32_t *)(USBOTG_BASE_ADDR + 0x14)) + +#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 +#define OTG_I2C_RX (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_TX (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_STS (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x04)) +#define OTG_I2C_CTL (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x08)) +#define OTG_I2C_CLKHI (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x0C)) +#define OTG_I2C_CLKLO (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x10)) + +/* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are +OTG_CLK_CTRL and OTG_CLK_STAT respectively. */ +#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 +#define OTG_CLK_CTRL (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define OTG_CLK_STAT (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Note: below three register name convention is for LPC23xx USB device only, match +with the spec. update in USB Device Section. */ +#define USBPortSel (*(reg32_t *)(USBOTG_BASE_ADDR + 0x10)) +#define USBClkCtrl (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define USBClkSt (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ +#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ +#define MAC_MAC1 (*(reg32_t *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ +#define MAC_MAC2 (*(reg32_t *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ +#define MAC_IPGT (*(reg32_t *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ +#define MAC_IPGR (*(reg32_t *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ +#define MAC_CLRT (*(reg32_t *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ +#define MAC_MAXF (*(reg32_t *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ +#define MAC_SUPP (*(reg32_t *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ +#define MAC_TEST (*(reg32_t *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ +#define MAC_MCFG (*(reg32_t *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ +#define MAC_MCMD (*(reg32_t *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ +#define MAC_MADR (*(reg32_t *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ +#define MAC_MWTD (*(reg32_t *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ +#define MAC_MRDD (*(reg32_t *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ +#define MAC_MIND (*(reg32_t *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ + +#define MAC_SA0 (*(reg32_t *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ +#define MAC_SA1 (*(reg32_t *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ +#define MAC_SA2 (*(reg32_t *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ + +#define MAC_COMMAND (*(reg32_t *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ +#define MAC_STATUS (*(reg32_t *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ +#define MAC_RXDESCRIPTOR (*(reg32_t *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ +#define MAC_RXSTATUS (*(reg32_t *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ +#define MAC_RXDESCRIPTORNUM (*(reg32_t *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ +#define MAC_RXPRODUCEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ +#define MAC_RXCONSUMEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ +#define MAC_TXDESCRIPTOR (*(reg32_t *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ +#define MAC_TXSTATUS (*(reg32_t *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ +#define MAC_TXDESCRIPTORNUM (*(reg32_t *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ +#define MAC_TXPRODUCEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ +#define MAC_TXCONSUMEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ + +#define MAC_TSV0 (*(reg32_t *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ +#define MAC_TSV1 (*(reg32_t *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ +#define MAC_RSV (*(reg32_t *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ + +#define MAC_FLOWCONTROLCNT (*(reg32_t *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ +#define MAC_FLOWCONTROLSTS (*(reg32_t *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ + +#define MAC_RXFILTERCTRL (*(reg32_t *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ +#define MAC_RXFILTERWOLSTS (*(reg32_t *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ +#define MAC_RXFILTERWOLCLR (*(reg32_t *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ + +#define MAC_HASHFILTERL (*(reg32_t *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ +#define MAC_HASHFILTERH (*(reg32_t *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ + +#define MAC_INTSTATUS (*(reg32_t *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ +#define MAC_INTENABLE (*(reg32_t *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ +#define MAC_INTCLEAR (*(reg32_t *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ +#define MAC_INTSET (*(reg32_t *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ + +#define MAC_POWERDOWN (*(reg32_t *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ +#define MAC_MODULEID (*(reg32_t *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ + +#endif /* LPC23XX_H */ diff --git a/2.5/bertos/cpu/arm/scripts/arm7tdmi_ram.ld b/2.5/bertos/cpu/arm/scripts/arm7tdmi_ram.ld new file mode 100644 index 00000000..278256ea --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/arm7tdmi_ram.ld @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Linker Script for Atmel AT91SAM7 family processors, RAM execution. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0400; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.exceptions)); + . = ALIGN (4); + *(.init); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + *(.gcc*); + . = ALIGN(4); + *(.ctors); + . = ALIGN(4); + *(.dtors); + _etext = .; + PROVIDE (__etext = .); + } > ram + + + .data : AT (_etext) + { + PROVIDE (__data_start = .); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocate stack at the end of bss section. + * Data heap is allocated at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} diff --git a/2.5/bertos/cpu/arm/scripts/arm7tdmi_rom.ld b/2.5/bertos/cpu/arm/scripts/arm7tdmi_rom.ld new file mode 100644 index 00000000..a4715b1b --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/arm7tdmi_rom.ld @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Linker Script for Atmel AT91SAM7 family processors, ROM execution. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0400; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.exceptions)); + . = ALIGN (4); + *(.init); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + *(.gcc*); + . = ALIGN(4); + *(.ctors); + . = ALIGN(4); + *(.dtors); + _etext = .; + PROVIDE (__etext = .); + } > rom + + + .data : AT (_etext) + { + PROVIDE (__data_start = .); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocate stack at the end of bss section. + * Data heap is allocated at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_128_ram.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_128_ram.ld new file mode 100644 index 00000000..f52a9592 --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_128_ram.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_128 family processors. + * + */ + + + +/* + * Define memory configuration for AT91SAM7_128 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 128k + ram(rwx) : org = 0x00200000, len = 32k +} + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_128_rom.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_128_rom.ld new file mode 100644 index 00000000..5d92b06a --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_128_rom.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_128 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_128 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 128k + ram(rwx) : org = 0x00200000, len = 32k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_256_ram.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_256_ram.ld new file mode 100644 index 00000000..e644e6cc --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_256_ram.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_256 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_256 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 256k + ram(rwx) : org = 0x00200000, len = 64k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_256_rom.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_256_rom.ld new file mode 100644 index 00000000..9ac3adf5 --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_256_rom.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_256 family processors. + * + */ + + + +/* + * Define memory configuration for AT91SAM7_256 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 256k + ram(rwx) : org = 0x00200000, len = 64k +} + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_512_ram.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_512_ram.ld new file mode 100644 index 00000000..cea33ae7 --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_512_ram.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_512 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_512 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 512k + ram(rwx) : org = 0x00200000, len = 64k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_512_rom.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_512_rom.ld new file mode 100644 index 00000000..5cabcc8a --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_512_rom.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_512 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_512 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 512k + ram(rwx) : org = 0x00200000, len = 64k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_64_ram.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_64_ram.ld new file mode 100644 index 00000000..abaf6e9a --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_64_ram.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_64 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_64 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 64k + ram(rwx) : org = 0x00200000, len = 16k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/2.5/bertos/cpu/arm/scripts/at91sam7_64_rom.ld b/2.5/bertos/cpu/arm/scripts/at91sam7_64_rom.ld new file mode 100644 index 00000000..67715e6c --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/at91sam7_64_rom.ld @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $ + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_64 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_64 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 64k + ram(rwx) : org = 0x00200000, len = 16k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/2.5/bertos/cpu/arm/scripts/lpc2378.ld b/2.5/bertos/cpu/arm/scripts/lpc2378.ld new file mode 100644 index 00000000..a1f50890 --- /dev/null +++ b/2.5/bertos/cpu/arm/scripts/lpc2378.ld @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \author Francesco sacchi + * + * \brief Linker Script for NXP LPC2378 processors. + * + */ + + +MEMORY +{ + /* last 12k used by the bootloader */ + rom(rx) : org = 0x00000000, len = 512k - 12k + /* First 0x200 bytes and last 288 used by bootloader and debugger */ + ram(rwx) : org = 0x40000200, len = 32k - 0x200 - 288 +} + +/* USB RAM */ +__usb_ram_start = 0x7FD00000; +__usb_ram_size = 8k; +__usb_ram_end = __usb_ram_start + __usb_ram_size; + +/* Ethernet RAM */ +__eth_ram_start = 0x7FE00000; +__eth_ram_size = 16k; +__eth_ram_end = __eth_ram_start + __eth_ram_size; + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/2.5/bertos/cpu/attr.h b/2.5/bertos/cpu/attr.h new file mode 100644 index 00000000..da3e08bc --- /dev/null +++ b/2.5/bertos/cpu/attr.h @@ -0,0 +1,272 @@ +/** + * \file + * + * + * \brief CPU-specific attributes. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_ATTR_H +#define CPU_ATTR_H + +#include "detect.h" + +#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */ +#include "cfg/cfg_attr.h" /* CONFIG_FAST_MEM */ + + +/** + * \name Macros for determining CPU endianness. + * \{ + */ +#define CPU_BIG_ENDIAN 0x1234 +#define CPU_LITTLE_ENDIAN 0x3412 /* Look twice, pal. This is not a bug. */ +/*\}*/ + +/** Macro to include cpu-specific versions of the headers. */ +#define CPU_HEADER(module) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).h) + +/** Macro to include cpu-specific versions of implementation files. */ +#define CPU_CSOURCE(module) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).c) + + +#if CPU_I196 + + #define NOP nop_instruction() + + #define CPU_REG_BITS 16 + #define CPU_REGS_CNT 16 + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x100 + +#elif CPU_X86 + + #define CPU_REGS_CNT 7 + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 0 + + #if CPU_X86_64 + #define CPU_REG_BITS 64 + + #ifdef __WIN64__ + /* WIN64 is an IL32-P64 weirdo. */ + #define SIZEOF_LONG 4 + #endif + #else + #define CPU_REG_BITS 32 + #endif + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x1000 + + #ifdef __GNUC__ + #define NOP asm volatile ("nop") + /* This is a good thing to insert into busy-wait loops. */ + #define PAUSE asm volatile ("rep; nop" ::: "memory") + #define BREAKPOINT asm volatile ("int3" ::) + #endif + +#elif CPU_ARM + + #define CPU_REG_BITS 32 + #define CPU_REGS_CNT 16 + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #if CPU_ARM_AT91 + #define CPU_RAM_START 0x00200000 + #elif CPU_ARM_LPC2 + #define CPU_RAM_START 0x40000000 + #else + #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200 + #define CPU_RAM_START 0x200 + #endif + + #ifdef __IAR_SYSTEMS_ICC__ + #warning Check CPU_BYTE_ORDER + #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN) + + #define NOP __no_operation() + + #else /* GCC and compatibles */ + + #if defined(__ARMEB__) + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #elif defined(__ARMEL__) + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #else + #error Unable to detect ARM endianness! + #endif + + #define NOP asm volatile ("mov r0,r0" ::) + #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ + + #if CONFIG_FAST_MEM + /** + * Function attribute for use with performance critical code. + * + * On the AT91 family, code residing in flash has wait states. + * Moving functions to the data section is a quick & dirty way + * to get them transparently copied to SRAM for zero-wait-state + * operation. + */ + #define FAST_FUNC __attribute__((section(".data"))) + + /** + * Data attribute to move constant data to fast memory storage. + * + * \see FAST_FUNC + */ + #define FAST_RODATA __attribute__((section(".data"))) + + #else // !CONFIG_FAST_MEM + #define FAST_RODATA /**/ + #define FAST_FUNC /**/ + #endif + + /* + * Function attribute to move it into ram memory. + */ + #define RAM_FUNC __attribute__((section(".data"))) + + #endif /* !__IAR_SYSTEMS_ICC_ */ +#elif CPU_CM3 + + #define CPU_REG_BITS 32 + #define CPU_REGS_CNT 16 + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32F103RB) + #define CPU_RAM_START 0x20000000 + #else + #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x200 + #define CPU_RAM_START 0x200 + #endif + + #if defined(__ARMEB__) + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #elif defined(__ARMEL__) + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #else + #error Unable to detect Cortex-M3 endianess! + #endif + + #define NOP asm volatile ("nop") + #define PAUSE asm volatile ("wfi" ::: "memory") + #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ + +#elif CPU_PPC + + #define CPU_REG_BITS (CPU_PPC32 ? 32 : 64) + #define CPU_REGS_CNT FIXME + #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN) + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x1000 + + #ifdef __GNUC__ + #define NOP asm volatile ("nop" ::) + #define BREAKPOINT asm volatile ("twge 2,2" ::) + #endif + +#elif CPU_DSP56K + + #define CPU_REG_BITS 16 + #define CPU_REGS_CNT FIXME + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #define CPU_HARVARD 1 + + /* Memory is word-addessed in the DSP56K */ + #define CPU_BITS_PER_CHAR 16 + #define SIZEOF_SHORT 1 + #define SIZEOF_INT 1 + #define SIZEOF_LONG 2 + #define SIZEOF_PTR 1 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x200 + + #define NOP asm(nop) + #define BREAKPOINT asm(debug) + +#elif CPU_AVR + + #define NOP asm volatile ("nop" ::) + + #define CPU_REG_BITS 8 + #define CPU_REGS_CNT 33 /* Includes SREG */ + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 1 + + /// Valid pointers should be >= than this value (used for debug) + #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA103 + #define CPU_RAM_START 0x60 + #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define CPU_RAM_START 0x100 + #elif CPU_AVR_ATMEGA1281 + #define CPU_RAM_START 0x200 + #else + #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100 + #define CPU_RAM_START 0x100 + #endif + +#else + #error No CPU_... defined. +#endif + +#ifndef BREAKPOINT +#define BREAKPOINT /* nop */ +#endif + +#ifndef FAST_FUNC + /// Function attribute for use with performance critical code. + #define FAST_FUNC /* */ +#endif + +#ifndef FAST_RODATA + /// Data attribute to move constant data to fast memory storage. + #define FAST_RODATA /* */ +#endif + +#ifndef PAUSE + /// Generic PAUSE implementation. + #define PAUSE {NOP; MEMORY_BARRIER;} +#endif + +#endif /* CPU_ATTR_H */ diff --git a/2.5/bertos/cpu/avr/drv/adc_avr.c b/2.5/bertos/cpu/avr/drv/adc_avr.c new file mode 100644 index 00000000..7e932f62 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/adc_avr.c @@ -0,0 +1,199 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Francesco Sacchi + * + * This module is automatically included so no need to include + * in test list. + * notest: avr + * + * $WIZ$ + */ + +#include "adc_avr.h" + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include +#include + +#include // IRQ_ASSERT_ENABLED() + +#include + +#include +#include + +/** + * ADC voltage referencese. + * + * $WIZ$ avr_adc_refs = "ADC_AVR_AREF", "ADC_AVR_AVCC", "ADC_AVR_INT256" + * \{ + */ +#define ADC_AVR_AREF 0 +#define ADC_AVR_AVCC 1 +#define ADC_AVR_INT256 2 +/* \} */ + +#if CONFIG_KERN + #include + #include + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use the ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_SINGLE + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + ISR(ADC_vect) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + } +#endif /* CONFIG_KERN */ + +/** + * Select mux channel \a ch. + * \todo only first 8 channels are selectable! + */ +void adc_hw_select_ch(uint8_t ch) +{ + /* Set to 0 all mux registers */ + #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA168 + ADMUX &= ~(BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0)); + #elif CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 + ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0)); + #else + #error Unknown CPU + #endif + + /* Select channel, only first 8 channel modes are supported for now */ + ADMUX |= (ch & 0x07); +} + + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADCS bit is done. + */ +uint16_t adc_hw_read(void) +{ + // Ensure another convertion is not running. + ASSERT(!(ADCSRA & BV(ADSC))); + + // Start convertion + ADCSRA |= BV(ADSC); + + #if CONFIG_KERN + // Ensure IRQs enabled. + IRQ_ASSERT_ENABLED(); + adc_process = proc_current(); + sig_wait(SIG_ADC_COMPLETE); + #else + //Wait in polling until is done + while (ADCSRA & BV(ADSC)) ; + #endif + + return(ADC); +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + /* + * Select channel 0 as default, + * result right adjusted. + */ + ADMUX = 0; + + #if CONFIG_ADC_AVR_REF == ADC_AVR_AREF + /* External voltage at AREF as analog ref source */ + /* None */ + #elif CONFIG_ADC_AVR_REF == ADC_AVR_AVCC + /* AVCC as analog ref source */ + ADMUX |= BV(REFS0); + #elif CONFIG_ADC_AVR_REF == ADC_AVR_INT256 + /* Internal 2.56V as ref source */ + ADMUX |= BV(REFS1) | BV(REFS0); + #else + #error Unsupported ADC ref value. + #endif + + #if defined(ADCSRB) + /* Disable Auto trigger source: ADC in Free running mode. */ + ADCSRB = 0; + #endif + + /* Enable ADC, disable autotrigger mode. */ + ADCSRA = BV(ADEN); + + #if CONFIG_KERN + MOD_CHECK(proc); + ADCSRA |= BV(ADIE); + #endif + + /* Set convertion frequency */ + #if CONFIG_ADC_AVR_DIVISOR == 2 + ADCSRA |= BV(ADPS0); + #elif CONFIG_ADC_AVR_DIVISOR == 4 + ADCSRA |= BV(ADPS1); + #elif CONFIG_ADC_AVR_DIVISOR == 8 + ADCSRA |= BV(ADPS1) | BV(ADPS0); + #elif CONFIG_ADC_AVR_DIVISOR == 16 + ADCSRA |= BV(ADPS2); + #elif CONFIG_ADC_AVR_DIVISOR == 32 + ADCSRA |= BV(ADPS2) | BV(ADPS0); + #elif CONFIG_ADC_AVR_DIVISOR == 64 + ADCSRA |= BV(ADPS2) | BV(ADPS1); + #elif CONFIG_ADC_AVR_DIVISOR == 128 + ADCSRA |= BV(ADPS2) | BV(ADPS1) | BV(ADPS0); + #else + #error Unsupported ADC prescaler value. + #endif + + /* Start a convertion to init ADC hw */ + adc_hw_read(); +} diff --git a/2.5/bertos/cpu/avr/drv/adc_avr.h b/2.5/bertos/cpu/avr/drv/adc_avr.h new file mode 100644 index 00000000..417e4536 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/adc_avr.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Francesco Sacchi + */ + +#ifndef DRV_ADC_AVR_H +#define DRV_ADC_AVR_H + +#include + +#define ADC_MUX_MAXCH 7 +#define ADC_BITS 10 + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_AVR_H */ diff --git a/2.5/bertos/cpu/avr/drv/flash_avr.c b/2.5/bertos/cpu/avr/drv/flash_avr.c new file mode 100644 index 00000000..2c3d1840 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/flash_avr.c @@ -0,0 +1,289 @@ +/** + * \file + * + * + * \brief Self programming routines. + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * This module implements a kfile-like access for Atmel avr + * internal flash. + * Internal flash writing access is controlled by BOOTSZ fuses, check + * datasheet for details. + */ + +#include "flash_avr.h" + +#include "cfg/cfg_flash_avr.h" +#include // MIN() +#include +#include +#include + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_AVR_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_AVR_LOG_FORMAT +#include + +#include +#include + +#include + +#include +#include +#include + +#include + + +/** + * Definition of type for avr flash module. + */ +typedef uint16_t page_addr_t; + + +/** + * Private avr flush funtion. + * + * Write current buffered page in flash memory (if modified). + * This function erase flash memory page before writing. + * + * This function is only use internally in this module. + */ +static void flash_avr_flush(Flash *fd) +{ + if (fd->page_dirty) + { + + LOG_INFO("Flushing page %d\n", fd->curr_page); + + // Wait while the SPM instruction is busy. + boot_spm_busy_wait(); + + LOG_INFO("Filling temparary page buffer..."); + + // Fill the temporary buffer of the AVR + for (page_addr_t page_addr = 0; page_addr < SPM_PAGESIZE; page_addr += 2) + { + uint16_t word = ((uint16_t)fd->page_buf[page_addr + 1] << 8) | fd->page_buf[page_addr]; + + ATOMIC(boot_page_fill(page_addr, word)); + } + LOG_INFO("Done.\n"); + + wdt_reset(); + + LOG_INFO("Erasing page, addr %u...", fd->curr_page * SPM_PAGESIZE); + + /* Page erase */ + ATOMIC(boot_page_erase(fd->curr_page * SPM_PAGESIZE)); + + /* Wait until the memory is erased. */ + boot_spm_busy_wait(); + + LOG_INFO("Done.\n"); + LOG_INFO("Writing page, addr %u...", fd->curr_page * SPM_PAGESIZE); + + /* Store buffer in flash page. */ + ATOMIC(boot_page_write(fd->curr_page * SPM_PAGESIZE)); + boot_spm_busy_wait(); // Wait while the SPM instruction is busy. + + /* + * Reenable RWW-section again. We need this if we want to jump back + * to the application after bootloading. + */ + ATOMIC(boot_rww_enable()); + + fd->page_dirty = false; + LOG_INFO("Done.\n"); + } +} + + +/** + * Flush avr flash function. + * + * Write current buffered page in flash memory (if modified). + * This function erase flash memory page before writing. + */ +static int flash_avr_kfileFlush(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + flash_avr_flush(fd); + return 0; +} + + +/** + * Check current page and if \a page is different, load it in + * temporary buffer. + */ +static void flash_avr_loadPage(Flash *fd, page_t page) +{ + if (page != fd->curr_page) + { + flash_avr_flush(fd); + // Load page + memcpy_P(fd->page_buf, (const char *)(page * SPM_PAGESIZE), SPM_PAGESIZE); + fd->curr_page = page; + LOG_INFO("Loaded page %d\n", fd->curr_page); + } +} + +/** + * Write program memory. + * Write \a size bytes from buffer \a _buf to file \a fd + * \note Write operations are buffered. + */ +static size_t flash_avr_write(struct KFile *_fd, const void *_buf, size_t size) +{ + Flash *fd = FLASH_CAST(_fd); + const uint8_t *buf =(const uint8_t *)_buf; + + page_t page; + page_addr_t page_addr; + size_t total_write = 0; + + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= (kfile_off_t)fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Writing at pos[%u]\n", fd->fd.seek_pos); + while (size) + { + page = fd->fd.seek_pos / SPM_PAGESIZE; + page_addr = fd->fd.seek_pos % SPM_PAGESIZE; + + flash_avr_loadPage(fd, page); + + size_t wr_len = MIN(size, SPM_PAGESIZE - page_addr); + memcpy(fd->page_buf + page_addr, buf, wr_len); + fd->page_dirty = true; + + buf += wr_len; + fd->fd.seek_pos += wr_len; + size -= wr_len; + total_write += wr_len; + } + LOG_INFO("written %u bytes\n", total_write); + return total_write; +} + +/** + * Open flash file \a fd + * \a name and \a mode are unused, cause flash memory is + * threated like one file. + */ +static void flash_avr_open(struct Flash *fd) +{ + fd->curr_page = 0; + memcpy_P(fd->page_buf, (const char *)(fd->curr_page * SPM_PAGESIZE), SPM_PAGESIZE); + + fd->fd.seek_pos = 0; + fd->fd.size = (uint16_t)(FLASHEND - CONFIG_FLASH_AVR_BOOTSIZE + 1); + fd->page_dirty = false; + + LOG_INFO("Flash file opened\n"); +} + +/** + * Close file \a fd + */ +static int flash_avr_close(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + flash_avr_flush(fd); + LOG_INFO("Flash file closed\n"); + return 0; +} + +/** + * Reopen file \a fd + */ +static struct KFile *flash_avr_reopen(struct KFile *fd) +{ + Flash *_fd = FLASH_CAST(fd); + flash_avr_close(fd); + flash_avr_open((struct Flash *)_fd); + return fd; +} + + +/** + * Read from file \a fd \a size bytes and put it in buffer \a buf + * \return the number of bytes read. + */ +static size_t flash_avr_read(struct KFile *_fd, void *buf, size_t size) +{ + Flash *fd = FLASH_CAST(_fd); + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= (kfile_off_t)fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Reading at pos[%u]\n", fd->fd.seek_pos); + // Flush current buffered page (if modified). + flash_avr_flush(fd); + + /* + * AVR pointers are 16 bits wide, this hack is needed to avoid + * compiler warning, cause fd->seek_pos is a 32bit offset. + */ + const uint8_t *pgm_addr = (const uint8_t *)0; + pgm_addr += fd->fd.seek_pos; + + memcpy_P(buf, pgm_addr, size); + fd->fd.seek_pos += size; + LOG_INFO("Read %u bytes\n", size); + return size; +} + +/** + * Init AVR flash read/write file. + */ +void flash_hw_init(struct Flash *fd) +{ + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_FLASH); + + // Set up flash programming functions. + fd->fd.reopen = flash_avr_reopen; + fd->fd.close = flash_avr_close; + fd->fd.read = flash_avr_read; + fd->fd.write = flash_avr_write; + fd->fd.seek = kfile_genericSeek; + fd->fd.flush = flash_avr_kfileFlush; + fd->curr_page = 0; + + flash_avr_open(fd); +} + + diff --git a/2.5/bertos/cpu/avr/drv/flash_avr.h b/2.5/bertos/cpu/avr/drv/flash_avr.h new file mode 100644 index 00000000..6c06eaf3 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/flash_avr.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * \brief AVR Internal flash read/write driver. + * + * + */ + +#ifndef FLASH_AT91_H +#define FLASH_AT91_H + +#include + +#include + +#include + +#include + + +#define FLASH_PAGE_SIZE SPM_PAGESIZE + +/** + * Definition of type for avr flash module. + */ +typedef uint16_t page_t; + +/* Forward declaration */ +struct Flash; + +/** + * FlashAvr KFile context structure. + * DEPREACTED STRUCTURE! + * Use Flash instead + * + * \{ + */ +typedef struct FlashAvr +{ + /** + * File descriptor. + */ + KFile fd; + + /** + * Flag for checking if current page is modified. + */ + bool page_dirty; + + /** + * Current buffered page. + */ + page_t curr_page; + + /** + * Temporary buffer cointaing data block to + * write on flash. + */ + uint8_t page_buf[SPM_PAGESIZE]; +} FlashAvr; +/* \} */ + +void flash_hw_init(struct Flash *fd); + +/** + * WARNING! + * This function is DEPRECADED! + * use the flash module instead. + */ +INLINE void flash_avr_init(struct FlashAvr *fd) +{ + flash_hw_init((struct Flash *)fd); +} + +#endif /* DRV_FLASH_AVR_H */ diff --git a/2.5/bertos/cpu/avr/drv/i2c_avr.c b/2.5/bertos/cpu/avr/drv/i2c_avr.c new file mode 100644 index 00000000..74252403 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/i2c_avr.c @@ -0,0 +1,253 @@ +/** + * \file + * + * + * \brief Driver for the AVR ATMega TWI (implementation) + * + * \version $Id$ + * + * \author Stefano Fedrigo + * \author Bernie Innocenti + */ + +#include /* CPU_FREQ */ + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + +#include +#include // BV() +#include + +#include +#include +#include +#include + +#include + + +/* Wait for TWINT flag set: bus is ready */ +#define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT))) + +/** + * Send START condition on the bus. + * + * \return true on success, false otherwise. + */ +static bool i2c_builtin_start(void) +{ + TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN); + WAIT_TWI_READY; + + if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START) + return true; + + LOG_ERR("!TW_(REP)START: %x\n", TWSR); + return false; +} + + +/** + * Send START condition and select slave for write. + * \c id is the device id comprehensive of address left shifted by 1. + * The LSB of \c id is ignored and reset to 0 for write operation. + * + * \return true on success, false otherwise. + */ +bool i2c_builtin_start_w(uint8_t id) +{ + /* + * Loop on the select write sequence: when the eeprom is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the eeprom responds with an ACK. + */ + ticks_t start = timer_clock(); + while (i2c_builtin_start()) + { + TWDR = id & ~I2C_READBIT; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_TWI_READY; + + if (TW_STATUS == TW_MT_SLA_ACK) + return true; + else if (TW_STATUS != TW_MT_SLA_NACK) + { + LOG_ERR("!TW_MT_SLA_(N)ACK: %x\n", TWSR); + break; + } + else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on TWI_MT_START\n"); + break; + } + } + + return false; +} + + +/** + * Send START condition and select slave for read. + * \c id is the device id comprehensive of address left shifted by 1. + * The LSB of \c id is ignored and set to 1 for read operation. + * + * \return true on success, false otherwise. + */ +bool i2c_builtin_start_r(uint8_t id) +{ + if (i2c_builtin_start()) + { + TWDR = id | I2C_READBIT; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_TWI_READY; + + if (TW_STATUS == TW_MR_SLA_ACK) + return true; + + LOG_ERR("!TW_MR_SLA_ACK: %x\n", TWSR); + } + + return false; +} + + +/** + * Send STOP condition. + */ +void i2c_builtin_stop(void) +{ + TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO); +} + + +/** + * Put a single byte in master transmitter mode + * to the selected slave device through the TWI bus. + * + * \return true on success, false on error. + */ +bool i2c_builtin_put(const uint8_t data) +{ + TWDR = data; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_TWI_READY; + if (TW_STATUS != TW_MT_DATA_ACK) + { + LOG_ERR("!TW_MT_DATA_ACK: %x\n", TWSR); + return false; + } + return true; +} + +/** + * Get 1 byte from slave in master transmitter mode + * to the selected slave device through the TWI bus. + * If \a ack is true issue a ACK after getting the byte, + * otherwise a NACK is issued. + * + * \return the byte read if ok, EOF on errors. + */ +int i2c_builtin_get(bool ack) +{ + TWCR = BV(TWINT) | BV(TWEN) | (ack ? BV(TWEA) : 0); + WAIT_TWI_READY; + + if (ack) + { + if (TW_STATUS != TW_MR_DATA_ACK) + { + LOG_ERR("!TW_MR_DATA_ACK: %x\n", TWSR); + return EOF; + } + } + else + { + if (TW_STATUS != TW_MR_DATA_NACK) + { + LOG_ERR("!TW_MR_DATA_NACK: %x\n", TWSR); + return EOF; + } + } + + /* avoid sign extension */ + return (int)(uint8_t)TWDR; +} + +MOD_DEFINE(i2c); + +/** + * Initialize TWI module. + */ +void i2c_builtin_init(void) +{ + ATOMIC( + /* + * This is pretty useless according to AVR's datasheet, + * but it helps us driving the TWI data lines on boards + * where the bus pull-up resistors are missing. This is + * probably due to some unwanted interaction between the + * port pin and the TWI lines. + */ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 + PORTD |= BV(PD0) | BV(PD1); + DDRD |= BV(PD0) | BV(PD1); +#elif CPU_AVR_ATMEGA8 + PORTC |= BV(PC4) | BV(PC5); + DDRC |= BV(PC4) | BV(PC5); +#elif CPU_AVR_ATMEGA32 + PORTC |= BV(PC1) | BV(PC0); + DDRC |= BV(PC1) | BV(PC0); +#else + #error Unsupported architecture +#endif + + /* + * Set speed: + * F = CPU_FREQ / (16 + 2*TWBR * 4^TWPS) + */ + #ifndef CONFIG_I2C_FREQ + #warning Using default value of 300000L for CONFIG_I2C_FREQ + #define CONFIG_I2C_FREQ 300000L /* ~300 kHz */ + #endif + #define TWI_PRESC 1 /* 4 ^ TWPS */ + + TWBR = (CPU_FREQ / (2 * CONFIG_I2C_FREQ * TWI_PRESC)) - (8 / TWI_PRESC); + TWSR = 0; + TWCR = BV(TWEN); + ); + MOD_INIT(i2c); +} diff --git a/2.5/bertos/cpu/avr/drv/kdebug_avr.c b/2.5/bertos/cpu/avr/drv/kdebug_avr.c new file mode 100644 index 00000000..81e78530 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/kdebug_avr.c @@ -0,0 +1,276 @@ +/** + * \file + * + * + * \brief AVR debug support (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include +#include + +#include + +#if CONFIG_KDEBUG_PORT == 0 + + /* + * Support for special bus policies or external transceivers + * on UART0 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART0_BUS_INIT + #define KDBG_UART0_BUS_INIT do { \ + UCR = BV(TXEN0); \ + } while (0) + #endif + #ifndef KDBG_UART0_BUS_RX + #define KDBG_UART0_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_TX + #define KDBG_UART0_BUS_TX do {} while (0) + #endif + + #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define UCR UCSR0B + #define UDR UDR0 + #define USR UCSR0A + #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #define UCR UCSRB + #define USR UCSRA + #define TXEN0 TXEN + #define UDRE0 UDRE + #define TXC0 TXC + #define TXCIE0 TXCIE + #define UDRIE0 UDRIE + #else + #error Unknown CPU + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0) + + /* + * We must clear the TXC flag before sending a new character to allow + * KDBG_WAIT_TXDONE() to work properly. + * + * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware, + * a new TXC could be generated after we've cleared it and before the new + * character is written to UDR. On a 485 bus, the transceiver will be put + * in RX mode while still transmitting the last char. + */ + #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCR; \ + UCR |= BV(TXEN0); \ + UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \ + KDBG_UART0_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART0_BUS_RX; \ + UCR = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 1 + + /* + * Support for special bus policies or external transceivers + * on UART1 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART1_BUS_INIT + #define KDBG_UART1_BUS_INIT do { \ + UCSR1B = BV(TXEN1); \ + } while (0) + #endif + #ifndef KDBG_UART1_BUS_RX + #define KDBG_UART1_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART1_BUS_TX + #define KDBG_UART1_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR1B; \ + UCSR1B |= BV(TXEN1); \ + UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \ + KDBG_UART1_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART1_BUS_RX; \ + UCSR1B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +/* + * Special debug port for BitBanged Serial see below for details... + */ +#elif CONFIG_KDEBUG_PORT == 666 + #include "hw/hw_ser.h" + #define KDBG_WAIT_READY() do { /*nop*/ } while(0) + #define KDBG_WRITE_CHAR(c) _kdebug_bitbang_putchar((c)) + #define KDBG_MASK_IRQ(old) do { IRQ_SAVE_DISABLE((old)); } while(0) + #define KDBG_RESTORE_IRQ(old) do { IRQ_RESTORE((old)); } while(0) + typedef cpu_flags_t kdbg_irqsave_t; + + #define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14 + + static void _kdebug_bitbang_delay(void) + { + unsigned long i; + + for (i = 0; i < KDBG_DELAY; i++) + { + NOP; + NOP; + NOP; + NOP; + NOP; + } + } + + /** + * Putchar for BITBANG serial debug console. + * Sometimes, we can't permit to use a whole serial for debugging purpose. + * Since debug console is in output only it is useful to use a single generic I/O pin for debug. + * This is achieved by this simple function, that shift out the data like a UART, but + * in software :) + * The only requirement is that SER_BITBANG_* macros will be defined somewhere (usually hw_ser.h) + * \note All interrupts are disabled during debug prints! + */ + static void _kdebug_bitbang_putchar(char c) + { + int i; + uint16_t data = c; + + /* Add stop bit */ + data |= 0x0100; + + /* Add start bit*/ + data <<= 1; + + /* Shift out data */ + uint16_t shift = 1; + for (i = 0; i < 10; i++) + { + if (data & shift) + SER_BITBANG_HIGH; + else + SER_BITBANG_LOW; + _kdebug_bitbang_delay(); + shift <<= 1; + } + } +#else + #error CONFIG_KDEBUG_PORT should be either 0, 1 or 666 +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == 666 + SER_BITBANG_INIT; + #else /* CONFIG_KDEBUG_PORT != 666 */ + /* Compute the baud rate */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1; + + #if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281) + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 1 + UBRR1H = (uint8_t)(period>>8); + UBRR1L = (uint8_t)period; + KDBG_UART1_BUS_INIT; + #else + #error CONFIG_KDEBUG_PORT must be either 0 or 1 + #endif + + #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + + #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #if CONFIG_KDEBUG_PORT == 0 + UBRRH = (uint8_t)(period>>8); + UBRRL = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + #elif CPU_AVR_ATMEGA103 + #if CONFIG_KDEBUG_PORT == 0 + UBRR = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + #else + #error Unknown CPU + #endif + #endif /* CONFIG_KDEBUG_PORT == 666 */ +} + diff --git a/2.5/bertos/cpu/avr/drv/pwm_avr.c b/2.5/bertos/cpu/avr/drv/pwm_avr.c new file mode 100644 index 00000000..1d76a1a3 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/pwm_avr.c @@ -0,0 +1,160 @@ +/** + * \file + * + * + * \brief Low-level PWM module for AVR (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + + +#include "pwm_avr.h" +#include + +#warning TODO:This is an exmple of implementation of PWM low level channel for AVR, implemnt it! + +/** + * Set PWM polarity to select pwm channel + */ +void pwm_hw_setPolarity(PwmDev dev, bool pol) +{ + + /* + * Put here a code to PWM polarity of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + (void)pol; +} + +/** + * Get preiod from select channel + * + * \a dev channel + */ +pwm_period_t pwm_hw_getPeriod(PwmDev dev) +{ + /* + * Put here a code to get period value of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + + return 0; +} + +/** + * Set pwm waveform frequecy. + * + * \a freq in Hz + */ +void pwm_hw_setFrequency(PwmDev dev, uint32_t freq) +{ + /* + * Put here a code to set frequency of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + (void)freq; + +} + +/** + * Set pwm duty cycle. + * + * \a duty value 0 - 2^16 + */ +void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty) +{ + /* + * Put here a code to set duty of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + (void)duty; + +} + + +/** + * Enable select pwm channel + */ +void pwm_hw_enable(PwmDev dev) +{ + /* + * Put here a code to enable + * a select PWM channel + */ + + //Only for test remove when implement this function + (void)dev; +} + +/** + * Disable select pwm channel + */ +void pwm_hw_disable(PwmDev dev) +{ + /* + * Put here a code to disable + * a select PWM channel + */ + + //Only for test remove when implement this function + (void)dev; +} + + +/** + * Init pwm. + */ +void pwm_hw_init(void) +{ + /* + * Put here a code to init + * a PWM hawdware + */ +} + + + + diff --git a/2.5/bertos/cpu/avr/drv/pwm_avr.h b/2.5/bertos/cpu/avr/drv/pwm_avr.h new file mode 100644 index 00000000..e3a6fa7f --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/pwm_avr.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief Low-level PWM module for AVR (interface). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#ifndef DRV_PWM_AVR_H +#define DRV_PWM_AVR_H + +#include "hw/pwm_map.h" + +#include + +#define PWM_HW_MAX_PRESCALER_STEP 10 +#define PWM_HW_MAX_PERIOD 0xFFFF + +/** + * Type definition for pwm period. + */ +typedef uint16_t pwm_period_t; + +/** + * Structur definition for pwm driver. + */ +typedef struct PwmChannel +{ + /* */ +} PwmChannel; + + +void pwm_hw_init(void); +void pwm_hw_setFrequency(PwmDev dev, uint32_t freq); +void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty); +void pwm_hw_disable(PwmDev dev); +void pwm_hw_enable(PwmDev dev); +void pwm_hw_setPolarity(PwmDev dev, bool pol); +pwm_period_t pwm_hw_getPeriod(PwmDev dev); + +#endif /* DRV_ADC_AT91_H */ diff --git a/2.5/bertos/cpu/avr/drv/ser_avr.c b/2.5/bertos/cpu/avr/drv/ser_avr.c new file mode 100644 index 00000000..2d25fbeb --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/ser_avr.c @@ -0,0 +1,939 @@ +/** + * \file + * + * + * \brief AVR UART and SPI I/O driver (Implementation) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Luca Ottaviano + */ + +#include "hw/hw_ser.h" /* Required for bus macros overrides */ +#include /* CPU_FREQ */ + +#include "cfg/cfg_ser.h" + +#include /* DIV_ROUND */ +#include +#include // ARCH_NIGHTTEST + +#include +#include +#include + +#include + +#include + +#if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL) + #include +#else + #include +#endif + + +#if !CONFIG_SER_HWHANDSHAKE + /** + * \name Hardware handshake (RTS/CTS). + * \{ + */ + #define RTS_ON do {} while (0) + #define RTS_OFF do {} while (0) + #define IS_CTS_ON true + #define EIMSKF_CTS 0 /**< Dummy value, must be overridden */ + /*\}*/ +#endif + +#if CPU_AVR_ATMEGA1281 + #define BIT_RXCIE0 RXCIE0 + #define BIT_RXEN0 RXEN0 + #define BIT_TXEN0 TXEN0 + #define BIT_UDRIE0 UDRIE0 + + #define BIT_RXCIE1 RXCIE1 + #define BIT_RXEN1 RXEN1 + #define BIT_TXEN1 TXEN1 + #define BIT_UDRIE1 UDRIE1 +#elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define BIT_RXCIE0 RXCIE0 + #define BIT_RXEN0 RXEN0 + #define BIT_TXEN0 TXEN0 + #define BIT_UDRIE0 UDRIE0 + + #define BIT_RXCIE1 RXCIE0 + #define BIT_RXEN1 RXEN0 + #define BIT_TXEN1 TXEN0 + #define BIT_UDRIE1 UDRIE0 +#else + #define BIT_RXCIE0 RXCIE + #define BIT_RXEN0 RXEN + #define BIT_TXEN0 TXEN + #define BIT_UDRIE0 UDRIE + + #define BIT_RXCIE1 RXCIE + #define BIT_RXEN1 RXEN + #define BIT_TXEN1 TXEN + #define BIT_UDRIE1 UDRIE +#endif + + +/** + * \name Overridable serial bus hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as half-duplex, 485, etc. + * + * + * \code + * TXBEGIN TXCHAR TXEND TXOFF + * | __________|__________ | | + * | | | | | | | | | + * v v v v v v v v v + * ______ __ __ __ __ __ __ ________________ + * \/ \/ \/ \/ \/ \/ \/ + * ______/\__/\__/\__/\__/\__/\__/ + * + * \endcode + * + * \{ + */ +#ifndef SER_UART0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart0_init() + * + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + #define SER_UART0_BUS_TXINIT do { \ + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXBEGIN + /** + * Invoked before starting a transmission + * + * - Enable both the receiver and the transmitter + * - Enable both the RX complete and UDR empty interrupts + */ + #define SER_UART0_BUS_TXBEGIN do { \ + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART0_BUS_TXCHAR(c) do { \ + UDR0 = (c); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + * + * - Keep both the receiver and the transmitter enabled + * - Keep the RX complete interrupt enabled + * - Disable the UDR empty interrupt + */ + #define SER_UART0_BUS_TXEND do { \ + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXOFF + /** + * \def SER_UART0_BUS_TXOFF + * + * Invoked after the last character has been transmitted + * + * The default is no action. + */ + #ifdef __doxygen__ + #define SER_UART0_BUS_TXOFF + #endif +#endif + +#ifndef SER_UART1_BUS_TXINIT + /** \sa SER_UART0_BUS_TXINIT */ + #define SER_UART1_BUS_TXINIT do { \ + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXBEGIN + /** \sa SER_UART0_BUS_TXBEGIN */ + #define SER_UART1_BUS_TXBEGIN do { \ + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXCHAR + /** \sa SER_UART0_BUS_TXCHAR */ + #define SER_UART1_BUS_TXCHAR(c) do { \ + UDR1 = (c); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXEND + /** \sa SER_UART0_BUS_TXEND */ + #define SER_UART1_BUS_TXEND do { \ + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXOFF + /** + * \def SER_UART1_BUS_TXOFF + * + * \see SER_UART0_BUS_TXOFF + */ + #ifdef __doxygen__ + #define SER_UART1_BUS_TXOFF + #endif +#endif +/*\}*/ + + +/** + * \name Overridable SPI hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as slave select pin handling, etc. + * + * \{ + */ +#ifndef SER_SPI_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI_BUS_TXINIT +#endif + +#ifndef SER_SPI_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI_BUS_TXCLOSE +#endif +/*\}*/ + + +/* SPI port and pin configuration */ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA1281 + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PB0 + #define SPI_SCK_BIT PB1 + #define SPI_MOSI_BIT PB2 + #define SPI_MISO_BIT PB3 +// TODO: these bits are the same as ATMEGA8 but the defines in avr-gcc are different. +// They should be the same! +#elif CPU_AVR_ATMEGA328P + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PORTB2 + #define SPI_SCK_BIT PORTB5 + #define SPI_MOSI_BIT PORTB3 + #define SPI_MISO_BIT PORTB4 +#elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA168 + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PB2 + #define SPI_SCK_BIT PB5 + #define SPI_MOSI_BIT PB3 + #define SPI_MISO_BIT PB4 +#else + #error Unknown architecture +#endif + +/* USART register definitions */ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 + #define AVR_HAS_UART1 1 +#elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define AVR_HAS_UART1 0 + #define USART0_UDRE_vect USART_UDRE_vect + #define USART0_RX_vect USART_RX_vect + #define USART0_TX_vect USART_TX_vect +#elif CPU_AVR_ATMEGA8 + #define AVR_HAS_UART1 0 + #define UCSR0A UCSRA + #define UCSR0B UCSRB + #define UCSR0C UCSRC + #define UDR0 UDR + #define UBRR0L UBRRL + #define UBRR0H UBRRH + #define USART0_UDRE_vect USART_UDRE_vect + #define USART0_RX_vect USART_RX_vect + #define USART0_TX_vect USART_TX_vect +#elif CPU_AVR_ATMEGA103 + #define AVR_HAS_UART1 0 + #define UCSR0B UCR + #define UDR0 UDR + #define UCSR0A USR + #define UBRR0L UBRR + #define USART0_UDRE_vect USART_UDRE_vect + #define USART0_RX_vect USART_RX_vect + #define USART0_TX_vect USART_TX_vect +#else + #error Unknown architecture +#endif + + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; +#if AVR_HAS_UART1 + static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; + static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; +#endif +static unsigned char spi_txbuffer[CONFIG_SPI_TXBUFSIZE]; +static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE]; + + +/** + * Internal hardware state structure + * + * The \a sending variable is true while the transmission + * interrupt is retriggering itself. + * + * For the USARTs the \a sending flag is useful for taking specific + * actions before sending a burst of data, at the start of a trasmission + * but not before every char sent. + * + * For the SPI, this flag is necessary because the SPI sends and receives + * bytes at the same time and the SPI IRQ is unique for send/receive. + * The only way to start transmission is to write data in SPDR (this + * is done by spi_starttx()). We do this *only* if a transfer is + * not already started. + */ +struct AvrSerial +{ + struct SerialHardware hw; + volatile bool sending; +}; + + + +/* + * Callbacks + */ +static void uart0_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + SER_UART0_BUS_TXINIT; + RTS_ON; + SER_STROBE_INIT; +} + +static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + UCSR0B = 0; +} + +static void uart0_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART0_BUS_TXBEGIN; + } +} + +static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, rate) - 1; + +#if !CPU_AVR_ATMEGA103 + UBRR0H = (period) >> 8; +#endif + UBRR0L = (period); + + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ +#if !CPU_AVR_ATMEGA103 + UCSR0C = (UCSR0C & ~(BV(UPM01) | BV(UPM00))) | ((parity) << UPM00); +#endif +} + +#if AVR_HAS_UART1 + +static void uart1_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + SER_UART1_BUS_TXINIT; + RTS_ON; + SER_STROBE_INIT; +} + +static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + UCSR1B = 0; +} + +static void uart1_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt + * sets hw->sending to false when it runs with + * an empty fifo. The order of the statements + * in the if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART1_BUS_TXBEGIN; + } +} + +static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, rate) - 1; + + UBRR1H = (period) >> 8; + UBRR1L = (period); + + //DB(kprintf("uart1_setbaudrate(rate=%ld): period=%d\n", rate, period);) +} + +static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + UCSR1C = (UCSR1C & ~(BV(UPM11) | BV(UPM10))) | ((parity) << UPM10); +} + +#endif // AVR_HAS_UART1 + +static void spi_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + /* + * Set MOSI and SCK ports out, MISO in. + * + * The ATmega64/128 datasheet explicitly states that the input/output + * state of the SPI pins is not significant, as when the SPI is + * active the I/O port are overrided. + * This is *blatantly FALSE*. + * + * Moreover, the MISO pin on the board_kc *must* be in high impedance + * state even when the SPI is off, because the line is wired together + * with the KBus serial RX, and the transmitter of the slave boards + * would be unable to drive the line. + */ + ATOMIC(SPI_DDR |= (BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT))); + + /* + * If the SPI master mode is activated and the SS pin is in input and tied low, + * the SPI hardware will automatically switch to slave mode! + * For proper communication this pins should therefore be: + * - as output + * - as input but tied high forever! + * This driver set the pin as output. + */ + #warning FIXME:SPI SS pin set as output for proper operation, check schematics for possible conflicts. + ATOMIC(SPI_DDR |= BV(SPI_SS_BIT)); + + ATOMIC(SPI_DDR &= ~BV(SPI_MISO_BIT)); + /* Enable SPI, IRQ on, Master */ + SPCR = BV(SPE) | BV(SPIE) | BV(MSTR); + + /* Set data order */ + #if CONFIG_SPI_DATA_ORDER == SER_LSB_FIRST + SPCR |= BV(DORD); + #endif + + /* Set SPI clock rate */ + #if CONFIG_SPI_CLOCK_DIV == 128 + SPCR |= (BV(SPR1) | BV(SPR0)); + #elif (CONFIG_SPI_CLOCK_DIV == 64 || CONFIG_SPI_CLOCK_DIV == 32) + SPCR |= BV(SPR1); + #elif (CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 8) + SPCR |= BV(SPR0); + #elif (CONFIG_SPI_CLOCK_DIV == 4 || CONFIG_SPI_CLOCK_DIV == 2) + // SPR0 & SDPR1 both at 0 + #else + #error Unsupported SPI clock division factor. + #endif + + /* Set SPI2X bit (spi double frequency) */ + #if (CONFIG_SPI_CLOCK_DIV == 128 || CONFIG_SPI_CLOCK_DIV == 64 \ + || CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 4) + SPSR &= ~BV(SPI2X); + #elif (CONFIG_SPI_CLOCK_DIV == 32 || CONFIG_SPI_CLOCK_DIV == 8 || CONFIG_SPI_CLOCK_DIV == 2) + SPSR |= BV(SPI2X); + #else + #error Unsupported SPI clock division factor. + #endif + + /* Set clock polarity */ + #if CONFIG_SPI_CLOCK_POL == 1 + SPCR |= BV(CPOL); + #endif + + /* Set clock phase */ + #if CONFIG_SPI_CLOCK_PHASE == 1 + SPCR |= BV(CPHA); + #endif + SER_SPI_BUS_TXINIT; + + SER_STROBE_INIT; +} + +static void spi_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + SPCR = 0; + + SER_SPI_BUS_TXCLOSE; + + /* Set all pins as inputs */ + ATOMIC(SPI_DDR &= ~(BV(SPI_MISO_BIT) | BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT) | BV(SPI_SS_BIT))); +} + +static void spi_starttx(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI]->txfifo)) + { + hw->sending = true; + SPDR = fifo_pop(&ser_handles[SER_SPI]->txfifo); + } + + IRQ_RESTORE(flags); +} + +static void spi_setbaudrate( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(unsigned long, rate)) +{ + // nop +} + +static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity)) +{ + // nop +} + +static bool tx_sending(struct SerialHardware* _hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + return hw->sending; +} + + + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures + */ +static const struct SerialHardwareVT UART0_VT = +{ + C99INIT(init, uart0_init), + C99INIT(cleanup, uart0_cleanup), + C99INIT(setBaudrate, uart0_setbaudrate), + C99INIT(setParity, uart0_setparity), + C99INIT(txStart, uart0_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +#if AVR_HAS_UART1 +static const struct SerialHardwareVT UART1_VT = +{ + C99INIT(init, uart1_init), + C99INIT(cleanup, uart1_cleanup), + C99INIT(setBaudrate, uart1_setbaudrate), + C99INIT(setParity, uart1_setparity), + C99INIT(txStart, uart1_enabletxirq), + C99INIT(txSending, tx_sending), +}; +#endif // AVR_HAS_UART1 + +static const struct SerialHardwareVT SPI_VT = +{ + C99INIT(init, spi_init), + C99INIT(cleanup, spi_cleanup), + C99INIT(setBaudrate, spi_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi_starttx), + C99INIT(txSending, tx_sending), +}; + +static struct AvrSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &UART0_VT), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(sending, false), + }, +#if AVR_HAS_UART1 + { + C99INIT(hw, /**/) { + C99INIT(table, &UART1_VT), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(sending, false), + }, +#endif + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI_VT), + C99INIT(txbuffer, spi_txbuffer), + C99INIT(rxbuffer, spi_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi_rxbuffer)), + }, + C99INIT(sending, false), + } +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} + + +/* + * Interrupt handlers + */ + +#if CONFIG_SER_HWHANDSHAKE + +/// This interrupt is triggered when the CTS line goes high +DECLARE_ISR(SIG_CTS) +{ + // Re-enable UDR empty interrupt and TX, then disable CTS interrupt + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); + EIMSK &= ~EIMSKF_CTS; +} + +#endif // CONFIG_SER_HWHANDSHAKE + + +/** + * Serial 0 TX interrupt handler + */ +DECLARE_ISR(USART0_UDRE_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + + if (fifo_isempty(txfifo)) + { + SER_UART0_BUS_TXEND; +#ifndef SER_UART0_BUS_TXOFF + UARTDescs[SER_UART0].sending = false; +#endif + } +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 + else if (!IS_CTS_ON) + { + // Disable rx interrupt and tx, enable CTS interrupt + // UNTESTED + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; + } +#endif + else + { + char c = fifo_pop(txfifo); + SER_UART0_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +#ifdef SER_UART0_BUS_TXOFF +/** + * Serial port 0 TX complete interrupt handler. + * + * This IRQ is usually disabled. The UDR-empty interrupt + * enables it when there's no more data to transmit. + * We need to wait until the last character has been + * transmitted before switching the 485 transceiver to + * receive mode. + * + * The txfifo might have been refilled by putchar() while + * we were waiting for the transmission complete interrupt. + * In this case, we must restart the UDR empty interrupt, + * otherwise we'd stop the serial port with some data + * still pending in the buffer. + */ +DECLARE_ISR(USART0_TX_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART0_BUS_TXOFF; + UARTDescs[SER_UART0].sending = false; + } + else + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); + + SER_STROBE_OFF; +} +#endif /* SER_UART0_BUS_TXOFF */ + + +#if AVR_HAS_UART1 + +/** + * Serial 1 TX interrupt handler + */ +DECLARE_ISR(USART1_UDRE_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + + if (fifo_isempty(txfifo)) + { + SER_UART1_BUS_TXEND; +#ifndef SER_UART1_BUS_TXOFF + UARTDescs[SER_UART1].sending = false; +#endif + } +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 + else if (!IS_CTS_ON) + { + // Disable rx interrupt and tx, enable CTS interrupt + // UNTESTED + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; + } +#endif + else + { + char c = fifo_pop(txfifo); + SER_UART1_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +#ifdef SER_UART1_BUS_TXOFF +/** + * Serial port 1 TX complete interrupt handler. + * + * \sa port 0 TX complete handler. + */ +DECLARE_ISR(USART1_TX_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART1_BUS_TXOFF; + UARTDescs[SER_UART1].sending = false; + } + else + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); + + SER_STROBE_OFF; +} +#endif /* SER_UART1_BUS_TXOFF */ + +#endif // AVR_HAS_UART1 + + +/** + * Serial 0 RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + * + * \note The code that re-enables interrupts is commented out + * because in some nasty cases the interrupt is retriggered. + * This is probably due to the RXC flag being set before + * RXCIE is cleared. Unfortunately the RXC flag is read-only + * and can't be cleared by code. + */ +DECLARE_ISR(USART0_RX_vect) +{ + SER_STROBE_ON; + + /* Disable Recv complete IRQ */ + //UCSR0B &= ~BV(RXCIE); + //IRQ_ENABLE; + + /* Should be read before UDR */ + ser_handles[SER_UART0]->status |= UCSR0A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + + /* To clear the RXC flag we must _always_ read the UDR even when we're + * not going to accept the incoming data, otherwise a new interrupt + * will occur once the handler terminates. + */ + char c = UDR0; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN; + else + { + fifo_push(rxfifo, c); +#if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + RTS_OFF; +#endif + } + + /* Reenable receive complete int */ + //IRQ_DISABLE; + //UCSR0B |= BV(RXCIE); + + SER_STROBE_OFF; +} + + +#if AVR_HAS_UART1 + +/** + * Serial 1 RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + * + * \see DECLARE_ISR(USART1_RX_vect) + */ +DECLARE_ISR(USART1_RX_vect) +{ + SER_STROBE_ON; + + /* Disable Recv complete IRQ */ + //UCSR1B &= ~BV(RXCIE); + //IRQ_ENABLE; + + /* Should be read before UDR */ + ser_handles[SER_UART1]->status |= UCSR1A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + + /* To avoid an IRQ storm, we must _always_ read the UDR even when we're + * not going to accept the incoming data + */ + char c = UDR1; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo; + //ASSERT_VALID_FIFO(rxfifo); + + if (UNLIKELY(fifo_isfull(rxfifo))) + ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN; + else + { + fifo_push(rxfifo, c); +#if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + RTS_OFF; +#endif + } + /* Re-enable receive complete int */ + //IRQ_DISABLE; + //UCSR1B |= BV(RXCIE); + + SER_STROBE_OFF; +} + +#endif // AVR_HAS_UART1 + + +/** + * SPI interrupt handler + */ +DECLARE_ISR(SPI_STC_vect) +{ + SER_STROBE_ON; + + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI]->rxfifo)) + fifo_push(&ser_handles[SER_SPI]->rxfifo, SPDR); + /* + * FIXME + else + ser_handles[SER_SPI]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI]->txfifo)) + SPDR = fifo_pop(&ser_handles[SER_SPI]->txfifo); + else + UARTDescs[SER_SPI].sending = false; + + SER_STROBE_OFF; +} diff --git a/2.5/bertos/cpu/avr/drv/ser_avr.h b/2.5/bertos/cpu/avr/drv/ser_avr.h new file mode 100644 index 00000000..a5a74b52 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/ser_avr.h @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Daniele Basile + * \author Luca Ottaviano + * + * \brief Low-level serial module for AVR (interface). + * + */ + +#ifndef DRV_SER_AVR_H +#define DRV_SER_AVR_H + +#include /* BV() */ +#include /* uint32_t */ + +typedef uint8_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(5) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(6) /**< Transmit timeout */ + +/* +* Hardware errors. +* These flags map directly to the AVR UART Status Register (USR). +*/ +#define SERRF_RXSROVERRUN BV(3) /**< Rx shift register overrun */ +#define SERRF_FRAMEERROR BV(4) /**< Stop bit missing */ +#define SERRF_PARITYERROR BV(7) /**< Parity error */ +#define SERRF_NOISEERROR 0 /**< Unsupported */ + + +/** + * SPI clock polarity. + * + * $WIZ$ ser_spi_pol = "SPI_NORMAL_LOW", "SPI_NORMAL_HIGH" + * } + */ +#define SPI_NORMAL_LOW 0 +#define SPI_NORMAL_HIGH 1 + +/** + * SPI clock phase. + * + * $WIZ$ ser_spi_phase = "SPI_SAMPLE_ON_FIRST_EDGE", "SPI_SAMPLE_ON_SECOND_EDGE" + * } + */ +#define SPI_SAMPLE_ON_FIRST_EDGE 0 +#define SPI_SAMPLE_ON_SECOND_EDGE 1 + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 + SER_UART0, + SER_UART1, + SER_SPI, +#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + SER_UART0, + SER_SPI, +#else + #error unknown architecture +#endif + SER_CNT /**< Number of serial ports */ +}; +/*\}*/ + +#endif /* DRV_SER_AVR_H */ diff --git a/2.5/bertos/cpu/avr/drv/ser_simple_avr.c b/2.5/bertos/cpu/avr/drv/ser_simple_avr.c new file mode 100644 index 00000000..66a00222 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/ser_simple_avr.c @@ -0,0 +1,172 @@ +/** + * \file + * + * + * \brief Simple serial I/O driver + * + * \version $Id$ + * \author Francesco Sacchi + */ + + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +#include "ser_simple_avr.h" + +#include +#include +#include /* BV() */ +#include + +#include + +/** + * Send a character over the serial line. + * + * \return the character sent. + */ +int _ser_putchar(int c) +{ + /* Disable Rx to avoid echo*/ + UCSR0B &= ~BV(RXEN); + /* Enable tx*/ + UCSR0B |= BV(TXEN); + /* Prepare transmission */ + UDR0 = c; + /* Wait until byte sent */ + while (!(UCSR0A & BV(TXC))) {} + /* Disable tx to avoid short circuit when tx and rx share the same wire. */ + UCSR0B &= ~BV(TXEN); + /* Enable Rx */ + UCSR0B |= BV(RXEN); + /* Delete TRANSMIT_COMPLETE_BIT flag */ + UCSR0A |= BV(TXC); + return c; +} + + +/** + * Get a character from the serial line. + * If ther is no character in the buffer this function wait until + * one is received (no timeout). + * + * \return the character received. + */ +int _ser_getchar(void) +{ + /* Wait for data */ + while (!(UCSR0A & BV(RXC))) {} + return UDR0; + +} + + +/** + * Get a character from the receiver buffer + * If the buffer is empty, ser_getchar_nowait() returns + * immediatly EOF. + */ +int _ser_getchar_nowait(void) +{ + if (!(UCSR0A & BV(RXC))) return EOF; + else return UDR0; +} + +void _ser_settimeouts(void) +{ +} + +/** + * Set the baudrate. + */ +void _ser_setbaudrate(unsigned long rate) +{ + /* Compute baud-rate period */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, rate) - 1; + + UBRR0H = (period) >> 8; + UBRR0L = (period); +} + +/** + * Send a string. + */ +int _ser_print(const char *s) +{ + while(*s) _ser_putchar(*s++); + return 0; +} + + +void _ser_setparity(int parity) +{ + /* Set the new parity */ + UCSR0C |= (UCSR0C & ~(BV(UPM1) | BV(UPM0))) | (parity << UPM0); +} + +/** + * Dummy functions. + */ +void _ser_purge(void) +{ + while (_ser_getchar_nowait() != EOF) {} +} + +/** + * Initialize serial. + */ +struct Serial * _ser_open(void) +{ + /* + * Set Rx and Tx pins as input to avoid short + * circuit when serial is disabled. + */ + DDRE &= ~(BV(PE0)|BV(PE1)); + PORTE &= ~BV(PE0); + PORTE |= BV(PE1); + /* Enable only Rx section */ + UCSR0B = BV(RXEN); + return NULL; +} + + +/** + * Clean up serial port, disabling the associated hardware. + */ +void _ser_close(void) +{ + /* Disable Rx & Tx. */ + UCSR0B &= ~(BV(RXEN) | BV(TXEN)); +} + +#endif + diff --git a/2.5/bertos/cpu/avr/drv/ser_simple_avr.h b/2.5/bertos/cpu/avr/drv/ser_simple_avr.h new file mode 100644 index 00000000..c6d85883 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/ser_simple_avr.h @@ -0,0 +1,151 @@ +/** + * \file + * + * + * \brief Simple serial I/O driver + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#ifndef DRV_SER_SIMPLE_AVR_H +#define DRV_SER_SIMPLE_AVR_H + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +/* For checking which serial driver is linked */ +#define SER_SIMPLE + +#include +#include + + +#if 0 +#if CPU_AVR + typedef uint8_t serstatus_t; + + /* Software errors */ + #define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ + #define SERRF_RXTIMEOUT BV(5) /**< Receive timeout */ + #define SERRF_TXTIMEOUT BV(6) /**< Transmit timeout */ + + /* Hardware errors */ + #define SERRF_RXSROVERRUN BV(3) /**< Rx shift register overrun */ + #define SERRF_FRAMEERROR BV(4) /**< Stop bit missing */ + #define SERRF_PARITYERROR BV(7) /**< Parity error */ +#else + #error unknown architecture +#endif +/*\}*/ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 + SER_UART0, + SER_UART1, + SER_SPI, +#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 + SER_UART0, + SER_SPI, +#else + #error unknown architecture +#endif + SER_CNT /**< Number of serial ports */ +}; +/*\}*/ +#endif + +/** \name Parity settings for ser_setparity() */ +/*\{*/ +#define SER_PARITY_NONE 0 +#define SER_PARITY_EVEN 2 +#define SER_PARITY_ODD 3 +/*\}*/ + + +/** Serial handle structure */ +struct Serial; + +/* Function prototypes */ +extern int _ser_putchar(int c); +extern int _ser_getchar(void); +extern int _ser_getchar_nowait(void); +/* +extern int ser_write(struct Serial *port, const void *buf, size_t len); +extern int ser_read(struct Serial *port, void *buf, size_t size); + +extern int ser_printf(struct Serial *port, const char *format, ...) FORMAT(__printf__, 2, 3); + +extern int ser_gets(struct Serial *port, char *buf, int size); +extern int ser_gets_echo(struct Serial *port, char *buf, int size, bool echo); +*/ +extern int _ser_print(const char *s); + +extern void _ser_setbaudrate(unsigned long rate); +extern void _ser_setparity(int parity); +extern void _ser_settimeouts(void); +extern void _ser_setstatus(void); +/* +extern void ser_resync(struct Serial *port, time_t delay); +extern void ser_drain(struct Serial *port); +*/ +extern void _ser_purge(void); +extern struct Serial *_ser_open(void); +extern void _ser_close(void); + +/** + * \name Functions implemented as macros + * + * \{ + */ +#define ser_putchar(c, port) _ser_putchar(c) +#define ser_getchar(port) _ser_getchar() +#define ser_getchar_nowait(port) _ser_getchar_nowait() +#define ser_print(port, s) _ser_print(s) +#define ser_setbaudrate(port, y) _ser_setbaudrate(y) +#define ser_setparity(port, par) _ser_setparity(par) +#define ser_settimeouts(port, y, z) _ser_settimeouts() +#define ser_purge(port) _ser_purge() +#define ser_open(port) _ser_open() +#define ser_getstatus(h) 0 +#define ser_setstatus(h, x) do {(void)(x);} while(0) +/* \} */ + +#endif /* DRV_SER_SIMPLE_AVR_H */ + +#endif diff --git a/2.5/bertos/cpu/avr/drv/stepper_avr.c b/2.5/bertos/cpu/avr/drv/stepper_avr.c new file mode 100644 index 00000000..113865c5 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/stepper_avr.c @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for AVR (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#include "stepper_avr.h" + +#include "cfg/cfg_stepper.h" +#include +#include + +#include +#include + + +#warning TODO:This is an example, you must implement it! + +///< Static array of timer counter struct for stepper. +/* + static struct TimerCounter stepper_timers[CONFIG_TC_STEPPER_MAX_NUM] = + { + { //Timer Counter settings for TIO0 output pin + // fill with stepper timer channel settings + } + + // Add here other stepper timer channel settings + }; +*/ + +/** + * Timer couter setup. + * + * This function apply to select timer couter all needed settings. + * Every settings are stored in stepper_timers[]. + */ +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor) +{ + /* Put here the code to setup the stepper timer drive */ + + //Only for test remove when implement this function + (void)index; + (void)callback; + (void)motor; +} + +/** + * Timer counter init. + */ +void stepper_tc_init(void) +{ + /* Put here the code to init the stepper timer drive */ +} + diff --git a/2.5/bertos/cpu/avr/drv/stepper_avr.h b/2.5/bertos/cpu/avr/drv/stepper_avr.h new file mode 100644 index 00000000..840734e7 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/stepper_avr.h @@ -0,0 +1,141 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for AVR (inplementation). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#ifndef DRV_STEPPER_AVR_H +#define DRV_STEPPER_AVR_H + + +#include +#include + +#include + +#warning TODO:This is an example, you must implement it! + +/** + * IRQ callback function type definition. + */ +typedef void (*irq_t)(void); + +/** + * Timer contex structure. + */ +typedef struct TimerCounter +{ + int timer_id; ///< Timer counter ID + irq_t isr; ///< IRQ handler + stepper_isr_t callback; ///< Interrupt callback pointer + struct Stepper *motor; ///< Stepper context structure + +} TimerCounter; + +/** + * Enable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_enable(struct TimerCounter *timer) +{ + /* put here code to enable timer irq */ + + //Only for test remove when implement this function + (void)timer; +} + + +/** + * Disable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_disable(struct TimerCounter *timer) +{ + /* put here code to disable timer irq */ + + //Only for test remove when implement this function + (void)timer; +} + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_setDelay(struct TimerCounter *timer, stepper_time_t delay) +{ + /* put here code to set the delay for next irq */ + + //Only for test remove when implement this function + (void)timer; + (void)delay; +} + + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_resetTimer(struct TimerCounter *timer) +{ + /* put here code to reset the timer */ + + //Only for test remove when implement this function + (void)timer; +} + +/** + * Programm timer counter to generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_doPulse(struct TimerCounter *timer) +{ + /* put here code to generate a pulse */ + + //Only for test remove when implement this function + (void)timer; +} + +/** + * Programm timer counter to not generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_skipPulse(struct TimerCounter *timer) +{ + /* put here code to skip a pulse */ + + //Only for test remove when implement this function + (void)timer; +} + +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor); +void stepper_tc_init(void); + +#endif /*DRV_STEPPER_AVR_H */ diff --git a/2.5/bertos/cpu/avr/drv/timer_avr.c b/2.5/bertos/cpu/avr/drv/timer_avr.c new file mode 100644 index 00000000..70876c01 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/timer_avr.c @@ -0,0 +1,259 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * \author Luca Ottaviano + * + * \brief Low-level timer module for AVR (implementation). + * + * This module is automatically included so no need to include + * in test list. + * notest: avr + */ + +#include +#include // BV() + +#include +#include + +#include + +#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define REG_TIFR0 TIFR0 + #define REG_TIFR1 TIFR1 + #define REG_TIFR2 TIFR2 + #if CPU_AVR_ATMEGA1281 + #define REG_TIFR3 TIFR3 + #endif + + #define REG_TIMSK0 TIMSK0 + #define REG_TIMSK1 TIMSK1 + #define REG_TIMSK2 TIMSK2 + #if CPU_AVR_ATMEGA1281 + #define REG_TIMSK3 TIMSK3 + #endif + + #define REG_TCCR0A TCCR0A + #define REG_TCCR0B TCCR0B + + #define REG_TCCR2A TCCR2A + #define REG_TCCR2B TCCR2B + + #define REG_OCR0A OCR0A + #define REG_OCR2A OCR2A + + #define BIT_OCF0A OCF0A + #define BIT_OCF2A OCF2A + + #define BIT_OCIE0A OCIE0A + #define BIT_OCIE2A OCIE2A +#else + #define REG_TIFR0 TIFR + #define REG_TIFR1 TIFR + #define REG_TIFR2 TIFR + #define REG_TIFR3 TIFR + + #define REG_TIMSK0 TIMSK + #define REG_TIMSK1 TIMSK + #define REG_TIMSK2 TIMSK + #define REG_TIMSK3 ETIMSK + + #define REG_TCCR0A TCCR0 + #define REG_TCCR0B TCCR0 + + #define REG_TCCR2A TCCR2 + #define REG_TCCR2B TCCR2 + + #define REG_OCR0A OCR0 + #define REG_OCR2A OCR2 + + #define BIT_OCF0A OCF0 + #define BIT_OCF2A OCF2 + + #define BIT_OCIE0A OCIE0 + #define BIT_OCIE2A OCIE2 +#endif + +#if CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA103 + /* These ATMega have different prescaler options. */ + #define TIMER0_PRESCALER_64 BV(CS02) + #define TIMER2_PRESCALER_64 (BV(CS21) | BV(CS20)) +#else + #define TIMER0_PRESCALER_64 (BV(CS01) | BV(CS00)) + #define TIMER2_PRESCALER_64 BV(CS22) +#endif + +/** HW dependent timer initialization */ +#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) + + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer flags */ + REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0); + + /* Setup Timer/Counter interrupt */ + ASSR = 0x00; /* Internal system clock */ + + REG_TCCR0A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to + REG_TCCR0B = 0; + + REG_TCCR0A = BV(WGM01); /* Clear on Compare match */ + #if TIMER_PRESCALER == 64 + REG_TCCR0B |= TIMER0_PRESCALER_64; + #else + #error Unsupported value of TIMER_PRESCALER + #endif + + TCNT0 = 0x00; /* Initialization of Timer/Counter */ + REG_OCR0A = OCR_DIVISOR; /* Timer/Counter Output Compare Register */ + + /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ + REG_TIMSK0 &= ~BV(TOIE0); + REG_TIMSK0 |= BV(BIT_OCIE0A); + + IRQ_RESTORE(flags); + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) + + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer overflow flag */ + REG_TIFR1 |= BV(TOV1); + + /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */ + #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9) + TCCR1A |= BV(WGM11); + TCCR1A &= ~BV(WGM10); + TCCR1B |= BV(WGM12) | BV(CS10); + TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12)); + /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */ + #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8) + TCCR1A |= BV(WGM10); + TCCR1A &= ~BV(WGM11); + TCCR1B |= BV(WGM12) | BV(CS10); + TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12)); + #else + #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS + #endif + + TCNT1 = 0x00; /* initialization of Timer/Counter */ + + /* Enable timer interrupt: Timer/Counter1 Overflow */ + REG_TIMSK1 |= BV(TOIE1); + + IRQ_RESTORE(flags); + } + +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer flags */ + REG_TIFR2 = BV(BIT_OCF2A) | BV(TOV2); + + /* Setup Timer/Counter interrupt */ + REG_TCCR2A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to + REG_TCCR2B = 0; // ensure correct initialization. + + REG_TCCR2A = BV(WGM21); + #if TIMER_PRESCALER == 64 + REG_TCCR2B |= TIMER2_PRESCALER_64; + #else + #error Unsupported value of TIMER_PRESCALER + #endif + + /* Clear on Compare match & prescaler = 64, internal sys clock. + When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */ + TCNT2 = 0x00; /* initialization of Timer/Counter */ + REG_OCR2A = (uint8_t)OCR_DIVISOR; /* Timer/Counter Output Compare Register */ + + /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ + REG_TIMSK2 &= ~BV(TOIE2); + REG_TIMSK2 |= BV(BIT_OCIE2A); + + IRQ_RESTORE(flags); + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3) + + #if CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA32 + #error For select target there is not TIMER_ON_OVERFLOW3, please select an other one. + #endif + + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer overflow flag */ + REG_TIFR3 |= BV(TOV3); + + /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */ + #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9) + TCCR3A |= BV(WGM31); + TCCR3A &= ~BV(WGM30); + TCCR3B |= BV(WGM32) | BV(CS30); + TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32)); + /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */ + #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8) + TCCR3A |= BV(WGM30); + TCCR3A &= ~BV(WGM31); + TCCR3B |= BV(WGM32) | BV(CS30); + TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32)); + #else + #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS + #endif + + /* initialization of Timer/Counter */ + TCNT3 = 0x00; + + /* Enable timer interrupt: Timer/Counter3 Overflow */ + REG_TIMSK3 |= BV(TOIE3); + + IRQ_RESTORE(flags); + } + +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + diff --git a/2.5/bertos/cpu/avr/drv/timer_avr.h b/2.5/bertos/cpu/avr/drv/timer_avr.h new file mode 100644 index 00000000..78225ff1 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/timer_avr.h @@ -0,0 +1,173 @@ +/** + * \file + * + * + * \brief Low-level timer module for AVR (interface). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * \author Luca Ottaviano + * + */ + +#ifndef DRV_TIMER_AVR_H +#define DRV_TIMER_AVR_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* DIV_ROUND */ + +#include +#include + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * \note The timer 1 overflow mode set the timer as a 24 kHz PWM. + * $WIZ$ timer_select = "TIMER_ON_OUTPUT_COMPARE0", "TIMER_ON_OVERFLOW1", "TIMER_ON_OUTPUT_COMPARE2", "TIMER_ON_OVERFLOW3", "TIMER_DEFAULT" + */ +#define TIMER_ON_OUTPUT_COMPARE0 1 +#define TIMER_ON_OVERFLOW1 2 +#define TIMER_ON_OUTPUT_COMPARE2 3 +#define TIMER_ON_OVERFLOW3 4 + +#define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) + + #define TIMER_PRESCALER 64 + #define TIMER_HW_BITS 8 + #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMPA_vect) + #else + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMP_vect) + #endif + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT OCR_DIVISOR + + /// Type of time expressed in ticks of the hardware high-precision timer + typedef uint8_t hptime_t; + #define SIZEOF_HPTIME_T 1 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT0; + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) + + #define TIMER_PRESCALER 1 + #define TIMER_HW_BITS 8 + /** This value is the maximum in overflow based timers. */ + #define TIMER_HW_CNT (1 << TIMER_HW_BITS) + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER1_OVF_vect) + #define TIMER_TICKS_PER_SEC DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT) + + /// Type of time expressed in ticks of the hardware high precision timer + typedef uint16_t hptime_t; + #define SIZEOF_HPTIME_T 2 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT1; + } + +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) + + #define TIMER_PRESCALER 64 + #define TIMER_HW_BITS 8 + #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMPA_vect) + #else + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMP_vect) + #endif + #define TIMER_TICKS_PER_SEC 1000 + /** Value for OCR register in output-compare based timers. */ + #define TIMER_HW_CNT OCR_DIVISOR + + /// Type of time expressed in ticks of the hardware high precision timer + typedef uint8_t hptime_t; + #define SIZEOF_HPTIME_T 1 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT2; + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3) + + #define TIMER_PRESCALER 1 + #define TIMER_HW_BITS 8 + /** This value is the maximum in overflow based timers. */ + #define TIMER_HW_CNT (1 << TIMER_HW_BITS) + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER3_OVF_vect) + #define TIMER_TICKS_PER_SEC DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT) + + /// Type of time expressed in ticks of the hardware high precision timer + typedef uint16_t hptime_t; + #define SIZEOF_HPTIME_T 2 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT3; + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + + +/** Frequency of the hardware high precision timer. */ +#define TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER) + +/** + * System timer: additional division after the prescaler + * 12288000 / 64 / 192 (0..191) = 1 ms + */ +#define OCR_DIVISOR (DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) - 1) + +/** Not needed, IRQ timer flag cleared automatically */ +#define timer_hw_irq() do {} while (0) + +/** Not needed, timer IRQ handler called only for timer source */ +#define timer_hw_triggered() (true) + +void timer_hw_init(void); + +#endif /* DRV_TIMER_AVR_H */ diff --git a/2.5/bertos/cpu/avr/drv/timer_simple_avr.c b/2.5/bertos/cpu/avr/drv/timer_simple_avr.c new file mode 100644 index 00000000..95caf428 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/timer_simple_avr.c @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Some simple delay routines. + * + * Simple serial driver + * \version $Id$ + * \author Francesco Sacchi + */ + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +#include +#include "timer_simple_avr.h" +#include +#include +#include /* BV() */ + +#include + + +#define MS_PER_SEC 1000UL +#define TIMER_PRESCALER 64UL +#define TIMER_DELAY_1MS (255 - CPU_FREQ / TIMER_PRESCALER / MS_PER_SEC) + +/** + * Wait \a time ms using timer 0. + * + */ +void timer_delay(mtime_t time) +{ + /* Set timer clock to clock_freq/64 */ + TCCR0 = BV(CS02); + + while (time--) + { + /* Initialize timer counter register */ + TCNT0 = TIMER_DELAY_1MS; + /* Clear overflow bit. */ + TIFR |= BV(TOV0); + /* Wait overflow. */ + while (!(TIFR & BV(TOV0))); +#if CONFIG_WATCHDOG + wdt_reset(); +#endif + } +} +#endif + diff --git a/2.5/bertos/cpu/avr/drv/timer_simple_avr.h b/2.5/bertos/cpu/avr/drv/timer_simple_avr.h new file mode 100644 index 00000000..a513209c --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/timer_simple_avr.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Simple delay routine + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef DRV_TIMER_SIMPLE_AVR_H +#define DRV_TIMER_SIMPLE_AVR_H + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +#include + +extern void timer_delay(mtime_t time); + +#endif /* TIMER_SIMPLE_H */ + +#endif diff --git a/2.5/bertos/cpu/avr/drv/wdt_avr.h b/2.5/bertos/cpu/avr/drv/wdt_avr.h new file mode 100644 index 00000000..21f5f9b1 --- /dev/null +++ b/2.5/bertos/cpu/avr/drv/wdt_avr.h @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief Watchdog interface for AVR architecture. + * + * \note The avr-libc already provide an api to manage the watchdog on AVR architecture. + * In avr-libc are also available several constants used to set the timeout value + * (see documentation for more detail). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#ifndef DRV_WDT_AVR_H +#define DRV_WDT_AVR_H + +#include "cfg/cfg_wdt.h" + +#include // INLINE + +#include +#include + +/** + * Reset the watchdog timer. + * + * This functions is already defind in avr-libc. + */ +// void wdt_reset(void) + +/** + * Start the watchdog timer that fire at the select + * timeout. + * + * \param _timeout you can use the macro that are defineded in + * avr/wdt.h. + * + * (from avr libc documentation) + * WDTO_15MS + * WDTO_30MS + * WDTO_60MS + * WDTO_120MS + * WDTO_250MS + * WDTO_500MS + * WDTO_1S + * WDTO_2S + * WDTO_4S + * WDTO_8S + */ +INLINE void wdt_start(uint32_t _timeout) +{ + uint8_t timeout = _timeout; + + wdt_enable(timeout); +} + +/** + * Stop watchdog timer. + */ +INLINE void wdt_stop(void) +{ + wdt_disable(); +} + + +#endif /* DRV_WDT_AVR_H */ diff --git a/2.5/bertos/cpu/avr/hw/switch_avr.S b/2.5/bertos/cpu/avr/hw/switch_avr.S new file mode 100644 index 00000000..8de975fc --- /dev/null +++ b/2.5/bertos/cpu/avr/hw/switch_avr.S @@ -0,0 +1,6 @@ +#include + +#if !(ARCH & ARCH_NIGHTTEST) + #warning This file is deprecated, use switch_ctx_avr.S + #include "switch_ctx_avr.S" +#endif diff --git a/2.5/bertos/cpu/avr/hw/switch_ctx_avr.S b/2.5/bertos/cpu/avr/hw/switch_ctx_avr.S new file mode 100644 index 00000000..cb10b5f8 --- /dev/null +++ b/2.5/bertos/cpu/avr/hw/switch_ctx_avr.S @@ -0,0 +1,115 @@ +/*! + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief AVR context switch + * + */ + +#include + +/* void asm_switch_context(void **new_sp [r24:r25], void **save_sp [r22:r23]) */ +.globl asm_switch_context +asm_switch_context: + +; r0 is the TEMP REG and can be used freely. +; r1 is the ZERO REG and must always contain 0. +; +; Stack frame is 18 byte, remember to update +; CPU_SAVED_REGS_CNT if you change pushed regs. + + push r2 + push r3 + push r4 + push r5 + push r6 + push r7 + push r8 + push r9 + push r10 + push r11 + push r12 + push r13 + push r14 + push r15 + push r16 + push r17 + + push r28 + push r29 + + in r18,SPL-__SFR_OFFSET ; r18:r19 = SP + in r19,SPH-__SFR_OFFSET + movw r26,r22 ; X = save_sp + st X+,r18 ; *save_sp = SP + st X,r19 + movw r26,r24 ; X = new_sp + ld r18,X+ + ld r19,X + +; Set new stack pointer. +; AVR is an 8 bit processor so +; care must be taken when updating +; SP that is a 16 bit reg. +; Two instructions are required to update SP +; so an IRQ can sneak in between them. +; So IRQ *MUST* be disabled and then restored. + in r0, SREG-__SFR_OFFSET + cli ; Disable interrupt + out SPL-__SFR_OFFSET,r18 ; SP = *new_sp + out SPH-__SFR_OFFSET,r19 + out SREG-__SFR_OFFSET,r0 ; Restore previous IRQ state + + pop r29 + pop r28 + + pop r17 + pop r16 + pop r15 + pop r14 + pop r13 + pop r12 + pop r11 + pop r10 + pop r9 + pop r8 + pop r7 + pop r6 + pop r5 + pop r4 + pop r3 + pop r2 + + ret diff --git a/2.5/bertos/cpu/avr/info/ATmega103.cdef b/2.5/bertos/cpu/avr/info/ATmega103.cdef new file mode 100644 index 00000000..2d1cd912 --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega103.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega103. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "4 Kbytes internal SRAM memory", + "4 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega103" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega128.cdef b/2.5/bertos/cpu/avr/info/ATmega128.cdef new file mode 100644 index 00000000..88eb826c --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega128.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega128. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "4 Kbytes internal SRAM memory", + "4 bytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega128" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega1281.cdef b/2.5/bertos/cpu/avr/info/ATmega1281.cdef new file mode 100644 index 00000000..7b048660 --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega1281.cdef @@ -0,0 +1,55 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega1281. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "8 Kbytes internal SRAM memory", + "4 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega1281" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega168.cdef b/2.5/bertos/cpu/avr/info/ATmega168.cdef new file mode 100644 index 00000000..a373e754 --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega168.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega168. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "16 Kbyte in-System Programmable Flash", + "1 Kbytes internal SRAM memory", + "512 bytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega168" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega32.cdef b/2.5/bertos/cpu/avr/info/ATmega32.cdef new file mode 100644 index 00000000..9a73ebaf --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega32.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega32. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "32 Kbyte in-System Programmable Flash", + "2 Kbytes internal SRAM memory", + "1 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega32" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega328P.cdef b/2.5/bertos/cpu/avr/info/ATmega328P.cdef new file mode 100644 index 00000000..a6d61055 --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega328P.cdef @@ -0,0 +1,55 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega328P. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Luca Ottaviano +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "Arduino Duemilanove", + "32 Kbyte in-System Programmable Flash", + "2 Kbytes internal SRAM memory", + "1 Kbyte EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega328p" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega64.cdef b/2.5/bertos/cpu/avr/info/ATmega64.cdef new file mode 100644 index 00000000..77b04434 --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega64.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega64. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "64 Kbyte in-System Programmable Flash", + "4 Kbytes internal SRAM memory", + "2 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega64" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/ATmega8.cdef b/2.5/bertos/cpu/avr/info/ATmega8.cdef new file mode 100644 index 00000000..2cfbaa5e --- /dev/null +++ b/2.5/bertos/cpu/avr/info/ATmega8.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega8. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "8 Kbyte in-System Programmable Flash", + "1 Kbytes internal SRAM memory", + "512 bytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega8" + +include("avr_post.common") diff --git a/2.5/bertos/cpu/avr/info/avr.common b/2.5/bertos/cpu/avr/info/avr.common new file mode 100644 index 00000000..f0fd278c --- /dev/null +++ b/2.5/bertos/cpu/avr/info/avr.common @@ -0,0 +1,69 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition AVR family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = [ "ATMEL AVR Microcontroller ", + "8-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "avr" + +# Special CPU related tags. +CPU_TAGS = ["harvard", TOOLCHAIN] + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "8000000UL" + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "avr/scripts/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "avr/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "avr/stopflash.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "nodebug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "none.sh" + +# Common GCC flags. +MK_CPU_CPPFLAGS = "-Os -I" + CPU_DIR + "avr/" + diff --git a/2.5/bertos/cpu/avr/info/avr_post.common b/2.5/bertos/cpu/avr/info/avr_post.common new file mode 100644 index 00000000..b5aa27f9 --- /dev/null +++ b/2.5/bertos/cpu/avr/info/avr_post.common @@ -0,0 +1,9 @@ + +# CPU type used for flashing +MK_PROGRAMMER_CPU = CORE_CPU + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_MCU = CORE_CPU + +# Add CPU core to tags +CPU_TAGS += [ CORE_CPU ] diff --git a/2.5/bertos/cpu/byteorder.h b/2.5/bertos/cpu/byteorder.h new file mode 100644 index 00000000..805a4f5f --- /dev/null +++ b/2.5/bertos/cpu/byteorder.h @@ -0,0 +1,267 @@ +/** + * \file + * + * + * \brief Functions to convert integers to/from host byte-order. + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#ifndef MWARE_BYTEORDER_H +#define MWARE_BYTEORDER_H + +#include +#include + +/** + * Swap upper and lower bytes in a 16-bit value. + */ +INLINE uint16_t swab16(uint16_t x) +{ + return ((x & (uint16_t)0x00FFU) << 8) + | ((x & (uint16_t)0xFF00U) >> 8); +} + +/** + * Reverse bytes in a 32-bit value (e.g.: 0x12345678 -> 0x78563412). + */ +INLINE uint32_t swab32(uint32_t x) +{ + return ((x & (uint32_t)0x000000FFUL) << 24) + | ((x & (uint32_t)0x0000FF00UL) << 8) + | ((x & (uint32_t)0x00FF0000UL) >> 8) + | ((x & (uint32_t)0xFF000000UL) >> 24); +} + +/** + * Reverse bytes in a 64-bit value. + */ +INLINE uint64_t swab64(uint64_t x) +{ + return (uint64_t)swab32(x >> 32) + | ((uint64_t)swab32(x & 0xFFFFFFFFUL) << 32); +} + +/** + * Reverse bytes in a float value. + */ +INLINE float swab_float(float x) +{ + /* Avoid breaking strict aliasing rules. */ + char *cx = (char *)(&x); + STATIC_ASSERT(sizeof(float) == 4); + #define BYTEORDER_SWAP(a, b) ((a) ^= (b) ^= (a) ^= (b)) + BYTEORDER_SWAP(cx[0], cx[3]); + BYTEORDER_SWAP(cx[1], cx[2]); + #undef BYTEORDER_SWAP + return x; +} + +INLINE uint16_t cpu_to_be16(uint16_t x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab16(x) : x; +} + +INLINE uint16_t cpu_to_le16(uint16_t x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab16(x) : x; +} + +INLINE uint32_t cpu_to_be32(uint32_t x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab32(x) : x; +} + +INLINE uint32_t cpu_to_le32(uint32_t x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab32(x) : x; +} + +INLINE uint64_t cpu_to_be64(uint64_t x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab64(x) : x; +} + +INLINE uint64_t cpu_to_le64(uint64_t x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab64(x) : x; +} + +INLINE float cpu_to_be_float(float x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab_float(x) : x; +} + +INLINE float cpu_to_le_float(float x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab_float(x) : x; +} + +INLINE uint16_t be16_to_cpu(uint16_t x) +{ + return cpu_to_be16(x); +} + +INLINE uint16_t le16_to_cpu(uint16_t x) +{ + return cpu_to_le16(x); +} + +INLINE uint32_t be32_to_cpu(uint32_t x) +{ + return cpu_to_be32(x); +} + +INLINE uint32_t le32_to_cpu(uint32_t x) +{ + return cpu_to_le32(x); +} + +INLINE uint64_t be64_to_cpu(uint64_t x) +{ + return cpu_to_be64(x); +} + +INLINE uint64_t le64_to_cpu(uint64_t x) +{ + return cpu_to_le64(x); +} + +INLINE float be_float_to_cpu(float x) +{ + return cpu_to_be_float(x); +} + +INLINE float le_float_to_cpu(float x) +{ + return cpu_to_le_float(x); +} + +INLINE uint16_t host_to_net16(uint16_t x) +{ + return cpu_to_be16(x); +} + +INLINE uint16_t net_to_host16(uint16_t x) +{ + return be16_to_cpu(x); +} + +INLINE uint32_t host_to_net32(uint32_t x) +{ + return cpu_to_be32(x); +} + +INLINE uint32_t net_to_host32(uint32_t x) +{ + return be32_to_cpu(x); +} + +INLINE uint64_t host_to_net64(uint64_t x) +{ + return cpu_to_be64(x); +} + +INLINE uint64_t net_to_host64(uint64_t x) +{ + return be64_to_cpu(x); +} + +INLINE float host_to_net_float(float x) +{ + return cpu_to_be_float(x); +} + +INLINE float net_to_host_float(float x) +{ + return be_float_to_cpu(x); +} + +#ifdef __cplusplus + +/// Type generic byte swapping. +template +INLINE T swab(T x); + +template<> INLINE uint16_t swab(uint16_t x) { return swab16(x); } +template<> INLINE uint32_t swab(uint32_t x) { return swab32(x); } +template<> INLINE uint64_t swab(uint64_t x) { return swab64(x); } +template<> INLINE int16_t swab(int16_t x) { return static_cast(swab16(static_cast(x))); } +template<> INLINE int32_t swab(int32_t x) { return static_cast(swab32(static_cast(x))); } +template<> INLINE int64_t swab(int64_t x) { return static_cast(swab64(static_cast(x))); } +template<> INLINE float swab(float x) { return swab_float(x); } + +/// Type generic conversion from CPU byte order to big-endian byte order. +template +INLINE T cpu_to_be(T x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab(x) : x; +} + +/// Type generic conversion from CPU byte-order to little-endian. +template +INLINE T cpu_to_le(T x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab(x) : x; +} + +/// Type generic conversion from big endian byte-order to CPU byte order. +template +INLINE T be_to_cpu(T x) +{ + return cpu_to_be(x); +} + +/// Type generic conversion from little-endian byte order to CPU byte order. +template +INLINE T le_to_cpu(T x) +{ + return cpu_to_le(x); +} + +/// Type generic conversion from network byte order to host byte order. +template +INLINE T net_to_host(T x) +{ + return be_to_cpu(x); +} + +/// Type generic conversion from host byte order to network byte order. +template +INLINE T host_to_net(T x) +{ + return net_to_host(x); +} + +#endif /* __cplusplus */ + +#endif /* MWARE_BYTEORDER_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/clock_lm3s.c b/2.5/bertos/cpu/cortex-m3/drv/clock_lm3s.c new file mode 100644 index 00000000..0cd5da84 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/clock_lm3s.c @@ -0,0 +1,175 @@ +/** + * \file + * + * + * \brief LM3S1968 Clocking driver. + * + * \author Andrea Righi + */ + +#include +#include +#include +#include "clock_lm3s.h" + +/* The PLL VCO frequency is 400 MHz */ +#define PLL_VCO 400000000UL + +/* Extract the system clock divisor from the RCC register */ +#define RCC_TO_DIV(rcc) \ + (((rcc & SYSCTL_RCC_SYSDIV_MASK) >> \ + SYSCTL_RCC_SYSDIV_SHIFT) + 1) + +/* + * Very small delay: each loop takes 3 cycles. + */ +void NAKED lm3s_busyWait(unsigned long iterations) +{ + register uint32_t __n asm("r0") = iterations; + + asm volatile ( + "1: subs r0, #1\n\t" + "bne 1b\n\t" + "bx lr\n\t" + : : "r"(__n) : "memory", "cc"); +} + +INLINE unsigned long clock_get_rate(void) +{ + reg32_t rcc = HWREG(SYSCTL_RCC); + + return rcc & SYSCTL_RCC_USESYSDIV ? + PLL_VCO / 2 / RCC_TO_DIV(rcc) : PLL_VCO; +} + +/* + * Try to evaluate the correct SYSDIV value depending on the desired CPU + * frequency. + */ +INLINE int evaluate_sysdiv(unsigned long freq) +{ + int i; + + /* + * NOTE: with BYPASS=0, SYSDIV < 3 are reserved values (see LM3S1968 + * Microcontroller DATASHEET, p.78). + */ + for (i = 3; i < 16; i++) + if (freq >= (PLL_VCO / 2 / (i + 1))) + break; + return i; +} + +void clock_init(void) +{ + reg32_t rcc, rcc2; + unsigned long clk; + int i; + + rcc = HWREG(SYSCTL_RCC); + rcc2 = HWREG(SYSCTL_RCC2); + + /* + * Step #1: bypass the PLL and system clock divider by setting the + * BYPASS bit and clearing the USESYS bit in the RCC register. This + * configures the system to run off a “raw” clock source (using the + * main oscillator or internal oscillator) and allows for the new PLL + * configuration to be validated before switching the system clock to + * the PLL. + */ + rcc |= SYSCTL_RCC_BYPASS; + rcc &= ~SYSCTL_RCC_USESYSDIV; + rcc2 |= SYSCTL_RCC2_BYPASS2; + + /* Write back RCC/RCC2 registers */ + HWREG(SYSCTL_RCC) = rcc; + HWREG(SYSCTL_RCC) = rcc2; + + lm3s_busyWait(16); + + /* + * Step #2: select the crystal value (XTAL) and oscillator source + * (OSCSRC), and clear the PWRDN bit in RCC/RCC2. Setting the XTAL + * field automatically pulls valid PLL configuration data for the + * appropriate crystal, and clearing the PWRDN bit powers and enables + * the PLL and its output. + */ + + /* Enable the main oscillator first. */ + rcc &= ~(SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS); + rcc |= SYSCTL_RCC_IOSCDIS; + + /* Do not override RCC register fields */ + rcc2 &= ~SYSCTL_RCC2_USERCC2; + + rcc &= ~(SYSCTL_RCC_XTAL_M | SYSCTL_RCC_OSCSRC_M | SYSCTL_RCC_PWRDN); + rcc |= XTAL_FREQ | SYSCTL_RCC_OSCSRC_MAIN; + + /* Clear the PLL lock interrupt. */ + HWREG(SYSCTL_MISC) = SYSCTL_INT_PLL_LOCK; + + HWREG(SYSCTL_RCC) = rcc; + HWREG(SYSCTL_RCC) = rcc2; + + lm3s_busyWait(16); + + /* + * Step #3: select the desired system divider (SYSDIV) in RCC/RCC2 and + * set the USESYS bit in RCC. The SYSDIV field determines the system + * frequency for the microcontroller. + */ + rcc &= ~(SYSCTL_RCC_SYSDIV_M | SYSCTL_RCC_USESYSDIV); + + clk = PLL_VCO / 2; + for (i = 3; i < 16; i++) + if (CPU_FREQ >= (clk / (i + 1))) + break; + rcc |= SYSCTL_RCC_USESYSDIV | + (evaluate_sysdiv(CPU_FREQ) << SYSCTL_RCC_SYSDIV_SHIFT); + + /* + * Step #4: wait for the PLL to lock by polling the PLLLRIS bit in the + * Raw Interrupt Status (RIS) register. + */ + for (i = 0; i < 32768; i++) + if (HWREG(SYSCTL_RIS) & SYSCTL_INT_PLL_LOCK) + break; + + /* + * Step #5: enable use of the PLL by clearing the BYPASS bit in + * RCC/RCC2. + */ + rcc &= ~SYSCTL_RCC_BYPASS; + + HWREG(SYSCTL_RCC) = rcc; + + lm3s_busyWait(16); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/clock_lm3s.h b/2.5/bertos/cpu/cortex-m3/drv/clock_lm3s.h new file mode 100644 index 00000000..0f93e8ff --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/clock_lm3s.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level clocking driver for LM3S1968. + * + * \author Andrea Righi + */ + +#ifndef DRV_LM3S1968_CLOCK_H +#define DRV_LM3S1968_CLOCK_H + +/* Crystal frequency attached to the main oscillator. */ +#define XTAL_FREQ SYSCTL_RCC_XTAL_8MHZ + +extern void lm3s_busyWait(unsigned long iterations); + +void clock_init(void); + +#endif /* DRV_LM3S1968_CLOCK_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/clock_stm32.c b/2.5/bertos/cpu/cortex-m3/drv/clock_stm32.c new file mode 100644 index 00000000..8e9e86d0 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/clock_stm32.c @@ -0,0 +1,149 @@ +/** + * \file + * + * + * \brief STM32 Clocking driver. + * + * \author Andrea Righi + */ + +#include +#include +#include +#include "clock_stm32.h" + +struct RCC *RCC; + +INLINE int rcc_get_flag_status(uint32_t flag) +{ + uint32_t id; + reg32_t reg; + + /* Get the RCC register index */ + id = flag >> 5; + /* The flag to check is in CR register */ + if (id == 1) + reg = RCC->CR; + /* The flag to check is in BDCR register */ + else if (id == 2) + reg = RCC->BDCR; + /* The flag to check is in CSR register */ + else + reg = RCC->CSR; + /* Get the flag position */ + id = flag & FLAG_MASK; + + return reg & (1 << id); +} + +INLINE uint16_t pll_clock(void) +{ + unsigned int div, mul; + + /* Hopefully this is evaluate at compile time... */ + for (div = 2; div; div--) + for (mul = 2; mul <= 16; mul++) + if (CPU_FREQ <= (PLL_VCO / div * mul)) + break; + return mul << 8 | div; +} + +INLINE void rcc_pll_config(void) +{ + reg32_t reg = RCC->CFGR & CFGR_PLL_MASK; + + /* Evaluate clock parameters */ + uint16_t clock = pll_clock(); + uint32_t pll_mul = ((clock >> 8) - 2) << 18; + uint32_t pll_div = ((clock & 0xff) << 1 | 1) << 16; + + /* Set the PLL configuration bits */ + reg |= pll_div | pll_mul; + + /* Store the new value */ + RCC->CFGR = reg; + + /* Enable PLL */ + *CR_PLLON_BB = 1; +} + +INLINE void rcc_set_clock_source(uint32_t source) +{ + reg32_t reg; + + reg = RCC->CFGR & CFGR_SW_MASK; + reg |= source; + RCC->CFGR = reg; +} + +void clock_init(void) +{ + /* Initialize global RCC structure */ + RCC = (struct RCC *)RCC_BASE; + + /* Enable the internal oscillator */ + *CR_HSION_BB = 1; + while (!rcc_get_flag_status(RCC_FLAG_HSIRDY)); + + /* Clock the system from internal HSI RC (8 MHz) */ + rcc_set_clock_source(RCC_SYSCLK_HSI); + + /* Enable external oscillator */ + RCC->CR &= CR_HSEON_RESET; + RCC->CR &= CR_HSEBYP_RESET; + RCC->CR |= CR_HSEON_SET; + while (!rcc_get_flag_status(RCC_FLAG_HSERDY)); + + /* Initialize PLL according to CPU_FREQ */ + rcc_pll_config(); + while(!rcc_get_flag_status(RCC_FLAG_PLLRDY)); + + /* Configure USB clock (48MHz) */ + *CFGR_USBPRE_BB = RCC_USBCLK_PLLCLK_1DIV5; + /* Configure ADC clock: PCLK2 (9MHz) */ + RCC->CFGR &= CFGR_ADCPRE_RESET_MASK; + RCC->CFGR |= RCC_PCLK2_DIV8; + /* Configure system clock dividers: PCLK2 (72MHz) */ + RCC->CFGR &= CFGR_PPRE2_RESET_MASK; + RCC->CFGR |= RCC_HCLK_DIV1 << 3; + /* Configure system clock dividers: PCLK1 (36MHz) */ + RCC->CFGR &= CFGR_PPRE1_RESET_MASK; + RCC->CFGR |= RCC_HCLK_DIV2; + /* Configure system clock dividers: HCLK */ + RCC->CFGR &= CFGR_HPRE_RESET_MASK; + RCC->CFGR |= RCC_SYSCLK_DIV1; + + /* Set 1 wait state for the flash memory */ + *(reg32_t *)FLASH_BASE = 0x12; + + /* Clock the system from the PLL */ + rcc_set_clock_source(RCC_SYSCLK_PLLCLK); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/clock_stm32.h b/2.5/bertos/cpu/cortex-m3/drv/clock_stm32.h new file mode 100644 index 00000000..4150a44d --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/clock_stm32.h @@ -0,0 +1,265 @@ +/** + * \file + * + * + * \brief Low-level clocking driver for Cortex-M3 STM32. + * + * \author Andrea Righi + */ + +#ifndef CLOCK_STM32_H +#define CLOCK_STM32_H + +/* RCC registers bit address */ +#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) + +/** + * CR Register + */ +/*\{*/ +/* Alias word address of HSION bit */ +#define CR_OFFSET (RCC_OFFSET + 0x00) +#define HSION_BITNUMBER 0x00 +#define CR_HSION_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BITNUMBER * 4))) + +/* Alias word address of PLLON bit */ +#define PLLON_BITNUMBER 0x18 +#define CR_PLLON_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BITNUMBER * 4))) + +/* Alias word address of CSSON bit */ +#define CSSON_BITNUMBER 0x13 +#define CR_CSSON_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BITNUMBER * 4))) +/*\}*/ + +/** + * CFGR Register + */ +/*\{*/ +/* Alias word address of USBPRE bit */ +#define CFGR_OFFSET (RCC_OFFSET + 0x04) +#define USBPRE_BITNUMBER 0x16 +#define CFGR_USBPRE_BB ((reg32_t *)(PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BITNUMBER * 4))) +/*\}*/ + +/** + * BDCR Register + */ +/*\{*/ +/* Alias word address of RTCEN bit */ +#define BDCR_OFFSET (RCC_OFFSET + 0x20) +#define RTCEN_BITNUMBER 0x0F +#define BDCR_RTCEN_BB ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BITNUMBER * 4))) + +/* Alias word address of BDRST bit */ +#define BDRST_BITNUMBER 0x10 +#define BDCR_BDRST_BB ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BITNUMBER * 4))) +/*\}*/ + +/** + * CSR Register + */ +/*\{*/ +/* Alias word address of LSION bit */ +#define CSR_OFFSET (RCC_OFFSET + 0x24) +#define LSION_BITNUMBER 0x00 +#define CSR_LSION_BB ((reg32_t *)(PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BITNUMBER * 4))) +/*\}*/ + +/** + * RCC registers bit mask + */ +/*\{*/ +/* CR register bit mask */ +#define CR_HSEBYP_RESET (0xFFFBFFFF) +#define CR_HSEBYP_SET (0x00040000) +#define CR_HSEON_RESET (0xFFFEFFFF) +#define CR_HSEON_SET (0x00010000) +#define CR_HSITRIM_MASK (0xFFFFFF07) + +/* CFGR register bit mask */ +#define CFGR_PLL_MASK (0xFFC0FFFF) +#define CFGR_PLLMull_MASK (0x003C0000) +#define CFGR_PLLSRC_MASK (0x00010000) +#define CFGR_PLLXTPRE_MASK (0x00020000) +#define CFGR_SWS_MASK (0x0000000C) +#define CFGR_SW_MASK (0xFFFFFFFC) +#define CFGR_HPRE_RESET_MASK (0xFFFFFF0F) +#define CFGR_HPRE_SET_MASK (0x000000F0) +#define CFGR_PPRE1_RESET_MASK (0xFFFFF8FF) +#define CFGR_PPRE1_SET_MASK (0x00000700) +#define CFGR_PPRE2_RESET_MASK (0xFFFFC7FF) +#define CFGR_PPRE2_SET_MASK (0x00003800) +#define CFGR_ADCPRE_RESET_MASK (0xFFFF3FFF) +#define CFGR_ADCPRE_SET_MASK (0x0000C000) + +/* CSR register bit mask */ +#define CSR_RVMF_SET (0x01000000) + +/* RCC Flag MASK */ +#define FLAG_MASK (0x1F) + +/* Typical VALUE of the HSI in Hz */ +#define HSI_VALUE (8000000) + +/* BDCR register base address */ +#define BDCR_BASE (PERIPH_BASE + BDCR_OFFSET) + +/* RCC Flag */ +#define RCC_FLAG_HSIRDY (0x20) +#define RCC_FLAG_HSERDY (0x31) +#define RCC_FLAG_PLLRDY (0x39) +#define RCC_FLAG_LSERDY (0x41) +#define RCC_FLAG_LSIRDY (0x61) +#define RCC_FLAG_PINRST (0x7A) +#define RCC_FLAG_PORRST (0x7B) +#define RCC_FLAG_SFTRST (0x7C) +#define RCC_FLAG_IWDGRST (0x7D) +#define RCC_FLAG_WWDGRST (0x7E) +#define RCC_FLAG_LPWRRST (0x7F) + +/* System clock source */ +#define RCC_SYSCLK_HSI (0x00000000) +#define RCC_SYSCLK_HSE (0x00000001) +#define RCC_SYSCLK_PLLCLK (0x00000002) + +/* PLL entry clock source */ +#define RCC_PLL_HSI_DIV2 (0x00000000) +#define RCC_PLL_HSE_DIV1 (0x00010000) +#define RCC_PLL_HSE_DIV2 (0x00030000) + +/* PLL multiplication factor */ +#define RCC_PLLMUL_2 (0x00000000) +#define RCC_PLLMUL_3 (0x00040000) +#define RCC_PLLMUL_4 (0x00080000) +#define RCC_PLLMUL_5 (0x000C0000) +#define RCC_PLLMUL_6 (0x00100000) +#define RCC_PLLMUL_7 (0x00140000) +#define RCC_PLLMUL_8 (0x00180000) +#define RCC_PLLMUL_9 (0x001C0000) +#define RCC_PLLMUL_10 (0x00200000) +#define RCC_PLLMUL_11 (0x00240000) +#define RCC_PLLMUL_12 (0x00280000) +#define RCC_PLLMUL_13 (0x002C0000) +#define RCC_PLLMUL_14 (0x00300000) +#define RCC_PLLMUL_15 (0x00340000) +#define RCC_PLLMUL_16 (0x00380000) + +/* APB1/APB2 clock source */ +#define RCC_HCLK_DIV1 (0x00000000) +#define RCC_HCLK_DIV2 (0x00000400) +#define RCC_HCLK_DIV4 (0x00000500) +#define RCC_HCLK_DIV8 (0x00000600) +#define RCC_HCLK_DIV16 (0x00000700) + +/* USB clock source */ +#define RCC_USBCLK_PLLCLK_1DIV5 (0x00) +#define RCC_USBCLK_PLLCLK_DIV1 (0x01) + +/* ADC clock source */ +#define RCC_PCLK2_DIV2 (0x00000000) +#define RCC_PCLK2_DIV4 (0x00004000) +#define RCC_PCLK2_DIV6 (0x00008000) +#define RCC_PCLK2_DIV8 (0x0000C000) + +/* AHB clock source */ +#define RCC_SYSCLK_DIV1 (0x00000000) +#define RCC_SYSCLK_DIV2 (0x00000080) +#define RCC_SYSCLK_DIV4 (0x00000090) +#define RCC_SYSCLK_DIV8 (0x000000A0) +#define RCC_SYSCLK_DIV16 (0x000000B0) +#define RCC_SYSCLK_DIV64 (0x000000C0) +#define RCC_SYSCLK_DIV128 (0x000000D0) +#define RCC_SYSCLK_DIV256 (0x000000E0) +#define RCC_SYSCLK_DIV512 (0x000000F0) +/*\}*/ + +/** + * RCC register: APB1 peripheral + */ +/*\{*/ +#define RCC_APB1_TIM2 (0x00000001) +#define RCC_APB1_TIM3 (0x00000002) +#define RCC_APB1_TIM4 (0x00000004) +#define RCC_APB1_WWDG (0x00000800) +#define RCC_APB1_SPI2 (0x00004000) +#define RCC_APB1_USART2 (0x00020000) +#define RCC_APB1_USART3 (0x00040000) +#define RCC_APB1_I2C1 (0x00200000) +#define RCC_APB1_I2C2 (0x00400000) +#define RCC_APB1_USB (0x00800000) +#define RCC_APB1_CAN (0x02000000) +#define RCC_APB1_BKP (0x08000000) +#define RCC_APB1_PWR (0x10000000) +#define RCC_APB1_ALL (0x1AE64807) +/*\}*/ + +/** + * RCC register: APB2 peripheral + */ +/*\{*/ +#define RCC_APB2_AFIO (0x00000001) +#define RCC_APB2_GPIOA (0x00000004) +#define RCC_APB2_GPIOB (0x00000008) +#define RCC_APB2_GPIOC (0x00000010) +#define RCC_APB2_GPIOD (0x00000020) +#define RCC_APB2_GPIOE (0x00000040) +#define RCC_APB2_ADC1 (0x00000200) +#define RCC_APB2_ADC2 (0x00000400) +#define RCC_APB2_TIM1 (0x00000800) +#define RCC_APB2_SPI1 (0x00001000) +#define RCC_APB2_USART1 (0x00004000) +#define RCC_APB2_ALL (0x00005E7D) +/*\}*/ + +/* Crystal frequency of the main oscillator (8MHz) */ +#define PLL_VCO 8000000 + +/* Reset and Clock Controller registers */ +struct RCC +{ + reg32_t CR; + reg32_t CFGR; + reg32_t CIR; + reg32_t APB2RSTR; + reg32_t APB1RSTR; + reg32_t AHBENR; + reg32_t APB2ENR; + reg32_t APB1ENR; + reg32_t BDCR; + reg32_t CSR; +}; + +/* RCC registers base */ +extern struct RCC *RCC; + +void clock_init(void); + +#endif /* CLOCK_STM32_h */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/flash_cm3.h b/2.5/bertos/cpu/cortex-m3/drv/flash_cm3.h new file mode 100644 index 00000000..bb7020b2 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/flash_cm3.h @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Low-level flash module for Cortex-M3 (interface). + * + * \author Daniele Basile + */ + +#include + +#if CPU_CM3_LM3S + #include "flash_lm3s.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/cortex-m3/drv/flash_lm3s.c b/2.5/bertos/cpu/cortex-m3/drv/flash_lm3s.c new file mode 100644 index 00000000..1bebb535 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/flash_lm3s.c @@ -0,0 +1,274 @@ +/** + * \file + * + * + * \brief LM3S1968 internal flash memory driver. + * + * \author Andrea Righi + */ + +#include "flash_lm3s.h" +#include "cfg/log.h" + +#include + +#include + +#include +#include +#include /* cpu_relax() */ + +#include /* memcpy() */ + + +static int flash_lm3s_erase_page(page_t addr) +{ + FLASH_FCMISC_R = FLASH_FCMISC_AMISC; + + FLASH_FMA_R = (volatile uint32_t)addr; + FLASH_FMC_R = FLASH_FMC_WRKEY | FLASH_FMC_ERASE; + + while (FLASH_FMC_R & FLASH_FMC_ERASE) + cpu_relax(); + if (FLASH_FCRIS_R & FLASH_FCRIS_ARIS) + return -1; + return 0; +} + +static int flash_lm3s_write_word(page_t addr, const uint8_t *data, size_t len) +{ + FLASH_FCMISC_R = FLASH_FCMISC_AMISC; + + uint32_t _data; + memcpy(&_data, data, len); + FLASH_FMA_R = (volatile uint32_t)addr; + FLASH_FMD_R = (volatile uint32_t)_data; + FLASH_FMC_R = FLASH_FMC_WRKEY | FLASH_FMC_WRITE; + + while (FLASH_FMC_R & FLASH_FMC_WRITE) + cpu_relax(); + if (FLASH_FCRIS_R & FLASH_FCRIS_ARIS) + return -1; + return 0; +} + +static void _flash_lm3s_flush(Flash *fd) +{ + if (!fd->page_dirty) + return; + + LOG_INFO("Erase page %p\n", fd->curr_page); + flash_lm3s_erase_page(fd->curr_page); + + LOG_INFO("Flush page %p\n", fd->curr_page); + for (int i = 0; i < FLASH_PAGE_SIZE_BYTES; i+=4) + flash_lm3s_write_word(fd->curr_page + i, &fd->page_buf[i], sizeof(uint32_t)); + fd->page_dirty = false; +} + +static void flash_lm3s_load_page(Flash *fd, page_t page) +{ + ASSERT(!((size_t)page % FLASH_PAGE_SIZE_BYTES)); + + if (page == fd->curr_page) + return; + + /* Flush old page */ + _flash_lm3s_flush(fd); + + /* Load a new page */ + memcpy(fd->page_buf, FLASH_BASE + (uint8_t *)page, FLASH_PAGE_SIZE_BYTES); + fd->curr_page = page; + LOG_INFO("Loaded page %p\n", fd->curr_page); +} + +/** + * Write program memory. + * Write \a size bytes from buffer \a _buf to file \a fd + * \note Write operations are not buffered. + */ +static size_t flash_lm3s_write(struct KFile *_fd, const void *_buf, size_t size) +{ + Flash *fd = FLASH_CAST(_fd); + const uint8_t *buf =(const uint8_t *)_buf; + size_t total_write = 0; + size_t len; + + size = MIN((kfile_off_t)size, + (kfile_off_t)(fd->fd.size - (fd->fd.seek_pos - FLASH_BASE))); + + LOG_INFO("Writing at pos[%lx]\n", fd->fd.seek_pos); + while (size) + { + page_t page = (fd->fd.seek_pos & ~(FLASH_PAGE_SIZE_BYTES - 1)); + size_t offset = fd->fd.seek_pos % FLASH_PAGE_SIZE_BYTES; + + flash_lm3s_load_page(fd, page); + + len = MIN(size, FLASH_PAGE_SIZE_BYTES - offset); + + memcpy((uint8_t *)fd->page_buf + offset, buf, len); + fd->page_dirty = true; + + buf += len; + fd->fd.seek_pos += len; + size -= len; + total_write += len; + } + LOG_INFO("written %u bytes\n", total_write); + return total_write; +} + +/** + * Close file \a fd + */ +static int flash_lm3s_close(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + _flash_lm3s_flush(fd); + LOG_INFO("Flash file closed\n"); + return 0; +} + +/** + * Open flash file \a fd + */ +static void flash_lm3s_open(Flash *fd) +{ + fd->fd.size = FLASH_BASE + FLASH_MEM_SIZE; + fd->fd.seek_pos = FLASH_BASE; + /* + * Set an invalid page to force the load of the next actually used page + * in cache. + */ + fd->curr_page = FLASH_BASE + FLASH_MEM_SIZE; + + fd->page_dirty = false; + LOG_INFO("Flash file opened\n"); +} + +/** + * Move \a fd file seek position of \a offset bytes from \a whence. + */ +static kfile_off_t flash_lm3s_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence) +{ + Flash *fd = FLASH_CAST(_fd); + kfile_off_t seek_pos; + + switch (whence) + { + case KSM_SEEK_SET: + seek_pos = FLASH_BASE; + break; + case KSM_SEEK_END: + seek_pos = FLASH_BASE + fd->fd.size; + break; + case KSM_SEEK_CUR: + seek_pos = fd->fd.seek_pos; + break; + default: + ASSERT(0); + return EOF; + break; + } + if (seek_pos + offset > fd->fd.size) + LOG_ERR("seek outside EOF\n"); + fd->fd.seek_pos = seek_pos + offset; + + return fd->fd.seek_pos - FLASH_BASE; +} + +/** + * Reopen file \a fd + */ +static struct KFile *flash_lm3s_reopen(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + flash_lm3s_close(_fd); + flash_lm3s_open(fd); + + return _fd; +} + +/** + * Read from file \a fd \a size bytes and put it in buffer \a buf + * \return the number of bytes read. + */ +static size_t flash_lm3s_read(struct KFile *_fd, void *_buf, size_t size) +{ + Flash *fd = FLASH_CAST(_fd); + uint8_t *buf =(uint8_t *)_buf, *addr; + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Reading at pos[%lx]\n", fd->fd.seek_pos); + /* Check if we can get current cached page */ + if ((size_t)fd->fd.seek_pos / FLASH_PAGE_SIZE_BYTES == + (size_t)fd->curr_page) + addr = (uint8_t *)fd->curr_page + + fd->fd.seek_pos % FLASH_PAGE_SIZE_BYTES; + else + addr = (uint8_t *)fd->fd.seek_pos; + memcpy(buf, (uint8_t *)addr, size); + fd->fd.seek_pos += size; + + LOG_INFO("Read %u bytes\n", size); + return size; +} + +static int flash_lm3s_flush(struct KFile *_fd) +{ + Flash *fd = FLASH_CAST(_fd); + + _flash_lm3s_flush(fd); + return 0; +} + +/** + * Init module to perform write and read operation on internal + * flash memory. + */ +void flash_hw_init(Flash *fd) +{ + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_FLASH); + + fd->fd.reopen = flash_lm3s_reopen; + fd->fd.close = flash_lm3s_close; + fd->fd.write = flash_lm3s_write; + fd->fd.read = flash_lm3s_read; + fd->fd.seek = flash_lm3s_seek; + fd->fd.flush = flash_lm3s_flush; + + FLASH_USECRL_R = CPU_FREQ / 1000000 - 1; + + flash_lm3s_open(fd); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/flash_lm3s.h b/2.5/bertos/cpu/cortex-m3/drv/flash_lm3s.h new file mode 100644 index 00000000..9d054716 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/flash_lm3s.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * \brief LM3S1968 internal flash memory driver. + * + * \author Andrea Righi + */ + +#ifndef FLASH_LM3S_H +#define FLASH_LM3S_H + +#include +#include + +/* Flash memory mapping */ +#define FLASH_MEM_SIZE 0x40000 //< 256KiB +#define FLASH_PAGE_SIZE_BYTES 0x400 //< 1KiB + + +#define FLASH_PAGE_SIZE FLASH_PAGE_SIZE_BYTES + +/** + * Define data type to manage page and memory address. + */ +typedef uint32_t page_t; + +struct Flash; + +void flash_hw_init(struct Flash *fd); + +#endif /* FLASH_LM3S_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/gpio_lm3s.c b/2.5/bertos/cpu/cortex-m3/drv/gpio_lm3s.c new file mode 100644 index 00000000..7fcecbad --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/gpio_lm3s.c @@ -0,0 +1,202 @@ +/** + * \file + * + * + * \brief LM3S1968 GPIO control interface. + * + * \author Andrea Righi + */ + +#include +#include +#include +#include "gpio_lm3s.h" + +/* Set the pin(s) direction and mode */ +INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode) +{ + if (mode == GPIO_DIR_MODE_IN) + { + HWREG(port + GPIO_O_DIR) &= ~pins; + HWREG(port + GPIO_O_AFSEL) &= ~pins; + } + else if (mode == GPIO_DIR_MODE_OUT) + { + HWREG(port + GPIO_O_DIR) |= pins; + HWREG(port + GPIO_O_AFSEL) &= ~pins; + } + else if (mode == GPIO_DIR_MODE_HW) + { + HWREG(port + GPIO_O_DIR) &= ~pins; + HWREG(port + GPIO_O_AFSEL) |= pins; + } + else + { + ASSERT(0); + return -1; + } + return 0; +} + +/* Set the pin(s) output strength */ +INLINE int +lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength) +{ + if (strength == GPIO_STRENGTH_2MA) + { + HWREG(port + GPIO_O_DR2R) |= pins; + HWREG(port + GPIO_O_DR4R) &= ~pins; + HWREG(port + GPIO_O_DR8R) &= ~pins; + HWREG(port + GPIO_O_SLR) &= ~pins; + } + else if (strength == GPIO_STRENGTH_4MA) + { + HWREG(port + GPIO_O_DR2R) &= ~pins; + HWREG(port + GPIO_O_DR4R) |= pins; + HWREG(port + GPIO_O_DR8R) &= ~pins; + HWREG(port + GPIO_O_SLR) &= ~pins; + } + else if (strength == GPIO_STRENGTH_8MA) + { + HWREG(port + GPIO_O_DR2R) &= ~pins; + HWREG(port + GPIO_O_DR4R) &= ~pins; + HWREG(port + GPIO_O_DR8R) |= pins; + HWREG(port + GPIO_O_SLR) &= ~pins; + } + else if (strength == GPIO_STRENGTH_8MA_SC) + { + HWREG(port + GPIO_O_DR2R) &= ~pins; + HWREG(port + GPIO_O_DR4R) &= ~pins; + HWREG(port + GPIO_O_DR8R) |= pins; + HWREG(port + GPIO_O_SLR) |= pins; + } + else + { + ASSERT(0); + return -1; + } + return 0; +} + +/* Set the pin(s) type */ +INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type) +{ + if (type == GPIO_PIN_TYPE_STD) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_STD_WPU) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) |= pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_STD_WPD) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) |= pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_OD) + { + HWREG(port + GPIO_O_ODR) |= pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_OD_WPU) + { + HWREG(port + GPIO_O_ODR) |= pins; + HWREG(port + GPIO_O_PUR) |= pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_OD_WPD) + { + HWREG(port + GPIO_O_ODR) |= pins; + HWREG(port + GPIO_O_PUR) &= pins; + HWREG(port + GPIO_O_PDR) |= pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_ANALOG) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) &= ~pins; + HWREG(port + GPIO_O_AMSEL) |= pins; + } + else + { + ASSERT(0); + return -1; + } + return 0; +} + +/** + * Configure a GPIO pin + * + * \param port Base address of the GPIO port + * \param pins Bit-packed representation of the pin(s) + * \param mode Pin(s) configuration mode + * \param strength Output drive strength + * \param type Pin(s) type + * + * Return 0 on success, otherwise a negative value. + */ +int lm3s_gpioPinConfig(uint32_t port, uint8_t pins, + uint32_t mode, uint32_t strength, uint32_t type) +{ + int ret; + + ret = lm3s_gpioPinConfigMode(port, pins, mode); + if (UNLIKELY(ret < 0)) + return ret; + ret = lm3s_gpioPinConfigStrength(port, pins, strength); + if (UNLIKELY(ret < 0)) + return ret; + ret = lm3s_gpioPinConfigType(port, pins, type); + if (UNLIKELY(ret < 0)) + return ret; + return 0; +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/gpio_lm3s.h b/2.5/bertos/cpu/cortex-m3/drv/gpio_lm3s.h new file mode 100644 index 00000000..d80c033f --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/gpio_lm3s.h @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief LM3S1968 GPIO control interface. + */ + +#ifndef GPIO_LM3S_H +#define GPIO_LM3S_H + +#include + +/** + * GPIO mode + */ +/*\{*/ +enum +{ + GPIO_DIR_MODE_IN = 0, //< Pin is a GPIO input + GPIO_DIR_MODE_OUT, //< Pin is a GPIO output + GPIO_DIR_MODE_HW, //< Pin is a peripheral function +}; +/*\}*/ + +/** + * GPIO strenght + */ +/*\{*/ +enum +{ + GPIO_STRENGTH_2MA = 0, //< 2mA drive strength + GPIO_STRENGTH_4MA, //< 4mA drive strength + GPIO_STRENGTH_8MA, //< 8mA drive strength + GPIO_STRENGTH_8MA_SC, //< 8mA drive with slew rate control +}; +/*\}*/ + +/** + * GPIO type + */ +/*\{*/ +enum +{ + GPIO_PIN_TYPE_ANALOG = 0, //< Analog comparator + GPIO_PIN_TYPE_STD, //< Push-pull + GPIO_PIN_TYPE_STD_WPU, //< Push-pull with weak pull-up + GPIO_PIN_TYPE_STD_WPD, //< Push-pull with weak pull-down + GPIO_PIN_TYPE_OD, //< Open-drain + GPIO_PIN_TYPE_OD_WPU, //< Open-drain with weak pull-up + GPIO_PIN_TYPE_OD_WPD, //< Open-drain with weak pull-down +}; +/*\}*/ + +/* Write a value to the specified pin(s) */ +INLINE void lm3s_gpioPinWrite(uint32_t port, uint8_t pins, uint8_t val) +{ + HWREG(port + GPIO_O_DATA + (pins << 2)) = val; +} + +/* Read a value from the specified pin(s) */ +INLINE uint32_t lm3s_gpioPinRead(uint32_t port, uint8_t pins) +{ + return HWREG(port + GPIO_O_DATA + (pins << 2)); +} + +int lm3s_gpioPinConfig(uint32_t port, uint8_t pins, + uint32_t mode, uint32_t strength, uint32_t type); + +#endif /* GPIO_LM3S_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/gpio_stm32.c b/2.5/bertos/cpu/cortex-m3/drv/gpio_stm32.c new file mode 100644 index 00000000..f15145a4 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/gpio_stm32.c @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief STM32 GPIO control interface. + * + * \author Andrea Righi + */ + +#include +#include +#include +#include "gpio_stm32.h" + +/** + * Configure a GPIO pin + * + * \param base Base address of the GPIO port + * \param pins Bit-packed representation of the pin(s) + * \param mode Pin(s) configuration mode + * \param speed Output drive speed + * + * Return 0 on success, otherwise a negative value. + */ +int stm32_gpioPinConfig(struct stm32_gpio *base, + uint16_t pins, uint8_t mode, uint8_t speed) +{ + uint32_t reg_mode = mode & 0x0f; + int i; + + if (mode & 0x10) + reg_mode |= speed; + + if (pins & 0xff) + { + uint32_t reg = base->CRL; + + for (i = 0; i < 8; i++) + { + uint32_t pos = 1 << i; + + if (pins & pos) + { + pos = i << 2; + reg &= ~(0x0f << pos); + reg |= reg_mode << pos; + + if (mode == GPIO_MODE_IPD) + base->BRR = 0x01 << i; + if (mode == GPIO_MODE_IPU) + base->BSRR = 0x01 << i; + } + } + base->CRL = reg; + } + if (pins > 0xff) + { + uint32_t reg = base->CRH; + + for (i = 0; i < 8; i++) + { + uint32_t pos = 1 << (i + 8); + + if (pins & pos) + { + pos = i << 2; + reg &= ~(0x0f << pos); + reg |= reg_mode << pos; + + if (mode == GPIO_MODE_IPD) + base->BRR = 0x01 << (i + 8); + if (mode == GPIO_MODE_IPU) + base->BSRR = 0x01 << (i + 8); + } + } + base->CRH = reg; + } + return 0; +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/gpio_stm32.h b/2.5/bertos/cpu/cortex-m3/drv/gpio_stm32.h new file mode 100644 index 00000000..4d09db47 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/gpio_stm32.h @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \brief STM32 GPIO control interface. + */ + +#ifndef GPIO_STM32_H +#define GPIO_STM32_H + +#include + +/* GPIO configuration registers structure */ +struct stm32_gpio +{ + reg32_t CRL; + reg32_t CRH; + reg32_t IDR; + reg32_t ODR; + reg32_t BSRR; + reg32_t BRR; + reg32_t LCKR; +}; + +/** + * GPIO mode + */ +/*\{*/ +enum +{ + GPIO_MODE_AIN = 0x0, + GPIO_MODE_IN_FLOATING = 0x04, + GPIO_MODE_IPD = 0x28, + GPIO_MODE_IPU = 0x48, + GPIO_MODE_OUT_OD = 0x14, + GPIO_MODE_OUT_PP = 0x10, + GPIO_MODE_AF_OD = 0x1C, + GPIO_MODE_AF_PP = 0x18, +}; +/*\}*/ + +/** + * GPIO speed + */ +/*\{*/ +enum +{ + GPIO_SPEED_10MHZ = 1, + GPIO_SPEED_2MHZ, + GPIO_SPEED_50MHZ, +}; +/*\}*/ + +/* Write a value to the specified pin(s) */ +INLINE void +stm32_gpioPinWrite(struct stm32_gpio *base, uint32_t pins, uint8_t val) +{ + if (val) + base->BSRR |= pins; + else + base->BRR |= pins; +} + +/* Read a value from the specified pin(s) */ +INLINE uint8_t stm32_gpioPinRead(struct stm32_gpio *base, uint32_t pins) +{ + return !!(base->IDR & pins); +} + +/* Initialize a GPIO peripheral configuration */ +int stm32_gpioPinConfig(struct stm32_gpio *base, + uint16_t pins, uint8_t mode, uint8_t speed); + +#endif /* GPIO_STM32_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/irq_cm3.c b/2.5/bertos/cpu/cortex-m3/drv/irq_cm3.c new file mode 100644 index 00000000..d71876fe --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/irq_cm3.c @@ -0,0 +1,127 @@ +/** + * \file + * + * + * \brief Cortex-M3 IRQ management. + * + * \author Andrea Righi + */ + +#include /* ASSERT() */ +#include /* LOG_ERR() */ +#include +#include "irq_cm3.h" + +static void (*irq_table[NUM_INTERRUPTS])(void) + __attribute__((section("vtable"))); + +/* Priority register / IRQ number table */ +static const uint32_t nvic_prio_reg[] = +{ + /* System exception registers */ + 0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, + + /* External interrupts registers */ + NVIC_PRI0, NVIC_PRI1, NVIC_PRI2, NVIC_PRI3, + NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7, + NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, + NVIC_PRI12, NVIC_PRI13 +}; + +/* Unhandled IRQ */ +static NAKED NORETURN void unhandled_isr(void) +{ + register uint32_t reg; + + asm volatile ("mrs %0, ipsr" : "=r"(reg)); + LOG_ERR("unhandled IRQ %lu\n", reg); + while (1) + PAUSE; +} + +void sysirq_setPriority(sysirq_t irq, int prio) +{ + uint32_t pos = (irq & 3) * 8; + reg32_t reg = nvic_prio_reg[irq >> 2]; + uint32_t val; + + val = HWREG(reg); + val &= ~(0xff << pos); + val |= prio << pos; + HWREG(reg) = val; +} + +static void sysirq_enable(sysirq_t irq) +{ + /* Enable the IRQ line (only for generic IRQs) */ + if (irq >= 16 && irq < 48) + NVIC_EN0_R = 1 << (irq - 16); + else if (irq >= 48) + NVIC_EN1_R = 1 << (irq - 48); +} + +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler) +{ + cpu_flags_t flags; + + ASSERT(irq < NUM_INTERRUPTS); + + IRQ_SAVE_DISABLE(flags); + irq_table[irq] = handler; + sysirq_setPriority(irq, IRQ_PRIO); + sysirq_enable(irq); + IRQ_RESTORE(flags); +} + +void sysirq_freeHandler(sysirq_t irq) +{ + cpu_flags_t flags; + + ASSERT(irq < NUM_INTERRUPTS); + + IRQ_SAVE_DISABLE(flags); + irq_table[irq] = unhandled_isr; + IRQ_RESTORE(flags); +} + +void sysirq_init(void) +{ + cpu_flags_t flags; + int i; + + IRQ_SAVE_DISABLE(flags); + for (i = 0; i < NUM_INTERRUPTS; i++) + irq_table[i] = unhandled_isr; + + /* Update NVIC to point to the new vector table */ + NVIC_VTABLE_R = (size_t)irq_table; + IRQ_RESTORE(flags); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/irq_cm3.h b/2.5/bertos/cpu/cortex-m3/drv/irq_cm3.h new file mode 100644 index 00000000..9a641e4b --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/irq_cm3.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief IRQ management for the Cortex-M3 processor. + * + * \author Andrea Righi + */ + +#ifndef DRV_CORTEX_M3_SYSIRQ_H +#define DRV_CORTEX_M3_SYSIRQ_H + +#if CPU_CM3_LM3S + #include +#elif CPU_CM3_STM32 + #include +/*#elif Add other families here */ +#else + #error Unknown CPU +#endif + +typedef void (*sysirq_handler_t)(void); +typedef unsigned int sysirq_t; + +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler); +void sysirq_setPriority(sysirq_t irq, int prio); +void sysirq_freeHandler(sysirq_t irq); + +void sysirq_init(void); + +#endif /* DRV_CORTEX_M3_SYSIRQ_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/kdebug_cm3.c b/2.5/bertos/cpu/cortex-m3/drv/kdebug_cm3.c new file mode 100644 index 00000000..c236ca6b --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/kdebug_cm3.c @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level kdebug module for Cortex-M3 (inplementation). + */ + +#include + +#if CPU_CM3_LM3S + #include "kdebug_lm3s.c" +#elif CPU_CM3_STM32 + #include "kdebug_stm32.c" +/*#elif Add other families here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/cortex-m3/drv/kdebug_lm3s.c b/2.5/bertos/cpu/cortex-m3/drv/kdebug_lm3s.c new file mode 100644 index 00000000..30258846 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/kdebug_lm3s.c @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \brief LM3S debug support (implementation). + * + * \author Andrea Righi + */ + +#include +#include /* for BV() */ +#include /* lm3s_busyWait() */ +#include +#include +#include "kdebug_lm3s.h" + +#if CONFIG_KDEBUG_PORT == 0 + #define UART_BASE UART0_BASE + #define UART_GPIO_BASE GPIO_PORTA_BASE + #define UART_PINS (BV(1) | BV(0)) + #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOA +#elif CONFIG_KDEBUG_PORT == 1 + #define UART_BASE UART1_BASE + #define UART_GPIO_BASE GPIO_PORTD_BASE + #define UART_PINS (BV(3) | BV(2)) + #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOD +#elif CONFIG_KDEBUG_PORT == 2 + #define UART_BASE UART2_BASE + #define UART_GPIO_BASE GPIO_PORTG_BASE + #define UART_PINS (BV(1) | BV(0)) + #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOG +#else + #error "UART port not supported in this board" +#endif + +#define KDBG_WAIT_READY() while (!lm3s_uartReady(UART_BASE)) {} +#define KDBG_WAIT_TXDONE() while (!lm3s_uartTxDone(UART_BASE)) {} + +#define KDBG_WRITE_CHAR(c) do { lm3s_uartPutCharNonBlocking(UART_BASE, c); } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + +typedef uint32_t kdbg_irqsave_t; + +INLINE void uart_hw_config(void) +{ + unsigned long div, baud = CONFIG_KDEBUG_BAUDRATE; + bool hi_speed = false; + + if (baud * 16 > CPU_FREQ) + { + hi_speed = true; + baud /= 2; + } + div = (CPU_FREQ * 8 / baud + 1) / 2; + + lm3s_uartDisable(UART_BASE); + if (hi_speed) + HWREG(UART_BASE + UART_O_CTL) |= UART_CTL_HSE; + else + HWREG(UART_BASE + UART_O_CTL) &= ~UART_CTL_HSE; + /* Set the baud rate */ + HWREG(UART_BASE + UART_O_IBRD) = div / 64; + HWREG(UART_BASE + UART_O_FBRD) = div % 64; + /* Set word lenght and parity */ + HWREG(UART_BASE + UART_O_LCRH) = UART_LCRH_WLEN_8; + lm3s_uartClear(UART_BASE); + lm3s_uartEnable(UART_BASE); +} + +INLINE void kdbg_hw_init(void) +{ + uint32_t reg_clock = 1 << CONFIG_KDEBUG_PORT; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= reg_clock; + SYSCTL_RCGC2_R |= UART_REG_SYSCTL; + lm3s_busyWait(512); + + /* Configure GPIO pins to work as UART pins */ + lm3s_gpioPinConfig(UART_GPIO_BASE, UART_PINS, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD); + + /* Low-level UART configuration */ + uart_hw_config(); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/kdebug_lm3s.h b/2.5/bertos/cpu/cortex-m3/drv/kdebug_lm3s.h new file mode 100644 index 00000000..faabef4e --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/kdebug_lm3s.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief LM3S debug support (interface). + * + * \author Andrea Righi + */ + +#ifndef DRV_KDEBUG_LM3S_H +#define DRV_KDEBUG_LM3S_H + +#define KDEBUG_PORT_DEFAULT 0 ///< Default debug port. +/* \} */ + +#endif /* DRV_KDEBUG_LM3S_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/kdebug_stm32.c b/2.5/bertos/cpu/cortex-m3/drv/kdebug_stm32.c new file mode 100644 index 00000000..f50f3d89 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/kdebug_stm32.c @@ -0,0 +1,190 @@ +/** + * \file + * + * + * \brief STM32 debug support (implementation). + * + * \author Andrea Righi + */ + +#include /* for BV() */ +#include +#include +#include /* RCC */ +#include +#include "kdebug_stm32.h" + +#define CR1_RUN_SET ((uint16_t)0x2000) /* USART Enable MASK */ +#define CR1_RUN_RESET ((uint16_t)0xDFFF) /* USART Disable MASK */ +#define CR1_RWU_SET ((uint16_t)0x0002) /* USART mute mode Enable MASK */ +#define CR1_RWU_RESET ((uint16_t)0xFFFD) /* USART mute mode Enable MASK */ +#define CR1_SBK_SET ((uint16_t)0x0001) /* USART Break Character send MASK */ +#define CR1_CLEAR_MASK ((uint16_t)0xE9F3) /* USART CR1 MASK */ + +#define CR2_MASK ((uint16_t)0xFFF0) /* USART address MASK */ +#define CR2_LINE_SET ((uint16_t)0x4000) /* USART LIN Enable MASK */ +#define CR2_LINE_RESET ((uint16_t)0xBFFF) /* USART LIN Disable MASK */ +#define CR2_CLEAR_MASK ((uint16_t)0xC0FF) /* USART CR2 MASK */ + +#define CR3_SCEN_SET ((uint16_t)0x0020) /* USART SC Enable MASK */ +#define CR3_SCEN_RESET ((uint16_t)0xFFDF) /* USART SC Disable MASK */ +#define CR3_NACK_SET ((uint16_t)0x0010) /* USART SC NACK Enable MASK */ +#define CR3_NACK_RESET ((uint16_t)0xFFEF) /* USART SC NACK Disable MASK */ +#define CR3_HDSEL_SET ((uint16_t)0x0008) /* USART Half-Duplex Enable MASK */ +#define CR3_HDSEL_RESET ((uint16_t)0xFFF7) /* USART Half-Duplex Disable MASK */ +#define CR3_IRLP_MASK ((uint16_t)0xFFFB) /* USART IrDA LowPower mode MASK */ +#define CR3_LBDL_MASK ((uint16_t)0xFFDF) /* USART LIN Break detection MASK */ +#define CR3_WAKE_MASK ((uint16_t)0xF7FF) /* USART WakeUp Method MASK */ +#define CR3_IREN_SET ((uint16_t)0x0002) /* USART IrDA Enable MASK */ +#define CR3_IREN_RESET ((uint16_t)0xFFFD) /* USART IrDA Disable MASK */ +#define CR3_CLEAR_MASK ((uint16_t)0xFCFF) /* USART CR3 MASK */ + +#define GTPR_LSB_MASK ((uint16_t)0x00FF) /* Guard Time Register LSB MASK */ +#define GTPR_MSB_MASK ((uint16_t)0xFF00) /* Guard Time Register MSB MASK */ + +#define USART_IT_MASK ((uint16_t)0x001F) /* USART Interrupt MASK */ + +/* USART flags */ +#define USART_FLAG_CTS ((uint16_t)0x0200) +#define USART_FLAG_LBD ((uint16_t)0x0100) +#define USART_FLAG_TXE ((uint16_t)0x0080) +#define USART_FLAG_TC ((uint16_t)0x0040) +#define USART_FLAG_RXNE ((uint16_t)0x0020) +#define USART_FLAG_IDLE ((uint16_t)0x0010) +#define USART_FLAG_ORE ((uint16_t)0x0008) +#define USART_FLAG_NE ((uint16_t)0x0004) +#define USART_FLAG_FE ((uint16_t)0x0002) +#define USART_FLAG_PE ((uint16_t)0x0001) + +/* USART registers */ +struct stm32_usart +{ + reg16_t SR; + uint16_t _RESERVED0; + reg16_t DR; + uint16_t _RESERVED1; + reg16_t BRR; + uint16_t _RESERVED2; + reg16_t CR1; + uint16_t _RESERVED3; + reg16_t CR2; + uint16_t _RESERVED4; + reg16_t CR3; + uint16_t _RESERVED5; + reg16_t GTPR; + uint16_t _RESERVED6; +}; + +/* USART mode */ +#define USART_MODE_RX ((uint16_t)0x0004) +#define USART_MODE_TX ((uint16_t)0x0008) + +/* USART last bit */ +#define USART_LASTBIT_DISABLE ((uint16_t)0x0000) +#define USART_LASTBIT_ENABLE ((uint16_t)0x0100) + +#if CONFIG_KDEBUG_PORT == 0 + #define UART_BASE ((struct stm32_usart *)USART1_BASE) +#elif CONFIG_KDEBUG_PORT == 1 + #define UART_BASE ((struct stm32_usart *)USART2_BASE) +#elif CONFIG_KDEBUG_PORT == 2 + #define UART_BASE ((struct stm32_usart *)USART3_BASE) +#else + #error "UART port not supported in this board" +#endif + +#define KDBG_WAIT_READY() while (!(UART_BASE->SR & USART_FLAG_TXE)) +#define KDBG_WAIT_TXDONE() while (!(UART_BASE->SR & USART_FLAG_TC)) + +#define KDBG_WRITE_CHAR(c) do { UART_BASE->DR = (c) & 0x1ff; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + +typedef uint32_t kdbg_irqsave_t; + +#define GPIO_USART1_TX_PIN (1 << 9) +#define GPIO_USART1_RX_PIN (1 << 10) + +#define GPIO_USART2_TX_PIN (1 << 2) +#define GPIO_USART2_RX_PIN (1 << 3) + +#define GPIO_USART3_TX_PIN (1 << 13) +#define GPIO_USART3_RX_PIN (1 << 14) + +INLINE uint16_t evaluate_brr(void) +{ + uint32_t freq, reg, div, frac; + + /* NOTE: PCLK1 has been configured as CPU_FREQ / 2 */ + freq = (CONFIG_KDEBUG_PORT == 0) ? CPU_FREQ : CPU_FREQ / 2; + div = (0x19 * freq) / (0x04 * CONFIG_KDEBUG_BAUDRATE); + reg = (div / 0x64) << 0x04; + frac = div - (0x64 * (reg >> 0x04)); + reg |= ((frac * 0x10 + 0x32) / 0x64) & 0x0f; + + return (uint16_t)reg; +} + +/* Initialize UART debug port */ +INLINE void kdbg_hw_init(void) +{ + /* Enable clocking on AFIO */ + RCC->APB2ENR |= RCC_APB2_AFIO; + /* Configure USART pins */ +#if CONFIG_KDEBUG_PORT == 0 + RCC->APB2ENR |= RCC_APB2_GPIOA; + RCC->APB2ENR |= RCC_APB2_USART1; + stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART1_TX_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); +#elif CONFIG_KDEBUG_PORT == 1 + RCC->APB2ENR |= RCC_APB2_GPIOA; + RCC->APB1ENR |= RCC_APB1_USART2; + stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART2_TX_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); +#elif CONFIG_KDEBUG_PORT == 2 + RCC->APB2ENR |= RCC_APB2_GPIOB; + RCC->APB2ENR |= RCC_APB1_USART3; + stm32_gpioPinConfig((struct stm32_gpio *)GPIOB_BASE, GPIO_USART3_TX_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); +#else + #error "UART port not supported in this board" +#endif + /* Enable the USART by writing the UE bit */ + UART_BASE->CR1 |= CR1_RUN_SET; + /* Configure the desired baud rate */ + UART_BASE->BRR = evaluate_brr(); + /* Set the Transmitter Enable bit in CR1 */ + UART_BASE->CR1 |= USART_MODE_TX; +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/kdebug_stm32.h b/2.5/bertos/cpu/cortex-m3/drv/kdebug_stm32.h new file mode 100644 index 00000000..acb71a56 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/kdebug_stm32.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief STM32 debug support (interface). + * + * \author Andrea Righi + */ + +#ifndef DRV_KDEBUG_STM32_H +#define DRV_KDEBUG_STM32_H + +#define KDEBUG_PORT_DEFAULT 1 ///< Default debug port. +/* \} */ + +#endif /* DRV_KDEBUG_STM32_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/ser_cm3.h b/2.5/bertos/cpu/cortex-m3/drv/ser_cm3.h new file mode 100644 index 00000000..7268711f --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/ser_cm3.h @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Low-level serial module for Cortex-M3 (interface). + * + * \author Andrea Righi + */ + +#include + +#if CPU_CM3_LM3S + #include "ser_lm3s.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif diff --git a/2.5/bertos/cpu/cortex-m3/drv/ser_lm3s.c b/2.5/bertos/cpu/cortex-m3/drv/ser_lm3s.c new file mode 100644 index 00000000..8de8ce66 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/ser_lm3s.c @@ -0,0 +1,369 @@ +/** + * \file + * + * + * \brief LM3S1968 UART interface driver. + * + * \author Andrea Righi + */ + +#include /* for BV() */ +#include +#include +#include +#include +#include "cfg/cfg_ser.h" +#include "ser_lm3s.h" + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +struct CM3Serial +{ + struct SerialHardware hw; + bool sending; + uint32_t base; + sysirq_t irq; +}; + +/* Forward declaration */ +static struct CM3Serial UARTDesc[SER_CNT]; + +/* GPIO descriptor for UART pins */ +struct gpio_uart_info +{ + /* Sysctl */ + uint32_t sysctl; + /* GPIO base address register */ + uint32_t base; + /* Pin(s) bitmask */ + uint8_t pins; +}; + +/* Table to retrieve GPIO pins configuration to work as UART pins */ +static const struct gpio_uart_info gpio_uart[SER_CNT] = +{ + /* UART0 */ + { + .base = GPIO_PORTA_BASE, + .pins = BV(1) | BV(0), + .sysctl = SYSCTL_RCGC2_GPIOA, + }, + /* UART1 */ + { + .base = GPIO_PORTD_BASE, + .pins = BV(3) | BV(2), + .sysctl = SYSCTL_RCGC2_GPIOD, + }, + /* UART2 */ + { + .base = GPIO_PORTG_BASE, + .pins = BV(1) | BV(0), + .sysctl = SYSCTL_RCGC2_GPIOG, + }, +}; + +void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud) +{ + unsigned long div; + bool hi_speed; + + if (baud * 16 > CPU_FREQ) + { + hi_speed = true; + baud /= 2; + } + div = (CPU_FREQ * 8 / baud + 1) / 2; + + lm3s_uartDisable(base); + if (hi_speed) + HWREG(base + UART_O_CTL) |= UART_CTL_HSE; + else + HWREG(base + UART_O_CTL) &= ~UART_CTL_HSE; + /* Set the baud rate */ + HWREG(base + UART_O_IBRD) = div / 64; + HWREG(base + UART_O_FBRD) = div % 64; + lm3s_uartClear(base); + lm3s_uartEnable(base); +} + +void lm3s_uartSetParity(uint32_t base, int parity) +{ + /* Set 8-bit word, one stop bit by default */ + uint32_t config = UART_LCRH_WLEN_8; + + switch(parity) + { + case SER_PARITY_NONE: + break; + case SER_PARITY_ODD: + config |= UART_LCRH_PEN; + break; + case SER_PARITY_EVEN: + config |= UART_LCRH_EPS | UART_LCRH_PEN; + break; + default: + ASSERT(0); + return; + } + lm3s_uartDisable(base); + HWREG(base + UART_O_LCRH) = config; + lm3s_uartClear(base); + lm3s_uartEnable(base); +} + +void lm3s_uartInit(int port) +{ + uint32_t reg_clock, base; + + ASSERT(port >= 0 && port < SER_CNT); + + base = UARTDesc[port].base; + reg_clock = 1 << port; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= reg_clock; + SYSCTL_RCGC2_R |= gpio_uart[port].sysctl; + lm3s_busyWait(512); + + /* Configure GPIO pins to work as UART pins */ + lm3s_gpioPinConfig(gpio_uart[port].base, gpio_uart[port].pins, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD); + + /* Set serial param: 115.200 bps, no parity */ + lm3s_uartSetBaudRate(base, 115200); + lm3s_uartSetParity(base, SER_PARITY_NONE); +} + +static bool tx_sending(struct SerialHardware *_hw) +{ + struct CM3Serial *hw = (struct CM3Serial *)_hw; + return hw->sending; +} + +static void uart_irq_rx(int port) +{ + struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo; + uint32_t base = UARTDesc[port].base; + char c; + + while (lm3s_uartRxReady(base)) + { + c = HWREG(base + UART_O_DR); + if (fifo_isfull(rxfifo)) + ser_handles[port]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + } +} + +static void uart_irq_tx(int port) +{ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; + uint32_t base = UARTDesc[port].base; + + while (lm3s_uartTxReady(base)) + { + if (fifo_isempty(txfifo)) { + /* + * Disable TX empty interrupts if there're no more + * characters to transmit. + */ + HWREG(base + UART_O_IM) &= ~UART_IM_TXIM; + UARTDesc[port].sending = false; + break; + } + HWREG(base + UART_O_DR) = fifo_pop(txfifo); + } +} + +static void uart_common_irq_handler(int port) +{ + uint32_t base = UARTDesc[port].base; + uint32_t status; + + /* Read and clear the IRQ status */ + status = HWREG(base + UART_O_RIS); + + /* Process the IRQ */ + if (status & (UART_RIS_RXRIS | UART_RIS_RTRIS)) + uart_irq_rx(port); + if (status & UART_RIS_TXRIS) + uart_irq_tx(port); +} + +static void +lm3s_uartIRQEnable(int port, sysirq_handler_t handler) +{ + uint32_t base = UARTDesc[port].base; + sysirq_t irq = UARTDesc[port].irq; + + /* Register the IRQ handler */ + sysirq_setHandler(irq, handler); + /* Enable RX interrupt in the UART interrupt mask register */ + HWREG(base + UART_O_IM) |= UART_IM_RXIM | UART_IM_RTIM; +} + +static void lm3s_uartIRQDisable(int port) +{ + uint32_t base = UARTDesc[port].base; + + HWREG(base + UART_O_IM) &= + ~(UART_IM_TXIM | UART_IM_RXIM | UART_IM_RTIM); +} + +/* UART class definition */ +#define UART_PORT(port) \ + /* UART TX and RX buffers */ \ + static unsigned char \ + uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \ + static unsigned char \ + uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE]; \ + \ + /* UART interrupt handler */ \ + static DECLARE_ISR(uart ## port ## _irq_handler) \ + { \ + uart_common_irq_handler(port); \ + } \ + \ + /* UART public methods */ \ + static void \ + uart ## port ## _txStart(struct SerialHardware *_hw) \ + { \ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; \ + struct CM3Serial *hw = (struct CM3Serial *)_hw; \ + \ + if (hw->sending) \ + return; \ + lm3s_uartPutChar(UART ## port ## _BASE, fifo_pop(txfifo)); \ + if (!fifo_isempty(txfifo)) \ + { \ + HWREG(UART ## port ## _BASE + UART_O_IM) |= \ + UART_IM_TXIM; \ + hw->sending = true; \ + } \ + } \ + \ + static void \ + uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \ + unsigned long baud) \ + { \ + lm3s_uartSetBaudRate(UART ## port ## _BASE, baud); \ + } \ + \ + static void \ + uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \ + int parity) \ + { \ + lm3s_uartSetParity(UART ## port ## _BASE, parity); \ + } \ + \ + static void \ + uart ## port ## _cleanup(struct SerialHardware *_hw) \ + { \ + struct CM3Serial *hw = (struct CM3Serial *)_hw; \ + \ + hw->sending = false; \ + lm3s_uartIRQDisable(port); \ + lm3s_uartClear(UART ## port ## _BASE); \ + lm3s_uartDisable(UART ## port ## _BASE); \ + } \ + \ + static void \ + uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw), \ + UNUSED_ARG(struct Serial *, ser)) \ + { \ + lm3s_uartInit(port); \ + lm3s_uartEnable(UART ## port ## _BASE); \ + lm3s_uartIRQEnable(port, uart ## port ## _irq_handler); \ + } \ + \ + /* UART operations */ \ + static const struct SerialHardwareVT UART ## port ## _VT = \ + { \ + .init = uart ## port ## _init, \ + .cleanup = uart ## port ## _cleanup, \ + .setBaudrate = uart ## port ## _setbaudrate, \ + .setParity = uart ## port ## _setparity, \ + .txStart = uart ## port ## _txStart, \ + .txSending = tx_sending, \ + }; + +/* UART port instances */ +UART_PORT(0) +UART_PORT(1) +UART_PORT(2) + +static struct CM3Serial UARTDesc[SER_CNT] = +{ + { + .hw = { + .table = &UART0_VT, + .txbuffer = uart0_txbuffer, + .rxbuffer = uart0_rxbuffer, + .txbuffer_size = sizeof(uart0_txbuffer), + .rxbuffer_size = sizeof(uart0_rxbuffer), + }, + .sending = false, + .base = UART0_BASE, + .irq = INT_UART0, + }, + { + .hw = { + .table = &UART1_VT, + .txbuffer = uart1_txbuffer, + .rxbuffer = uart1_rxbuffer, + .txbuffer_size = sizeof(uart1_txbuffer), + .rxbuffer_size = sizeof(uart1_rxbuffer), + }, + .sending = false, + .base = UART1_BASE, + .irq = INT_UART1, + }, + { + .hw = { + .table = &UART2_VT, + .txbuffer = uart2_txbuffer, + .rxbuffer = uart2_rxbuffer, + .txbuffer_size = sizeof(uart2_txbuffer), + .rxbuffer_size = sizeof(uart2_rxbuffer), + }, + .sending = false, + .base = UART2_BASE, + .irq = INT_UART2, + }, +}; + +struct SerialHardware *ser_hw_getdesc(int port) +{ + ASSERT(port >= 0 && port < SER_CNT); + return &UARTDesc[port].hw; +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/ser_lm3s.h b/2.5/bertos/cpu/cortex-m3/drv/ser_lm3s.h new file mode 100644 index 00000000..e58738a8 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/ser_lm3s.h @@ -0,0 +1,154 @@ +/** + * \file + * + * + * \brief LM3S1968 UART interface driver. + * + * \author Andrea Righi + */ + +#ifndef SER_LM3S_H +#define SER_LM3S_H + +#include +#include /* cpu_relax() */ +#include /* lm3s_busyWait() */ +#include + +/* Serial hardware numbers */ +enum +{ + SER_UART0, + SER_UART1, + SER_UART2, + + SER_CNT //< Number of serial ports +}; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) //< Rx FIFO buffer overrun +#define SERRF_RXTIMEOUT BV(1) //< Receive timeout +#define SERRF_TXTIMEOUT BV(2) //< Transmit timeout + +/* + * Hardware errors. + */ +#define SERRF_RXSROVERRUN 0 //< Input overrun +#define SERRF_FRAMEERROR 0 //< Stop bit missing +#define SERRF_PARITYERROR 0 //< Parity error +#define SERRF_NOISEERROR 0 //< Noise error + +/* Serial error/status flags */ +typedef uint32_t serstatus_t; + +INLINE void lm3s_uartDisable(uint32_t base) +{ + /* Disable the hardware FIFO */ + HWREG(base + UART_O_LCRH) &= ~UART_LCRH_FEN; + + /* Disable the UART */ + HWREG(base + UART_O_CTL) &= + ~(UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE); + lm3s_busyWait(512); +} + +INLINE void lm3s_uartEnable(uint32_t base) +{ + /* Enable the hardware FIFO */ + HWREG(base + UART_O_LCRH) |= UART_LCRH_FEN; + + /* Enable RX, TX, and the UART */ + HWREG(base + UART_O_CTL) |= + UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE; + lm3s_busyWait(512); +} + +/* Clear the flags register */ +INLINE void lm3s_uartClear(uint32_t base) +{ + HWREG(base + UART_O_FR) = 0; +} + +INLINE bool lm3s_uartTxDone(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_TXFE ? true : false; +} + +INLINE bool lm3s_uartTxReady(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_TXFF ? false : true; +} + +INLINE bool lm3s_uartRxReady(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_RXFE ? false : true; +} + +INLINE bool lm3s_uartReady(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_BUSY ? false : true; +} + +INLINE int lm3s_uartPutCharNonBlocking(uint32_t base, unsigned char c) +{ + if (!lm3s_uartTxReady(base)) + return EOF; + HWREG(base + UART_O_DR) = c; + return c; +} + +INLINE int lm3s_uartPutChar(uint32_t base, unsigned char c) +{ + while (!lm3s_uartTxReady(base)) + cpu_relax(); + HWREG(base + UART_O_DR) = c; + return c; +} + +INLINE int lm3s_uartGetCharNonBlocking(uint32_t base) +{ + if (!lm3s_uartRxReady(base)) + return EOF; + return HWREG(base + UART_O_DR); +} + +INLINE int lm3s_uartGetChar(uint32_t base) +{ + while (!lm3s_uartRxReady(base)) + cpu_relax(); + return HWREG(base + UART_O_DR); +} + +void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud); +void lm3s_uartSetParity(uint32_t base, int parity); +void lm3s_uartInit(int port); + +#endif /* SER_LM3S_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/ssi_lm3s.c b/2.5/bertos/cpu/cortex-m3/drv/ssi_lm3s.c new file mode 100644 index 00000000..2dc80f99 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/ssi_lm3s.c @@ -0,0 +1,207 @@ +/** + * \file + * + * + * \brief LM3S1968 Synchronous Serial Interface (SSI) driver. + * + * \author Andrea Righi + */ + +#include "cfg/compiler.h" +#include "cfg/debug.h" + +#include /* memset() */ + +#include "ssi_lm3s.h" + +/* SSI clocking informations (CPSDVSR + SCR) */ +struct SSIClock +{ + unsigned int cpsdvsr; + unsigned int scr; +}; + +/* + * Evaluate the SSI clock prescale (SSICPSR) and SSI serial clock rate (SCR). + */ +INLINE struct SSIClock +lm3s_ssiPrescale(unsigned int bitrate) +{ + struct SSIClock ret; + + for (ret.cpsdvsr = 2, ret.scr = CPU_FREQ / bitrate / ret.cpsdvsr - 1; + ret.scr > 255; ret.cpsdvsr += 2); + ASSERT(ret.cpsdvsr < 255); + + return ret; +} + +/* + * Initialize the SSI interface. + * + * Return 0 in case of success, a negative value otherwise. + */ +int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width) +{ + struct SSIClock ssi_clock; + + ASSERT(addr == SSI0_BASE || addr == SSI1_BASE); + /* Configure the SSI operating mode */ + switch (mode) + { + /* SSI Slave Mode Output Disable */ + case SSI_MODE_SLAVE_OD: + HWREG(addr + SSI_O_CR1) = SSI_CR1_SOD; + break; + /* SSI Slave */ + case SSI_MODE_SLAVE: + HWREG(addr + SSI_O_CR1) = SSI_CR1_MS; + break; + /* SSI Master */ + case SSI_MODE_MASTER: + HWREG(addr + SSI_O_CR1) = 0; + break; + default: + ASSERT(0); + return -1; + } + /* Configure the peripheral clock and frame format */ + ssi_clock = lm3s_ssiPrescale(bitrate); + HWREG(addr + SSI_O_CPSR) = ssi_clock.cpsdvsr; + HWREG(addr + SSI_O_CR0) = + (ssi_clock.scr << 8) | + ((frame & 3) << 6) | + (frame & SSI_CR0_FRF_M) | + (data_width - 1); + /* Enable the SSI interface */ + HWREG(addr + SSI_O_CR1) |= SSI_CR1_SSE; + + return 0; +} + +/* + * Write data to the SSI bus. + * + * Return the number of bytes written to the bus. + */ +static size_t lm3s_ssiWrite(struct KFile *fd, const void *buf, size_t size) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + const char *p = (const char *)buf; + uint32_t frame; + size_t count = 0; + + while (count < size) + { + frame = p[count]; + if (fds->flags & LM3S_SSI_NONBLOCK) + { + if (!lm3s_ssiWriteFrameNonBlocking(fds->addr, + frame)) + break; + } + else + lm3s_ssiWriteFrame(fds->addr, frame); + count++; + } + return count; +} + +/* + * Read data from the SSI bus. + * + * Return the number of bytes read from the bus. + */ +static size_t lm3s_ssiRead(struct KFile *fd, void *buf, size_t size) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + + uint8_t *p = (uint8_t *)buf; + uint32_t frame; + size_t count = 0; + + while (count < size) + { + if (fds->flags & LM3S_SSI_NONBLOCK) + { + if (!lm3s_ssiReadFrameNonBlocking(fds->addr, &frame)) + break; + } + else + lm3s_ssiReadFrame(fds->addr, &frame); + *p++ = (uint8_t)frame; + count++; + } + return count; +} + + +/* Wait for data in the TX FIFO being actually transmitted */ +static int lm3s_ssiFlush(struct KFile *fd) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + + while (!lm3s_ssiTxDone(fds->addr)) + cpu_relax(); + return 0; +} + +/* Disable the SSI interface */ +static int lm3s_ssiClose(struct KFile *fd) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + + lm3s_ssiFlush(fd); + HWREG(fds->addr + SSI_O_CR1) &= ~SSI_CR1_SSE; + return 0; +} + +/** + * Initialize a LM3S SSI driver. + */ +void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width) +{ + memset(fds, 0, sizeof(*fds)); + DB(fds->fd._type = KFT_LM3SSSI); + + /* TODO: only 8-bit frame size is supported */ + ASSERT(data_width == 8); + + fds->fd.write = lm3s_ssiWrite; + fds->fd.read = lm3s_ssiRead; + fds->fd.close = lm3s_ssiClose; + fds->fd.flush = lm3s_ssiFlush; + + fds->addr = addr; + lm3s_ssiOpen(addr, frame, mode, bitrate, data_width); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/ssi_lm3s.h b/2.5/bertos/cpu/cortex-m3/drv/ssi_lm3s.h new file mode 100644 index 00000000..d5f09e3d --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/ssi_lm3s.h @@ -0,0 +1,191 @@ +/** + * \file + * + * + * \brief LM3S1968 Synchronous Serial Interface (SSI) driver. + * + */ + +#ifndef SSI_LM3S_H +#define SSI_LM3S_H + +#include /* cpu_relax() */ +#include /* KFile */ +#include + +/** + * LM3S1968 SSI frame format + */ +/*\{*/ +#define SSI_FRF_MOTO_MODE_0 0x00000000 //< Moto fmt, polarity 0, phase 0 +#define SSI_FRF_MOTO_MODE_1 0x00000002 //< Moto fmt, polarity 0, phase 1 +#define SSI_FRF_MOTO_MODE_2 0x00000001 //< Moto fmt, polarity 1, phase 0 +#define SSI_FRF_MOTO_MODE_3 0x00000003 //< Moto fmt, polarity 1, phase 1 +#define SSI_FRF_TI 0x00000010 //< TI frame format +#define SSI_FRF_NMW 0x00000020 //< National MicroWire frame format +/*\}*/ + +/** + * LM3S1968 SSI operational mode + */ +/*\{*/ +#define SSI_MODE_MASTER 0x00000000 //< SSI master +#define SSI_MODE_SLAVE 0x00000001 //< SSI slave +#define SSI_MODE_SLAVE_OD 0x00000002 //< SSI slave with output disabled +/*\}*/ + +/* LM3S SSI handle properties */ +enum +{ + /* Non-blocking I/O */ + LM3S_SSI_NONBLOCK = 1, +}; + +/** LM3S1968 SSI handle structure */ +typedef struct LM3SSSI +{ + /* SSI Kfile structure */ + KFile fd; + + /* Handle properties */ + uint32_t flags; + + /* SSI port address */ + uint32_t addr; +} LM3SSSI; + +/** + * ID for LM3S SSI. + */ +#define KFT_LM3SSSI MAKE_ID('L', 'S', 'S', 'I') + +INLINE LM3SSSI *LM3SSSI_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_LM3SSSI); + return (LM3SSSI *)fd; +} + +/* KFile interface to LM3S SSI */ +void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width); + +/* Raw interface to LM3S SSI */ +int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width); + +/* + * Check if the SSI transmitter is busy or not + * + * This allows to determine whether the TX FIFO have been cleared by the + * hardware, so the transmission can be safely considered completed. + */ +INLINE bool lm3s_ssiTxDone(uint32_t base) +{ + return (HWREG(base + SSI_O_SR) & SSI_SR_BSY) ? true : false; +} + +/* + * Check if the SSI TX FIFO is full + */ +INLINE bool lm3s_ssiTxReady(uint32_t base) +{ + return (HWREG(base + SSI_O_SR) & SSI_SR_TNF) ? true : false; +} + +/* + * Check for data available in the RX FIFO + */ +INLINE bool lm3s_ssiRxReady(uint32_t base) +{ + return (HWREG(base + SSI_O_SR) & SSI_SR_RNE) ? true : false; +} + +/* + * Get a frame into the SSI receive FIFO without blocking. + * + * Return the number of frames read from the RX FIFO. + */ +INLINE int lm3s_ssiReadFrameNonBlocking(uint32_t base, uint32_t *val) +{ + /* Check for data available in the RX FIFO */ + if (!lm3s_ssiRxReady(base)) + return 0; + /* Read data from SSI RX FIFO */ + *val = HWREG(base + SSI_O_DR); + return 1; +} + +/* + * Get a frame from the SSI receive FIFO. + */ +INLINE void lm3s_ssiReadFrame(uint32_t base, uint32_t *val) +{ + /* Wait for data available in the RX FIFO */ + while (!lm3s_ssiRxReady(base)) + cpu_relax(); + /* Read data from SSI RX FIFO */ + *val = HWREG(base + SSI_O_DR); +} + +/* + * Put a frame into the SSI transmit FIFO without blocking. + * + * NOTE: the upper bits of the frame will be automatically discarded by the + * hardware according to the frame data width. + * + * Return the number of frames written to the TX FIFO. + */ +INLINE int lm3s_ssiWriteFrameNonBlocking(uint32_t base, uint32_t val) +{ + /* Check for available space in the TX FIFO */ + if (!lm3s_ssiTxReady(base)) + return 0; + /* Enqueue data to the TX FIFO */ + HWREG(base + SSI_O_DR) = val; + return 1; +} + +/* + * Put a frame into the SSI transmit FIFO. + * + * NOTE: the upper bits of the frame will be automatically discarded by the + * hardware according to the frame data width. + */ +INLINE void lm3s_ssiWriteFrame(uint32_t base, uint32_t val) +{ + /* Wait for available space in the TX FIFO */ + while (!lm3s_ssiTxReady(base)) + cpu_relax(); + /* Enqueue data to the TX FIFO */ + HWREG(base + SSI_O_DR) = val; +} + +#endif /* SSI_LM3S_H */ diff --git a/2.5/bertos/cpu/cortex-m3/drv/timer_cm3.c b/2.5/bertos/cpu/cortex-m3/drv/timer_cm3.c new file mode 100644 index 00000000..e5a730bf --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/timer_cm3.c @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Low-level timer driver (SysTick) for LM3S1968. + * + * \author Andrea Righi + */ + +#include +#include +#include +#include "timer_cm3.h" + +INLINE void timer_hw_setPeriod(unsigned long period) +{ + ASSERT(period < (1 << 24)); + NVIC_ST_RELOAD_R = period - 1; +} + +static void timer_hw_enable(void) +{ + NVIC_ST_CTRL_R |= + NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN; +} + +static void timer_hw_disable(void) +{ + NVIC_ST_CTRL_R &= ~(NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN); +} + +void timer_hw_init(void) +{ + timer_hw_setPeriod(CPU_FREQ / TIMER_TICKS_PER_SEC); + sysirq_setHandler(FAULT_SYSTICK, timer_handler); + timer_hw_enable(); +} + +void timer_hw_exit(void) +{ + timer_hw_disable(); + sysirq_freeHandler(FAULT_SYSTICK); +} diff --git a/2.5/bertos/cpu/cortex-m3/drv/timer_cm3.h b/2.5/bertos/cpu/cortex-m3/drv/timer_cm3.h new file mode 100644 index 00000000..1ee8b7a2 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/drv/timer_cm3.h @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Low-level timer driver (SysTick) for Cortex-M3. + */ + +#ifndef TIMER_CM3_H +#define TIMER_CM3_H + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ + +#if CPU_CM3_LM3S + #include +#elif CPU_CM3_STM32 + #include +/*#elif Add other families here */ +#else + #error Unknown CPU +#endif + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * + * $WIZ$ timer_select = "TIMER_DEFAULT", "TIMER_ON_GPTM" + */ +#define TIMER_ON_GPTM 1 + +#define TIMER_DEFAULT TIMER_ON_GPTM ///< Default system timer + +#if (CONFIG_TIMER == TIMER_ON_GPTM) + /* Ticks frequency (HZ) */ + #define TIMER_TICKS_PER_SEC 1000 + + /* Frequency of the hardware high-precision timer. */ + #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ) + + /* Maximum value of the high-precision hardware counter register */ + #define TIMER_HW_CNT (CPU_FREQ / TIMER_TICKS_PER_SEC) + + /** Type of time expressed in ticks of the hardware high-precision timer */ + typedef uint32_t hptime_t; + #define SIZEOF_HPTIME_T 4 + + /* Timer ISR prototype */ + ISR_PROTO_CONTEXT_SWITCH(timer_handler); + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_handler) + + INLINE void timer_hw_irq(void) + { + } + + + INLINE bool timer_hw_triggered(void) + { + return true; + } + + INLINE hptime_t timer_hw_hpread(void) + { + return (TIMER_HW_CNT - NVIC_ST_CURRENT_R); + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +void timer_hw_init(void); +void timer_hw_exit(void); + +#endif /* TIMER_CM3_H */ diff --git a/2.5/bertos/cpu/cortex-m3/hw/crt_cm3.S b/2.5/bertos/cpu/cortex-m3/hw/crt_cm3.S new file mode 100644 index 00000000..c23d8374 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/hw/crt_cm3.S @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \brief Cortex-M3 architecture's entry point + * + * \author Andrea Righi + */ + +#define CONTROL_UNPRIVILEGED 1 +#define CONTROL_PSP 2 + +.syntax unified +.thumb +.section .init, "ax", %progbits + +.weak __init +.set __init, __init0 + +.weak __init1 +.set __init1, __dummy_init + +.weak __init2 +.set __init2, __dummy_init + +.balign 2 +.thumb_func +__dummy_init: + bx lr + +/* + * Reset handler. + */ +.balign 2 +.thumb_func +__init0: + /* Disable IRQs */ + cpsid i + /* + * Initialize process stack pointer. + */ + ldr r0, =__psp_end + msr psp, r0 + + /* Call the early hardware initialization routine */ + bl __init1 + + /* Copy the data segment initializers from flash to SRAM */ + ldr r0, =__text_end + ldr r1, =__data_start + ldr r2, =__data_end +data_loop: + cmp r1, r2 + ittt lo + ldrlo r3, [r0], #4 + strlo r3, [r1], #4 + blo data_loop + + /* Zero fill the bss segment */ + ldr r1, =__bss_start + ldr r2, =__bss_end + mov r0, #0 +bss_loop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo bss_loop + + /* Switch to the process stack */ + movs r0, CONTROL_PSP + msr control, r0 + isb + + /* Call the hardware initialization routine */ + bl __init2 + + /* Call the application's entry point */ + cpsie i + mov r0, #0 + mov r1, #0 + bl main +end: + wfi + b end diff --git a/2.5/bertos/cpu/cortex-m3/hw/init_cm3.c b/2.5/bertos/cpu/cortex-m3/hw/init_cm3.c new file mode 100644 index 00000000..8415cbfb --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/hw/init_cm3.c @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Cortex-M3 architecture's entry point + * + * \author Andrea Righi + */ + +#include +#include /* CONFIG_KERN_PREEMPT */ +#include +#include +#include /* PAUSE */ +#include /* IRQ_DISABLE */ +#include +#include +#include "switch_ctx_cm3.h" + +#if CPU_CM3_LM3S +#include +#include +#elif CPU_CM3_STM32 +#include +#include +#endif + +extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end; + +extern void __init2(void); + +/* Architecture's entry point */ +void __init2(void) +{ + /* + * The main application expects IRQs disabled. + */ + IRQ_DISABLE; + +#if CPU_CM3_LM3S + /* + * PLL may not function properly at default LDO setting. + * + * Description: + * + * In designs that enable and use the PLL module, unstable device + * behavior may occur with the LDO set at its default of 2.5 volts or + * below (minimum of 2.25 volts). Designs that do not use the PLL + * module are not affected. + * + * Workaround: Prior to enabling the PLL module, it is recommended that + * the default LDO voltage setting of 2.5 V be adjusted to 2.75 V using + * the LDO Power Control (LDOPCTL) register. + * + * Silicon Revision Affected: A1, A2 + * + * See also: Stellaris LM3S1968 A2 Errata documentation. + */ + if (REVISION_IS_A1 | REVISION_IS_A2) + HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V; +#endif + /* Set the appropriate clocking configuration */ + clock_init(); + + /* Initialize IRQ vector table in RAM */ + sysirq_init(); + +#if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + /* + * Voluntary context switch handler. + * + * This software interrupt can always be triggered and must be + * dispatched as soon as possible, thus we just disable IRQ priority + * for it. + */ + sysirq_setHandler(FAULT_SVCALL, svcall_handler); + sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX); + /* + * Preemptible context switch handler + * + * The priority of this IRQ must be the lowest priority in the system + * in order to run last in the interrupt service routines' chain. + */ + sysirq_setHandler(FAULT_PENDSV, pendsv_handler); + sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN); +#endif +} diff --git a/2.5/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c b/2.5/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c new file mode 100644 index 00000000..7b36d902 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c @@ -0,0 +1,145 @@ +/** + * \file + * + * + * \brief Cortex-M3 context switch + * + * \author Andrea Righi + */ + +#include +#include /* CONFIG_KERN_PREEMPT */ +#include /* IRQ_PRIO_DISABLED */ +#include /* cpu_stack_t */ +#include /* asm_switch_context() prototype */ +#include /* proc_preempt() */ +#include "switch_ctx_cm3.h" + +#if CONFIG_KERN_PREEMPT +/* + * Kernel preemption: implementation details. + * + * The kernel preemption is implemented using the PendSV IRQ. Inside the + * SysTick handler when a process needs to be interrupted (expires its time + * quantum or a high-priority process is awakend) a pending PendSV call is + * triggered. + * + * The PendSV handler is called immediately after the SysTick handler, using + * the architecture's tail-chaining functionality (an ISR call without the + * overhead of state saving and restoration between different IRQs). Inside the + * PendSV handler we perform the stack-switching between the old and new + * processes. + * + * Voluntary context switch is implemented as a soft-interrupt call (SVCall), + * so any process is always suspended and resumed from an interrupt context. + * + * NOTE: interrupts must be disabled or enabled when resuming a process context + * depending of the type of the previous suspension. If a process was suspended + * by a voluntary context switch IRQs must be disabled on resume (voluntary + * context switch always happen with IRQs disabled). Instead, if a process was + * suspended by the kernel preemption IRQs must be always re-enabled, because + * the PendSV handler resumes directly the process context. To keep track of + * this, we save the state of the IRQ priority in register r3 before performing + * the context switch. + * + * If CONFIG_KERN_PREEMPT is not enabled the cooperative implementation + * fallbacks to the default stack-switching mechanism, performed directly in + * thread-mode and implemented as a normal function call. + */ + +/* + * Voluntary context switch handler. + */ +void NAKED svcall_handler(void) +{ + asm volatile ( + /* Save context */ + "mrs r3, basepri\n\t" + "mrs ip, psp\n\t" + "stmdb ip!, {r3-r11, lr}\n\t" + /* Stack switch */ + "str ip, [r1]\n\t" + "ldr ip, [r0]\n\t" + /* Restore context */ + "ldmia ip!, {r3-r11, lr}\n\t" + "msr psp, ip\n\t" + "msr basepri, r3\n\t" + "bx lr" : : : "memory"); +} + +/* + * Preemptible context switch handler. + */ +void NAKED pendsv_handler(void) +{ + register cpu_stack_t *stack asm("ip"); + + asm volatile ( + "mrs r3, basepri\n\t" + "mov %0, %2\n\t" + "msr basepri, %0\n\t" + "mrs %0, psp\n\t" + "stmdb %0!, {r3-r11, lr}\n\t" + : "=r"(stack) + : "r"(stack), "i"(IRQ_PRIO_DISABLED) + : "r3", "memory"); + proc_current()->stack = stack; + proc_preempt(); + stack = proc_current()->stack; + asm volatile ( + "ldmia %0!, {r3-r11, lr}\n\t" + "msr psp, %0\n\t" + "msr basepri, r3\n\t" + "bx lr" + : "=r"(stack) : "r"(stack) + : "memory"); +} +#else /* !CONFIG_KERN_PREEMPT */ +void NAKED asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp) +{ + register cpu_stack_t **_new_sp asm("r0") = new_sp; + register cpu_stack_t **_old_sp asm("r1") = old_sp; + + asm volatile ( + "mrs ip, psp\n\t" + /* Save registers */ + "stmdb ip!, {r4-r11, lr}\n\t" + /* Save old stack pointer */ + "str ip, [%1]\n\t" + /* Load new stack pointer */ + "ldr ip, [%0]\n\t" + /* Load new registers */ + "ldmia ip!, {r4-r11, lr}\n\t" + "msr psp, ip\n\t" + "bx lr" + : : "r"(_new_sp), "r"(_old_sp) : "ip", "memory"); +} +#endif /* CONFIG_KERN_PREEMPT */ diff --git a/2.5/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h b/2.5/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h new file mode 100644 index 00000000..24efcc28 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief Cortex-M3 context switch + */ + +#ifndef SWITCH_CTX_CM3_H +#define SWITCH_CTX_CM3_H + +#if CONFIG_KERN_PREEMPT +extern void svcall_handler(void); +extern void pendsv_handler(void); +#endif /* CONFIG_KERN_PREEMPT */ + +#endif /* SWITCH_CTX_CM3_H */ diff --git a/2.5/bertos/cpu/cortex-m3/hw/vectors_cm3.S b/2.5/bertos/cpu/cortex-m3/hw/vectors_cm3.S new file mode 100644 index 00000000..dfd464a6 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/hw/vectors_cm3.S @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Cortex-M3 startup interrupt vector table + * + * \author Andrea Righi + */ + +.syntax unified +.thumb + +.text +.thumb_func +default_isr: + wfi + b default_isr + +.section .vectors,"ax",%progbits + +irq_vectors: + .word __msp_end /* Initial stack pointer */ + .word __init /* The reset handler */ + .word default_isr /* The NMI handler */ + .word default_isr /* The hard fault handler */ +/* + * This IRQ vector table will be replaced by another one in RAM after the IRQ + * module initialization and the reset handler disables IRQ at the very + * beginning, so there is no chance to trigger the following IRQs. + * + * We can safely trim the rest of this table to reduce the memory footprint and + * save some space in flash. + */ diff --git a/2.5/bertos/cpu/cortex-m3/info/LM3S1968.cdef b/2.5/bertos/cpu/cortex-m3/info/LM3S1968.cdef new file mode 100644 index 00000000..e3811a29 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/info/LM3S1968.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based LM3S1968 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "lm3s" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-lm3s.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "50000000UL" + +# Special CPU related tags. +CPU_TAGS += ["lm3s"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_lm3s.c " + DRV_DIR + "clock_lm3s.c " + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_LM3S1968__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "lm3s1968_rom.ld" diff --git a/2.5/bertos/cpu/cortex-m3/info/LM3S8962.cdef b/2.5/bertos/cpu/cortex-m3/info/LM3S8962.cdef new file mode 100644 index 00000000..ddabc1f2 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/info/LM3S8962.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based LM3S8962 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "lm3s" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-lm3s.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "50000000UL" + +# Special CPU related tags. +CPU_TAGS += ["lm3s"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_lm3s.c " + DRV_DIR + "clock_lm3s.c " + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_LM3S8962__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "lm3s1968_rom.ld" diff --git a/2.5/bertos/cpu/cortex-m3/info/STM32F103RB.cdef b/2.5/bertos/cpu/cortex-m3/info/STM32F103RB.cdef new file mode 100644 index 00000000..add4cea6 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/info/STM32F103RB.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based STM32-P103 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "stm32" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "72000000UL" + +# Special CPU related tags. +CPU_TAGS += ["stm32"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes on-chip flash memory", + "20 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_STM32F103RB__" +MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "stm32f103rb_rom.ld" diff --git a/2.5/bertos/cpu/cortex-m3/info/cm3.common b/2.5/bertos/cpu/cortex-m3/info/cm3.common new file mode 100644 index 00000000..380a02b5 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/info/cm3.common @@ -0,0 +1,81 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based boards. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = ["ARM Cortex-M3", + "ARMv7-M Thumb-2 ISA", + "16-bit and 32-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "arm" + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "cortex-m3" + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_CPU = CORE_CPU + +# Special CPU related tags. +CPU_TAGS = ["cm3"] + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "cortex-m3/scripts/" +HW_DIR = CPU_DIR + "cortex-m3/hw/" +DRV_DIR = CPU_DIR + "cortex-m3/drv/" + +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/debug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" + +GDB_INIT_SCRIPT = PRG_SCRIPTS_DIR + "arm/openocd/gdbinit-sam7" + +# Common GCC flags. +MK_CPU_CPPAFLAGS = "-g -gdwarf-2 -mthumb -mno-thumb-interwork" +MK_CPU_CPPFLAGS = "-O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -I" + CPU_DIR + "cortex-m3/" +MK_CPU_LDFLAGS = "-mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch" + +# CRT files. +MK_CPU_CPPASRC = HW_DIR + "crt_cm3.S " + HW_DIR + "vectors_cm3.S " +MK_CPU_CSRC = HW_DIR + "init_cm3.c " + DRV_DIR + "irq_cm3.c " diff --git a/2.5/bertos/cpu/cortex-m3/io/cm3_types.h b/2.5/bertos/cpu/cortex-m3/io/cm3_types.h new file mode 100644 index 00000000..8cb94855 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/cm3_types.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Cortex-M3 generic hardware macros. + */ + +#ifndef CM3_TYPES_H +#define CM3_TYPES_H + +/** + * Macros for hardware access, both direct and via the bit-band region. + */ +/*\{*/ +#define HWREG(x) (*((reg32_t *)(x))) +#define HWREGH(x) (*((reg16_t *)(x))) +#define HWREGB(x) (*((reg8_t *)(x))) + +#define HWREGBITW(x, b) \ + HWREG(((reg32_t)(x) & 0xF0000000) | 0x02000000 | \ + (((reg32_t)(x) & 0x000FFFFF) << 5) | ((b) << 2)) +#define HWREGBITH(x, b) \ + HWREGH(((reg32_t)(x) & 0xF0000000) | 0x02000000 | \ + (((reg32_t)(x) & 0x000FFFFF) << 5) | ((b) << 2)) +#define HWREGBITB(x, b) \ + HWREGB(((reg32_t)(x) & 0xF0000000) | 0x02000000 | \ + (((reg32_t)(x) & 0x000FFFFF) << 5) | ((b) << 2)) +/*\}*/ + +#endif /* CM3_TYPES_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s.h b/2.5/bertos/cpu/cortex-m3/io/lm3s.h new file mode 100644 index 00000000..d924d442 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Andrea Righi + */ + +#ifndef LM3S_H +#define LM3S_H + +#include +#include + +#if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962) + #include "lm3s1968.h" + #include "lm3s_types.h" + #include "lm3s_ints.h" + #include "lm3s_nvic.h" + #include "lm3s_sysctl.h" + #include "lm3s_gpio.h" + #include "lm3s_memmap.h" + #include "lm3s_uart.h" + #include "lm3s_ssi.h" +#else + #error Missing I/O definitions for CPU. +#endif + +#endif /* LM3S_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s1968.h b/2.5/bertos/cpu/cortex-m3/io/lm3s1968.h new file mode 100644 index 00000000..4ffdc0d1 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s1968.h @@ -0,0 +1,3765 @@ +/** + * \file + * + * + * \brief LM3S1968 registers definition. + */ + +#ifndef LM3S1968_H +#define LM3S1968_H + +#include + +/** + * Watchdog Timer registers (WATCHDOG0) + */ +/*\{*/ +#define WATCHDOG0_LOAD_R (*((reg32_t *)0x40000000)) +#define WATCHDOG0_VALUE_R (*((reg32_t *)0x40000004)) +#define WATCHDOG0_CTL_R (*((reg32_t *)0x40000008)) +#define WATCHDOG0_ICR_R (*((reg32_t *)0x4000000C)) +#define WATCHDOG0_RIS_R (*((reg32_t *)0x40000010)) +#define WATCHDOG0_MIS_R (*((reg32_t *)0x40000014)) +#define WATCHDOG0_TEST_R (*((reg32_t *)0x40000418)) +#define WATCHDOG0_LOCK_R (*((reg32_t *)0x40000C00)) +/*\}*/ + +/** + * GPIO registers (PORTA) + */ +/*\{*/ +#define GPIO_PORTA_DATA_BITS_R ((reg32_t *)0x40004000) +#define GPIO_PORTA_DATA_R (*((reg32_t *)0x400043FC)) +#define GPIO_PORTA_DIR_R (*((reg32_t *)0x40004400)) +#define GPIO_PORTA_IS_R (*((reg32_t *)0x40004404)) +#define GPIO_PORTA_IBE_R (*((reg32_t *)0x40004408)) +#define GPIO_PORTA_IEV_R (*((reg32_t *)0x4000440C)) +#define GPIO_PORTA_IM_R (*((reg32_t *)0x40004410)) +#define GPIO_PORTA_RIS_R (*((reg32_t *)0x40004414)) +#define GPIO_PORTA_MIS_R (*((reg32_t *)0x40004418)) +#define GPIO_PORTA_ICR_R (*((reg32_t *)0x4000441C)) +#define GPIO_PORTA_AFSEL_R (*((reg32_t *)0x40004420)) +#define GPIO_PORTA_DR2R_R (*((reg32_t *)0x40004500)) +#define GPIO_PORTA_DR4R_R (*((reg32_t *)0x40004504)) +#define GPIO_PORTA_DR8R_R (*((reg32_t *)0x40004508)) +#define GPIO_PORTA_ODR_R (*((reg32_t *)0x4000450C)) +#define GPIO_PORTA_PUR_R (*((reg32_t *)0x40004510)) +#define GPIO_PORTA_PDR_R (*((reg32_t *)0x40004514)) +#define GPIO_PORTA_SLR_R (*((reg32_t *)0x40004518)) +#define GPIO_PORTA_DEN_R (*((reg32_t *)0x4000451C)) +#define GPIO_PORTA_LOCK_R (*((reg32_t *)0x40004520)) +#define GPIO_PORTA_CR_R (*((reg32_t *)0x40004524)) +/*\}*/ + +/** + * GPIO registers (PORTB) + */ +/*\{*/ +#define GPIO_PORTB_DATA_BITS_R ((reg32_t *)0x40005000) +#define GPIO_PORTB_DATA_R (*((reg32_t *)0x400053FC)) +#define GPIO_PORTB_DIR_R (*((reg32_t *)0x40005400)) +#define GPIO_PORTB_IS_R (*((reg32_t *)0x40005404)) +#define GPIO_PORTB_IBE_R (*((reg32_t *)0x40005408)) +#define GPIO_PORTB_IEV_R (*((reg32_t *)0x4000540C)) +#define GPIO_PORTB_IM_R (*((reg32_t *)0x40005410)) +#define GPIO_PORTB_RIS_R (*((reg32_t *)0x40005414)) +#define GPIO_PORTB_MIS_R (*((reg32_t *)0x40005418)) +#define GPIO_PORTB_ICR_R (*((reg32_t *)0x4000541C)) +#define GPIO_PORTB_AFSEL_R (*((reg32_t *)0x40005420)) +#define GPIO_PORTB_DR2R_R (*((reg32_t *)0x40005500)) +#define GPIO_PORTB_DR4R_R (*((reg32_t *)0x40005504)) +#define GPIO_PORTB_DR8R_R (*((reg32_t *)0x40005508)) +#define GPIO_PORTB_ODR_R (*((reg32_t *)0x4000550C)) +#define GPIO_PORTB_PUR_R (*((reg32_t *)0x40005510)) +#define GPIO_PORTB_PDR_R (*((reg32_t *)0x40005514)) +#define GPIO_PORTB_SLR_R (*((reg32_t *)0x40005518)) +#define GPIO_PORTB_DEN_R (*((reg32_t *)0x4000551C)) +#define GPIO_PORTB_LOCK_R (*((reg32_t *)0x40005520)) +#define GPIO_PORTB_CR_R (*((reg32_t *)0x40005524)) +/*\}*/ + +/** + * GPIO registers (PORTC) + */ +/*\{*/ +#define GPIO_PORTC_DATA_BITS_R ((reg32_t *)0x40006000) +#define GPIO_PORTC_DATA_R (*((reg32_t *)0x400063FC)) +#define GPIO_PORTC_DIR_R (*((reg32_t *)0x40006400)) +#define GPIO_PORTC_IS_R (*((reg32_t *)0x40006404)) +#define GPIO_PORTC_IBE_R (*((reg32_t *)0x40006408)) +#define GPIO_PORTC_IEV_R (*((reg32_t *)0x4000640C)) +#define GPIO_PORTC_IM_R (*((reg32_t *)0x40006410)) +#define GPIO_PORTC_RIS_R (*((reg32_t *)0x40006414)) +#define GPIO_PORTC_MIS_R (*((reg32_t *)0x40006418)) +#define GPIO_PORTC_ICR_R (*((reg32_t *)0x4000641C)) +#define GPIO_PORTC_AFSEL_R (*((reg32_t *)0x40006420)) +#define GPIO_PORTC_DR2R_R (*((reg32_t *)0x40006500)) +#define GPIO_PORTC_DR4R_R (*((reg32_t *)0x40006504)) +#define GPIO_PORTC_DR8R_R (*((reg32_t *)0x40006508)) +#define GPIO_PORTC_ODR_R (*((reg32_t *)0x4000650C)) +#define GPIO_PORTC_PUR_R (*((reg32_t *)0x40006510)) +#define GPIO_PORTC_PDR_R (*((reg32_t *)0x40006514)) +#define GPIO_PORTC_SLR_R (*((reg32_t *)0x40006518)) +#define GPIO_PORTC_DEN_R (*((reg32_t *)0x4000651C)) +#define GPIO_PORTC_LOCK_R (*((reg32_t *)0x40006520)) +#define GPIO_PORTC_CR_R (*((reg32_t *)0x40006524)) +/*\}*/ + +/** + * GPIO registers (PORTD) + */ +/*\{*/ +#define GPIO_PORTD_DATA_BITS_R ((reg32_t *)0x40007000) +#define GPIO_PORTD_DATA_R (*((reg32_t *)0x400073FC)) +#define GPIO_PORTD_DIR_R (*((reg32_t *)0x40007400)) +#define GPIO_PORTD_IS_R (*((reg32_t *)0x40007404)) +#define GPIO_PORTD_IBE_R (*((reg32_t *)0x40007408)) +#define GPIO_PORTD_IEV_R (*((reg32_t *)0x4000740C)) +#define GPIO_PORTD_IM_R (*((reg32_t *)0x40007410)) +#define GPIO_PORTD_RIS_R (*((reg32_t *)0x40007414)) +#define GPIO_PORTD_MIS_R (*((reg32_t *)0x40007418)) +#define GPIO_PORTD_ICR_R (*((reg32_t *)0x4000741C)) +#define GPIO_PORTD_AFSEL_R (*((reg32_t *)0x40007420)) +#define GPIO_PORTD_DR2R_R (*((reg32_t *)0x40007500)) +#define GPIO_PORTD_DR4R_R (*((reg32_t *)0x40007504)) +#define GPIO_PORTD_DR8R_R (*((reg32_t *)0x40007508)) +#define GPIO_PORTD_ODR_R (*((reg32_t *)0x4000750C)) +#define GPIO_PORTD_PUR_R (*((reg32_t *)0x40007510)) +#define GPIO_PORTD_PDR_R (*((reg32_t *)0x40007514)) +#define GPIO_PORTD_SLR_R (*((reg32_t *)0x40007518)) +#define GPIO_PORTD_DEN_R (*((reg32_t *)0x4000751C)) +#define GPIO_PORTD_LOCK_R (*((reg32_t *)0x40007520)) +#define GPIO_PORTD_CR_R (*((reg32_t *)0x40007524)) +/*\}*/ + +/** + * SSI registers (SSI0) + */ +/*\{*/ +#define SSI0_CR0_R (*((reg32_t *)0x40008000)) +#define SSI0_CR1_R (*((reg32_t *)0x40008004)) +#define SSI0_DR_R (*((reg32_t *)0x40008008)) +#define SSI0_SR_R (*((reg32_t *)0x4000800C)) +#define SSI0_CPSR_R (*((reg32_t *)0x40008010)) +#define SSI0_IM_R (*((reg32_t *)0x40008014)) +#define SSI0_RIS_R (*((reg32_t *)0x40008018)) +#define SSI0_MIS_R (*((reg32_t *)0x4000801C)) +#define SSI0_ICR_R (*((reg32_t *)0x40008020)) +/*\}*/ + +/** + * SSI registers (SSI1) + */ +/*\{*/ +#define SSI1_CR0_R (*((reg32_t *)0x40009000)) +#define SSI1_CR1_R (*((reg32_t *)0x40009004)) +#define SSI1_DR_R (*((reg32_t *)0x40009008)) +#define SSI1_SR_R (*((reg32_t *)0x4000900C)) +#define SSI1_CPSR_R (*((reg32_t *)0x40009010)) +#define SSI1_IM_R (*((reg32_t *)0x40009014)) +#define SSI1_RIS_R (*((reg32_t *)0x40009018)) +#define SSI1_MIS_R (*((reg32_t *)0x4000901C)) +#define SSI1_ICR_R (*((reg32_t *)0x40009020)) +/*\}*/ + +/** + * UART registers (UART0) + */ +/*\{*/ +#define UART0_DR_R (*((reg32_t *)0x4000C000)) +#define UART0_RSR_R (*((reg32_t *)0x4000C004)) +#define UART0_ECR_R (*((reg32_t *)0x4000C004)) +#define UART0_FR_R (*((reg32_t *)0x4000C018)) +#define UART0_ILPR_R (*((reg32_t *)0x4000C020)) +#define UART0_IBRD_R (*((reg32_t *)0x4000C024)) +#define UART0_FBRD_R (*((reg32_t *)0x4000C028)) +#define UART0_LCRH_R (*((reg32_t *)0x4000C02C)) +#define UART0_CTL_R (*((reg32_t *)0x4000C030)) +#define UART0_IFLS_R (*((reg32_t *)0x4000C034)) +#define UART0_IM_R (*((reg32_t *)0x4000C038)) +#define UART0_RIS_R (*((reg32_t *)0x4000C03C)) +#define UART0_MIS_R (*((reg32_t *)0x4000C040)) +#define UART0_ICR_R (*((reg32_t *)0x4000C044)) +/*\}*/ + +/** + * UART registers (UART1) + */ +/*\{*/ +#define UART1_DR_R (*((reg32_t *)0x4000D000)) +#define UART1_RSR_R (*((reg32_t *)0x4000D004)) +#define UART1_ECR_R (*((reg32_t *)0x4000D004)) +#define UART1_FR_R (*((reg32_t *)0x4000D018)) +#define UART1_ILPR_R (*((reg32_t *)0x4000D020)) +#define UART1_IBRD_R (*((reg32_t *)0x4000D024)) +#define UART1_FBRD_R (*((reg32_t *)0x4000D028)) +#define UART1_LCRH_R (*((reg32_t *)0x4000D02C)) +#define UART1_CTL_R (*((reg32_t *)0x4000D030)) +#define UART1_IFLS_R (*((reg32_t *)0x4000D034)) +#define UART1_IM_R (*((reg32_t *)0x4000D038)) +#define UART1_RIS_R (*((reg32_t *)0x4000D03C)) +#define UART1_MIS_R (*((reg32_t *)0x4000D040)) +#define UART1_ICR_R (*((reg32_t *)0x4000D044)) +/*\}*/ + +/** + * UART registers (UART2) + */ +/*\{*/ +#define UART2_DR_R (*((reg32_t *)0x4000E000)) +#define UART2_RSR_R (*((reg32_t *)0x4000E004)) +#define UART2_ECR_R (*((reg32_t *)0x4000E004)) +#define UART2_FR_R (*((reg32_t *)0x4000E018)) +#define UART2_ILPR_R (*((reg32_t *)0x4000E020)) +#define UART2_IBRD_R (*((reg32_t *)0x4000E024)) +#define UART2_FBRD_R (*((reg32_t *)0x4000E028)) +#define UART2_LCRH_R (*((reg32_t *)0x4000E02C)) +#define UART2_CTL_R (*((reg32_t *)0x4000E030)) +#define UART2_IFLS_R (*((reg32_t *)0x4000E034)) +#define UART2_IM_R (*((reg32_t *)0x4000E038)) +#define UART2_RIS_R (*((reg32_t *)0x4000E03C)) +#define UART2_MIS_R (*((reg32_t *)0x4000E040)) +#define UART2_ICR_R (*((reg32_t *)0x4000E044)) +/*\}*/ + +/** + * I2C registers (I2C0 MASTER) + */ +/*\{*/ +#define I2C0_MASTER_MSA_R (*((reg32_t *)0x40020000)) +#define I2C0_MASTER_SOAR_R (*((reg32_t *)0x40020000)) +#define I2C0_MASTER_SCSR_R (*((reg32_t *)0x40020004)) +#define I2C0_MASTER_MCS_R (*((reg32_t *)0x40020004)) +#define I2C0_MASTER_SDR_R (*((reg32_t *)0x40020008)) +#define I2C0_MASTER_MDR_R (*((reg32_t *)0x40020008)) +#define I2C0_MASTER_MTPR_R (*((reg32_t *)0x4002000C)) +#define I2C0_MASTER_SIMR_R (*((reg32_t *)0x4002000C)) +#define I2C0_MASTER_SRIS_R (*((reg32_t *)0x40020010)) +#define I2C0_MASTER_MIMR_R (*((reg32_t *)0x40020010)) +#define I2C0_MASTER_MRIS_R (*((reg32_t *)0x40020014)) +#define I2C0_MASTER_SMIS_R (*((reg32_t *)0x40020014)) +#define I2C0_MASTER_SICR_R (*((reg32_t *)0x40020018)) +#define I2C0_MASTER_MMIS_R (*((reg32_t *)0x40020018)) +#define I2C0_MASTER_MICR_R (*((reg32_t *)0x4002001C)) +#define I2C0_MASTER_MCR_R (*((reg32_t *)0x40020020)) +/*\}*/ + +/** + * I2C registers (I2C0 SLAVE) + */ +/*\{*/ +#define I2C0_SLAVE_MSA_R (*((reg32_t *)0x40020800)) +#define I2C0_SLAVE_SOAR_R (*((reg32_t *)0x40020800)) +#define I2C0_SLAVE_SCSR_R (*((reg32_t *)0x40020804)) +#define I2C0_SLAVE_MCS_R (*((reg32_t *)0x40020804)) +#define I2C0_SLAVE_SDR_R (*((reg32_t *)0x40020808)) +#define I2C0_SLAVE_MDR_R (*((reg32_t *)0x40020808)) +#define I2C0_SLAVE_MTPR_R (*((reg32_t *)0x4002080C)) +#define I2C0_SLAVE_SIMR_R (*((reg32_t *)0x4002080C)) +#define I2C0_SLAVE_SRIS_R (*((reg32_t *)0x40020810)) +#define I2C0_SLAVE_MIMR_R (*((reg32_t *)0x40020810)) +#define I2C0_SLAVE_MRIS_R (*((reg32_t *)0x40020814)) +#define I2C0_SLAVE_SMIS_R (*((reg32_t *)0x40020814)) +#define I2C0_SLAVE_SICR_R (*((reg32_t *)0x40020818)) +#define I2C0_SLAVE_MMIS_R (*((reg32_t *)0x40020818)) +#define I2C0_SLAVE_MICR_R (*((reg32_t *)0x4002081C)) +#define I2C0_SLAVE_MCR_R (*((reg32_t *)0x40020820)) +/*\}*/ + +/** + * I2C registers (I2C1 MASTER) + */ +/*\{*/ +#define I2C1_MASTER_MSA_R (*((reg32_t *)0x40021000)) +#define I2C1_MASTER_SOAR_R (*((reg32_t *)0x40021000)) +#define I2C1_MASTER_SCSR_R (*((reg32_t *)0x40021004)) +#define I2C1_MASTER_MCS_R (*((reg32_t *)0x40021004)) +#define I2C1_MASTER_SDR_R (*((reg32_t *)0x40021008)) +#define I2C1_MASTER_MDR_R (*((reg32_t *)0x40021008)) +#define I2C1_MASTER_MTPR_R (*((reg32_t *)0x4002100C)) +#define I2C1_MASTER_SIMR_R (*((reg32_t *)0x4002100C)) +#define I2C1_MASTER_SRIS_R (*((reg32_t *)0x40021010)) +#define I2C1_MASTER_MIMR_R (*((reg32_t *)0x40021010)) +#define I2C1_MASTER_MRIS_R (*((reg32_t *)0x40021014)) +#define I2C1_MASTER_SMIS_R (*((reg32_t *)0x40021014)) +#define I2C1_MASTER_SICR_R (*((reg32_t *)0x40021018)) +#define I2C1_MASTER_MMIS_R (*((reg32_t *)0x40021018)) +#define I2C1_MASTER_MICR_R (*((reg32_t *)0x4002101C)) +#define I2C1_MASTER_MCR_R (*((reg32_t *)0x40021020)) +/*\}*/ + +/** + * I2C registers (I2C1 SLAVE) + */ +/*\{*/ +#define I2C1_SLAVE_MSA_R (*((reg32_t *)0x40021800)) +#define I2C1_SLAVE_SOAR_R (*((reg32_t *)0x40021800)) +#define I2C1_SLAVE_SCSR_R (*((reg32_t *)0x40021804)) +#define I2C1_SLAVE_MCS_R (*((reg32_t *)0x40021804)) +#define I2C1_SLAVE_SDR_R (*((reg32_t *)0x40021808)) +#define I2C1_SLAVE_MDR_R (*((reg32_t *)0x40021808)) +#define I2C1_SLAVE_MTPR_R (*((reg32_t *)0x4002180C)) +#define I2C1_SLAVE_SIMR_R (*((reg32_t *)0x4002180C)) +#define I2C1_SLAVE_SRIS_R (*((reg32_t *)0x40021810)) +#define I2C1_SLAVE_MIMR_R (*((reg32_t *)0x40021810)) +#define I2C1_SLAVE_MRIS_R (*((reg32_t *)0x40021814)) +#define I2C1_SLAVE_SMIS_R (*((reg32_t *)0x40021814)) +#define I2C1_SLAVE_SICR_R (*((reg32_t *)0x40021818)) +#define I2C1_SLAVE_MMIS_R (*((reg32_t *)0x40021818)) +#define I2C1_SLAVE_MICR_R (*((reg32_t *)0x4002181C)) +#define I2C1_SLAVE_MCR_R (*((reg32_t *)0x40021820)) +/*\}*/ + +/** + * GPIO registers (PORTE) + */ +/*\{*/ +#define GPIO_PORTE_DATA_BITS_R ((reg32_t *)0x40024000) +#define GPIO_PORTE_DATA_R (*((reg32_t *)0x400243FC)) +#define GPIO_PORTE_DIR_R (*((reg32_t *)0x40024400)) +#define GPIO_PORTE_IS_R (*((reg32_t *)0x40024404)) +#define GPIO_PORTE_IBE_R (*((reg32_t *)0x40024408)) +#define GPIO_PORTE_IEV_R (*((reg32_t *)0x4002440C)) +#define GPIO_PORTE_IM_R (*((reg32_t *)0x40024410)) +#define GPIO_PORTE_RIS_R (*((reg32_t *)0x40024414)) +#define GPIO_PORTE_MIS_R (*((reg32_t *)0x40024418)) +#define GPIO_PORTE_ICR_R (*((reg32_t *)0x4002441C)) +#define GPIO_PORTE_AFSEL_R (*((reg32_t *)0x40024420)) +#define GPIO_PORTE_DR2R_R (*((reg32_t *)0x40024500)) +#define GPIO_PORTE_DR4R_R (*((reg32_t *)0x40024504)) +#define GPIO_PORTE_DR8R_R (*((reg32_t *)0x40024508)) +#define GPIO_PORTE_ODR_R (*((reg32_t *)0x4002450C)) +#define GPIO_PORTE_PUR_R (*((reg32_t *)0x40024510)) +#define GPIO_PORTE_PDR_R (*((reg32_t *)0x40024514)) +#define GPIO_PORTE_SLR_R (*((reg32_t *)0x40024518)) +#define GPIO_PORTE_DEN_R (*((reg32_t *)0x4002451C)) +#define GPIO_PORTE_LOCK_R (*((reg32_t *)0x40024520)) +#define GPIO_PORTE_CR_R (*((reg32_t *)0x40024524)) +/*\}*/ + +/** + * GPIO registers (PORTF) + */ +/*\{*/ +#define GPIO_PORTF_DATA_BITS_R ((reg32_t *)0x40025000) +#define GPIO_PORTF_DATA_R (*((reg32_t *)0x400253FC)) +#define GPIO_PORTF_DIR_R (*((reg32_t *)0x40025400)) +#define GPIO_PORTF_IS_R (*((reg32_t *)0x40025404)) +#define GPIO_PORTF_IBE_R (*((reg32_t *)0x40025408)) +#define GPIO_PORTF_IEV_R (*((reg32_t *)0x4002540C)) +#define GPIO_PORTF_IM_R (*((reg32_t *)0x40025410)) +#define GPIO_PORTF_RIS_R (*((reg32_t *)0x40025414)) +#define GPIO_PORTF_MIS_R (*((reg32_t *)0x40025418)) +#define GPIO_PORTF_ICR_R (*((reg32_t *)0x4002541C)) +#define GPIO_PORTF_AFSEL_R (*((reg32_t *)0x40025420)) +#define GPIO_PORTF_DR2R_R (*((reg32_t *)0x40025500)) +#define GPIO_PORTF_DR4R_R (*((reg32_t *)0x40025504)) +#define GPIO_PORTF_DR8R_R (*((reg32_t *)0x40025508)) +#define GPIO_PORTF_ODR_R (*((reg32_t *)0x4002550C)) +#define GPIO_PORTF_PUR_R (*((reg32_t *)0x40025510)) +#define GPIO_PORTF_PDR_R (*((reg32_t *)0x40025514)) +#define GPIO_PORTF_SLR_R (*((reg32_t *)0x40025518)) +#define GPIO_PORTF_DEN_R (*((reg32_t *)0x4002551C)) +#define GPIO_PORTF_LOCK_R (*((reg32_t *)0x40025520)) +#define GPIO_PORTF_CR_R (*((reg32_t *)0x40025524)) +/*\}*/ + +/** + * GPIO registers (PORTG) + */ +/*\{*/ +#define GPIO_PORTG_DATA_BITS_R ((reg32_t *)0x40026000) +#define GPIO_PORTG_DATA_R (*((reg32_t *)0x400263FC)) +#define GPIO_PORTG_DIR_R (*((reg32_t *)0x40026400)) +#define GPIO_PORTG_IS_R (*((reg32_t *)0x40026404)) +#define GPIO_PORTG_IBE_R (*((reg32_t *)0x40026408)) +#define GPIO_PORTG_IEV_R (*((reg32_t *)0x4002640C)) +#define GPIO_PORTG_IM_R (*((reg32_t *)0x40026410)) +#define GPIO_PORTG_RIS_R (*((reg32_t *)0x40026414)) +#define GPIO_PORTG_MIS_R (*((reg32_t *)0x40026418)) +#define GPIO_PORTG_ICR_R (*((reg32_t *)0x4002641C)) +#define GPIO_PORTG_AFSEL_R (*((reg32_t *)0x40026420)) +#define GPIO_PORTG_DR2R_R (*((reg32_t *)0x40026500)) +#define GPIO_PORTG_DR4R_R (*((reg32_t *)0x40026504)) +#define GPIO_PORTG_DR8R_R (*((reg32_t *)0x40026508)) +#define GPIO_PORTG_ODR_R (*((reg32_t *)0x4002650C)) +#define GPIO_PORTG_PUR_R (*((reg32_t *)0x40026510)) +#define GPIO_PORTG_PDR_R (*((reg32_t *)0x40026514)) +#define GPIO_PORTG_SLR_R (*((reg32_t *)0x40026518)) +#define GPIO_PORTG_DEN_R (*((reg32_t *)0x4002651C)) +#define GPIO_PORTG_LOCK_R (*((reg32_t *)0x40026520)) +#define GPIO_PORTG_CR_R (*((reg32_t *)0x40026524)) +/*\}*/ + +/** + * GPIO registers (PORTH) + */ +/*\{*/ +#define GPIO_PORTH_DATA_BITS_R ((reg32_t *)0x40027000) +#define GPIO_PORTH_DATA_R (*((reg32_t *)0x400273FC)) +#define GPIO_PORTH_DIR_R (*((reg32_t *)0x40027400)) +#define GPIO_PORTH_IS_R (*((reg32_t *)0x40027404)) +#define GPIO_PORTH_IBE_R (*((reg32_t *)0x40027408)) +#define GPIO_PORTH_IEV_R (*((reg32_t *)0x4002740C)) +#define GPIO_PORTH_IM_R (*((reg32_t *)0x40027410)) +#define GPIO_PORTH_RIS_R (*((reg32_t *)0x40027414)) +#define GPIO_PORTH_MIS_R (*((reg32_t *)0x40027418)) +#define GPIO_PORTH_ICR_R (*((reg32_t *)0x4002741C)) +#define GPIO_PORTH_AFSEL_R (*((reg32_t *)0x40027420)) +#define GPIO_PORTH_DR2R_R (*((reg32_t *)0x40027500)) +#define GPIO_PORTH_DR4R_R (*((reg32_t *)0x40027504)) +#define GPIO_PORTH_DR8R_R (*((reg32_t *)0x40027508)) +#define GPIO_PORTH_ODR_R (*((reg32_t *)0x4002750C)) +#define GPIO_PORTH_PUR_R (*((reg32_t *)0x40027510)) +#define GPIO_PORTH_PDR_R (*((reg32_t *)0x40027514)) +#define GPIO_PORTH_SLR_R (*((reg32_t *)0x40027518)) +#define GPIO_PORTH_DEN_R (*((reg32_t *)0x4002751C)) +#define GPIO_PORTH_LOCK_R (*((reg32_t *)0x40027520)) +#define GPIO_PORTH_CR_R (*((reg32_t *)0x40027524)) +/*\}*/ + +/** + * PWM registers (PWM) + */ +/*\{*/ +#define PWM_CTL_R (*((reg32_t *)0x40028000)) +#define PWM_SYNC_R (*((reg32_t *)0x40028004)) +#define PWM_ENABLE_R (*((reg32_t *)0x40028008)) +#define PWM_INVERT_R (*((reg32_t *)0x4002800C)) +#define PWM_FAULT_R (*((reg32_t *)0x40028010)) +#define PWM_INTEN_R (*((reg32_t *)0x40028014)) +#define PWM_RIS_R (*((reg32_t *)0x40028018)) +#define PWM_ISC_R (*((reg32_t *)0x4002801C)) +#define PWM_STATUS_R (*((reg32_t *)0x40028020)) +#define PWM_0_CTL_R (*((reg32_t *)0x40028040)) +#define PWM_0_INTEN_R (*((reg32_t *)0x40028044)) +#define PWM_0_RIS_R (*((reg32_t *)0x40028048)) +#define PWM_0_ISC_R (*((reg32_t *)0x4002804C)) +#define PWM_0_LOAD_R (*((reg32_t *)0x40028050)) +#define PWM_0_COUNT_R (*((reg32_t *)0x40028054)) +#define PWM_0_CMPA_R (*((reg32_t *)0x40028058)) +#define PWM_0_CMPB_R (*((reg32_t *)0x4002805C)) +#define PWM_0_GENA_R (*((reg32_t *)0x40028060)) +#define PWM_0_GENB_R (*((reg32_t *)0x40028064)) +#define PWM_0_DBCTL_R (*((reg32_t *)0x40028068)) +#define PWM_0_DBRISE_R (*((reg32_t *)0x4002806C)) +#define PWM_0_DBFALL_R (*((reg32_t *)0x40028070)) +#define PWM_1_CTL_R (*((reg32_t *)0x40028080)) +#define PWM_1_INTEN_R (*((reg32_t *)0x40028084)) +#define PWM_1_RIS_R (*((reg32_t *)0x40028088)) +#define PWM_1_ISC_R (*((reg32_t *)0x4002808C)) +#define PWM_1_LOAD_R (*((reg32_t *)0x40028090)) +#define PWM_1_COUNT_R (*((reg32_t *)0x40028094)) +#define PWM_1_CMPA_R (*((reg32_t *)0x40028098)) +#define PWM_1_CMPB_R (*((reg32_t *)0x4002809C)) +#define PWM_1_GENA_R (*((reg32_t *)0x400280A0)) +#define PWM_1_GENB_R (*((reg32_t *)0x400280A4)) +#define PWM_1_DBCTL_R (*((reg32_t *)0x400280A8)) +#define PWM_1_DBRISE_R (*((reg32_t *)0x400280AC)) +#define PWM_1_DBFALL_R (*((reg32_t *)0x400280B0)) +#define PWM_2_CTL_R (*((reg32_t *)0x400280C0)) +#define PWM_2_INTEN_R (*((reg32_t *)0x400280C4)) +#define PWM_2_RIS_R (*((reg32_t *)0x400280C8)) +#define PWM_2_ISC_R (*((reg32_t *)0x400280CC)) +#define PWM_2_LOAD_R (*((reg32_t *)0x400280D0)) +#define PWM_2_COUNT_R (*((reg32_t *)0x400280D4)) +#define PWM_2_CMPA_R (*((reg32_t *)0x400280D8)) +#define PWM_2_CMPB_R (*((reg32_t *)0x400280DC)) +#define PWM_2_GENA_R (*((reg32_t *)0x400280E0)) +#define PWM_2_GENB_R (*((reg32_t *)0x400280E4)) +#define PWM_2_DBCTL_R (*((reg32_t *)0x400280E8)) +#define PWM_2_DBRISE_R (*((reg32_t *)0x400280EC)) +#define PWM_2_DBFALL_R (*((reg32_t *)0x400280F0)) +/*\}*/ + +/** + * QEI registers (QEI0) + */ +/*\{*/ +#define QEI0_CTL_R (*((reg32_t *)0x4002C000)) +#define QEI0_STAT_R (*((reg32_t *)0x4002C004)) +#define QEI0_POS_R (*((reg32_t *)0x4002C008)) +#define QEI0_MAXPOS_R (*((reg32_t *)0x4002C00C)) +#define QEI0_LOAD_R (*((reg32_t *)0x4002C010)) +#define QEI0_TIME_R (*((reg32_t *)0x4002C014)) +#define QEI0_COUNT_R (*((reg32_t *)0x4002C018)) +#define QEI0_SPEED_R (*((reg32_t *)0x4002C01C)) +#define QEI0_INTEN_R (*((reg32_t *)0x4002C020)) +#define QEI0_RIS_R (*((reg32_t *)0x4002C024)) +#define QEI0_ISC_R (*((reg32_t *)0x4002C028)) +/*\}*/ + +/** + * QEI registers (QEI1) + */ +/*\{*/ +#define QEI1_CTL_R (*((reg32_t *)0x4002D000)) +#define QEI1_STAT_R (*((reg32_t *)0x4002D004)) +#define QEI1_POS_R (*((reg32_t *)0x4002D008)) +#define QEI1_MAXPOS_R (*((reg32_t *)0x4002D00C)) +#define QEI1_LOAD_R (*((reg32_t *)0x4002D010)) +#define QEI1_TIME_R (*((reg32_t *)0x4002D014)) +#define QEI1_COUNT_R (*((reg32_t *)0x4002D018)) +#define QEI1_SPEED_R (*((reg32_t *)0x4002D01C)) +#define QEI1_INTEN_R (*((reg32_t *)0x4002D020)) +#define QEI1_RIS_R (*((reg32_t *)0x4002D024)) +#define QEI1_ISC_R (*((reg32_t *)0x4002D028)) +/*\}*/ + +/** + * Timer registers (TIMER0) + */ +/*\{*/ +#define TIMER0_CFG_R (*((reg32_t *)0x40030000)) +#define TIMER0_TAMR_R (*((reg32_t *)0x40030004)) +#define TIMER0_TBMR_R (*((reg32_t *)0x40030008)) +#define TIMER0_CTL_R (*((reg32_t *)0x4003000C)) +#define TIMER0_IMR_R (*((reg32_t *)0x40030018)) +#define TIMER0_RIS_R (*((reg32_t *)0x4003001C)) +#define TIMER0_MIS_R (*((reg32_t *)0x40030020)) +#define TIMER0_ICR_R (*((reg32_t *)0x40030024)) +#define TIMER0_TAILR_R (*((reg32_t *)0x40030028)) +#define TIMER0_TBILR_R (*((reg32_t *)0x4003002C)) +#define TIMER0_TAMATCHR_R (*((reg32_t *)0x40030030)) +#define TIMER0_TBMATCHR_R (*((reg32_t *)0x40030034)) +#define TIMER0_TAPR_R (*((reg32_t *)0x40030038)) +#define TIMER0_TBPR_R (*((reg32_t *)0x4003003C)) +#define TIMER0_TAPMR_R (*((reg32_t *)0x40030040)) +#define TIMER0_TBPMR_R (*((reg32_t *)0x40030044)) +#define TIMER0_TAR_R (*((reg32_t *)0x40030048)) +#define TIMER0_TBR_R (*((reg32_t *)0x4003004C)) +/*\}*/ + +/** + * Timer registers (TIMER1) + */ +/*\{*/ +#define TIMER1_CFG_R (*((reg32_t *)0x40031000)) +#define TIMER1_TAMR_R (*((reg32_t *)0x40031004)) +#define TIMER1_TBMR_R (*((reg32_t *)0x40031008)) +#define TIMER1_CTL_R (*((reg32_t *)0x4003100C)) +#define TIMER1_IMR_R (*((reg32_t *)0x40031018)) +#define TIMER1_RIS_R (*((reg32_t *)0x4003101C)) +#define TIMER1_MIS_R (*((reg32_t *)0x40031020)) +#define TIMER1_ICR_R (*((reg32_t *)0x40031024)) +#define TIMER1_TAILR_R (*((reg32_t *)0x40031028)) +#define TIMER1_TBILR_R (*((reg32_t *)0x4003102C)) +#define TIMER1_TAMATCHR_R (*((reg32_t *)0x40031030)) +#define TIMER1_TBMATCHR_R (*((reg32_t *)0x40031034)) +#define TIMER1_TAPR_R (*((reg32_t *)0x40031038)) +#define TIMER1_TBPR_R (*((reg32_t *)0x4003103C)) +#define TIMER1_TAPMR_R (*((reg32_t *)0x40031040)) +#define TIMER1_TBPMR_R (*((reg32_t *)0x40031044)) +#define TIMER1_TAR_R (*((reg32_t *)0x40031048)) +#define TIMER1_TBR_R (*((reg32_t *)0x4003104C)) +/*\}*/ + +/** + * Timer registers (TIMER2) + */ +/*\{*/ +#define TIMER2_CFG_R (*((reg32_t *)0x40032000)) +#define TIMER2_TAMR_R (*((reg32_t *)0x40032004)) +#define TIMER2_TBMR_R (*((reg32_t *)0x40032008)) +#define TIMER2_CTL_R (*((reg32_t *)0x4003200C)) +#define TIMER2_IMR_R (*((reg32_t *)0x40032018)) +#define TIMER2_RIS_R (*((reg32_t *)0x4003201C)) +#define TIMER2_MIS_R (*((reg32_t *)0x40032020)) +#define TIMER2_ICR_R (*((reg32_t *)0x40032024)) +#define TIMER2_TAILR_R (*((reg32_t *)0x40032028)) +#define TIMER2_TBILR_R (*((reg32_t *)0x4003202C)) +#define TIMER2_TAMATCHR_R (*((reg32_t *)0x40032030)) +#define TIMER2_TBMATCHR_R (*((reg32_t *)0x40032034)) +#define TIMER2_TAPR_R (*((reg32_t *)0x40032038)) +#define TIMER2_TBPR_R (*((reg32_t *)0x4003203C)) +#define TIMER2_TAPMR_R (*((reg32_t *)0x40032040)) +#define TIMER2_TBPMR_R (*((reg32_t *)0x40032044)) +#define TIMER2_TAR_R (*((reg32_t *)0x40032048)) +#define TIMER2_TBR_R (*((reg32_t *)0x4003204C)) +/*\}*/ + +/** + * Timer registers (TIMER3) + */ +/*\{*/ +#define TIMER3_CFG_R (*((reg32_t *)0x40033000)) +#define TIMER3_TAMR_R (*((reg32_t *)0x40033004)) +#define TIMER3_TBMR_R (*((reg32_t *)0x40033008)) +#define TIMER3_CTL_R (*((reg32_t *)0x4003300C)) +#define TIMER3_IMR_R (*((reg32_t *)0x40033018)) +#define TIMER3_RIS_R (*((reg32_t *)0x4003301C)) +#define TIMER3_MIS_R (*((reg32_t *)0x40033020)) +#define TIMER3_ICR_R (*((reg32_t *)0x40033024)) +#define TIMER3_TAILR_R (*((reg32_t *)0x40033028)) +#define TIMER3_TBILR_R (*((reg32_t *)0x4003302C)) +#define TIMER3_TAMATCHR_R (*((reg32_t *)0x40033030)) +#define TIMER3_TBMATCHR_R (*((reg32_t *)0x40033034)) +#define TIMER3_TAPR_R (*((reg32_t *)0x40033038)) +#define TIMER3_TBPR_R (*((reg32_t *)0x4003303C)) +#define TIMER3_TAPMR_R (*((reg32_t *)0x40033040)) +#define TIMER3_TBPMR_R (*((reg32_t *)0x40033044)) +#define TIMER3_TAR_R (*((reg32_t *)0x40033048)) +#define TIMER3_TBR_R (*((reg32_t *)0x4003304C)) +/*\}*/ + +/** + * ADC registers (ADC0) + */ +/*\{*/ +#define ADC0_ACTSS_R (*((reg32_t *)0x40038000)) +#define ADC0_RIS_R (*((reg32_t *)0x40038004)) +#define ADC0_IM_R (*((reg32_t *)0x40038008)) +#define ADC0_ISC_R (*((reg32_t *)0x4003800C)) +#define ADC0_OSTAT_R (*((reg32_t *)0x40038010)) +#define ADC0_EMUX_R (*((reg32_t *)0x40038014)) +#define ADC0_USTAT_R (*((reg32_t *)0x40038018)) +#define ADC0_SSPRI_R (*((reg32_t *)0x40038020)) +#define ADC0_PSSI_R (*((reg32_t *)0x40038028)) +#define ADC0_SAC_R (*((reg32_t *)0x40038030)) +#define ADC0_SSMUX0_R (*((reg32_t *)0x40038040)) +#define ADC0_SSCTL0_R (*((reg32_t *)0x40038044)) +#define ADC0_SSFIFO0_R (*((reg32_t *)0x40038048)) +#define ADC0_SSFSTAT0_R (*((reg32_t *)0x4003804C)) +#define ADC0_SSMUX1_R (*((reg32_t *)0x40038060)) +#define ADC0_SSCTL1_R (*((reg32_t *)0x40038064)) +#define ADC0_SSFIFO1_R (*((reg32_t *)0x40038068)) +#define ADC0_SSFSTAT1_R (*((reg32_t *)0x4003806C)) +#define ADC0_SSMUX2_R (*((reg32_t *)0x40038080)) +#define ADC0_SSCTL2_R (*((reg32_t *)0x40038084)) +#define ADC0_SSFIFO2_R (*((reg32_t *)0x40038088)) +#define ADC0_SSFSTAT2_R (*((reg32_t *)0x4003808C)) +#define ADC0_SSMUX3_R (*((reg32_t *)0x400380A0)) +#define ADC0_SSCTL3_R (*((reg32_t *)0x400380A4)) +#define ADC0_SSFIFO3_R (*((reg32_t *)0x400380A8)) +#define ADC0_SSFSTAT3_R (*((reg32_t *)0x400380AC)) +#define ADC0_TMLB_R (*((reg32_t *)0x40038100)) +/*\}*/ + +/** + * Comparator registers (COMP) + */ +/*\{*/ +#define COMP_ACMIS_R (*((reg32_t *)0x4003C000)) +#define COMP_ACRIS_R (*((reg32_t *)0x4003C004)) +#define COMP_ACINTEN_R (*((reg32_t *)0x4003C008)) +#define COMP_ACREFCTL_R (*((reg32_t *)0x4003C010)) +#define COMP_ACSTAT0_R (*((reg32_t *)0x4003C020)) +#define COMP_ACCTL0_R (*((reg32_t *)0x4003C024)) +#define COMP_ACSTAT1_R (*((reg32_t *)0x4003C040)) +#define COMP_ACCTL1_R (*((reg32_t *)0x4003C044)) +#define COMP_ACSTAT2_R (*((reg32_t *)0x4003C060)) +#define COMP_ACCTL2_R (*((reg32_t *)0x4003C064)) +/*\}*/ + +/** + * Hibernation module registers (HIB) + */ +/*\{*/ +#define HIB_RTCC_R (*((reg32_t *)0x400FC000)) +#define HIB_RTCM0_R (*((reg32_t *)0x400FC004)) +#define HIB_RTCM1_R (*((reg32_t *)0x400FC008)) +#define HIB_RTCLD_R (*((reg32_t *)0x400FC00C)) +#define HIB_CTL_R (*((reg32_t *)0x400FC010)) +#define HIB_IM_R (*((reg32_t *)0x400FC014)) +#define HIB_RIS_R (*((reg32_t *)0x400FC018)) +#define HIB_MIS_R (*((reg32_t *)0x400FC01C)) +#define HIB_IC_R (*((reg32_t *)0x400FC020)) +#define HIB_RTCT_R (*((reg32_t *)0x400FC024)) +#define HIB_DATA_R (*((reg32_t *)0x400FC030)) +/*\}*/ + +/** + * FLASH registers (FLASH CTRL) + */ +/*\{*/ +#define FLASH_FMA_R (*((reg32_t *)0x400FD000)) +#define FLASH_FMD_R (*((reg32_t *)0x400FD004)) +#define FLASH_FMC_R (*((reg32_t *)0x400FD008)) +#define FLASH_FCRIS_R (*((reg32_t *)0x400FD00C)) +#define FLASH_FCIM_R (*((reg32_t *)0x400FD010)) +#define FLASH_FCMISC_R (*((reg32_t *)0x400FD014)) +#define FLASH_USECRL_R (*((reg32_t *)0x400FE140)) +#define FLASH_USERDBG_R (*((reg32_t *)0x400FE1D0)) +#define FLASH_USERREG0_R (*((reg32_t *)0x400FE1E0)) +#define FLASH_USERREG1_R (*((reg32_t *)0x400FE1E4)) +#define FLASH_FMPRE0_R (*((reg32_t *)0x400FE200)) +#define FLASH_FMPRE1_R (*((reg32_t *)0x400FE204)) +#define FLASH_FMPRE2_R (*((reg32_t *)0x400FE208)) +#define FLASH_FMPRE3_R (*((reg32_t *)0x400FE20C)) +#define FLASH_FMPPE0_R (*((reg32_t *)0x400FE400)) +#define FLASH_FMPPE1_R (*((reg32_t *)0x400FE404)) +#define FLASH_FMPPE2_R (*((reg32_t *)0x400FE408)) +#define FLASH_FMPPE3_R (*((reg32_t *)0x400FE40C)) +/*\}*/ + +/** + * System Control registers (SYSCTL) + */ +/*\{*/ +#define SYSCTL_DID0_R (*((reg32_t *)0x400FE000)) +#define SYSCTL_DID1_R (*((reg32_t *)0x400FE004)) +#define SYSCTL_DC0_R (*((reg32_t *)0x400FE008)) +#define SYSCTL_DC1_R (*((reg32_t *)0x400FE010)) +#define SYSCTL_DC2_R (*((reg32_t *)0x400FE014)) +#define SYSCTL_DC3_R (*((reg32_t *)0x400FE018)) +#define SYSCTL_DC4_R (*((reg32_t *)0x400FE01C)) +#define SYSCTL_PBORCTL_R (*((reg32_t *)0x400FE030)) +#define SYSCTL_LDOPCTL_R (*((reg32_t *)0x400FE034)) +#define SYSCTL_SRCR0_R (*((reg32_t *)0x400FE040)) +#define SYSCTL_SRCR1_R (*((reg32_t *)0x400FE044)) +#define SYSCTL_SRCR2_R (*((reg32_t *)0x400FE048)) +#define SYSCTL_RIS_R (*((reg32_t *)0x400FE050)) +#define SYSCTL_IMC_R (*((reg32_t *)0x400FE054)) +#define SYSCTL_MISC_R (*((reg32_t *)0x400FE058)) +#define SYSCTL_RESC_R (*((reg32_t *)0x400FE05C)) +#define SYSCTL_RCC_R (*((reg32_t *)0x400FE060)) +#define SYSCTL_PLLCFG_R (*((reg32_t *)0x400FE064)) +#define SYSCTL_RCC2_R (*((reg32_t *)0x400FE070)) +#define SYSCTL_RCGC0_R (*((reg32_t *)0x400FE100)) +#define SYSCTL_RCGC1_R (*((reg32_t *)0x400FE104)) +#define SYSCTL_RCGC2_R (*((reg32_t *)0x400FE108)) +#define SYSCTL_SCGC0_R (*((reg32_t *)0x400FE110)) +#define SYSCTL_SCGC1_R (*((reg32_t *)0x400FE114)) +#define SYSCTL_SCGC2_R (*((reg32_t *)0x400FE118)) +#define SYSCTL_DCGC0_R (*((reg32_t *)0x400FE120)) +#define SYSCTL_DCGC1_R (*((reg32_t *)0x400FE124)) +#define SYSCTL_DCGC2_R (*((reg32_t *)0x400FE128)) +#define SYSCTL_DSLPCLKCFG_R (*((reg32_t *)0x400FE144)) +/*\}*/ + +/** + * NVIC registers (NVIC) + */ +/*\{*/ +#define NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004)) +#define NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010)) +#define NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014)) +#define NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018)) +#define NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C)) +#define NVIC_EN0_R (*((reg32_t *)0xE000E100)) +#define NVIC_EN1_R (*((reg32_t *)0xE000E104)) +#define NVIC_DIS0_R (*((reg32_t *)0xE000E180)) +#define NVIC_DIS1_R (*((reg32_t *)0xE000E184)) +#define NVIC_PEND0_R (*((reg32_t *)0xE000E200)) +#define NVIC_PEND1_R (*((reg32_t *)0xE000E204)) +#define NVIC_UNPEND0_R (*((reg32_t *)0xE000E280)) +#define NVIC_UNPEND1_R (*((reg32_t *)0xE000E284)) +#define NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300)) +#define NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304)) +#define NVIC_PRI0_R (*((reg32_t *)0xE000E400)) +#define NVIC_PRI1_R (*((reg32_t *)0xE000E404)) +#define NVIC_PRI2_R (*((reg32_t *)0xE000E408)) +#define NVIC_PRI3_R (*((reg32_t *)0xE000E40C)) +#define NVIC_PRI4_R (*((reg32_t *)0xE000E410)) +#define NVIC_PRI5_R (*((reg32_t *)0xE000E414)) +#define NVIC_PRI6_R (*((reg32_t *)0xE000E418)) +#define NVIC_PRI7_R (*((reg32_t *)0xE000E41C)) +#define NVIC_PRI8_R (*((reg32_t *)0xE000E420)) +#define NVIC_PRI9_R (*((reg32_t *)0xE000E424)) +#define NVIC_PRI10_R (*((reg32_t *)0xE000E428)) +#define NVIC_CPUID_R (*((reg32_t *)0xE000ED00)) +#define NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04)) +#define NVIC_VTABLE_R (*((reg32_t *)0xE000ED08)) +#define NVIC_APINT_R (*((reg32_t *)0xE000ED0C)) +#define NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10)) +#define NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14)) +#define NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18)) +#define NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C)) +#define NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20)) +#define NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24)) +#define NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28)) +#define NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C)) +#define NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30)) +#define NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34)) +#define NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38)) +#define NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90)) +#define NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94)) +#define NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98)) +#define NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C)) +#define NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0)) +#define NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0)) +#define NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4)) +#define NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8)) +#define NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC)) +#define NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00)) +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_LOAD register. + */ +/*\{*/ +#define WDT_LOAD_M 0xFFFFFFFF ///< Watchdog Load Value +#define WDT_LOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_VALUE register. + */ +/*\{*/ +#define WDT_VALUE_M 0xFFFFFFFF ///< Watchdog Value +#define WDT_VALUE_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_CTL register. + */ +/*\{*/ +#define WDT_CTL_RESEN 0x00000002 ///< Watchdog Reset Enable +#define WDT_CTL_INTEN 0x00000001 ///< Watchdog Interrupt Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_ICR register. + */ +/*\{*/ +#define WDT_ICR_M 0xFFFFFFFF ///< Watchdog Interrupt Clear +#define WDT_ICR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_RIS register. + */ +/*\{*/ +#define WDT_RIS_WDTRIS 0x00000001 ///< Watchdog Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_MIS register. + */ +/*\{*/ +#define WDT_MIS_WDTMIS 0x00000001 ///< Watchdog Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_TEST register. + */ +/*\{*/ +#define WDT_TEST_STALL 0x00000100 ///< Watchdog Stall Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_LOCK register. + */ +/*\{*/ +#define WDT_LOCK_M 0xFFFFFFFF ///< Watchdog Lock +#define WDT_LOCK_UNLOCKED 0x00000000 ///< Unlocked +#define WDT_LOCK_LOCKED 0x00000001 ///< Locked +#define WDT_LOCK_UNLOCK 0x1ACCE551 ///< Unlocks the watchdog timer +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_O_LOCK register. + */ +/*\{*/ +#define GPIO_LOCK_M 0xFFFFFFFF ///< GPIO Lock +#define GPIO_LOCK_UNLOCKED 0x00000000 ///< The GPIOCR register is unlocked + ///< and may be modified +#define GPIO_LOCK_LOCKED 0x00000001 ///< The GPIOCR register is locked + ///< and may not be modified +#define GPIO_LOCK_KEY 0x1ACCE551 ///< Unlocks the GPIO_CR register +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR0 register. + */ +/*\{*/ +#define SSI_CR0_SCR_M 0x0000FF00 ///< SSI Serial Clock Rate +#define SSI_CR0_SPH 0x00000080 ///< SSI Serial Clock Phase +#define SSI_CR0_SPO 0x00000040 ///< SSI Serial Clock Polarity +#define SSI_CR0_FRF_M 0x00000030 ///< SSI Frame Format Select +#define SSI_CR0_FRF_MOTO 0x00000000 ///< Freescale SPI Frame Format +#define SSI_CR0_FRF_TI 0x00000010 ///< Texas Instruments Synchronous + ///< Serial Frame Format +#define SSI_CR0_FRF_NMW 0x00000020 ///< MICROWIRE Frame Format +#define SSI_CR0_DSS_M 0x0000000F ///< SSI Data Size Select +#define SSI_CR0_DSS_4 0x00000003 ///< 4-bit data +#define SSI_CR0_DSS_5 0x00000004 ///< 5-bit data +#define SSI_CR0_DSS_6 0x00000005 ///< 6-bit data +#define SSI_CR0_DSS_7 0x00000006 ///< 7-bit data +#define SSI_CR0_DSS_8 0x00000007 ///< 8-bit data +#define SSI_CR0_DSS_9 0x00000008 ///< 9-bit data +#define SSI_CR0_DSS_10 0x00000009 ///< 10-bit data +#define SSI_CR0_DSS_11 0x0000000A ///< 11-bit data +#define SSI_CR0_DSS_12 0x0000000B ///< 12-bit data +#define SSI_CR0_DSS_13 0x0000000C ///< 13-bit data +#define SSI_CR0_DSS_14 0x0000000D ///< 14-bit data +#define SSI_CR0_DSS_15 0x0000000E ///< 15-bit data +#define SSI_CR0_DSS_16 0x0000000F ///< 16-bit data +#define SSI_CR0_SCR_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR1 register. + */ +/*\{*/ +#define SSI_CR1_SOD 0x00000008 ///< SSI Slave Mode Output Disable +#define SSI_CR1_MS 0x00000004 ///< SSI Master/Slave Select +#define SSI_CR1_SSE 0x00000002 ///< SSI Synchronous Serial Port + ///< Enable +#define SSI_CR1_LBM 0x00000001 ///< SSI Loopback Mode +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_DR register. + */ +/*\{*/ +#define SSI_DR_DATA_M 0x0000FFFF ///< SSI Receive/Transmit Data +#define SSI_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_SR register. + */ +/*\{*/ +#define SSI_SR_BSY 0x00000010 ///< SSI Busy Bit +#define SSI_SR_RFF 0x00000008 ///< SSI Receive FIFO Full +#define SSI_SR_RNE 0x00000004 ///< SSI Receive FIFO Not Empty +#define SSI_SR_TNF 0x00000002 ///< SSI Transmit FIFO Not Full +#define SSI_SR_TFE 0x00000001 ///< SSI Transmit FIFO Empty +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CPSR register. + */ +/*\{*/ +#define SSI_CPSR_CPSDVSR_M 0x000000FF ///< SSI Clock Prescale Divisor +#define SSI_CPSR_CPSDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_IM register. + */ +/*\{*/ +#define SSI_IM_TXIM 0x00000008 ///< SSI Transmit FIFO Interrupt Mask +#define SSI_IM_RXIM 0x00000004 ///< SSI Receive FIFO Interrupt Mask +#define SSI_IM_RTIM 0x00000002 ///< SSI Receive Time-Out Interrupt + ///< Mask +#define SSI_IM_RORIM 0x00000001 ///< SSI Receive Overrun Interrupt + ///< Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_RIS register. + */ +/*\{*/ +#define SSI_RIS_TXRIS 0x00000008 ///< SSI Transmit FIFO Raw Interrupt + ///< Status +#define SSI_RIS_RXRIS 0x00000004 ///< SSI Receive FIFO Raw Interrupt + ///< Status +#define SSI_RIS_RTRIS 0x00000002 ///< SSI Receive Time-Out Raw + ///< Interrupt Status +#define SSI_RIS_RORRIS 0x00000001 ///< SSI Receive Overrun Raw + ///< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_MIS register. + */ +/*\{*/ +#define SSI_MIS_TXMIS 0x00000008 ///< SSI Transmit FIFO Masked + ///< Interrupt Status +#define SSI_MIS_RXMIS 0x00000004 ///< SSI Receive FIFO Masked + ///< Interrupt Status +#define SSI_MIS_RTMIS 0x00000002 ///< SSI Receive Time-Out Masked + ///< Interrupt Status +#define SSI_MIS_RORMIS 0x00000001 ///< SSI Receive Overrun Masked + ///< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_ICR register. + */ +/*\{*/ +#define SSI_ICR_RTIC 0x00000002 ///< SSI Receive Time-Out Interrupt + ///< Clear +#define SSI_ICR_RORIC 0x00000001 ///< SSI Receive Overrun Interrupt + ///< Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_DR register. + */ +/*\{*/ +#define UART_DR_OE 0x00000800 ///< UART Overrun Error +#define UART_DR_BE 0x00000400 ///< UART Break Error +#define UART_DR_PE 0x00000200 ///< UART Parity Error +#define UART_DR_FE 0x00000100 ///< UART Framing Error +#define UART_DR_DATA_M 0x000000FF ///< Data Transmitted or Received +#define UART_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RSR register. + */ +/*\{*/ +#define UART_RSR_OE 0x00000008 ///< UART Overrun Error +#define UART_RSR_BE 0x00000004 ///< UART Break Error +#define UART_RSR_PE 0x00000002 ///< UART Parity Error +#define UART_RSR_FE 0x00000001 ///< UART Framing Error +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ECR register. + */ +/*\{*/ +#define UART_ECR_DATA_M 0x000000FF ///< Error Clear +#define UART_ECR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FR register. + */ +/*\{*/ +#define UART_FR_TXFE 0x00000080 ///< UART Transmit FIFO Empty +#define UART_FR_RXFF 0x00000040 ///< UART Receive FIFO Full +#define UART_FR_TXFF 0x00000020 ///< UART Transmit FIFO Full +#define UART_FR_RXFE 0x00000010 ///< UART Receive FIFO Empty +#define UART_FR_BUSY 0x00000008 ///< UART Busy +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ILPR register. + */ +/*\{*/ +#define UART_ILPR_ILPDVSR_M 0x000000FF ///< IrDA Low-Power Divisor +#define UART_ILPR_ILPDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IBRD register. + */ +/*\{*/ +#define UART_IBRD_DIVINT_M 0x0000FFFF ///< Integer Baud-Rate Divisor +#define UART_IBRD_DIVINT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FBRD register. + */ +/*\{*/ +#define UART_FBRD_DIVFRAC_M 0x0000003F ///< Fractional Baud-Rate Divisor +#define UART_FBRD_DIVFRAC_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LCRH register. + */ +/*\{*/ +#define UART_LCRH_SPS 0x00000080 ///< UART Stick Parity Select +#define UART_LCRH_WLEN_M 0x00000060 ///< UART Word Length +#define UART_LCRH_WLEN_5 0x00000000 ///< 5 bits (default) +#define UART_LCRH_WLEN_6 0x00000020 ///< 6 bits +#define UART_LCRH_WLEN_7 0x00000040 ///< 7 bits +#define UART_LCRH_WLEN_8 0x00000060 ///< 8 bits +#define UART_LCRH_FEN 0x00000010 ///< UART Enable FIFOs +#define UART_LCRH_STP2 0x00000008 ///< UART Two Stop Bits Select +#define UART_LCRH_EPS 0x00000004 ///< UART Even Parity Select +#define UART_LCRH_PEN 0x00000002 ///< UART Parity Enable +#define UART_LCRH_BRK 0x00000001 ///< UART Send Break +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_CTL register. + */ +/*\{*/ +#define UART_CTL_RXE 0x00000200 ///< UART Receive Enable +#define UART_CTL_TXE 0x00000100 ///< UART Transmit Enable +#define UART_CTL_LBE 0x00000080 ///< UART Loop Back Enable +#define UART_CTL_SIRLP 0x00000004 ///< UART SIR Low-Power Mode +#define UART_CTL_SIREN 0x00000002 ///< UART SIR Enable +#define UART_CTL_UARTEN 0x00000001 ///< UART Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IFLS register. + */ +/*\{*/ +#define UART_IFLS_RX_M 0x00000038 ///< UART Receive Interrupt FIFO + ///< Level Select +#define UART_IFLS_RX1_8 0x00000000 ///< RX FIFO >= 1/8 full +#define UART_IFLS_RX2_8 0x00000008 ///< RX FIFO >= 1/4 full +#define UART_IFLS_RX4_8 0x00000010 ///< RX FIFO >= 1/2 full (default) +#define UART_IFLS_RX6_8 0x00000018 ///< RX FIFO >= 3/4 full +#define UART_IFLS_RX7_8 0x00000020 ///< RX FIFO >= 7/8 full +#define UART_IFLS_TX_M 0x00000007 ///< UART Transmit Interrupt FIFO + ///< Level Select +#define UART_IFLS_TX1_8 0x00000000 ///< TX FIFO <= 1/8 full +#define UART_IFLS_TX2_8 0x00000001 ///< TX FIFO <= 1/4 full +#define UART_IFLS_TX4_8 0x00000002 ///< TX FIFO <= 1/2 full (default) +#define UART_IFLS_TX6_8 0x00000003 ///< TX FIFO <= 3/4 full +#define UART_IFLS_TX7_8 0x00000004 ///< TX FIFO <= 7/8 full +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IM register. + */ +/*\{*/ +#define UART_IM_OEIM 0x00000400 ///< UART Overrun Error Interrupt + ///< Mask +#define UART_IM_BEIM 0x00000200 ///< UART Break Error Interrupt Mask +#define UART_IM_PEIM 0x00000100 ///< UART Parity Error Interrupt Mask +#define UART_IM_FEIM 0x00000080 ///< UART Framing Error Interrupt + ///< Mask +#define UART_IM_RTIM 0x00000040 ///< UART Receive Time-Out Interrupt + ///< Mask +#define UART_IM_TXIM 0x00000020 ///< UART Transmit Interrupt Mask +#define UART_IM_RXIM 0x00000010 ///< UART Receive Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RIS register. + */ +/*\{*/ +#define UART_RIS_OERIS 0x00000400 ///< UART Overrun Error Raw Interrupt + ///< Status +#define UART_RIS_BERIS 0x00000200 ///< UART Break Error Raw Interrupt + ///< Status +#define UART_RIS_PERIS 0x00000100 ///< UART Parity Error Raw Interrupt + ///< Status +#define UART_RIS_FERIS 0x00000080 ///< UART Framing Error Raw Interrupt + ///< Status +#define UART_RIS_RTRIS 0x00000040 ///< UART Receive Time-Out Raw + ///< Interrupt Status +#define UART_RIS_TXRIS 0x00000020 ///< UART Transmit Raw Interrupt + ///< Status +#define UART_RIS_RXRIS 0x00000010 ///< UART Receive Raw Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_MIS register. + */ +/*\{*/ +#define UART_MIS_OEMIS 0x00000400 ///< UART Overrun Error Masked + ///< Interrupt Status +#define UART_MIS_BEMIS 0x00000200 ///< UART Break Error Masked + ///< Interrupt Status +#define UART_MIS_PEMIS 0x00000100 ///< UART Parity Error Masked + ///< Interrupt Status +#define UART_MIS_FEMIS 0x00000080 ///< UART Framing Error Masked + ///< Interrupt Status +#define UART_MIS_RTMIS 0x00000040 ///< UART Receive Time-Out Masked + ///< Interrupt Status +#define UART_MIS_TXMIS 0x00000020 ///< UART Transmit Masked Interrupt + ///< Status +#define UART_MIS_RXMIS 0x00000010 ///< UART Receive Masked Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ICR register. + */ +/*\{*/ +#define UART_ICR_OEIC 0x00000400 ///< Overrun Error Interrupt Clear +#define UART_ICR_BEIC 0x00000200 ///< Break Error Interrupt Clear +#define UART_ICR_PEIC 0x00000100 ///< Parity Error Interrupt Clear +#define UART_ICR_FEIC 0x00000080 ///< Framing Error Interrupt Clear +#define UART_ICR_RTIC 0x00000040 ///< Receive Time-Out Interrupt Clear +#define UART_ICR_TXIC 0x00000020 ///< Transmit Interrupt Clear +#define UART_ICR_RXIC 0x00000010 ///< Receive Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MSA register. + */ +/*\{*/ +#define I2C_MSA_SA_M 0x000000FE ///< I2C Slave Address +#define I2C_MSA_RS 0x00000001 ///< Receive not send +#define I2C_MSA_SA_S 1 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SOAR register. + */ +/*\{*/ +#define I2C_SOAR_OAR_M 0x0000007F ///< I2C Slave Own Address +#define I2C_SOAR_OAR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SCSR register. + */ +/*\{*/ +#define I2C_SCSR_FBR 0x00000004 ///< First Byte Received +#define I2C_SCSR_TREQ 0x00000002 ///< Transmit Request +#define I2C_SCSR_DA 0x00000001 ///< Device Active +#define I2C_SCSR_RREQ 0x00000001 ///< Receive Request +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MCS register. + */ +/*\{*/ +#define I2C_MCS_BUSBSY 0x00000040 ///< Bus Busy +#define I2C_MCS_IDLE 0x00000020 ///< I2C Idle +#define I2C_MCS_ARBLST 0x00000010 ///< Arbitration Lost +#define I2C_MCS_ACK 0x00000008 ///< Data Acknowledge Enable +#define I2C_MCS_DATACK 0x00000008 ///< Acknowledge Data +#define I2C_MCS_ADRACK 0x00000004 ///< Acknowledge Address +#define I2C_MCS_STOP 0x00000004 ///< Generate STOP +#define I2C_MCS_START 0x00000002 ///< Generate START +#define I2C_MCS_ERROR 0x00000002 ///< Error +#define I2C_MCS_RUN 0x00000001 ///< I2C Master Enable +#define I2C_MCS_BUSY 0x00000001 ///< I2C Busy +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SDR register. + */ +/*\{*/ +#define I2C_SDR_DATA_M 0x000000FF ///< Data for Transfer +#define I2C_SDR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MDR register. + */ +/*\{*/ +#define I2C_MDR_DATA_M 0x000000FF ///< Data Transferred +#define I2C_MDR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MTPR register. + */ +/*\{*/ +#define I2C_MTPR_TPR_M 0x000000FF ///< SCL Clock Period +#define I2C_MTPR_TPR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SIMR register. + */ +/*\{*/ +#define I2C_SIMR_DATAIM 0x00000001 ///< Data Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SRIS register. + */ +/*\{*/ +#define I2C_SRIS_DATARIS 0x00000001 ///< Data Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MIMR register. + */ +/*\{*/ +#define I2C_MIMR_IM 0x00000001 ///< Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MRIS register. + */ +/*\{*/ +#define I2C_MRIS_RIS 0x00000001 ///< Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SMIS register. + */ +/*\{*/ +#define I2C_SMIS_DATAMIS 0x00000001 ///< Data Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SICR register. + */ +/*\{*/ +#define I2C_SICR_DATAIC 0x00000001 ///< Data Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MMIS register. + */ +/*\{*/ +#define I2C_MMIS_MIS 0x00000001 ///< Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MICR register. + */ +/*\{*/ +#define I2C_MICR_IC 0x00000001 ///< Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MCR register. + */ +/*\{*/ +#define I2C_MCR_SFE 0x00000020 ///< I2C Slave Function Enable +#define I2C_MCR_MFE 0x00000010 ///< I2C Master Function Enable +#define I2C_MCR_LPBK 0x00000001 ///< I2C Loopback +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_CTL register. + */ +/*\{*/ +#define PWM_CTL_GLOBALSYNC2 0x00000004 ///< Update PWM Generator 2 +#define PWM_CTL_GLOBALSYNC1 0x00000002 ///< Update PWM Generator 1 +#define PWM_CTL_GLOBALSYNC0 0x00000001 ///< Update PWM Generator 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_SYNC register. + */ +/*\{*/ +#define PWM_SYNC_SYNC2 0x00000004 ///< Reset Generator 2 Counter +#define PWM_SYNC_SYNC1 0x00000002 ///< Reset Generator 1 Counter +#define PWM_SYNC_SYNC0 0x00000001 ///< Reset Generator 0 Counter +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_ENABLE register. + */ +/*\{*/ +#define PWM_ENABLE_PWM5EN 0x00000020 ///< PWM5 Output Enable +#define PWM_ENABLE_PWM4EN 0x00000010 ///< PWM4 Output Enable +#define PWM_ENABLE_PWM3EN 0x00000008 ///< PWM3 Output Enable +#define PWM_ENABLE_PWM2EN 0x00000004 ///< PWM2 Output Enable +#define PWM_ENABLE_PWM1EN 0x00000002 ///< PWM1 Output Enable +#define PWM_ENABLE_PWM0EN 0x00000001 ///< PWM0 Output Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_INVERT register. + */ +/*\{*/ +#define PWM_INVERT_PWM5INV 0x00000020 ///< Invert PWM5 Signal +#define PWM_INVERT_PWM4INV 0x00000010 ///< Invert PWM4 Signal +#define PWM_INVERT_PWM3INV 0x00000008 ///< Invert PWM3 Signal +#define PWM_INVERT_PWM2INV 0x00000004 ///< Invert PWM2 Signal +#define PWM_INVERT_PWM1INV 0x00000002 ///< Invert PWM1 Signal +#define PWM_INVERT_PWM0INV 0x00000001 ///< Invert PWM0 Signal +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_FAULT register. + */ +/*\{*/ +#define PWM_FAULT_FAULT5 0x00000020 ///< PWM5 Fault +#define PWM_FAULT_FAULT4 0x00000010 ///< PWM4 Fault +#define PWM_FAULT_FAULT3 0x00000008 ///< PWM3 Fault +#define PWM_FAULT_FAULT2 0x00000004 ///< PWM2 Fault +#define PWM_FAULT_FAULT1 0x00000002 ///< PWM1 Fault +#define PWM_FAULT_FAULT0 0x00000001 ///< PWM0 Fault +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_INTEN register. + */ +/*\{*/ +#define PWM_INTEN_INTFAULT 0x00010000 ///< Fault Interrupt Enable +#define PWM_INTEN_INTPWM2 0x00000004 ///< PWM2 Interrupt Enable +#define PWM_INTEN_INTPWM1 0x00000002 ///< PWM1 Interrupt Enable +#define PWM_INTEN_INTPWM0 0x00000001 ///< PWM0 Interrupt Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_RIS register. + */ +/*\{*/ +#define PWM_RIS_INTFAULT 0x00010000 ///< Fault Interrupt Asserted +#define PWM_RIS_INTPWM2 0x00000004 ///< PWM2 Interrupt Asserted +#define PWM_RIS_INTPWM1 0x00000002 ///< PWM1 Interrupt Asserted +#define PWM_RIS_INTPWM0 0x00000001 ///< PWM0 Interrupt Asserted +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_ISC register. + */ +/*\{*/ +#define PWM_ISC_INTFAULT 0x00010000 ///< Fault Interrupt Asserted +#define PWM_ISC_INTPWM2 0x00000004 ///< PWM2 Interrupt Status +#define PWM_ISC_INTPWM1 0x00000002 ///< PWM1 Interrupt Status +#define PWM_ISC_INTPWM0 0x00000001 ///< PWM0 Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_STATUS register. + */ +/*\{*/ +#define PWM_STATUS_FAULT 0x00000001 ///< Fault Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_CTL register. + */ +/*\{*/ +#define PWM_X_CTL_CMPBUPD 0x00000020 ///< Comparator B Update Mode +#define PWM_X_CTL_CMPAUPD 0x00000010 ///< Comparator A Update Mode +#define PWM_X_CTL_LOADUPD 0x00000008 ///< Load Register Update Mode +#define PWM_X_CTL_DEBUG 0x00000004 ///< Debug Mode +#define PWM_X_CTL_MODE 0x00000002 ///< Counter Mode +#define PWM_X_CTL_ENABLE 0x00000001 ///< PWM Block Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_INTEN register. + */ +/*\{*/ +#define PWM_X_INTEN_TRCMPBD 0x00002000 ///< Trigger for Counter=PWMnCMPB + ///< Down +#define PWM_X_INTEN_TRCMPBU 0x00001000 ///< Trigger for Counter=PWMnCMPB Up +#define PWM_X_INTEN_TRCMPAD 0x00000800 ///< Trigger for Counter=PWMnCMPA + ///< Down +#define PWM_X_INTEN_TRCMPAU 0x00000400 ///< Trigger for Counter=PWMnCMPA Up +#define PWM_X_INTEN_TRCNTLOAD 0x00000200 ///< Trigger for Counter=PWMnLOAD +#define PWM_X_INTEN_TRCNTZERO 0x00000100 ///< Trigger for Counter=0 +#define PWM_X_INTEN_INTCMPBD 0x00000020 ///< Interrupt for Counter=PWMnCMPB + ///< Down +#define PWM_X_INTEN_INTCMPBU 0x00000010 ///< Interrupt for Counter=PWMnCMPB + ///< Up +#define PWM_X_INTEN_INTCMPAD 0x00000008 ///< Interrupt for Counter=PWMnCMPA + ///< Down +#define PWM_X_INTEN_INTCMPAU 0x00000004 ///< Interrupt for Counter=PWMnCMPA + ///< Up +#define PWM_X_INTEN_INTCNTLOAD 0x00000002 ///< Interrupt for Counter=PWMnLOAD +#define PWM_X_INTEN_INTCNTZERO 0x00000001 ///< Interrupt for Counter=0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_RIS register. + */ +/*\{*/ +#define PWM_X_RIS_INTCMPBD 0x00000020 ///< Comparator B Down Interrupt + ///< Status +#define PWM_X_RIS_INTCMPBU 0x00000010 ///< Comparator B Up Interrupt Status +#define PWM_X_RIS_INTCMPAD 0x00000008 ///< Comparator A Down Interrupt + ///< Status +#define PWM_X_RIS_INTCMPAU 0x00000004 ///< Comparator A Up Interrupt Status +#define PWM_X_RIS_INTCNTLOAD 0x00000002 ///< Counter=Load Interrupt Status +#define PWM_X_RIS_INTCNTZERO 0x00000001 ///< Counter=0 Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_ISC register. + */ +/*\{*/ +#define PWM_X_ISC_INTCMPBD 0x00000020 ///< Comparator B Down Interrupt +#define PWM_X_ISC_INTCMPBU 0x00000010 ///< Comparator B Up Interrupt +#define PWM_X_ISC_INTCMPAD 0x00000008 ///< Comparator A Down Interrupt +#define PWM_X_ISC_INTCMPAU 0x00000004 ///< Comparator A Up Interrupt +#define PWM_X_ISC_INTCNTLOAD 0x00000002 ///< Counter=Load Interrupt +#define PWM_X_ISC_INTCNTZERO 0x00000001 ///< Counter=0 Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_LOAD register. + */ +/*\{*/ +#define PWM_X_LOAD_M 0x0000FFFF ///< Counter Load Value +#define PWM_X_LOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_COUNT register. + */ +/*\{*/ +#define PWM_X_COUNT_M 0x0000FFFF ///< Counter Value +#define PWM_X_COUNT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_CMPA register. + */ +/*\{*/ +#define PWM_X_CMPA_M 0x0000FFFF ///< Comparator A Value +#define PWM_X_CMPA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_CMPB register. + */ +/*\{*/ +#define PWM_X_CMPB_M 0x0000FFFF ///< Comparator B Value +#define PWM_X_CMPB_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_GENA register. + */ +/*\{*/ +#define PWM_X_GENA_ACTCMPBD_M 0x00000C00 ///< Action for Comparator B Down +#define PWM_X_GENA_ACTCMPBD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPBD_INV 0x00000400 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPBD_ZERO 0x00000800 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBD_ONE 0x00000C00 ///< Drive pwmA High +#define PWM_X_GENA_ACTCMPBU_M 0x00000300 ///< Action for Comparator B Up +#define PWM_X_GENA_ACTCMPBU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPBU_INV 0x00000100 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPBU_ZERO 0x00000200 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBU_ONE 0x00000300 ///< Drive pwmA High +#define PWM_X_GENA_ACTCMPAD_M 0x000000C0 ///< Action for Comparator A Down +#define PWM_X_GENA_ACTCMPAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPAD_INV 0x00000040 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPAD_ZERO 0x00000080 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAD_ONE 0x000000C0 ///< Drive pwmA High +#define PWM_X_GENA_ACTCMPAU_M 0x00000030 ///< Action for Comparator A Up +#define PWM_X_GENA_ACTCMPAU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPAU_INV 0x00000010 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPAU_ZERO 0x00000020 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAU_ONE 0x00000030 ///< Drive pwmA High +#define PWM_X_GENA_ACTLOAD_M 0x0000000C ///< Action for Counter=LOAD +#define PWM_X_GENA_ACTLOAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTLOAD_INV 0x00000004 ///< Invert pwmA +#define PWM_X_GENA_ACTLOAD_ZERO 0x00000008 ///< Drive pwmA Low +#define PWM_X_GENA_ACTLOAD_ONE 0x0000000C ///< Drive pwmA High +#define PWM_X_GENA_ACTZERO_M 0x00000003 ///< Action for Counter=0 +#define PWM_X_GENA_ACTZERO_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTZERO_INV 0x00000001 ///< Invert pwmA +#define PWM_X_GENA_ACTZERO_ZERO 0x00000002 ///< Drive pwmA Low +#define PWM_X_GENA_ACTZERO_ONE 0x00000003 ///< Drive pwmA High +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_GENB register. + */ +/*\{*/ +#define PWM_X_GENB_ACTCMPBD_M 0x00000C00 ///< Action for Comparator B Down +#define PWM_X_GENB_ACTCMPBD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPBD_INV 0x00000400 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPBD_ZERO 0x00000800 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBD_ONE 0x00000C00 ///< Drive pwmB High +#define PWM_X_GENB_ACTCMPBU_M 0x00000300 ///< Action for Comparator B Up +#define PWM_X_GENB_ACTCMPBU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPBU_INV 0x00000100 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPBU_ZERO 0x00000200 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBU_ONE 0x00000300 ///< Drive pwmB High +#define PWM_X_GENB_ACTCMPAD_M 0x000000C0 ///< Action for Comparator A Down +#define PWM_X_GENB_ACTCMPAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPAD_INV 0x00000040 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPAD_ZERO 0x00000080 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0 ///< Drive pwmB High +#define PWM_X_GENB_ACTCMPAU_M 0x00000030 ///< Action for Comparator A Up +#define PWM_X_GENB_ACTCMPAU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPAU_INV 0x00000010 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPAU_ZERO 0x00000020 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAU_ONE 0x00000030 ///< Drive pwmB High +#define PWM_X_GENB_ACTLOAD_M 0x0000000C ///< Action for Counter=LOAD +#define PWM_X_GENB_ACTLOAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTLOAD_INV 0x00000004 ///< Invert pwmB +#define PWM_X_GENB_ACTLOAD_ZERO 0x00000008 ///< Drive pwmB Low +#define PWM_X_GENB_ACTLOAD_ONE 0x0000000C ///< Drive pwmB High +#define PWM_X_GENB_ACTZERO_M 0x00000003 ///< Action for Counter=0 +#define PWM_X_GENB_ACTZERO_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTZERO_INV 0x00000001 ///< Invert pwmB +#define PWM_X_GENB_ACTZERO_ZERO 0x00000002 ///< Drive pwmB Low +#define PWM_X_GENB_ACTZERO_ONE 0x00000003 ///< Drive pwmB High +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_DBCTL register. + */ +/*\{*/ +#define PWM_X_DBCTL_ENABLE 0x00000001 ///< Dead-Band Generator Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_DBRISE register. + */ +/*\{*/ +#define PWM_X_DBRISE_DELAY_M 0x00000FFF ///< Dead-Band Rise Delay +#define PWM_X_DBRISE_DELAY_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_DBFALL register. + */ +/*\{*/ +#define PWM_X_DBFALL_DELAY_M 0x00000FFF ///< Dead-Band Fall Delay +#define PWM_X_DBFALL_DELAY_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_CTL register. + */ +/*\{*/ +#define QEI_CTL_STALLEN 0x00001000 ///< Stall QEI +#define QEI_CTL_INVI 0x00000800 ///< Invert Index Pulse +#define QEI_CTL_INVB 0x00000400 ///< Invert PhB +#define QEI_CTL_INVA 0x00000200 ///< Invert PhA +#define QEI_CTL_VELDIV_M 0x000001C0 ///< Predivide Velocity +#define QEI_CTL_VELDIV_1 0x00000000 ///< QEI clock /1 +#define QEI_CTL_VELDIV_2 0x00000040 ///< QEI clock /2 +#define QEI_CTL_VELDIV_4 0x00000080 ///< QEI clock /4 +#define QEI_CTL_VELDIV_8 0x000000C0 ///< QEI clock /8 +#define QEI_CTL_VELDIV_16 0x00000100 ///< QEI clock /16 +#define QEI_CTL_VELDIV_32 0x00000140 ///< QEI clock /32 +#define QEI_CTL_VELDIV_64 0x00000180 ///< QEI clock /64 +#define QEI_CTL_VELDIV_128 0x000001C0 ///< QEI clock /128 +#define QEI_CTL_VELEN 0x00000020 ///< Capture Velocity +#define QEI_CTL_RESMODE 0x00000010 ///< Reset Mode +#define QEI_CTL_CAPMODE 0x00000008 ///< Capture Mode +#define QEI_CTL_SIGMODE 0x00000004 ///< Signal Mode +#define QEI_CTL_SWAP 0x00000002 ///< Swap Signals +#define QEI_CTL_ENABLE 0x00000001 ///< Enable QEI +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_STAT register. + */ +/*\{*/ +#define QEI_STAT_DIRECTION 0x00000002 ///< Direction of Rotation +#define QEI_STAT_ERROR 0x00000001 ///< Error Detected +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_POS register. + */ +/*\{*/ +#define QEI_POS_M 0xFFFFFFFF ///< Current Position Integrator Value +#define QEI_POS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_MAXPOS register. + */ +/*\{*/ +#define QEI_MAXPOS_M 0xFFFFFFFF ///< Maximum Position Integrator Value +#define QEI_MAXPOS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_LOAD register. + */ +/*\{*/ +#define QEI_LOAD_M 0xFFFFFFFF ///< Velocity Timer Load Value +#define QEI_LOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_TIME register. + */ +/*\{*/ +#define QEI_TIME_M 0xFFFFFFFF ///< Velocity Timer Current Value +#define QEI_TIME_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_COUNT register. + */ +/*\{*/ +#define QEI_COUNT_M 0xFFFFFFFF ///< Velocity Pulse Count +#define QEI_COUNT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_SPEED register. + */ +/*\{*/ +#define QEI_SPEED_M 0xFFFFFFFF ///< Velocity +#define QEI_SPEED_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_INTEN register. + */ +/*\{*/ +#define QEI_INTEN_ERROR 0x00000008 ///< Phase Error Interrupt Enable +#define QEI_INTEN_DIR 0x00000004 ///< Direction Change Interrupt + ///< Enable +#define QEI_INTEN_TIMER 0x00000002 ///< Timer Expires Interrupt Enable +#define QEI_INTEN_INDEX 0x00000001 ///< Index Pulse Detected Interrupt + ///< Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_RIS register. + */ +/*\{*/ +#define QEI_RIS_ERROR 0x00000008 ///< Phase Error Detected +#define QEI_RIS_DIR 0x00000004 ///< Direction Change Detected +#define QEI_RIS_TIMER 0x00000002 ///< Velocity Timer Expired +#define QEI_RIS_INDEX 0x00000001 ///< Index Pulse Asserted +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_ISC register. + */ +/*\{*/ +#define QEI_ISC_ERROR 0x00000008 ///< Phase Error Interrupt +#define QEI_ISC_DIR 0x00000004 ///< Direction Change Interrupt +#define QEI_ISC_TIMER 0x00000002 ///< Velocity Timer Expired Interrupt +#define QEI_ISC_INDEX 0x00000001 ///< Index Pulse Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_CFG register. + */ +/*\{*/ +#define TIMER_CFG_M 0x00000007 ///< GPTM Configuration +#define TIMER_CFG_32_BIT_TIMER 0x00000000 ///< 32-bit timer configuration +#define TIMER_CFG_32_BIT_RTC 0x00000001 ///< 32-bit real-time clock (RTC) + ///< counter configuration +#define TIMER_CFG_16_BIT 0x00000004 ///< 16-bit timer configuration. The + ///< function is controlled by bits + ///< 1:0 of GPTMTAMR and GPTMTBMR +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAMR register. + */ +/*\{*/ +#define TIMER_TAMR_TAAMS 0x00000008 ///< GPTM Timer A Alternate Mode + ///< Select +#define TIMER_TAMR_TACMR 0x00000004 ///< GPTM Timer A Capture Mode +#define TIMER_TAMR_TAMR_M 0x00000003 ///< GPTM Timer A Mode +#define TIMER_TAMR_TAMR_1_SHOT 0x00000001 ///< One-Shot Timer mode +#define TIMER_TAMR_TAMR_PERIOD 0x00000002 ///< Periodic Timer mode +#define TIMER_TAMR_TAMR_CAP 0x00000003 ///< Capture mode +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBMR register. + */ +/*\{*/ +#define TIMER_TBMR_TBAMS 0x00000008 ///< GPTM Timer B Alternate Mode + ///< Select +#define TIMER_TBMR_TBCMR 0x00000004 ///< GPTM Timer B Capture Mode +#define TIMER_TBMR_TBMR_M 0x00000003 ///< GPTM Timer B Mode +#define TIMER_TBMR_TBMR_1_SHOT 0x00000001 ///< One-Shot Timer mode +#define TIMER_TBMR_TBMR_PERIOD 0x00000002 ///< Periodic Timer mode +#define TIMER_TBMR_TBMR_CAP 0x00000003 ///< Capture mode +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_CTL register. + */ +/*\{*/ +#define TIMER_CTL_TBPWML 0x00004000 ///< GPTM Timer B PWM Output Level +#define TIMER_CTL_TBOTE 0x00002000 ///< GPTM Timer B Output Trigger + ///< Enable +#define TIMER_CTL_TBEVENT_M 0x00000C00 ///< GPTM Timer B Event Mode +#define TIMER_CTL_TBEVENT_POS 0x00000000 ///< Positive edge +#define TIMER_CTL_TBEVENT_NEG 0x00000400 ///< Negative edge +#define TIMER_CTL_TBEVENT_BOTH 0x00000C00 ///< Both edges +#define TIMER_CTL_TBSTALL 0x00000200 ///< GPTM Timer B Stall Enable +#define TIMER_CTL_TBEN 0x00000100 ///< GPTM Timer B Enable +#define TIMER_CTL_TAPWML 0x00000040 ///< GPTM Timer A PWM Output Level +#define TIMER_CTL_TAOTE 0x00000020 ///< GPTM Timer A Output Trigger + ///< Enable +#define TIMER_CTL_RTCEN 0x00000010 ///< GPTM RTC Enable +#define TIMER_CTL_TAEVENT_M 0x0000000C ///< GPTM Timer A Event Mode +#define TIMER_CTL_TAEVENT_POS 0x00000000 ///< Positive edge +#define TIMER_CTL_TAEVENT_NEG 0x00000004 ///< Negative edge +#define TIMER_CTL_TAEVENT_BOTH 0x0000000C ///< Both edges +#define TIMER_CTL_TASTALL 0x00000002 ///< GPTM Timer A Stall Enable +#define TIMER_CTL_TAEN 0x00000001 ///< GPTM Timer A Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_IMR register. + */ +/*\{*/ +#define TIMER_IMR_CBEIM 0x00000400 ///< GPTM Capture B Event Interrupt + ///< Mask +#define TIMER_IMR_CBMIM 0x00000200 ///< GPTM Capture B Match Interrupt + ///< Mask +#define TIMER_IMR_TBTOIM 0x00000100 ///< GPTM Timer B Time-Out Interrupt + ///< Mask +#define TIMER_IMR_RTCIM 0x00000008 ///< GPTM RTC Interrupt Mask +#define TIMER_IMR_CAEIM 0x00000004 ///< GPTM Capture A Event Interrupt + ///< Mask +#define TIMER_IMR_CAMIM 0x00000002 ///< GPTM Capture A Match Interrupt + ///< Mask +#define TIMER_IMR_TATOIM 0x00000001 ///< GPTM Timer A Time-Out Interrupt + ///< Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_RIS register. + */ +/*\{*/ +#define TIMER_RIS_CBERIS 0x00000400 ///< GPTM Capture B Event Raw + ///< Interrupt +#define TIMER_RIS_CBMRIS 0x00000200 ///< GPTM Capture B Match Raw + ///< Interrupt +#define TIMER_RIS_TBTORIS 0x00000100 ///< GPTM Timer B Time-Out Raw + ///< Interrupt +#define TIMER_RIS_RTCRIS 0x00000008 ///< GPTM RTC Raw Interrupt +#define TIMER_RIS_CAERIS 0x00000004 ///< GPTM Capture A Event Raw + ///< Interrupt +#define TIMER_RIS_CAMRIS 0x00000002 ///< GPTM Capture A Match Raw + ///< Interrupt +#define TIMER_RIS_TATORIS 0x00000001 ///< GPTM Timer A Time-Out Raw + ///< Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_MIS register. + */ +/*\{*/ +#define TIMER_MIS_CBEMIS 0x00000400 ///< GPTM Capture B Event Masked + ///< Interrupt +#define TIMER_MIS_CBMMIS 0x00000200 ///< GPTM Capture B Match Masked + ///< Interrupt +#define TIMER_MIS_TBTOMIS 0x00000100 ///< GPTM Timer B Time-Out Masked + ///< Interrupt +#define TIMER_MIS_RTCMIS 0x00000008 ///< GPTM RTC Masked Interrupt +#define TIMER_MIS_CAEMIS 0x00000004 ///< GPTM Capture A Event Masked + ///< Interrupt +#define TIMER_MIS_CAMMIS 0x00000002 ///< GPTM Capture A Match Masked + ///< Interrupt +#define TIMER_MIS_TATOMIS 0x00000001 ///< GPTM Timer A Time-Out Masked + ///< Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_ICR register. + */ +/*\{*/ +#define TIMER_ICR_CBECINT 0x00000400 ///< GPTM Capture B Event Interrupt + ///< Clear +#define TIMER_ICR_CBMCINT 0x00000200 ///< GPTM Capture B Match Interrupt + ///< Clear +#define TIMER_ICR_TBTOCINT 0x00000100 ///< GPTM Timer B Time-Out Interrupt + ///< Clear +#define TIMER_ICR_RTCCINT 0x00000008 ///< GPTM RTC Interrupt Clear +#define TIMER_ICR_CAECINT 0x00000004 ///< GPTM Capture A Event Interrupt + ///< Clear +#define TIMER_ICR_CAMCINT 0x00000002 ///< GPTM Capture A Match Interrupt + ///< Clear +#define TIMER_ICR_TATOCINT 0x00000001 ///< GPTM Timer A Time-Out Raw + ///< Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAILR register. + */ +/*\{*/ +#define TIMER_TAILR_TAILRH_M 0xFFFF0000 ///< GPTM Timer A Interval Load + ///< Register High +#define TIMER_TAILR_TAILRL_M 0x0000FFFF ///< GPTM Timer A Interval Load + ///< Register Low +#define TIMER_TAILR_TAILRH_S 16 +#define TIMER_TAILR_TAILRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBILR register. + */ +/*\{*/ +#define TIMER_TBILR_TBILRL_M 0x0000FFFF ///< GPTM Timer B Interval Load + ///< Register +#define TIMER_TBILR_TBILRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAMATCHR +* register. + */ +/*\{*/ +#define TIMER_TAMATCHR_TAMRH_M 0xFFFF0000 ///< GPTM Timer A Match Register High +#define TIMER_TAMATCHR_TAMRL_M 0x0000FFFF ///< GPTM Timer A Match Register Low +#define TIMER_TAMATCHR_TAMRH_S 16 +#define TIMER_TAMATCHR_TAMRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBMATCHR +* register. + */ +/*\{*/ +#define TIMER_TBMATCHR_TBMRL_M 0x0000FFFF ///< GPTM Timer B Match Register Low +#define TIMER_TBMATCHR_TBMRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAPR register. + */ +/*\{*/ +#define TIMER_TAPR_TAPSR_M 0x000000FF ///< GPTM Timer A Prescale +#define TIMER_TAPR_TAPSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBPR register. + */ +/*\{*/ +#define TIMER_TBPR_TBPSR_M 0x000000FF ///< GPTM Timer B Prescale +#define TIMER_TBPR_TBPSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAPMR register. + */ +/*\{*/ +#define TIMER_TAPMR_TAPSMR_M 0x000000FF ///< GPTM TimerA Prescale Match +#define TIMER_TAPMR_TAPSMR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBPMR register. + */ +/*\{*/ +#define TIMER_TBPMR_TBPSMR_M 0x000000FF ///< GPTM TimerB Prescale Match +#define TIMER_TBPMR_TBPSMR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAR register. + */ +/*\{*/ +#define TIMER_TAR_TARH_M 0xFFFF0000 ///< GPTM Timer A Register High +#define TIMER_TAR_TARL_M 0x0000FFFF ///< GPTM Timer A Register Low +#define TIMER_TAR_TARH_S 16 +#define TIMER_TAR_TARL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBR register. + */ +/*\{*/ +#define TIMER_TBR_TBRL_M 0x0000FFFF ///< GPTM Timer B +#define TIMER_TBR_TBRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_ACTSS register. + */ +/*\{*/ +#define ADC_ACTSS_ASEN3 0x00000008 ///< ADC SS3 Enable +#define ADC_ACTSS_ASEN2 0x00000004 ///< ADC SS2 Enable +#define ADC_ACTSS_ASEN1 0x00000002 ///< ADC SS1 Enable +#define ADC_ACTSS_ASEN0 0x00000001 ///< ADC SS0 Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_RIS register. + */ +/*\{*/ +#define ADC_RIS_INR3 0x00000008 ///< SS3 Raw Interrupt Status +#define ADC_RIS_INR2 0x00000004 ///< SS2 Raw Interrupt Status +#define ADC_RIS_INR1 0x00000002 ///< SS1 Raw Interrupt Status +#define ADC_RIS_INR0 0x00000001 ///< SS0 Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_IM register. + */ +/*\{*/ +#define ADC_IM_MASK3 0x00000008 ///< SS3 Interrupt Mask +#define ADC_IM_MASK2 0x00000004 ///< SS2 Interrupt Mask +#define ADC_IM_MASK1 0x00000002 ///< SS1 Interrupt Mask +#define ADC_IM_MASK0 0x00000001 ///< SS0 Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_ISC register. + */ +/*\{*/ +#define ADC_ISC_IN3 0x00000008 ///< SS3 Interrupt Status and Clear +#define ADC_ISC_IN2 0x00000004 ///< SS2 Interrupt Status and Clear +#define ADC_ISC_IN1 0x00000002 ///< SS1 Interrupt Status and Clear +#define ADC_ISC_IN0 0x00000001 ///< SS0 Interrupt Status and Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_OSTAT register. + */ +/*\{*/ +#define ADC_OSTAT_OV3 0x00000008 ///< SS3 FIFO Overflow +#define ADC_OSTAT_OV2 0x00000004 ///< SS2 FIFO Overflow +#define ADC_OSTAT_OV1 0x00000002 ///< SS1 FIFO Overflow +#define ADC_OSTAT_OV0 0x00000001 ///< SS0 FIFO Overflow +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_EMUX register. + */ +/*\{*/ +#define ADC_EMUX_EM3_M 0x0000F000 ///< SS3 Trigger Select +#define ADC_EMUX_EM3_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM3_COMP0 0x00001000 ///< Analog Comparator 0 +#define ADC_EMUX_EM3_COMP1 0x00002000 ///< Analog Comparator 1 +#define ADC_EMUX_EM3_COMP2 0x00003000 ///< Analog Comparator 2 +#define ADC_EMUX_EM3_EXTERNAL 0x00004000 ///< External (GPIO PB4) +#define ADC_EMUX_EM3_TIMER 0x00005000 ///< Timer +#define ADC_EMUX_EM3_PWM0 0x00006000 ///< PWM0 +#define ADC_EMUX_EM3_PWM1 0x00007000 ///< PWM1 +#define ADC_EMUX_EM3_PWM2 0x00008000 ///< PWM2 +#define ADC_EMUX_EM3_ALWAYS 0x0000F000 ///< Always (continuously sample) +#define ADC_EMUX_EM2_M 0x00000F00 ///< SS2 Trigger Select +#define ADC_EMUX_EM2_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM2_COMP0 0x00000100 ///< Analog Comparator 0 +#define ADC_EMUX_EM2_COMP1 0x00000200 ///< Analog Comparator 1 +#define ADC_EMUX_EM2_COMP2 0x00000300 ///< Analog Comparator 2 +#define ADC_EMUX_EM2_EXTERNAL 0x00000400 ///< External (GPIO PB4) +#define ADC_EMUX_EM2_TIMER 0x00000500 ///< Timer +#define ADC_EMUX_EM2_PWM0 0x00000600 ///< PWM0 +#define ADC_EMUX_EM2_PWM1 0x00000700 ///< PWM1 +#define ADC_EMUX_EM2_PWM2 0x00000800 ///< PWM2 +#define ADC_EMUX_EM2_ALWAYS 0x00000F00 ///< Always (continuously sample) +#define ADC_EMUX_EM1_M 0x000000F0 ///< SS1 Trigger Select +#define ADC_EMUX_EM1_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM1_COMP0 0x00000010 ///< Analog Comparator 0 +#define ADC_EMUX_EM1_COMP1 0x00000020 ///< Analog Comparator 1 +#define ADC_EMUX_EM1_COMP2 0x00000030 ///< Analog Comparator 2 +#define ADC_EMUX_EM1_EXTERNAL 0x00000040 ///< External (GPIO PB4) +#define ADC_EMUX_EM1_TIMER 0x00000050 ///< Timer +#define ADC_EMUX_EM1_PWM0 0x00000060 ///< PWM0 +#define ADC_EMUX_EM1_PWM1 0x00000070 ///< PWM1 +#define ADC_EMUX_EM1_PWM2 0x00000080 ///< PWM2 +#define ADC_EMUX_EM1_ALWAYS 0x000000F0 ///< Always (continuously sample) +#define ADC_EMUX_EM0_M 0x0000000F ///< SS0 Trigger Select +#define ADC_EMUX_EM0_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM0_COMP0 0x00000001 ///< Analog Comparator 0 +#define ADC_EMUX_EM0_COMP1 0x00000002 ///< Analog Comparator 1 +#define ADC_EMUX_EM0_COMP2 0x00000003 ///< Analog Comparator 2 +#define ADC_EMUX_EM0_EXTERNAL 0x00000004 ///< External (GPIO PB4) +#define ADC_EMUX_EM0_TIMER 0x00000005 ///< Timer +#define ADC_EMUX_EM0_PWM0 0x00000006 ///< PWM0 +#define ADC_EMUX_EM0_PWM1 0x00000007 ///< PWM1 +#define ADC_EMUX_EM0_PWM2 0x00000008 ///< PWM2 +#define ADC_EMUX_EM0_ALWAYS 0x0000000F ///< Always (continuously sample) +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_USTAT register. + */ +/*\{*/ +#define ADC_USTAT_UV3 0x00000008 ///< SS3 FIFO Underflow +#define ADC_USTAT_UV2 0x00000004 ///< SS2 FIFO Underflow +#define ADC_USTAT_UV1 0x00000002 ///< SS1 FIFO Underflow +#define ADC_USTAT_UV0 0x00000001 ///< SS0 FIFO Underflow +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSPRI register. + */ +/*\{*/ +#define ADC_SSPRI_SS3_M 0x00003000 ///< SS3 Priority +#define ADC_SSPRI_SS3_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS3_2ND 0x00001000 ///< Second priority +#define ADC_SSPRI_SS3_3RD 0x00002000 ///< Third priority +#define ADC_SSPRI_SS3_4TH 0x00003000 ///< Fourth priority +#define ADC_SSPRI_SS2_M 0x00000300 ///< SS2 Priority +#define ADC_SSPRI_SS2_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS2_2ND 0x00000100 ///< Second priority +#define ADC_SSPRI_SS2_3RD 0x00000200 ///< Third priority +#define ADC_SSPRI_SS2_4TH 0x00000300 ///< Fourth priority +#define ADC_SSPRI_SS1_M 0x00000030 ///< SS1 Priority +#define ADC_SSPRI_SS1_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS1_2ND 0x00000010 ///< Second priority +#define ADC_SSPRI_SS1_3RD 0x00000020 ///< Third priority +#define ADC_SSPRI_SS1_4TH 0x00000030 ///< Fourth priority +#define ADC_SSPRI_SS0_M 0x00000003 ///< SS0 Priority +#define ADC_SSPRI_SS0_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS0_2ND 0x00000001 ///< Second priority +#define ADC_SSPRI_SS0_3RD 0x00000002 ///< Third priority +#define ADC_SSPRI_SS0_4TH 0x00000003 ///< Fourth priority +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_PSSI register. + */ +/*\{*/ +#define ADC_PSSI_SS3 0x00000008 ///< SS3 Initiate +#define ADC_PSSI_SS2 0x00000004 ///< SS2 Initiate +#define ADC_PSSI_SS1 0x00000002 ///< SS1 Initiate +#define ADC_PSSI_SS0 0x00000001 ///< SS0 Initiate +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SAC register. + */ +/*\{*/ +#define ADC_SAC_AVG_M 0x00000007 ///< Hardware Averaging Control +#define ADC_SAC_AVG_OFF 0x00000000 ///< No hardware oversampling +#define ADC_SAC_AVG_2X 0x00000001 ///< 2x hardware oversampling +#define ADC_SAC_AVG_4X 0x00000002 ///< 4x hardware oversampling +#define ADC_SAC_AVG_8X 0x00000003 ///< 8x hardware oversampling +#define ADC_SAC_AVG_16X 0x00000004 ///< 16x hardware oversampling +#define ADC_SAC_AVG_32X 0x00000005 ///< 32x hardware oversampling +#define ADC_SAC_AVG_64X 0x00000006 ///< 64x hardware oversampling +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSMUX0 register. + */ +/*\{*/ +#define ADC_SSMUX0_MUX7_M 0x70000000 ///< 8th Sample Input Select +#define ADC_SSMUX0_MUX6_M 0x07000000 ///< 7th Sample Input Select +#define ADC_SSMUX0_MUX5_M 0x00700000 ///< 6th Sample Input Select +#define ADC_SSMUX0_MUX4_M 0x00070000 ///< 5th Sample Input Select +#define ADC_SSMUX0_MUX3_M 0x00007000 ///< 4th Sample Input Select +#define ADC_SSMUX0_MUX2_M 0x00000700 ///< 3rd Sample Input Select +#define ADC_SSMUX0_MUX1_M 0x00000070 ///< 2nd Sample Input Select +#define ADC_SSMUX0_MUX0_M 0x00000007 ///< 1st Sample Input Select +#define ADC_SSMUX0_MUX7_S 28 +#define ADC_SSMUX0_MUX6_S 24 +#define ADC_SSMUX0_MUX5_S 20 +#define ADC_SSMUX0_MUX4_S 16 +#define ADC_SSMUX0_MUX3_S 12 +#define ADC_SSMUX0_MUX2_S 8 +#define ADC_SSMUX0_MUX1_S 4 +#define ADC_SSMUX0_MUX0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL0 register. + */ +/*\{*/ +#define ADC_SSCTL0_TS7 0x80000000 ///< 8th Sample Temp Sensor Select +#define ADC_SSCTL0_IE7 0x40000000 ///< 8th Sample Interrupt Enable +#define ADC_SSCTL0_END7 0x20000000 ///< 8th Sample is End of Sequence +#define ADC_SSCTL0_D7 0x10000000 ///< 8th Sample Diff Input Select +#define ADC_SSCTL0_TS6 0x08000000 ///< 7th Sample Temp Sensor Select +#define ADC_SSCTL0_IE6 0x04000000 ///< 7th Sample Interrupt Enable +#define ADC_SSCTL0_END6 0x02000000 ///< 7th Sample is End of Sequence +#define ADC_SSCTL0_D6 0x01000000 ///< 7th Sample Diff Input Select +#define ADC_SSCTL0_TS5 0x00800000 ///< 6th Sample Temp Sensor Select +#define ADC_SSCTL0_IE5 0x00400000 ///< 6th Sample Interrupt Enable +#define ADC_SSCTL0_END5 0x00200000 ///< 6th Sample is End of Sequence +#define ADC_SSCTL0_D5 0x00100000 ///< 6th Sample Diff Input Select +#define ADC_SSCTL0_TS4 0x00080000 ///< 5th Sample Temp Sensor Select +#define ADC_SSCTL0_IE4 0x00040000 ///< 5th Sample Interrupt Enable +#define ADC_SSCTL0_END4 0x00020000 ///< 5th Sample is End of Sequence +#define ADC_SSCTL0_D4 0x00010000 ///< 5th Sample Diff Input Select +#define ADC_SSCTL0_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL0_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL0_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL0_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL0_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL0_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL0_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL0_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL0_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL0_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL0_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL0_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL0_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL0_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL0_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL0_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO0 register. + */ +/*\{*/ +#define ADC_SSFIFO0_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO0_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT0 register. + */ +/*\{*/ +#define ADC_SSFSTAT0_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT0_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT0_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT0_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT0_HPTR_S 4 +#define ADC_SSFSTAT0_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSMUX1 register. + */ +/*\{*/ +#define ADC_SSMUX1_MUX3_M 0x00007000 ///< 4th Sample Input Select +#define ADC_SSMUX1_MUX2_M 0x00000700 ///< 3rd Sample Input Select +#define ADC_SSMUX1_MUX1_M 0x00000070 ///< 2nd Sample Input Select +#define ADC_SSMUX1_MUX0_M 0x00000007 ///< 1st Sample Input Select +#define ADC_SSMUX1_MUX3_S 12 +#define ADC_SSMUX1_MUX2_S 8 +#define ADC_SSMUX1_MUX1_S 4 +#define ADC_SSMUX1_MUX0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL1 register. + */ +/*\{*/ +#define ADC_SSCTL1_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL1_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL1_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL1_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL1_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL1_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL1_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL1_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL1_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL1_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL1_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL1_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL1_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL1_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL1_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL1_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO1 register. + */ +/*\{*/ +#define ADC_SSFIFO1_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO1_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT1 register. + */ +/*\{*/ +#define ADC_SSFSTAT1_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT1_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT1_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT1_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT1_HPTR_S 4 +#define ADC_SSFSTAT1_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSMUX2 register. + */ +/*\{*/ +#define ADC_SSMUX2_MUX3_M 0x00007000 ///< 4th Sample Input Select +#define ADC_SSMUX2_MUX2_M 0x00000700 ///< 3rd Sample Input Select +#define ADC_SSMUX2_MUX1_M 0x00000070 ///< 2nd Sample Input Select +#define ADC_SSMUX2_MUX0_M 0x00000007 ///< 1st Sample Input Select +#define ADC_SSMUX2_MUX3_S 12 +#define ADC_SSMUX2_MUX2_S 8 +#define ADC_SSMUX2_MUX1_S 4 +#define ADC_SSMUX2_MUX0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL2 register. + */ +/*\{*/ +#define ADC_SSCTL2_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL2_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL2_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL2_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL2_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL2_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL2_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL2_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL2_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL2_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL2_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL2_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL2_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL2_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL2_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL2_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO2 register. + */ +/*\{*/ +#define ADC_SSFIFO2_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO2_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT2 register. + */ +/*\{*/ +#define ADC_SSFSTAT2_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT2_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT2_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT2_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT2_HPTR_S 4 +#define ADC_SSFSTAT2_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSMUX3 register. + */ +/*\{*/ +#define ADC_SSMUX3_MUX0_M 0x00000007 ///< 1st Sample Input Select +#define ADC_SSMUX3_MUX0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL3 register. + */ +/*\{*/ +#define ADC_SSCTL3_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL3_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL3_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL3_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO3 register. + */ +/*\{*/ +#define ADC_SSFIFO3_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO3_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT3 register. + */ +/*\{*/ +#define ADC_SSFSTAT3_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT3_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT3_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT3_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT3_HPTR_S 4 +#define ADC_SSFSTAT3_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_TMLB register. + */ +/*\{*/ +#define ADC_TMLB_LB 0x00000001 ///< Loopback Mode Enable +/*\}*/ + +/** + * The following are defines for the the interpretation of the data in the +* SSFIFOx when the ADC TMLB is enabled. + */ +/*\{*/ +#define ADC_SSFIFO_TMLB_CNT_M 0x000003C0 ///< Continuous Sample Counter +#define ADC_SSFIFO_TMLB_CONT 0x00000020 ///< Continuation Sample Indicator +#define ADC_SSFIFO_TMLB_DIFF 0x00000010 ///< Differential Sample Indicator +#define ADC_SSFIFO_TMLB_TS 0x00000008 ///< Temp Sensor Sample Indicator +#define ADC_SSFIFO_TMLB_MUX_M 0x00000007 ///< Analog Input Indicator +#define ADC_SSFIFO_TMLB_CNT_S 6 ///< Sample counter shift +#define ADC_SSFIFO_TMLB_MUX_S 0 ///< Input channel number shift +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACMIS register. + */ +/*\{*/ +#define COMP_ACMIS_IN2 0x00000004 ///< Comparator 2 Masked Interrupt + ///< Status +#define COMP_ACMIS_IN1 0x00000002 ///< Comparator 1 Masked Interrupt + ///< Status +#define COMP_ACMIS_IN0 0x00000001 ///< Comparator 0 Masked Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACRIS register. + */ +/*\{*/ +#define COMP_ACRIS_IN2 0x00000004 ///< Comparator 2 Interrupt Status +#define COMP_ACRIS_IN1 0x00000002 ///< Comparator 1 Interrupt Status +#define COMP_ACRIS_IN0 0x00000001 ///< Comparator 0 Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACINTEN register. + */ +/*\{*/ +#define COMP_ACINTEN_IN2 0x00000004 ///< Comparator 2 Interrupt Enable +#define COMP_ACINTEN_IN1 0x00000002 ///< Comparator 1 Interrupt Enable +#define COMP_ACINTEN_IN0 0x00000001 ///< Comparator 0 Interrupt Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACREFCTL +* register. + */ +/*\{*/ +#define COMP_ACREFCTL_EN 0x00000200 ///< Resistor Ladder Enable +#define COMP_ACREFCTL_RNG 0x00000100 ///< Resistor Ladder Range +#define COMP_ACREFCTL_VREF_M 0x0000000F ///< Resistor Ladder Voltage Ref +#define COMP_ACREFCTL_VREF_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACSTAT0 register. + */ +/*\{*/ +#define COMP_ACSTAT0_OVAL 0x00000002 ///< Comparator Output Value +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACCTL0 register. + */ +/*\{*/ +#define COMP_ACCTL0_TOEN 0x00000800 ///< Trigger Output Enable +#define COMP_ACCTL0_ASRCP_M 0x00000600 ///< Analog Source Positive +#define COMP_ACCTL0_ASRCP_PIN 0x00000000 ///< Pin value of Cn+ +#define COMP_ACCTL0_ASRCP_PIN0 0x00000200 ///< Pin value of C0+ +#define COMP_ACCTL0_ASRCP_REF 0x00000400 ///< Internal voltage reference + ///< (VIREF) +#define COMP_ACCTL0_TSLVAL 0x00000080 ///< Trigger Sense Level Value +#define COMP_ACCTL0_TSEN_M 0x00000060 ///< Trigger Sense +#define COMP_ACCTL0_TSEN_LEVEL 0x00000000 ///< Level sense, see TSLVAL +#define COMP_ACCTL0_TSEN_FALL 0x00000020 ///< Falling edge +#define COMP_ACCTL0_TSEN_RISE 0x00000040 ///< Rising edge +#define COMP_ACCTL0_TSEN_BOTH 0x00000060 ///< Either edge +#define COMP_ACCTL0_ISLVAL 0x00000010 ///< Interrupt Sense Level Value +#define COMP_ACCTL0_ISEN_M 0x0000000C ///< Interrupt Sense +#define COMP_ACCTL0_ISEN_LEVEL 0x00000000 ///< Level sense, see ISLVAL +#define COMP_ACCTL0_ISEN_FALL 0x00000004 ///< Falling edge +#define COMP_ACCTL0_ISEN_RISE 0x00000008 ///< Rising edge +#define COMP_ACCTL0_ISEN_BOTH 0x0000000C ///< Either edge +#define COMP_ACCTL0_CINV 0x00000002 ///< Comparator Output Invert +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACSTAT1 register. + */ +/*\{*/ +#define COMP_ACSTAT1_OVAL 0x00000002 ///< Comparator Output Value +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACCTL1 register. + */ +/*\{*/ +#define COMP_ACCTL1_TOEN 0x00000800 ///< Trigger Output Enable +#define COMP_ACCTL1_ASRCP_M 0x00000600 ///< Analog Source Positive +#define COMP_ACCTL1_ASRCP_PIN 0x00000000 ///< Pin value of Cn+ +#define COMP_ACCTL1_ASRCP_PIN0 0x00000200 ///< Pin value of C0+ +#define COMP_ACCTL1_ASRCP_REF 0x00000400 ///< Internal voltage reference + ///< (VIREF) +#define COMP_ACCTL1_TSLVAL 0x00000080 ///< Trigger Sense Level Value +#define COMP_ACCTL1_TSEN_M 0x00000060 ///< Trigger Sense +#define COMP_ACCTL1_TSEN_LEVEL 0x00000000 ///< Level sense, see TSLVAL +#define COMP_ACCTL1_TSEN_FALL 0x00000020 ///< Falling edge +#define COMP_ACCTL1_TSEN_RISE 0x00000040 ///< Rising edge +#define COMP_ACCTL1_TSEN_BOTH 0x00000060 ///< Either edge +#define COMP_ACCTL1_ISLVAL 0x00000010 ///< Interrupt Sense Level Value +#define COMP_ACCTL1_ISEN_M 0x0000000C ///< Interrupt Sense +#define COMP_ACCTL1_ISEN_LEVEL 0x00000000 ///< Level sense, see ISLVAL +#define COMP_ACCTL1_ISEN_FALL 0x00000004 ///< Falling edge +#define COMP_ACCTL1_ISEN_RISE 0x00000008 ///< Rising edge +#define COMP_ACCTL1_ISEN_BOTH 0x0000000C ///< Either edge +#define COMP_ACCTL1_CINV 0x00000002 ///< Comparator Output Invert +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACSTAT2 register. + */ +/*\{*/ +#define COMP_ACSTAT2_OVAL 0x00000002 ///< Comparator Output Value +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACCTL2 register. + */ +/*\{*/ +#define COMP_ACCTL2_TOEN 0x00000800 ///< Trigger Output Enable +#define COMP_ACCTL2_ASRCP_M 0x00000600 ///< Analog Source Positive +#define COMP_ACCTL2_ASRCP_PIN 0x00000000 ///< Pin value of Cn+ +#define COMP_ACCTL2_ASRCP_PIN0 0x00000200 ///< Pin value of C0+ +#define COMP_ACCTL2_ASRCP_REF 0x00000400 ///< Internal voltage reference + ///< (VIREF) +#define COMP_ACCTL2_TSLVAL 0x00000080 ///< Trigger Sense Level Value +#define COMP_ACCTL2_TSEN_M 0x00000060 ///< Trigger Sense +#define COMP_ACCTL2_TSEN_LEVEL 0x00000000 ///< Level sense, see TSLVAL +#define COMP_ACCTL2_TSEN_FALL 0x00000020 ///< Falling edge +#define COMP_ACCTL2_TSEN_RISE 0x00000040 ///< Rising edge +#define COMP_ACCTL2_TSEN_BOTH 0x00000060 ///< Either edge +#define COMP_ACCTL2_ISLVAL 0x00000010 ///< Interrupt Sense Level Value +#define COMP_ACCTL2_ISEN_M 0x0000000C ///< Interrupt Sense +#define COMP_ACCTL2_ISEN_LEVEL 0x00000000 ///< Level sense, see ISLVAL +#define COMP_ACCTL2_ISEN_FALL 0x00000004 ///< Falling edge +#define COMP_ACCTL2_ISEN_RISE 0x00000008 ///< Rising edge +#define COMP_ACCTL2_ISEN_BOTH 0x0000000C ///< Either edge +#define COMP_ACCTL2_CINV 0x00000002 ///< Comparator Output Invert +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCC register. + */ +/*\{*/ +#define HIB_RTCC_M 0xFFFFFFFF ///< RTC Counter +#define HIB_RTCC_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCM0 register. + */ +/*\{*/ +#define HIB_RTCM0_M 0xFFFFFFFF ///< RTC Match 0 +#define HIB_RTCM0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCM1 register. + */ +/*\{*/ +#define HIB_RTCM1_M 0xFFFFFFFF ///< RTC Match 1 +#define HIB_RTCM1_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCLD register. + */ +/*\{*/ +#define HIB_RTCLD_M 0xFFFFFFFF ///< RTC Load +#define HIB_RTCLD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_CTL register. + */ +/*\{*/ +#define HIB_CTL_VABORT 0x00000080 ///< Power Cut Abort Enable +#define HIB_CTL_CLK32EN 0x00000040 ///< Clocking Enable +#define HIB_CTL_LOWBATEN 0x00000020 ///< Low Battery Monitoring Enable +#define HIB_CTL_PINWEN 0x00000010 ///< External WAKE Pin Enable +#define HIB_CTL_RTCWEN 0x00000008 ///< RTC Wake-up Enable +#define HIB_CTL_CLKSEL 0x00000004 ///< Hibernation Module Clock Select +#define HIB_CTL_HIBREQ 0x00000002 ///< Hibernation Request +#define HIB_CTL_RTCEN 0x00000001 ///< RTC Timer Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_IM register. + */ +/*\{*/ +#define HIB_IM_EXTW 0x00000008 ///< External Wake-Up Interrupt Mask +#define HIB_IM_LOWBAT 0x00000004 ///< Low Battery Voltage Interrupt + ///< Mask +#define HIB_IM_RTCALT1 0x00000002 ///< RTC Alert 1 Interrupt Mask +#define HIB_IM_RTCALT0 0x00000001 ///< RTC Alert 0 Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RIS register. + */ +/*\{*/ +#define HIB_RIS_EXTW 0x00000008 ///< External Wake-Up Raw Interrupt + ///< Status +#define HIB_RIS_LOWBAT 0x00000004 ///< Low Battery Voltage Raw + ///< Interrupt Status +#define HIB_RIS_RTCALT1 0x00000002 ///< RTC Alert 1 Raw Interrupt Status +#define HIB_RIS_RTCALT0 0x00000001 ///< RTC Alert 0 Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_MIS register. + */ +/*\{*/ +#define HIB_MIS_EXTW 0x00000008 ///< External Wake-Up Masked + ///< Interrupt Status +#define HIB_MIS_LOWBAT 0x00000004 ///< Low Battery Voltage Masked + ///< Interrupt Status +#define HIB_MIS_RTCALT1 0x00000002 ///< RTC Alert 1 Masked Interrupt + ///< Status +#define HIB_MIS_RTCALT0 0x00000001 ///< RTC Alert 0 Masked Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_IC register. + */ +/*\{*/ +#define HIB_IC_EXTW 0x00000008 ///< External Wake-Up Masked + ///< Interrupt Clear +#define HIB_IC_LOWBAT 0x00000004 ///< Low Battery Voltage Masked + ///< Interrupt Clear +#define HIB_IC_RTCALT1 0x00000002 ///< RTC Alert1 Masked Interrupt + ///< Clear +#define HIB_IC_RTCALT0 0x00000001 ///< RTC Alert0 Masked Interrupt + ///< Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCT register. + */ +/*\{*/ +#define HIB_RTCT_TRIM_M 0x0000FFFF ///< RTC Trim Value +#define HIB_RTCT_TRIM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_DATA register. + */ +/*\{*/ +#define HIB_DATA_RTD_M 0xFFFFFFFF ///< Hibernation Module NV Data +#define HIB_DATA_RTD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FMA register. + */ +/*\{*/ +#define FLASH_FMA_OFFSET_M 0x0003FFFF ///< Address Offset +#define FLASH_FMA_OFFSET_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FMD register. + */ +/*\{*/ +#define FLASH_FMD_DATA_M 0xFFFFFFFF ///< Data Value +#define FLASH_FMD_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FMC register. + */ +/*\{*/ +#define FLASH_FMC_WRKEY 0xA4420000 ///< FLASH write key +#define FLASH_FMC_COMT 0x00000008 ///< Commit Register Value +#define FLASH_FMC_MERASE 0x00000004 ///< Mass Erase Flash Memory +#define FLASH_FMC_ERASE 0x00000002 ///< Erase a Page of Flash Memory +#define FLASH_FMC_WRITE 0x00000001 ///< Write a Word into Flash Memory +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FCRIS register. + */ +/*\{*/ +#define FLASH_FCRIS_PRIS 0x00000002 ///< Programming Raw Interrupt Status +#define FLASH_FCRIS_ARIS 0x00000001 ///< Access Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FCIM register. + */ +/*\{*/ +#define FLASH_FCIM_PMASK 0x00000002 ///< Programming Interrupt Mask +#define FLASH_FCIM_AMASK 0x00000001 ///< Access Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FCMISC register. + */ +/*\{*/ +#define FLASH_FCMISC_PMISC 0x00000002 ///< Programming Masked Interrupt + ///< Status and Clear +#define FLASH_FCMISC_AMISC 0x00000001 ///< Access Masked Interrupt Status + ///< and Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USECRL register. + */ +/*\{*/ +#define FLASH_USECRL_M 0x000000FF ///< Microsecond Reload Value +#define FLASH_USECRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USERDBG register. + */ +/*\{*/ +#define FLASH_USERDBG_NW 0x80000000 ///< User Debug Not Written +#define FLASH_USERDBG_DATA_M 0x7FFFFFFC ///< User Data +#define FLASH_USERDBG_DBG1 0x00000002 ///< Debug Control 1 +#define FLASH_USERDBG_DBG0 0x00000001 ///< Debug Control 0 +#define FLASH_USERDBG_DATA_S 2 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USERREG0 register. + */ +/*\{*/ +#define FLASH_USERREG0_NW 0x80000000 ///< Not Written +#define FLASH_USERREG0_DATA_M 0x7FFFFFFF ///< User Data +#define FLASH_USERREG0_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USERREG1 register. + */ +/*\{*/ +#define FLASH_USERREG1_NW 0x80000000 ///< Not Written +#define FLASH_USERREG1_DATA_M 0x7FFFFFFF ///< User Data +#define FLASH_USERREG1_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the erase size of the FLASH block that is +* erased by an erase operation, and the protect size is the size of the FLASH +* block that is protected by each protection register. + */ +/*\{*/ +#define FLASH_PROTECT_SIZE 0x00000800 +#define FLASH_ERASE_SIZE 0x00000400 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT +* register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL +* register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT +* register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR +* register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER +* register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + +/** + * The following definitions are deprecated. + */ +#ifndef DEPRECATED + +/** + * Deprecated defines for the Watchdog + */ +/*\{*/ +#define WATCHDOG_LOAD_R (*((reg32_t *)0x40000000)) +#define WATCHDOG_VALUE_R (*((reg32_t *)0x40000004)) +#define WATCHDOG_CTL_R (*((reg32_t *)0x40000008)) +#define WATCHDOG_ICR_R (*((reg32_t *)0x4000000C)) +#define WATCHDOG_RIS_R (*((reg32_t *)0x40000010)) +#define WATCHDOG_MIS_R (*((reg32_t *)0x40000014)) +#define WATCHDOG_TEST_R (*((reg32_t *)0x40000418)) +#define WATCHDOG_LOCK_R (*((reg32_t *)0x40000C00)) +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SICR register. + */ +/*\{*/ +#define I2C_SICR_IC 0x00000001 ///< Clear Interrupt +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SMIS register. + */ +/*\{*/ +#define I2C_SMIS_MIS 0x00000001 ///< Masked Interrupt Status +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SRIS register. + */ +/*\{*/ +#define I2C_SRIS_RIS 0x00000001 ///< Raw Interrupt Status +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SIMR register. + */ +/*\{*/ +#define I2C_SIMR_IM 0x00000001 ///< Interrupt Mask +/*\}*/ + +/** + * Deprecated defines for the bit fields in the the interpretation of the data +* in the SSFIFOx when the ADC TMLB is enabled. register. + */ +/*\{*/ +#define ADC_TMLB_CNT_M 0x000003C0 ///< Continuous Sample Counter +#define ADC_TMLB_CONT 0x00000020 ///< Continuation Sample Indicator +#define ADC_TMLB_DIFF 0x00000010 ///< Differential Sample Indicator +#define ADC_TMLB_TS 0x00000008 ///< Temp Sensor Sample Indicator +#define ADC_TMLB_MUX_M 0x00000007 ///< Analog Input Indicator +#define ADC_TMLB_CNT_S 6 ///< Sample counter shift +#define ADC_TMLB_MUX_S 0 ///< Input channel number shift +/*\}*/ + +/** + * Deprecated defines for the ADC register offsets. + */ +/*\{*/ +#define ADC_ACTSS_R (*((reg32_t *)0x40038000)) +#define ADC_RIS_R (*((reg32_t *)0x40038004)) +#define ADC_IM_R (*((reg32_t *)0x40038008)) +#define ADC_ISC_R (*((reg32_t *)0x4003800C)) +#define ADC_OSTAT_R (*((reg32_t *)0x40038010)) +#define ADC_EMUX_R (*((reg32_t *)0x40038014)) +#define ADC_USTAT_R (*((reg32_t *)0x40038018)) +#define ADC_SSPRI_R (*((reg32_t *)0x40038020)) +#define ADC_PSSI_R (*((reg32_t *)0x40038028)) +#define ADC_SAC_R (*((reg32_t *)0x40038030)) +#define ADC_SSMUX0_R (*((reg32_t *)0x40038040)) +#define ADC_SSCTL0_R (*((reg32_t *)0x40038044)) +#define ADC_SSFIFO0_R (*((reg32_t *)0x40038048)) +#define ADC_SSFSTAT0_R (*((reg32_t *)0x4003804C)) +#define ADC_SSMUX1_R (*((reg32_t *)0x40038060)) +#define ADC_SSCTL1_R (*((reg32_t *)0x40038064)) +#define ADC_SSFIFO1_R (*((reg32_t *)0x40038068)) +#define ADC_SSFSTAT1_R (*((reg32_t *)0x4003806C)) +#define ADC_SSMUX2_R (*((reg32_t *)0x40038080)) +#define ADC_SSCTL2_R (*((reg32_t *)0x40038084)) +#define ADC_SSFIFO2_R (*((reg32_t *)0x40038088)) +#define ADC_SSFSTAT2_R (*((reg32_t *)0x4003808C)) +#define ADC_SSMUX3_R (*((reg32_t *)0x400380A0)) +#define ADC_SSCTL3_R (*((reg32_t *)0x400380A4)) +#define ADC_SSFIFO3_R (*((reg32_t *)0x400380A8)) +#define ADC_SSFSTAT3_R (*((reg32_t *)0x400380AC)) +#define ADC_TMLB_R (*((reg32_t *)0x40038100)) +/*\}*/ + +/** + * Deprecated defines for the bit fields in the FLASH_FMC register. + */ +/*\{*/ +#define FLASH_FMC_WRKEY_M 0xFFFF0000 ///< Flash Memory Write Key +#define FLASH_FMC_WRKEY_S 16 +/*\}*/ + +/** + * Deprecated defines for the bit fields in the SYSCTL_DID1 register. + */ +/*\{*/ +#define SYSCTL_DID1_PKG_28SOIC 0x00000000 ///< SOIC package +#define SYSCTL_DID1_PKG_48QFP 0x00000008 ///< QFP package +/*\}*/ + +/** + * Deprecated defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_MPU_R (*((reg32_t *)0xE000ED9C)) +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S1968_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_gpio.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_gpio.h new file mode 100644 index 00000000..8b1c0f99 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_gpio.h @@ -0,0 +1,603 @@ +/** + * \file + * + * + * \brief LM3S1968 GPIO hardware definitions. + */ + +#ifndef LM3S_GPIO_H +#define LM3S_GPIO_H + +/** + * The following are defines for the GPIO register offsets. + */ +/*\{*/ +#define GPIO_O_DATA 0x00000000 //< GPIO Data +#define GPIO_O_DIR 0x00000400 //< GPIO Direction +#define GPIO_O_IS 0x00000404 //< GPIO Interrupt Sense +#define GPIO_O_IBE 0x00000408 //< GPIO Interrupt Both Edges +#define GPIO_O_IEV 0x0000040C //< GPIO Interrupt Event +#define GPIO_O_IM 0x00000410 //< GPIO Interrupt Mask +#define GPIO_O_RIS 0x00000414 //< GPIO Raw Interrupt Status +#define GPIO_O_MIS 0x00000418 //< GPIO Masked Interrupt Status +#define GPIO_O_ICR 0x0000041C //< GPIO Interrupt Clear +#define GPIO_O_AFSEL 0x00000420 //< GPIO Alternate Function Select +#define GPIO_O_DR2R 0x00000500 //< GPIO 2-mA Drive Select +#define GPIO_O_DR4R 0x00000504 //< GPIO 4-mA Drive Select +#define GPIO_O_DR8R 0x00000508 //< GPIO 8-mA Drive Select +#define GPIO_O_ODR 0x0000050C //< GPIO Open Drain Select +#define GPIO_O_PUR 0x00000510 //< GPIO Pull-Up Select +#define GPIO_O_PDR 0x00000514 //< GPIO Pull-Down Select +#define GPIO_O_SLR 0x00000518 //< GPIO Slew Rate Control Select +#define GPIO_O_DEN 0x0000051C //< GPIO Digital Enable +#define GPIO_O_LOCK 0x00000520 //< GPIO Lock +#define GPIO_O_CR 0x00000524 //< GPIO Commit +#define GPIO_O_AMSEL 0x00000528 //< GPIO Analog Mode Select +#define GPIO_O_PCTL 0x0000052C //< GPIO Port Control +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_O_LOCK register. + */ +/*\{*/ +#define GPIO_LOCK_M 0xFFFFFFFF //< GPIO Lock +#define GPIO_LOCK_UNLOCKED 0x00000000 //< The GPIOCR register is unlocked + //< and may be modified +#define GPIO_LOCK_LOCKED 0x00000001 //< The GPIOCR register is locked + //< and may not be modified +#define GPIO_LOCK_KEY 0x1ACCE551 //< Unlocks the GPIO_CR register +#define GPIO_LOCK_KEY_DD 0x4C4F434B //< Unlocks the GPIO_CR register on + //< DustDevil-class devices and + //< later +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port A. + */ +/*\{*/ +#define GPIO_PCTL_PA0_M 0x0000000F //< PA0 mask +#define GPIO_PCTL_PA0_U0RX 0x00000001 //< U0RX on PA0 +#define GPIO_PCTL_PA0_I2C1SCL 0x00000008 //< I2C1SCL on PA0 +#define GPIO_PCTL_PA0_U1RX 0x00000009 //< U1RX on PA0 +#define GPIO_PCTL_PA1_M 0x000000F0 //< PA1 mask +#define GPIO_PCTL_PA1_U0TX 0x00000010 //< U0TX on PA1 +#define GPIO_PCTL_PA1_I2C1SDA 0x00000080 //< I2C1SDA on PA1 +#define GPIO_PCTL_PA1_U1TX 0x00000090 //< U1TX on PA1 +#define GPIO_PCTL_PA2_M 0x00000F00 //< PA2 mask +#define GPIO_PCTL_PA2_SSI0CLK 0x00000100 //< SSI0CLK on PA2 +#define GPIO_PCTL_PA2_PWM4 0x00000400 //< PWM4 on PA2 +#define GPIO_PCTL_PA2_I2S0RXSD 0x00000900 //< I2S0RXSD on PA2 +#define GPIO_PCTL_PA3_M 0x0000F000 //< PA3 mask +#define GPIO_PCTL_PA3_SSI0FSS 0x00001000 //< SSI0FSS on PA3 +#define GPIO_PCTL_PA3_PWM5 0x00004000 //< PWM5 on PA3 +#define GPIO_PCTL_PA3_I2S0RXMCLK \ + 0x00009000 //< I2S0RXMCLK on PA3 +#define GPIO_PCTL_PA4_M 0x000F0000 //< PA4 mask +#define GPIO_PCTL_PA4_SSI0RX 0x00010000 //< SSI0RX on PA4 +#define GPIO_PCTL_PA4_PWM6 0x00040000 //< PWM6 on PA4 +#define GPIO_PCTL_PA4_CAN0RX 0x00050000 //< CAN0RX on PA4 +#define GPIO_PCTL_PA4_I2S0TXSCK 0x00090000 //< I2S0TXSCK on PA4 +#define GPIO_PCTL_PA5_M 0x00F00000 //< PA5 mask +#define GPIO_PCTL_PA5_SSI0TX 0x00100000 //< SSI0TX on PA5 +#define GPIO_PCTL_PA5_PWM7 0x00400000 //< PWM7 on PA5 +#define GPIO_PCTL_PA5_CAN0TX 0x00500000 //< CAN0TX on PA5 +#define GPIO_PCTL_PA5_I2S0TXWS 0x00900000 //< I2S0TXWS on PA5 +#define GPIO_PCTL_PA6_M 0x0F000000 //< PA6 mask +#define GPIO_PCTL_PA6_I2C1SCL 0x01000000 //< I2C1SCL on PA6 +#define GPIO_PCTL_PA6_CCP1 0x02000000 //< CCP1 on PA6 +#define GPIO_PCTL_PA6_PWM0 0x04000000 //< PWM0 on PA6 +#define GPIO_PCTL_PA6_PWM4 0x05000000 //< PWM4 on PA6 +#define GPIO_PCTL_PA6_CAN0RX 0x06000000 //< CAN0RX on PA6 +#define GPIO_PCTL_PA6_USB0EPEN 0x08000000 //< USB0EPEN on PA6 +#define GPIO_PCTL_PA6_U1CTS 0x09000000 //< U1CTS on PA6 +#define GPIO_PCTL_PA7_M 0xF0000000 //< PA7 mask +#define GPIO_PCTL_PA7_I2C1SDA 0x10000000 //< I2C1SDA on PA7 +#define GPIO_PCTL_PA7_CCP4 0x20000000 //< CCP4 on PA7 +#define GPIO_PCTL_PA7_PWM1 0x40000000 //< PWM1 on PA7 +#define GPIO_PCTL_PA7_PWM5 0x50000000 //< PWM5 on PA7 +#define GPIO_PCTL_PA7_CAN0TX 0x60000000 //< CAN0TX on PA7 +#define GPIO_PCTL_PA7_CCP3 0x70000000 //< CCP3 on PA7 +#define GPIO_PCTL_PA7_USB0PFLT 0x80000000 //< USB0PFLT on PA7 +#define GPIO_PCTL_PA7_U1DCD 0x90000000 //< U1DCD on PA7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port B. + */ +/*\{*/ +#define GPIO_PCTL_PB0_M 0x0000000F //< PB0 mask +#define GPIO_PCTL_PB0_CCP0 0x00000001 //< CCP0 on PB0 +#define GPIO_PCTL_PB0_PWM2 0x00000002 //< PWM2 on PB0 +#define GPIO_PCTL_PB0_U1RX 0x00000005 //< U1RX on PB0 +#define GPIO_PCTL_PB1_M 0x000000F0 //< PB1 mask +#define GPIO_PCTL_PB1_CCP2 0x00000010 //< CCP2 on PB1 +#define GPIO_PCTL_PB1_PWM3 0x00000020 //< PWM3 on PB1 +#define GPIO_PCTL_PB1_CCP1 0x00000040 //< CCP1 on PB1 +#define GPIO_PCTL_PB1_U1TX 0x00000050 //< U1TX on PB1 +#define GPIO_PCTL_PB2_M 0x00000F00 //< PB2 mask +#define GPIO_PCTL_PB2_I2C0SCL 0x00000100 //< I2C0SCL on PB2 +#define GPIO_PCTL_PB2_IDX0 0x00000200 //< IDX0 on PB2 +#define GPIO_PCTL_PB2_CCP3 0x00000400 //< CCP3 on PB2 +#define GPIO_PCTL_PB2_CCP0 0x00000500 //< CCP0 on PB2 +#define GPIO_PCTL_PB2_USB0EPEN 0x00000800 //< USB0EPEN on PB2 +#define GPIO_PCTL_PB3_M 0x0000F000 //< PB3 mask +#define GPIO_PCTL_PB3_I2C0SDA 0x00001000 //< I2C0SDA on PB3 +#define GPIO_PCTL_PB3_FAULT0 0x00002000 //< FAULT0 on PB3 +#define GPIO_PCTL_PB3_FAULT3 0x00004000 //< FAULT3 on PB3 +#define GPIO_PCTL_PB3_USB0PFLT 0x00008000 //< USB0PFLT on PB3 +#define GPIO_PCTL_PB4_M 0x000F0000 //< PB4 mask +#define GPIO_PCTL_PB4_U2RX 0x00040000 //< U2RX on PB4 +#define GPIO_PCTL_PB4_CAN0RX 0x00050000 //< CAN0RX on PB4 +#define GPIO_PCTL_PB4_IDX0 0x00060000 //< IDX0 on PB4 +#define GPIO_PCTL_PB4_U1RX 0x00070000 //< U1RX on PB4 +#define GPIO_PCTL_PB4_EPI0S23 0x00080000 //< EPI0S23 on PB4 +#define GPIO_PCTL_PB5_M 0x00F00000 //< PB5 mask +#define GPIO_PCTL_PB5_C0O 0x00100000 //< C0O on PB5 +#define GPIO_PCTL_PB5_CCP5 0x00200000 //< CCP5 on PB5 +#define GPIO_PCTL_PB5_CCP6 0x00300000 //< CCP6 on PB5 +#define GPIO_PCTL_PB5_CCP0 0x00400000 //< CCP0 on PB5 +#define GPIO_PCTL_PB5_CAN0TX 0x00500000 //< CAN0TX on PB5 +#define GPIO_PCTL_PB5_CCP2 0x00600000 //< CCP2 on PB5 +#define GPIO_PCTL_PB5_U1TX 0x00700000 //< U1TX on PB5 +#define GPIO_PCTL_PB5_EPI0S22 0x00800000 //< EPI0S22 on PB5 +#define GPIO_PCTL_PB6_M 0x0F000000 //< PB6 mask +#define GPIO_PCTL_PB6_CCP1 0x01000000 //< CCP1 on PB6 +#define GPIO_PCTL_PB6_CCP7 0x02000000 //< CCP7 on PB6 +#define GPIO_PCTL_PB6_C0O 0x03000000 //< C0O on PB6 +#define GPIO_PCTL_PB6_FAULT1 0x04000000 //< FAULT1 on PB6 +#define GPIO_PCTL_PB6_IDX0 0x05000000 //< IDX0 on PB6 +#define GPIO_PCTL_PB6_CCP5 0x06000000 //< CCP5 on PB6 +#define GPIO_PCTL_PB6_I2S0TXSCK 0x09000000 //< I2S0TXSCK on PB6 +#define GPIO_PCTL_PB7_M 0xF0000000 //< PB7 mask +#define GPIO_PCTL_PB7_NMI 0x40000000 //< NMI on PB7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port C. + */ +/*\{*/ +#define GPIO_PCTL_PC0_M 0x0000000F //< PC0 mask +#define GPIO_PCTL_PC0_TCK 0x00000003 //< TCK on PC0 +#define GPIO_PCTL_PC1_M 0x000000F0 //< PC1 mask +#define GPIO_PCTL_PC1_TMS 0x00000030 //< TMS on PC1 +#define GPIO_PCTL_PC2_M 0x00000F00 //< PC2 mask +#define GPIO_PCTL_PC2_TDI 0x00000300 //< TDI on PC2 +#define GPIO_PCTL_PC3_M 0x0000F000 //< PC3 mask +#define GPIO_PCTL_PC3_TDO 0x00003000 //< TDO on PC3 +#define GPIO_PCTL_PC4_M 0x000F0000 //< PC4 mask +#define GPIO_PCTL_PC4_CCP5 0x00010000 //< CCP5 on PC4 +#define GPIO_PCTL_PC4_PHA0 0x00020000 //< PHA0 on PC4 +#define GPIO_PCTL_PC4_PWM6 0x00040000 //< PWM6 on PC4 +#define GPIO_PCTL_PC4_CCP2 0x00050000 //< CCP2 on PC4 +#define GPIO_PCTL_PC4_CCP4 0x00060000 //< CCP4 on PC4 +#define GPIO_PCTL_PC4_EPI0S2 0x00080000 //< EPI0S2 on PC4 +#define GPIO_PCTL_PC4_CCP1 0x00090000 //< CCP1 on PC4 +#define GPIO_PCTL_PC5_M 0x00F00000 //< PC5 mask +#define GPIO_PCTL_PC5_CCP1 0x00100000 //< CCP1 on PC5 +#define GPIO_PCTL_PC5_C1O 0x00200000 //< C1O on PC5 +#define GPIO_PCTL_PC5_C0O 0x00300000 //< C0O on PC5 +#define GPIO_PCTL_PC5_FAULT2 0x00400000 //< FAULT2 on PC5 +#define GPIO_PCTL_PC5_CCP3 0x00500000 //< CCP3 on PC5 +#define GPIO_PCTL_PC5_USB0EPEN 0x00600000 //< USB0EPEN on PC5 +#define GPIO_PCTL_PC5_EPI0S3 0x00800000 //< EPI0S3 on PC5 +#define GPIO_PCTL_PC6_M 0x0F000000 //< PC6 mask +#define GPIO_PCTL_PC6_CCP3 0x01000000 //< CCP3 on PC6 +#define GPIO_PCTL_PC6_PHB0 0x02000000 //< PHB0 on PC6 +#define GPIO_PCTL_PC6_C2O 0x03000000 //< C2O on PC6 +#define GPIO_PCTL_PC6_PWM7 0x04000000 //< PWM7 on PC6 +#define GPIO_PCTL_PC6_U1RX 0x05000000 //< U1RX on PC6 +#define GPIO_PCTL_PC6_CCP0 0x06000000 //< CCP0 on PC6 +#define GPIO_PCTL_PC6_USB0PFLT 0x07000000 //< USB0PFLT on PC6 +#define GPIO_PCTL_PC6_EPI0S4 0x08000000 //< EPI0S4 on PC6 +#define GPIO_PCTL_PC7_M 0xF0000000 //< PC7 mask +#define GPIO_PCTL_PC7_CCP4 0x10000000 //< CCP4 on PC7 +#define GPIO_PCTL_PC7_PHB0 0x20000000 //< PHB0 on PC7 +#define GPIO_PCTL_PC7_CCP0 0x40000000 //< CCP0 on PC7 +#define GPIO_PCTL_PC7_U1TX 0x50000000 //< U1TX on PC7 +#define GPIO_PCTL_PC7_USB0PFLT 0x60000000 //< USB0PFLT on PC7 +#define GPIO_PCTL_PC7_C1O 0x70000000 //< C1O on PC7 +#define GPIO_PCTL_PC7_EPI0S5 0x80000000 //< EPI0S5 on PC7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port D. + */ +/*\{*/ +#define GPIO_PCTL_PD0_M 0x0000000F //< PD0 mask +#define GPIO_PCTL_PD0_PWM0 0x00000001 //< PWM0 on PD0 +#define GPIO_PCTL_PD0_CAN0RX 0x00000002 //< CAN0RX on PD0 +#define GPIO_PCTL_PD0_IDX0 0x00000003 //< IDX0 on PD0 +#define GPIO_PCTL_PD0_U2RX 0x00000004 //< U2RX on PD0 +#define GPIO_PCTL_PD0_U1RX 0x00000005 //< U1RX on PD0 +#define GPIO_PCTL_PD0_CCP6 0x00000006 //< CCP6 on PD0 +#define GPIO_PCTL_PD0_I2S0RXSCK 0x00000008 //< I2S0RXSCK on PD0 +#define GPIO_PCTL_PD0_U1CTS 0x00000009 //< U1CTS on PD0 +#define GPIO_PCTL_PD1_M 0x000000F0 //< PD1 mask +#define GPIO_PCTL_PD1_PWM1 0x00000010 //< PWM1 on PD1 +#define GPIO_PCTL_PD1_CAN0TX 0x00000020 //< CAN0TX on PD1 +#define GPIO_PCTL_PD1_PHA0 0x00000030 //< PHA0 on PD1 +#define GPIO_PCTL_PD1_U2TX 0x00000040 //< U2TX on PD1 +#define GPIO_PCTL_PD1_U1TX 0x00000050 //< U1TX on PD1 +#define GPIO_PCTL_PD1_CCP7 0x00000060 //< CCP7 on PD1 +#define GPIO_PCTL_PD1_I2S0RXWS 0x00000080 //< I2S0RXWS on PD1 +#define GPIO_PCTL_PD1_U1DCD 0x00000090 //< U1DCD on PD1 +#define GPIO_PCTL_PD1_CCP2 0x000000A0 //< CCP2 on PD1 +#define GPIO_PCTL_PD1_PHB1 0x000000B0 //< PHB1 on PD1 +#define GPIO_PCTL_PD2_M 0x00000F00 //< PD2 mask +#define GPIO_PCTL_PD2_U1RX 0x00000100 //< U1RX on PD2 +#define GPIO_PCTL_PD2_CCP6 0x00000200 //< CCP6 on PD2 +#define GPIO_PCTL_PD2_PWM2 0x00000300 //< PWM2 on PD2 +#define GPIO_PCTL_PD2_CCP5 0x00000400 //< CCP5 on PD2 +#define GPIO_PCTL_PD2_EPI0S20 0x00000800 //< EPI0S20 on PD2 +#define GPIO_PCTL_PD3_M 0x0000F000 //< PD3 mask +#define GPIO_PCTL_PD3_U1TX 0x00001000 //< U1TX on PD3 +#define GPIO_PCTL_PD3_CCP7 0x00002000 //< CCP7 on PD3 +#define GPIO_PCTL_PD3_PWM3 0x00003000 //< PWM3 on PD3 +#define GPIO_PCTL_PD3_CCP0 0x00004000 //< CCP0 on PD3 +#define GPIO_PCTL_PD3_EPI0S21 0x00008000 //< EPI0S21 on PD3 +#define GPIO_PCTL_PD4_M 0x000F0000 //< PD4 mask +#define GPIO_PCTL_PD4_CCP0 0x00010000 //< CCP0 on PD4 +#define GPIO_PCTL_PD4_CCP3 0x00020000 //< CCP3 on PD4 +#define GPIO_PCTL_PD4_I2S0RXSD 0x00080000 //< I2S0RXSD on PD4 +#define GPIO_PCTL_PD4_U1RI 0x00090000 //< U1RI on PD4 +#define GPIO_PCTL_PD4_EPI0S19 0x000A0000 //< EPI0S19 on PD4 +#define GPIO_PCTL_PD5_M 0x00F00000 //< PD5 mask +#define GPIO_PCTL_PD5_CCP2 0x00100000 //< CCP2 on PD5 +#define GPIO_PCTL_PD5_CCP4 0x00200000 //< CCP4 on PD5 +#define GPIO_PCTL_PD5_I2S0RXMCLK \ + 0x00800000 //< I2S0RXMCLK on PD5 +#define GPIO_PCTL_PD5_U2RX 0x00900000 //< U2RX on PD5 +#define GPIO_PCTL_PD5_EPI0S28 0x00A00000 //< EPI0S28 on PD5 +#define GPIO_PCTL_PD6_M 0x0F000000 //< PD6 mask +#define GPIO_PCTL_PD6_FAULT0 0x01000000 //< FAULT0 on PD6 +#define GPIO_PCTL_PD6_I2S0TXSCK 0x08000000 //< I2S0TXSCK on PD6 +#define GPIO_PCTL_PD6_U2TX 0x09000000 //< U2TX on PD6 +#define GPIO_PCTL_PD6_EPI0S29 0x0A000000 //< EPI0S29 on PD6 +#define GPIO_PCTL_PD7_M 0xF0000000 //< PD7 mask +#define GPIO_PCTL_PD7_IDX0 0x10000000 //< IDX0 on PD7 +#define GPIO_PCTL_PD7_C0O 0x20000000 //< C0O on PD7 +#define GPIO_PCTL_PD7_CCP1 0x30000000 //< CCP1 on PD7 +#define GPIO_PCTL_PD7_I2S0TXWS 0x80000000 //< I2S0TXWS on PD7 +#define GPIO_PCTL_PD7_U1DTR 0x90000000 //< U1DTR on PD7 +#define GPIO_PCTL_PD7_EPI0S30 0xA0000000 //< EPI0S30 on PD7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port E. + */ +/*\{*/ +#define GPIO_PCTL_PE0_M 0x0000000F //< PE0 mask +#define GPIO_PCTL_PE0_PWM4 0x00000001 //< PWM4 on PE0 +#define GPIO_PCTL_PE0_SSI1CLK 0x00000002 //< SSI1CLK on PE0 +#define GPIO_PCTL_PE0_CCP3 0x00000003 //< CCP3 on PE0 +#define GPIO_PCTL_PE0_EPI0S8 0x00000008 //< EPI0S8 on PE0 +#define GPIO_PCTL_PE0_USB0PFLT 0x00000009 //< USB0PFLT on PE0 +#define GPIO_PCTL_PE1_M 0x000000F0 //< PE1 mask +#define GPIO_PCTL_PE1_PWM5 0x00000010 //< PWM5 on PE1 +#define GPIO_PCTL_PE1_SSI1FSS 0x00000020 //< SSI1FSS on PE1 +#define GPIO_PCTL_PE1_FAULT0 0x00000030 //< FAULT0 on PE1 +#define GPIO_PCTL_PE1_CCP2 0x00000040 //< CCP2 on PE1 +#define GPIO_PCTL_PE1_CCP6 0x00000050 //< CCP6 on PE1 +#define GPIO_PCTL_PE1_EPI0S9 0x00000080 //< EPI0S9 on PE1 +#define GPIO_PCTL_PE2_M 0x00000F00 //< PE2 mask +#define GPIO_PCTL_PE2_CCP4 0x00000100 //< CCP4 on PE2 +#define GPIO_PCTL_PE2_SSI1RX 0x00000200 //< SSI1RX on PE2 +#define GPIO_PCTL_PE2_PHB1 0x00000300 //< PHB1 on PE2 +#define GPIO_PCTL_PE2_PHA0 0x00000400 //< PHA0 on PE2 +#define GPIO_PCTL_PE2_CCP2 0x00000500 //< CCP2 on PE2 +#define GPIO_PCTL_PE2_EPI0S24 0x00000800 //< EPI0S24 on PE2 +#define GPIO_PCTL_PE3_M 0x0000F000 //< PE3 mask +#define GPIO_PCTL_PE3_CCP1 0x00001000 //< CCP1 on PE3 +#define GPIO_PCTL_PE3_SSI1TX 0x00002000 //< SSI1TX on PE3 +#define GPIO_PCTL_PE3_PHA1 0x00003000 //< PHA1 on PE3 +#define GPIO_PCTL_PE3_PHB0 0x00004000 //< PHB0 on PE3 +#define GPIO_PCTL_PE3_CCP7 0x00005000 //< CCP7 on PE3 +#define GPIO_PCTL_PE3_EPI0S25 0x00008000 //< EPI0S25 on PE3 +#define GPIO_PCTL_PE4_M 0x000F0000 //< PE4 mask +#define GPIO_PCTL_PE4_CCP3 0x00010000 //< CCP3 on PE4 +#define GPIO_PCTL_PE4_FAULT0 0x00040000 //< FAULT0 on PE4 +#define GPIO_PCTL_PE4_U2TX 0x00050000 //< U2TX on PE4 +#define GPIO_PCTL_PE4_CCP2 0x00060000 //< CCP2 on PE4 +#define GPIO_PCTL_PE4_I2S0TXWS 0x00090000 //< I2S0TXWS on PE4 +#define GPIO_PCTL_PE5_M 0x00F00000 //< PE5 mask +#define GPIO_PCTL_PE5_CCP5 0x00100000 //< CCP5 on PE5 +#define GPIO_PCTL_PE5_I2S0TXSD 0x00900000 //< I2S0TXSD on PE5 +#define GPIO_PCTL_PE6_M 0x0F000000 //< PE6 mask +#define GPIO_PCTL_PE6_PWM4 0x01000000 //< PWM4 on PE6 +#define GPIO_PCTL_PE6_C1O 0x02000000 //< C1O on PE6 +#define GPIO_PCTL_PE6_U1CTS 0x09000000 //< U1CTS on PE6 +#define GPIO_PCTL_PE7_M 0xF0000000 //< PE7 mask +#define GPIO_PCTL_PE7_PWM5 0x10000000 //< PWM5 on PE7 +#define GPIO_PCTL_PE7_C2O 0x20000000 //< C2O on PE7 +#define GPIO_PCTL_PE7_U1DCD 0x90000000 //< U1DCD on PE7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port F. + */ +/*\{*/ +#define GPIO_PCTL_PF0_M 0x0000000F //< PF0 mask +#define GPIO_PCTL_PF0_CAN1RX 0x00000001 //< CAN1RX on PF0 +#define GPIO_PCTL_PF0_PHB0 0x00000002 //< PHB0 on PF0 +#define GPIO_PCTL_PF0_PWM0 0x00000003 //< PWM0 on PF0 +#define GPIO_PCTL_PF0_I2S0TXSD 0x00000008 //< I2S0TXSD on PF0 +#define GPIO_PCTL_PF0_U1DSR 0x00000009 //< U1DSR on PF0 +#define GPIO_PCTL_PF1_M 0x000000F0 //< PF1 mask +#define GPIO_PCTL_PF1_CAN1TX 0x00000010 //< CAN1TX on PF1 +#define GPIO_PCTL_PF1_IDX1 0x00000020 //< IDX1 on PF1 +#define GPIO_PCTL_PF1_PWM1 0x00000030 //< PWM1 on PF1 +#define GPIO_PCTL_PF1_I2S0TXMCLK \ + 0x00000080 //< I2S0TXMCLK on PF1 +#define GPIO_PCTL_PF1_U1RTS 0x00000090 //< U1RTS on PF1 +#define GPIO_PCTL_PF1_CCP3 0x000000A0 //< CCP3 on PF1 +#define GPIO_PCTL_PF2_M 0x00000F00 //< PF2 mask +#define GPIO_PCTL_PF2_LED1 0x00000100 //< LED1 on PF2 +#define GPIO_PCTL_PF2_PWM4 0x00000200 //< PWM4 on PF2 +#define GPIO_PCTL_PF2_PWM2 0x00000400 //< PWM2 on PF2 +#define GPIO_PCTL_PF2_SSI1CLK 0x00000900 //< SSI1CLK on PF2 +#define GPIO_PCTL_PF3_M 0x0000F000 //< PF3 mask +#define GPIO_PCTL_PF3_LED0 0x00001000 //< LED0 on PF3 +#define GPIO_PCTL_PF3_PWM5 0x00002000 //< PWM5 on PF3 +#define GPIO_PCTL_PF3_PWM3 0x00004000 //< PWM3 on PF3 +#define GPIO_PCTL_PF3_SSI1FSS 0x00009000 //< SSI1FSS on PF3 +#define GPIO_PCTL_PF4_M 0x000F0000 //< PF4 mask +#define GPIO_PCTL_PF4_CCP0 0x00010000 //< CCP0 on PF4 +#define GPIO_PCTL_PF4_C0O 0x00020000 //< C0O on PF4 +#define GPIO_PCTL_PF4_FAULT0 0x00040000 //< FAULT0 on PF4 +#define GPIO_PCTL_PF4_EPI0S12 0x00080000 //< EPI0S12 on PF4 +#define GPIO_PCTL_PF4_SSI1RX 0x00090000 //< SSI1RX on PF4 +#define GPIO_PCTL_PF5_M 0x00F00000 //< PF5 mask +#define GPIO_PCTL_PF5_CCP2 0x00100000 //< CCP2 on PF5 +#define GPIO_PCTL_PF5_C1O 0x00200000 //< C1O on PF5 +#define GPIO_PCTL_PF5_EPI0S15 0x00800000 //< EPI0S15 on PF5 +#define GPIO_PCTL_PF5_SSI1TX 0x00900000 //< SSI1TX on PF5 +#define GPIO_PCTL_PF6_M 0x0F000000 //< PF6 mask +#define GPIO_PCTL_PF6_CCP1 0x01000000 //< CCP1 on PF6 +#define GPIO_PCTL_PF6_C2O 0x02000000 //< C2O on PF6 +#define GPIO_PCTL_PF6_PHA0 0x04000000 //< PHA0 on PF6 +#define GPIO_PCTL_PF6_I2S0TXMCLK \ + 0x09000000 //< I2S0TXMCLK on PF6 +#define GPIO_PCTL_PF6_U1RTS 0x0A000000 //< U1RTS on PF6 +#define GPIO_PCTL_PF7_M 0xF0000000 //< PF7 mask +#define GPIO_PCTL_PF7_CCP4 0x10000000 //< CCP4 on PF7 +#define GPIO_PCTL_PF7_PHB0 0x40000000 //< PHB0 on PF7 +#define GPIO_PCTL_PF7_EPI0S12 0x80000000 //< EPI0S12 on PF7 +#define GPIO_PCTL_PF7_FAULT1 0x90000000 //< FAULT1 on PF7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port G. + */ +/*\{*/ +#define GPIO_PCTL_PG0_M 0x0000000F //< PG0 mask +#define GPIO_PCTL_PG0_U2RX 0x00000001 //< U2RX on PG0 +#define GPIO_PCTL_PG0_PWM0 0x00000002 //< PWM0 on PG0 +#define GPIO_PCTL_PG0_I2C1SCL 0x00000003 //< I2C1SCL on PG0 +#define GPIO_PCTL_PG0_PWM4 0x00000004 //< PWM4 on PG0 +#define GPIO_PCTL_PG0_USB0EPEN 0x00000007 //< USB0EPEN on PG0 +#define GPIO_PCTL_PG0_EPI0S13 0x00000008 //< EPI0S13 on PG0 +#define GPIO_PCTL_PG1_M 0x000000F0 //< PG1 mask +#define GPIO_PCTL_PG1_U2TX 0x00000010 //< U2TX on PG1 +#define GPIO_PCTL_PG1_PWM1 0x00000020 //< PWM1 on PG1 +#define GPIO_PCTL_PG1_I2C1SDA 0x00000030 //< I2C1SDA on PG1 +#define GPIO_PCTL_PG1_PWM5 0x00000040 //< PWM5 on PG1 +#define GPIO_PCTL_PG1_EPI0S14 0x00000080 //< EPI0S14 on PG1 +#define GPIO_PCTL_PG2_M 0x00000F00 //< PG2 mask +#define GPIO_PCTL_PG2_PWM0 0x00000100 //< PWM0 on PG2 +#define GPIO_PCTL_PG2_FAULT0 0x00000400 //< FAULT0 on PG2 +#define GPIO_PCTL_PG2_IDX1 0x00000800 //< IDX1 on PG2 +#define GPIO_PCTL_PG2_I2S0RXSD 0x00000900 //< I2S0RXSD on PG2 +#define GPIO_PCTL_PG3_M 0x0000F000 //< PG3 mask +#define GPIO_PCTL_PG3_PWM1 0x00001000 //< PWM1 on PG3 +#define GPIO_PCTL_PG3_FAULT2 0x00004000 //< FAULT2 on PG3 +#define GPIO_PCTL_PG3_FAULT0 0x00008000 //< FAULT0 on PG3 +#define GPIO_PCTL_PG3_I2S0RXMCLK \ + 0x00009000 //< I2S0RXMCLK on PG3 +#define GPIO_PCTL_PG4_M 0x000F0000 //< PG4 mask +#define GPIO_PCTL_PG4_CCP3 0x00010000 //< CCP3 on PG4 +#define GPIO_PCTL_PG4_FAULT1 0x00040000 //< FAULT1 on PG4 +#define GPIO_PCTL_PG4_EPI0S15 0x00080000 //< EPI0S15 on PG4 +#define GPIO_PCTL_PG4_PWM6 0x00090000 //< PWM6 on PG4 +#define GPIO_PCTL_PG4_U1RI 0x000A0000 //< U1RI on PG4 +#define GPIO_PCTL_PG5_M 0x00F00000 //< PG5 mask +#define GPIO_PCTL_PG5_CCP5 0x00100000 //< CCP5 on PG5 +#define GPIO_PCTL_PG5_IDX0 0x00400000 //< IDX0 on PG5 +#define GPIO_PCTL_PG5_FAULT1 0x00500000 //< FAULT1 on PG5 +#define GPIO_PCTL_PG5_PWM7 0x00800000 //< PWM7 on PG5 +#define GPIO_PCTL_PG5_I2S0RXSCK 0x00900000 //< I2S0RXSCK on PG5 +#define GPIO_PCTL_PG5_U1DTR 0x00A00000 //< U1DTR on PG5 +#define GPIO_PCTL_PG6_M 0x0F000000 //< PG6 mask +#define GPIO_PCTL_PG6_PHA1 0x01000000 //< PHA1 on PG6 +#define GPIO_PCTL_PG6_PWM6 0x04000000 //< PWM6 on PG6 +#define GPIO_PCTL_PG6_FAULT1 0x08000000 //< FAULT1 on PG6 +#define GPIO_PCTL_PG6_I2S0RXWS 0x09000000 //< I2S0RXWS on PG6 +#define GPIO_PCTL_PG6_U1RI 0x0A000000 //< U1RI on PG6 +#define GPIO_PCTL_PG7_M 0xF0000000 //< PG7 mask +#define GPIO_PCTL_PG7_PHB1 0x10000000 //< PHB1 on PG7 +#define GPIO_PCTL_PG7_PWM7 0x40000000 //< PWM7 on PG7 +#define GPIO_PCTL_PG7_CCP5 0x80000000 //< CCP5 on PG7 +#define GPIO_PCTL_PG7_EPI0S31 0x90000000 //< EPI0S31 on PG7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port H. + */ +/*\{*/ +#define GPIO_PCTL_PH0_M 0x0000000F //< PH0 mask +#define GPIO_PCTL_PH0_CCP6 0x00000001 //< CCP6 on PH0 +#define GPIO_PCTL_PH0_PWM2 0x00000002 //< PWM2 on PH0 +#define GPIO_PCTL_PH0_EPI0S6 0x00000008 //< EPI0S6 on PH0 +#define GPIO_PCTL_PH0_PWM4 0x00000009 //< PWM4 on PH0 +#define GPIO_PCTL_PH1_M 0x000000F0 //< PH1 mask +#define GPIO_PCTL_PH1_CCP7 0x00000010 //< CCP7 on PH1 +#define GPIO_PCTL_PH1_PWM3 0x00000020 //< PWM3 on PH1 +#define GPIO_PCTL_PH1_EPI0S7 0x00000080 //< EPI0S7 on PH1 +#define GPIO_PCTL_PH1_PWM5 0x00000090 //< PWM5 on PH1 +#define GPIO_PCTL_PH2_M 0x00000F00 //< PH2 mask +#define GPIO_PCTL_PH2_IDX1 0x00000100 //< IDX1 on PH2 +#define GPIO_PCTL_PH2_C1O 0x00000200 //< C1O on PH2 +#define GPIO_PCTL_PH2_FAULT3 0x00000400 //< FAULT3 on PH2 +#define GPIO_PCTL_PH2_EPI0S1 0x00000800 //< EPI0S1 on PH2 +#define GPIO_PCTL_PH3_M 0x0000F000 //< PH3 mask +#define GPIO_PCTL_PH3_PHB0 0x00001000 //< PHB0 on PH3 +#define GPIO_PCTL_PH3_FAULT0 0x00002000 //< FAULT0 on PH3 +#define GPIO_PCTL_PH3_USB0EPEN 0x00004000 //< USB0EPEN on PH3 +#define GPIO_PCTL_PH3_EPI0S0 0x00008000 //< EPI0S0 on PH3 +#define GPIO_PCTL_PH4_M 0x000F0000 //< PH4 mask +#define GPIO_PCTL_PH4_USB0PFLT 0x00040000 //< USB0PFLT on PH4 +#define GPIO_PCTL_PH4_EPI0S10 0x00080000 //< EPI0S10 on PH4 +#define GPIO_PCTL_PH4_SSI1CLK 0x000B0000 //< SSI1CLK on PH4 +#define GPIO_PCTL_PH5_M 0x00F00000 //< PH5 mask +#define GPIO_PCTL_PH5_EPI0S11 0x00800000 //< EPI0S11 on PH5 +#define GPIO_PCTL_PH5_FAULT2 0x00A00000 //< FAULT2 on PH5 +#define GPIO_PCTL_PH5_SSI1FSS 0x00B00000 //< SSI1FSS on PH5 +#define GPIO_PCTL_PH6_M 0x0F000000 //< PH6 mask +#define GPIO_PCTL_PH6_EPI0S26 0x08000000 //< EPI0S26 on PH6 +#define GPIO_PCTL_PH6_PWM4 0x0A000000 //< PWM4 on PH6 +#define GPIO_PCTL_PH6_SSI1RX 0x0B000000 //< SSI1RX on PH6 +#define GPIO_PCTL_PH7_M 0xF0000000 //< PH7 mask +#define GPIO_PCTL_PH7_EPI0S27 0x80000000 //< EPI0S27 on PH7 +#define GPIO_PCTL_PH7_PWM5 0xA0000000 //< PWM5 on PH7 +#define GPIO_PCTL_PH7_SSI1TX 0xB0000000 //< SSI1TX on PH7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port J. + */ +/*\{*/ +#define GPIO_PCTL_PJ0_M 0x0000000F //< PJ0 mask +#define GPIO_PCTL_PJ0_EPI0S16 0x00000008 //< EPI0S16 on PJ0 +#define GPIO_PCTL_PJ0_PWM0 0x0000000A //< PWM0 on PJ0 +#define GPIO_PCTL_PJ0_I2C1SCL 0x0000000B //< I2C1SCL on PJ0 +#define GPIO_PCTL_PJ1_M 0x000000F0 //< PJ1 mask +#define GPIO_PCTL_PJ1_EPI0S17 0x00000080 //< EPI0S17 on PJ1 +#define GPIO_PCTL_PJ1_USB0PFLT 0x00000090 //< USB0PFLT on PJ1 +#define GPIO_PCTL_PJ1_PWM1 0x000000A0 //< PWM1 on PJ1 +#define GPIO_PCTL_PJ1_I2C1SDA 0x000000B0 //< I2C1SDA on PJ1 +#define GPIO_PCTL_PJ2_M 0x00000F00 //< PJ2 mask +#define GPIO_PCTL_PJ2_EPI0S18 0x00000800 //< EPI0S18 on PJ2 +#define GPIO_PCTL_PJ2_CCP0 0x00000900 //< CCP0 on PJ2 +#define GPIO_PCTL_PJ2_FAULT0 0x00000A00 //< FAULT0 on PJ2 +#define GPIO_PCTL_PJ3_M 0x0000F000 //< PJ3 mask +#define GPIO_PCTL_PJ3_EPI0S19 0x00008000 //< EPI0S19 on PJ3 +#define GPIO_PCTL_PJ3_U1CTS 0x00009000 //< U1CTS on PJ3 +#define GPIO_PCTL_PJ3_CCP6 0x0000A000 //< CCP6 on PJ3 +#define GPIO_PCTL_PJ4_M 0x000F0000 //< PJ4 mask +#define GPIO_PCTL_PJ4_EPI0S28 0x00080000 //< EPI0S28 on PJ4 +#define GPIO_PCTL_PJ4_U1DCD 0x00090000 //< U1DCD on PJ4 +#define GPIO_PCTL_PJ4_CCP4 0x000A0000 //< CCP4 on PJ4 +#define GPIO_PCTL_PJ5_M 0x00F00000 //< PJ5 mask +#define GPIO_PCTL_PJ5_EPI0S29 0x00800000 //< EPI0S29 on PJ5 +#define GPIO_PCTL_PJ5_U1DSR 0x00900000 //< U1DSR on PJ5 +#define GPIO_PCTL_PJ5_CCP2 0x00A00000 //< CCP2 on PJ5 +#define GPIO_PCTL_PJ6_M 0x0F000000 //< PJ6 mask +#define GPIO_PCTL_PJ6_EPI0S30 0x08000000 //< EPI0S30 on PJ6 +#define GPIO_PCTL_PJ6_U1RTS 0x09000000 //< U1RTS on PJ6 +#define GPIO_PCTL_PJ6_CCP1 0x0A000000 //< CCP1 on PJ6 +#define GPIO_PCTL_PJ7_M 0xF0000000 //< PJ7 mask +#define GPIO_PCTL_PJ7_U1DTR 0x90000000 //< U1DTR on PJ7 +#define GPIO_PCTL_PJ7_CCP0 0xA0000000 //< CCP0 on PJ7 +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +/** + * The following are deprecated defines for the GPIO register offsets. + */ +/*\{*/ +#define GPIO_O_PeriphID4 0x00000FD0 +#define GPIO_O_PeriphID5 0x00000FD4 +#define GPIO_O_PeriphID6 0x00000FD8 +#define GPIO_O_PeriphID7 0x00000FDC +#define GPIO_O_PeriphID0 0x00000FE0 +#define GPIO_O_PeriphID1 0x00000FE4 +#define GPIO_O_PeriphID2 0x00000FE8 +#define GPIO_O_PeriphID3 0x00000FEC +#define GPIO_O_PCellID0 0x00000FF0 +#define GPIO_O_PCellID1 0x00000FF4 +#define GPIO_O_PCellID2 0x00000FF8 +#define GPIO_O_PCellID3 0x00000FFC +/*\}*/ + +/** + * The following are deprecated defines for the GPIO Register reset values. + */ +/*\{*/ +#define GPIO_RV_DEN 0x000000FF //< Digital input enable reg RV +#define GPIO_RV_PUR 0x000000FF //< Pull up select reg RV +#define GPIO_RV_DR2R 0x000000FF //< 2ma drive select reg RV +#define GPIO_RV_PCellID1 0x000000F0 +#define GPIO_RV_PCellID3 0x000000B1 +#define GPIO_RV_PeriphID0 0x00000061 +#define GPIO_RV_PeriphID1 0x00000010 +#define GPIO_RV_PCellID0 0x0000000D +#define GPIO_RV_PCellID2 0x00000005 +#define GPIO_RV_PeriphID2 0x00000004 +#define GPIO_RV_LOCK 0x00000001 //< Lock register RV +#define GPIO_RV_PeriphID7 0x00000000 +#define GPIO_RV_PDR 0x00000000 //< Pull down select reg RV +#define GPIO_RV_IC 0x00000000 //< Interrupt clear reg RV +#define GPIO_RV_SLR 0x00000000 //< Slew rate control enable reg RV +#define GPIO_RV_ODR 0x00000000 //< Open drain select reg RV +#define GPIO_RV_IBE 0x00000000 //< Interrupt both edges reg RV +#define GPIO_RV_AFSEL 0x00000000 //< Mode control select reg RV +#define GPIO_RV_IS 0x00000000 //< Interrupt sense reg RV +#define GPIO_RV_IM 0x00000000 //< Interrupt mask reg RV +#define GPIO_RV_PeriphID4 0x00000000 +#define GPIO_RV_PeriphID5 0x00000000 +#define GPIO_RV_DR8R 0x00000000 //< 8ma drive select reg RV +#define GPIO_RV_RIS 0x00000000 //< Raw interrupt status reg RV +#define GPIO_RV_DR4R 0x00000000 //< 4ma drive select reg RV +#define GPIO_RV_IEV 0x00000000 //< Intterupt event reg RV +#define GPIO_RV_DIR 0x00000000 //< Data direction reg RV +#define GPIO_RV_PeriphID6 0x00000000 +#define GPIO_RV_PeriphID3 0x00000000 +#define GPIO_RV_DATA 0x00000000 //< Data register reset value +#define GPIO_RV_MIS 0x00000000 //< Masked interrupt status reg RV +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S_GPIO_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_ints.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_ints.h new file mode 100644 index 00000000..278c19d4 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_ints.h @@ -0,0 +1,130 @@ +/** + * \file + * + * + * \brief LM3S1968 interrupts definition. + */ + +#ifndef LM3S_INTS_H +#define LM3S_INTS_H + +/** + * The following are defines for the fault assignments. + */ +/*\{*/ +#define FAULT_NMI 2 ///< NMI fault +#define FAULT_HARD 3 ///< Hard fault +#define FAULT_MPU 4 ///< MPU fault +#define FAULT_BUS 5 ///< Bus fault +#define FAULT_USAGE 6 ///< Usage fault +#define FAULT_SVCALL 11 ///< SVCall +#define FAULT_DEBUG 12 ///< Debug monitor +#define FAULT_PENDSV 14 ///< PendSV +#define FAULT_SYSTICK 15 ///< System Tick +/*\}*/ + +/** + * The following are defines for the interrupt assignments. + */ +/*\{*/ +#define INT_GPIOA 16 ///< GPIO Port A +#define INT_GPIOB 17 ///< GPIO Port B +#define INT_GPIOC 18 ///< GPIO Port C +#define INT_GPIOD 19 ///< GPIO Port D +#define INT_GPIOE 20 ///< GPIO Port E +#define INT_UART0 21 ///< UART0 Rx and Tx +#define INT_UART1 22 ///< UART1 Rx and Tx +#define INT_SSI0 23 ///< SSI0 Rx and Tx +#define INT_I2C0 24 ///< I2C0 Master and Slave +#define INT_PWM_FAULT 25 ///< PWM Fault +#define INT_PWM0 26 ///< PWM Generator 0 +#define INT_PWM1 27 ///< PWM Generator 1 +#define INT_PWM2 28 ///< PWM Generator 2 +#define INT_QEI0 29 ///< Quadrature Encoder 0 +#define INT_ADC0 30 ///< ADC Sequence 0 +#define INT_ADC1 31 ///< ADC Sequence 1 +#define INT_ADC2 32 ///< ADC Sequence 2 +#define INT_ADC3 33 ///< ADC Sequence 3 +#define INT_WATCHDOG 34 ///< Watchdog timer +#define INT_TIMER0A 35 ///< Timer 0 subtimer A +#define INT_TIMER0B 36 ///< Timer 0 subtimer B +#define INT_TIMER1A 37 ///< Timer 1 subtimer A +#define INT_TIMER1B 38 ///< Timer 1 subtimer B +#define INT_TIMER2A 39 ///< Timer 2 subtimer A +#define INT_TIMER2B 40 ///< Timer 2 subtimer B +#define INT_COMP0 41 ///< Analog Comparator 0 +#define INT_COMP1 42 ///< Analog Comparator 1 +#define INT_COMP2 43 ///< Analog Comparator 2 +#define INT_SYSCTL 44 ///< System Control (PLL, OSC, BO) +#define INT_FLASH 45 ///< FLASH Control +#define INT_GPIOF 46 ///< GPIO Port F +#define INT_GPIOG 47 ///< GPIO Port G +#define INT_GPIOH 48 ///< GPIO Port H +#define INT_UART2 49 ///< UART2 Rx and Tx +#define INT_SSI1 50 ///< SSI1 Rx and Tx +#define INT_TIMER3A 51 ///< Timer 3 subtimer A +#define INT_TIMER3B 52 ///< Timer 3 subtimer B +#define INT_I2C1 53 ///< I2C1 Master and Slave +#define INT_QEI1 54 ///< Quadrature Encoder 1 +#define INT_CAN0 55 ///< CAN0 +#define INT_CAN1 56 ///< CAN1 +#define INT_CAN2 57 ///< CAN2 +#define INT_ETH 58 ///< Ethernet +#define INT_HIBERNATE 59 ///< Hibernation module +#define INT_USB0 60 ///< USB 0 Controller +#define INT_PWM3 61 ///< PWM Generator 3 +#define INT_UDMA 62 ///< uDMA controller +#define INT_UDMAERR 63 ///< uDMA Error +#define INT_ADC1SS0 64 ///< ADC1 Sequence 0 +#define INT_ADC1SS1 65 ///< ADC1 Sequence 1 +#define INT_ADC1SS2 66 ///< ADC1 Sequence 2 +#define INT_ADC1SS3 67 ///< ADC1 Sequence 3 +#define INT_I2S0 68 ///< I2S0 +#define INT_EPI0 69 ///< EPI0 +#define INT_GPIOJ 70 ///< GPIO Port J +/*\}*/ + +/** + * The following are defines for the total number of interrupts. + */ +/*\{*/ +#define NUM_INTERRUPTS 71 +/*\}*/ + +/** + * The following are defines for the total number of priority levels. + */ +/*\{*/ +#define NUM_PRIORITY 8 +#define NUM_PRIORITY_BITS 3 +/*\}*/ + +#endif /* LM3S_INTS_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_memmap.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_memmap.h new file mode 100644 index 00000000..33993d9b --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_memmap.h @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief LM3S1968 memory map. + */ + +#ifndef LM3S_MEMMAP_H +#define LM3S_MEMMAP_H + +/** + * The following are defines for the base address of the memories and + * peripherals. + */ +/*\{*/ +#define FLASH_BASE 0x00000000 //< FLASH memory +#define SRAM_BASE 0x20000000 //< SRAM memory +#define WATCHDOG0_BASE 0x40000000 //< Watchdog0 +#define WATCHDOG1_BASE 0x40001000 //< Watchdog1 +#define GPIO_PORTA_BASE 0x40004000 //< GPIO Port A +#define GPIO_PORTB_BASE 0x40005000 //< GPIO Port B +#define GPIO_PORTC_BASE 0x40006000 //< GPIO Port C +#define GPIO_PORTD_BASE 0x40007000 //< GPIO Port D +#define SSI0_BASE 0x40008000 //< SSI0 +#define SSI1_BASE 0x40009000 //< SSI1 +#define UART0_BASE 0x4000C000 //< UART0 +#define UART1_BASE 0x4000D000 //< UART1 +#define UART2_BASE 0x4000E000 //< UART2 +#define I2C0_MASTER_BASE 0x40020000 //< I2C0 Master +#define I2C0_SLAVE_BASE 0x40020800 //< I2C0 Slave +#define I2C1_MASTER_BASE 0x40021000 //< I2C1 Master +#define I2C1_SLAVE_BASE 0x40021800 //< I2C1 Slave +#define GPIO_PORTE_BASE 0x40024000 //< GPIO Port E +#define GPIO_PORTF_BASE 0x40025000 //< GPIO Port F +#define GPIO_PORTG_BASE 0x40026000 //< GPIO Port G +#define GPIO_PORTH_BASE 0x40027000 //< GPIO Port H +#define PWM_BASE 0x40028000 //< PWM +#define QEI0_BASE 0x4002C000 //< QEI0 +#define QEI1_BASE 0x4002D000 //< QEI1 +#define TIMER0_BASE 0x40030000 //< Timer0 +#define TIMER1_BASE 0x40031000 //< Timer1 +#define TIMER2_BASE 0x40032000 //< Timer2 +#define TIMER3_BASE 0x40033000 //< Timer3 +#define ADC0_BASE 0x40038000 //< ADC0 +#define ADC1_BASE 0x40039000 //< ADC1 +#define COMP_BASE 0x4003C000 //< Analog comparators +#define GPIO_PORTJ_BASE 0x4003D000 //< GPIO Port J +#define CAN0_BASE 0x40040000 //< CAN0 +#define CAN1_BASE 0x40041000 //< CAN1 +#define CAN2_BASE 0x40042000 //< CAN2 +#define ETH_BASE 0x40048000 //< Ethernet +#define MAC_BASE 0x40048000 //< Ethernet +#define USB0_BASE 0x40050000 //< USB 0 Controller +#define I2S0_BASE 0x40054000 //< I2S0 +#define GPIO_PORTA_AHB_BASE 0x40058000 //< GPIO Port A (high speed) +#define GPIO_PORTB_AHB_BASE 0x40059000 //< GPIO Port B (high speed) +#define GPIO_PORTC_AHB_BASE 0x4005A000 //< GPIO Port C (high speed) +#define GPIO_PORTD_AHB_BASE 0x4005B000 //< GPIO Port D (high speed) +#define GPIO_PORTE_AHB_BASE 0x4005C000 //< GPIO Port E (high speed) +#define GPIO_PORTF_AHB_BASE 0x4005D000 //< GPIO Port F (high speed) +#define GPIO_PORTG_AHB_BASE 0x4005E000 //< GPIO Port G (high speed) +#define GPIO_PORTH_AHB_BASE 0x4005F000 //< GPIO Port H (high speed) +#define GPIO_PORTJ_AHB_BASE 0x40060000 //< GPIO Port J (high speed) +#define EPI0_BASE 0x400D0000 //< EPI0 +#define HIB_BASE 0x400FC000 //< Hibernation Module +#define FLASH_CTRL_BASE 0x400FD000 //< FLASH Controller +#define SYSCTL_BASE 0x400FE000 //< System Control +#define UDMA_BASE 0x400FF000 //< uDMA Controller +#define ITM_BASE 0xE0000000 //< Instrumentation Trace Macrocell +#define DWT_BASE 0xE0001000 //< Data Watchpoint and Trace +#define FPB_BASE 0xE0002000 //< FLASH Patch and Breakpoint +#define NVIC_BASE 0xE000E000 //< Nested Vectored Interrupt Ctrl +#define TPIU_BASE 0xE0040000 //< Trace Port Interface Unit +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +#define WATCHDOG_BASE 0x40000000 //< Watchdog +#define SSI_BASE 0x40008000 //< SSI +#define I2C_MASTER_BASE 0x40020000 //< I2C Master +#define I2C_SLAVE_BASE 0x40020800 //< I2C Slave +#define QEI_BASE 0x4002C000 //< QEI +#define ADC_BASE 0x40038000 //< ADC + +#endif /* DEPRECATED */ + +#endif /* LM3S_MEMMAP_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_nvic.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_nvic.h new file mode 100644 index 00000000..08cc5abf --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_nvic.h @@ -0,0 +1,1037 @@ +/** + * \file + * + * + * \brief LM3S1968 NVIC hardware. + */ + +#ifndef LM3S_NVIC_H +#define LM3S_NVIC_H + +/** + * The following are defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_INT_TYPE 0xE000E004 ///< Interrupt Controller Type Reg +#define NVIC_ST_CTRL 0xE000E010 ///< SysTick Control and Status Reg +#define NVIC_ST_RELOAD 0xE000E014 ///< SysTick Reload Value Register +#define NVIC_ST_CURRENT 0xE000E018 ///< SysTick Current Value Register +#define NVIC_ST_CAL 0xE000E01C ///< SysTick Calibration Value Reg +#define NVIC_EN0 0xE000E100 ///< IRQ 0 to 31 Set Enable Register +#define NVIC_EN1 0xE000E104 ///< IRQ 32 to 63 Set Enable Register +#define NVIC_DIS0 0xE000E180 ///< IRQ 0 to 31 Clear Enable Reg +#define NVIC_DIS1 0xE000E184 ///< IRQ 32 to 63 Clear Enable Reg +#define NVIC_PEND0 0xE000E200 ///< IRQ 0 to 31 Set Pending Register +#define NVIC_PEND1 0xE000E204 ///< IRQ 32 to 63 Set Pending Reg +#define NVIC_UNPEND0 0xE000E280 ///< IRQ 0 to 31 Clear Pending Reg +#define NVIC_UNPEND1 0xE000E284 ///< IRQ 32 to 63 Clear Pending Reg +#define NVIC_ACTIVE0 0xE000E300 ///< IRQ 0 to 31 Active Register +#define NVIC_ACTIVE1 0xE000E304 ///< IRQ 32 to 63 Active Register +#define NVIC_PRI0 0xE000E400 ///< IRQ 0 to 3 Priority Register +#define NVIC_PRI1 0xE000E404 ///< IRQ 4 to 7 Priority Register +#define NVIC_PRI2 0xE000E408 ///< IRQ 8 to 11 Priority Register +#define NVIC_PRI3 0xE000E40C ///< IRQ 12 to 15 Priority Register +#define NVIC_PRI4 0xE000E410 ///< IRQ 16 to 19 Priority Register +#define NVIC_PRI5 0xE000E414 ///< IRQ 20 to 23 Priority Register +#define NVIC_PRI6 0xE000E418 ///< IRQ 24 to 27 Priority Register +#define NVIC_PRI7 0xE000E41C ///< IRQ 28 to 31 Priority Register +#define NVIC_PRI8 0xE000E420 ///< IRQ 32 to 35 Priority Register +#define NVIC_PRI9 0xE000E424 ///< IRQ 36 to 39 Priority Register +#define NVIC_PRI10 0xE000E428 ///< IRQ 40 to 43 Priority Register +#define NVIC_PRI11 0xE000E42C ///< IRQ 44 to 47 Priority Register +#define NVIC_PRI12 0xE000E430 ///< IRQ 48 to 51 Priority Register +#define NVIC_PRI13 0xE000E434 ///< IRQ 52 to 55 Priority Register +#define NVIC_CPUID 0xE000ED00 ///< CPUID Base Register +#define NVIC_INT_CTRL 0xE000ED04 ///< Interrupt Control State Register +#define NVIC_VTABLE 0xE000ED08 ///< Vector Table Offset Register +#define NVIC_APINT 0xE000ED0C ///< App. Int & Reset Control Reg +#define NVIC_SYS_CTRL 0xE000ED10 ///< System Control Register +#define NVIC_CFG_CTRL 0xE000ED14 ///< Configuration Control Register +#define NVIC_SYS_PRI1 0xE000ED18 ///< Sys. Handlers 4 to 7 Priority +#define NVIC_SYS_PRI2 0xE000ED1C ///< Sys. Handlers 8 to 11 Priority +#define NVIC_SYS_PRI3 0xE000ED20 ///< Sys. Handlers 12 to 15 Priority +#define NVIC_SYS_HND_CTRL 0xE000ED24 ///< System Handler Control and State +#define NVIC_FAULT_STAT 0xE000ED28 ///< Configurable Fault Status Reg +#define NVIC_HFAULT_STAT 0xE000ED2C ///< Hard Fault Status Register +#define NVIC_DEBUG_STAT 0xE000ED30 ///< Debug Status Register +#define NVIC_MM_ADDR 0xE000ED34 ///< Mem Manage Address Register +#define NVIC_FAULT_ADDR 0xE000ED38 ///< Bus Fault Address Register +#define NVIC_MPU_TYPE 0xE000ED90 ///< MPU Type Register +#define NVIC_MPU_CTRL 0xE000ED94 ///< MPU Control Register +#define NVIC_MPU_NUMBER 0xE000ED98 ///< MPU Region Number Register +#define NVIC_MPU_BASE 0xE000ED9C ///< MPU Region Base Address Register +#define NVIC_MPU_ATTR 0xE000EDA0 ///< MPU Region Attribute & Size Reg +#define NVIC_DBG_CTRL 0xE000EDF0 ///< Debug Control and Status Reg +#define NVIC_DBG_XFER 0xE000EDF4 ///< Debug Core Reg. Transfer Select +#define NVIC_DBG_DATA 0xE000EDF8 ///< Debug Core Register Data +#define NVIC_DBG_INT 0xE000EDFC ///< Debug Reset Interrupt Control +#define NVIC_SW_TRIG 0xE000EF00 ///< Software Trigger Interrupt Reg +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT + * register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL + * register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT + * register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT + * register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT + * register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR + * register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER + * register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + +#endif /* LM3S_NVIC_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_pwm.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_pwm.h new file mode 100644 index 00000000..ec19d2f4 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_pwm.h @@ -0,0 +1,543 @@ +/** + * \file + * + * + * \brief LM3S1968 PWM hardware definitions. + */ + +#ifndef L3MS_PWM_H +#define L3MS_PWM_H + +/** + * The following are defines for the PWM register offsets. + */ +#define PWM_O_CTL (*((reg32_t *)(PWMC_BASE + 0x00000000))) //< PWM Master Control +#define PWM_O_SYNC (*((reg32_t *)(PWMC_BASE + 0x00000004))) //< PWM Time Base Sync +#define PWM_O_ENABLE (*((reg32_t *)(PWMC_BASE + 0x00000008))) //< PWM Output Enable +#define PWM_O_INVERT (*((reg32_t *)(PWMC_BASE + 0x0000000C))) //< PWM Output Inversion +#define PWM_O_FAULT (*((reg32_t *)(PWMC_BASE + 0x00000010))) //< PWM Output Fault +#define PWM_O_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000014))) //< PWM Interrupt Enable +#define PWM_O_RIS (*((reg32_t *)(PWMC_BASE + 0x00000018))) //< PWM Raw Interrupt Status +#define PWM_O_ISC (*((reg32_t *)(PWMC_BASE + 0x0000001C))) //< PWM Interrupt Status and Clear +#define PWM_O_STATUS (*((reg32_t *)(PWMC_BASE + 0x00000020))) //< PWM Status +#define PWM_O_FAULTVAL (*((reg32_t *)(PWMC_BASE + 0x00000024))) //< PWM Fault Condition Value +#define PWM_O_ENUPD (*((reg32_t *)(PWMC_BASE + 0x00000028))) //< PWM Enable Update +#define PWM_O_0_CTL (*((reg32_t *)(PWMC_BASE + 0x00000040))) //< PWM0 Control +#define PWM_O_0_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000044))) //< PWM0 Interrupt and Trigger Enable +#define PWM_O_0_RIS (*((reg32_t *)(PWMC_BASE + 0x00000048))) //< PWM0 Raw Interrupt Status +#define PWM_O_0_ISC (*((reg32_t *)(PWMC_BASE + 0x0000004C))) //< PWM0 Interrupt Status and Clear +#define PWM_O_0_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000050))) //< PWM0 Load +#define PWM_O_0_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000054))) //< PWM0 Counter +#define PWM_O_0_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000058))) //< PWM0 Compare A +#define PWM_O_0_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000005C))) //< PWM0 Compare B +#define PWM_O_0_GENA (*((reg32_t *)(PWMC_BASE + 0x00000060))) //< PWM0 Generator A Control +#define PWM_O_0_GENB (*((reg32_t *)(PWMC_BASE + 0x00000064))) //< PWM0 Generator B Control +#define PWM_O_0_DBCTL (*((reg32_t *)(PWMC_BASE + 0x00000068))) //< PWM0 Dead-Band Control +#define PWM_O_0_DBRISE (*((reg32_t *)(PWMC_BASE + 0x0000006C))) //< PWM0 Dead-Band Rising-Edge Delay +#define PWM_O_0_DBFALL (*((reg32_t *)(PWMC_BASE + 0x00000070))) //< PWM0 Dead-Band Falling-Edge-Delay +#define PWM_O_0_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x00000074))) //< PWM0 Fault Source 0 +#define PWM_O_0_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x00000078))) //< PWM0 Fault Source 1 +#define PWM_O_0_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x0000007C))) //< PWM0 Minimum Fault Period +#define PWM_O_1_CTL (*((reg32_t *)(PWMC_BASE + 0x00000080))) //< PWM1 Control +#define PWM_O_1_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000084))) //< PWM1 Interrupt and Trigger Enable +#define PWM_O_1_RIS (*((reg32_t *)(PWMC_BASE + 0x00000088))) //< PWM1 Raw Interrupt Status +#define PWM_O_1_ISC (*((reg32_t *)(PWMC_BASE + 0x0000008C))) //< PWM1 Interrupt Status and Clear +#define PWM_O_1_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000090))) //< PWM1 Load +#define PWM_O_1_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000094))) //< PWM1 Counter +#define PWM_O_1_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000098))) //< PWM1 Compare A +#define PWM_O_1_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000009C))) //< PWM1 Compare B +#define PWM_O_1_GENA (*((reg32_t *)(PWMC_BASE + 0x000000A0))) //< PWM1 Generator A Control +#define PWM_O_1_GENB (*((reg32_t *)(PWMC_BASE + 0x000000A4))) //< PWM1 Generator B Control +#define PWM_O_1_DBCTL (*((reg32_t *)(PWMC_BASE + 0x000000A8))) //< PWM1 Dead-Band Control +#define PWM_O_1_DBRISE (*((reg32_t *)(PWMC_BASE + 0x000000AC))) //< PWM1 Dead-Band Rising-Edge Delay +#define PWM_O_1_DBFALL (*((reg32_t *)(PWMC_BASE + 0x000000B0))) //< PWM1 Dead-Band Falling-Edge-Delay +#define PWM_O_1_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x000000B4))) //< PWM1 Fault Source 0 +#define PWM_O_1_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x000000B8))) //< PWM1 Fault Source 1 +#define PWM_O_1_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x000000BC))) //< PWM1 Minimum Fault Period +#define PWM_O_2_CTL (*((reg32_t *)(PWMC_BASE + 0x000000C0))) //< PWM2 Control +#define PWM_O_2_INTEN (*((reg32_t *)(PWMC_BASE + 0x000000C4))) //< PWM2 Interrupt and Trigger Enable +#define PWM_O_2_RIS (*((reg32_t *)(PWMC_BASE + 0x000000C8))) //< PWM2 Raw Interrupt Status +#define PWM_O_2_ISC (*((reg32_t *)(PWMC_BASE + 0x000000CC))) //< PWM2 Interrupt Status and Clear +#define PWM_O_2_LOAD (*((reg32_t *)(PWMC_BASE + 0x000000D0))) //< PWM2 Load +#define PWM_O_2_COUNT (*((reg32_t *)(PWMC_BASE + 0x000000D4))) //< PWM2 Counter +#define PWM_O_2_CMPA (*((reg32_t *)(PWMC_BASE + 0x000000D8))) //< PWM2 Compare A +#define PWM_O_2_CMPB (*((reg32_t *)(PWMC_BASE + 0x000000DC))) //< PWM2 Compare B +#define PWM_O_2_GENA (*((reg32_t *)(PWMC_BASE + 0x000000E0))) //< PWM2 Generator A Control +#define PWM_O_2_GENB (*((reg32_t *)(PWMC_BASE + 0x000000E4))) //< PWM2 Generator B Control +#define PWM_O_2_DBCTL (*((reg32_t *)(PWMC_BASE + 0x000000E8))) //< PWM2 Dead-Band Control +#define PWM_O_2_DBRISE (*((reg32_t *)(PWMC_BASE + 0x000000EC))) //< PWM2 Dead-Band Rising-Edge Delay +#define PWM_O_2_DBFALL (*((reg32_t *)(PWMC_BASE + 0x000000F0))) //< PWM2 Dead-Band Falling-Edge-Delay +#define PWM_O_2_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x000000F4))) //< PWM2 Fault Source 0 +#define PWM_O_2_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x000000F8))) //< PWM2 Fault Source 1 +#define PWM_O_2_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x000000FC))) //< PWM2 Minimum Fault Period +#define PWM_O_3_CTL (*((reg32_t *)(PWMC_BASE + 0x00000100))) //< PWM3 Control +#define PWM_O_3_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000104))) //< PWM3 Interrupt and Trigger Enable +#define PWM_O_3_RIS (*((reg32_t *)(PWMC_BASE + 0x00000108))) //< PWM3 Raw Interrupt Status +#define PWM_O_3_ISC (*((reg32_t *)(PWMC_BASE + 0x0000010C))) //< PWM3 Interrupt Status and Clear +#define PWM_O_3_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000110))) //< PWM3 Load +#define PWM_O_3_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000114))) //< PWM3 Counter +#define PWM_O_3_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000118))) //< PWM3 Compare A +#define PWM_O_3_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000011C))) //< PWM3 Compare B +#define PWM_O_3_GENA (*((reg32_t *)(PWMC_BASE + 0x00000120))) //< PWM3 Generator A Control +#define PWM_O_3_GENB (*((reg32_t *)(PWMC_BASE + 0x00000124))) //< PWM3 Generator B Control +#define PWM_O_3_DBCTL (*((reg32_t *)(PWMC_BASE + 0x00000128))) //< PWM3 Dead-Band Control +#define PWM_O_3_DBRISE (*((reg32_t *)(PWMC_BASE + 0x0000012C))) //< PWM3 Dead-Band Rising-Edge Delay +#define PWM_O_3_DBFALL (*((reg32_t *)(PWMC_BASE + 0x00000130))) //< PWM3 Dead-Band Falling-Edge-Delay +#define PWM_O_3_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x00000134))) //< PWM3 Fault Source 0 +#define PWM_O_3_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x00000138))) //< PWM3 Fault Source 1 +#define PWM_O_3_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x0000013C))) //< PWM3 Minimum Fault Period +#define PWM_O_0_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000800))) //< PWM0 Fault Pin Logic Sense +#define PWM_O_0_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000804))) //< PWM0 Fault Status 0 +#define PWM_O_0_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000808))) //< PWM0 Fault Status 1 +#define PWM_O_1_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000880))) //< PWM1 Fault Pin Logic Sense +#define PWM_O_1_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000884))) //< PWM1 Fault Status 0 +#define PWM_O_1_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000888))) //< PWM1 Fault Status 1 +#define PWM_O_2_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000900))) //< PWM2 Fault Pin Logic Sense +#define PWM_O_2_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000904))) //< PWM2 Fault Status 0 +#define PWM_O_2_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000908))) //< PWM2 Fault Status 1 +#define PWM_O_3_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000980))) //< PWM3 Fault Pin Logic Sense +#define PWM_O_3_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000984))) //< PWM3 Fault Status 0 +#define PWM_O_3_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000988))) //< PWM3 Fault Status 1 + +/** + * Defines for the bit fields in the PWM_O_CTL register. + */ +#define PWM_CTL_GLOBALSYNC3 3 //< Update PWM Generator 3 +#define PWM_CTL_GLOBALSYNC2 2 //< Update PWM Generator 2 +#define PWM_CTL_GLOBALSYNC1 1 //< Update PWM Generator 1 +#define PWM_CTL_GLOBALSYNC0 0 //< Update PWM Generator 0 + +/** + * Defines for the bit fields in the PWM_O_SYNC register. + */ +#define PWM_SYNC_SYNC3 3 //< Reset Generator 3 Counter +#define PWM_SYNC_SYNC2 2 //< Reset Generator 2 Counter +#define PWM_SYNC_SYNC1 1 //< Reset Generator 1 Counter +#define PWM_SYNC_SYNC0 0 //< Reset Generator 0 Counter + +/** + * Defines for the bit fields in the PWM_O_ENABLE register. + */ +#define PWM_ENABLE_PWM7EN 7 //< PWM7 Output Enable +#define PWM_ENABLE_PWM6EN 6 //< PWM6 Output Enable +#define PWM_ENABLE_PWM5EN 5 //< PWM5 Output Enable +#define PWM_ENABLE_PWM4EN 4 //< PWM4 Output Enable +#define PWM_ENABLE_PWM3EN 3 //< PWM3 Output Enable +#define PWM_ENABLE_PWM2EN 2 //< PWM2 Output Enable +#define PWM_ENABLE_PWM1EN 1 //< PWM1 Output Enable +#define PWM_ENABLE_PWM0EN 0 //< PWM0 Output Enable + +/** + * Defines for the bit fields in the PWM_O_INVERT register. + */ +#define PWM_INVERT_PWM7INV 7 //< Invert PWM7 Signal +#define PWM_INVERT_PWM6INV 6 //< Invert PWM6 Signal +#define PWM_INVERT_PWM5INV 5 //< Invert PWM5 Signal +#define PWM_INVERT_PWM4INV 4 //< Invert PWM4 Signal +#define PWM_INVERT_PWM3INV 3 //< Invert PWM3 Signal +#define PWM_INVERT_PWM2INV 2 //< Invert PWM2 Signal +#define PWM_INVERT_PWM1INV 1 //< Invert PWM1 Signal +#define PWM_INVERT_PWM0INV 0 //< Invert PWM0 Signal + +/** + * Defines for the bit fields in the PWM_O_FAULT register. + */ +#define PWM_FAULT_FAULT7 7 //< PWM7 Fault +#define PWM_FAULT_FAULT6 6 //< PWM6 Fault +#define PWM_FAULT_FAULT5 5 //< PWM5 Fault +#define PWM_FAULT_FAULT4 4 //< PWM4 Fault +#define PWM_FAULT_FAULT3 3 //< PWM3 Fault +#define PWM_FAULT_FAULT2 2 //< PWM2 Fault +#define PWM_FAULT_FAULT1 1 //< PWM1 Fault +#define PWM_FAULT_FAULT0 0 //< PWM0 Fault + +/** + * Defines for the bit fields in the PWM_O_INTEN register. + */ +#define PWM_INTEN_INTFAULT3 19 //< Interrupt Fault 3 +#define PWM_INTEN_INTFAULT2 18 //< Interrupt Fault 2 +#define PWM_INTEN_INTFAULT1 17 //< Interrupt Fault 1 +#define PWM_INTEN_INTFAULT 16 //< Fault Interrupt Enable +#define PWM_INTEN_INTFAULT0 16 //< Interrupt Fault 0 +#define PWM_INTEN_INTPWM3 3 //< PWM3 Interrupt Enable +#define PWM_INTEN_INTPWM2 2 //< PWM2 Interrupt Enable +#define PWM_INTEN_INTPWM1 1 //< PWM1 Interrupt Enable +#define PWM_INTEN_INTPWM0 0 //< PWM0 Interrupt Enable + +/** + * Defines for the bit fields in the PWM_O_RIS register. + */ +#define PWM_RIS_INTFAULT3 19 //< Interrupt Fault PWM 3 +#define PWM_RIS_INTFAULT2 18 //< Interrupt Fault PWM 2 +#define PWM_RIS_INTFAULT1 17 //< Interrupt Fault PWM 1 +#define PWM_RIS_INTFAULT0 16 //< Interrupt Fault PWM 0 +#define PWM_RIS_INTFAULT 16 //< Fault Interrupt Asserted +#define PWM_RIS_INTPWM3 3 //< PWM3 Interrupt Asserted +#define PWM_RIS_INTPWM2 2 //< PWM2 Interrupt Asserted +#define PWM_RIS_INTPWM1 1 //< PWM1 Interrupt Asserted +#define PWM_RIS_INTPWM0 0 //< PWM0 Interrupt Asserted + +/** + * Defines for the bit fields in the PWM_O_ISC register. + */ +#define PWM_ISC_INTFAULT3 19 //< FAULT3 Interrupt Asserted +#define PWM_ISC_INTFAULT2 18 //< FAULT2 Interrupt Asserted +#define PWM_ISC_INTFAULT1 17 //< FAULT1 Interrupt Asserted +#define PWM_ISC_INTFAULT 16 //< Fault Interrupt Asserted +#define PWM_ISC_INTFAULT0 16 //< FAULT0 Interrupt Asserted +#define PWM_ISC_INTPWM3 3 //< PWM3 Interrupt Status +#define PWM_ISC_INTPWM2 2 //< PWM2 Interrupt Status +#define PWM_ISC_INTPWM1 1 //< PWM1 Interrupt Status +#define PWM_ISC_INTPWM0 0 //< PWM0 Interrupt Status + +/** + * Defines for the bit fields in the PWM_O_STATUS register. + */ +#define PWM_STATUS_FAULT3 3 //< Generator 3 Fault Status +#define PWM_STATUS_FAULT2 2 //< Generator 2 Fault Status +#define PWM_STATUS_FAULT1 1 //< Generator 1 Fault Status +#define PWM_STATUS_FAULT0 0 //< Generator 0 Fault Status + +/** + * Defines for the bit fields in the PWM_O_FAULTVAL register. + */ +#define PWM_FAULTVAL_PWM7 7 //< PWM7 Fault Value +#define PWM_FAULTVAL_PWM6 6 //< PWM6 Fault Value +#define PWM_FAULTVAL_PWM5 5 //< PWM5 Fault Value +#define PWM_FAULTVAL_PWM4 4 //< PWM4 Fault Value +#define PWM_FAULTVAL_PWM3 3 //< PWM3 Fault Value +#define PWM_FAULTVAL_PWM2 2 //< PWM2 Fault Value +#define PWM_FAULTVAL_PWM1 1 //< PWM1 Fault Value +#define PWM_FAULTVAL_PWM0 0 //< PWM0 Fault Value + +/** + * Defines for the bit fields in the PWM_O_ENUPD register. + */ +#define PWM_ENUPD_ENUPD7_M 0x0000C000 //< PWM7 Enable Update Mode +#define PWM_ENUPD_ENUPD7_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD7_LSYNC 0x00008000 //< Locally Synchronized +#define PWM_ENUPD_ENUPD7_GSYNC 0x0000C000 //< Globally Synchronized +#define PWM_ENUPD_ENUPD6_M 0x00003000 //< PWM6 Enable Update Mode +#define PWM_ENUPD_ENUPD6_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD6_LSYNC 0x00002000 //< Locally Synchronized +#define PWM_ENUPD_ENUPD6_GSYNC 0x00003000 //< Globally Synchronized +#define PWM_ENUPD_ENUPD5_M 0x00000C00 //< PWM5 Enable Update Mode +#define PWM_ENUPD_ENUPD5_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD5_LSYNC 0x00000800 //< Locally Synchronized +#define PWM_ENUPD_ENUPD5_GSYNC 0x00000C00 //< Globally Synchronized +#define PWM_ENUPD_ENUPD4_M 0x00000300 //< PWM4 Enable Update Mode +#define PWM_ENUPD_ENUPD4_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD4_LSYNC 0x00000200 //< Locally Synchronized +#define PWM_ENUPD_ENUPD4_GSYNC 0x00000300 //< Globally Synchronized +#define PWM_ENUPD_ENUPD3_M 0x000000C0 //< PWM3 Enable Update Mode +#define PWM_ENUPD_ENUPD3_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD3_LSYNC 0x00000080 //< Locally Synchronized +#define PWM_ENUPD_ENUPD3_GSYNC 0x000000C0 //< Globally Synchronized +#define PWM_ENUPD_ENUPD2_M 0x00000030 //< PWM2 Enable Update Mode +#define PWM_ENUPD_ENUPD2_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD2_LSYNC 0x00000020 //< Locally Synchronized +#define PWM_ENUPD_ENUPD2_GSYNC 0x00000030 //< Globally Synchronized +#define PWM_ENUPD_ENUPD1_M 0x0000000C //< PWM1 Enable Update Mode +#define PWM_ENUPD_ENUPD1_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD1_LSYNC 0x00000008 //< Locally Synchronized +#define PWM_ENUPD_ENUPD1_GSYNC 0x0000000C //< Globally Synchronized +#define PWM_ENUPD_ENUPD0_M 0x00000003 //< PWM0 Enable Update Mode +#define PWM_ENUPD_ENUPD0_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD0_LSYNC 0x00000002 //< Locally Synchronized +#define PWM_ENUPD_ENUPD0_GSYNC 0x00000003 //< Globally Synchronized + +/** + * Defines for the bit fields in the PWM_O_X_CTL register. + */ +#define PWM_X_CTL_LATCH 0x00040000 //< Latch Fault Input +#define PWM_X_CTL_MINFLTPER 0x00020000 //< Minimum Fault Period +#define PWM_X_CTL_FLTSRC 0x00010000 //< Fault Condition Source +#define PWM_X_CTL_DBFALLUPD_M 0x0000C000 //< PWMnDBFALL Update Mode +#define PWM_X_CTL_DBFALLUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_DBFALLUPD_LS 0x00008000 //< Locally Synchronized +#define PWM_X_CTL_DBFALLUPD_GS 0x0000C000 //< Globally Synchronized +#define PWM_X_CTL_DBRISEUPD_M 0x00003000 //< PWMnDBRISE Update Mode +#define PWM_X_CTL_DBRISEUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_DBRISEUPD_LS 0x00002000 //< Locally Synchronized +#define PWM_X_CTL_DBRISEUPD_GS 0x00003000 //< Globally Synchronized +#define PWM_X_CTL_DBCTLUPD_M 0x00000C00 //< PWMnDBCTL Update Mode +#define PWM_X_CTL_DBCTLUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_DBCTLUPD_LS 0x00000800 //< Locally Synchronized +#define PWM_X_CTL_DBCTLUPD_GS 0x00000C00 //< Globally Synchronized +#define PWM_X_CTL_GENBUPD_M 0x00000300 //< PWMnGENB Update Mode +#define PWM_X_CTL_GENBUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_GENBUPD_LS 0x00000200 //< Locally Synchronized +#define PWM_X_CTL_GENBUPD_GS 0x00000300 //< Globally Synchronized +#define PWM_X_CTL_GENAUPD_M 0x000000C0 //< PWMnGENA Update Mode +#define PWM_X_CTL_GENAUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_GENAUPD_LS 0x00000080 //< Locally Synchronized +#define PWM_X_CTL_GENAUPD_GS 0x000000C0 //< Globally Synchronized +#define PWM_X_CTL_CMPBUPD 0x00000020 //< Comparator B Update Mode +#define PWM_X_CTL_CMPAUPD 0x00000010 //< Comparator A Update Mode +#define PWM_X_CTL_LOADUPD 0x00000008 //< Load Register Update Mode +#define PWM_X_CTL_DEBUG 0x00000004 //< Debug Mode +#define PWM_X_CTL_MODE 0x00000002 //< Counter Mode +#define PWM_X_CTL_ENABLE 0x00000001 //< PWM Block Enable + +/** + * Defines for the bit fields in the PWM_O_X_INTEN register. + */ +#define PWM_X_INTEN_TRCMPBD 0x00002000 //< Trigger for Counter=PWMnCMPB Down +#define PWM_X_INTEN_TRCMPBU 0x00001000 //< Trigger for Counter=PWMnCMPB Up +#define PWM_X_INTEN_TRCMPAD 0x00000800 //< Trigger for Counter=PWMnCMPA Down +#define PWM_X_INTEN_TRCMPAU 0x00000400 //< Trigger for Counter=PWMnCMPA Up +#define PWM_X_INTEN_TRCNTLOAD 0x00000200 //< Trigger for Counter=PWMnLOAD +#define PWM_X_INTEN_TRCNTZERO 0x00000100 //< Trigger for Counter=0 +#define PWM_X_INTEN_INTCMPBD 0x00000020 //< Interrupt for Counter=PWMnCMPB Down +#define PWM_X_INTEN_INTCMPBU 0x00000010 //< Interrupt for Counter=PWMnCMPB Up +#define PWM_X_INTEN_INTCMPAD 0x00000008 //< Interrupt for Counter=PWMnCMPA Down +#define PWM_X_INTEN_INTCMPAU 0x00000004 //< Interrupt for Counter=PWMnCMPA Up +#define PWM_X_INTEN_INTCNTLOAD 0x00000002 //< Interrupt for Counter=PWMnLOAD +#define PWM_X_INTEN_INTCNTZERO 0x00000001 //< Interrupt for Counter=0 + +/** + * Defines for the bit fields in the PWM_O_X_RIS register. + */ +#define PWM_X_RIS_INTCMPBD 0x00000020 //< Comparator B Down Interrupt Status +#define PWM_X_RIS_INTCMPBU 0x00000010 //< Comparator B Up Interrupt Status +#define PWM_X_RIS_INTCMPAD 0x00000008 //< Comparator A Down Interrupt Status +#define PWM_X_RIS_INTCMPAU 0x00000004 //< Comparator A Up Interrupt Status +#define PWM_X_RIS_INTCNTLOAD 0x00000002 //< Counter=Load Interrupt Status +#define PWM_X_RIS_INTCNTZERO 0x00000001 //< Counter=0 Interrupt Status + +/** + * Defines for the bit fields in the PWM_O_X_ISC register. + */ +#define PWM_X_ISC_INTCMPBD 0x00000020 //< Comparator B Down Interrupt +#define PWM_X_ISC_INTCMPBU 0x00000010 //< Comparator B Up Interrupt +#define PWM_X_ISC_INTCMPAD 0x00000008 //< Comparator A Down Interrupt +#define PWM_X_ISC_INTCMPAU 0x00000004 //< Comparator A Up Interrupt +#define PWM_X_ISC_INTCNTLOAD 0x00000002 //< Counter=Load Interrupt +#define PWM_X_ISC_INTCNTZERO 0x00000001 //< Counter=0 Interrupt + +/** + * Defines for the bit fields in the PWM_O_X_LOAD register. + */ +#define PWM_X_LOAD_M 0x0000FFFF //< Counter Load Value +#define PWM_X_LOAD_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_COUNT register. + */ +#define PWM_X_COUNT_M 0x0000FFFF //< Counter Value +#define PWM_X_COUNT_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_CMPA register. + */ +#define PWM_X_CMPA_M 0x0000FFFF //< Comparator A Value +#define PWM_X_CMPA_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_CMPB register. + */ +#define PWM_X_CMPB_M 0x0000FFFF //< Comparator B Value +#define PWM_X_CMPB_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_GENA register. + */ +#define PWM_X_GENA_ACTCMPBD_M 0x00000C00 //< Action for Comparator B Down +#define PWM_X_GENA_ACTCMPBD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPBD_INV 0x00000400 //< Invert pwmA +#define PWM_X_GENA_ACTCMPBD_ZERO 0x00000800 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBD_ONE 0x00000C00 //< Drive pwmA High +#define PWM_X_GENA_ACTCMPBU_M 0x00000300 //< Action for Comparator B Up +#define PWM_X_GENA_ACTCMPBU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPBU_INV 0x00000100 //< Invert pwmA +#define PWM_X_GENA_ACTCMPBU_ZERO 0x00000200 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBU_ONE 0x00000300 //< Drive pwmA High +#define PWM_X_GENA_ACTCMPAD_M 0x000000C0 //< Action for Comparator A Down +#define PWM_X_GENA_ACTCMPAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPAD_INV 0x00000040 //< Invert pwmA +#define PWM_X_GENA_ACTCMPAD_ZERO 0x00000080 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAD_ONE 0x000000C0 //< Drive pwmA High +#define PWM_X_GENA_ACTCMPAU_M 0x00000030 //< Action for Comparator A Up +#define PWM_X_GENA_ACTCMPAU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPAU_INV 0x00000010 //< Invert pwmA +#define PWM_X_GENA_ACTCMPAU_ZERO 0x00000020 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAU_ONE 0x00000030 //< Drive pwmA High +#define PWM_X_GENA_ACTLOAD_M 0x0000000C //< Action for Counter=LOAD +#define PWM_X_GENA_ACTLOAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTLOAD_INV 0x00000004 //< Invert pwmA +#define PWM_X_GENA_ACTLOAD_ZERO 0x00000008 //< Drive pwmA Low +#define PWM_X_GENA_ACTLOAD_ONE 0x0000000C //< Drive pwmA High +#define PWM_X_GENA_ACTZERO_M 0x00000003 //< Action for Counter=0 +#define PWM_X_GENA_ACTZERO_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTZERO_INV 0x00000001 //< Invert pwmA +#define PWM_X_GENA_ACTZERO_ZERO 0x00000002 //< Drive pwmA Low +#define PWM_X_GENA_ACTZERO_ONE 0x00000003 //< Drive pwmA High + +/** + * Defines for the bit fields in the PWM_O_X_GENB register. + */ +#define PWM_X_GENB_ACTCMPBD_M 0x00000C00 //< Action for Comparator B Down +#define PWM_X_GENB_ACTCMPBD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPBD_INV 0x00000400 //< Invert pwmB +#define PWM_X_GENB_ACTCMPBD_ZERO 0x00000800 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBD_ONE 0x00000C00 //< Drive pwmB High +#define PWM_X_GENB_ACTCMPBU_M 0x00000300 //< Action for Comparator B Up +#define PWM_X_GENB_ACTCMPBU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPBU_INV 0x00000100 //< Invert pwmB +#define PWM_X_GENB_ACTCMPBU_ZERO 0x00000200 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBU_ONE 0x00000300 //< Drive pwmB High +#define PWM_X_GENB_ACTCMPAD_M 0x000000C0 //< Action for Comparator A Down +#define PWM_X_GENB_ACTCMPAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPAD_INV 0x00000040 //< Invert pwmB +#define PWM_X_GENB_ACTCMPAD_ZERO 0x00000080 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0 //< Drive pwmB High +#define PWM_X_GENB_ACTCMPAU_M 0x00000030 //< Action for Comparator A Up +#define PWM_X_GENB_ACTCMPAU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPAU_INV 0x00000010 //< Invert pwmB +#define PWM_X_GENB_ACTCMPAU_ZERO 0x00000020 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAU_ONE 0x00000030 //< Drive pwmB High +#define PWM_X_GENB_ACTLOAD_M 0x0000000C //< Action for Counter=LOAD +#define PWM_X_GENB_ACTLOAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTLOAD_INV 0x00000004 //< Invert pwmB +#define PWM_X_GENB_ACTLOAD_ZERO 0x00000008 //< Drive pwmB Low +#define PWM_X_GENB_ACTLOAD_ONE 0x0000000C //< Drive pwmB High +#define PWM_X_GENB_ACTZERO_M 0x00000003 //< Action for Counter=0 +#define PWM_X_GENB_ACTZERO_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTZERO_INV 0x00000001 //< Invert pwmB +#define PWM_X_GENB_ACTZERO_ZERO 0x00000002 //< Drive pwmB Low +#define PWM_X_GENB_ACTZERO_ONE 0x00000003 //< Drive pwmB High + +/** + * Defines for the bit fields in the PWM_O_X_DBCTL register. + */ +#define PWM_X_DBCTL_ENABLE 0x00000001 //< Dead-Band Generator Enable +/** + * Defines for the bit fields in the PWM_O_X_DBRISE register. + */ +#define PWM_X_DBRISE_DELAY_M 0x00000FFF //< Dead-Band Rise Delay +#define PWM_X_DBRISE_DELAY_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_DBFALL register. + */ +#define PWM_X_DBFALL_DELAY_M 0x00000FFF //< Dead-Band Fall Delay +#define PWM_X_DBFALL_DELAY_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_FLTSRC0 register. + */ +#define PWM_X_FLTSRC0_FAULT3 0x00000008 //< Fault3 Input +#define PWM_X_FLTSRC0_FAULT2 0x00000004 //< Fault2 Input +#define PWM_X_FLTSRC0_FAULT1 0x00000002 //< Fault1 Input +#define PWM_X_FLTSRC0_FAULT0 0x00000001 //< Fault0 Input + +/** + * The following are defines for the bit fields in the PWM_O_X_FLTSRC1 register. + */ +#define PWM_X_FLTSRC1_DCMP7 0x00000080 //< Digital Comparator 7 +#define PWM_X_FLTSRC1_DCMP6 0x00000040 //< Digital Comparator 6 +#define PWM_X_FLTSRC1_DCMP5 0x00000020 //< Digital Comparator 5 +#define PWM_X_FLTSRC1_DCMP4 0x00000010 //< Digital Comparator 4 +#define PWM_X_FLTSRC1_DCMP3 0x00000008 //< Digital Comparator 3 +#define PWM_X_FLTSRC1_DCMP2 0x00000004 //< Digital Comparator 2 +#define PWM_X_FLTSRC1_DCMP1 0x00000002 //< Digital Comparator 1 +#define PWM_X_FLTSRC1_DCMP0 0x00000001 //< Digital Comparator 0 + +/** + * Defines for the bit fields in the PWM_O_X_MINFLTPER register. + */ +#define PWM_X_MINFLTPER_M 0x0000FFFF //< Minimum Fault Period +#define PWM_X_MINFLTPER_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_FLTSEN register. + */ +#define PWM_X_FLTSEN_FAULT3 0x00000008 //< Fault3 Sense +#define PWM_X_FLTSEN_FAULT2 0x00000004 //< Fault2 Sense +#define PWM_X_FLTSEN_FAULT1 0x00000002 //< Fault1 Sense +#define PWM_X_FLTSEN_FAULT0 0x00000001 //< Fault0 Sense + +/** + * Defines for the bit fields in the PWM_O_X_FLTSTAT0 register. + */ +#define PWM_X_FLTSTAT0_FAULT3 0x00000008 //< Fault Input 3 +#define PWM_X_FLTSTAT0_FAULT2 0x00000004 //< Fault Input 2 +#define PWM_X_FLTSTAT0_FAULT1 0x00000002 //< Fault Input 1 +#define PWM_X_FLTSTAT0_FAULT0 0x00000001 //< Fault Input 0 + +/** + * Defines for the bit fields in the PWM_O_X_FLTSTAT1 register. + */ +#define PWM_X_FLTSTAT1_DCMP7 0x00000080 //< Digital Comparator 7 Trigger +#define PWM_X_FLTSTAT1_DCMP6 0x00000040 //< Digital Comparator 6 Trigger +#define PWM_X_FLTSTAT1_DCMP5 0x00000020 //< Digital Comparator 5 Trigger +#define PWM_X_FLTSTAT1_DCMP4 0x00000010 //< Digital Comparator 4 Trigger +#define PWM_X_FLTSTAT1_DCMP3 0x00000008 //< Digital Comparator 3 Trigger +#define PWM_X_FLTSTAT1_DCMP2 0x00000004 //< Digital Comparator 2 Trigger +#define PWM_X_FLTSTAT1_DCMP1 0x00000002 //< Digital Comparator 1 Trigger +#define PWM_X_FLTSTAT1_DCMP0 0x00000001 //< Digital Comparator 0 Trigger + +/** + * Defines for the PWM Generator standard offsets. + */ +#define PWM_O_X_CTL (*((reg32_t *)(PWMC_BASE + 0x00000000))) //< Gen Control Reg +#define PWM_O_X_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000004))) //< Gen Int/Trig Enable Reg +#define PWM_O_X_RIS (*((reg32_t *)(PWMC_BASE + 0x00000008))) //< Gen Raw Int Status Reg +#define PWM_O_X_ISC (*((reg32_t *)(PWMC_BASE + 0x0000000C))) //< Gen Int Status Reg +#define PWM_O_X_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000010))) //< Gen Load Reg +#define PWM_O_X_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000014))) //< Gen Counter Reg +#define PWM_O_X_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000018))) //< Gen Compare A Reg +#define PWM_O_X_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000001C))) //< Gen Compare B Reg +#define PWM_O_X_GENA (*((reg32_t *)(PWMC_BASE + 0x00000020))) //< Gen Generator A Ctrl Reg +#define PWM_O_X_GENB (*((reg32_t *)(PWMC_BASE + 0x00000024))) //< Gen Generator B Ctrl Reg +#define PWM_O_X_DBCTL (*((reg32_t *)(PWMC_BASE + 0x00000028))) //< Gen Dead Band Ctrl Reg +#define PWM_O_X_DBRISE (*((reg32_t *)(PWMC_BASE + 0x0000002C))) //< Gen DB Rising Edge Delay Reg +#define PWM_O_X_DBFALL (*((reg32_t *)(PWMC_BASE + 0x00000030))) //< Gen DB Falling Edge Delay Reg +#define PWM_O_X_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x00000034))) //< Fault pin, comparator condition +#define PWM_O_X_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x00000038))) //< Digital comparator condition +#define PWM_O_X_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x0000003C))) //< Fault minimum period extension +#define PWM_GEN_0_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000040))) //< PWM0 base +#define PWM_GEN_1_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000080))) //< PWM1 base +#define PWM_GEN_2_OFFSET (*((reg32_t *)(PWMC_BASE + 0x000000C0))) //< PWM2 base +#define PWM_GEN_3_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000100))) //< PWM3 base + +/** + * Defines for the PWM Generator extended offsets. + */ +#define PWM_O_X_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000000))) //< Fault logic sense +#define PWM_O_X_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000004))) //< Pin and comparator status +#define PWM_O_X_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000008))) //< Digital comparator status +#define PWM_EXT_0_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000800))) //< PWM0 extended base +#define PWM_EXT_1_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000880))) //< PWM1 extended base +#define PWM_EXT_2_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000900))) //< PWM2 extended base +#define PWM_EXT_3_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000980))) //< PWM3 extended base + +#endif /* LM3S_PWM_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_ssi.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_ssi.h new file mode 100644 index 00000000..001da817 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_ssi.h @@ -0,0 +1,228 @@ +/** + * \file + * + * + * \brief LM3S1968 SSI hardware definitions. + */ + +#ifndef LM3S_SSI_H +#define LM3S_SSI_H + +/** + * The following are defines for the SSI register offsets. + */ +/*\{*/ +#define SSI_O_CR0 0x00000000 //< SSI Control 0 +#define SSI_O_CR1 0x00000004 //< SSI Control 1 +#define SSI_O_DR 0x00000008 //< SSI Data +#define SSI_O_SR 0x0000000C //< SSI Status +#define SSI_O_CPSR 0x00000010 //< SSI Clock Prescale +#define SSI_O_IM 0x00000014 //< SSI Interrupt Mask +#define SSI_O_RIS 0x00000018 //< SSI Raw Interrupt Status +#define SSI_O_MIS 0x0000001C //< SSI Masked Interrupt Status +#define SSI_O_ICR 0x00000020 //< SSI Interrupt Clear +#define SSI_O_DMACTL 0x00000024 //< SSI DMA Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR0 register. + */ +/*\{*/ +#define SSI_CR0_SCR_M 0x0000FF00 //< SSI Serial Clock Rate +#define SSI_CR0_SPH 0x00000080 //< SSI Serial Clock Phase +#define SSI_CR0_SPO 0x00000040 //< SSI Serial Clock Polarity +#define SSI_CR0_FRF_M 0x00000030 //< SSI Frame Format Select +#define SSI_CR0_FRF_MOTO 0x00000000 //< Freescale SPI Frame Format +#define SSI_CR0_FRF_TI 0x00000010 //< Texas Instruments Synchronous + //< Serial Frame Format +#define SSI_CR0_FRF_NMW 0x00000020 //< MICROWIRE Frame Format +#define SSI_CR0_DSS_M 0x0000000F //< SSI Data Size Select +#define SSI_CR0_DSS_4 0x00000003 //< 4-bit data +#define SSI_CR0_DSS_5 0x00000004 //< 5-bit data +#define SSI_CR0_DSS_6 0x00000005 //< 6-bit data +#define SSI_CR0_DSS_7 0x00000006 //< 7-bit data +#define SSI_CR0_DSS_8 0x00000007 //< 8-bit data +#define SSI_CR0_DSS_9 0x00000008 //< 9-bit data +#define SSI_CR0_DSS_10 0x00000009 //< 10-bit data +#define SSI_CR0_DSS_11 0x0000000A //< 11-bit data +#define SSI_CR0_DSS_12 0x0000000B //< 12-bit data +#define SSI_CR0_DSS_13 0x0000000C //< 13-bit data +#define SSI_CR0_DSS_14 0x0000000D //< 14-bit data +#define SSI_CR0_DSS_15 0x0000000E //< 15-bit data +#define SSI_CR0_DSS_16 0x0000000F //< 16-bit data +#define SSI_CR0_SCR_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR1 register. + */ +/*\{*/ +#define SSI_CR1_EOT 0x00000010 //< End of Transmission +#define SSI_CR1_SOD 0x00000008 //< SSI Slave Mode Output Disable +#define SSI_CR1_MS 0x00000004 //< SSI Master/Slave Select +#define SSI_CR1_SSE 0x00000002 //< SSI Synchronous Serial Port + //< Enable +#define SSI_CR1_LBM 0x00000001 //< SSI Loopback Mode +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_DR register. + */ +/*\{*/ +#define SSI_DR_DATA_M 0x0000FFFF //< SSI Receive/Transmit Data +#define SSI_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_SR register. + */ +/*\{*/ +#define SSI_SR_BSY 0x00000010 //< SSI Busy Bit +#define SSI_SR_RFF 0x00000008 //< SSI Receive FIFO Full +#define SSI_SR_RNE 0x00000004 //< SSI Receive FIFO Not Empty +#define SSI_SR_TNF 0x00000002 //< SSI Transmit FIFO Not Full +#define SSI_SR_TFE 0x00000001 //< SSI Transmit FIFO Empty +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CPSR register. + */ +/*\{*/ +#define SSI_CPSR_CPSDVSR_M 0x000000FF //< SSI Clock Prescale Divisor +#define SSI_CPSR_CPSDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_IM register. + */ +/*\{*/ +#define SSI_IM_TXIM 0x00000008 //< SSI Transmit FIFO Interrupt Mask +#define SSI_IM_RXIM 0x00000004 //< SSI Receive FIFO Interrupt Mask +#define SSI_IM_RTIM 0x00000002 //< SSI Receive Time-Out Interrupt + //< Mask +#define SSI_IM_RORIM 0x00000001 //< SSI Receive Overrun Interrupt + //< Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_RIS register. + */ +/*\{*/ +#define SSI_RIS_TXRIS 0x00000008 //< SSI Transmit FIFO Raw Interrupt + //< Status +#define SSI_RIS_RXRIS 0x00000004 //< SSI Receive FIFO Raw Interrupt + //< Status +#define SSI_RIS_RTRIS 0x00000002 //< SSI Receive Time-Out Raw + //< Interrupt Status +#define SSI_RIS_RORRIS 0x00000001 //< SSI Receive Overrun Raw + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_MIS register. + */ +/*\{*/ +#define SSI_MIS_TXMIS 0x00000008 //< SSI Transmit FIFO Masked + //< Interrupt Status +#define SSI_MIS_RXMIS 0x00000004 //< SSI Receive FIFO Masked + //< Interrupt Status +#define SSI_MIS_RTMIS 0x00000002 //< SSI Receive Time-Out Masked + //< Interrupt Status +#define SSI_MIS_RORMIS 0x00000001 //< SSI Receive Overrun Masked + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_ICR register. + */ +/*\{*/ +#define SSI_ICR_RTIC 0x00000002 //< SSI Receive Time-Out Interrupt + //< Clear +#define SSI_ICR_RORIC 0x00000001 //< SSI Receive Overrun Interrupt + //< Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_DMACTL register. + */ +/*\{*/ +#define SSI_DMACTL_TXDMAE 0x00000002 //< Transmit DMA Enable +#define SSI_DMACTL_RXDMAE 0x00000001 //< Receive DMA Enable +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SSI_O_CR0 + * register. + */ +/*\{*/ +#define SSI_CR0_SCR 0x0000FF00 //< Serial clock rate +#define SSI_CR0_FRF_MASK 0x00000030 //< Frame format mask +#define SSI_CR0_DSS 0x0000000F //< Data size select +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SSI_O_CPSR + * register. + */ +/*\{*/ +#define SSI_CPSR_CPSDVSR_MASK 0x000000FF //< Clock prescale +/*\}*/ + +/** + * The following are deprecated defines for the SSI controller's FIFO size. + */ +/*\{*/ +#define TX_FIFO_SIZE (8) //< Number of entries in the TX FIFO +#define RX_FIFO_SIZE (8) //< Number of entries in the RX FIFO +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the interrupt + * mask set and clear, raw interrupt, masked interrupt, and interrupt clear + * registers. + */ +/*\{*/ +#define SSI_INT_TXFF 0x00000008 //< TX FIFO interrupt +#define SSI_INT_RXFF 0x00000004 //< RX FIFO interrupt +#define SSI_INT_RXTO 0x00000002 //< RX timeout interrupt +#define SSI_INT_RXOR 0x00000001 //< RX overrun interrupt +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S_SSI_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_sysctl.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_sysctl.h new file mode 100644 index 00000000..fdb33861 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_sysctl.h @@ -0,0 +1,1685 @@ +/** + * \file + * + * + * \brief LM3S1968 system control hardware. + */ + +#ifndef LM3S_SYSCTL_H +#define LM3S_SYSCTL_H + +/** + * The following are defines for the System Control register addresses. + */ +/*\{*/ +#define SYSCTL_DID0 0x400FE000 ///< Device Identification 0 +#define SYSCTL_DID1 0x400FE004 ///< Device Identification 1 +#define SYSCTL_DC0 0x400FE008 ///< Device Capabilities 0 +#define SYSCTL_DC1 0x400FE010 ///< Device Capabilities 1 +#define SYSCTL_DC2 0x400FE014 ///< Device Capabilities 2 +#define SYSCTL_DC3 0x400FE018 ///< Device Capabilities 3 +#define SYSCTL_DC4 0x400FE01C ///< Device Capabilities 4 +#define SYSCTL_DC5 0x400FE020 ///< Device Capabilities 5 +#define SYSCTL_DC6 0x400FE024 ///< Device Capabilities 6 +#define SYSCTL_DC7 0x400FE028 ///< Device Capabilities 7 +#define SYSCTL_DC8 0x400FE02C ///< Device Capabilities 8 ADC + ///< Channels +#define SYSCTL_PBORCTL 0x400FE030 ///< Brown-Out Reset Control +#define SYSCTL_LDOPCTL 0x400FE034 ///< LDO Power Control +#define SYSCTL_SRCR0 0x400FE040 ///< Software Reset Control 0 +#define SYSCTL_SRCR1 0x400FE044 ///< Software Reset Control 1 +#define SYSCTL_SRCR2 0x400FE048 ///< Software Reset Control 2 +#define SYSCTL_RIS 0x400FE050 ///< Raw Interrupt Status +#define SYSCTL_IMC 0x400FE054 ///< Interrupt Mask Control +#define SYSCTL_MISC 0x400FE058 ///< Masked Interrupt Status and + ///< Clear +#define SYSCTL_RESC 0x400FE05C ///< Reset Cause +#define SYSCTL_RCC 0x400FE060 ///< Run-Mode Clock Configuration +#define SYSCTL_PLLCFG 0x400FE064 ///< XTAL to PLL Translation +#define SYSCTL_GPIOHSCTL 0x400FE06C ///< GPIO High-Speed Control +#define SYSCTL_GPIOHBCTL 0x400FE06C ///< GPIO High-Performance Bus + ///< Control +#define SYSCTL_RCC2 0x400FE070 ///< Run-Mode Clock Configuration 2 +#define SYSCTL_MOSCCTL 0x400FE07C ///< Main Oscillator Control +#define SYSCTL_RCGC0 0x400FE100 ///< Run Mode Clock Gating Control + ///< Register 0 +#define SYSCTL_RCGC1 0x400FE104 ///< Run Mode Clock Gating Control + ///< Register 1 +#define SYSCTL_RCGC2 0x400FE108 ///< Run Mode Clock Gating Control + ///< Register 2 +#define SYSCTL_SCGC0 0x400FE110 ///< Sleep Mode Clock Gating Control + ///< Register 0 +#define SYSCTL_SCGC1 0x400FE114 ///< Sleep Mode Clock Gating Control + ///< Register 1 +#define SYSCTL_SCGC2 0x400FE118 ///< Sleep Mode Clock Gating Control + ///< Register 2 +#define SYSCTL_DCGC0 0x400FE120 ///< Deep Sleep Mode Clock Gating + ///< Control Register 0 +#define SYSCTL_DCGC1 0x400FE124 ///< Deep-Sleep Mode Clock Gating + ///< Control Register 1 +#define SYSCTL_DCGC2 0x400FE128 ///< Deep Sleep Mode Clock Gating + ///< Control Register 2 +#define SYSCTL_DSLPCLKCFG 0x400FE144 ///< Deep Sleep Clock Configuration +#define SYSCTL_CLKVCLR 0x400FE150 ///< Clock Verification Clear +#define SYSCTL_PIOSCCAL 0x400FE150 ///< Precision Internal Oscillator + ///< Calibration +#define SYSCTL_PIOSCSTAT 0x400FE154 ///< Precision Internal Oscillator + ///< Statistics +#define SYSCTL_LDOARST 0x400FE160 ///< Allow Unregulated LDO to Reset + ///< the Part +#define SYSCTL_I2SMCLKCFG 0x400FE170 ///< I2S MCLK Configuration +#define SYSCTL_DC9 0x400FE190 ///< Device Capabilities 9 ADC + ///< Digital Comparators +#define SYSCTL_NVMSTAT 0x400FE1A0 ///< Non-Volatile Memory Information +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DID0 register. + */ +/*\{*/ +#define SYSCTL_DID0_VER_M 0x70000000 ///< DID0 Version +#define SYSCTL_DID0_VER_0 0x00000000 ///< Initial DID0 register format + ///< definition for Stellaris(R) + ///< Sandstorm-class devices +#define SYSCTL_DID0_VER_1 0x10000000 ///< Second version of the DID0 + ///< register format +#define SYSCTL_DID0_CLASS_M 0x00FF0000 ///< Device Class +#define SYSCTL_DID0_CLASS_SANDSTORM \ + 0x00000000 ///< Sandstorm-class Device +#define SYSCTL_DID0_CLASS_FURY 0x00010000 ///< Stellaris(R) Fury-class devices +#define SYSCTL_DID0_CLASS_DUSTDEVIL \ + 0x00030000 ///< Stellaris(R) DustDevil-class + ///< devices +#define SYSCTL_DID0_CLASS_TEMPEST \ + 0x00040000 ///< Stellaris(R) Tempest-class + ///< microcontrollers +#define SYSCTL_DID0_MAJ_M 0x0000FF00 ///< Major Revision +#define SYSCTL_DID0_MAJ_REVA 0x00000000 ///< Revision A (initial device) +#define SYSCTL_DID0_MAJ_REVB 0x00000100 ///< Revision B (first base layer + ///< revision) +#define SYSCTL_DID0_MAJ_REVC 0x00000200 ///< Revision C (second base layer + ///< revision) +#define SYSCTL_DID0_MIN_M 0x000000FF ///< Minor Revision +#define SYSCTL_DID0_MIN_0 0x00000000 ///< Initial device, or a major + ///< revision update +#define SYSCTL_DID0_MIN_1 0x00000001 ///< First metal layer change +#define SYSCTL_DID0_MIN_2 0x00000002 ///< Second metal layer change +#define SYSCTL_DID0_MIN_3 0x00000003 ///< Minor revision 3 +#define SYSCTL_DID0_MIN_4 0x00000004 ///< Minor revision 4 +#define SYSCTL_DID0_MIN_5 0x00000005 ///< Minor revision 5 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DID1 register. + */ +/*\{*/ +#define SYSCTL_DID1_VER_M 0xF0000000 ///< DID1 Version +#define SYSCTL_DID1_VER_0 0x00000000 ///< Initial DID1 register format + ///< definition, indicating a + ///< Stellaris LM3Snnn device +#define SYSCTL_DID1_VER_1 0x10000000 ///< Second version of the DID1 + ///< register format +#define SYSCTL_DID1_FAM_M 0x0F000000 ///< Family +#define SYSCTL_DID1_FAM_STELLARIS \ + 0x00000000 ///< Stellaris family of + ///< microcontollers, that is, all + ///< devices with external part + ///< numbers starting with LM3S +#define SYSCTL_DID1_PRTNO_M 0x00FF0000 ///< Part Number +#define SYSCTL_DID1_PRTNO_101 0x00010000 ///< LM3S101 +#define SYSCTL_DID1_PRTNO_102 0x00020000 ///< LM3S102 +#define SYSCTL_DID1_PRTNO_300 0x00190000 ///< LM3S300 +#define SYSCTL_DID1_PRTNO_301 0x00110000 ///< LM3S301 +#define SYSCTL_DID1_PRTNO_308 0x001A0000 ///< LM3S308 +#define SYSCTL_DID1_PRTNO_310 0x00120000 ///< LM3S310 +#define SYSCTL_DID1_PRTNO_315 0x00130000 ///< LM3S315 +#define SYSCTL_DID1_PRTNO_316 0x00140000 ///< LM3S316 +#define SYSCTL_DID1_PRTNO_317 0x00170000 ///< LM3S317 +#define SYSCTL_DID1_PRTNO_328 0x00150000 ///< LM3S328 +#define SYSCTL_DID1_PRTNO_600 0x002A0000 ///< LM3S600 +#define SYSCTL_DID1_PRTNO_601 0x00210000 ///< LM3S601 +#define SYSCTL_DID1_PRTNO_608 0x002B0000 ///< LM3S608 +#define SYSCTL_DID1_PRTNO_610 0x00220000 ///< LM3S610 +#define SYSCTL_DID1_PRTNO_611 0x00230000 ///< LM3S611 +#define SYSCTL_DID1_PRTNO_612 0x00240000 ///< LM3S612 +#define SYSCTL_DID1_PRTNO_613 0x00250000 ///< LM3S613 +#define SYSCTL_DID1_PRTNO_615 0x00260000 ///< LM3S615 +#define SYSCTL_DID1_PRTNO_617 0x00280000 ///< LM3S617 +#define SYSCTL_DID1_PRTNO_618 0x00290000 ///< LM3S618 +#define SYSCTL_DID1_PRTNO_628 0x00270000 ///< LM3S628 +#define SYSCTL_DID1_PRTNO_800 0x00380000 ///< LM3S800 +#define SYSCTL_DID1_PRTNO_801 0x00310000 ///< LM3S801 +#define SYSCTL_DID1_PRTNO_808 0x00390000 ///< LM3S808 +#define SYSCTL_DID1_PRTNO_811 0x00320000 ///< LM3S811 +#define SYSCTL_DID1_PRTNO_812 0x00330000 ///< LM3S812 +#define SYSCTL_DID1_PRTNO_815 0x00340000 ///< LM3S815 +#define SYSCTL_DID1_PRTNO_817 0x00360000 ///< LM3S817 +#define SYSCTL_DID1_PRTNO_818 0x00370000 ///< LM3S818 +#define SYSCTL_DID1_PRTNO_828 0x00350000 ///< LM3S828 +#define SYSCTL_DID1_PRTNO_1110 0x00BF0000 ///< LM3S1110 +#define SYSCTL_DID1_PRTNO_1133 0x00C30000 ///< LM3S1133 +#define SYSCTL_DID1_PRTNO_1138 0x00C50000 ///< LM3S1138 +#define SYSCTL_DID1_PRTNO_1150 0x00C10000 ///< LM3S1150 +#define SYSCTL_DID1_PRTNO_1162 0x00C40000 ///< LM3S1162 +#define SYSCTL_DID1_PRTNO_1165 0x00C20000 ///< LM3S1165 +#define SYSCTL_DID1_PRTNO_1332 0x00C60000 ///< LM3S1332 +#define SYSCTL_DID1_PRTNO_1435 0x00BC0000 ///< LM3S1435 +#define SYSCTL_DID1_PRTNO_1439 0x00BA0000 ///< LM3S1439 +#define SYSCTL_DID1_PRTNO_1512 0x00BB0000 ///< LM3S1512 +#define SYSCTL_DID1_PRTNO_1538 0x00C70000 ///< LM3S1538 +#define SYSCTL_DID1_PRTNO_1601 0x00DB0000 ///< LM3S1601 +#define SYSCTL_DID1_PRTNO_1607 0x00060000 ///< LM3S1607 +#define SYSCTL_DID1_PRTNO_1608 0x00DA0000 ///< LM3S1608 +#define SYSCTL_DID1_PRTNO_1620 0x00C00000 ///< LM3S1620 +#define SYSCTL_DID1_PRTNO_1625 0x00030000 ///< LM3S1625 +#define SYSCTL_DID1_PRTNO_1626 0x00040000 ///< LM3S1626 +#define SYSCTL_DID1_PRTNO_1627 0x00050000 ///< LM3S1627 +#define SYSCTL_DID1_PRTNO_1635 0x00B30000 ///< LM3S1635 +#define SYSCTL_DID1_PRTNO_1637 0x00BD0000 ///< LM3S1637 +#define SYSCTL_DID1_PRTNO_1751 0x00B90000 ///< LM3S1751 +#define SYSCTL_DID1_PRTNO_1776 0x00100000 ///< LM3S1776 +#define SYSCTL_DID1_PRTNO_1811 0x00160000 ///< LM3S1811 +#define SYSCTL_DID1_PRTNO_1816 0x003D0000 ///< LM3S1816 +#define SYSCTL_DID1_PRTNO_1850 0x00B40000 ///< LM3S1850 +#define SYSCTL_DID1_PRTNO_1911 0x00DD0000 ///< LM3S1911 +#define SYSCTL_DID1_PRTNO_1918 0x00DC0000 ///< LM3S1918 +#define SYSCTL_DID1_PRTNO_1937 0x00B70000 ///< LM3S1937 +#define SYSCTL_DID1_PRTNO_1958 0x00BE0000 ///< LM3S1958 +#define SYSCTL_DID1_PRTNO_1960 0x00B50000 ///< LM3S1960 +#define SYSCTL_DID1_PRTNO_1968 0x00B80000 ///< LM3S1968 +#define SYSCTL_DID1_PRTNO_1J11 0x000F0000 ///< LM3S1J11 +#define SYSCTL_DID1_PRTNO_1J16 0x003C0000 ///< LM3S1J16 +#define SYSCTL_DID1_PRTNO_1N11 0x000E0000 ///< LM3S1N11 +#define SYSCTL_DID1_PRTNO_1N16 0x003B0000 ///< LM3S1N16 +#define SYSCTL_DID1_PRTNO_1W16 0x00300000 ///< LM3S1W16 +#define SYSCTL_DID1_PRTNO_1Z16 0x002F0000 ///< LM3S1Z16 +#define SYSCTL_DID1_PRTNO_2110 0x00510000 ///< LM3S2110 +#define SYSCTL_DID1_PRTNO_2139 0x00840000 ///< LM3S2139 +#define SYSCTL_DID1_PRTNO_2276 0x00390000 ///< LM3S2276 +#define SYSCTL_DID1_PRTNO_2410 0x00A20000 ///< LM3S2410 +#define SYSCTL_DID1_PRTNO_2412 0x00590000 ///< LM3S2412 +#define SYSCTL_DID1_PRTNO_2432 0x00560000 ///< LM3S2432 +#define SYSCTL_DID1_PRTNO_2533 0x005A0000 ///< LM3S2533 +#define SYSCTL_DID1_PRTNO_2601 0x00E10000 ///< LM3S2601 +#define SYSCTL_DID1_PRTNO_2608 0x00E00000 ///< LM3S2608 +#define SYSCTL_DID1_PRTNO_2616 0x00330000 ///< LM3S2616 +#define SYSCTL_DID1_PRTNO_2620 0x00570000 ///< LM3S2620 +#define SYSCTL_DID1_PRTNO_2637 0x00850000 ///< LM3S2637 +#define SYSCTL_DID1_PRTNO_2651 0x00530000 ///< LM3S2651 +#define SYSCTL_DID1_PRTNO_2671 0x00800000 ///< LM3S2671 +#define SYSCTL_DID1_PRTNO_2678 0x00500000 ///< LM3S2678 +#define SYSCTL_DID1_PRTNO_2730 0x00A40000 ///< LM3S2730 +#define SYSCTL_DID1_PRTNO_2739 0x00520000 ///< LM3S2739 +#define SYSCTL_DID1_PRTNO_2776 0x003A0000 ///< LM3S2776 +#define SYSCTL_DID1_PRTNO_2793 0x006D0000 ///< LM3S2793 +#define SYSCTL_DID1_PRTNO_2911 0x00E30000 ///< LM3S2911 +#define SYSCTL_DID1_PRTNO_2918 0x00E20000 ///< LM3S2918 +#define SYSCTL_DID1_PRTNO_2939 0x00540000 ///< LM3S2939 +#define SYSCTL_DID1_PRTNO_2948 0x008F0000 ///< LM3S2948 +#define SYSCTL_DID1_PRTNO_2950 0x00580000 ///< LM3S2950 +#define SYSCTL_DID1_PRTNO_2965 0x00550000 ///< LM3S2965 +#define SYSCTL_DID1_PRTNO_2B93 0x006C0000 ///< LM3S2B93 +#define SYSCTL_DID1_PRTNO_3651 0x00430000 ///< LM3S3651 +#define SYSCTL_DID1_PRTNO_3739 0x00440000 ///< LM3S3739 +#define SYSCTL_DID1_PRTNO_3748 0x00490000 ///< LM3S3748 +#define SYSCTL_DID1_PRTNO_3749 0x00450000 ///< LM3S3749 +#define SYSCTL_DID1_PRTNO_3826 0x00420000 ///< LM3S3826 +#define SYSCTL_DID1_PRTNO_3J26 0x00410000 ///< LM3S3J26 +#define SYSCTL_DID1_PRTNO_3N26 0x00400000 ///< LM3S3N26 +#define SYSCTL_DID1_PRTNO_3W26 0x003F0000 ///< LM3S3W26 +#define SYSCTL_DID1_PRTNO_3Z26 0x003E0000 ///< LM3S3Z26 +#define SYSCTL_DID1_PRTNO_5632 0x00810000 ///< LM3S5632 +#define SYSCTL_DID1_PRTNO_5651 0x000C0000 ///< LM3S5651 +#define SYSCTL_DID1_PRTNO_5652 0x008A0000 ///< LM3S5652 +#define SYSCTL_DID1_PRTNO_5656 0x004D0000 ///< LM3S5656 +#define SYSCTL_DID1_PRTNO_5662 0x00910000 ///< LM3S5662 +#define SYSCTL_DID1_PRTNO_5732 0x00960000 ///< LM3S5732 +#define SYSCTL_DID1_PRTNO_5737 0x00970000 ///< LM3S5737 +#define SYSCTL_DID1_PRTNO_5739 0x00A00000 ///< LM3S5739 +#define SYSCTL_DID1_PRTNO_5747 0x00990000 ///< LM3S5747 +#define SYSCTL_DID1_PRTNO_5749 0x00A70000 ///< LM3S5749 +#define SYSCTL_DID1_PRTNO_5752 0x009A0000 ///< LM3S5752 +#define SYSCTL_DID1_PRTNO_5762 0x009C0000 ///< LM3S5762 +#define SYSCTL_DID1_PRTNO_5791 0x00690000 ///< LM3S5791 +#define SYSCTL_DID1_PRTNO_5951 0x000B0000 ///< LM3S5951 +#define SYSCTL_DID1_PRTNO_5956 0x004E0000 ///< LM3S5956 +#define SYSCTL_DID1_PRTNO_5B91 0x00680000 ///< LM3S5B91 +#define SYSCTL_DID1_PRTNO_5K31 0x00090000 ///< LM3S5K31 +#define SYSCTL_DID1_PRTNO_5K36 0x004A0000 ///< LM3S5K36 +#define SYSCTL_DID1_PRTNO_5P31 0x000A0000 ///< LM3S5P31 +#define SYSCTL_DID1_PRTNO_5P36 0x00480000 ///< LM3S5P36 +#define SYSCTL_DID1_PRTNO_5P51 0x000D0000 ///< LM3S5P51 +#define SYSCTL_DID1_PRTNO_5P56 0x004C0000 ///< LM3S5P56 +#define SYSCTL_DID1_PRTNO_5R31 0x00070000 ///< LM3S5R31 +#define SYSCTL_DID1_PRTNO_5R36 0x004B0000 ///< LM3S5R36 +#define SYSCTL_DID1_PRTNO_5T36 0x00470000 ///< LM3S5T36 +#define SYSCTL_DID1_PRTNO_5Y36 0x00460000 ///< LM3S5Y36 +#define SYSCTL_DID1_PRTNO_6100 0x00A10000 ///< LM3S6100 +#define SYSCTL_DID1_PRTNO_6110 0x00740000 ///< LM3S6110 +#define SYSCTL_DID1_PRTNO_6420 0x00A50000 ///< LM3S6420 +#define SYSCTL_DID1_PRTNO_6422 0x00820000 ///< LM3S6422 +#define SYSCTL_DID1_PRTNO_6432 0x00750000 ///< LM3S6432 +#define SYSCTL_DID1_PRTNO_6537 0x00760000 ///< LM3S6537 +#define SYSCTL_DID1_PRTNO_6610 0x00710000 ///< LM3S6610 +#define SYSCTL_DID1_PRTNO_6611 0x00E70000 ///< LM3S6611 +#define SYSCTL_DID1_PRTNO_6618 0x00E60000 ///< LM3S6618 +#define SYSCTL_DID1_PRTNO_6633 0x00830000 ///< LM3S6633 +#define SYSCTL_DID1_PRTNO_6637 0x008B0000 ///< LM3S6637 +#define SYSCTL_DID1_PRTNO_6730 0x00A30000 ///< LM3S6730 +#define SYSCTL_DID1_PRTNO_6753 0x00770000 ///< LM3S6753 +#define SYSCTL_DID1_PRTNO_6911 0x00E90000 ///< LM3S6911 +#define SYSCTL_DID1_PRTNO_6918 0x00E80000 ///< LM3S6918 +#define SYSCTL_DID1_PRTNO_6938 0x00890000 ///< LM3S6938 +#define SYSCTL_DID1_PRTNO_6950 0x00720000 ///< LM3S6950 +#define SYSCTL_DID1_PRTNO_6952 0x00780000 ///< LM3S6952 +#define SYSCTL_DID1_PRTNO_6965 0x00730000 ///< LM3S6965 +#define SYSCTL_DID1_PRTNO_8530 0x00640000 ///< LM3S8530 +#define SYSCTL_DID1_PRTNO_8538 0x008E0000 ///< LM3S8538 +#define SYSCTL_DID1_PRTNO_8630 0x00610000 ///< LM3S8630 +#define SYSCTL_DID1_PRTNO_8730 0x00630000 ///< LM3S8730 +#define SYSCTL_DID1_PRTNO_8733 0x008D0000 ///< LM3S8733 +#define SYSCTL_DID1_PRTNO_8738 0x00860000 ///< LM3S8738 +#define SYSCTL_DID1_PRTNO_8930 0x00650000 ///< LM3S8930 +#define SYSCTL_DID1_PRTNO_8933 0x008C0000 ///< LM3S8933 +#define SYSCTL_DID1_PRTNO_8938 0x00880000 ///< LM3S8938 +#define SYSCTL_DID1_PRTNO_8962 0x00A60000 ///< LM3S8962 +#define SYSCTL_DID1_PRTNO_8970 0x00620000 ///< LM3S8970 +#define SYSCTL_DID1_PRTNO_8971 0x00D70000 ///< LM3S8971 +#define SYSCTL_DID1_PRTNO_9790 0x00670000 ///< LM3S9790 +#define SYSCTL_DID1_PRTNO_9792 0x006B0000 ///< LM3S9792 +#define SYSCTL_DID1_PRTNO_9997 0x00200000 ///< LM3S9997 +#define SYSCTL_DID1_PRTNO_9B90 0x00660000 ///< LM3S9B90 +#define SYSCTL_DID1_PRTNO_9B92 0x006A0000 ///< LM3S9B92 +#define SYSCTL_DID1_PRTNO_9B95 0x006E0000 ///< LM3S9B95 +#define SYSCTL_DID1_PRTNO_9B96 0x006F0000 ///< LM3S9B96 +#define SYSCTL_DID1_PRTNO_9L97 0x00180000 ///< LM3S9L97 +#define SYSCTL_DID1_PINCNT_M 0x0000E000 ///< Package Pin Count +#define SYSCTL_DID1_PINCNT_28 0x00000000 ///< 28 pin package +#define SYSCTL_DID1_PINCNT_48 0x00002000 ///< 48 pin package +#define SYSCTL_DID1_PINCNT_100 0x00004000 ///< 100-pin package +#define SYSCTL_DID1_PINCNT_64 0x00006000 ///< 64-pin package +#define SYSCTL_DID1_TEMP_M 0x000000E0 ///< Temperature Range +#define SYSCTL_DID1_TEMP_C 0x00000000 ///< Commercial temperature range (0C + ///< to 70C) +#define SYSCTL_DID1_TEMP_I 0x00000020 ///< Industrial temperature range + ///< (-40C to 85C) +#define SYSCTL_DID1_TEMP_E 0x00000040 ///< Extended temperature range (-40C + ///< to 105C) +#define SYSCTL_DID1_PKG_M 0x00000018 ///< Package Type +#define SYSCTL_DID1_PKG_SOIC 0x00000000 ///< SOIC package +#define SYSCTL_DID1_PKG_QFP 0x00000008 ///< LQFP package +#define SYSCTL_DID1_PKG_BGA 0x00000010 ///< BGA package +#define SYSCTL_DID1_PKG_QFN 0x00000018 ///< QFN package +#define SYSCTL_DID1_ROHS 0x00000004 ///< RoHS-Compliance +#define SYSCTL_DID1_QUAL_M 0x00000003 ///< Qualification Status +#define SYSCTL_DID1_QUAL_ES 0x00000000 ///< Engineering Sample (unqualified) +#define SYSCTL_DID1_QUAL_PP 0x00000001 ///< Pilot Production (unqualified) +#define SYSCTL_DID1_QUAL_FQ 0x00000002 ///< Fully Qualified +#define SYSCTL_DID1_PRTNO_S 16 ///< Part number shift +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC0 register. + */ +/*\{*/ +#define SYSCTL_DC0_SRAMSZ_M 0xFFFF0000 ///< SRAM Size +#define SYSCTL_DC0_SRAMSZ_2KB 0x00070000 ///< 2 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_4KB 0x000F0000 ///< 4 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_6KB 0x00170000 ///< 6 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_8KB 0x001F0000 ///< 8 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_12KB 0x002F0000 ///< 12 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_16KB 0x003F0000 ///< 16 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_20KB 0x004F0000 ///< 20 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_24KB 0x005F0000 ///< 24 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_32KB 0x007F0000 ///< 32 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_48KB 0x00BF0000 ///< 48 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_64KB 0x00FF0000 ///< 64 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_96KB 0x017F0000 ///< 96 KB of SRAM +#define SYSCTL_DC0_FLASHSZ_M 0x0000FFFF ///< Flash Size +#define SYSCTL_DC0_FLASHSZ_8KB 0x00000003 ///< 8 KB of Flash +#define SYSCTL_DC0_FLASHSZ_16KB 0x00000007 ///< 16 KB of Flash +#define SYSCTL_DC0_FLASHSZ_32KB 0x0000000F ///< 32 KB of Flash +#define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F ///< 64 KB of Flash +#define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F ///< 96 KB of Flash +#define SYSCTL_DC0_FLASHSZ_128K 0x0000003F ///< 128 KB of Flash +#define SYSCTL_DC0_FLASHSZ_256K 0x0000007F ///< 256 KB of Flash +#define SYSCTL_DC0_SRAMSZ_S 16 ///< SRAM size shift +#define SYSCTL_DC0_FLASHSZ_S 0 ///< Flash size shift +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC1 register. + */ +/*\{*/ +#define SYSCTL_DC1_WDT1 0x10000000 ///< Watchdog Timer1 Present +#define SYSCTL_DC1_CAN2 0x04000000 ///< CAN Module 2 Present +#define SYSCTL_DC1_CAN1 0x02000000 ///< CAN Module 1 Present +#define SYSCTL_DC1_CAN0 0x01000000 ///< CAN Module 0 Present +#define SYSCTL_DC1_PWM 0x00100000 ///< PWM Module Present +#define SYSCTL_DC1_ADC1 0x00020000 ///< ADC Module 1 Present +#define SYSCTL_DC1_ADC0 0x00010000 ///< ADC Module 0 Present +#define SYSCTL_DC1_MINSYSDIV_M 0x0000F000 ///< System Clock Divider +#define SYSCTL_DC1_MINSYSDIV_100 \ + 0x00001000 ///< Divide VCO (400MHZ) by 5 minimum +#define SYSCTL_DC1_MINSYSDIV_66 0x00002000 ///< Divide VCO (400MHZ) by 2*2 + 2 = + ///< 6 minimum +#define SYSCTL_DC1_MINSYSDIV_50 0x00003000 ///< Specifies a 50-MHz CPU clock + ///< with a PLL divider of 4 +#define SYSCTL_DC1_MINSYSDIV_25 0x00007000 ///< Specifies a 25-MHz clock with a + ///< PLL divider of 8 +#define SYSCTL_DC1_MINSYSDIV_20 0x00009000 ///< Specifies a 20-MHz clock with a + ///< PLL divider of 10 +#define SYSCTL_DC1_ADCSPD_M 0x00000F00 ///< Max ADC Speed +#define SYSCTL_DC1_ADCSPD_125K 0x00000000 ///< 125Ksps ADC +#define SYSCTL_DC1_ADCSPD_250K 0x00000100 ///< 250K samples/second +#define SYSCTL_DC1_ADCSPD_500K 0x00000200 ///< 500K samples/second +#define SYSCTL_DC1_ADCSPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_DC1_ADC1SPD_M 0x00000C00 ///< Max ADC1 Speed +#define SYSCTL_DC1_ADC1SPD_1M 0x00000C00 ///< 1M samples/second +#define SYSCTL_DC1_ADC0SPD_M 0x00000300 ///< Max ADC0 Speed +#define SYSCTL_DC1_ADC0SPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_DC1_MPU 0x00000080 ///< MPU Present +#define SYSCTL_DC1_HIB 0x00000040 ///< Hibernation Module Present +#define SYSCTL_DC1_TEMP 0x00000020 ///< Temp Sensor Present +#define SYSCTL_DC1_PLL 0x00000010 ///< PLL Present +#define SYSCTL_DC1_WDT0 0x00000008 ///< Watchdog Timer 0 Present +#define SYSCTL_DC1_SWO 0x00000004 ///< SWO Trace Port Present +#define SYSCTL_DC1_SWD 0x00000002 ///< SWD Present +#define SYSCTL_DC1_JTAG 0x00000001 ///< JTAG Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC2 register. + */ +/*\{*/ +#define SYSCTL_DC2_EPI0 0x40000000 ///< EPI Module 0 Present +#define SYSCTL_DC2_I2S0 0x10000000 ///< I2S Module 0 Present +#define SYSCTL_DC2_COMP2 0x04000000 ///< Analog Comparator 2 Present +#define SYSCTL_DC2_COMP1 0x02000000 ///< Analog Comparator 1 Present +#define SYSCTL_DC2_COMP0 0x01000000 ///< Analog Comparator 0 Present +#define SYSCTL_DC2_TIMER3 0x00080000 ///< Timer Module 3 Present +#define SYSCTL_DC2_TIMER2 0x00040000 ///< Timer Module 2 Present +#define SYSCTL_DC2_TIMER1 0x00020000 ///< Timer Module 1 Present +#define SYSCTL_DC2_TIMER0 0x00010000 ///< Timer Module 0 Present +#define SYSCTL_DC2_I2C1 0x00004000 ///< I2C Module 1 Present +#define SYSCTL_DC2_I2C0 0x00001000 ///< I2C Module 0 Present +#define SYSCTL_DC2_QEI1 0x00000200 ///< QEI Module 1 Present +#define SYSCTL_DC2_QEI0 0x00000100 ///< QEI Module 0 Present +#define SYSCTL_DC2_SSI1 0x00000020 ///< SSI Module 1 Present +#define SYSCTL_DC2_SSI0 0x00000010 ///< SSI Module 0 Present +#define SYSCTL_DC2_UART2 0x00000004 ///< UART Module 2 Present +#define SYSCTL_DC2_UART1 0x00000002 ///< UART Module 1 Present +#define SYSCTL_DC2_UART0 0x00000001 ///< UART Module 0 Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC3 register. + */ +/*\{*/ +#define SYSCTL_DC3_32KHZ 0x80000000 ///< 32KHz Input Clock Available +#define SYSCTL_DC3_CCP5 0x20000000 ///< CCP5 Pin Present +#define SYSCTL_DC3_CCP4 0x10000000 ///< CCP4 Pin Present +#define SYSCTL_DC3_CCP3 0x08000000 ///< CCP3 Pin Present +#define SYSCTL_DC3_CCP2 0x04000000 ///< CCP2 Pin Present +#define SYSCTL_DC3_CCP1 0x02000000 ///< CCP1 Pin Present +#define SYSCTL_DC3_CCP0 0x01000000 ///< CCP0 Pin Present +#define SYSCTL_DC3_ADC0AIN7 0x00800000 ///< ADC Module 0 AIN7 Pin Present +#define SYSCTL_DC3_ADC0AIN6 0x00400000 ///< ADC Module 0 AIN6 Pin Present +#define SYSCTL_DC3_ADC0AIN5 0x00200000 ///< ADC Module 0 AIN5 Pin Present +#define SYSCTL_DC3_ADC0AIN4 0x00100000 ///< ADC Module 0 AIN4 Pin Present +#define SYSCTL_DC3_ADC0AIN3 0x00080000 ///< ADC Module 0 AIN3 Pin Present +#define SYSCTL_DC3_ADC0AIN2 0x00040000 ///< ADC Module 0 AIN2 Pin Present +#define SYSCTL_DC3_ADC0AIN1 0x00020000 ///< ADC Module 0 AIN1 Pin Present +#define SYSCTL_DC3_ADC0AIN0 0x00010000 ///< ADC Module 0 AIN0 Pin Present +#define SYSCTL_DC3_PWMFAULT 0x00008000 ///< PWM Fault Pin Present +#define SYSCTL_DC3_C2O 0x00004000 ///< C2o Pin Present +#define SYSCTL_DC3_C2PLUS 0x00002000 ///< C2+ Pin Present +#define SYSCTL_DC3_C2MINUS 0x00001000 ///< C2- Pin Present +#define SYSCTL_DC3_C1O 0x00000800 ///< C1o Pin Present +#define SYSCTL_DC3_C1PLUS 0x00000400 ///< C1+ Pin Present +#define SYSCTL_DC3_C1MINUS 0x00000200 ///< C1- Pin Present +#define SYSCTL_DC3_C0O 0x00000100 ///< C0o Pin Present +#define SYSCTL_DC3_C0PLUS 0x00000080 ///< C0+ Pin Present +#define SYSCTL_DC3_C0MINUS 0x00000040 ///< C0- Pin Present +#define SYSCTL_DC3_PWM5 0x00000020 ///< PWM5 Pin Present +#define SYSCTL_DC3_PWM4 0x00000010 ///< PWM4 Pin Present +#define SYSCTL_DC3_PWM3 0x00000008 ///< PWM3 Pin Present +#define SYSCTL_DC3_PWM2 0x00000004 ///< PWM2 Pin Present +#define SYSCTL_DC3_PWM1 0x00000002 ///< PWM1 Pin Present +#define SYSCTL_DC3_PWM0 0x00000001 ///< PWM0 Pin Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC4 register. + */ +/*\{*/ +#define SYSCTL_DC4_ETH 0x50000000 ///< Ethernet present +#define SYSCTL_DC4_EPHY0 0x40000000 ///< Ethernet PHY Layer 0 Present +#define SYSCTL_DC4_EMAC0 0x10000000 ///< Ethernet MAC Layer 0 Present +#define SYSCTL_DC4_E1588 0x01000000 ///< 1588 Capable +#define SYSCTL_DC4_PICAL 0x00040000 ///< PIOSC Calibrate +#define SYSCTL_DC4_CCP7 0x00008000 ///< CCP7 Pin Present +#define SYSCTL_DC4_CCP6 0x00004000 ///< CCP6 Pin Present +#define SYSCTL_DC4_UDMA 0x00002000 ///< Micro-DMA Module Present +#define SYSCTL_DC4_ROM 0x00001000 ///< Internal Code ROM Present +#define SYSCTL_DC4_GPIOJ 0x00000100 ///< GPIO Port J Present +#define SYSCTL_DC4_GPIOH 0x00000080 ///< GPIO Port H Present +#define SYSCTL_DC4_GPIOG 0x00000040 ///< GPIO Port G Present +#define SYSCTL_DC4_GPIOF 0x00000020 ///< GPIO Port F Present +#define SYSCTL_DC4_GPIOE 0x00000010 ///< GPIO Port E Present +#define SYSCTL_DC4_GPIOD 0x00000008 ///< GPIO Port D Present +#define SYSCTL_DC4_GPIOC 0x00000004 ///< GPIO Port C Present +#define SYSCTL_DC4_GPIOB 0x00000002 ///< GPIO Port B Present +#define SYSCTL_DC4_GPIOA 0x00000001 ///< GPIO Port A Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC5 register. + */ +/*\{*/ +#define SYSCTL_DC5_PWMFAULT3 0x08000000 ///< PWM Fault 3 Pin Present +#define SYSCTL_DC5_PWMFAULT2 0x04000000 ///< PWM Fault 2 Pin Present +#define SYSCTL_DC5_PWMFAULT1 0x02000000 ///< PWM Fault 1 Pin Present +#define SYSCTL_DC5_PWMFAULT0 0x01000000 ///< PWM Fault 0 Pin Present +#define SYSCTL_DC5_PWMEFLT 0x00200000 ///< PWM Extended Fault Active +#define SYSCTL_DC5_PWMESYNC 0x00100000 ///< PWM Extended SYNC Active +#define SYSCTL_DC5_PWM7 0x00000080 ///< PWM7 Pin Present +#define SYSCTL_DC5_PWM6 0x00000040 ///< PWM6 Pin Present +#define SYSCTL_DC5_PWM5 0x00000020 ///< PWM5 Pin Present +#define SYSCTL_DC5_PWM4 0x00000010 ///< PWM4 Pin Present +#define SYSCTL_DC5_PWM3 0x00000008 ///< PWM3 Pin Present +#define SYSCTL_DC5_PWM2 0x00000004 ///< PWM2 Pin Present +#define SYSCTL_DC5_PWM1 0x00000002 ///< PWM1 Pin Present +#define SYSCTL_DC5_PWM0 0x00000001 ///< PWM0 Pin Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC6 register. + */ +/*\{*/ +#define SYSCTL_DC6_USB0PHY 0x00000010 ///< USB Module 0 PHY Present +#define SYSCTL_DC6_USB0_M 0x00000003 ///< USB Module 0 Present +#define SYSCTL_DC6_USB0_DEV 0x00000001 ///< USB0 is Device Only +#define SYSCTL_DC6_USB0_HOSTDEV 0x00000002 ///< USB is Device or Host +#define SYSCTL_DC6_USB0_OTG 0x00000003 ///< USB0 is OTG +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC7 register. + */ +/*\{*/ +#define SYSCTL_DC7_DMACH30 0x40000000 ///< SW +#define SYSCTL_DC7_DMACH29 0x20000000 ///< I2S0_TX / CAN1_TX +#define SYSCTL_DC7_DMACH28 0x10000000 ///< I2S0_RX / CAN1_RX +#define SYSCTL_DC7_DMACH27 0x08000000 ///< CAN1_TX / ADC1_SS3 +#define SYSCTL_DC7_DMACH26 0x04000000 ///< CAN1_RX / ADC1_SS2 +#define SYSCTL_DC7_DMACH25 0x02000000 ///< SSI1_TX / ADC1_SS1 +#define SYSCTL_DC7_SSI1_TX 0x02000000 ///< SSI1 TX on uDMA Ch25 +#define SYSCTL_DC7_SSI1_RX 0x01000000 ///< SSI1 RX on uDMA Ch24 +#define SYSCTL_DC7_DMACH24 0x01000000 ///< SSI1_RX / ADC1_SS0 +#define SYSCTL_DC7_UART1_TX 0x00800000 ///< UART1 TX on uDMA Ch23 +#define SYSCTL_DC7_DMACH23 0x00800000 ///< UART1_TX / CAN2_TX +#define SYSCTL_DC7_DMACH22 0x00400000 ///< UART1_RX / CAN2_RX +#define SYSCTL_DC7_UART1_RX 0x00400000 ///< UART1 RX on uDMA Ch22 +#define SYSCTL_DC7_DMACH21 0x00200000 ///< Timer1B / EPI0_WFIFO +#define SYSCTL_DC7_DMACH20 0x00100000 ///< Timer1A / EPI0_NBRFIFO +#define SYSCTL_DC7_DMACH19 0x00080000 ///< Timer0B / Timer1B +#define SYSCTL_DC7_DMACH18 0x00040000 ///< Timer0A / Timer1A +#define SYSCTL_DC7_DMACH17 0x00020000 ///< ADC0_SS3 +#define SYSCTL_DC7_DMACH16 0x00010000 ///< ADC0_SS2 +#define SYSCTL_DC7_DMACH15 0x00008000 ///< ADC0_SS1 / Timer2B +#define SYSCTL_DC7_DMACH14 0x00004000 ///< ADC0_SS0 / Timer2A +#define SYSCTL_DC7_DMACH13 0x00002000 ///< CAN0_TX / UART2_TX +#define SYSCTL_DC7_DMACH12 0x00001000 ///< CAN0_RX / UART2_RX +#define SYSCTL_DC7_SSI0_TX 0x00000800 ///< SSI0 TX on uDMA Ch11 +#define SYSCTL_DC7_DMACH11 0x00000800 ///< SSI0_TX / SSI1_TX +#define SYSCTL_DC7_SSI0_RX 0x00000400 ///< SSI0 RX on uDMA Ch10 +#define SYSCTL_DC7_DMACH10 0x00000400 ///< SSI0_RX / SSI1_RX +#define SYSCTL_DC7_UART0_TX 0x00000200 ///< UART0 TX on uDMA Ch9 +#define SYSCTL_DC7_DMACH9 0x00000200 ///< UART0_TX / UART1_TX +#define SYSCTL_DC7_DMACH8 0x00000100 ///< UART0_RX / UART1_RX +#define SYSCTL_DC7_UART0_RX 0x00000100 ///< UART0 RX on uDMA Ch8 +#define SYSCTL_DC7_DMACH7 0x00000080 ///< ETH_TX / Timer2B +#define SYSCTL_DC7_DMACH6 0x00000040 ///< ETH_RX / Timer2A +#define SYSCTL_DC7_DMACH5 0x00000020 ///< USB_EP3_TX / Timer2B +#define SYSCTL_DC7_USB_EP3_TX 0x00000020 ///< USB EP3 TX on uDMA Ch5 +#define SYSCTL_DC7_USB_EP3_RX 0x00000010 ///< USB EP3 RX on uDMA Ch4 +#define SYSCTL_DC7_DMACH4 0x00000010 ///< USB_EP3_RX / Timer2A +#define SYSCTL_DC7_USB_EP2_TX 0x00000008 ///< USB EP2 TX on uDMA Ch3 +#define SYSCTL_DC7_DMACH3 0x00000008 ///< USB_EP2_TX / Timer3B +#define SYSCTL_DC7_USB_EP2_RX 0x00000004 ///< USB EP2 RX on uDMA Ch2 +#define SYSCTL_DC7_DMACH2 0x00000004 ///< USB_EP2_RX / Timer3A +#define SYSCTL_DC7_USB_EP1_TX 0x00000002 ///< USB EP1 TX on uDMA Ch1 +#define SYSCTL_DC7_DMACH1 0x00000002 ///< USB_EP1_TX / UART2_TX +#define SYSCTL_DC7_DMACH0 0x00000001 ///< USB_EP1_RX / UART2_RX +#define SYSCTL_DC7_USB_EP1_RX 0x00000001 ///< USB EP1 RX on uDMA Ch0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC8 register. + */ +/*\{*/ +#define SYSCTL_DC8_ADC1AIN15 0x80000000 ///< ADC Module 1 AIN15 Pin Present +#define SYSCTL_DC8_ADC1AIN14 0x40000000 ///< ADC Module 1 AIN14 Pin Present +#define SYSCTL_DC8_ADC1AIN13 0x20000000 ///< ADC Module 1 AIN13 Pin Present +#define SYSCTL_DC8_ADC1AIN12 0x10000000 ///< ADC Module 1 AIN12 Pin Present +#define SYSCTL_DC8_ADC1AIN11 0x08000000 ///< ADC Module 1 AIN11 Pin Present +#define SYSCTL_DC8_ADC1AIN10 0x04000000 ///< ADC Module 1 AIN10 Pin Present +#define SYSCTL_DC8_ADC1AIN9 0x02000000 ///< ADC Module 1 AIN9 Pin Present +#define SYSCTL_DC8_ADC1AIN8 0x01000000 ///< ADC Module 1 AIN8 Pin Present +#define SYSCTL_DC8_ADC1AIN7 0x00800000 ///< ADC Module 1 AIN7 Pin Present +#define SYSCTL_DC8_ADC1AIN6 0x00400000 ///< ADC Module 1 AIN6 Pin Present +#define SYSCTL_DC8_ADC1AIN5 0x00200000 ///< ADC Module 1 AIN5 Pin Present +#define SYSCTL_DC8_ADC1AIN4 0x00100000 ///< ADC Module 1 AIN4 Pin Present +#define SYSCTL_DC8_ADC1AIN3 0x00080000 ///< ADC Module 1 AIN3 Pin Present +#define SYSCTL_DC8_ADC1AIN2 0x00040000 ///< ADC Module 1 AIN2 Pin Present +#define SYSCTL_DC8_ADC1AIN1 0x00020000 ///< ADC Module 1 AIN1 Pin Present +#define SYSCTL_DC8_ADC1AIN0 0x00010000 ///< ADC Module 1 AIN0 Pin Present +#define SYSCTL_DC8_ADC0AIN15 0x00008000 ///< ADC Module 0 AIN15 Pin Present +#define SYSCTL_DC8_ADC0AIN14 0x00004000 ///< ADC Module 0 AIN14 Pin Present +#define SYSCTL_DC8_ADC0AIN13 0x00002000 ///< ADC Module 0 AIN13 Pin Present +#define SYSCTL_DC8_ADC0AIN12 0x00001000 ///< ADC Module 0 AIN12 Pin Present +#define SYSCTL_DC8_ADC0AIN11 0x00000800 ///< ADC Module 0 AIN11 Pin Present +#define SYSCTL_DC8_ADC0AIN10 0x00000400 ///< ADC Module 0 AIN10 Pin Present +#define SYSCTL_DC8_ADC0AIN9 0x00000200 ///< ADC Module 0 AIN9 Pin Present +#define SYSCTL_DC8_ADC0AIN8 0x00000100 ///< ADC Module 0 AIN8 Pin Present +#define SYSCTL_DC8_ADC0AIN7 0x00000080 ///< ADC Module 0 AIN7 Pin Present +#define SYSCTL_DC8_ADC0AIN6 0x00000040 ///< ADC Module 0 AIN6 Pin Present +#define SYSCTL_DC8_ADC0AIN5 0x00000020 ///< ADC Module 0 AIN5 Pin Present +#define SYSCTL_DC8_ADC0AIN4 0x00000010 ///< ADC Module 0 AIN4 Pin Present +#define SYSCTL_DC8_ADC0AIN3 0x00000008 ///< ADC Module 0 AIN3 Pin Present +#define SYSCTL_DC8_ADC0AIN2 0x00000004 ///< ADC Module 0 AIN2 Pin Present +#define SYSCTL_DC8_ADC0AIN1 0x00000002 ///< ADC Module 0 AIN1 Pin Present +#define SYSCTL_DC8_ADC0AIN0 0x00000001 ///< ADC Module 0 AIN0 Pin Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PBORCTL register. + */ +/*\{*/ +#define SYSCTL_PBORCTL_BORTIM_M 0x0000FFFC ///< BOR Time Delay +#define SYSCTL_PBORCTL_BORIOR 0x00000002 ///< BOR Interrupt or Reset +#define SYSCTL_PBORCTL_BORWT 0x00000001 ///< BOR Wait and Check for Noise +#define SYSCTL_PBORCTL_BORTIM_S 2 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_LDOPCTL register. + */ +/*\{*/ +#define SYSCTL_LDOPCTL_M 0x0000003F ///< LDO Output Voltage +#define SYSCTL_LDOPCTL_2_50V 0x00000000 ///< 2.50 +#define SYSCTL_LDOPCTL_2_45V 0x00000001 ///< 2.45 +#define SYSCTL_LDOPCTL_2_40V 0x00000002 ///< 2.40 +#define SYSCTL_LDOPCTL_2_35V 0x00000003 ///< 2.35 +#define SYSCTL_LDOPCTL_2_30V 0x00000004 ///< 2.30 +#define SYSCTL_LDOPCTL_2_25V 0x00000005 ///< 2.25 +#define SYSCTL_LDOPCTL_2_75V 0x0000001B ///< 2.75 +#define SYSCTL_LDOPCTL_2_70V 0x0000001C ///< 2.70 +#define SYSCTL_LDOPCTL_2_65V 0x0000001D ///< 2.65 +#define SYSCTL_LDOPCTL_2_60V 0x0000001E ///< 2.60 +#define SYSCTL_LDOPCTL_2_55V 0x0000001F ///< 2.55 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SRCR0 register. + */ +/*\{*/ +#define SYSCTL_SRCR0_WDT1 0x10000000 ///< WDT1 Reset Control +#define SYSCTL_SRCR0_CAN2 0x04000000 ///< CAN2 Reset Control +#define SYSCTL_SRCR0_CAN1 0x02000000 ///< CAN1 Reset Control +#define SYSCTL_SRCR0_CAN0 0x01000000 ///< CAN0 Reset Control +#define SYSCTL_SRCR0_PWM 0x00100000 ///< PWM Reset Control +#define SYSCTL_SRCR0_ADC1 0x00020000 ///< ADC1 Reset Control +#define SYSCTL_SRCR0_ADC0 0x00010000 ///< ADC0 Reset Control +#define SYSCTL_SRCR0_HIB 0x00000040 ///< HIB Reset Control +#define SYSCTL_SRCR0_WDT0 0x00000008 ///< WDT0 Reset Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SRCR1 register. + */ +/*\{*/ +#define SYSCTL_SRCR1_EPI0 0x40000000 ///< EPI0 Reset Control +#define SYSCTL_SRCR1_I2S0 0x10000000 ///< I2S0 Reset Control +#define SYSCTL_SRCR1_COMP2 0x04000000 ///< Analog Comp 2 Reset Control +#define SYSCTL_SRCR1_COMP1 0x02000000 ///< Analog Comp 1 Reset Control +#define SYSCTL_SRCR1_COMP0 0x01000000 ///< Analog Comp 0 Reset Control +#define SYSCTL_SRCR1_TIMER3 0x00080000 ///< Timer 3 Reset Control +#define SYSCTL_SRCR1_TIMER2 0x00040000 ///< Timer 2 Reset Control +#define SYSCTL_SRCR1_TIMER1 0x00020000 ///< Timer 1 Reset Control +#define SYSCTL_SRCR1_TIMER0 0x00010000 ///< Timer 0 Reset Control +#define SYSCTL_SRCR1_I2C1 0x00004000 ///< I2C1 Reset Control +#define SYSCTL_SRCR1_I2C0 0x00001000 ///< I2C0 Reset Control +#define SYSCTL_SRCR1_QEI1 0x00000200 ///< QEI1 Reset Control +#define SYSCTL_SRCR1_QEI0 0x00000100 ///< QEI0 Reset Control +#define SYSCTL_SRCR1_SSI1 0x00000020 ///< SSI1 Reset Control +#define SYSCTL_SRCR1_SSI0 0x00000010 ///< SSI0 Reset Control +#define SYSCTL_SRCR1_UART2 0x00000004 ///< UART2 Reset Control +#define SYSCTL_SRCR1_UART1 0x00000002 ///< UART1 Reset Control +#define SYSCTL_SRCR1_UART0 0x00000001 ///< UART0 Reset Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SRCR2 register. + */ +/*\{*/ +#define SYSCTL_SRCR2_EPHY0 0x40000000 ///< PHY0 Reset Control +#define SYSCTL_SRCR2_EMAC0 0x10000000 ///< MAC0 Reset Control +#define SYSCTL_SRCR2_USB0 0x00010000 ///< USB0 Reset Control +#define SYSCTL_SRCR2_UDMA 0x00002000 ///< Micro-DMA Reset Control +#define SYSCTL_SRCR2_GPIOJ 0x00000100 ///< Port J Reset Control +#define SYSCTL_SRCR2_GPIOH 0x00000080 ///< Port H Reset Control +#define SYSCTL_SRCR2_GPIOG 0x00000040 ///< Port G Reset Control +#define SYSCTL_SRCR2_GPIOF 0x00000020 ///< Port F Reset Control +#define SYSCTL_SRCR2_GPIOE 0x00000010 ///< Port E Reset Control +#define SYSCTL_SRCR2_GPIOD 0x00000008 ///< Port D Reset Control +#define SYSCTL_SRCR2_GPIOC 0x00000004 ///< Port C Reset Control +#define SYSCTL_SRCR2_GPIOB 0x00000002 ///< Port B Reset Control +#define SYSCTL_SRCR2_GPIOA 0x00000001 ///< Port A Reset Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RIS register. + */ +/*\{*/ +#define SYSCTL_RIS_MOSCPUPRIS 0x00000100 ///< MOSC Power Up Raw Interrupt + ///< Status +#define SYSCTL_RIS_USBPLLLRIS 0x00000080 ///< USB PLL Lock Raw Interrupt + ///< Status +#define SYSCTL_RIS_PLLLRIS 0x00000040 ///< PLL Lock Raw Interrupt Status +#define SYSCTL_RIS_CLRIS 0x00000020 ///< Current Limit Raw Interrupt + ///< Status +#define SYSCTL_RIS_IOFRIS 0x00000010 ///< Internal Oscillator Fault Raw + ///< Interrupt Status +#define SYSCTL_RIS_MOFRIS 0x00000008 ///< Main Oscillator Fault Raw + ///< Interrupt Status +#define SYSCTL_RIS_LDORIS 0x00000004 ///< LDO Power Unregulated Raw + ///< Interrupt Status +#define SYSCTL_RIS_BORRIS 0x00000002 ///< Brown-Out Reset Raw Interrupt + ///< Status +#define SYSCTL_RIS_PLLFRIS 0x00000001 ///< PLL Fault Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_IMC register. + */ +/*\{*/ +#define SYSCTL_IMC_MOSCPUPIM 0x00000100 ///< MOSC Power Up Interrupt Mask +#define SYSCTL_IMC_USBPLLLIM 0x00000080 ///< USB PLL Lock Interrupt Mask +#define SYSCTL_IMC_PLLLIM 0x00000040 ///< PLL Lock Interrupt Mask +#define SYSCTL_IMC_CLIM 0x00000020 ///< Current Limit Interrupt Mask +#define SYSCTL_IMC_IOFIM 0x00000010 ///< Internal Oscillator Fault + ///< Interrupt Mask +#define SYSCTL_IMC_MOFIM 0x00000008 ///< Main Oscillator Fault Interrupt + ///< Mask +#define SYSCTL_IMC_LDOIM 0x00000004 ///< LDO Power Unregulated Interrupt + ///< Mask +#define SYSCTL_IMC_BORIM 0x00000002 ///< Brown-Out Reset Interrupt Mask +#define SYSCTL_IMC_PLLFIM 0x00000001 ///< PLL Fault Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_MISC register. + */ +/*\{*/ +#define SYSCTL_MISC_MOSCPUPMIS 0x00000100 ///< MOSC Power Up Masked Interrupt + ///< Status +#define SYSCTL_MISC_USBPLLLMIS 0x00000080 ///< USB PLL Lock Masked Interrupt + ///< Status +#define SYSCTL_MISC_PLLLMIS 0x00000040 ///< PLL Lock Masked Interrupt Status +#define SYSCTL_MISC_CLMIS 0x00000020 ///< Current Limit Masked Interrupt + ///< Status +#define SYSCTL_MISC_IOFMIS 0x00000010 ///< Internal Oscillator Fault Masked + ///< Interrupt Status +#define SYSCTL_MISC_MOFMIS 0x00000008 ///< Main Oscillator Fault Masked + ///< Interrupt Status +#define SYSCTL_MISC_LDOMIS 0x00000004 ///< LDO Power Unregulated Masked + ///< Interrupt Status +#define SYSCTL_MISC_BORMIS 0x00000002 ///< BOR Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RESC register. + */ +/*\{*/ +#define SYSCTL_RESC_MOSCFAIL 0x00010000 ///< MOSC Failure Reset +#define SYSCTL_RESC_LDO 0x00000020 ///< LDO Reset +#define SYSCTL_RESC_WDT1 0x00000020 ///< Watchdog Timer 1 Reset +#define SYSCTL_RESC_SW 0x00000010 ///< Software Reset +#define SYSCTL_RESC_WDT0 0x00000008 ///< Watchdog Timer 0 Reset +#define SYSCTL_RESC_BOR 0x00000004 ///< Brown-Out Reset +#define SYSCTL_RESC_POR 0x00000002 ///< Power-On Reset +#define SYSCTL_RESC_EXT 0x00000001 ///< External Reset +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCC register. + */ +/*\{*/ +#define SYSCTL_RCC_ACG 0x08000000 ///< Auto Clock Gating +#define SYSCTL_RCC_SYSDIV_M 0x07800000 ///< System Clock Divisor +#define SYSCTL_RCC_SYSDIV_2 0x00800000 ///< System clock /2 +#define SYSCTL_RCC_SYSDIV_3 0x01000000 ///< System clock /3 +#define SYSCTL_RCC_SYSDIV_4 0x01800000 ///< System clock /4 +#define SYSCTL_RCC_SYSDIV_5 0x02000000 ///< System clock /5 +#define SYSCTL_RCC_SYSDIV_6 0x02800000 ///< System clock /6 +#define SYSCTL_RCC_SYSDIV_7 0x03000000 ///< System clock /7 +#define SYSCTL_RCC_SYSDIV_8 0x03800000 ///< System clock /8 +#define SYSCTL_RCC_SYSDIV_9 0x04000000 ///< System clock /9 +#define SYSCTL_RCC_SYSDIV_10 0x04800000 ///< System clock /10 +#define SYSCTL_RCC_SYSDIV_11 0x05000000 ///< System clock /11 +#define SYSCTL_RCC_SYSDIV_12 0x05800000 ///< System clock /12 +#define SYSCTL_RCC_SYSDIV_13 0x06000000 ///< System clock /13 +#define SYSCTL_RCC_SYSDIV_14 0x06800000 ///< System clock /14 +#define SYSCTL_RCC_SYSDIV_15 0x07000000 ///< System clock /15 +#define SYSCTL_RCC_SYSDIV_16 0x07800000 ///< System clock /16 +#define SYSCTL_RCC_USESYSDIV 0x00400000 ///< Enable System Clock Divider +#define SYSCTL_RCC_USEPWMDIV 0x00100000 ///< Enable PWM Clock Divisor +#define SYSCTL_RCC_PWMDIV_M 0x000E0000 ///< PWM Unit Clock Divisor +#define SYSCTL_RCC_PWMDIV_2 0x00000000 ///< PWM clock /2 +#define SYSCTL_RCC_PWMDIV_4 0x00020000 ///< PWM clock /4 +#define SYSCTL_RCC_PWMDIV_8 0x00040000 ///< PWM clock /8 +#define SYSCTL_RCC_PWMDIV_16 0x00060000 ///< PWM clock /16 +#define SYSCTL_RCC_PWMDIV_32 0x00080000 ///< PWM clock /32 +#define SYSCTL_RCC_PWMDIV_64 0x000A0000 ///< PWM clock /64 +#define SYSCTL_RCC_PWRDN 0x00002000 ///< PLL Power Down +#define SYSCTL_RCC_OEN 0x00001000 ///< PLL Output Enable +#define SYSCTL_RCC_BYPASS 0x00000800 ///< PLL Bypass +#define SYSCTL_RCC_XTAL_M 0x000007C0 ///< Crystal Value +#define SYSCTL_RCC_XTAL_1MHZ 0x00000000 ///< 1 MHz +#define SYSCTL_RCC_XTAL_1_84MHZ 0x00000040 ///< 1.8432 MHz +#define SYSCTL_RCC_XTAL_2MHZ 0x00000080 ///< 2 MHz +#define SYSCTL_RCC_XTAL_2_45MHZ 0x000000C0 ///< 2.4576 MHz +#define SYSCTL_RCC_XTAL_3_57MHZ 0x00000100 ///< 3.579545 MHz +#define SYSCTL_RCC_XTAL_3_68MHZ 0x00000140 ///< 3.6864 MHz +#define SYSCTL_RCC_XTAL_4MHZ 0x00000180 ///< 4 MHz +#define SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0 ///< 4.096 MHz +#define SYSCTL_RCC_XTAL_4_91MHZ 0x00000200 ///< 4.9152 MHz +#define SYSCTL_RCC_XTAL_5MHZ 0x00000240 ///< 5 MHz +#define SYSCTL_RCC_XTAL_5_12MHZ 0x00000280 ///< 5.12 MHz +#define SYSCTL_RCC_XTAL_6MHZ 0x000002C0 ///< 6 MHz +#define SYSCTL_RCC_XTAL_6_14MHZ 0x00000300 ///< 6.144 MHz +#define SYSCTL_RCC_XTAL_7_37MHZ 0x00000340 ///< 7.3728 MHz +#define SYSCTL_RCC_XTAL_8MHZ 0x00000380 ///< 8 MHz +#define SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0 ///< 8.192 MHz +#define SYSCTL_RCC_XTAL_10MHZ 0x00000400 ///< 10 MHz +#define SYSCTL_RCC_XTAL_12MHZ 0x00000440 ///< 12 MHz +#define SYSCTL_RCC_XTAL_12_2MHZ 0x00000480 ///< 12.288 MHz +#define SYSCTL_RCC_XTAL_13_5MHZ 0x000004C0 ///< 13.56 MHz +#define SYSCTL_RCC_XTAL_14_3MHZ 0x00000500 ///< 14.31818 MHz +#define SYSCTL_RCC_XTAL_16MHZ 0x00000540 ///< 16 MHz +#define SYSCTL_RCC_XTAL_16_3MHZ 0x00000580 ///< 16.384 MHz +#define SYSCTL_RCC_PLLVER 0x00000400 ///< PLL Verification +#define SYSCTL_RCC_OSCSRC_M 0x00000030 ///< Oscillator Source +#define SYSCTL_RCC_OSCSRC_MAIN 0x00000000 ///< MOSC +#define SYSCTL_RCC_OSCSRC_INT 0x00000010 ///< IOSC +#define SYSCTL_RCC_OSCSRC_INT4 0x00000020 ///< IOSC/4 +#define SYSCTL_RCC_OSCSRC_30 0x00000030 ///< 30 kHz +#define SYSCTL_RCC_IOSCVER 0x00000008 ///< Internal Oscillator Verification + ///< Timer +#define SYSCTL_RCC_MOSCVER 0x00000004 ///< Main Oscillator Verification + ///< Timer +#define SYSCTL_RCC_IOSCDIS 0x00000002 ///< Internal Oscillator Disable +#define SYSCTL_RCC_MOSCDIS 0x00000001 ///< Main Oscillator Disable +#define SYSCTL_RCC_SYSDIV_S 23 +#define SYSCTL_RCC_PWMDIV_S 17 ///< Shift to the PWMDIV field +#define SYSCTL_RCC_XTAL_S 6 ///< Shift to the XTAL field +#define SYSCTL_RCC_OSCSRC_S 4 ///< Shift to the OSCSRC field +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PLLCFG register. + */ +/*\{*/ +#define SYSCTL_PLLCFG_OD_M 0x0000C000 ///< PLL OD Value +#define SYSCTL_PLLCFG_OD_1 0x00000000 ///< Divide by 1 +#define SYSCTL_PLLCFG_OD_2 0x00004000 ///< Divide by 2 +#define SYSCTL_PLLCFG_OD_4 0x00008000 ///< Divide by 4 +#define SYSCTL_PLLCFG_F_M 0x00003FE0 ///< PLL F Value +#define SYSCTL_PLLCFG_R_M 0x0000001F ///< PLL R Value +#define SYSCTL_PLLCFG_F_S 5 +#define SYSCTL_PLLCFG_R_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_GPIOHSCTL + * register. + */ +/*\{*/ +#define SYSCTL_GPIOHSCTL_PORTH 0x00000080 ///< Port H High-Speed +#define SYSCTL_GPIOHSCTL_PORTG 0x00000040 ///< Port G High-Speed +#define SYSCTL_GPIOHSCTL_PORTF 0x00000020 ///< Port F High-Speed +#define SYSCTL_GPIOHSCTL_PORTE 0x00000010 ///< Port E High-Speed +#define SYSCTL_GPIOHSCTL_PORTD 0x00000008 ///< Port D High-Speed +#define SYSCTL_GPIOHSCTL_PORTC 0x00000004 ///< Port C High-Speed +#define SYSCTL_GPIOHSCTL_PORTB 0x00000002 ///< Port B High-Speed +#define SYSCTL_GPIOHSCTL_PORTA 0x00000001 ///< Port A High-Speed +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_GPIOHBCTL + * register. + */ +/*\{*/ +#define SYSCTL_GPIOHBCTL_PORTJ 0x00000100 ///< Port J Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTH 0x00000080 ///< Port H Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTG 0x00000040 ///< Port G Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTF 0x00000020 ///< Port F Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTE 0x00000010 ///< Port E Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTD 0x00000008 ///< Port D Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTC 0x00000004 ///< Port C Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTB 0x00000002 ///< Port B Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTA 0x00000001 ///< Port A Advanced High-Performance + ///< Bus +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCC2 register. + */ +/*\{*/ +#define SYSCTL_RCC2_USERCC2 0x80000000 ///< Use RCC2 +#define SYSCTL_RCC2_DIV400 0x40000000 ///< Divide PLL as 400 MHz vs. 200 + ///< MHz +#define SYSCTL_RCC2_SYSDIV2_M 0x1F800000 ///< System Clock Divisor 2 +#define SYSCTL_RCC2_SYSDIV2_2 0x00800000 ///< System clock /2 +#define SYSCTL_RCC2_SYSDIV2_3 0x01000000 ///< System clock /3 +#define SYSCTL_RCC2_SYSDIV2_4 0x01800000 ///< System clock /4 +#define SYSCTL_RCC2_SYSDIV2_5 0x02000000 ///< System clock /5 +#define SYSCTL_RCC2_SYSDIV2_6 0x02800000 ///< System clock /6 +#define SYSCTL_RCC2_SYSDIV2_7 0x03000000 ///< System clock /7 +#define SYSCTL_RCC2_SYSDIV2_8 0x03800000 ///< System clock /8 +#define SYSCTL_RCC2_SYSDIV2_9 0x04000000 ///< System clock /9 +#define SYSCTL_RCC2_SYSDIV2_10 0x04800000 ///< System clock /10 +#define SYSCTL_RCC2_SYSDIV2_11 0x05000000 ///< System clock /11 +#define SYSCTL_RCC2_SYSDIV2_12 0x05800000 ///< System clock /12 +#define SYSCTL_RCC2_SYSDIV2_13 0x06000000 ///< System clock /13 +#define SYSCTL_RCC2_SYSDIV2_14 0x06800000 ///< System clock /14 +#define SYSCTL_RCC2_SYSDIV2_15 0x07000000 ///< System clock /15 +#define SYSCTL_RCC2_SYSDIV2_16 0x07800000 ///< System clock /16 +#define SYSCTL_RCC2_SYSDIV2_17 0x08000000 ///< System clock /17 +#define SYSCTL_RCC2_SYSDIV2_18 0x08800000 ///< System clock /18 +#define SYSCTL_RCC2_SYSDIV2_19 0x09000000 ///< System clock /19 +#define SYSCTL_RCC2_SYSDIV2_20 0x09800000 ///< System clock /20 +#define SYSCTL_RCC2_SYSDIV2_21 0x0A000000 ///< System clock /21 +#define SYSCTL_RCC2_SYSDIV2_22 0x0A800000 ///< System clock /22 +#define SYSCTL_RCC2_SYSDIV2_23 0x0B000000 ///< System clock /23 +#define SYSCTL_RCC2_SYSDIV2_24 0x0B800000 ///< System clock /24 +#define SYSCTL_RCC2_SYSDIV2_25 0x0C000000 ///< System clock /25 +#define SYSCTL_RCC2_SYSDIV2_26 0x0C800000 ///< System clock /26 +#define SYSCTL_RCC2_SYSDIV2_27 0x0D000000 ///< System clock /27 +#define SYSCTL_RCC2_SYSDIV2_28 0x0D800000 ///< System clock /28 +#define SYSCTL_RCC2_SYSDIV2_29 0x0E000000 ///< System clock /29 +#define SYSCTL_RCC2_SYSDIV2_30 0x0E800000 ///< System clock /30 +#define SYSCTL_RCC2_SYSDIV2_31 0x0F000000 ///< System clock /31 +#define SYSCTL_RCC2_SYSDIV2_32 0x0F800000 ///< System clock /32 +#define SYSCTL_RCC2_SYSDIV2_33 0x10000000 ///< System clock /33 +#define SYSCTL_RCC2_SYSDIV2_34 0x10800000 ///< System clock /34 +#define SYSCTL_RCC2_SYSDIV2_35 0x11000000 ///< System clock /35 +#define SYSCTL_RCC2_SYSDIV2_36 0x11800000 ///< System clock /36 +#define SYSCTL_RCC2_SYSDIV2_37 0x12000000 ///< System clock /37 +#define SYSCTL_RCC2_SYSDIV2_38 0x12800000 ///< System clock /38 +#define SYSCTL_RCC2_SYSDIV2_39 0x13000000 ///< System clock /39 +#define SYSCTL_RCC2_SYSDIV2_40 0x13800000 ///< System clock /40 +#define SYSCTL_RCC2_SYSDIV2_41 0x14000000 ///< System clock /41 +#define SYSCTL_RCC2_SYSDIV2_42 0x14800000 ///< System clock /42 +#define SYSCTL_RCC2_SYSDIV2_43 0x15000000 ///< System clock /43 +#define SYSCTL_RCC2_SYSDIV2_44 0x15800000 ///< System clock /44 +#define SYSCTL_RCC2_SYSDIV2_45 0x16000000 ///< System clock /45 +#define SYSCTL_RCC2_SYSDIV2_46 0x16800000 ///< System clock /46 +#define SYSCTL_RCC2_SYSDIV2_47 0x17000000 ///< System clock /47 +#define SYSCTL_RCC2_SYSDIV2_48 0x17800000 ///< System clock /48 +#define SYSCTL_RCC2_SYSDIV2_49 0x18000000 ///< System clock /49 +#define SYSCTL_RCC2_SYSDIV2_50 0x18800000 ///< System clock /50 +#define SYSCTL_RCC2_SYSDIV2_51 0x19000000 ///< System clock /51 +#define SYSCTL_RCC2_SYSDIV2_52 0x19800000 ///< System clock /52 +#define SYSCTL_RCC2_SYSDIV2_53 0x1A000000 ///< System clock /53 +#define SYSCTL_RCC2_SYSDIV2_54 0x1A800000 ///< System clock /54 +#define SYSCTL_RCC2_SYSDIV2_55 0x1B000000 ///< System clock /55 +#define SYSCTL_RCC2_SYSDIV2_56 0x1B800000 ///< System clock /56 +#define SYSCTL_RCC2_SYSDIV2_57 0x1C000000 ///< System clock /57 +#define SYSCTL_RCC2_SYSDIV2_58 0x1C800000 ///< System clock /58 +#define SYSCTL_RCC2_SYSDIV2_59 0x1D000000 ///< System clock /59 +#define SYSCTL_RCC2_SYSDIV2_60 0x1D800000 ///< System clock /60 +#define SYSCTL_RCC2_SYSDIV2_61 0x1E000000 ///< System clock /61 +#define SYSCTL_RCC2_SYSDIV2_62 0x1E800000 ///< System clock /62 +#define SYSCTL_RCC2_SYSDIV2_63 0x1F000000 ///< System clock /63 +#define SYSCTL_RCC2_SYSDIV2_64 0x1F800000 ///< System clock /64 +#define SYSCTL_RCC2_SYSDIV2LSB 0x00400000 ///< Additional LSB for SYSDIV2 +#define SYSCTL_RCC2_USBPWRDN 0x00004000 ///< Power-Down USB PLL +#define SYSCTL_RCC2_PWRDN2 0x00002000 ///< Power-Down PLL 2 +#define SYSCTL_RCC2_BYPASS2 0x00000800 ///< PLL Bypass 2 +#define SYSCTL_RCC2_OSCSRC2_M 0x00000070 ///< Oscillator Source 2 +#define SYSCTL_RCC2_OSCSRC2_MO 0x00000000 ///< MOSC +#define SYSCTL_RCC2_OSCSRC2_IO 0x00000010 ///< PIOSC +#define SYSCTL_RCC2_OSCSRC2_IO4 0x00000020 ///< PIOSC/4 +#define SYSCTL_RCC2_OSCSRC2_30 0x00000030 ///< 30 kHz +#define SYSCTL_RCC2_OSCSRC2_419 0x00000060 ///< 4.194304 MHz +#define SYSCTL_RCC2_OSCSRC2_32 0x00000070 ///< 32.768 kHz +#define SYSCTL_RCC2_SYSDIV2_S 23 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_MOSCCTL register. + */ +/*\{*/ +#define SYSCTL_MOSCCTL_CVAL 0x00000001 ///< Clock Validation for MOSC +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCGC0 register. + */ +/*\{*/ +#define SYSCTL_RCGC0_WDT1 0x10000000 ///< WDT1 Clock Gating Control +#define SYSCTL_RCGC0_CAN2 0x04000000 ///< CAN2 Clock Gating Control +#define SYSCTL_RCGC0_CAN1 0x02000000 ///< CAN1 Clock Gating Control +#define SYSCTL_RCGC0_CAN0 0x01000000 ///< CAN0 Clock Gating Control +#define SYSCTL_RCGC0_PWM 0x00100000 ///< PWM Clock Gating Control +#define SYSCTL_RCGC0_ADC1 0x00020000 ///< ADC1 Clock Gating Control +#define SYSCTL_RCGC0_ADC0 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_RCGC0_ADCSPD_M 0x00000F00 ///< ADC Sample Speed +#define SYSCTL_RCGC0_ADCSPD125K 0x00000000 ///< 125K samples/second +#define SYSCTL_RCGC0_ADCSPD250K 0x00000100 ///< 250K samples/second +#define SYSCTL_RCGC0_ADCSPD500K 0x00000200 ///< 500K samples/second +#define SYSCTL_RCGC0_ADCSPD1M 0x00000300 ///< 1M samples/second +#define SYSCTL_RCGC0_ADC1SPD_M 0x00000C00 ///< ADC1 Sample Speed +#define SYSCTL_RCGC0_ADC1SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_RCGC0_ADC1SPD_250K \ + 0x00000400 ///< 250K samples/second +#define SYSCTL_RCGC0_ADC1SPD_500K \ + 0x00000800 ///< 500K samples/second +#define SYSCTL_RCGC0_ADC1SPD_1M 0x00000C00 ///< 1M samples/second +#define SYSCTL_RCGC0_ADC0SPD_M 0x00000300 ///< ADC0 Sample Speed +#define SYSCTL_RCGC0_ADC0SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_RCGC0_ADC0SPD_250K \ + 0x00000100 ///< 250K samples/second +#define SYSCTL_RCGC0_ADC0SPD_500K \ + 0x00000200 ///< 500K samples/second +#define SYSCTL_RCGC0_ADC0SPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_RCGC0_HIB 0x00000040 ///< HIB Clock Gating Control +#define SYSCTL_RCGC0_WDT0 0x00000008 ///< WDT0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCGC1 register. + */ +/*\{*/ +#define SYSCTL_RCGC1_EPI0 0x40000000 ///< EPI0 Clock Gating +#define SYSCTL_RCGC1_I2S0 0x10000000 ///< I2S0 Clock Gating +#define SYSCTL_RCGC1_COMP2 0x04000000 ///< Analog Comparator 2 Clock Gating +#define SYSCTL_RCGC1_COMP1 0x02000000 ///< Analog Comparator 1 Clock Gating +#define SYSCTL_RCGC1_COMP0 0x01000000 ///< Analog Comparator 0 Clock Gating +#define SYSCTL_RCGC1_TIMER3 0x00080000 ///< Timer 3 Clock Gating Control +#define SYSCTL_RCGC1_TIMER2 0x00040000 ///< Timer 2 Clock Gating Control +#define SYSCTL_RCGC1_TIMER1 0x00020000 ///< Timer 1 Clock Gating Control +#define SYSCTL_RCGC1_TIMER0 0x00010000 ///< Timer 0 Clock Gating Control +#define SYSCTL_RCGC1_I2C1 0x00004000 ///< I2C1 Clock Gating Control +#define SYSCTL_RCGC1_I2C0 0x00001000 ///< I2C0 Clock Gating Control +#define SYSCTL_RCGC1_QEI1 0x00000200 ///< QEI1 Clock Gating Control +#define SYSCTL_RCGC1_QEI0 0x00000100 ///< QEI0 Clock Gating Control +#define SYSCTL_RCGC1_SSI1 0x00000020 ///< SSI1 Clock Gating Control +#define SYSCTL_RCGC1_SSI0 0x00000010 ///< SSI0 Clock Gating Control +#define SYSCTL_RCGC1_UART2 0x00000004 ///< UART2 Clock Gating Control +#define SYSCTL_RCGC1_UART1 0x00000002 ///< UART1 Clock Gating Control +#define SYSCTL_RCGC1_UART0 0x00000001 ///< UART0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCGC2 register. + */ +/*\{*/ +#define SYSCTL_RCGC2_EPHY0 0x40000000 ///< PHY0 Clock Gating Control +#define SYSCTL_RCGC2_EMAC0 0x10000000 ///< MAC0 Clock Gating Control +#define SYSCTL_RCGC2_USB0 0x00010000 ///< USB0 Clock Gating Control +#define SYSCTL_RCGC2_UDMA 0x00002000 ///< Micro-DMA Clock Gating Control +#define SYSCTL_RCGC2_GPIOJ 0x00000100 ///< Port J Clock Gating Control +#define SYSCTL_RCGC2_GPIOH 0x00000080 ///< Port H Clock Gating Control +#define SYSCTL_RCGC2_GPIOG 0x00000040 ///< Port G Clock Gating Control +#define SYSCTL_RCGC2_GPIOF 0x00000020 ///< Port F Clock Gating Control +#define SYSCTL_RCGC2_GPIOE 0x00000010 ///< Port E Clock Gating Control +#define SYSCTL_RCGC2_GPIOD 0x00000008 ///< Port D Clock Gating Control +#define SYSCTL_RCGC2_GPIOC 0x00000004 ///< Port C Clock Gating Control +#define SYSCTL_RCGC2_GPIOB 0x00000002 ///< Port B Clock Gating Control +#define SYSCTL_RCGC2_GPIOA 0x00000001 ///< Port A Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SCGC0 register. + */ +/*\{*/ +#define SYSCTL_SCGC0_WDT1 0x10000000 ///< WDT1 Clock Gating Control +#define SYSCTL_SCGC0_CAN2 0x04000000 ///< CAN2 Clock Gating Control +#define SYSCTL_SCGC0_CAN1 0x02000000 ///< CAN1 Clock Gating Control +#define SYSCTL_SCGC0_CAN0 0x01000000 ///< CAN0 Clock Gating Control +#define SYSCTL_SCGC0_PWM 0x00100000 ///< PWM Clock Gating Control +#define SYSCTL_SCGC0_ADC1 0x00020000 ///< ADC1 Clock Gating Control +#define SYSCTL_SCGC0_ADC0 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_SCGC0_ADCSPD_M 0x00000F00 ///< ADC Sample Speed +#define SYSCTL_SCGC0_ADCSPD125K 0x00000000 ///< 125K samples/second +#define SYSCTL_SCGC0_ADCSPD250K 0x00000100 ///< 250K samples/second +#define SYSCTL_SCGC0_ADCSPD500K 0x00000200 ///< 500K samples/second +#define SYSCTL_SCGC0_ADCSPD1M 0x00000300 ///< 1M samples/second +#define SYSCTL_SCGC0_ADC1SPD_M 0x00000C00 ///< ADC1 Sample Speed +#define SYSCTL_SCGC0_ADC1SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_SCGC0_ADC1SPD_250K \ + 0x00000400 ///< 250K samples/second +#define SYSCTL_SCGC0_ADC1SPD_500K \ + 0x00000800 ///< 500K samples/second +#define SYSCTL_SCGC0_ADC1SPD_1M 0x00000C00 ///< 1M samples/second +#define SYSCTL_SCGC0_ADC0SPD_M 0x00000300 ///< ADC0 Sample Speed +#define SYSCTL_SCGC0_ADC0SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_SCGC0_ADC0SPD_250K \ + 0x00000100 ///< 250K samples/second +#define SYSCTL_SCGC0_ADC0SPD_500K \ + 0x00000200 ///< 500K samples/second +#define SYSCTL_SCGC0_ADC0SPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_SCGC0_HIB 0x00000040 ///< HIB Clock Gating Control +#define SYSCTL_SCGC0_WDT0 0x00000008 ///< WDT0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SCGC1 register. + */ +/*\{*/ +#define SYSCTL_SCGC1_EPI0 0x40000000 ///< EPI0 Clock Gating +#define SYSCTL_SCGC1_I2S0 0x10000000 ///< I2S0 Clock Gating +#define SYSCTL_SCGC1_COMP2 0x04000000 ///< Analog Comparator 2 Clock Gating +#define SYSCTL_SCGC1_COMP1 0x02000000 ///< Analog Comparator 1 Clock Gating +#define SYSCTL_SCGC1_COMP0 0x01000000 ///< Analog Comparator 0 Clock Gating +#define SYSCTL_SCGC1_TIMER3 0x00080000 ///< Timer 3 Clock Gating Control +#define SYSCTL_SCGC1_TIMER2 0x00040000 ///< Timer 2 Clock Gating Control +#define SYSCTL_SCGC1_TIMER1 0x00020000 ///< Timer 1 Clock Gating Control +#define SYSCTL_SCGC1_TIMER0 0x00010000 ///< Timer 0 Clock Gating Control +#define SYSCTL_SCGC1_I2C1 0x00004000 ///< I2C1 Clock Gating Control +#define SYSCTL_SCGC1_I2C0 0x00001000 ///< I2C0 Clock Gating Control +#define SYSCTL_SCGC1_QEI1 0x00000200 ///< QEI1 Clock Gating Control +#define SYSCTL_SCGC1_QEI0 0x00000100 ///< QEI0 Clock Gating Control +#define SYSCTL_SCGC1_SSI1 0x00000020 ///< SSI1 Clock Gating Control +#define SYSCTL_SCGC1_SSI0 0x00000010 ///< SSI0 Clock Gating Control +#define SYSCTL_SCGC1_UART2 0x00000004 ///< UART2 Clock Gating Control +#define SYSCTL_SCGC1_UART1 0x00000002 ///< UART1 Clock Gating Control +#define SYSCTL_SCGC1_UART0 0x00000001 ///< UART0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SCGC2 register. + */ +/*\{*/ +#define SYSCTL_SCGC2_EPHY0 0x40000000 ///< PHY0 Clock Gating Control +#define SYSCTL_SCGC2_EMAC0 0x10000000 ///< MAC0 Clock Gating Control +#define SYSCTL_SCGC2_USB0 0x00010000 ///< USB0 Clock Gating Control +#define SYSCTL_SCGC2_UDMA 0x00002000 ///< Micro-DMA Clock Gating Control +#define SYSCTL_SCGC2_GPIOJ 0x00000100 ///< Port J Clock Gating Control +#define SYSCTL_SCGC2_GPIOH 0x00000080 ///< Port H Clock Gating Control +#define SYSCTL_SCGC2_GPIOG 0x00000040 ///< Port G Clock Gating Control +#define SYSCTL_SCGC2_GPIOF 0x00000020 ///< Port F Clock Gating Control +#define SYSCTL_SCGC2_GPIOE 0x00000010 ///< Port E Clock Gating Control +#define SYSCTL_SCGC2_GPIOD 0x00000008 ///< Port D Clock Gating Control +#define SYSCTL_SCGC2_GPIOC 0x00000004 ///< Port C Clock Gating Control +#define SYSCTL_SCGC2_GPIOB 0x00000002 ///< Port B Clock Gating Control +#define SYSCTL_SCGC2_GPIOA 0x00000001 ///< Port A Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DCGC0 register. + */ +/*\{*/ +#define SYSCTL_DCGC0_WDT1 0x10000000 ///< WDT1 Clock Gating Control +#define SYSCTL_DCGC0_CAN2 0x04000000 ///< CAN2 Clock Gating Control +#define SYSCTL_DCGC0_CAN1 0x02000000 ///< CAN1 Clock Gating Control +#define SYSCTL_DCGC0_CAN0 0x01000000 ///< CAN0 Clock Gating Control +#define SYSCTL_DCGC0_PWM 0x00100000 ///< PWM Clock Gating Control +#define SYSCTL_DCGC0_ADC1 0x00020000 ///< ADC1 Clock Gating Control +#define SYSCTL_DCGC0_ADC0 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_DCGC0_HIB 0x00000040 ///< HIB Clock Gating Control +#define SYSCTL_DCGC0_WDT0 0x00000008 ///< WDT0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DCGC1 register. + */ +/*\{*/ +#define SYSCTL_DCGC1_EPI0 0x40000000 ///< EPI0 Clock Gating +#define SYSCTL_DCGC1_I2S0 0x10000000 ///< I2S0 Clock Gating +#define SYSCTL_DCGC1_COMP2 0x04000000 ///< Analog Comparator 2 Clock Gating +#define SYSCTL_DCGC1_COMP1 0x02000000 ///< Analog Comparator 1 Clock Gating +#define SYSCTL_DCGC1_COMP0 0x01000000 ///< Analog Comparator 0 Clock Gating +#define SYSCTL_DCGC1_TIMER3 0x00080000 ///< Timer 3 Clock Gating Control +#define SYSCTL_DCGC1_TIMER2 0x00040000 ///< Timer 2 Clock Gating Control +#define SYSCTL_DCGC1_TIMER1 0x00020000 ///< Timer 1 Clock Gating Control +#define SYSCTL_DCGC1_TIMER0 0x00010000 ///< Timer 0 Clock Gating Control +#define SYSCTL_DCGC1_I2C1 0x00004000 ///< I2C1 Clock Gating Control +#define SYSCTL_DCGC1_I2C0 0x00001000 ///< I2C0 Clock Gating Control +#define SYSCTL_DCGC1_QEI1 0x00000200 ///< QEI1 Clock Gating Control +#define SYSCTL_DCGC1_QEI0 0x00000100 ///< QEI0 Clock Gating Control +#define SYSCTL_DCGC1_SSI1 0x00000020 ///< SSI1 Clock Gating Control +#define SYSCTL_DCGC1_SSI0 0x00000010 ///< SSI0 Clock Gating Control +#define SYSCTL_DCGC1_UART2 0x00000004 ///< UART2 Clock Gating Control +#define SYSCTL_DCGC1_UART1 0x00000002 ///< UART1 Clock Gating Control +#define SYSCTL_DCGC1_UART0 0x00000001 ///< UART0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DCGC2 register. + */ +/*\{*/ +#define SYSCTL_DCGC2_EPHY0 0x40000000 ///< PHY0 Clock Gating Control +#define SYSCTL_DCGC2_EMAC0 0x10000000 ///< MAC0 Clock Gating Control +#define SYSCTL_DCGC2_USB0 0x00010000 ///< USB0 Clock Gating Control +#define SYSCTL_DCGC2_UDMA 0x00002000 ///< Micro-DMA Clock Gating Control +#define SYSCTL_DCGC2_GPIOJ 0x00000100 ///< Port J Clock Gating Control +#define SYSCTL_DCGC2_GPIOH 0x00000080 ///< Port H Clock Gating Control +#define SYSCTL_DCGC2_GPIOG 0x00000040 ///< Port G Clock Gating Control +#define SYSCTL_DCGC2_GPIOF 0x00000020 ///< Port F Clock Gating Control +#define SYSCTL_DCGC2_GPIOE 0x00000010 ///< Port E Clock Gating Control +#define SYSCTL_DCGC2_GPIOD 0x00000008 ///< Port D Clock Gating Control +#define SYSCTL_DCGC2_GPIOC 0x00000004 ///< Port C Clock Gating Control +#define SYSCTL_DCGC2_GPIOB 0x00000002 ///< Port B Clock Gating Control +#define SYSCTL_DCGC2_GPIOA 0x00000001 ///< Port A Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DSLPCLKCFG + * register. + */ +/*\{*/ +#define SYSCTL_DSLPCLKCFG_D_M 0x1F800000 ///< Divider Field Override +#define SYSCTL_DSLPCLKCFG_D_1 0x00000000 ///< System clock /1 +#define SYSCTL_DSLPCLKCFG_D_2 0x00800000 ///< System clock /2 +#define SYSCTL_DSLPCLKCFG_D_3 0x01000000 ///< System clock /3 +#define SYSCTL_DSLPCLKCFG_D_4 0x01800000 ///< System clock /4 +#define SYSCTL_DSLPCLKCFG_D_5 0x02000000 ///< System clock /5 +#define SYSCTL_DSLPCLKCFG_D_6 0x02800000 ///< System clock /6 +#define SYSCTL_DSLPCLKCFG_D_7 0x03000000 ///< System clock /7 +#define SYSCTL_DSLPCLKCFG_D_8 0x03800000 ///< System clock /8 +#define SYSCTL_DSLPCLKCFG_D_9 0x04000000 ///< System clock /9 +#define SYSCTL_DSLPCLKCFG_D_10 0x04800000 ///< System clock /10 +#define SYSCTL_DSLPCLKCFG_D_11 0x05000000 ///< System clock /11 +#define SYSCTL_DSLPCLKCFG_D_12 0x05800000 ///< System clock /12 +#define SYSCTL_DSLPCLKCFG_D_13 0x06000000 ///< System clock /13 +#define SYSCTL_DSLPCLKCFG_D_14 0x06800000 ///< System clock /14 +#define SYSCTL_DSLPCLKCFG_D_15 0x07000000 ///< System clock /15 +#define SYSCTL_DSLPCLKCFG_D_16 0x07800000 ///< System clock /16 +#define SYSCTL_DSLPCLKCFG_D_17 0x08000000 ///< System clock /17 +#define SYSCTL_DSLPCLKCFG_D_18 0x08800000 ///< System clock /18 +#define SYSCTL_DSLPCLKCFG_D_19 0x09000000 ///< System clock /19 +#define SYSCTL_DSLPCLKCFG_D_20 0x09800000 ///< System clock /20 +#define SYSCTL_DSLPCLKCFG_D_21 0x0A000000 ///< System clock /21 +#define SYSCTL_DSLPCLKCFG_D_22 0x0A800000 ///< System clock /22 +#define SYSCTL_DSLPCLKCFG_D_23 0x0B000000 ///< System clock /23 +#define SYSCTL_DSLPCLKCFG_D_24 0x0B800000 ///< System clock /24 +#define SYSCTL_DSLPCLKCFG_D_25 0x0C000000 ///< System clock /25 +#define SYSCTL_DSLPCLKCFG_D_26 0x0C800000 ///< System clock /26 +#define SYSCTL_DSLPCLKCFG_D_27 0x0D000000 ///< System clock /27 +#define SYSCTL_DSLPCLKCFG_D_28 0x0D800000 ///< System clock /28 +#define SYSCTL_DSLPCLKCFG_D_29 0x0E000000 ///< System clock /29 +#define SYSCTL_DSLPCLKCFG_D_30 0x0E800000 ///< System clock /30 +#define SYSCTL_DSLPCLKCFG_D_31 0x0F000000 ///< System clock /31 +#define SYSCTL_DSLPCLKCFG_D_32 0x0F800000 ///< System clock /32 +#define SYSCTL_DSLPCLKCFG_D_33 0x10000000 ///< System clock /33 +#define SYSCTL_DSLPCLKCFG_D_34 0x10800000 ///< System clock /34 +#define SYSCTL_DSLPCLKCFG_D_35 0x11000000 ///< System clock /35 +#define SYSCTL_DSLPCLKCFG_D_36 0x11800000 ///< System clock /36 +#define SYSCTL_DSLPCLKCFG_D_37 0x12000000 ///< System clock /37 +#define SYSCTL_DSLPCLKCFG_D_38 0x12800000 ///< System clock /38 +#define SYSCTL_DSLPCLKCFG_D_39 0x13000000 ///< System clock /39 +#define SYSCTL_DSLPCLKCFG_D_40 0x13800000 ///< System clock /40 +#define SYSCTL_DSLPCLKCFG_D_41 0x14000000 ///< System clock /41 +#define SYSCTL_DSLPCLKCFG_D_42 0x14800000 ///< System clock /42 +#define SYSCTL_DSLPCLKCFG_D_43 0x15000000 ///< System clock /43 +#define SYSCTL_DSLPCLKCFG_D_44 0x15800000 ///< System clock /44 +#define SYSCTL_DSLPCLKCFG_D_45 0x16000000 ///< System clock /45 +#define SYSCTL_DSLPCLKCFG_D_46 0x16800000 ///< System clock /46 +#define SYSCTL_DSLPCLKCFG_D_47 0x17000000 ///< System clock /47 +#define SYSCTL_DSLPCLKCFG_D_48 0x17800000 ///< System clock /48 +#define SYSCTL_DSLPCLKCFG_D_49 0x18000000 ///< System clock /49 +#define SYSCTL_DSLPCLKCFG_D_50 0x18800000 ///< System clock /50 +#define SYSCTL_DSLPCLKCFG_D_51 0x19000000 ///< System clock /51 +#define SYSCTL_DSLPCLKCFG_D_52 0x19800000 ///< System clock /52 +#define SYSCTL_DSLPCLKCFG_D_53 0x1A000000 ///< System clock /53 +#define SYSCTL_DSLPCLKCFG_D_54 0x1A800000 ///< System clock /54 +#define SYSCTL_DSLPCLKCFG_D_55 0x1B000000 ///< System clock /55 +#define SYSCTL_DSLPCLKCFG_D_56 0x1B800000 ///< System clock /56 +#define SYSCTL_DSLPCLKCFG_D_57 0x1C000000 ///< System clock /57 +#define SYSCTL_DSLPCLKCFG_D_58 0x1C800000 ///< System clock /58 +#define SYSCTL_DSLPCLKCFG_D_59 0x1D000000 ///< System clock /59 +#define SYSCTL_DSLPCLKCFG_D_60 0x1D800000 ///< System clock /60 +#define SYSCTL_DSLPCLKCFG_D_61 0x1E000000 ///< System clock /61 +#define SYSCTL_DSLPCLKCFG_D_62 0x1E800000 ///< System clock /62 +#define SYSCTL_DSLPCLKCFG_D_63 0x1F000000 ///< System clock /63 +#define SYSCTL_DSLPCLKCFG_D_64 0x1F800000 ///< System clock /64 +#define SYSCTL_DSLPCLKCFG_O_M 0x00000070 ///< Clock Source +#define SYSCTL_DSLPCLKCFG_O_IGN 0x00000000 ///< MOSC +#define SYSCTL_DSLPCLKCFG_O_IO 0x00000010 ///< PIOSC +#define SYSCTL_DSLPCLKCFG_O_30 0x00000030 ///< 30 kHz +#define SYSCTL_DSLPCLKCFG_O_32 0x00000070 ///< 32.768 kHz +#define SYSCTL_DSLPCLKCFG_IOSC 0x00000001 ///< IOSC Clock Source +#define SYSCTL_DSLPCLKCFG_D_S 23 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_CLKVCLR register. + */ +/*\{*/ +#define SYSCTL_CLKVCLR_VERCLR 0x00000001 ///< Clock Verification Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PIOSCCAL + * register. + */ +/*\{*/ +#define SYSCTL_PIOSCCAL_UTEN 0x80000000 ///< Use User Trim Value +#define SYSCTL_PIOSCCAL_CAL 0x00000200 ///< Start Calibration +#define SYSCTL_PIOSCCAL_UPDATE 0x00000100 ///< Update Trim +#define SYSCTL_PIOSCCAL_UT_M 0x0000007F ///< User Trim Value +#define SYSCTL_PIOSCCAL_UT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PIOSCSTAT + * register. + */ +/*\{*/ +#define SYSCTL_PIOSCSTAT_DT_M 0x007F0000 ///< Default Trim Value +#define SYSCTL_PIOSCSTAT_CR_M 0x00000300 ///< Calibration Result +#define SYSCTL_PIOSCSTAT_CRNONE 0x00000000 ///< Calibration has not been + ///< attempted +#define SYSCTL_PIOSCSTAT_CRPASS 0x00000100 ///< The last calibration operation + ///< completed to meet 1% accuracy +#define SYSCTL_PIOSCSTAT_CRFAIL 0x00000200 ///< The last calibration operation + ///< failed to meet 1% accuracy +#define SYSCTL_PIOSCSTAT_CT_M 0x0000007F ///< Calibration Trim Value +#define SYSCTL_PIOSCSTAT_DT_S 16 +#define SYSCTL_PIOSCSTAT_CT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_LDOARST register. + */ +/*\{*/ +#define SYSCTL_LDOARST_LDOARST 0x00000001 ///< LDO Reset +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG + * register. + */ +/*\{*/ +#define SYSCTL_I2SMCLKCFG_RXEN 0x80000000 ///< RX Clock Enable +#define SYSCTL_I2SMCLKCFG_RXI_M 0x3FF00000 ///< RX Clock Integer Input +#define SYSCTL_I2SMCLKCFG_RXF_M 0x000F0000 ///< RX Clock Fractional Input +#define SYSCTL_I2SMCLKCFG_TXEN 0x00008000 ///< TX Clock Enable +#define SYSCTL_I2SMCLKCFG_TXI_M 0x00003FF0 ///< TX Clock Integer Input +#define SYSCTL_I2SMCLKCFG_TXF_M 0x0000000F ///< TX Clock Fractional Input +#define SYSCTL_I2SMCLKCFG_RXI_S 20 +#define SYSCTL_I2SMCLKCFG_RXF_S 16 +#define SYSCTL_I2SMCLKCFG_TXI_S 4 +#define SYSCTL_I2SMCLKCFG_TXF_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC9 register. + */ +/*\{*/ +#define SYSCTL_DC9_ADC1DC7 0x00800000 ///< ADC1 DC7 Present +#define SYSCTL_DC9_ADC1DC6 0x00400000 ///< ADC1 DC6 Present +#define SYSCTL_DC9_ADC1DC5 0x00200000 ///< ADC1 DC5 Present +#define SYSCTL_DC9_ADC1DC4 0x00100000 ///< ADC1 DC4 Present +#define SYSCTL_DC9_ADC1DC3 0x00080000 ///< ADC1 DC3 Present +#define SYSCTL_DC9_ADC1DC2 0x00040000 ///< ADC1 DC2 Present +#define SYSCTL_DC9_ADC1DC1 0x00020000 ///< ADC1 DC1 Present +#define SYSCTL_DC9_ADC1DC0 0x00010000 ///< ADC1 DC0 Present +#define SYSCTL_DC9_ADC0DC7 0x00000080 ///< ADC0 DC7 Present +#define SYSCTL_DC9_ADC0DC6 0x00000040 ///< ADC0 DC6 Present +#define SYSCTL_DC9_ADC0DC5 0x00000020 ///< ADC0 DC5 Present +#define SYSCTL_DC9_ADC0DC4 0x00000010 ///< ADC0 DC4 Present +#define SYSCTL_DC9_ADC0DC3 0x00000008 ///< ADC0 DC3 Present +#define SYSCTL_DC9_ADC0DC2 0x00000004 ///< ADC0 DC2 Present +#define SYSCTL_DC9_ADC0DC1 0x00000002 ///< ADC0 DC1 Present +#define SYSCTL_DC9_ADC0DC0 0x00000001 ///< ADC0 DC0 Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_NVMSTAT register. + */ +/*\{*/ +#define SYSCTL_NVMSTAT_TPSW 0x00000010 ///< Third Party Software Present +#define SYSCTL_NVMSTAT_FWB 0x00000001 ///< 32 Word Flash Write Buffer + ///< Active +/*\}*/ + +/** + * The following are deprecated defines for the System Control register + * addresses. + */ +/*\{*/ +#define SYSCTL_USER0 0x400FE1E0 ///< NV User Register 0 +#define SYSCTL_USER1 0x400FE1E4 ///< NV User Register 1 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DID0 + * register. + */ +/*\{*/ +#define SYSCTL_DID0_VER_MASK 0x70000000 ///< DID0 version mask +#define SYSCTL_DID0_CLASS_MASK 0x00FF0000 ///< Device Class +#define SYSCTL_DID0_MAJ_MASK 0x0000FF00 ///< Major revision mask +#define SYSCTL_DID0_MAJ_A 0x00000000 ///< Major revision A +#define SYSCTL_DID0_MAJ_B 0x00000100 ///< Major revision B +#define SYSCTL_DID0_MAJ_C 0x00000200 ///< Major revision C +#define SYSCTL_DID0_MIN_MASK 0x000000FF ///< Minor revision mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DID1 + * register. + */ +/*\{*/ +#define SYSCTL_DID1_VER_MASK 0xF0000000 ///< Register version mask +#define SYSCTL_DID1_FAM_MASK 0x0F000000 ///< Family mask +#define SYSCTL_DID1_FAM_S 0x00000000 ///< Stellaris family +#define SYSCTL_DID1_PRTNO_MASK 0x00FF0000 ///< Part number mask +#define SYSCTL_DID1_PINCNT_MASK 0x0000E000 ///< Pin count +#define SYSCTL_DID1_TEMP_MASK 0x000000E0 ///< Temperature range mask +#define SYSCTL_DID1_PKG_MASK 0x00000018 ///< Package mask +#define SYSCTL_DID1_PKG_48QFP 0x00000008 ///< QFP package +#define SYSCTL_DID1_QUAL_MASK 0x00000003 ///< Qualification status mask +#define SYSCTL_DID1_PKG_28SOIC 0x00000000 ///< SOIC package +#define SYSCTL_DID1_PRTNO_SHIFT 16 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC0 + * register. + */ +/*\{*/ +#define SYSCTL_DC0_SRAMSZ_MASK 0xFFFF0000 ///< SRAM size mask +#define SYSCTL_DC0_FLASHSZ_MASK 0x0000FFFF ///< Flash size mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC1 + * register. + */ +/*\{*/ +#define SYSCTL_DC1_ADC 0x00010000 ///< ADC Module Present +#define SYSCTL_DC1_SYSDIV_MASK 0x0000F000 ///< Minimum system divider mask +#define SYSCTL_DC1_ADCSPD_MASK 0x00000F00 ///< ADC speed mask +#define SYSCTL_DC1_WDOG 0x00000008 ///< Watchdog present +#define SYSCTL_DC1_WDT 0x00000008 ///< Watchdog Timer Present +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC2 + * register. + */ +/*\{*/ +#define SYSCTL_DC2_I2C 0x00001000 ///< I2C present +#define SYSCTL_DC2_QEI 0x00000100 ///< QEI present +#define SYSCTL_DC2_SSI 0x00000010 ///< SSI present +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC3 + * register. + */ +/*\{*/ +#define SYSCTL_DC3_ADC7 0x00800000 ///< ADC7 Pin Present +#define SYSCTL_DC3_ADC6 0x00400000 ///< ADC6 Pin Present +#define SYSCTL_DC3_ADC5 0x00200000 ///< ADC5 Pin Present +#define SYSCTL_DC3_ADC4 0x00100000 ///< ADC4 Pin Present +#define SYSCTL_DC3_ADC3 0x00080000 ///< ADC3 Pin Present +#define SYSCTL_DC3_ADC2 0x00040000 ///< ADC2 Pin Present +#define SYSCTL_DC3_ADC1 0x00020000 ///< ADC1 Pin Present +#define SYSCTL_DC3_ADC0 0x00010000 ///< ADC0 Pin Present +#define SYSCTL_DC3_MC_FAULT0 0x00008000 ///< MC0 fault pin present +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_PBORCTL register. + */ +/*\{*/ +#define SYSCTL_PBORCTL_BOR_MASK 0x0000FFFC ///< BOR wait timer +#define SYSCTL_PBORCTL_BOR_SH 2 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_LDOPCTL register. + */ +/*\{*/ +#define SYSCTL_LDOPCTL_MASK 0x0000003F ///< Voltage adjust mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR0 + * register. + */ +/*\{*/ +#define SYSCTL_SRCR0_ADC 0x00010000 ///< ADC0 Reset Control +#define SYSCTL_SRCR0_WDT 0x00000008 ///< WDT Reset Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RESC + * register. + */ +/*\{*/ +#define SYSCTL_RESC_WDOG 0x00000008 ///< Watchdog reset +#define SYSCTL_RESC_WDT 0x00000008 ///< Watchdog Timer Reset +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RCC + * register. + */ +/*\{*/ +#define SYSCTL_RCC_SYSDIV_MASK 0x07800000 ///< System clock divider +#define SYSCTL_RCC_USE_SYSDIV 0x00400000 ///< Use sytem clock divider +#define SYSCTL_RCC_USE_PWMDIV 0x00100000 ///< Use PWM clock divider +#define SYSCTL_RCC_PWMDIV_MASK 0x000E0000 ///< PWM clock divider +#define SYSCTL_RCC_OE 0x00001000 ///< PLL output enable +#define SYSCTL_RCC_XTAL_3_68MHz 0x00000140 ///< Using a 3.6864 MHz crystal +#define SYSCTL_RCC_XTAL_4MHz 0x00000180 ///< Using a 4 MHz crystal +#define SYSCTL_RCC_XTAL_MASK 0x000003C0 ///< Crystal attached to main osc +#define SYSCTL_RCC_OSCSRC_MASK 0x00000030 ///< Oscillator input select +#define SYSCTL_RCC_SYSDIV_SHIFT 23 ///< Shift to the SYSDIV field +#define SYSCTL_RCC_PWMDIV_SHIFT 17 ///< Shift to the PWMDIV field +#define SYSCTL_RCC_XTAL_SHIFT 6 ///< Shift to the XTAL field +#define SYSCTL_RCC_OSCSRC_SHIFT 4 ///< Shift to the OSCSRC field +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG + * register. + */ +/*\{*/ +#define SYSCTL_PLLCFG_OD_MASK 0x0000C000 ///< Output divider +#define SYSCTL_PLLCFG_F_MASK 0x00003FE0 ///< PLL multiplier +#define SYSCTL_PLLCFG_R_MASK 0x0000001F ///< Input predivider +#define SYSCTL_PLLCFG_F_SHIFT 5 +#define SYSCTL_PLLCFG_R_SHIFT 0 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RCC2 + * register. + */ +/*\{*/ +#define SYSCTL_RCC2_USEFRACT 0x40000000 ///< Use fractional divider +#define SYSCTL_RCC2_SYSDIV2_MSK 0x1F800000 ///< System clock divider +#define SYSCTL_RCC2_FRACT 0x00400000 ///< Fractional divide +#define SYSCTL_RCC2_OSCSRC2_MSK 0x00000070 ///< Oscillator input select +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RCGC0 + * register. + */ +/*\{*/ +#define SYSCTL_RCGC0_ADC 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_RCGC0_WDT 0x00000008 ///< WDT Clock Gating Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SCGC0 + * register. + */ +/*\{*/ +#define SYSCTL_SCGC0_ADC 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_SCGC0_WDT 0x00000008 ///< WDT Clock Gating Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DCGC0 + * register. + */ +/*\{*/ +#define SYSCTL_DCGC0_ADC 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_DCGC0_WDT 0x00000008 ///< WDT Clock Gating Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_DSLPCLKCFG register. + */ +/*\{*/ +#define SYSCTL_DSLPCLKCFG_D_MSK 0x1F800000 ///< Deep sleep system clock override +#define SYSCTL_DSLPCLKCFG_O_MSK 0x00000070 ///< Deep sleep oscillator override +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_CLKVCLR register. + */ +/*\{*/ +#define SYSCTL_CLKVCLR_CLR 0x00000001 ///< Clear clock verification fault +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_LDOARST register. + */ +/*\{*/ +#define SYSCTL_LDOARST_ARST 0x00000001 ///< Allow LDO to reset device +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR0, + * SYSCTL_RCGC0, SYSCTL_SCGC0, and SYSCTL_DCGC0 registers. + */ +/*\{*/ +#define SYSCTL_SET0_CAN2 0x04000000 ///< CAN 2 module +#define SYSCTL_SET0_CAN1 0x02000000 ///< CAN 1 module +#define SYSCTL_SET0_CAN0 0x01000000 ///< CAN 0 module +#define SYSCTL_SET0_PWM 0x00100000 ///< PWM module +#define SYSCTL_SET0_ADC 0x00010000 ///< ADC module +#define SYSCTL_SET0_ADCSPD_MASK 0x00000F00 ///< ADC speed mask +#define SYSCTL_SET0_ADCSPD_125K 0x00000000 ///< 125Ksps ADC +#define SYSCTL_SET0_ADCSPD_250K 0x00000100 ///< 250Ksps ADC +#define SYSCTL_SET0_ADCSPD_500K 0x00000200 ///< 500Ksps ADC +#define SYSCTL_SET0_ADCSPD_1M 0x00000300 ///< 1Msps ADC +#define SYSCTL_SET0_HIB 0x00000040 ///< Hibernation module +#define SYSCTL_SET0_WDOG 0x00000008 ///< Watchdog module +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR1, + * SYSCTL_RCGC1, SYSCTL_SCGC1, and SYSCTL_DCGC1 registers. + */ +/*\{*/ +#define SYSCTL_SET1_COMP2 0x04000000 ///< Analog comparator module 2 +#define SYSCTL_SET1_COMP1 0x02000000 ///< Analog comparator module 1 +#define SYSCTL_SET1_COMP0 0x01000000 ///< Analog comparator module 0 +#define SYSCTL_SET1_TIMER3 0x00080000 ///< Timer module 3 +#define SYSCTL_SET1_TIMER2 0x00040000 ///< Timer module 2 +#define SYSCTL_SET1_TIMER1 0x00020000 ///< Timer module 1 +#define SYSCTL_SET1_TIMER0 0x00010000 ///< Timer module 0 +#define SYSCTL_SET1_I2C1 0x00002000 ///< I2C module 1 +#define SYSCTL_SET1_I2C0 0x00001000 ///< I2C module 0 +#define SYSCTL_SET1_I2C 0x00001000 ///< I2C module +#define SYSCTL_SET1_QEI1 0x00000200 ///< QEI module 1 +#define SYSCTL_SET1_QEI 0x00000100 ///< QEI module +#define SYSCTL_SET1_QEI0 0x00000100 ///< QEI module 0 +#define SYSCTL_SET1_SSI1 0x00000020 ///< SSI module 1 +#define SYSCTL_SET1_SSI0 0x00000010 ///< SSI module 0 +#define SYSCTL_SET1_SSI 0x00000010 ///< SSI module +#define SYSCTL_SET1_UART2 0x00000004 ///< UART module 2 +#define SYSCTL_SET1_UART1 0x00000002 ///< UART module 1 +#define SYSCTL_SET1_UART0 0x00000001 ///< UART module 0 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR2, + * SYSCTL_RCGC2, SYSCTL_SCGC2, and SYSCTL_DCGC2 registers. + */ +/*\{*/ +#define SYSCTL_SET2_ETH 0x50000000 ///< ETH module +#define SYSCTL_SET2_GPIOH 0x00000080 ///< GPIO H module +#define SYSCTL_SET2_GPIOG 0x00000040 ///< GPIO G module +#define SYSCTL_SET2_GPIOF 0x00000020 ///< GPIO F module +#define SYSCTL_SET2_GPIOE 0x00000010 ///< GPIO E module +#define SYSCTL_SET2_GPIOD 0x00000008 ///< GPIO D module +#define SYSCTL_SET2_GPIOC 0x00000004 ///< GPIO C module +#define SYSCTL_SET2_GPIOB 0x00000002 ///< GPIO B module +#define SYSCTL_SET2_GPIOA 0x00000001 ///< GIPO A module +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RIS, + * SYSCTL_IMC, and SYSCTL_IMS registers. + */ +/*\{*/ +#define SYSCTL_INT_PLL_LOCK 0x00000040 ///< PLL lock interrupt +#define SYSCTL_INT_CUR_LIMIT 0x00000020 ///< Current limit interrupt +#define SYSCTL_INT_IOSC_FAIL 0x00000010 ///< Internal oscillator failure int +#define SYSCTL_INT_MOSC_FAIL 0x00000008 ///< Main oscillator failure int +#define SYSCTL_INT_POR 0x00000004 ///< Power on reset interrupt +#define SYSCTL_INT_BOR 0x00000002 ///< Brown out interrupt +#define SYSCTL_INT_PLL_FAIL 0x00000001 ///< PLL failure interrupt +/*\}*/ + +#endif /* LM3S_SYSCTL_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_types.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_types.h new file mode 100644 index 00000000..b88347b4 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_types.h @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief LM3S generic hardware macros. + */ + +#ifndef LM3S_TYPES_H +#define LM3S_TYPES_H + +#include +#include + +/** + * Helper Macros for determining the particular hardware revision. + */ +/*\{*/ +#ifndef CLASS_IS_SANDSTORM +#define CLASS_IS_SANDSTORM \ + (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_M) == SYSCTL_DID0_VER_0) || \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_SANDSTORM))) +#endif + +#ifndef CLASS_IS_FURY +#define CLASS_IS_FURY \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FURY)) +#endif + +#ifndef CLASS_IS_DUSTDEVIL +#define CLASS_IS_DUSTDEVIL \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_DUSTDEVIL)) +#endif + +#ifndef CLASS_IS_TEMPEST +#define CLASS_IS_TEMPEST \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_TEMPEST)) +#endif + +#ifndef REVISION_IS_A0 +#define REVISION_IS_A0 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_A1 +#define REVISION_IS_A1 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_A2 +#define REVISION_IS_A2 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_2)) +#endif + +#ifndef REVISION_IS_B0 +#define REVISION_IS_B0 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_B1 +#define REVISION_IS_B1 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_1)) +#endif + +#ifndef REVISION_IS_C0 +#define REVISION_IS_C0 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_C1 +#define REVISION_IS_C1 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_1)) +#endif + +#ifndef REVISION_IS_C2 +#define REVISION_IS_C2 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_2)) +#endif +/*\}*/ + +#endif /* LM3S_TYPES_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/lm3s_uart.h b/2.5/bertos/cpu/cortex-m3/io/lm3s_uart.h new file mode 100644 index 00000000..6c6acd35 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/lm3s_uart.h @@ -0,0 +1,469 @@ +/** + * \file + * + * + * \brief LM3S1968 UART hardware. + */ + +#ifndef LM3S_UART_H +#define LM3S_UART_H + +/** + * The following are defines for the UART register offsets. + */ +/*\{*/ +#define UART_O_DR 0x00000000 //< UART Data +#define UART_O_RSR 0x00000004 //< UART Receive Status/Error Clear +#define UART_O_ECR 0x00000004 //< UART Receive Status/Error Clear +#define UART_O_FR 0x00000018 //< UART Flag +#define UART_O_ILPR 0x00000020 //< UART IrDA Low-Power Register +#define UART_O_IBRD 0x00000024 //< UART Integer Baud-Rate Divisor +#define UART_O_FBRD 0x00000028 //< UART Fractional Baud-Rate + //< Divisor +#define UART_O_LCRH 0x0000002C //< UART Line Control +#define UART_O_CTL 0x00000030 //< UART Control +#define UART_O_IFLS 0x00000034 //< UART Interrupt FIFO Level Select +#define UART_O_IM 0x00000038 //< UART Interrupt Mask +#define UART_O_RIS 0x0000003C //< UART Raw Interrupt Status +#define UART_O_MIS 0x00000040 //< UART Masked Interrupt Status +#define UART_O_ICR 0x00000044 //< UART Interrupt Clear +#define UART_O_DMACTL 0x00000048 //< UART DMA Control +#define UART_O_LCTL 0x00000090 //< UART LIN Control +#define UART_O_LSS 0x00000094 //< UART LIN Snap Shot +#define UART_O_LTIM 0x00000098 //< UART LIN Timer +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_DR register. + */ +/*\{*/ +#define UART_DR_OE 0x00000800 //< UART Overrun Error +#define UART_DR_BE 0x00000400 //< UART Break Error +#define UART_DR_PE 0x00000200 //< UART Parity Error +#define UART_DR_FE 0x00000100 //< UART Framing Error +#define UART_DR_DATA_M 0x000000FF //< Data Transmitted or Received +#define UART_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RSR register. + */ +/*\{*/ +#define UART_RSR_OE 0x00000008 //< UART Overrun Error +#define UART_RSR_BE 0x00000004 //< UART Break Error +#define UART_RSR_PE 0x00000002 //< UART Parity Error +#define UART_RSR_FE 0x00000001 //< UART Framing Error +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ECR register. + */ +/*\{*/ +#define UART_ECR_DATA_M 0x000000FF //< Error Clear +#define UART_ECR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FR register. + */ +/*\{*/ +#define UART_FR_RI 0x00000100 //< Ring Indicator +#define UART_FR_TXFE 0x00000080 //< UART Transmit FIFO Empty +#define UART_FR_RXFF 0x00000040 //< UART Receive FIFO Full +#define UART_FR_TXFF 0x00000020 //< UART Transmit FIFO Full +#define UART_FR_RXFE 0x00000010 //< UART Receive FIFO Empty +#define UART_FR_BUSY 0x00000008 //< UART Busy +#define UART_FR_DCD 0x00000004 //< Data Carrier Detect +#define UART_FR_DSR 0x00000002 //< Data Set Ready +#define UART_FR_CTS 0x00000001 //< Clear To Send +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ILPR register. + */ +/*\{*/ +#define UART_ILPR_ILPDVSR_M 0x000000FF //< IrDA Low-Power Divisor +#define UART_ILPR_ILPDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IBRD register. + */ +/*\{*/ +#define UART_IBRD_DIVINT_M 0x0000FFFF //< Integer Baud-Rate Divisor +#define UART_IBRD_DIVINT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FBRD register. + */ +/*\{*/ +#define UART_FBRD_DIVFRAC_M 0x0000003F //< Fractional Baud-Rate Divisor +#define UART_FBRD_DIVFRAC_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LCRH register. + */ +/*\{*/ +#define UART_LCRH_SPS 0x00000080 //< UART Stick Parity Select +#define UART_LCRH_WLEN_M 0x00000060 //< UART Word Length +#define UART_LCRH_WLEN_5 0x00000000 //< 5 bits (default) +#define UART_LCRH_WLEN_6 0x00000020 //< 6 bits +#define UART_LCRH_WLEN_7 0x00000040 //< 7 bits +#define UART_LCRH_WLEN_8 0x00000060 //< 8 bits +#define UART_LCRH_FEN 0x00000010 //< UART Enable FIFOs +#define UART_LCRH_STP2 0x00000008 //< UART Two Stop Bits Select +#define UART_LCRH_EPS 0x00000004 //< UART Even Parity Select +#define UART_LCRH_PEN 0x00000002 //< UART Parity Enable +#define UART_LCRH_BRK 0x00000001 //< UART Send Break +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_CTL register. + */ +/*\{*/ +#define UART_CTL_CTSEN 0x00008000 //< Enable Clear To Send +#define UART_CTL_RTSEN 0x00004000 //< Enable Request to Send +#define UART_CTL_RTS 0x00000800 //< Request to Send +#define UART_CTL_DTR 0x00000400 //< Data Terminal Ready +#define UART_CTL_RXE 0x00000200 //< UART Receive Enable +#define UART_CTL_TXE 0x00000100 //< UART Transmit Enable +#define UART_CTL_LBE 0x00000080 //< UART Loop Back Enable +#define UART_CTL_LIN 0x00000040 //< LIN Mode Enable +#define UART_CTL_HSE 0x00000020 //< High-Speed Enable +#define UART_CTL_EOT 0x00000010 //< End of Transmission +#define UART_CTL_SMART 0x00000008 //< ISO 7816 Smart Card Support +#define UART_CTL_SIRLP 0x00000004 //< UART SIR Low-Power Mode +#define UART_CTL_SIREN 0x00000002 //< UART SIR Enable +#define UART_CTL_UARTEN 0x00000001 //< UART Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IFLS register. + */ +/*\{*/ +#define UART_IFLS_RX_M 0x00000038 //< UART Receive Interrupt FIFO + //< Level Select +#define UART_IFLS_RX1_8 0x00000000 //< RX FIFO >= 1/8 full +#define UART_IFLS_RX2_8 0x00000008 //< RX FIFO >= 1/4 full +#define UART_IFLS_RX4_8 0x00000010 //< RX FIFO >= 1/2 full (default) +#define UART_IFLS_RX6_8 0x00000018 //< RX FIFO >= 3/4 full +#define UART_IFLS_RX7_8 0x00000020 //< RX FIFO >= 7/8 full +#define UART_IFLS_TX_M 0x00000007 //< UART Transmit Interrupt FIFO + //< Level Select +#define UART_IFLS_TX1_8 0x00000000 //< TX FIFO <= 1/8 full +#define UART_IFLS_TX2_8 0x00000001 //< TX FIFO <= 1/4 full +#define UART_IFLS_TX4_8 0x00000002 //< TX FIFO <= 1/2 full (default) +#define UART_IFLS_TX6_8 0x00000003 //< TX FIFO <= 3/4 full +#define UART_IFLS_TX7_8 0x00000004 //< TX FIFO <= 7/8 full +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IM register. + */ +/*\{*/ +#define UART_IM_LME5IM 0x00008000 //< LIN Mode Edge 5 Interrupt Mask +#define UART_IM_LME1IM 0x00004000 //< LIN Mode Edge 1 Interrupt Mask +#define UART_IM_LMSBIM 0x00002000 //< LIN Mode Sync Break Interrupt + //< Mask +#define UART_IM_OEIM 0x00000400 //< UART Overrun Error Interrupt + //< Mask +#define UART_IM_BEIM 0x00000200 //< UART Break Error Interrupt Mask +#define UART_IM_PEIM 0x00000100 //< UART Parity Error Interrupt Mask +#define UART_IM_FEIM 0x00000080 //< UART Framing Error Interrupt + //< Mask +#define UART_IM_RTIM 0x00000040 //< UART Receive Time-Out Interrupt + //< Mask +#define UART_IM_TXIM 0x00000020 //< UART Transmit Interrupt Mask +#define UART_IM_RXIM 0x00000010 //< UART Receive Interrupt Mask +#define UART_IM_DSRMIM 0x00000008 //< UART Data Set Ready Modem + //< Interrupt Mask +#define UART_IM_DCDMIM 0x00000004 //< UART Data Carrier Detect Modem + //< Interrupt Mask +#define UART_IM_CTSMIM 0x00000002 //< UART Clear to Send Modem + //< Interrupt Mask +#define UART_IM_RIMIM 0x00000001 //< UART Ring Indicator Modem + //< Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RIS register. + */ +/*\{*/ +#define UART_RIS_LME5RIS 0x00008000 //< LIN Mode Edge 5 Raw Interrupt + //< Status +#define UART_RIS_LME1RIS 0x00004000 //< LIN Mode Edge 1 Raw Interrupt + //< Status +#define UART_RIS_LMSBRIS 0x00002000 //< LIN Mode Sync Break Raw + //< Interrupt Status +#define UART_RIS_OERIS 0x00000400 //< UART Overrun Error Raw Interrupt + //< Status +#define UART_RIS_BERIS 0x00000200 //< UART Break Error Raw Interrupt + //< Status +#define UART_RIS_PERIS 0x00000100 //< UART Parity Error Raw Interrupt + //< Status +#define UART_RIS_FERIS 0x00000080 //< UART Framing Error Raw Interrupt + //< Status +#define UART_RIS_RTRIS 0x00000040 //< UART Receive Time-Out Raw + //< Interrupt Status +#define UART_RIS_TXRIS 0x00000020 //< UART Transmit Raw Interrupt + //< Status +#define UART_RIS_RXRIS 0x00000010 //< UART Receive Raw Interrupt + //< Status +#define UART_RIS_DSRRIS 0x00000008 //< UART Data Set Ready Modem Raw + //< Interrupt Status +#define UART_RIS_DCDRIS 0x00000004 //< UART Data Carrier Detect Modem + //< Raw Interrupt Status +#define UART_RIS_CTSRIS 0x00000002 //< UART Clear to Send Modem Raw + //< Interrupt Status +#define UART_RIS_RIRIS 0x00000001 //< UART Ring Indicator Modem Raw + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_MIS register. + */ +/*\{*/ +#define UART_MIS_LME5MIS 0x00008000 //< LIN Mode Edge 5 Masked Interrupt + //< Status +#define UART_MIS_LME1MIS 0x00004000 //< LIN Mode Edge 1 Masked Interrupt + //< Status +#define UART_MIS_LMSBMIS 0x00002000 //< LIN Mode Sync Break Masked + //< Interrupt Status +#define UART_MIS_OEMIS 0x00000400 //< UART Overrun Error Masked + //< Interrupt Status +#define UART_MIS_BEMIS 0x00000200 //< UART Break Error Masked + //< Interrupt Status +#define UART_MIS_PEMIS 0x00000100 //< UART Parity Error Masked + //< Interrupt Status +#define UART_MIS_FEMIS 0x00000080 //< UART Framing Error Masked + //< Interrupt Status +#define UART_MIS_RTMIS 0x00000040 //< UART Receive Time-Out Masked + //< Interrupt Status +#define UART_MIS_TXMIS 0x00000020 //< UART Transmit Masked Interrupt + //< Status +#define UART_MIS_RXMIS 0x00000010 //< UART Receive Masked Interrupt + //< Status +#define UART_MIS_DSRMIS 0x00000008 //< UART Data Set Ready Modem Masked + //< Interrupt Status +#define UART_MIS_DCDMIS 0x00000004 //< UART Data Carrier Detect Modem + //< Masked Interrupt Status +#define UART_MIS_CTSMIS 0x00000002 //< UART Clear to Send Modem Masked + //< Interrupt Status +#define UART_MIS_RIMIS 0x00000001 //< UART Ring Indicator Modem Masked + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ICR register. + */ +/*\{*/ +#define UART_ICR_LME5MIC 0x00008000 //< LIN Mode Edge 5 Interrupt Clear +#define UART_ICR_LME1MIC 0x00004000 //< LIN Mode Edge 1 Interrupt Clear +#define UART_ICR_LMSBMIC 0x00002000 //< LIN Mode Sync Break Interrupt + //< Clear +#define UART_ICR_OEIC 0x00000400 //< Overrun Error Interrupt Clear +#define UART_ICR_BEIC 0x00000200 //< Break Error Interrupt Clear +#define UART_ICR_PEIC 0x00000100 //< Parity Error Interrupt Clear +#define UART_ICR_FEIC 0x00000080 //< Framing Error Interrupt Clear +#define UART_ICR_RTIC 0x00000040 //< Receive Time-Out Interrupt Clear +#define UART_ICR_TXIC 0x00000020 //< Transmit Interrupt Clear +#define UART_ICR_RXIC 0x00000010 //< Receive Interrupt Clear +#define UART_ICR_DSRMIC 0x00000008 //< UART Data Set Ready Modem + //< Interrupt Clear +#define UART_ICR_DCDMIC 0x00000004 //< UART Data Carrier Detect Modem + //< Interrupt Clear +#define UART_ICR_CTSMIC 0x00000002 //< UART Clear to Send Modem + //< Interrupt Clear +#define UART_ICR_RIMIC 0x00000001 //< UART Ring Indicator Modem + //< Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_DMACTL register. + */ +/*\{*/ +#define UART_DMACTL_DMAERR 0x00000004 //< DMA on Error +#define UART_DMACTL_TXDMAE 0x00000002 //< Transmit DMA Enable +#define UART_DMACTL_RXDMAE 0x00000001 //< Receive DMA Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LCTL register. + */ +/*\{*/ +#define UART_LCTL_BLEN_M 0x00000030 //< Sync Break Length +#define UART_LCTL_BLEN_13T 0x00000000 //< Sync break length is 13T bits + //< (default) +#define UART_LCTL_BLEN_14T 0x00000010 //< Sync break length is 14T bits +#define UART_LCTL_BLEN_15T 0x00000020 //< Sync break length is 15T bits +#define UART_LCTL_BLEN_16T 0x00000030 //< Sync break length is 16T bits +#define UART_LCTL_MASTER 0x00000001 //< LIN Master Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LSS register. + */ +/*\{*/ +#define UART_LSS_TSS_M 0x0000FFFF //< Timer Snap Shot +#define UART_LSS_TSS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LTIM register. + */ +/*\{*/ +#define UART_LTIM_TIMER_M 0x0000FFFF //< Timer Value +#define UART_LTIM_TIMER_S 0 +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +/** + * The following are deprecated defines for the UART register offsets. + */ +/*\{*/ +#define UART_O_LCR_H 0x0000002C //< Line Control Register, HIGH byte +#define UART_O_PeriphID4 0x00000FD0 +#define UART_O_PeriphID5 0x00000FD4 +#define UART_O_PeriphID6 0x00000FD8 +#define UART_O_PeriphID7 0x00000FDC +#define UART_O_PeriphID0 0x00000FE0 +#define UART_O_PeriphID1 0x00000FE4 +#define UART_O_PeriphID2 0x00000FE8 +#define UART_O_PeriphID3 0x00000FEC +#define UART_O_PCellID0 0x00000FF0 +#define UART_O_PCellID1 0x00000FF4 +#define UART_O_PCellID2 0x00000FF8 +#define UART_O_PCellID3 0x00000FFC +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_DR + * register. + */ +/*\{*/ +#define UART_DR_DATA_MASK 0x000000FF //< UART data +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_IBRD + * register. + */ +/*\{*/ +#define UART_IBRD_DIVINT_MASK 0x0000FFFF //< Integer baud-rate divisor +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_FBRD + * register. + */ +/*\{*/ +#define UART_FBRD_DIVFRAC_MASK 0x0000003F //< Fractional baud-rate divisor +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_LCR_H + * register. + */ +/*\{*/ +#define UART_LCR_H_SPS 0x00000080 //< Stick Parity Select +#define UART_LCR_H_WLEN 0x00000060 //< Word length +#define UART_LCR_H_WLEN_5 0x00000000 //< 5 bit data +#define UART_LCR_H_WLEN_6 0x00000020 //< 6 bit data +#define UART_LCR_H_WLEN_7 0x00000040 //< 7 bit data +#define UART_LCR_H_WLEN_8 0x00000060 //< 8 bit data +#define UART_LCR_H_FEN 0x00000010 //< Enable FIFO +#define UART_LCR_H_STP2 0x00000008 //< Two Stop Bits Select +#define UART_LCR_H_EPS 0x00000004 //< Even Parity Select +#define UART_LCR_H_PEN 0x00000002 //< Parity Enable +#define UART_LCR_H_BRK 0x00000001 //< Send Break +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_IFLS + * register. + */ +/*\{*/ +#define UART_IFLS_RX_MASK 0x00000038 //< RX FIFO level mask +#define UART_IFLS_TX_MASK 0x00000007 //< TX FIFO level mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_ICR + * register. + */ +/*\{*/ +#define UART_RSR_ANY (UART_RSR_OE | UART_RSR_BE | UART_RSR_PE | \ + UART_RSR_FE) +/*\}*/ + +/** + * The following are deprecated defines for the Reset Values for UART + * Registers. + */ +/*\{*/ +#define UART_RV_CTL 0x00000300 +#define UART_RV_PCellID1 0x000000F0 +#define UART_RV_PCellID3 0x000000B1 +#define UART_RV_FR 0x00000090 +#define UART_RV_PeriphID2 0x00000018 +#define UART_RV_IFLS 0x00000012 +#define UART_RV_PeriphID0 0x00000011 +#define UART_RV_PCellID0 0x0000000D +#define UART_RV_PCellID2 0x00000005 +#define UART_RV_PeriphID3 0x00000001 +#define UART_RV_PeriphID4 0x00000000 +#define UART_RV_LCR_H 0x00000000 +#define UART_RV_PeriphID6 0x00000000 +#define UART_RV_DR 0x00000000 +#define UART_RV_RSR 0x00000000 +#define UART_RV_ECR 0x00000000 +#define UART_RV_PeriphID5 0x00000000 +#define UART_RV_RIS 0x00000000 +#define UART_RV_FBRD 0x00000000 +#define UART_RV_IM 0x00000000 +#define UART_RV_MIS 0x00000000 +#define UART_RV_ICR 0x00000000 +#define UART_RV_PeriphID1 0x00000000 +#define UART_RV_PeriphID7 0x00000000 +#define UART_RV_IBRD 0x00000000 +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S_UART_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/stm32.h b/2.5/bertos/cpu/cortex-m3/io/stm32.h new file mode 100644 index 00000000..5a9d4a82 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/stm32.h @@ -0,0 +1,1120 @@ +/** + * \file + * + * + * \brief STM32 registers definition. + */ + +#ifndef STM32_H +#define STM32_H + +#include +#include +#include + +/** + * The following are defines for the fault assignments. + */ +/*\{*/ +#define FAULT_NMI 2 ///< NMI fault +#define FAULT_HARD 3 ///< Hard fault +#define FAULT_MPU 4 ///< MPU fault +#define FAULT_BUS 5 ///< Bus fault +#define FAULT_USAGE 6 ///< Usage fault +#define FAULT_SVCALL 11 ///< SVCall +#define FAULT_DEBUG 12 ///< Debug monitor +#define FAULT_PENDSV 14 ///< PendSV +#define FAULT_SYSTICK 15 ///< System Tick +/*\}*/ + +/** + * The following are defines for the total number of interrupts. + */ +/*\{*/ +#define NUM_INTERRUPTS 71 +/*\}*/ + +/** + * NVIC registers (NVIC) + */ +/*\{*/ +#define NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004)) +#define NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010)) +#define NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014)) +#define NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018)) +#define NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C)) +#define NVIC_EN0_R (*((reg32_t *)0xE000E100)) +#define NVIC_EN1_R (*((reg32_t *)0xE000E104)) +#define NVIC_DIS0_R (*((reg32_t *)0xE000E180)) +#define NVIC_DIS1_R (*((reg32_t *)0xE000E184)) +#define NVIC_PEND0_R (*((reg32_t *)0xE000E200)) +#define NVIC_PEND1_R (*((reg32_t *)0xE000E204)) +#define NVIC_UNPEND0_R (*((reg32_t *)0xE000E280)) +#define NVIC_UNPEND1_R (*((reg32_t *)0xE000E284)) +#define NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300)) +#define NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304)) +#define NVIC_PRI0_R (*((reg32_t *)0xE000E400)) +#define NVIC_PRI1_R (*((reg32_t *)0xE000E404)) +#define NVIC_PRI2_R (*((reg32_t *)0xE000E408)) +#define NVIC_PRI3_R (*((reg32_t *)0xE000E40C)) +#define NVIC_PRI4_R (*((reg32_t *)0xE000E410)) +#define NVIC_PRI5_R (*((reg32_t *)0xE000E414)) +#define NVIC_PRI6_R (*((reg32_t *)0xE000E418)) +#define NVIC_PRI7_R (*((reg32_t *)0xE000E41C)) +#define NVIC_PRI8_R (*((reg32_t *)0xE000E420)) +#define NVIC_PRI9_R (*((reg32_t *)0xE000E424)) +#define NVIC_PRI10_R (*((reg32_t *)0xE000E428)) +#define NVIC_CPUID_R (*((reg32_t *)0xE000ED00)) +#define NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04)) +#define NVIC_VTABLE_R (*((reg32_t *)0xE000ED08)) +#define NVIC_APINT_R (*((reg32_t *)0xE000ED0C)) +#define NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10)) +#define NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14)) +#define NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18)) +#define NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C)) +#define NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20)) +#define NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24)) +#define NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28)) +#define NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C)) +#define NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30)) +#define NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34)) +#define NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38)) +#define NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90)) +#define NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94)) +#define NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98)) +#define NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C)) +#define NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0)) +#define NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0)) +#define NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4)) +#define NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8)) +#define NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC)) +#define NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00)) +/*\}*/ + +/** + * The following are defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_INT_TYPE 0xE000E004 ///< Interrupt Controller Type Reg +#define NVIC_ST_CTRL 0xE000E010 ///< SysTick Control and Status Reg +#define NVIC_ST_RELOAD 0xE000E014 ///< SysTick Reload Value Register +#define NVIC_ST_CURRENT 0xE000E018 ///< SysTick Current Value Register +#define NVIC_ST_CAL 0xE000E01C ///< SysTick Calibration Value Reg +#define NVIC_EN0 0xE000E100 ///< IRQ 0 to 31 Set Enable Register +#define NVIC_EN1 0xE000E104 ///< IRQ 32 to 63 Set Enable Register +#define NVIC_DIS0 0xE000E180 ///< IRQ 0 to 31 Clear Enable Reg +#define NVIC_DIS1 0xE000E184 ///< IRQ 32 to 63 Clear Enable Reg +#define NVIC_PEND0 0xE000E200 ///< IRQ 0 to 31 Set Pending Register +#define NVIC_PEND1 0xE000E204 ///< IRQ 32 to 63 Set Pending Reg +#define NVIC_UNPEND0 0xE000E280 ///< IRQ 0 to 31 Clear Pending Reg +#define NVIC_UNPEND1 0xE000E284 ///< IRQ 32 to 63 Clear Pending Reg +#define NVIC_ACTIVE0 0xE000E300 ///< IRQ 0 to 31 Active Register +#define NVIC_ACTIVE1 0xE000E304 ///< IRQ 32 to 63 Active Register +#define NVIC_PRI0 0xE000E400 ///< IRQ 0 to 3 Priority Register +#define NVIC_PRI1 0xE000E404 ///< IRQ 4 to 7 Priority Register +#define NVIC_PRI2 0xE000E408 ///< IRQ 8 to 11 Priority Register +#define NVIC_PRI3 0xE000E40C ///< IRQ 12 to 15 Priority Register +#define NVIC_PRI4 0xE000E410 ///< IRQ 16 to 19 Priority Register +#define NVIC_PRI5 0xE000E414 ///< IRQ 20 to 23 Priority Register +#define NVIC_PRI6 0xE000E418 ///< IRQ 24 to 27 Priority Register +#define NVIC_PRI7 0xE000E41C ///< IRQ 28 to 31 Priority Register +#define NVIC_PRI8 0xE000E420 ///< IRQ 32 to 35 Priority Register +#define NVIC_PRI9 0xE000E424 ///< IRQ 36 to 39 Priority Register +#define NVIC_PRI10 0xE000E428 ///< IRQ 40 to 43 Priority Register +#define NVIC_PRI11 0xE000E42C ///< IRQ 44 to 47 Priority Register +#define NVIC_PRI12 0xE000E430 ///< IRQ 48 to 51 Priority Register +#define NVIC_PRI13 0xE000E434 ///< IRQ 52 to 55 Priority Register +#define NVIC_CPUID 0xE000ED00 ///< CPUID Base Register +#define NVIC_INT_CTRL 0xE000ED04 ///< Interrupt Control State Register +#define NVIC_VTABLE 0xE000ED08 ///< Vector Table Offset Register +#define NVIC_APINT 0xE000ED0C ///< App. Int & Reset Control Reg +#define NVIC_SYS_CTRL 0xE000ED10 ///< System Control Register +#define NVIC_CFG_CTRL 0xE000ED14 ///< Configuration Control Register +#define NVIC_SYS_PRI1 0xE000ED18 ///< Sys. Handlers 4 to 7 Priority +#define NVIC_SYS_PRI2 0xE000ED1C ///< Sys. Handlers 8 to 11 Priority +#define NVIC_SYS_PRI3 0xE000ED20 ///< Sys. Handlers 12 to 15 Priority +#define NVIC_SYS_HND_CTRL 0xE000ED24 ///< System Handler Control and State +#define NVIC_FAULT_STAT 0xE000ED28 ///< Configurable Fault Status Reg +#define NVIC_HFAULT_STAT 0xE000ED2C ///< Hard Fault Status Register +#define NVIC_DEBUG_STAT 0xE000ED30 ///< Debug Status Register +#define NVIC_MM_ADDR 0xE000ED34 ///< Mem Manage Address Register +#define NVIC_FAULT_ADDR 0xE000ED38 ///< Bus Fault Address Register +#define NVIC_MPU_TYPE 0xE000ED90 ///< MPU Type Register +#define NVIC_MPU_CTRL 0xE000ED94 ///< MPU Control Register +#define NVIC_MPU_NUMBER 0xE000ED98 ///< MPU Region Number Register +#define NVIC_MPU_BASE 0xE000ED9C ///< MPU Region Base Address Register +#define NVIC_MPU_ATTR 0xE000EDA0 ///< MPU Region Attribute & Size Reg +#define NVIC_DBG_CTRL 0xE000EDF0 ///< Debug Control and Status Reg +#define NVIC_DBG_XFER 0xE000EDF4 ///< Debug Core Reg. Transfer Select +#define NVIC_DBG_DATA 0xE000EDF8 ///< Debug Core Register Data +#define NVIC_DBG_INT 0xE000EDFC ///< Debug Reset Interrupt Control +#define NVIC_SW_TRIG 0xE000EF00 ///< Software Trigger Interrupt Reg +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT +* register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL +* register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT +* register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR +* register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER +* register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + +#endif /* STM32_H */ diff --git a/2.5/bertos/cpu/cortex-m3/io/stm32_memmap.h b/2.5/bertos/cpu/cortex-m3/io/stm32_memmap.h new file mode 100644 index 00000000..a99577a1 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/io/stm32_memmap.h @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \brief STM32 memory map. + */ + +#ifndef STM32_MEMMAP_H +#define STM32_MEMMAP_H + +/* Peripheral and SRAM base address in the alias region */ +#define PERIPH_BB_BASE (0x42000000) +#define SRAM_BB_BASE (0x22000000) + +/* Peripheral and SRAM base address in the bit-band region */ +#define SRAM_BASE (0x20000000) +#define PERIPH_BASE (0x40000000) + +/* Flash refisters base address */ +#define FLASH_BASE (0x40022000) +/* Flash Option Bytes base address */ +#define OB_BASE (0x1FFFF800) + +/* Peripheral memory map */ +#define APB1PERIPH_BASE (PERIPH_BASE) +#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) +#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) + +#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) +#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) +#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) +#define RTC_BASE (APB1PERIPH_BASE + 0x2800) +#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) +#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) +#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) +#define USART2_BASE (APB1PERIPH_BASE + 0x4400) +#define USART3_BASE (APB1PERIPH_BASE + 0x4800) +#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) +#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) +#define CAN_BASE (APB1PERIPH_BASE + 0x6400) +#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) +#define PWR_BASE (APB1PERIPH_BASE + 0x7000) + +#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) +#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) +#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) +#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) +#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) +#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) +#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) +#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) +#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) +#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) +#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) +#define USART1_BASE (APB2PERIPH_BASE + 0x3800) + +#define DMA_BASE (AHBPERIPH_BASE + 0x0000) +#define DMA_CHANNEL1_BASE (AHBPERIPH_BASE + 0x0008) +#define DMA_CHANNEL2_BASE (AHBPERIPH_BASE + 0x001C) +#define DMA_CHANNEL3_BASE (AHBPERIPH_BASE + 0x0030) +#define DMA_CHANNEL4_BASE (AHBPERIPH_BASE + 0x0044) +#define DMA_CHANNEL5_BASE (AHBPERIPH_BASE + 0x0058) +#define DMA_CHANNEL6_BASE (AHBPERIPH_BASE + 0x006C) +#define DMA_CHANNEL7_BASE (AHBPERIPH_BASE + 0x0080) +#define RCC_BASE (AHBPERIPH_BASE + 0x1000) + +/* System Control Space memory map */ +#define SCS_BASE (0xE000E000) + +#define SYSTICK_BASE (SCS_BASE + 0x0010) +#define NVIC_BASE (SCS_BASE + 0x0100) +#define SCB_BASE (SCS_BASE + 0x0D00) + +#endif /* STM32_MEMMAP_H */ diff --git a/2.5/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld b/2.5/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld new file mode 100644 index 00000000..2bd20d96 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld @@ -0,0 +1,143 @@ +/** + * \file + * + * + * \author Manuele Fanelli + * + * \brief Script for Luminary Micro LM3S1968 Cortex M3 family processors. + * + */ + + +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for LM3S1968 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0100; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x0400; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > ram + + _etext = .; + PROVIDE (__etext = .); + + .data : AT (_etext) + { + PROVIDE (__data_start = .); + *(vtable) + . = ALIGN (0x400); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} + diff --git a/2.5/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld b/2.5/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld new file mode 100644 index 00000000..b4ed93a3 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \author Manuele Fanelli + * + * \brief Script for Luminary Micro LM3S1968 Cortex M3 family processors. + * + */ + +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for LM3S1968 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + +/* + * Define stack size here + */ +STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > rom + + __text_end = .; + PROVIDE (__text_end = .); + + .data : AT (__text_end) + { + . = ALIGN (0x400); + PROVIDE (__data_start = .); + *(vtable) + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__msp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__msp_end = .); + + PROVIDE (__psp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__psp_end = .); + + PROVIDE (__heap_start = .); + . = ALIGN(8); +} diff --git a/2.5/bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld b/2.5/bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld new file mode 100644 index 00000000..87d9a309 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld @@ -0,0 +1,38 @@ +/** + * \file + * + * + * \brief Script for Luminary Micro LM3S8968 Cortex M3 family processors. + * + * \author Andrea Righi + */ + +INCLUDE bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld diff --git a/2.5/bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld b/2.5/bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld new file mode 100644 index 00000000..03a497f7 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld @@ -0,0 +1,38 @@ +/** + * \file + * + * + * \brief Script for Luminary Micro LM3S8962 Cortex M3 family processors. + * + * \author Andrea Righi + */ + +INCLUDE bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld diff --git a/2.5/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld b/2.5/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld new file mode 100644 index 00000000..522a8428 --- /dev/null +++ b/2.5/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Script for Olimex STM32-P103 Cortex-M3 board. + * + */ + +SEARCH_DIR(.) +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define memory configuration for STM32F103R8 + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 128k + ram(rwx) : org = 0x20000000, len = 20k +} + +/* + * Define stack size here + */ +STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > rom + + __text_end = .; + PROVIDE (__text_end = .); + + .data : AT (__text_end) + { + PROVIDE (__data_start = .); + . = ALIGN (0x400); + *(vtable) + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + */ + PROVIDE (__msp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__msp_end = .); + + PROVIDE (__psp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__psp_end = .); + + PROVIDE (__heap_start = .); + . = ALIGN(8); +} diff --git a/2.5/bertos/cpu/detect.h b/2.5/bertos/cpu/detect.h new file mode 100644 index 00000000..33f6178c --- /dev/null +++ b/2.5/bertos/cpu/detect.h @@ -0,0 +1,369 @@ +/** + * \file + * + * + * \brief CPU detection through special preprocessor macros + */ +#ifndef CPU_DETECT_H +#define CPU_DETECT_H + +#if defined(__ARM_ARCH_4T__) /* GCC */ \ + || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */ + #define CPU_ARM 1 + #define CPU_ID arm + + // AT91SAM7S core family + #if defined(__ARM_AT91SAM7S32__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_AT91SAM7S32 1 + #else + #define CPU_ARM_AT91SAM7S32 0 + #endif + + #if defined(__ARM_AT91SAM7S64__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S64 1 + #else + #define CPU_ARM_AT91SAM7S64 0 + #endif + + #if defined(__ARM_AT91SAM7S128__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S128 1 + #else + #define CPU_ARM_AT91SAM7S128 0 + #endif + + #if defined(__ARM_AT91SAM7S256__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S256 1 + #else + #define CPU_ARM_AT91SAM7S256 0 + #endif + + #if defined(__ARM_AT91SAM7S512__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S512 1 + #else + #define CPU_ARM_AT91SAM7S512 0 + #endif + + // AT91SAM7X core family + #if defined(__ARM_AT91SAM7X128__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X128 1 + #else + #define CPU_ARM_AT91SAM7X128 0 + #endif + + #if defined(__ARM_AT91SAM7X256__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X256 1 + #else + #define CPU_ARM_AT91SAM7X256 0 + #endif + + + #if defined(__ARM_AT91SAM7X512__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X512 1 + #else + #define CPU_ARM_AT91SAM7X512 0 + #endif + + #if defined(__ARM_LPC2378__) + #define CPU_ARM_LPC2 1 + #define CPU_ARM_LPC2378 1 + #else + #define CPU_ARM_LPC2378 0 + #endif + + #if !defined(CPU_ARM_SAM7S_LARGE) + #define CPU_ARM_SAM7S_LARGE 0 + #endif + + #if !defined(CPU_ARM_SAM7X) + #define CPU_ARM_SAM7X 0 + #endif + + + #if defined(CPU_ARM_AT91) + #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \ + + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \ + + CPU_ARM_AT91SAM7S512 \ + + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \ + + CPU_ARM_AT91SAM7X512 != 1 + #error ARM CPU configuration error + #endif + #define CPU_ARM_LPC2 0 + + #elif defined (CPU_ARM_LPC2) + + #if CPU_ARM_LPC2378 + 0 != 1 + #error NXP LPC2xxx ARM CPU configuration error + #endif + #define CPU_ARM_AT91 0 + /* #elif Add other ARM families here */ + #else + #define CPU_ARM_AT91 0 + #define CPU_ARM_LPC2 0 + #endif + + + #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1 + #error ARM CPU configuration error + #endif +#else + #define CPU_ARM 0 + + /* ARM Families */ + #define CPU_ARM_AT91 0 + #define CPU_ARM_LPC2 0 + + /* SAM7 sub-families */ + #define CPU_ARM_SAM7S_LARGE 0 + #define CPU_ARM_SAM7X 0 + + /* ARM CPUs */ + #define CPU_ARM_AT91SAM7S32 0 + #define CPU_ARM_AT91SAM7S64 0 + #define CPU_ARM_AT91SAM7S128 0 + #define CPU_ARM_AT91SAM7S256 0 + #define CPU_ARM_AT91SAM7S512 0 + #define CPU_ARM_AT91SAM7X128 0 + #define CPU_ARM_AT91SAM7X256 0 + #define CPU_ARM_AT91SAM7X512 0 + + #define CPU_ARM_LPC2378 0 +#endif + +#if defined(__ARM_ARCH_7M__) + /* Cortex-M3 */ + #define CPU_CM3 1 + #define CPU_ID cm3 + + #if defined (__ARM_LM3S1968__) + #define CPU_CM3_LM3S 1 + #define CPU_CM3_LM3S1968 1 + #else + #define CPU_CM3_LM3S1968 0 + #endif + + #if defined (__ARM_LM3S8962__) + #define CPU_CM3_LM3S 1 + #define CPU_CM3_LM3S8962 1 + #else + #define CPU_CM3_LM3S8962 0 + #endif + + #if defined (__ARM_STM32F103RB__) + #define CPU_CM3_STM32 1 + #define CPU_CM3_STM32F103RB 1 + #else + #define CPU_CM3_STM32F103RB 0 + #endif + + #if defined (CPU_CM3_LM3S) + #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1 + #error Luminary Cortex-M3 CPU configuration error + #endif + #define CPU_CM3_STM32 0 + #elif defined (CPU_CM3_STM32) + #if CPU_CM3_STM32F103RB + 0 != 1 + #error STM32 Cortex-M3 CPU configuration error + #endif + #define CPU_CM3_LM3S 0 + /* #elif Add other Cortex-M3 families here */ + #else + #define CPU_CM3_LM3S 0 + #define CPU_CM3_STM32 0 + #endif + + + #if CPU_CM3_LM3S + CPU_CM3_STM32 + 0 /* Add other Cortex-M3 families here */ != 1 + #error Cortex-M3 CPU configuration error + #endif + +#else + #define CPU_CM3 0 + + #define CPU_CM3_LM3S 0 + + #define CPU_CM3_LM3S1968 0 + + #define CPU_CM3_LM3S8968 0 + + #define CPU_CM3_STM32 0 + + #define CPU_CM3_STM32F103RB 0 +#endif + +#if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ + && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */ + #warning Assuming CPU is I196 + #define CPU_I196 1 + #define CPU_ID i196 +#else + #define CPU_I196 0 +#endif + +#if defined(__i386__) /* GCC */ \ + || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */ + #define CPU_X86 1 + #define CPU_X86_32 1 + #define CPU_X86_64 0 + #define CPU_ID x86 +#elif defined(__x86_64__) /* GCC */ \ + || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */ + #define CPU_X86 1 + #define CPU_X86_32 0 + #define CPU_X86_64 1 + #define CPU_ID x86 +#else + #define CPU_X86 0 + #define CPU_I386 0 + #define CPU_X86_64 0 +#endif + +#if defined (_ARCH_PPC) || defined(_ARCH_PPC64) + #define CPU_PPC 1 + #define CPU_ID ppc + #if defined(_ARCH_PPC) + #define CPU_PPC32 1 + #else + #define CPU_PPC32 0 + #endif + #if defined(_ARCH_PPC64) + #define CPU_PPC64 1 + #else + #define CPU_PPC64 0 + #endif +#else + #define CPU_PPC 0 + #define CPU_PPC32 0 + #define CPU_PPC64 0 +#endif + +#if defined(__m56800E__) || defined(__m56800__) + #define CPU_DSP56K 1 + #define CPU_ID dsp56k +#else + #define CPU_DSP56K 0 +#endif + +#if defined (__AVR__) + #define CPU_AVR 1 + #define CPU_ID avr + + #if defined(__AVR_ATmega32__) + #define CPU_AVR_ATMEGA32 1 + #else + #define CPU_AVR_ATMEGA32 0 + #endif + + #if defined(__AVR_ATmega64__) + #define CPU_AVR_ATMEGA64 1 + #else + #define CPU_AVR_ATMEGA64 0 + #endif + + #if defined(__AVR_ATmega103__) + #define CPU_AVR_ATMEGA103 1 + #else + #define CPU_AVR_ATMEGA103 0 + #endif + + #if defined(__AVR_ATmega128__) + #define CPU_AVR_ATMEGA128 1 + #else + #define CPU_AVR_ATMEGA128 0 + #endif + + #if defined(__AVR_ATmega8__) + #define CPU_AVR_ATMEGA8 1 + #else + #define CPU_AVR_ATMEGA8 0 + #endif + + #if defined(__AVR_ATmega168__) + #define CPU_AVR_ATMEGA168 1 + #else + #define CPU_AVR_ATMEGA168 0 + #endif + + #if defined(__AVR_ATmega328P__) + #define CPU_AVR_ATMEGA328P 1 + #else + #define CPU_AVR_ATMEGA328P 0 + #endif + + #if defined(__AVR_ATmega1281__) + #define CPU_AVR_ATMEGA1281 1 + #else + #define CPU_AVR_ATMEGA1281 0 + #endif + + #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \ + + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 != 1 + #error AVR CPU configuration error + #endif +#else + #define CPU_AVR 0 + #define CPU_AVR_ATMEGA8 0 + #define CPU_AVR_ATMEGA168 0 + #define CPU_AVR_ATMEGA328P 0 + #define CPU_AVR_ATMEGA32 0 + #define CPU_AVR_ATMEGA64 0 + #define CPU_AVR_ATMEGA103 0 + #define CPU_AVR_ATMEGA128 0 + #define CPU_AVR_ATMEGA1281 0 +#endif + + +/* Self-check for the detection: only one CPU must be detected */ +#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0 + #error Unknown CPU +#elif !defined(CPU_ID) + #error CPU_ID not defined +#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1 + #error Internal CPU configuration error +#endif + + +#endif /* CPU_DETECT_H */ diff --git a/2.5/bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h b/2.5/bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h new file mode 100644 index 00000000..4eafa57b --- /dev/null +++ b/2.5/bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h @@ -0,0 +1,178 @@ +/** + * \file + * + * + * \brief Hardware support for buzzers and leds in DSP56K-based boards + * + * \version $Id$ + * + * \author Giovanni Bajo + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:25 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.5 2005/04/11 19:10:27 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.4 2004/11/16 21:54:43 bernie + *#* Changes for SC Monoboard support. + *#* + *#* Revision 1.3 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.2 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.1 2004/05/23 18:36:05 bernie + *#* Import buzzerled driver. + *#* + *#*/ + +#ifndef DRV_BUZZERLED_DSP56K_H +#define DRV_BUZZERLED_DSP56K_H + +#include +#include +#include "pwm.h" + +#if ARCH & ARCH_HECO + +/** + * \name Connection of the leds to the DSP: + * 
+ *   Led       Line    DSP Pin
+ *   ---------------------------
+ *   YELLOW    T2      HOME1/TB3
+ *   GREEN     T3      INDX1/TB2
+ *   RED       T4      PHB1/TB1
+ *
+ */ + +INLINE bool bld_is_inverted_intensity(enum BLD_DEVICE device) +{ + return (device == BLD_GREEN_LED + || device == BLD_YELLOW_LED + || device == BLD_RED_LED); +} + +INLINE bool bld_is_pwm(enum BLD_DEVICE device) +{ + // Only the buzzer is connected to a PWM + return (device == BLD_BUZZER || device == BLD_READY_LED); +} + +INLINE bool bld_is_timer(enum BLD_DEVICE device) +{ + // LEDs are connected to timers + return (device == BLD_GREEN_LED || device == BLD_YELLOW_LED || device == BLD_RED_LED); +} + +INLINE uint16_t bld_get_pwm(enum BLD_DEVICE device) +{ + switch (device) + { + default: ASSERT(0); + case BLD_BUZZER: return 5; // PWMA5 + case BLD_READY_LED: return 9; // PWMB3 + } +} + + +INLINE struct REG_TIMER_STRUCT* bld_get_timer(enum BLD_DEVICE device) +{ + switch (device) + { + default: ASSERT(0); + case BLD_GREEN_LED: return ®_TIMER_B[2]; + case BLD_RED_LED: return ®_TIMER_B[1]; + case BLD_YELLOW_LED: return ®_TIMER_B[3]; + } +} + +INLINE void bld_hw_init(void) +{ +} + +INLINE void bld_hw_set(enum BLD_DEVICE device, bool enable) +{ + if (bld_is_inverted_intensity(device)) + enable = !enable; + + // Handle a BLD connected to a PWM + if (bld_is_pwm(device)) + { + struct PWM* pwm = pwm_get_handle(bld_get_pwm(device)); + + pwm_set_enable(pwm, false); + pwm_set_dutycycle_percent(pwm, (enable ? 50 : 0)); + pwm_set_enable(pwm, true); + } + else if (bld_is_timer(device)) + { + struct REG_TIMER_STRUCT* timer = bld_get_timer(device); + + // Check that the timer is currently stopped, and the OFLAG is not + // controlled by another timer. Otherwise, the led is already + // controlled by the timer, and we cannot correctly set it + // on/off without reprogramming the timer. + ASSERT((timer->CTRL & REG_TIMER_CTRL_MODE_MASK) == REG_TIMER_CTRL_MODE_STOP); + ASSERT(!(timer->SCR & REG_TIMER_SCR_EEOF)); + + // Check also that polarity is correct + ASSERT(!(timer->SCR & REG_TIMER_SCR_OPS)); + + // Without programming the timer, we have a way to manually force a certain + // value on the external pin. We also need to enable the output pin. + timer->SCR &= ~REG_TIMER_SCR_VAL_1; + timer->SCR |= REG_TIMER_SCR_OEN | + REG_TIMER_SCR_FORCE | + (!enable ? REG_TIMER_SCR_VAL_0 : REG_TIMER_SCR_VAL_1); + } + else + ASSERT(0); +} + +#elif ARCH & ARCH_SC + +// We do not need inline functions here, because constant propagation is not big deal here +void bld_hw_init(void); +void bld_hw_set(enum BLD_DEVICE device, bool enable); + +#endif + +#endif /* DRV_BUZZERLED_DSP56K_H */ diff --git a/2.5/bertos/cpu/dsp56k/drv/kdebug_dsp56k.c b/2.5/bertos/cpu/dsp56k/drv/kdebug_dsp56k.c new file mode 100644 index 00000000..2510b6d5 --- /dev/null +++ b/2.5/bertos/cpu/dsp56k/drv/kdebug_dsp56k.c @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief General pourpose debug support for embedded systems (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#error Revise me! + +/* Debugging go through the JTAG interface. The MSL library already + implements the console I/O correctly. */ +#include +#define KDBG_WAIT_READY() do { } while (0) +#define KDBG_WRITE_CHAR(c) __put_char(c, stdout) +#define KDBG_MASK_IRQ(old) do { (void)(old); } while (0) +#define KDBG_RESTORE_IRQ(old) do { (void)(old); } while (0) +typedef uint8_t kdbg_irqsave_t; /* unused */ +#if CONFIG_KDEBUG_PORT == 666 + #error BITBANG debug console missing for this platform + +#define kdbg_hw_init() do {} while (0) ///< Not needed diff --git a/2.5/bertos/cpu/dsp56k/drv/ser_dsp56k.c b/2.5/bertos/cpu/dsp56k/drv/ser_dsp56k.c new file mode 100644 index 00000000..d69e0c57 --- /dev/null +++ b/2.5/bertos/cpu/dsp56k/drv/ser_dsp56k.c @@ -0,0 +1,367 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Stefano Fedrigo + * \author Giovanni Bajo + * + * \brief DSP5680x CPU specific serial I/O driver + */ + + +#include +#include +#include +#include +#include +#include + +// GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use +// the serial, we need to disable the GPIO functions on them. +#define REG_GPIO_SERIAL_0 REG_GPIO_E +#define REG_GPIO_SERIAL_MASK_0 0x03 + +#define REG_GPIO_SERIAL_1 REG_GPIO_D +#define REG_GPIO_SERIAL_MASK_1 0xC0 + + +// Check flag consistency +#if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \ + (SERRF_RXSROVERRUN != REG_SCI_SR_OR) || \ + (SERRF_FRAMEERROR != REG_SCI_SR_FE) || \ + (SERRF_NOISEERROR != REG_SCI_SR_NF) + #error error flags do not match with register bits +#endif + +static unsigned char ser0_fifo_rx[CONFIG_SER0_FIFOSIZE_RX]; +static unsigned char ser0_fifo_tx[CONFIG_SER0_FIFOSIZE_TX]; +static unsigned char ser1_fifo_rx[CONFIG_SER1_FIFOSIZE_RX]; +static unsigned char ser1_fifo_tx[CONFIG_SER1_FIFOSIZE_TX]; + +#if CONFIG_SER_MULTI + #include + + #define MAX_MULTI_GROUPS 1 + + struct Semaphore multi_sems[MAX_MULTI_GROUPS]; +#endif + + +struct SCI +{ + struct SerialHardware hw; + struct Serial* serial; + volatile struct REG_SCI_STRUCT* regs; + IRQ_VECTOR irq_tx; + IRQ_VECTOR irq_rx; + int num_group; + int id; +}; + +static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE; +} + +static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR |= REG_SCI_CR_RIE; +} + +static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR &= ~(REG_SCI_CR_TEIE | REG_SCI_CR_TIIE); +} + +static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR &= ~(REG_SCI_CR_RIE | REG_SCI_CR_REIE); +} + +static inline void disable_tx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + disable_tx_irq_bare(hw->regs); +} + +static inline void disable_rx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + disable_rx_irq_bare(hw->regs); +} + +static inline void enable_tx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + enable_tx_irq_bare(hw->regs); +} + +static inline void enable_rx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + enable_rx_irq_bare(hw->regs); +} + +static inline bool tx_irq_enabled(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + return (hw->regs->CR & REG_SCI_CR_TEIE); +} + +static void tx_isr(const struct SCI *hw) +{ +#pragma interrupt warn + volatile struct REG_SCI_STRUCT* regs = hw->regs; + + if (fifo_isempty(&hw->serial->txfifo)) + disable_tx_irq_bare(regs); + else + { + // Clear transmitter flags before sending data + (void)regs->SR; + regs->DR = fifo_pop(&hw->serial->txfifo); + } +} + +static void rx_isr(const struct SCI *hw) +{ +#pragma interrupt warn + volatile struct REG_SCI_STRUCT* regs = hw->regs; + + // Propagate errors + hw->serial->status |= regs->SR & (SERRF_PARITYERROR | + SERRF_RXSROVERRUN | + SERRF_FRAMEERROR | + SERRF_NOISEERROR); + + /* + * Serial IRQ can happen for two reason: data ready (RDRF) or overrun (OR) + * If the data is ready, we need to fetch it from the data register or + * the interrupt will retrigger immediatly. In case of overrun, instead, + * the value of the data register is meaningless. + */ + if (regs->SR & REG_SCI_SR_RDRF) + { + unsigned char data = regs->DR; + + if (fifo_isfull(&hw->serial->rxfifo)) + hw->serial->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(&hw->serial->rxfifo, data); + } + + // Writing anything to the status register clear the error bits. + regs->SR = 0; +} + +static void init(struct SerialHardware* _hw, struct Serial* ser) +{ + struct SCI* hw = (struct SCI*)_hw; + volatile struct REG_SCI_STRUCT* regs = hw->regs; + + // Clear status register (IRQ/status flags) + (void)regs->SR; + regs->SR = 0; + + // Clear data register + (void)regs->DR; + + // Install the handlers and set priorities for both IRQs + irq_install(hw->irq_tx, (isr_t)tx_isr, hw); + irq_install(hw->irq_rx, (isr_t)rx_isr, hw); + irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX); + irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX); + + // Activate the RX error interrupts, and RX/TX transmissions + regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE; + enable_rx_irq_bare(regs); + + // Disable GPIO pins for TX and RX lines + // \todo this should be divided into serial 0 and 1 + REG_GPIO_SERIAL_0->PER |= REG_GPIO_SERIAL_MASK_0; + REG_GPIO_SERIAL_1->PER |= REG_GPIO_SERIAL_MASK_1; + + hw->serial = ser; +} + +static void cleanup(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + // Uninstall the ISRs + disable_rx_irq(_hw); + disable_tx_irq(_hw); + irq_uninstall(hw->irq_tx); + irq_uninstall(hw->irq_rx); +} + +static void setbaudrate(struct SerialHardware* _hw, unsigned long rate) +{ + struct SCI* hw = (struct SCI*)_hw; + + // SCI has an internal 16x divider on the input clock, which comes + // from the IPbus (see the scheme in user manual, 12.7.3). We apply + // it to calculate the period to store in the register. + hw->regs->BR = (IPBUS_FREQ + rate * 8ul) / (rate * 16ul); +} + +static void setparity(struct SerialHardware* _hw, int parity) +{ + // ??? + ASSERT(0); +} + + +#if CONFIG_SER_MULTI + +static void multi_init(void) +{ + static bool flag = false; + int i; + + if (flag) + return; + + for (i = 0; i < MAX_MULTI_GROUPS; ++i) + sem_init(&multi_sems[i]); + flag = true; +} + +static void init_lock(struct SerialHardware* _hw, struct Serial *ser) +{ + struct SCI* hw = (struct SCI*)_hw; + + // Initialize the multi engine (if needed) + multi_init(); + + // Acquire the lock of the semaphore for this group + ASSERT(hw->num_group >= 0); + ASSERT(hw->num_group < MAX_MULTI_GROUPS); + sem_obtain(&multi_sems[hw->num_group]); + + // Do a hardware switch to the given serial + ser_hw_switch(hw->num_group, hw->id); + + init(_hw, ser); +} + +static void cleanup_unlock(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + cleanup(_hw); + + sem_release(&multi_sems[hw->num_group]); +} + +#endif /* CONFIG_SER_MULTI */ + + +static const struct SerialHardwareVT SCI_VT = +{ + .init = init, + .cleanup = cleanup, + .setBaudrate = setbaudrate, + .setParity = setparity, + .txStart = enable_tx_irq, + .txSending = tx_irq_enabled, +}; + +#if CONFIG_SER_MULTI +static const struct SerialHardwareVT SCI_MULTI_VT = +{ + .init = init_lock, + .cleanup = cleanup_unlock, + .setBaudrate = setbaudrate, + .setParity = setparity, + .txStart = enable_tx_irq, + .txSending = tx_irq_enabled, +}; +#endif /* CONFIG_SER_MULTI */ + +#define SCI_DESC_NORMAL(hwch) \ + { \ + .hw = \ + { \ + .table = &SCI_VT, \ + .rxbuffer = ser ## hwch ## _fifo_rx, \ + .txbuffer = ser ## hwch ## _fifo_tx, \ + .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \ + .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \ + }, \ + .regs = ®_SCI[hwch], \ + .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \ + .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \ + .num_group = -1, \ + .id = -1, \ + } \ + /**/ + +#if CONFIG_SER_MULTI +#define SCI_DESC_MULTI(hwch, group_, id_) \ + { \ + .hw = \ + { \ + .table = &SCI_MULTI_VT, \ + .rxbuffer = ser ## hwch ## _fifo_rx, \ + .txbuffer = ser ## hwch ## _fifo_tx, \ + .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \ + .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \ + }, \ + .regs = ®_SCI[hwch], \ + .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \ + .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \ + .num_group = group_, \ + .id = id_, \ + } \ + /**/ +#endif /* CONFIG_SER_MULTI */ + +// \todo Move this into hw.h, with a little preprocessor magic +static struct SCI SCIDescs[] = +{ + SCI_DESC_NORMAL(0), + SCI_DESC_MULTI(1, 0, 0), + SCI_DESC_MULTI(1, 0, 1), +}; + +struct SerialHardware* ser_hw_getdesc(int unit) +{ + ASSERT(unit < countof(SCIDescs)); + return &SCIDescs[unit].hw; +} diff --git a/2.5/bertos/cpu/dsp56k/drv/ser_dsp56k.h b/2.5/bertos/cpu/dsp56k/drv/ser_dsp56k.h new file mode 100644 index 00000000..c8fd3e1d --- /dev/null +++ b/2.5/bertos/cpu/dsp56k/drv/ser_dsp56k.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Daniele Basile + * + * \brief Low-level serial module for ARM (interface). + */ + +#include /* BV() */ +#include /* uint32_t */ + +typedef uint16_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + +/* + * Hardware errors. + * These flags map directly to the SCI Control Register. + */ +#define SERRF_PARITYERROR BV(8) /**< Parity error */ +#define SERRF_FRAMEERROR BV(9) /**< Stop bit missing */ +#define SERRF_NOISEERROR BV(10) /**< Noise error */ +#define SERRF_RXSROVERRUN BV(11) /**< Rx shift register overrun */ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +// \todo since we now support "fake" multiplexed serials, this should be moved to hw.h +SER_UART0, +SER_PUNTALI, +SER_BARCODE, +SER_CNT /**< Number of serial ports */ +}; +/*\}*/ diff --git a/2.5/bertos/cpu/dsp56k/drv/timer_dsp56k.h b/2.5/bertos/cpu/dsp56k/drv/timer_dsp56k.h new file mode 100644 index 00000000..f86cb50b --- /dev/null +++ b/2.5/bertos/cpu/dsp56k/drv/timer_dsp56k.h @@ -0,0 +1,148 @@ +#error This code must be revised for the new timer API +/** + * \file + * + * + * \version $Id$ + * + * \author Giovanni Bajo + * + * \brief Driver module for DSP56K + */ + +/*#* + *#* $Log$ + *#* Revision 1.10 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.9 2006/02/21 21:28:02 bernie + *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms. + *#* + *#* Revision 1.8 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.7 2005/04/11 19:10:28 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.6 2004/11/16 22:37:14 bernie + *#* Replace IPTR with iptr_t. + *#* + *#* Revision 1.5 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.4 2004/07/30 14:27:49 rasky + *#* Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management + *#* + *#* Revision 1.3 2004/06/06 18:30:34 bernie + *#* Import DSP56800 changes from SC. + *#* + *#* Revision 1.2 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.1 2004/05/23 18:23:30 bernie + *#* Import drv/timer module. + *#* + *#*/ + +#ifndef DRV_TIMER_DSP56K_H +#define DRV_TIMER_DSP56K_H + +#include "timer.h" +#include +#include +#include +#include + +// Calculate register pointer and irq vector from hw.h setting +#define REG_SYSTEM_TIMER PP_CAT(REG_TIMER_, SYSTEM_TIMER) +#define SYSTEM_TIMER_IRQ_VECTOR PP_CAT(IRQ_TIMER_, SYSTEM_TIMER) + +/// Prescaler for the system timer +#define TIMER_PRESCALER 16 + +/// Frequency of the hardware high precision timer +#define TIMER_HW_HPTICKS_PER_SEC (IPBUS_FREQ / TIMER_PRESCALER) + +/// Type of time expressed in ticks of the hardware high precision timer +typedef uint16_t hptime_t; + +static void system_timer_isr(UNUSED(iptr_t, arg)); + +static void timer_hw_init(void) +{ + uint16_t compare; + + // Clear compare flag status and enable interrupt on compare + REG_SYSTEM_TIMER->SCR &= ~REG_TIMER_SCR_TCF; + REG_SYSTEM_TIMER->SCR |= REG_TIMER_SCR_TCFIE; + + // Calculate the compare value needed to generate an interrupt exactly + // TICKS_PER_SEC times each second (usually, every millisecond). Check that + // the calculation is accurate, otherwise there is a precision error + // (probably the prescaler is too big or too small). + compare = TIMER_HW_HPTICKS_PER_SEC / TICKS_PER_SEC; + ASSERT((uint32_t)compare * TICKS_PER_SEC == IPBUS_FREQ / TIMER_PRESCALER); + REG_SYSTEM_TIMER->CMP1 = compare; + + // The value for reload (at initializationa and after compare is met) is zero + REG_SYSTEM_TIMER->LOAD = 0; + + // Set the interrupt handler and priority + irq_install(SYSTEM_TIMER_IRQ_VECTOR, &system_timer_isr, NULL); + irq_setpriority(SYSTEM_TIMER_IRQ_VECTOR, IRQ_PRIORITY_SYSTEM_TIMER); + + // Small preprocessor trick to generate the REG_TIMER_CTRL_PRIMARY_IPBYNN macro + // needed to set the prescaler + #define REG_CONTROL_PRESCALER PP_CAT(REG_TIMER_CTRL_PRIMARY_IPBY, TIMER_PRESCALER) + + // Setup the counter and start counting + REG_SYSTEM_TIMER->CTRL = + REG_TIMER_CTRL_MODE_RISING | // count rising edges (normal) + REG_CONTROL_PRESCALER | // frequency (IPbus / TIMER_PRESCALER) + REG_TIMER_CTRL_LENGTH; // up to CMP1, then reload +} + +INLINE void timer_hw_irq(void) +{ + // Clear the overflow flag so that we are ready for another interrupt + REG_SYSTEM_TIMER->SCR &= ~REG_TIMER_SCR_TCF; +} + +INLINE hptime_t timer_hw_hpread(void) +{ + return REG_SYSTEM_TIMER->CNTR; +} + +#define DEFINE_TIMER_ISR \ + static void system_timer_isr(UNUSED(iptr_t, arg)) + +#endif /* DRV_TIMER_DSP56_H */ diff --git a/2.5/bertos/cpu/dsp56k/hw/switch_dsp56k.c b/2.5/bertos/cpu/dsp56k/hw/switch_dsp56k.c new file mode 100644 index 00000000..116483e2 --- /dev/null +++ b/2.5/bertos/cpu/dsp56k/hw/switch_dsp56k.c @@ -0,0 +1,101 @@ +/** + * \file + * + * + * \version $Id$ + * \author Giovanni Bajo + * + * \brief DSP5680x task switching support + */ + +void asm_switch_context(void ** new_sp /* R2 */, void ** save_sp /* R3 */); +asm void asm_switch_context(void ** new_sp, void ** save_sp) +{ + lea (SP)+ + + ; From the manual: + ; The compiler uses page 0 address locations X: 0x0030 - 0x003F as register + ; variables. Frequently accessed local variables are assigned to the page 0 + ; registers instead of to stack locations so that load and store instructions + ; are shortened. Addresses X: 0x0030 - 0x0037 (page 0 registers MR0-MR7) are + ; volatile registers and can be overwritten. The remaining registers (page 0 + ; registers MR8-MR15) are treated as non-volatile and, if used by a routine, + ; must be saved on entry and restored on exit. + ; + ; So, register 0x30-0x37 are caller-save, while 0x38-0x3F are callee-save. + move x:<$38,y1 + move y1,x:(SP)+ + move x:<$39,y1 + move y1,x:(SP)+ + move x:<$3A,y1 + move y1,x:(SP)+ + move x:<$3B,y1 + move y1,x:(SP)+ + move x:<$3C,y1 + move y1,x:(SP)+ + move x:<$3D,y1 + move y1,x:(SP)+ + move x:<$3E,y1 + move y1,x:(SP)+ + move x:<$3F,y1 + move y1,x:(SP) + + ; + ; Switch stacks + nop + move SP, x:(R3) + nop + move x:(R2), SP + nop + + ; + ; restore all saved registers + ; + pop y1 + move y1,x:<$3F + pop y1 + move y1,x:<$3E + pop y1 + move y1,x:<$3D + pop y1 + move y1,x:<$3C + pop y1 + move y1,x:<$3B + pop y1 + move y1,x:<$3A + pop y1 + move y1,x:<$39 + pop y1 + move y1,x:<$38 + + ; SR is already pushed on the stack (normal call context). Use RTI to restore + ; it, so that interrupt status is preserved across the tasks. + rti +} diff --git a/2.5/bertos/cpu/frame.h b/2.5/bertos/cpu/frame.h new file mode 100644 index 00000000..b65aaed7 --- /dev/null +++ b/2.5/bertos/cpu/frame.h @@ -0,0 +1,282 @@ +/** + * \file + * + * + * \brief CPU-specific stack frame handling macros. + * + * These are mainly used by the portable part of the scheduler + * to work with the process stack frames. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_FRAME_H +#define CPU_FRAME_H + +#include + +#include "cfg/cfg_arch.h" /* ARCH_EMUL */ +#include /* for uintXX_t */ + +#if CPU_X86 + #if CPU_X86_32 + #define CPU_SAVED_REGS_CNT 2 + #elif CPU_X86_64 + #define CPU_SAVED_REGS_CNT 8 + #else + #error "unknown CPU" + #endif + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_ARM + + #define CPU_SAVED_REGS_CNT 8 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_CM3 + + #define CPU_SAVED_REGS_CNT 8 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_PPC + + #define CPU_SAVED_REGS_CNT 1 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 1 + +#elif CPU_DSP56K + + #define CPU_SAVED_REGS_CNT 8 + #define CPU_STACK_GROWS_UPWARD 1 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_AVR + + #define CPU_SAVED_REGS_CNT 18 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 1 + +#else + #error No CPU_... defined. +#endif + +#ifndef CPU_STACK_GROWS_UPWARD + #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1 +#endif + +#ifndef CPU_SP_ON_EMPTY_SLOT + #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1 +#endif + +/// Default for macro not defined in the right arch section +#ifndef CPU_REG_INIT_VALUE + #define CPU_REG_INIT_VALUE(reg) (reg) +#endif + +/* + * Support stack handling peculiarities of a few CPUs. + * + * Most processors let their stack grow downward and + * keep SP pointing at the last pushed value. + */ +#if !CPU_STACK_GROWS_UPWARD + #if !CPU_SP_ON_EMPTY_SLOT + /* Most microprocessors (x86, m68k...) */ + #define CPU_PUSH_WORD(sp, data) \ + do { *--(sp) = (data); } while (0) + #define CPU_POP_WORD(sp) \ + (*(sp)++) + #else + /* AVR insanity */ + #define CPU_PUSH_WORD(sp, data) \ + do { *(sp)-- = (data); } while (0) + #define CPU_POP_WORD(sp) \ + (*++(sp)) + #endif + +#else /* CPU_STACK_GROWS_UPWARD */ + + #if !CPU_SP_ON_EMPTY_SLOT + /* DSP56K and other weirdos */ + #define CPU_PUSH_WORD(sp, data) \ + do { *++(sp) = (cpu_stack_t)(data); } while (0) + #define CPU_POP_WORD(sp) \ + (*(sp)--) + #else + #error I bet you cannot find a CPU like this + #endif +#endif + + +#if CPU_DSP56K + /* + * DSP56k pushes both PC and SR to the stack in the JSR instruction, but + * RTS discards SR while returning (it does not restore it). So we push + * 0 to fake the same context. + */ + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), (func)); \ + CPU_PUSH_WORD((sp), 0x100); \ + } while (0); + +#elif CPU_CM3 + + #if CONFIG_KERN_PREEMPT + INLINE void asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp) + { + register cpu_stack_t **__new_sp asm ("r0") = new_sp; + register cpu_stack_t **__old_sp asm ("r1") = old_sp; + + asm volatile ("svc #0" + : : "r"(__new_sp), "r"(__old_sp) : "memory", "cc"); + } + #define asm_switch_context asm_switch_context + + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), 0x01000000); /* xPSR */ \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* pc */ \ + CPU_PUSH_WORD((sp), 0); /* lr */ \ + CPU_PUSH_WORD((sp), 0); /* ip */ \ + CPU_PUSH_WORD((sp), 0); /* r3 */ \ + CPU_PUSH_WORD((sp), 0); /* r2 */ \ + CPU_PUSH_WORD((sp), 0); /* r1 */ \ + CPU_PUSH_WORD((sp), 0); /* r0 */ \ + CPU_PUSH_WORD((sp), 0xfffffffd); /* lr_exc */ \ + } while (0); + + #define CPU_CREATE_NEW_STACK(stack) \ + do { \ + size_t i; \ + /* Initialize process stack frame */ \ + CPU_PUSH_CALL_FRAME(stack, proc_entry); \ + /* Push a clean set of CPU registers for asm_switch_context() */ \ + for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \ + CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \ + CPU_PUSH_WORD(stack, IRQ_PRIO_DISABLED); \ + } while (0) + + #else /* !CONFIG_KERN_PREEMPT */ + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), 0x01000000); /* xPSR */ \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* pc */ \ + } while (0); + #endif /* CONFIG_KERN_PREEMPT */ + +#elif CPU_AVR + /* + * On AVR, addresses are pushed into the stack as little-endian, while + * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is + * no natural endianess). + */ + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + uint16_t funcaddr = (uint16_t)(func); \ + CPU_PUSH_WORD((sp), funcaddr); \ + CPU_PUSH_WORD((sp), funcaddr>>8); \ + } while (0) + + /* + * If the kernel is in idle-spinning, the processor executes: + * + * IRQ_ENABLE; + * CPU_IDLE; + * IRQ_DISABLE; + * + * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli". + * We could define CPU_IDLE to expand to none, so the resulting + * asm code would be: + * + * sei; + * cli; + * + * But Atmel datasheet states: + * "When using the SEI instruction to enable interrupts, + * the instruction following SEI will be executed *before* + * any pending interrupts", so "cli" is executed before any + * pending interrupt with the result that IRQs will *NOT* + * be enabled! + * To ensure that IRQ will run a NOP is required. + */ + #define CPU_IDLE NOP + +#elif CPU_PPC + + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \ + CPU_PUSH_WORD((sp), 0); /* CR -> 4(SP) */ \ + } while (0) + +#else + #define CPU_PUSH_CALL_FRAME(sp, func) \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)) +#endif + +/** + * \def CPU_IDLE + * + * \brief Invoked by the scheduler to stop the CPU when idle. + * + * This hook can be redefined to put the CPU in low-power mode, or to + * profile system load with an external strobe, or to save CPU cycles + * in hosted environments such as emulators. + */ +#ifndef CPU_IDLE + #define CPU_IDLE PAUSE +#endif /* !CPU_IDLE */ + +/** + * Default macro for creating a new Process stack + */ +#ifndef CPU_CREATE_NEW_STACK + + #define CPU_CREATE_NEW_STACK(stack) \ + do { \ + size_t i; \ + /* Initialize process stack frame */ \ + CPU_PUSH_CALL_FRAME(stack, proc_entry); \ + /* Push a clean set of CPU registers for asm_switch_context() */ \ + for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \ + CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \ + } while (0) +#endif + +#endif /* CPU_ATTR_H */ diff --git a/2.5/bertos/cpu/i196/drv/kdebug_i196.c b/2.5/bertos/cpu/i196/drv/kdebug_i196.c new file mode 100644 index 00000000..69f09284 --- /dev/null +++ b/2.5/bertos/cpu/i196/drv/kdebug_i196.c @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief General pourpose debug support for embedded systems (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#error Revise me! + +#include +#include /* for BV() */ +#include +#include /* for CPU_FREQ */ +#include /* Required for bus macros overrides */ + + +#include "Util196.h" +#define KDBG_WAIT_READY() do {} while (!(SP_STAT & (SPSF_TX_EMPTY | SPSF_TX_INT))) +#define KDBG_WRITE_CHAR(c) do { SBUF = (c); } while(0) +#define KDBG_MASK_IRQ(old) \ + do { \ + (old) = INT_MASK1 & INT1F_TI; \ + INT_MASK1 &= ~INT1F_TI; \ + } while(0) +#define KDBG_RESTORE_IRQ(old) do { INT_MASK1 |= (old); } +typedef uint16_t kdbg_irqsave_t; /* FIXME: unconfirmed */ + +#if CONFIG_KDEBUG_PORT == 666 + #error BITBANG debug console missing for this platform +#endif + + +INLINE void kdbg_hw_init(void) +{ + /* Set serial port for 19200bps 8N1 */ + INT_MASK1 &= ~(INT1F_TI | INT1F_RI); + SP_CON = SPCF_RECEIVE_ENABLE | SPCF_MODE1; + ioc1_img |= IOC1F_TXD_SEL | IOC1F_EXTINT_SRC; + IOC1 = ioc1_img; + BAUD_RATE = 0x33; + BAUD_RATE = 0x80; +} diff --git a/2.5/bertos/cpu/i196/drv/ser_i196.c b/2.5/bertos/cpu/i196/drv/ser_i196.c new file mode 100644 index 00000000..149be7f6 --- /dev/null +++ b/2.5/bertos/cpu/i196/drv/ser_i196.c @@ -0,0 +1,134 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief CPU specific serial I/O driver + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.5 2004/12/13 11:51:08 bernie + *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE. + *#* + *#* Revision 1.4 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.3 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.2 2004/05/23 18:21:53 bernie + *#* Trim CVS logs and cleanup header info. + *#* + *#*/ + +#include "hw.h" +#include "serhw.h" + +#define SER_HW_ENABLE_TX \ + ATOMIC( \ + if (!ser_sending) \ + { \ + ser_sending = true; \ + (INT_PEND1 |= INT1F_TI) \ + } \ + ); + +static volatile bool ser_sending; + +// Serial TX intr +INTERRUPT(0x30) void TI_interrupt(void) +{ + if (CANT_SEND) + { + ser_sending = false; + return; + } + + /* Can we send two bytes at the same time? */ + if (SP_STAT & SPSF_TX_EMPTY) + { + SBUF = fifo_pop(&ser_txfifo); + + if (CANT_SEND) + { + ser_sending = false; + return; + } + } + + SBUF = fifo_pop(&ser_txfifo); +} + +INTERRUPT(0x32) void RI_interrupt(void) +{ + ser_status |= SP_STAT & + (SPSF_OVERRUN_ERROR | SPSF_PARITY_ERROR | SPSF_FRAMING_ERROR); + if (fifo_isfull(&ser_rxfifo)) + ser_status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(&ser_rxfifo, SBUF); +} + +static void ser_setbaudrate(unsigned long rate) +{ + // Calcola il periodo per la generazione del baud rate richiesto + uint16_t baud = (uint16_t)(((CPU_FREQ / 16) / rate) - 1) | 0x8000; + BAUD_RATE = (uint8_t)baud; + BAUD_RATE = (uint8_t)(baud >> 8); +} + +static void ser_hw_init(void) +{ + // Inizializza la porta seriale + SP_CON = SPCF_RECEIVE_ENABLE | SPCF_MODE1; + ioc1_img |= IOC1F_TXD_SEL | IOC1F_EXTINT_SRC; + IOC1 = ioc1_img; + + // Svuota il buffer di ricezione + { + uint8_t dummy = SBUF; + } + + // Abilita gli interrupt + INT_MASK1 |= INT1F_TI | INT1F_RI; +} + diff --git a/2.5/bertos/cpu/i196/drv/timer_i196.h b/2.5/bertos/cpu/i196/drv/timer_i196.h new file mode 100644 index 00000000..f7419961 --- /dev/null +++ b/2.5/bertos/cpu/i196/drv/timer_i196.h @@ -0,0 +1,89 @@ +#error This code must be revised for the new timer API +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for AVR + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2006/02/21 21:28:02 bernie + *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms. + *#* + *#* Revision 1.5 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.4 2004/12/13 11:51:08 bernie + *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE. + *#* + *#* Revision 1.3 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.2 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.1 2004/05/23 18:23:30 bernie + *#* Import drv/timer module. + *#* + *#*/ + +#ifndef TIMER_I196_H +#define TIMER_I196_H + +/** + * Retrigger TIMER2, adjusting the time to account for + * the interrupt prologue latency. + */ +#define TIMER_RETRIGGER (TIMER2 -= TICKS_RATE) + +#define TIMER_INIT \ + TIMER2 = (65535 - TICKS_RATE); \ + INT_MASK1 |= INT1F_T2OVF; \ + ATOMIC( \ + WSR = 1; \ + IOC3 |= IOC3F_T2_ENA; \ + WSR = 0; \ + ) + +#define DEFINE_TIMER_ISR \ + INTERRUPT(0x38) void TM2_OVFL_interrupt(void); \ + INTERRUPT(0x38) void TM2_OVFL_interrupt(void) + +#endif /* DRV_TIMER_I196_H */ diff --git a/2.5/bertos/cpu/i196/hw/switch_i196.s32 b/2.5/bertos/cpu/i196/hw/switch_i196.s32 new file mode 100644 index 00000000..de708952 --- /dev/null +++ b/2.5/bertos/cpu/i196/hw/switch_i196.s32 @@ -0,0 +1,92 @@ +;* Copyright 2004 Develer S.r.l. (http://www.develer.com/) +;* Copyright 1999,2000,2001 Bernie Innocenti +;* This file is part of DevLib - See devlib/README for information. +;* +;* \version $Id$ +;* +;* \author Bernie Innocenti +;* + +;* $Log$ +;* Revision 1.2 2004/06/06 16:14:12 bernie +;* Add DevLib license information. +;* +;* Revision 1.1 2004/05/23 17:27:00 bernie +;* Import kern/ subdirectory. +;* +;* + +!!!!!! THIS FILE HAS NOT BEEN REVISED FOR THE NEW SCHEDULER API !!!!!! + + + + NAME AsmSwitch + RSEG CODE + + EXTERN ?LR + EXTERN ?GR + PUBLIC AsmSwitchContext + PUBLIC AsmReplaceContext + + +;* Perform low-level process context switching +;* +;* void AsmSwitchContext(cpustack_t *new_sp, cpustack_t **save_sp) +;* GR+0 SP+2 +;* +;* Replace current context with new process +;* +;* void AsmReplaceContext(cpustack_t *new_sp, cpustack_t **dummy) +;* GR+0 SP+2 +;* + +AsmSwitchContext: + +; pop 2nd parameter from the stack + ld ?GR+2,2[SP] + +; save all registers + push ?LR+0 + push ?LR+2 + push ?LR+4 + push ?LR+6 + push ?LR+8 + push ?LR+10 + push ?LR+12 + push ?LR+14 + push ?LR+16 + push ?LR+18 + push ?LR+20 + push ?LR+22 + push ?LR+24 + push ?LR+26 + push ?LR+28 + push ?LR+30 + st SP,[?GR+2] ; save old stack pointer + ; fall-thru + +AsmReplaceContext: + ld SP,?GR+0 ; load new stack pointer + +; restore all registers + pop ?LR+30 + pop ?LR+28 + pop ?LR+26 + pop ?LR+24 + pop ?LR+22 + pop ?LR+20 + pop ?LR+18 + pop ?LR+16 + pop ?LR+14 + pop ?LR+12 + pop ?LR+10 + pop ?LR+8 + pop ?LR+6 + pop ?LR+4 + pop ?LR+2 + pop ?LR+0 + +; restore execution in new context + ret + + END diff --git a/2.5/bertos/cpu/irq.h b/2.5/bertos/cpu/irq.h new file mode 100644 index 00000000..153f7861 --- /dev/null +++ b/2.5/bertos/cpu/irq.h @@ -0,0 +1,586 @@ +/** + * \file + * + * + * \brief CPU-specific IRQ definitions. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_IRQ_H +#define CPU_IRQ_H + +#include "detect.h" +#include "types.h" + +#include /* proc_needPreempt() / proc_preempt() */ + +#include /* for uintXX_t */ +#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */ + +#if CPU_I196 + #define IRQ_DISABLE disable_interrupt() + #define IRQ_ENABLE enable_interrupt() +#elif CPU_X86 + + /* Get IRQ_* definitions from the hosting environment. */ + #include + #if OS_EMBEDDED + #define IRQ_DISABLE FIXME + #define IRQ_ENABLE FIXME + #define IRQ_SAVE_DISABLE(x) FIXME + #define IRQ_RESTORE(x) FIXME + #endif /* OS_EMBEDDED */ + +#elif CPU_CM3 + /* Cortex-M3 */ + + /* + * Interrupt priority. + * + * NOTE: 0 means that an interrupt is not affected by the global IRQ + * priority settings. + */ + #define IRQ_PRIO 0x80 + #define IRQ_PRIO_MIN 0xf0 + #define IRQ_PRIO_MAX 0 + /* + * To disable interrupts we just raise the system base priority to a + * number lower than the default IRQ priority. In this way, all the + * "normal" interrupt can't be triggered. High-priority interrupt can + * still happen (at the moment only the soft-interrupt svcall uses a + * priority greater than the default IRQ priority). + * + * To enable interrupts we set the system base priority to 0, that + * means IRQ priority mechanism is disabled, and any interrupt can + * happen. + */ + #define IRQ_PRIO_DISABLED 0x40 + #define IRQ_PRIO_ENABLED 0 + + #define IRQ_DISABLE \ + ({ \ + register cpu_flags_t reg = IRQ_PRIO_DISABLED; \ + asm volatile ( \ + "msr basepri, %0" \ + : : "r"(reg) : "memory", "cc"); \ + }) + + #define IRQ_ENABLE \ + ({ \ + register cpu_flags_t reg = IRQ_PRIO_ENABLED; \ + asm volatile ( \ + "msr basepri, %0" \ + : : "r"(reg) : "memory", "cc"); \ + }) + + #define CPU_READ_FLAGS() \ + ({ \ + register cpu_flags_t reg; \ + asm volatile ( \ + "mrs %0, basepri" \ + : "=r"(reg) : : "memory", "cc"); \ + reg; \ + }) + + #define IRQ_SAVE_DISABLE(x) \ + ({ \ + x = CPU_READ_FLAGS(); \ + IRQ_DISABLE; \ + }) + + #define IRQ_RESTORE(x) \ + ({ \ + asm volatile ( \ + "msr basepri, %0" \ + : : "r"(x) : "memory", "cc"); \ + }) + + #define IRQ_ENABLED() (CPU_READ_FLAGS() == IRQ_PRIO_ENABLED) + + INLINE bool irq_running(void) + { + register uint32_t ret; + + /* + * Check if the current stack pointer is the main stack or + * process stack: we use the main stack only in Handler mode, + * so this means we're running inside an ISR. + */ + asm volatile ( + "mrs %0, msp\n\t" + "cmp sp, %0\n\t" + "ite ne\n\t" + "movne %0, #0\n\t" + "moveq %0, #1\n\t" : "=r"(ret) : : "cc"); + return ret; + } + #define IRQ_RUNNING() irq_running() + + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + + #define DECLARE_ISR_CONTEXT_SWITCH(func) \ + void func(void); \ + INLINE void __isr_##func(void); \ + void func(void) \ + { \ + __isr_##func(); \ + if (!proc_needPreempt()) \ + return; \ + /* + * Set a PendSV request. + * + * The preemption handler will be called immediately + * after this ISR in tail-chaining mode (without the + * overhead of hardware state saving and restoration + * between interrupts). + */ \ + HWREG(NVIC_INT_CTRL) = NVIC_INT_CTRL_PEND_SV; \ + } \ + INLINE void __isr_##func(void) + + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer ISR, + * that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(func) \ + DECLARE_ISR_CONTEXT_SWITCH(func) + /** + * Interrupt service routine prototype: can be used for + * forward declarations. + */ + #define ISR_PROTO(func) \ + ISR_PROTO_CONTEXT_SWITCH(func) + #endif /* !CONFIG_KERN_PRI */ + #endif + + #ifndef ISR_PROTO + #define ISR_PROTO(func) void func(void) + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(func) void func(void) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void) + #endif + #ifndef ISR_PROTO_CONTEXT_SWITCH + #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void) + #endif + +#elif CPU_ARM + + #ifdef __IAR_SYSTEMS_ICC__ + + #include + + #if __CPU_MODE__ == 1 /* Thumb */ + /* Use stubs */ + extern cpu_flags_t get_CPSR(void); + extern void set_CPSR(cpu_flags_t flags); + #else + #define get_CPSR __get_CPSR + #define set_CPSR __set_CPSR + #endif + + #define IRQ_DISABLE __disable_interrupt() + #define IRQ_ENABLE __enable_interrupt() + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + (x) = get_CPSR(); \ + __disable_interrupt(); \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + set_CPSR(x); \ + } while (0) + + #define IRQ_ENABLED() \ + ((bool)(get_CPSR() & 0xb0)) + + #else /* !__IAR_SYSTEMS_ICC__ */ + + #define IRQ_DISABLE \ + do { \ + cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + "orr %0, %0, #0xc0\n\t" \ + "msr cpsr_c, %0\n\t" \ + : "=r" (sreg) : : "memory", "cc"); \ + } while (0) + + #define IRQ_ENABLE \ + do { \ + cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + "bic %0, %0, #0xc0\n\t" \ + "msr cpsr_c, %0\n\t" \ + : "=r" (sreg) : : "memory", "cc"); \ + } while (0) + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + register cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + "orr %1, %0, #0xc0\n\t" \ + "msr cpsr_c, %1\n\t" \ + : "=r" (x), "=r" (sreg) \ + : : "memory", "cc"); \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + asm volatile ( \ + "msr cpsr_c, %0\n\t" \ + : : "r" (x) : "memory", "cc"); \ + } while (0) + + #define CPU_READ_FLAGS() \ + ({ \ + cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + : "=r" (sreg) : : "memory", "cc"); \ + sreg; \ + }) + + #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0) + + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + EXTERN_C void asm_irq_switch_context(void); + + /** + * At the beginning of any ISR immediately ajust the + * return address and store all the caller-save + * registers (the ISR may change these registers that + * are shared with the user-context). + */ + #define IRQ_ENTRY() asm volatile ( \ + "sub lr, lr, #4\n\t" \ + "stmfd sp!, {r0-r3, ip, lr}\n\t") + #define IRQ_EXIT() asm volatile ( \ + "b asm_irq_switch_context\n\t") + /** + * Function attribute to declare an interrupt service + * routine. + * + * An ISR function must be declared as naked because we + * want to add our IRQ_ENTRY() prologue and IRQ_EXIT() + * epilogue code to handle the context switch and save + * all the registers (not only the callee-save). + * + */ + #define ISR_FUNC __attribute__((naked)) + + /** + * The compiler cannot establish which + * registers actually need to be saved, because + * the interrupt can happen at any time, so the + * "normal" prologue and epilogue used for a + * generic function call are not suitable for + * the ISR. + * + * Using a naked function has the drawback that + * the stack is not automatically adjusted at + * this point, like a "normal" function call. + * + * So, an ISR can _only_ contain other function + * calls and they can't use the stack in any + * other way. + * + * NOTE: we need to explicitly disable IRQs after + * IRQ_ENTRY(), because the IRQ status flag is not + * masked by the hardware and an IRQ ack inside the ISR + * may cause the triggering of another IRQ before + * exiting from the current ISR. + * + * The respective IRQ_ENABLE is not necessary, because + * IRQs will be automatically re-enabled when restoring + * the context of the user task. + */ + #define DECLARE_ISR_CONTEXT_SWITCH(func) \ + void ISR_FUNC func(void); \ + static NOINLINE void __isr_##func(void); \ + void ISR_FUNC func(void) \ + { \ + IRQ_ENTRY(); \ + IRQ_DISABLE; \ + __isr_##func(); \ + IRQ_EXIT(); \ + } \ + static NOINLINE void __isr_##func(void) + /** + * Interrupt service routine prototype: can be used for + * forward declarations. + */ + #define ISR_PROTO_CONTEXT_SWITCH(func) \ + void ISR_FUNC func(void) + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer + * ISR, that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(func) \ + DECLARE_ISR_CONTEXT_SWITCH(func) + + #define ISR_PROTO(func) \ + ISR_PROTO_CONTEXT_SWITCH(func) + #endif /* !CONFIG_KERN_PRI */ + #endif /* CONFIG_KERN_PREEMPT */ + + #ifndef ISR_FUNC + #define ISR_FUNC __attribute__((naked)) + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(func) \ + void ISR_FUNC func(void); \ + /* \ + * FIXME: avoid the inlining of this function. \ + * \ + * This is terribly inefficient, but it's a \ + * reliable workaround to avoid gcc blowing \ + * away the stack (see the bug below): \ + * \ + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41999 \ + */ \ + static NOINLINE void __isr_##func(void); \ + void ISR_FUNC func(void) \ + { \ + asm volatile ( \ + "sub lr, lr, #4\n\t" \ + "stmfd sp!, {r0-r3, ip, lr}\n\t"); \ + __isr_##func(); \ + asm volatile ( \ + "ldmfd sp!, {r0-r3, ip, pc}^\n\t"); \ + } \ + static NOINLINE void __isr_##func(void) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(func) DECLARE_ISR(func) + #endif + #ifndef ISR_PROTO + #define ISR_PROTO(func) void ISR_FUNC func(void) + #endif + #ifndef ISR_PROTO_CONTEXT_SWITCH + #define ISR_PROTO_CONTEXT_SWITCH(func) ISR_PROTO(func) + #endif + + #endif /* !__IAR_SYSTEMS_ICC_ */ + +#elif CPU_PPC + + /* Get IRQ_* definitions from the hosting environment. */ + #include + #if OS_EMBEDDED + #define IRQ_DISABLE FIXME + #define IRQ_ENABLE FIXME + #define IRQ_SAVE_DISABLE(x) FIXME + #define IRQ_RESTORE(x) FIXME + #define IRQ_ENABLED() FIXME + #endif /* OS_EMBEDDED */ + +#elif CPU_DSP56K + + #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0) + #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0) + + #define IRQ_SAVE_DISABLE(x) \ + do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0) + #define IRQ_RESTORE(x) \ + do { (void)x; asm(move x,SR); } while (0) + + static inline bool irq_running(void) + { + extern void *user_sp; + return !!user_sp; + } + #define IRQ_RUNNING() irq_running() + + static inline bool irq_enabled(void) + { + uint16_t x; + asm(move SR,x); + return !(x & 0x0200); + } + #define IRQ_ENABLED() irq_enabled() + +#elif CPU_AVR + + #define IRQ_DISABLE asm volatile ("cli" ::) + #define IRQ_ENABLE asm volatile ("sei" ::) + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + __asm__ __volatile__( \ + "in %0,__SREG__\n\t" \ + "cli" \ + : "=r" (x) : /* no inputs */ : "cc" \ + ); \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + __asm__ __volatile__( \ + "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \ + ); \ + } while (0) + + #define IRQ_ENABLED() \ + ({ \ + uint8_t sreg; \ + __asm__ __volatile__( \ + "in %0,__SREG__\n\t" \ + : "=r" (sreg) /* no inputs & no clobbers */ \ + ); \ + (bool)(sreg & 0x80); \ + }) + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + #define DECLARE_ISR_CONTEXT_SWITCH(vect) \ + INLINE void __isr_##vect(void); \ + ISR(vect) \ + { \ + __isr_##vect(); \ + IRQ_PREEMPT_HANDLER(); \ + } \ + INLINE void __isr_##vect(void) + + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer ISR, + * that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(func) \ + DECLARE_ISR_CONTEXT_SWITCH(func) + /** + * Interrupt service routine prototype: can be used for + * forward declarations. + */ + #define ISR_PROTO(func) \ + ISR_PROTO_CONTEXT_SWITCH(func) + #endif /* !CONFIG_KERN_PRI */ + #endif + + #ifndef ISR_PROTO + #define ISR_PROTO(vect) ISR(vect) + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(vect) ISR(vect) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect) + #endif + #ifndef ISR_PROTO_CONTEXT_SWITCH + #define ISR_PROTO_CONTEXT_SWITCH(vect) ISR(vect) + #endif + +#else + #error No CPU_... defined. +#endif + +#ifdef IRQ_RUNNING + /// Ensure callee is running within an interrupt + #define ASSERT_IRQ_CONTEXT() ASSERT(IRQ_RUNNING()) + + /// Ensure callee is not running within an interrupt + #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING()) +#else + #define IRQ_RUNNING() false + #define ASSERT_USER_CONTEXT() do {} while(0) + #define ASSERT_IRQ_CONTEXT() do {} while(0) +#endif + +#ifdef IRQ_ENABLED + /// Ensure interrupts are enabled + #define IRQ_ASSERT_ENABLED() ASSERT(IRQ_ENABLED()) + + /// Ensure interrupts are not enabled + #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED()) +#else + #define IRQ_ASSERT_ENABLED() do {} while(0) + #define IRQ_ASSERT_DISABLED() do {} while(0) +#endif + + +#ifndef IRQ_PREEMPT_HANDLER + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + /** + * Handle preemptive context switch inside timer IRQ. + */ + INLINE void IRQ_PREEMPT_HANDLER(void) + { + if (proc_needPreempt()) + proc_preempt(); + } + #else + #define IRQ_PREEMPT_HANDLER() /* Nothing */ + #endif +#endif + +/** + * Execute \a CODE atomically with respect to interrupts. + * + * \see IRQ_SAVE_DISABLE IRQ_RESTORE + */ +#define ATOMIC(CODE) \ + do { \ + cpu_flags_t __flags; \ + IRQ_SAVE_DISABLE(__flags); \ + CODE; \ + IRQ_RESTORE(__flags); \ + } while (0) + +#endif /* CPU_IRQ_H */ diff --git a/2.5/bertos/cpu/newcore b/2.5/bertos/cpu/newcore new file mode 100755 index 00000000..043764c9 --- /dev/null +++ b/2.5/bertos/cpu/newcore @@ -0,0 +1,17 @@ +#!/bin/bash + +DIRS="drv hw io scripts" +if [ $# != 1 ]; then + echo "Create a new core tree with subdirs:" + echo $DIRS + echo "usage $0 " + exit 1 +fi +CORE=$1 +mkdir $CORE +cd $CORE +for dir in $DIRS +do + mkdir $dir +done +cd .. diff --git a/2.5/bertos/cpu/path.common b/2.5/bertos/cpu/path.common new file mode 100644 index 00000000..4c1808bd --- /dev/null +++ b/2.5/bertos/cpu/path.common @@ -0,0 +1,46 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# BeRTOS common path info. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# BeRTOS cpu directory +CPU_DIR = "bertos/cpu/" + +PRG_SCRIPTS_DIR = "bertos/prg_scripts/" diff --git a/2.5/bertos/cpu/pgm.h b/2.5/bertos/cpu/pgm.h new file mode 100644 index 00000000..3fac0c72 --- /dev/null +++ b/2.5/bertos/cpu/pgm.h @@ -0,0 +1,213 @@ +/** + * \file + * + * + * \brief Support for reading program memory on Harvard architectures. + * + * Support is currently provided for AVR microcontrollers only. + * + * These macros allow building code twice, with and without + * pgm support (e.g.: strcpy() and strcpy_P()). + * + * Set the _PROGMEM predefine to compile in conditional + * program-memory support. + * + * + * \note This module contains code ripped out from avr-libc, + * which is distributed under a 3-clause BSD license. + * + * \version $Id$ + * \author Bernie Innocenti + */ +#ifndef MWARE_PGM_H +#define MWARE_PGM_H + +#include /* For intXX_t */ +#include +#include /* For CPU_HARVARD */ +#include /* For SIZEOF_INT */ + +#if CPU_AVR + + #ifdef __AVR_ENHANCED__ + #define pgm_read_char(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint8_t __result; \ + __asm__ \ + ( \ + "lpm %0, Z" "\n\t" \ + : "=r" (__result) \ + : "z" (__addr16) \ + ); \ + __result; \ + }) + #define pgm_read_uint16_t(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint16_t __result; \ + __asm__ \ + ( \ + "lpm %A0, Z+" "\n\t" \ + "lpm %B0, Z" "\n\t" \ + : "=r" (__result), "=z" (__addr16) \ + : "1" (__addr16) \ + ); \ + __result; \ + }) + + + #else /* !__AVR_ENHANCED__ */ + + #define pgm_read_char(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint8_t __result; \ + __asm__ \ + ( \ + "lpm" "\n\t" \ + "mov %0, r0" "\n\t" \ + : "=r" (__result) \ + : "z" (__addr16) \ + : "r0" \ + ); \ + __result; \ + }) + #define pgm_read_uint16_t(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint16_t __result; \ + __asm__ \ + ( \ + "lpm" "\n\t" \ + "mov %A0, r0" "\n\t" \ + "adiw r30, 1" "\n\t" \ + "lpm" "\n\t" \ + "mov %B0, r0" "\n\t" \ + : "=r" (__result), "=z" (__addr16) \ + : "1" (__addr16) \ + : "r0" \ + ); \ + __result; \ + }) + + #endif /* !__AVR_ENHANCED__ */ + + #if SIZEOF_INT == 2 + #define pgm_read_int(addr) ((int)pgm_read_uint16_t(addr)) + #else + #error Missing support for CPU word size != 16bit + #endif + + #ifndef PROGMEM + #define PROGMEM __attribute__((__progmem__)) + #endif + #ifndef PSTR + #define PSTR(s) ({ static const char __c[] PROGMEM = (s); &__c[0]; }) + #endif + #ifndef PFUNC + #define PFUNC(x) x ## _P + #endif + +#elif CPU_HARVARD + #error Missing CPU support +#endif + +#ifndef PSTR +#define PSTR /* nothing */ +#endif + +#ifndef PFUNC +#define PFUNC(x) x +#endif + +#ifndef PROGMEM +#define PROGMEM /* nothing */ +#endif + +/** + * \name Types for variables stored in program memory (harvard processors). + * \{ + */ +typedef PROGMEM char pgm_char; +typedef PROGMEM int8_t pgm_int8_t; +typedef PROGMEM uint8_t pgm_uint8_t; +typedef PROGMEM int16_t pgm_int16_t; +typedef PROGMEM uint16_t pgm_uint16_t; +typedef PROGMEM int32_t pgm_int32_t; +typedef PROGMEM uint32_t pgm_uint32_t; +/*\}*/ + +/** + * \name PGM support macros. + * + * These macros enable dual compilation of code for both program + * and data memory. + * + * Such a function may be defined like this: + * + * \code + * void PGM_FUNC(lcd_puts)(PGM_ATTR const char *str) + * { + * char c; + * while ((c = PGM_READ_CHAR(str++)) + * lcd_putchar(c); + * } + * \endcode + * + * The above code can be compiled twice: once with the _PROGMEM preprocessor + * symbol defined, and once without. The two object modules can then be + * linked in the same application for use by client code: + * + * \code + * lcd_puts("Hello, world!"); + * lcd_puts_P(PSTR("Hello, world!")); + * + * // To be used when invoking inside other PGM_FUNC functions: + * PGM_FUNC(lcd_puts)(some_string); + * \endcode + * + * \{ + */ +#ifdef _PROGMEM + #define PGM_READ_CHAR(s) pgm_read_char(s) + #define PGM_FUNC(x) PFUNC(x) + #define PGM_STR(x) PSTR(x) + #define PGM_ATTR PROGMEM +#else + #define PGM_READ_CHAR(s) (*(s)) + #define PGM_FUNC(x) x + #define PGM_STR(x) x + #define PGM_ATTR /* nothing */ +#endif +/* \} */ + + +#endif /* MWARE_PGM_H */ diff --git a/2.5/bertos/cpu/power.h b/2.5/bertos/cpu/power.h new file mode 100644 index 00000000..d73eb621 --- /dev/null +++ b/2.5/bertos/cpu/power.h @@ -0,0 +1,116 @@ +/** + * \file + * + * + * \brief CPU power management functions + * + * \author Bernie Innocenti + */ + +#ifndef CPU_POWER_H +#define CPU_POWER_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_wdt.h" + +#if CONFIG_KERN + #include +#endif + +#if CONFIG_WATCHDOG + #include +#endif + +/** + * Let the CPU rest in tight busy loops + * + * User code that sits in a busy loop should call cpu_relax() every + * once in a while to perform system-dependent idle processing. + * + * Depending on the system configuration, this might perform different + * actions: + * + * - yield the CPU to other processes + * - reset the watchdog timer to avoid it from triggering + * - scale the CPU speed down to save power (unimplemented) + * - let the event loop of the emulator process a few events + * + * \see proc_yield() cpu_pause() + */ +INLINE void cpu_relax(void) +{ +#if CONFIG_KERN + if (proc_preemptAllowed()) + proc_yield(); +#endif + +#if CONFIG_WATCHDOG + wdt_reset(); +#endif +} + +/** + * Stop the processor until the next interrupt occurs. + * + * Pausing the CPU effectively reduces power usage, and should be used + * whenever the program is idle waiting for the next event to occur. + * + * To avoid deadlocking, the caller should normally check for the + * desired condition with interrupts disabled, and enter this function + * while interrupts are still disabled: + * + * \code + * IRQ_DISABLE(); + * while (!event_occurred) + * cpu_pause(); + * IRQ_ENABLE(); + * \endcode + * + * \note Some implementations of cpu_pause() may return before any interrupt + * has occurred. Calling code should take this possibility into account. + * + * \note This function is currently unimplemented + * + * \see cpu_relax() cpu_yield() + */ +INLINE void cpu_pause(void) +{ + //ASSERT_IRQ_DISABLED(); + //IRQ_ENABLE(); + cpu_relax(); + //IRQ_DISABLE(); +} + +/** + * Safely call cpu_pause() until the COND predicate becomes true. + */ +#define CPU_PAUSE_ON(COND) ATOMIC(while (!(COND)) { cpu_pause(); }) + +#endif /* CPU_POWER_H */ diff --git a/2.5/bertos/cpu/types.h b/2.5/bertos/cpu/types.h new file mode 100644 index 00000000..d7e3e8bd --- /dev/null +++ b/2.5/bertos/cpu/types.h @@ -0,0 +1,236 @@ +/** + * \file + * + * + * \brief CPU-specific type definitions. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_TYPES_H +#define CPU_TYPES_H + +#include "detect.h" +#include "attr.h" +#include /* for uintXX_t */ + +#if CPU_I196 + + typedef uint16_t cpu_flags_t; // FIXME + typedef unsigned int cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + typedef unsigned int cpu_atomic_t; + #warning Verify following constant + #define SIZEOF_CPUSTACK_T 2 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_X86 + + /* Get cpu_flags_t definition from the hosting environment. */ + #include + #if OS_EMBEDDED + typedef uint32_t cpu_flags_t; // FIXME + #endif /* OS_EMBEDDED */ + + typedef uint32_t cpu_atomic_t; + + #if CPU_X86_64 + typedef uint64_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 8 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + #else + typedef uint32_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 4 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + #endif + +#elif CPU_ARM || CPU_CM3 + + typedef uint32_t cpu_flags_t; + typedef uint32_t cpu_atomic_t; + typedef uint32_t cpu_stack_t; + #define SIZEOF_CPUSTACK_T 4 + + typedef uint64_t cpu_aligned_stack_t; + #define SIZEOF_CPUALIGNED_T 8 + +#elif CPU_PPC + + /* Get cpu_flags_t definition from the hosting environment. */ + #include + #if OS_EMBEDDED + typedef uint32_t cpu_flags_t; + #endif + + typedef uint32_t cpu_atomic_t; + typedef uint32_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 4 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_DSP56K + + typedef uint16_t cpu_flags_t; + typedef uint16_t cpu_atomic_t; + typedef unsigned int cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #warning Verify following costant + #define SIZEOF_CPUSTACK_T 2 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_AVR + + typedef uint8_t cpu_flags_t; + typedef uint8_t cpu_atomic_t; + typedef uint8_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 1 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#else + #error No CPU_... defined. +#endif + +/** + * \name Default type sizes. + * + * These defaults are reasonable for most 16/32bit machines. + * Some of these macros may be overridden by CPU-specific code above. + * + * ANSI C requires that the following equations be true: + * \code + * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long) + * sizeof(float) <= sizeof(double) + * CPU_BITS_PER_CHAR >= 8 + * CPU_BITS_PER_SHORT >= 8 + * CPU_BITS_PER_INT >= 16 + * CPU_BITS_PER_LONG >= 32 + * \endcode + * \{ + */ +#ifndef SIZEOF_CHAR +#define SIZEOF_CHAR 1 +#endif + +#ifndef SIZEOF_SHORT +#define SIZEOF_SHORT 2 +#endif + +#ifndef SIZEOF_INT +#if CPU_REG_BITS < 32 + #define SIZEOF_INT 2 +#else + #define SIZEOF_INT 4 +#endif +#endif /* !SIZEOF_INT */ + +#ifndef SIZEOF_LONG +#if CPU_REG_BITS > 32 + #define SIZEOF_LONG 8 +#else + #define SIZEOF_LONG 4 +#endif +#endif + +#ifndef SIZEOF_PTR +#if CPU_REG_BITS < 32 + #define SIZEOF_PTR 2 +#elif CPU_REG_BITS == 32 + #define SIZEOF_PTR 4 +#else /* CPU_REG_BITS > 32 */ + #define SIZEOF_PTR 8 +#endif +#endif + +#ifndef SIZEOF_SIZE_T +#if CPU_REG_BITS < 32 + #define SIZEOF_SIZE_T 2 +#elif CPU_REG_BITS == 32 + #define SIZEOF_SIZE_T 4 +#else /* CPU_REG_BITS > 32 */ + #define SIZEOF_SIZE_T 8 +#endif +#endif + +#ifndef CPU_BITS_PER_CHAR +#define CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8) +#endif + +#ifndef CPU_BITS_PER_SHORT +#define CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR) +#endif + +#ifndef CPU_BITS_PER_INT +#define CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR) +#endif + +#ifndef CPU_BITS_PER_LONG +#define CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR) +#endif + +#ifndef CPU_BITS_PER_PTR +#define CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR) +#endif + + +/*\}*/ + +#ifndef INT_MAX + #define INT_MAX ((int)((unsigned int)~0 >> 1)) + #define INT_MIN (-INT_MAX - 1) +#endif + +/* Sanity checks for the above definitions */ +STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR); +STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT); +STATIC_ASSERT(sizeof(long) == SIZEOF_LONG); +STATIC_ASSERT(sizeof(int) == SIZEOF_INT); +STATIC_ASSERT(sizeof(void *) == SIZEOF_PTR); +STATIC_ASSERT(sizeof(int8_t) * CPU_BITS_PER_CHAR == 8); +STATIC_ASSERT(sizeof(uint8_t) * CPU_BITS_PER_CHAR == 8); +STATIC_ASSERT(sizeof(int16_t) * CPU_BITS_PER_CHAR == 16); +STATIC_ASSERT(sizeof(uint16_t) * CPU_BITS_PER_CHAR == 16); +STATIC_ASSERT(sizeof(int32_t) * CPU_BITS_PER_CHAR == 32); +STATIC_ASSERT(sizeof(uint32_t) * CPU_BITS_PER_CHAR == 32); +#ifdef __HAS_INT64_T__ +STATIC_ASSERT(sizeof(int64_t) * CPU_BITS_PER_CHAR == 64); +STATIC_ASSERT(sizeof(uint64_t) * CPU_BITS_PER_CHAR == 64); +#endif +STATIC_ASSERT(sizeof(cpu_stack_t) == SIZEOF_CPUSTACK_T); +STATIC_ASSERT(sizeof(cpu_aligned_stack_t) == SIZEOF_CPUALIGNED_T); +STATIC_ASSERT(sizeof(size_t) == SIZEOF_SIZE_T); + +#endif /* CPU_TYPES_H */ diff --git a/2.5/bertos/drv/adc.c b/2.5/bertos/drv/adc.c new file mode 100644 index 00000000..fd2cff1c --- /dev/null +++ b/2.5/bertos/drv/adc.c @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief ADC driver (implementation) + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include + +#ifndef WIZ_AUTOGEN + #warning Deprecated: now you should include adc_ directly in the makefile. Remove this line and the following once done. + #include CPU_CSOURCE(adc) +#else + #include CPU_HEADER(adc) +#endif + +#include // ASSERT() +#include // MIN() +#include +#include + +/** + * Read the ADC channel \a ch. + */ +adcread_t adc_read(adc_ch_t ch) +{ + ASSERT(ch <= (adc_ch_t)ADC_MUX_MAXCH); + ch = MIN(ch, (adc_ch_t)ADC_MUX_MAXCH); + + adc_hw_select_ch(ch); + + return(adc_hw_read()); +} + +MOD_DEFINE(adc); + +/** + * Initialize the ADC hardware. + */ +void adc_init(void) +{ + adc_hw_init(); + + MOD_INIT(adc); +} diff --git a/2.5/bertos/drv/adc.h b/2.5/bertos/drv/adc.h new file mode 100644 index 00000000..78f3e81d --- /dev/null +++ b/2.5/bertos/drv/adc.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Analog to Digital Converter driver (ADC). + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "adc" + * $WIZ$ module_configuration = "bertos/cfg/cfg_adc.h" + * $WIZ$ module_supports = "not atmega103" + */ + + +#ifndef DRV_ADC_H +#define DRV_ADC_H + +#include +#include +#include +#include CPU_HEADER(adc) + +/** Type for ADC return value. */ +typedef uint16_t adcread_t; + +/** Type for channel */ +typedef uint8_t adc_ch_t; + +#define adc_bits() ADC_BITS + +adcread_t adc_read(adc_ch_t ch); +void adc_init(void); + +/** + * Macro used to convert data from adc range (0...(2 ^ADC_BITS - 1)) to + * \a y1 ... \a y2 range. + * \note \a y1, \a y2 can be negative, and put in ascending or descending order as well. + * \note \a data and \a y2 are evaluated only once, \a y1 twice. + */ +#define ADC_RANGECONV(data, y1, y2) (((((int32_t)(data)) * ((y2) - (y1))) / ((1 << ADC_BITS) - 1)) + (y1)) + +#endif /* DRV_ADC_H */ diff --git a/2.5/bertos/drv/buzzer.c b/2.5/bertos/drv/buzzer.c new file mode 100644 index 00000000..042d06cc --- /dev/null +++ b/2.5/bertos/drv/buzzer.c @@ -0,0 +1,158 @@ +/** + * \file + * + * + * \brief Buzzer driver (implementation) + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include "buzzer.h" + +#include "hw/hw_buzzer.h" +#include + +#include + +#include +#include + + +/* Local vars */ +static Timer buz_timer; +static bool buz_timer_running; +static mtime_t buz_repeat_interval; +static mtime_t buz_repeat_duration; + + +/** + * Turn off buzzer, called by software timer + */ +static void buz_softint(void) +{ + if (IS_BUZZER_ON) + { + BUZZER_OFF; + if (buz_repeat_interval) + { + /* Wait for interval time */ + timer_setDelay(&buz_timer, ms_to_ticks(buz_repeat_interval)); + timer_add(&buz_timer); + } + else + buz_timer_running = false; + } + else if (buz_repeat_interval) + { + /* Wait for beep time */ + BUZZER_ON; + timer_setDelay(&buz_timer, ms_to_ticks(buz_repeat_duration)); + timer_add(&buz_timer); + } + else + buz_timer_running = false; +} + + +/** + * Beep for the specified ms time + */ +void buz_beep(mtime_t time) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Remove the software interrupt if it was already queued */ + if (buz_timer_running) + timer_abort(&buz_timer); + + /* Turn on buzzer */ + BUZZER_ON; + + /* Add software interrupt to turn the buzzer off later */ + buz_timer_running = true; + timer_setDelay(&buz_timer, ms_to_ticks(time)); + timer_add(&buz_timer); + + IRQ_RESTORE(flags); +} + + +/** + * Start buzzer repetition + */ +void buz_repeat_start(mtime_t duration, mtime_t interval) +{ + buz_repeat_interval = interval; + buz_repeat_duration = duration; + buz_beep(duration); +} + + +/** + * Stop buzzer repetition + */ +void buz_repeat_stop(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Remove the software interrupt if it was already queued */ + if (buz_timer_running) + { + timer_abort(&buz_timer); + buz_timer_running = false; + } + + buz_repeat_interval = 0; + BUZZER_OFF; + + IRQ_RESTORE(flags); +} + +MOD_DEFINE(buzzer) + +/** + * Initialize buzzer. + */ +void buz_init(void) +{ + MOD_CHECK(timer); + + BUZZER_HW_INIT; + + /* Init software interrupt. */ + timer_setSoftint(&buz_timer, (Hook)buz_softint, 0); + + MOD_INIT(buzzer); +} diff --git a/2.5/bertos/drv/buzzer.h b/2.5/bertos/drv/buzzer.h new file mode 100644 index 00000000..9023152c --- /dev/null +++ b/2.5/bertos/drv/buzzer.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Buzzer driver. + * + * $WIZ$ module_name = "buzzer" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_hw = "bertos/hw/hw_buzzer.h" + */ + +#ifndef DRV_BUZZER_H +#define DRV_BUZZER_H + +#include + +void buz_init(void); +void buz_beep(mtime_t time); +void buz_repeat_start(mtime_t duration, mtime_t interval); +void buz_repeat_stop(void); + +#endif /* DRV_BUZZER_H */ diff --git a/2.5/bertos/drv/buzzerled.c b/2.5/bertos/drv/buzzerled.c new file mode 100644 index 00000000..000e7c98 --- /dev/null +++ b/2.5/bertos/drv/buzzerled.c @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \brief Generic library to handle buzzers and leds + * + * This library is divided into three different layers: + * + * - The topmost portable layer is buzzerled.[ch] which exposes a common API + * enable/disable the devices. Basically, it handles the asynchronism to + * implement bld_beep and bld_repeat. + * - The middle layer is CPU-specific and exposes a single main function which + * turns on/off each device. + * - The lower layer is board-specific and communicates with the middle layer + * with any required API. The idea is that devices can be tied to the CPU in + * many different ways (many different pins), so this part should describe + * which devices are present, and how they are connected. + * + * \version $Id$ + * + * \author Giovanni Bajo + */ + +#include "buzzerled.h" + +#warning FIXME:This drive is obsolete, you must refactor it. + +#if 0 +#include "cfg/cfg_buzzerled.h" +#include + +static struct Timer timers[CONFIG_NUM_BLDS]; +static bool timer_go[CONFIG_NUM_BLDS]; + +INLINE enum BLD_DEVICE hook_parm_to_device(void* parm) +{ + struct Timer* t = (struct Timer*)parm; + int num_bld = t - &timers[0]; + + ASSERT(num_bld >= 0); + ASSERT(num_bld < NUM_BLDS); + + return (enum BLD_DEVICE)num_bld; +} + +static void hook_turn_off(void* parm) +{ + enum BLD_DEVICE num_bld = hook_parm_to_device(parm); + bld_set(num_bld, false); +} + +void bld_init(void) +{ + bld_hw_init(); +} + +void bld_beep(enum BLD_DEVICE device, uint16_t duration) +{ + // \todo This is not reentrant for the same device. FIXME! + struct Timer *t = &timers[device]; + timer_set_delay(t, duration); + timer_set_event_softint(t, hook_turn_off, t); + timer_add(t); + + bld_set(device, true); +} + +void bld_beep_and_wait(enum BLD_DEVICE device, uint16_t duration) +{ + bld_set(device, true); + timer_delay(duration); + bld_set(device, false); +} +#endif + diff --git a/2.5/bertos/drv/buzzerled.h b/2.5/bertos/drv/buzzerled.h new file mode 100644 index 00000000..4d174904 --- /dev/null +++ b/2.5/bertos/drv/buzzerled.h @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief Generic library to handle buzzers and leds + * + * \version $Id$ + * + * \author Giovanni Bajo + */ + +#ifndef DRV_BUZZERLED_H +#define DRV_BUZZERLED_H + +#include + +#if 0 +/** Include hw_buzzerled.h. We expect hw_buzzerled.h to define enum BLD_DEVICE, which must contain + * an enumarator for each device, plus a special symbol NUM_BLDS containing the + * number of devices. + */ +#include "hw/hw_buzzerled.h" + + +/* Include hw-level implementation. This allows inlining of bld_set, which in turns + * should allow fast constant propagation for the common case (where the parameter + * device is a constant). + */ +#include CPU_HEADER(buzzerled) + + +/** Initialize the buzzerled library. + * + * \note This function must be called before any other function in the library. + */ +void bld_init(void); + + +/** Set or reset a device. + * + * \param device Device to be set + * \param enable Enable/disable status + */ +#define bld_set(device, enable) bld_hw_set(device, enable) + + +/** Enable a device for a certain interval of time + * + * \param device Device to be enabled + * \param duration Number of milliseconds the device must be enabled + * + * \note This function is non-blocking, so it will return immediately. + */ +void bld_beep(enum BLD_DEVICE device, uint16_t duration); + + +/** Enable a device for a certain interval of time and wait. + * + * \param device Device to be enabled + * \param duration Number of milliseconds the device must be enabled + * + * \note This function is blocking, so it will return after the specified period of time. + */ +void bld_beep_and_wait(enum BLD_DEVICE device, uint16_t duration); + +#endif + +#endif /* DRV_BUZZERLED_H */ diff --git a/2.5/bertos/drv/dataflash.c b/2.5/bertos/drv/dataflash.c new file mode 100644 index 00000000..cf639e76 --- /dev/null +++ b/2.5/bertos/drv/dataflash.c @@ -0,0 +1,590 @@ +/** + * \file + * + * + * \brief Function library for dataflash AT45DB family (implementation). + * + * \version $Id$ + * \author Daniele Basile + * \author Francesco Sacchi + */ + +#include "dataflash.h" + +#include "cfg/cfg_dataflash.h" +#include +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DATAFLASH_LOG_LEVEL +#define LOG_FORMAT DATAFLASH_LOG_FORMAT +#include + +#include + +#include + +#include + +#include /* cpu_relax() */ + +#include + +/** + * Array used to describe dataflash memory devices currently supported. + */ +static const DataflashInfo mem_info[] = +{ + { + /* AT45DB041B */ + .density_id = 0x07, + .page_size = 264, + .page_bits = 9, + .page_cnt = 2048, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_B, + }, + { + /* AT45DB081D */ + .density_id = 0x09, + .page_size = 264, + .page_bits = 9, + .page_cnt = 4096, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_D, + }, + { + /* AT45DB161D */ + .density_id = 0x0B, + .page_size = 528, + .page_bits = 10, + .page_cnt = 4096, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_D, + }, + { + /* AT45DB642D */ + .density_id = 0x0F, + .page_size = 1056, + .page_bits = 11, + .page_cnt = 8192, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_D, + }, + /* Add other memories here */ +}; + +STATIC_ASSERT(countof(mem_info) == DFT_CNT); + +/** + * Macro that toggle CS of dataflash. + * \note This is equivalent to fd->setCS(false) immediately followed by fd->setCS(true). + */ +INLINE void CS_TOGGLE(DataFlash *fd) +{ + fd->setCS(false); + fd->setCS(true); +} + +/** + * Send a generic command to dataflash memory. + * This function send only 4 byte: opcode, page address and + * byte address. + */ +static void send_cmd(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode) +{ + + /* + * Make sure to toggle CS signal in order, + * and reset dataflash command decoder. + */ + CS_TOGGLE(fd); + + + /* + * To send one command to data flash memory, we send 4 byte. + * First byte is opcode command, second and third byte are + * page address, in last byte we write a byte page address. + * (see datasheet for more detail). + * + * \note Generally a default memory page size is more than 256 byte. + * In this case we need for addressing a byte in one page more than + * 8 bit, so we put in fourth byte low part of address byte, and + * hight part of address byte in third byte togheter low par of page + * address. + * + */ + + /* + * Send opcode. + */ + kfile_putc(opcode, fd->channel); + + /* + * Send page address. + */ + kfile_putc((uint8_t)(page_addr >> (16 - mem_info[fd->dev].page_bits)), fd->channel); + kfile_putc((uint8_t)((page_addr << (mem_info[fd->dev].page_bits - 8)) + (byte_addr >> 8)), fd->channel); + + /* + * Send byte page address. + */ + kfile_putc((uint8_t)byte_addr, fd->channel); +} + +/** + * Reset dataflash memory function. + * + * If \a fd->setReset function is not NULL, + * this function resets data flash memory + * with one pulse reset long about 10usec. + * + */ +static void dataflash_reset(DataFlash *fd) +{ + fd->setCS(false); + + if (fd->setReset) + { + fd->setReset(true); + timer_delayHp(us_to_hptime(RESET_PULSE_WIDTH)); + fd->setReset(false); + timer_delayHp(us_to_hptime(RESET_PULSE_WIDTH)); + } +} + + +/** + * Read status register of dataflah memory. + */ +static uint8_t dataflash_stat(DataFlash *fd) +{ + /* + * Make sure to toggle CS signal + * and reset dataflash command decoder. + */ + CS_TOGGLE(fd); + kfile_putc(DFO_READ_STATUS, fd->channel); + return kfile_getc(fd->channel); +} + + +/** + * Send one command to data flash memory, and + * return status register value. + * + */ +static uint8_t dataflash_cmd(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode) +{ + uint8_t stat; + + send_cmd(fd, page_addr, byte_addr, opcode); + + CS_TOGGLE(fd); + + /* + * We chech data flash memory state, and wait until busy-flag + * is high. + */ + while (!(dataflash_stat(fd) & BUSY_BIT)) + cpu_relax(); + + stat = dataflash_stat(fd); + + kfile_flush(fd->channel); // Flush channel + /* + * Data flash has completed a bus cycle, so disable CS. + */ + fd->setCS(false); + + return stat; +} + +/** + * Read \a len bytes from main data flash memory or buffer data + * flash memory, and put it in \a *block. + */ +static void dataflash_readBlock(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, uint8_t *block, dataflash_size_t len) +{ + DataFlashOpcode opcode = mem_info[fd->dev].read_cmd; + send_cmd(fd, page_addr, byte_addr, opcode); + + if (opcode == DFO_READ_FLASH_MEM_BYTE_B) + { + /* + * Send 24 don't care bits. + */ + uint8_t dummy[] = { 0, 0, 0 }; + kfile_write(fd->channel, dummy, sizeof(dummy)); + } + + kfile_putc(0, fd->channel); //Send 8 don't care bit. + kfile_read(fd->channel, block, len); //Read len bytes ad put in block buffer. + kfile_flush(fd->channel); // Flush channel + fd->setCS(false); +} + + +/** + * Write \a len bytes in dataflash memory buffer. + * + * \note Is not possible to write directly in dataflash main memory. + * To perform a write in main memory you must first write in dataflash buffer + * memory and then send a command to write the page in main memory. + */ +static void dataflash_writeBlock(DataFlash *fd, dataflash_offset_t offset, const uint8_t *block, dataflash_size_t len) +{ + ASSERT(offset + len <= mem_info[fd->dev].page_size); + + send_cmd(fd, 0x00, offset, DFO_WRITE_BUFF1); + + kfile_write(fd->channel, block, len); //Write len bytes. + kfile_flush(fd->channel); // Flush channel + + fd->setCS(false); +} + + +/** + * Load selected page from dataflash memory to buffer. + */ +static void dataflash_loadPage(DataFlash *fd, dataflash_page_t page_addr) +{ + dataflash_cmd(fd, page_addr, 0x00, DFO_MOV_MEM_TO_BUFF1); +} + +/* Battfs disk interface section */ + +static size_t dataflash_disk_page_read(struct BattFsSuper *d, pgcnt_t page, pgaddr_t addr, void *buf, size_t len) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_readBlock(fd, page, addr, buf, len); + return len; +} + +static bool dataflash_disk_page_load(struct BattFsSuper *d, pgcnt_t page) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_loadPage(fd, page); + return true; +} + +static size_t dataflash_disk_buffer_write(struct BattFsSuper *d, pgaddr_t addr, const void *buf, size_t len) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_writeBlock(fd, addr, buf, len); + return len; +} + +static size_t dataflash_disk_buffer_read(struct BattFsSuper *d, pgaddr_t addr, void *buf, size_t len) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + ASSERT(addr + len <= mem_info[fd->dev].page_size); + + CS_TOGGLE(fd); + + kfile_putc(DFO_READ_BUFF1, fd->channel); + + uint32_t byte_addr = addr; + + kfile_putc((byte_addr >> 16) & 0xff, fd->channel); + kfile_putc((byte_addr >> 8) & 0xff, fd->channel); + kfile_putc(byte_addr & 0xff, fd->channel); + + /* Send additional don't care byte to start read operation */ + kfile_putc(0, fd->channel); + + kfile_read(fd->channel, buf, len); //Read len bytes ad put in buffer. + kfile_flush(fd->channel); // Flush channel + fd->setCS(false); + return len; +} + +static bool dataflash_disk_page_save(struct BattFsSuper *d, pgcnt_t page) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_cmd(fd, page, 0x00, DFO_WRITE_BUFF1_TO_MEM); + return true; +} + +static bool dataflash_disk_page_erase(struct BattFsSuper *d, pgcnt_t page) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_cmd(fd, page, 0x00, DFO_ERASE_PAGE); + return true; +} + +static int dataflash_close(struct KFile *_fd); + +static bool dataflash_disk_close(struct BattFsSuper *d) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + return dataflash_close(&fd->fd) == 0; +} + +bool dataflash_diskInit(struct BattFsSuper *d, DataFlash *fd, pgcnt_t *page_array) +{ + ASSERT(d); + ASSERT(fd); + d->read = dataflash_disk_page_read; + d->load = dataflash_disk_page_load; + d->bufferWrite = dataflash_disk_buffer_write; + d->bufferRead = dataflash_disk_buffer_read; + d->save = dataflash_disk_page_save; + d->erase = dataflash_disk_page_erase; + d->close = dataflash_disk_close; + d->disk_ctx = fd; + d->page_size = mem_info[fd->dev].page_size; + d->page_count = mem_info[fd->dev].page_cnt; + ASSERT(page_array); + d->page_array = page_array; + return d->page_array && fd; +} + +/* Kfile interface section */ + +/** + * Flush select page (stored in buffer) in data flash main memory page. + */ +static int dataflash_flush(KFile *_fd) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + if (fd->page_dirty) + { + dataflash_cmd(fd, fd->current_page, 0x00, DFO_WRITE_BUFF1_TO_MEM_E); + + fd->page_dirty = false; + + LOG_INFO("Flushing page {%ld}\n", fd->current_page); + } + return 0; +} + + +/** + * Close file \a fd. + */ +static int dataflash_close(struct KFile *_fd) +{ + dataflash_flush(_fd); + LOG_INFO("Close.\n"); + return 0; +} + +/** + * Reopen dataflash file \a fd. + */ +static KFile *dataflash_reopen(KFile *_fd) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + dataflash_close(_fd); + + fd->current_page = 0; + fd->fd.seek_pos = 0; + + /* Load selected page from dataflash memory */ + dataflash_loadPage(fd, fd->current_page); + + LOG_INFO("Reopen.\n"); + return &fd->fd; +} + + +/** + * Read in \a buf \a size bytes from dataflash memmory. + * + * \note For reading data flash memory, we + * check flag page_dirty, if is true (that mean + * we have written a byte in buffer memory) we + * flush current page in main memory and + * then read from memory, else we read byte + * directly from data flash main memory. + * + * \return the number of bytes read. + */ +static size_t dataflash_read(struct KFile *_fd, void *buf, size_t size) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + + dataflash_offset_t byte_addr; + dataflash_page_t page_addr; + uint8_t *data = (uint8_t *)buf; + + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Reading at pos[%lu]\n", fd->fd.seek_pos); + + /* + * We select page and offest from absolute address. + */ + page_addr = fd->fd.seek_pos / mem_info[fd->dev].page_size; + byte_addr = fd->fd.seek_pos % mem_info[fd->dev].page_size; + + LOG_INFO("[page-{%ld}, byte-{%ld}]\n", page_addr, byte_addr); + + /* + * Flush current page in main memory if + * we had been written a byte in memory + */ + dataflash_flush(&fd->fd); + + /* + * Read byte in main page data flash memory. + */ + dataflash_readBlock(fd, page_addr, byte_addr, data, size); + + fd->fd.seek_pos += size; + LOG_INFO("Read %ld bytes\n", (long int)size); + + return size; +} + +/** + * Write \a _buf in dataflash memory + * + * \note For writing \a _buf in dataflash memory, we must + * first write in buffer data flash memory. At the end of write, + * we can put page in dataflash main memory. + * If we write in two contiguous pages, we put in main memory current + * page and then reload the page which we want to write. + * + * \return the number of bytes write. + */ +static size_t dataflash_write(struct KFile *_fd, const void *_buf, size_t size) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + + dataflash_offset_t offset; + dataflash_page_t new_page; + size_t total_write = 0; + + const uint8_t *data = (const uint8_t *) _buf; + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Writing at pos[%lu]\n", fd->fd.seek_pos); + + while (size) + { + /* + * We select page and offest from absolute address. + */ + new_page = fd->fd.seek_pos / mem_info[fd->dev].page_size; + offset = fd->fd.seek_pos % mem_info[fd->dev].page_size; + + + size_t wr_len = MIN((dataflash_size_t)size, mem_info[fd->dev].page_size - offset); + + LOG_INFO("[page-{%ld}, byte-{%ld}]\n",new_page, offset); + + if (new_page != fd->current_page) + { + /* Flush current page in main memory*/ + dataflash_flush(&fd->fd); + /* Load select page memory from data flash memory*/ + dataflash_loadPage(fd, new_page); + + fd->current_page = new_page; + LOG_INFO(" >> Load page: {%ld}\n", new_page); + } + /* + * Write byte in current page, and set true + * page_dirty flag. + */ + dataflash_writeBlock(fd, offset, data, wr_len); + fd->page_dirty = true; + + data += wr_len; + fd->fd.seek_pos += wr_len; + size -= wr_len; + total_write += wr_len; + } + + LOG_INFO("written %lu bytes\n", (long unsigned)total_write); + return total_write; +} + +MOD_DEFINE(dataflash); + +/** + * Dataflash init function. + * This function initialize \a fd with SPI channel \a ch and test if data flash memory + * density is the same specified by device \a dev. + * \a setCS is a callback used to set/reset CS line. + * \a setReset is a callback used to set/reset the dataflash (can be NULL if reset is unconnected) + * \return true if ok, false if memory density read from dataflash is not compliant with the + * configured one. + */ +bool dataflash_init(DataFlash *fd, KFile *ch, DataflashType dev, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset) +{ + uint8_t stat; + + MOD_CHECK(hw_dataflash); + + ASSERT(fd); + ASSERT(ch); + ASSERT(setCS); + ASSERT(dev < DFT_CNT); + + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_DATAFLASH); + fd->dev = dev; + fd->channel = ch; + fd->setReset = setReset; + fd->setCS = setCS; + + // Setup data flash programming functions. + fd->fd.reopen = dataflash_reopen; + fd->fd.close = dataflash_close; + fd->fd.read = dataflash_read; + fd->fd.write = dataflash_write; + fd->fd.seek = kfile_genericSeek; + fd->fd.flush = dataflash_flush; + + dataflash_reset(fd); + stat = dataflash_stat(fd); + + /* + * 2,3,4,5 bits of 1 byte status register + * indicate a device density of dataflash memory + * (see datasheet for more detail.) + */ + if (GET_ID_DESITY_DEVICE(stat) != mem_info[fd->dev].density_id) + return false; + + fd->current_page = 0; + fd->fd.seek_pos = 0; + fd->fd.size = mem_info[fd->dev].page_size * mem_info[fd->dev].page_cnt; + + /* Load selected page from dataflash memory */ + dataflash_loadPage(fd, fd->current_page); + MOD_INIT(dataflash); + return true; +} diff --git a/2.5/bertos/drv/dataflash.h b/2.5/bertos/drv/dataflash.h new file mode 100644 index 00000000..dd805ad2 --- /dev/null +++ b/2.5/bertos/drv/dataflash.h @@ -0,0 +1,206 @@ +/** + * \file + * + * + * \brief Function library for dataflash AT45DB family. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $WIZ$ module_name = "dataflash" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_dataflash.h" + * $WIZ$ module_hw = "bertos/hw/hw_dataflash.h", "bertos/hw/hw_dataflash.c" + */ + + +#ifndef DRV_DATAFLASH_H +#define DRV_DATAFLASH_H + +#include + +#include +#include + +/** + * Type definitions for dflash memory. + * \{ + */ +typedef uint32_t dataflash_page_t; +typedef uint32_t dataflash_offset_t; +typedef uint32_t dataflash_size_t; +/*\}*/ + +/** + * + */ +typedef void (dataflash_setReset_t)(bool); +typedef void (dataflash_setCS_t)(bool); + +/** + * Memory definitions. + * + * List of supported memory devices by this drive. + * Every time we call dataflash_init() we check device id to + * ensure we choose the right memory configuration. + * (see dataflash.c for more details). + */ +typedef enum DataflashType +{ + DFT_AT45DB041B = 0, + DFT_AT45DB081D, + DFT_AT45DB161D, + DFT_AT45DB642D, + DFT_CNT +} DataflashType; + + +/** + * Dataflash KFile context structure. + */ +typedef struct DataFlash +{ + KFile fd; ///< File descriptor. + KFile *channel; ///< Dataflash comm channel (usually SPI). + DataflashType dev; ///< Memory device type; + dataflash_page_t current_page; ///< Current loaded dataflash page. + bool page_dirty; ///< True if current_page is dirty (needs to be flushed). + dataflash_setReset_t *setReset; ///< Callback used to set reset pin of dataflash. + dataflash_setCS_t *setCS; ///< Callback used to set CS pin of dataflash. +} DataFlash; + +/** + * ID for dataflash. + */ +#define KFT_DATAFLASH MAKE_ID('D', 'F', 'L', 'H') + +/** + * Convert + ASSERT from generic KFile to DataFlash. + */ +INLINE DataFlash * DATAFLASH_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_DATAFLASH); + return (DataFlash *)fd; +} + +#define RESET_PULSE_WIDTH 10 ///< Width of reset pulse in usec. +#define BUSY_BIT 0x80 ///< Select a busy bit in status register. +#define CMP_BIT 0x40 ///< Select a compare bit in status register. + +/** + * Select bits 2-5 of status register. These + * bits indicate device density (see datasheet for + * more details). + */ +#define GET_ID_DESITY_DEVICE(reg_stat) (((reg_stat) & 0x3C) >> 2) + +/** + * Data flash opcode commands. + */ +typedef enum DataFlashOpcode { + /** + * Dataflash read commands. + * \{ + */ + DFO_READ_FLASH_MEM_BYTE_D = 0x0B, ///< Continuos array read for D type memories. + DFO_READ_FLASH_MEM_BYTE_B = 0xE8, ///< Continuos array read for B type memories. + + DFO_READ_FLASH_MEM = 0xD2, ///< Main memory page read. + DFO_READ_BUFF1 = 0xD4, ///< SRAM buffer 1 read. + DFO_READ_BUFF2 = 0xD6, ///< SRAM buffer 2 read. + /* \}*/ + + /** + * Program and erase commands data flash. + * \{ + */ + DFO_WRITE_BUFF1 = 0x84, ///< SRAM buffer 1 write. + DFO_WRITE_BUFF2 = 0x87, ///< SRAM buffer 2 write. + DFO_WRITE_BUFF1_TO_MEM_E = 0x83, ///< Buffer 1 to main memory page program with built-in erase. + DFO_WRITE_BUFF2_TO_MEM_E = 0x86, ///< Buffer 2 to main memory page program with built-in erase. + DFO_WRITE_BUFF1_TO_MEM = 0x88, ///< Buffer 1 to main memory page program without built-in erase. + DFO_WRITE_BUFF2_TO_MEM = 0x89, ///< Buffer 2 to main memory page program without built-in erase. + DFO_ERASE_PAGE = 0x81, ///< Erase page. + DFO_ERASE_BLOCK = 0x50, ///< Erase block. + DFO_ERASE_SECTOR = 0x7C, ///< Erase sector. + DFO_WRITE_MEM_TR_BUFF1 = 0x82, ///< Write main memory page through buffer 1. + DFO_WRITE_MEM_TR_BUFF2 = 0x85, ///< Write main memory page through buffer 2. + /* \}*/ + + /** + * Additional dataflash commands. + * \{ + */ + DFO_MOV_MEM_TO_BUFF1 = 0x53, ///< Transfer main mmemory to buffer 1. + DFO_MOV_MEM_TO_BUFF2 = 0x55, ///< Transfer main mmemory to buffer 2. + DFO_CMP_MEM_TO_BUFF1 = 0x60, ///< Compare main mmemory with buffer 1. + DFO_CMP_MEM_TO_BUFF2 = 0x61, ///< Compare main mmemory with buffer 2. + DFO_ARW_MEM_TR_BUFF1 = 0x58, ///< Auto page rewrite through buffer 1. + DFO_ARW_MEM_TR_BUFF2 = 0x59, ///< Auto page rewrite through buffer 2 + DFO_PWR_DOWN = 0xB9, ///< Deep power-down. + DFO_RESUME_PWR_DOWN = 0xAB, ///< Resume from deep power-down. + DFO_READ_STATUS = 0xD7, ///< Read status register. + DFO_ID_DEV = 0x9F ///< Read manufacturer and device ID. + /* \}*/ +} DataFlashOpcode; + + +/** + * Structure used to describe a dataflash memory. + */ +typedef struct DataflashInfo +{ + uint8_t density_id; ///< Density id, used to check memory type. + dataflash_size_t page_size; ///< Page size, in bytes. + uint8_t page_bits; ///< Number of bits needed to access a page. + uint16_t page_cnt; ///< Number of pages on memory. + DataFlashOpcode read_cmd; ///< Command to be used to perform a continuous array. +} DataflashInfo; + + +bool dataflash_init(DataFlash *fd, KFile *ch, DataflashType type, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset); +bool dataflash_diskInit(struct BattFsSuper *d, DataFlash *fd, pgcnt_t *page_array); + +/** + * To test data falsh drive you could use + * this functions. To use these functions make sure to include in your make file the + * drv/datafalsh_test.c source. + * + * (see drv/datafalsh_test.c for more detail) + */ +int dataflash_testSetup(void); +/* For backward compatibility */ +#define dataflash_testSetUp() dataflash_testSetup() +int dataflash_testRun(void); +int dataflash_testTearDown(void); + +#endif /* DRV_DATAFLASH_H */ diff --git a/2.5/bertos/drv/dataflash_hwtest.c b/2.5/bertos/drv/dataflash_hwtest.c new file mode 100644 index 00000000..fa5f480e --- /dev/null +++ b/2.5/bertos/drv/dataflash_hwtest.c @@ -0,0 +1,231 @@ +/** + * \file + * + * + * \brief DataFlash test. + * + * This module test the dataflash memory among the supported memory (see drv/dataflash.h + * for more detail). + * To test memory we fill one buffer with casual char, and write it in different + * part of memory. After every write we read the data that we have been write + * and compare this with test buffer, checking if write and read command work + * correclty. We also check if driver work properly when we make a write out the + * limit of memory size. + * + * Note: dataflash driver use a kfile interface, so for write/read test + * we use a kfile_test module that perform some generic test. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#include "hw/hw_dataflash.h" +#include "cfg/cfg_dataflash.h" +#include "cfg/cfg_proc.h" + +#include +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DATAFLASH_LOG_LEVEL +#define LOG_FORMAT DATAFLASH_LOG_FORMAT +#include // for logging system + +#include +#include +#include + +#include +#include + +#include + +/* + * Settings for dataflash test + * + * \{ + */ +// Datafalsh type memory to test (see drv/dataflash.h for supported memory types) +#define DATAFLASH_MEM_MODEL DFT_AT45DB642D + +// Function to set CS, this is typically implement in hw/hw_dataflash.{c, h} +#define DATAFLASH_FUNC_CS_SET dataflash_hw_setCS + +// Function to reset memery, this is typically implement in hw/hw_dataflash.{c, h} +#define DATAFLASH_FUNC_RESET NULL + +// Buffer len to test dataflash +#define DATAFLASH_TEST_STR_LEN 12307 + +// If you want use a rand function of standard library set to 1. +#define DATAFLASH_USE_RAND_FUNC 0 +/* \} */ + +/* + * Kfile structure to test a dataflash. + */ +static Serial spi_fd; +static DataFlash dflash_fd; + +/* + * Define tmp buffer to stora data for + * write and read flash memory test. + */ +static uint8_t test_buf[DATAFLASH_TEST_STR_LEN]; +static uint8_t save_buf[DATAFLASH_TEST_STR_LEN]; + +/** + * Setup all needed to test dataflash memory + * + */ +int dataflash_testSetup(void) +{ + kfile_testSetup(); + LOG_INFO("KFILE setup..ok\n"); + + LOG_INFO("Check if kernel is enable (if enable you should see the assert message.)\n"); + SILENT_ASSERT("bertos/drv/dataflash_test.c:119: Assertion failed: !CONFIG_KERN"); + ASSERT(!CONFIG_KERN); + + /* + * This test use a kfile_test module, + * so should include source in your makefile. + */ + MOD_CHECK(kfile_test); + + timer_init(); + LOG_INFO("Timer init..ok\n"); + + /* + * Init SPI module and dataflash driver. + */ + // Open SPI comunication channel + spimaster_init(&spi_fd, 0); + LOG_INFO("SPI0 init..ok\n"); + + ser_setbaudrate(&spi_fd, 5000000UL); + LOG_INFO("SPI0 set baudrate..ok\n"); + + //Init dataflash memory + dataflash_hw_init(); + LOG_INFO("DATAFLASH HW..ok\n"); + + if (dataflash_init(&dflash_fd, &spi_fd.fd, DATAFLASH_MEM_MODEL, DATAFLASH_FUNC_CS_SET, DATAFLASH_FUNC_RESET)) + LOG_INFO("DATAFLASH init..ok\n"); + else + LOG_ERR("DATAFLASH init..fail\n"); + + + //Fill tmp buffer with rand chars. + for (int i = 0; i < DATAFLASH_TEST_STR_LEN; i++) + { + #if DATAFLASH_USE_RAND_FUNC + #include //Rand() + + test_buf[i] = (uint8_t)rand(); + #else + test_buf[i] = (i & 0xff); + #endif + } + + LOG_INFO("Fill tmp buff..ok\n"); + + return 0; +} + + +/** + * Run dataflash test memory + * + */ +int dataflash_testRun(void) +{ + LOG_INFO("Run KFILE test.\n"); + + SILENT_ASSERT("bertos/drv/dataflash.c:405: Assertion failed: fd->fd.seek_pos + size <= fd->fd.size"); + if (kfile_testRunGeneric(&dflash_fd.fd, test_buf, save_buf, sizeof(test_buf)) != EOF) + { + LOG_INFO("KFILE test..ok\n"); + } + else + { + LOG_ERR("KFILE test..fail!\n"); + return EOF; + } + + return 0; +} + +/** + * End a dataflash Test. + * (Unused) + */ +int dataflash_testTearDown(void) +{ + /* */ + return 0; +} + +/* + * Empty main. + * + * Look it as exmple, or use it if + * you want test a data flash driver stand alone. + */ +#if 0 +int main(void) +{ + IRQ_ENABLE; + kdbg_init(); + + #if CONFIG_KERN + proc_init(); + #endif + + if (!dataflash_testSetup()) + { + LOG_INFO("DATAFLASH setup..ok\n"); + } + else + { + LOG_ERR("DATAFLASH setup..fail!\n"); + return EOF; + } + + dataflash_testRun(); + + for(;;) + { + } +} +#endif diff --git a/2.5/bertos/drv/dc_motor.c b/2.5/bertos/drv/dc_motor.c new file mode 100644 index 00000000..bd0dd0a4 --- /dev/null +++ b/2.5/bertos/drv/dc_motor.c @@ -0,0 +1,488 @@ +/** + * \file + * + * + * + * \brief DC motor driver (implementation) + * + * Thi module provide a simple api to controll a DC motor in direction and + * speed, to allow this we use a Back-EMF technique. + * This technique is based, on the capability of the DC motor to become a generator + * of voltage when we turn off its supply. This happen every time we turn off the + * DC motor supply, and it continues to rotate for a short time thanks to its mechanical + * energy. Using this idea we can turn off the motor for a very short time, and + * we read the volage value from DC motor supply pins. This voltage say to us + * the actual speed of the motor. + * + * \author Daniele Basile + */ + +#include "dc_motor.h" +#include "hw/hw_dc_motor.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DC_MOTOR_LOG_LEVEL +#define LOG_FORMAT DC_MOTOR_LOG_FORMAT + +#include +#include + +#include + +#include + +#include + +#include + +#include + +/** + * Define status bit for DC motor device. + */ +#define DC_MOTOR_ACTIVE BV(0) ///< DC motor enable or disable flag. +#define DC_MOTOR_DIR BV(1) ///< Spin direction of DC motor. + +/* + * Some utility macro for motor directions + */ +#define POS_DIR 1 +#define NEG_DIR 0 +#define DC_MOTOR_POS_DIR(x) ((x) |= DC_MOTOR_DIR) // Set directions status positive +#define DC_MOTOR_NEG_DIR(x) ((x) &= ~DC_MOTOR_DIR) // Set directions status negative + +// Update the status with current direction +#define DC_MOTOR_SET_STATUS_DIR(status, dir) \ + (dir == POS_DIR ? DC_MOTOR_POS_DIR(status) : DC_MOTOR_NEG_DIR(status)) + +#if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + #if CONFIG_DC_MOTOR_USE_SEM + #include + + Semaphore dc_motor_sem; + #define DC_MOTOR_LOCK sem_obtain(&dc_motor_sem) + #define DC_MOTOR_UNLOCK sem_release(&dc_motor_sem) + #else + #define DC_MOTOR_LOCK proc_forbid() + #define DC_MOTOR_UNLOCK proc_permit() + #endif +#else + #define DC_MOTOR_LOCK /* None */ + #define DC_MOTOR_UNLOCK /* None */ +#endif + +/** + * DC motor definition. + */ +static DCMotor dcm_all[CONFIG_NUM_DC_MOTOR]; + +/* + * Process to poll dc motor status + */ +struct Process *dc_motor; + + +// Stack process for DC motor poll. +static PROC_DEFINE_STACK(dc_motor_poll_stack, 500); + +// Only for Debug +LOG_INFOB(static int debug_msg_delay = 0;); + + +INLINE dc_speed_t dc_motor_readSpeed(int index) +{ + DCMotor *dcm = &dcm_all[index]; + return HW_DC_MOTOR_READ_VALUE(dcm->cfg->adc_ch, dcm->cfg->adc_min, dcm->cfg->adc_max); +} + +/** + * Read the target speed from select device. + */ +dc_speed_t dc_motor_readTargetSpeed(int index) +{ + DCMotor *dcm = &dcm_all[index]; + return HW_DC_MOTOR_READ_VALUE(dcm->cfg->speed_dev_id, CONFIG_DC_MOTOR_MIN_SPEED, CONFIG_DC_MOTOR_MAX_SPEED); +} + +static void dc_motor_start(int index) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + /* + * Clean all PID stutus variable, becouse + * we start with new one. + */ + pid_control_reset(&dcm->pid_ctx); + dcm->status |= DC_MOTOR_ACTIVE; + DC_MOTOR_UNLOCK; +} + +/* + * There are two \a mode to stop the dc motor: + * - DC_MOTOR_DISABLE_MODE + * - DC_MOTOR_IDLE + * + * The DC_MOTOR_DISABLE_MODE shut down the DC motor and + * leave it floating to rotate. + * The DC_MOTOR_IDLE does not shut down DC motor, but put + * its supply pin in short circuite, in this way the motor result + * braked from intentional rotation. + */ +static void dc_motor_stop(int index) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + + dcm->status &= ~DC_MOTOR_ACTIVE; + dcm->expire_time = DC_MOTOR_NO_EXPIRE; + pwm_enable(dcm->cfg->pwm_dev, false); + + if (dcm->cfg->braked) + { + DC_MOTOR_STOP_BRAKED(dcm->index); + } + else + { + DC_MOTOR_STOP_FLOAT(dcm->index); + } + + DC_MOTOR_UNLOCK; +} + +/* + * Sampling a signal on DC motor and compute + * a new value of speed according with PID control. + */ +static void dc_motor_do(int index) +{ + DCMotor *dcm = &dcm_all[index]; + + dc_speed_t curr_pos = 0; + pwm_duty_t new_pid = 0; + + DC_MOTOR_LOCK; + + //If select DC motor is not active we return + if (!(dcm->status & DC_MOTOR_ACTIVE)) + { + DC_MOTOR_UNLOCK; + return; + } + + /* + * To set dc motor direction we must also set the + * PWM polarity according with dc motor driver chip + */ + pwm_setPolarity(dcm->cfg->pwm_dev, dcm->status & DC_MOTOR_DIR); + DC_MOTOR_SET_DIR(dcm->index, dcm->status & DC_MOTOR_DIR); + + //Compute next value for reaching target speed from current position + if (dcm->cfg->pid_enable) + { + /* + * Here we cannot disable the switch context because the + * driver, that read the speed could be need to use signal or + * other thing that needs the kernel switch context, for this + * reason we unlock before to read the speed. + */ + DC_MOTOR_UNLOCK; + curr_pos = dc_motor_readSpeed(index); + DC_MOTOR_LOCK; + new_pid = pid_control_update(&dcm->pid_ctx, dcm->tgt_speed, curr_pos); + } + else + { + new_pid = dcm->tgt_speed; + } + + LOG_INFOB( + if (debug_msg_delay == 20) + { + LOG_INFO("DC Motor[%d]: curr_speed[%d],curr_pos[%d],tgt[%d]\n", dcm->index, + curr_pos, new_pid, dcm->tgt_speed); + debug_msg_delay = 0; + } + debug_msg_delay++; + ); + + //Apply the compute duty value + pwm_setDuty(dcm->cfg->pwm_dev, new_pid); + + //Restart dc motor + pwm_enable(dcm->cfg->pwm_dev, true); + + DC_MOTOR_ENABLE(dcm->index); + DC_MOTOR_UNLOCK; +} + + +/* + * Check if the DC motor run time is expired, if this happend + * we turn off motor and reset status. + */ +INLINE bool check_timerIsExpired(int index) +{ + + DC_MOTOR_LOCK; + bool check = ((dcm_all[index].expire_time - timer_clock()) < 0) && + (dcm_all[index].expire_time != DC_MOTOR_NO_EXPIRE); + DC_MOTOR_UNLOCK; + + return check; +} + +/** + * Process to poll DC motor status. + * To use a Back-EMF technique (see brief for more details), + * we turn off a motor for CONFIG_DC_MOTOR_SAMPLE_DELAY, that value are stored + * in each DC motor config. For this implementation we assume + * that have a common CONFIG_DC_MOTOR_SAMPLE_DELAY, choose among a max delay + * to all DC motor configuration. + * The DC motor off time is choose to allow the out signal to + * be stable, so we can read and process this value for feedback controll loop. + * The period (CONFIG_DC_MOTOR_SAMPLE_PERIOD - CONFIG_DC_MOTOR_SAMPLE_DELAY) + * that every time we turn off a DC motor is choose to have a feedback controll + * more responsive or less responsive. + */ +static void NORETURN dc_motor_poll(void) +{ + for (;;) + { + /* + * For all DC motor we read and process output singal, + * and choose the max value to off time + */ + for (int i = 0; i < CONFIG_NUM_DC_MOTOR; i++) + { + if (!dcm_all[i].cfg) + continue; + + if (check_timerIsExpired(i)) + dc_motor_stop(i); + else + dc_motor_do(i); + + /* + * If we read speed from trimmer we update the target + * speed value when motor is running so we can make + * dc motor speed regulation. + */ + if (dcm_all[i].cfg->speed_dev_id != DC_MOTOR_NO_DEV_SPEED) + dc_motor_setSpeed(i, dc_motor_readTargetSpeed(i)); + } + + //Wait for next sampling + timer_delay(CONFIG_DC_MOTOR_SAMPLE_PERIOD - CONFIG_DC_MOTOR_SAMPLE_DELAY); + + for (int i = 0; i < CONFIG_NUM_DC_MOTOR; i++) + { + if (!dcm_all[i].cfg) + continue; + + if (check_timerIsExpired(i)) + dc_motor_stop(i); + + DC_MOTOR_LOCK; + if (dcm_all[i].status & DC_MOTOR_ACTIVE) + { + DC_MOTOR_DISABLE(dcm_all[i].index); + pwm_enable(dcm_all[i].cfg->pwm_dev, false); + } + DC_MOTOR_UNLOCK; + } + + //Wait some time to allow signal to stabilize before sampling + timer_delay(CONFIG_DC_MOTOR_SAMPLE_DELAY); + } +} + +/** + * Set spin direction of DC motor. + * + * \a index number of DC motor + * \a dir direction of DC motor + */ +void dc_motor_setDir(int index, bool dir) +{ + DCMotor *dcm = &dcm_all[index]; + DC_MOTOR_LOCK; + DC_MOTOR_SET_STATUS_DIR(dcm->status, dir); + DC_MOTOR_UNLOCK; +} + +/** + * Set DC motor speed. + */ +void dc_motor_setSpeed(int index, dc_speed_t speed) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + dcm->tgt_speed = speed; + DC_MOTOR_UNLOCK; + + LOG_INFO("DC Motor[%d]: tgt_speed[%d]\n", index, dcm->tgt_speed); +} + +/** + * Set among of time that dc motor should run. + */ +void dc_motor_startTimer(int index, mtime_t on_time) +{ + DC_MOTOR_LOCK; + dcm_all[index].expire_time = DC_MOTOR_NO_EXPIRE; + if (on_time != DC_MOTOR_NO_EXPIRE) + { + dcm_all[index].expire_time = timer_clock() + ms_to_ticks(on_time); + dc_motor_start(index); + } + DC_MOTOR_UNLOCK; +} + +void dc_motor_waitStop(int index) +{ + DCMotor *dcm = &dcm_all[index]; + bool loop = true; + + while (loop) + { + DC_MOTOR_LOCK; + loop = dcm->status & DC_MOTOR_ACTIVE; + DC_MOTOR_UNLOCK; + + cpu_relax(); + } +} + +/** + * Enable or disable dc motor. + */ +void dc_motor_enable(int index, bool state) +{ + if (state) + dc_motor_start(index); + else + dc_motor_stop(index); +} + +/** + * Apply a confinguration to select DC motor. + */ +void dc_motor_setup(int index, DCMotorConfig *dcm_conf) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + /* + * We are using the same sample period for each + * motor, and so we check if this value is the same + * for all. The sample period time is defined in pid + * configuration. + * + * TODO: Use a different sample period for each motor + * and refactor a module to allow to use a timer interrupt, + * in this way we can controll a DC motor also without a + * kernel, increasing a portability on other target. + */ + pid_control_setPeriod(&dcm_conf->pid_cfg, CONFIG_DC_MOTOR_SAMPLE_PERIOD); + + //Init pid control + pid_control_init(&dcm->pid_ctx, &dcm_conf->pid_cfg); + + + dcm->cfg = dcm_conf; + + /* + * Apply config value. + */ + dcm->index = index; + + /* + * By default the motor run forever.. + */ + dcm->expire_time = DC_MOTOR_NO_EXPIRE; + + /* + * By default set target speed. + */ + dcm->tgt_speed = dcm_conf->speed; + + /* + * Clear the status. + */ + dcm->status = 0; + + pwm_setFrequency(dcm->cfg->pwm_dev, dcm->cfg->freq); + pwm_enable(dcm->cfg->pwm_dev, false); + + //Set default direction for DC motor + DC_MOTOR_SET_DIR(dcm->index, dcm->cfg->dir); + DC_MOTOR_SET_STATUS_DIR(dcm->status, dcm->cfg->dir); + + DC_MOTOR_UNLOCK; + + LOG_INFO("DC motor[%d]:\n", dcm->index); + LOG_INFO("> PID: kp[%f],ki[%f],kd[%f]\n", dcm->cfg->pid_cfg.kp, dcm->cfg->pid_cfg.ki, dcm->cfg->pid_cfg.kd); + LOG_INFO("> PWM: pwm_dev[%d], freq[%ld], sample[%d]\n", dcm->cfg->pwm_dev, dcm->cfg->freq,CONFIG_DC_MOTOR_SAMPLE_DELAY); + LOG_INFO("> ADC: adc_ch[%d], adc_max[%d], adc_min[%d]\n", dcm->cfg->adc_ch, dcm->cfg->adc_max, dcm->cfg->adc_min); + LOG_INFO("> DC: dir[%d], speed[%d]\n", dcm->cfg->dir, dcm->cfg->speed); +} + +/** + * If we had enabled the priority scheduling, we can adjust the + * DC motor poll process priority. + */ +void dc_motor_setPriority(int priority) +{ + ASSERT(CONFIG_KERN); + ASSERT(dc_motor); + proc_setPri(dc_motor, priority); +} + +/** + * Init DC motor. + * \a priority: sets the dc motor process priority. + */ +void dc_motor_init(void) +{ + ASSERT(CONFIG_KERN); + + MOTOR_DC_INIT(); + + #if (CONFIG_KERN_PREEMPT && CONFIG_DC_MOTOR_USE_SEM) + sem_init(&dc_motor_sem); + #endif + + //Create a dc motor poll process + dc_motor = proc_new_with_name("DC_Motor", dc_motor_poll, NULL, sizeof(dc_motor_poll_stack), dc_motor_poll_stack); +} + diff --git a/2.5/bertos/drv/dc_motor.h b/2.5/bertos/drv/dc_motor.h new file mode 100644 index 00000000..94942075 --- /dev/null +++ b/2.5/bertos/drv/dc_motor.h @@ -0,0 +1,126 @@ +/** + * \file + * + * + * + * \brief DC motor driver. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "dc_motor" + * $WIZ$ module_depends = "pwm", "pid_control", "adc", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_dc_motor.h" + * $WIZ$ module_hw = "bertos/hw/hw_dc_motor.h" + */ + +#ifndef DRV_DC_MOTOR_H +#define DRV_DC_MOTOR_H + +#include "hw/hw_dc_motor.h" + +#include "cfg/cfg_dc_motor.h" +#include + +#include + +#include +#include +#include + +#define DC_MOTOR_NO_EXPIRE -1 ///< The DC motor runs do not expire, so it runs forever. +#define DC_MOTOR_NO_DEV_SPEED -1 ///< Disable the speed acquire from device (like trimmer, etc.). + +/** + * Type for DC motor. + */ +typedef uint16_t dc_speed_t; + +/** + * DC motor configuration stucture + */ +typedef struct DCMotorConfig +{ + PidCfg pid_cfg; ///< Pid control. + bool pid_enable; ///< Flag to disable or enable pid control. + + PwmDev pwm_dev; ///< Pwm channel. + pwm_freq_t freq; ///< Pwm waveform frequency. + + adc_ch_t adc_ch; ///< ADC channel. + adcread_t adc_max; ///< ADC max scale value. + adcread_t adc_min; ///< ADC min scale value. + + bool dir; ///< Default direction for select DC motor. + bool braked; ///< If true the motor is braked when we turn off it. + + dc_speed_t speed; ///< Default speed value for select DC motor. + + int speed_dev_id; ///< Index of the device where read speed, to disable set to DC_MOTOR_NO_DEV_SPEED. + +} DCMotorConfig; + + +/** + * Context structure for DC motor. + */ +typedef struct DCMotor +{ + const DCMotorConfig *cfg; ///< All configuration for select DC motor. + PidContext pid_ctx; ///< Pid control. + + int index; ///< DC motor id. + uint32_t status; ///< Status of select DC motor + dc_speed_t tgt_speed; ///< Target speed for select DC motor + + ticks_t expire_time; ///< Amount of time that dc motor run + +} DCMotor; + +void dc_motor_setDir(int index, bool dir); +void dc_motor_enable(int index, bool state); +void dc_motor_setSpeed(int index, dc_speed_t speed); +void dc_motor_startTimer(int index, mtime_t on_time); +void dc_motor_waitStop(int index); +void dc_motor_setup(int index, DCMotorConfig *dcm_conf); +dc_speed_t dc_motor_readTargetSpeed(int index); +void dc_motor_setPriority(int priority); +void dc_motor_init(void); + + +/** + * Test function prototypes. + * + * See dc_motor_hwtest.c file. + */ +int dc_motor_testSetUp(void); +void dc_motor_testRun(void); +int dc_motor_testTearDown(void); + +#endif /* DRV_DC_MOTOR_H */ diff --git a/2.5/bertos/drv/dc_motor_hwtest.c b/2.5/bertos/drv/dc_motor_hwtest.c new file mode 100644 index 00000000..477d35aa --- /dev/null +++ b/2.5/bertos/drv/dc_motor_hwtest.c @@ -0,0 +1,178 @@ +/** + * \file + * + * + * + * \brief Test for PWM driver (implementation) + * + * This is a simple test for PWM driver. This module + * is target independent, so you can test all target that + * BeRTOS support. + * To use this test you should include a pwm_map.h header where + * are defined the PWM channels for your target. Then you should add + * or remove a test setting in pwm_test_cfg array, and edit a value for + * your specific test. + * Afther this, all is ready and you can test PWM driver. + * + * The test check first if all PWM channel starts, and then try + * to change a PWM duty cicle for all channel. + * The change of duty cycle is operate when a PWM channel is enable, + * in this way you can see if a pwm signal is clean and work properly. + * The duty value is change incrementaly, and when it arrive to 100% or 0%, + * we reset the duty value and restart the test. + * Further the duty test, we check also a PWM polarity, infact when we + * reach a reset duty value, we invert a polary of PWM wavform. + * So you can see if the hardware manage correctly this situation. + * + * Note: To be simple and target independently we not use a timer module, + * and so the delay is do with a for cycle. + * + * \author Daniele Basile + * + * \brief HW test for DC Motor. + */ + +#include + +#include +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DC_MOTOR_LOG_LEVEL +#define LOG_VERBOSITY DC_MOTOR_LOG_FORMAT +#include + + +#include + +#include +#include +#include +#include +#include + +#include + +#include + +#include +#include + +static DCMotorConfig motor = +{ + /* PID */ + { + .kp = 1, /* Proportional coefficient */ + .ki = 4, /* Integral coefficient */ + .kd = 0.008, /* Derivate coefficient */ + .i_max = 2E33, /* Integrale max error value */ + .i_min = -2E33, /* Integrale min error value */ + .out_max = 65535, /* Max output value */ + .out_min = 0, /* Min output value */ + .sample_period = 0 /* Millisecod between 2 output singal sampling */ + }, + .pid_enable = true, /* Enable or disable pid control */ + + /* PWM */ + .pwm_dev = 2, /* PWM channel */ + .freq = 3000, /* Frquency of PWM output waveform */ + + /* ADC */ + .adc_ch = 2, /* ADC channel */ + .adc_max = 65535, /* Max range value for ADC */ + .adc_min = 0, /* Min range value for ADC */ + + /* DC Motor */ + .dir = 1, /* Default spin direction of DC motor */ + .braked = true, + + .speed = 10000, /* Fixed speed value for seldc_motor_enableect DC motor, if enable_dev_speed flag is false */ + .speed_dev_id = 7, /* Index of the device where read speed */ +}; + +int dc_motor_testSetUp(void) +{ + IRQ_ENABLE; + kdbg_init(); + timer_init(); + proc_init(); + pwm_init(); + adc_init(); + + return 0; +} + +#define MOTOR 2 + +void NORETURN dc_motor_testRun(void) +{ + dc_motor_init(); + + /* + * Assign the configuration to motor. + */ + dc_motor_setup(MOTOR, &motor); + + while (1) + { + /* + * Using enable and disable + */ + dc_motor_setDir(MOTOR, 1); + dc_motor_setSpeed(MOTOR, 10000); + dc_motor_enable(MOTOR, true); + timer_delay(500); + dc_motor_enable(MOTOR, false); + + + dc_motor_setDir(MOTOR, 0); + dc_motor_setSpeed(MOTOR, 60000); + dc_motor_enable(MOTOR, true); + timer_delay(150); + dc_motor_enable(MOTOR, false); + + /* + * Using timer + */ + dc_motor_setDir(MOTOR, 1); + dc_motor_setSpeed(MOTOR, 60000); + dc_motor_startTimer(MOTOR, 150); + dc_motor_waitStop(MOTOR); + + dc_motor_setDir(MOTOR, 0); + dc_motor_setSpeed(MOTOR, 10000); + dc_motor_startTimer(MOTOR, 500); + dc_motor_waitStop(MOTOR); + } + +} + +int dc_motor_testTearDown(void) +{ + return 0; +} diff --git a/2.5/bertos/drv/eeprom.c b/2.5/bertos/drv/eeprom.c new file mode 100644 index 00000000..470d85cd --- /dev/null +++ b/2.5/bertos/drv/eeprom.c @@ -0,0 +1,399 @@ +/** + * \file + * + * + * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation) + * + * \author Stefano Fedrigo + * \author Bernie Innocenti + */ + +#include "eeprom.h" + +#include // MIN() +#include +#include // MOD_CHECK() + +#include +#include + +#include + +#include // cpu_to_be16() + +#include // memset() + +/** + * EEPROM ID code + */ +#define EEPROM_ID 0xA0 + +/** + * This macros form the correct slave address for EEPROMs + */ +#define EEPROM_ADDR(x) (EEPROM_ID | (((uint8_t)((x) & 0x07)) << 1)) + + +/** + * Array used to describe EEPROM memory devices currently supported. + */ +static const EepromInfo mem_info[] = +{ + { + /* 24XX08 */ + .has_dev_addr = false, + .blk_size = 0x10, + .e2_size = 0x400, + }, + { + /* 24XX16 */ + .has_dev_addr = false, + .blk_size = 0x10, + .e2_size = 0x800, + }, + { + /* 24XX256 */ + .has_dev_addr = true, + .blk_size = 0x40, + .e2_size = 0x8000, + }, + { + /* 24XX512 */ + .has_dev_addr = true, + .blk_size = 0x80, + .e2_size = 0x10000, + }, + { + /* 24XX1024 */ + .has_dev_addr = true, + .blk_size = 0x100, + .e2_size = 0x20000, + }, + + /* Add other memories here */ +}; + +STATIC_ASSERT(countof(mem_info) == EEPROM_CNT); + + +/** + * Copy \a size bytes from buffer \a buf to + * eeprom. + */ +static size_t eeprom_writeRaw(struct KFile *_fd, const void *buf, size_t size) +{ + Eeprom *fd = EEPROM_CAST(_fd); + e2dev_addr_t dev_addr; + uint8_t addr_buf[2]; + uint8_t addr_len; + size_t wr_len = 0; + + e2blk_size_t blk_size = mem_info[fd->type].blk_size; + + STATIC_ASSERT(countof(addr_buf) <= sizeof(e2addr_t)); + + /* clamp size to memory limit (otherwise may roll back) */ + ASSERT(_fd->seek_pos + (kfile_off_t)size <= (kfile_off_t)_fd->size); + size = MIN((kfile_off_t)size, _fd->size - _fd->seek_pos); + + if (mem_info[fd->type].has_dev_addr) + { + dev_addr = fd->addr; + addr_len = 2; + } + else + { + dev_addr = (e2dev_addr_t)((fd->fd.seek_pos >> 8) & 0x07); + addr_len = 1; + } + + while (size) + { + /* + * Split write in multiple sequential mode operations that + * don't cross page boundaries. + */ + size_t count = MIN(size, (size_t)(blk_size - (fd->fd.seek_pos & (blk_size - 1)))); + + if (mem_info[fd->type].has_dev_addr) + { + addr_buf[0] = (fd->fd.seek_pos >> 8) & 0xFF; + addr_buf[1] = (fd->fd.seek_pos & 0xFF); + } + else + { + dev_addr = (e2dev_addr_t)((fd->fd.seek_pos >> 8) & 0x07); + addr_buf[0] = (fd->fd.seek_pos & 0xFF); + } + + + if (!(i2c_start_w(EEPROM_ADDR(dev_addr)) + && i2c_send(addr_buf, addr_len) + && i2c_send(buf, count))) + { + i2c_stop(); + return wr_len; + } + + i2c_stop(); + + /* Update count and addr for next operation */ + size -= count; + fd->fd.seek_pos += count; + buf = ((const char *)buf) + count; + wr_len += count; + } + + return wr_len; +} + +/** + * Copy \a size bytes from buffer \a _buf to + * eeprom. + * \note Writes are verified and if buffer content + * is not matching we retry 5 times max. + */ +static size_t eeprom_writeVerify(struct KFile *_fd, const void *_buf, size_t size) +{ + Eeprom *fd = EEPROM_CAST(_fd); + int retries = 5; + size_t wr_len = 0; + + while (retries--) + { + wr_len = eeprom_writeRaw(_fd, _buf, size); + /* rewind to verify what we have just written */ + kfile_seek(_fd, -(kfile_off_t)wr_len, KSM_SEEK_CUR); + if (wr_len == size + && eeprom_verify(fd, _buf, wr_len)) + { + /* Forward to go after what we have written*/ + kfile_seek(_fd, wr_len, KSM_SEEK_CUR); + return wr_len; + } + } + return wr_len; +} + + +/** + * Copy \a size bytes + * from eeprom to RAM to buffer \a _buf. + * + * \return the number of bytes read. + */ +static size_t eeprom_read(struct KFile *_fd, void *_buf, size_t size) +{ + Eeprom *fd = EEPROM_CAST(_fd); + uint8_t addr_buf[2]; + uint8_t addr_len; + size_t rd_len = 0; + uint8_t *buf = (uint8_t *)_buf; + + STATIC_ASSERT(countof(addr_buf) <= sizeof(e2addr_t)); + + /* clamp size to memory limit (otherwise may roll back) */ + ASSERT(_fd->seek_pos + (kfile_off_t)size <= (kfile_off_t)_fd->size); + size = MIN((kfile_off_t)size, _fd->size - _fd->seek_pos); + + e2dev_addr_t dev_addr; + if (mem_info[fd->type].has_dev_addr) + { + dev_addr = fd->addr; + addr_len = 2; + addr_buf[0] = (fd->fd.seek_pos >> 8) & 0xFF; + addr_buf[1] = (fd->fd.seek_pos & 0xFF); + } + else + { + dev_addr = (e2dev_addr_t)((fd->fd.seek_pos >> 8) & 0x07); + addr_len = 1; + addr_buf[0] = (fd->fd.seek_pos & 0xFF); + } + + + if (!(i2c_start_w(EEPROM_ADDR(dev_addr)) + && i2c_send(addr_buf, addr_len) + && i2c_start_r(EEPROM_ADDR(dev_addr)))) + { + i2c_stop(); + return 0; + } + + while (size--) + { + /* + * The last byte read does not have an ACK + * to stop communication. + */ + int c = i2c_get(size); + + if (c == EOF) + break; + + *buf++ = c; + fd->fd.seek_pos++; + rd_len++; + } + + i2c_stop(); + return rd_len; +} + +/** + * Check that the contents of an EEPROM range + * match with a provided data buffer. + * + * \return true on success. + * \note Seek position of \a fd will not change. + */ +bool eeprom_verify(Eeprom *fd, const void *buf, size_t count) +{ + uint8_t verify_buf[16]; + bool result = true; + + /* Save seek position */ + kfile_off_t prev_seek = fd->fd.seek_pos; + + while (count && result) + { + /* Split read in smaller pieces */ + size_t size = MIN(count, sizeof verify_buf); + + /* Read back buffer */ + if (eeprom_read(&fd->fd, verify_buf, size)) + { + if (memcmp(buf, verify_buf, size) != 0) + { + TRACEMSG("Data mismatch!"); + result = false; + } + } + else + { + TRACEMSG("Read error!"); + result = false; + } + + /* Update count and addr for next operation */ + count -= size; + buf = ((const char *)buf) + size; + } + + /* Restore previous seek position */ + fd->fd.seek_pos = prev_seek; + return result; +} + +/** + * Erase specified part of eeprom, writing 0xFF. + * + * \a addr starting address + * \a count length of block to erase + * \note Seek position is unchanged. + * \return true if ok, false otherwise. + */ +bool eeprom_erase(Eeprom *fd, e2addr_t addr, e2_size_t count) +{ + e2blk_size_t blk_size = mem_info[fd->type].blk_size; + uint8_t buf[blk_size]; + kfile_off_t prev_off = fd->fd.seek_pos; + bool res = true; + size_t size; + + memset(buf, 0xFF, blk_size); + + + kfile_seek(&fd->fd, addr, KSM_SEEK_SET); + + /* + * Optimization: this first write id used to realign + * current address to block boundaries. + */ + + wdt_reset(); + size = MIN(count, (e2_size_t)(blk_size - (addr & (blk_size - 1)))); + if (kfile_write(&fd->fd, buf, size) != size) + { + fd->fd.seek_pos = prev_off; + return false; + } + count -= size; + + /* Clear all */ + while (count) + { + /* Long operation, reset watchdog */ + wdt_reset(); + + size = MIN(count, (e2_size_t)sizeof buf); + if (kfile_write(&fd->fd, buf, size) != size) + { + res = false; + break; + } + + count -= size; + } + fd->fd.seek_pos = prev_off; + return res; +} + + +/** + * Initialize EEPROM module. + * \a fd is the Kfile context. + * \a type is the eeprom device we want to initialize (\see EepromType) + * \a addr is the i2c devide address (usually pins A0, A1, A2). + * \a verify is true if you want that every write operation will be verified. + */ +void eeprom_init(Eeprom *fd, EepromType type, e2dev_addr_t addr, bool verify) +{ + MOD_CHECK(i2c); + ASSERT(type < EEPROM_CNT); + + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_EEPROM); + + fd->type = type; + fd->addr = addr; + fd->fd.size = mem_info[fd->type].e2_size; + + // Setup eeprom programming functions. + fd->fd.read = eeprom_read; + if (verify) + fd->fd.write = eeprom_writeVerify; + else + fd->fd.write = eeprom_writeRaw; + fd->fd.close = kfile_genericClose; + + fd->fd.seek = kfile_genericSeek; +} diff --git a/2.5/bertos/drv/eeprom.h b/2.5/bertos/drv/eeprom.h new file mode 100644 index 00000000..995919ae --- /dev/null +++ b/2.5/bertos/drv/eeprom.h @@ -0,0 +1,134 @@ +/** + * \file + * + * + * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS. + * + * \author Stefano Fedrigo + * \author Bernie Innocenti + * + * $WIZ$ module_name = "eeprom" + * $WIZ$ module_depends = "kfile", "i2c" + */ + +#ifndef DRV_EEPROM_H +#define DRV_EEPROM_H + +#include + +#include + + +/** + * Values for Eeprom types. + */ +typedef enum EepromType +{ + EEPROM_24XX08, + EEPROM_24XX16, + EEPROM_24XX256, + EEPROM_24XX512, + EEPROM_24XX1024, + EEPROM_CNT, +} EepromType; + +/** + * On the same I2C bus can live more than one EEPROM + * device. Each device can be addressed by one or more + * pins. + */ +typedef uint8_t e2dev_addr_t; + +/** + * Describe an EEPROM context, used by the driver to + * access the single device. + */ +typedef struct Eeprom +{ + KFile fd; ///< File descriptor. + EepromType type; ///< EEPROM type + e2dev_addr_t addr; ///< Device address. +} Eeprom; + +/** + * ID for eeproms. + */ +#define KFT_EEPROM MAKE_ID('E', 'E', 'P', 'R') + +/** + * Convert + ASSERT from generic KFile to Eeprom. + */ +INLINE Eeprom * EEPROM_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_EEPROM); + return (Eeprom *)fd; +} + +/// Type for EEPROM addresses +typedef uint16_t e2addr_t; + +/** + * Macro for E2Layout offset calculation + * + * \note We can't just use offsetof() here because we could use + * non-constant expressions to access array elements. + * + * \note 'type' is the structure type holding eeprom layout + * and must be defined in user files. + */ +#define e2addr(type, field) ((e2addr_t)&(((type *)0)->field)) + +/** + * Type for EEPROM block size. + */ +typedef uint16_t e2blk_size_t; + +/** + * Type for accessing EEPROM whole size. + */ +typedef uint32_t e2_size_t; + +/** + * Descrive all EEPROM informations + * needed by the driver. + */ +typedef struct EepromInfo +{ + bool has_dev_addr; ///< true if memory is device addressable (its A0, A1, A2 pin are used by memory). + e2blk_size_t blk_size; ///< block size + e2_size_t e2_size; ///< eeprom size +} EepromInfo; + +bool eeprom_erase(Eeprom *fd, e2addr_t addr, e2_size_t count); +bool eeprom_verify(Eeprom *fd, const void *buf, size_t count); +void eeprom_init(Eeprom *fd, EepromType, e2dev_addr_t, bool verify); + +#endif /* DRV_EEPROM_H */ diff --git a/2.5/bertos/drv/flash.h b/2.5/bertos/drv/flash.h new file mode 100644 index 00000000..eda1e985 --- /dev/null +++ b/2.5/bertos/drv/flash.h @@ -0,0 +1,109 @@ +/** +* \file +* +* +* +* \brief Embedded flash for cpu. +* +* \author Francesco Sacchi +* \author Daniele Basile +* +* $WIZ$ module_name = "flash" +* $WIZ$ module_depends = "kfile" +*/ + +#ifndef DRV_FLASH_H +#define DRV_FLASH_H + +#include +#include + + +#include CPU_HEADER(flash) + +/** +* EmbFlash KFile context structure. +*/ +typedef struct Flash +{ + /** + * File descriptor. + */ + KFile fd; + + /** + * Flag for checking if current page is modified. + */ + bool page_dirty; + + /** + * Current buffered page. + */ + page_t curr_page; + + /** + * Temporary buffer cointaing data block to + * write on flash. + */ + uint8_t page_buf[FLASH_PAGE_SIZE]; +} Flash; + +/** +* ID for FLASH +*/ +#define KFT_FLASH MAKE_ID('F', 'L', 'A', 'S') + +/** +* Convert + ASSERT from generic KFile to Flash. +*/ +INLINE Flash * FLASH_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FLASH); + return (Flash *)fd; +} + + +MOD_DEFINE(flash); + +/** + * + * Initialize PWM hw. + */ +INLINE void flash_init(Flash *fd) +{ + flash_hw_init(fd); + + MOD_INIT(flash); +} + + + +#endif /* DRV_FLASH_H */ + diff --git a/2.5/bertos/drv/flash25.c b/2.5/bertos/drv/flash25.c new file mode 100644 index 00000000..0f67e3d4 --- /dev/null +++ b/2.5/bertos/drv/flash25.c @@ -0,0 +1,397 @@ +/** + * \file + * + * + * \brief Function library for serial Flash memory. + * + * Module provide a kfile interface, that ensure an abstraction + * from comunication channel and give a standard interface. + * Typicaly this kind of memory use an SPI bus, but you should + * use another comunication channel you have defined. + * + * \version $Id$ + * \author Daniele Basile + */ + +/* + * We use a spi bus, thus include hardware specific definition. + * If you use another channel you must redefine this macros. + */ +#include "hw/hw_spi.h" + +#include +#include + +#include +#include + +#include + +#include /* cpu_relax() */ + +#warning FIXME:This file was changed, but is untested! + +/** + * Wait until flash memory is ready. + */ +static void flash25_waitReady(Flash25 *fd) +{ + uint8_t stat; + + while (1) + { + CS_ENABLE(); + + kfile_putc(FLASH25_RDSR, fd->channel); + stat = kfile_getc(fd->channel); + + CS_DISABLE(); + + if (!(stat & RDY_BIT)) + break; + + cpu_relax(); + } +} + +/** + * Send a single command to serial flash memory. + */ +static void flash25_sendCmd(Flash25 *fd, Flash25Opcode cmd) +{ + CS_ENABLE(); + + kfile_putc(cmd, fd->channel); + + CS_DISABLE(); +} + +/** + * flash25 init function. + * This function init a comunication channel and + * try to read manufacturer id of serial memory, + * then check if is equal to selected type. + */ +static bool flash25_pin_init(Flash25 *fd) +{ + uint8_t device_id; + uint8_t manufacturer; + + SPI_HW_INIT(); + + CS_ENABLE(); + /* + * Send read id productor opcode on + * comunication channel + * TODO:controllare se ha senso + */ + kfile_putc(FLASH25_RDID, fd->channel); + + manufacturer = kfile_getc(fd->channel); + device_id = kfile_getc(fd->channel); + + CS_DISABLE(); + + if((FLASH25_MANUFACTURER_ID == manufacturer) && + (FLASH25_DEVICE_ID == device_id)) + return true; + else + return false; +} + +/** + * Reopen a serial memory interface. + * + * For serial memory this function reinit only + * the size and seek_pos in kfile stucture. + * Return a kfile pointer, after assert check. + */ +static KFile * flash25_reopen(struct KFile *_fd) +{ + Flash25 *fd = FLASH25_CAST(_fd); + + fd->fd.seek_pos = 0; + fd->fd.size = FLASH25_MEM_SIZE; + + kprintf("flash25 file opened\n"); + return &fd->fd; +} + +/** + * Close a serial memory interface. + * + * For serial memory this funtion do nothing, + * and return always 0. + */ +static int flash25_close(UNUSED_ARG(struct KFile *,fd)) +{ + kprintf("flash25 file closed\n"); + return 0; +} + +/** + * Read \a _buf lenght \a size byte from serial flash memmory. + * + * For read in serial flash memory we + * enble cs pin and send one byte of read opcode, + * and then 3 byte of address of memory cell we + * want to read. After the last byte of address we + * can read data from so pin. + * + * \return the number of bytes read. + */ +static size_t flash25_read(struct KFile *_fd, void *buf, size_t size) +{ + uint8_t *data = (uint8_t *)buf; + + Flash25 *fd = FLASH25_CAST(_fd); + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + //kprintf("Reading at addr[%lu], size[%d]\n", fd->seek_pos, size); + CS_ENABLE(); + + kfile_putc(FLASH25_READ, fd->channel); + + + /* + * Address that we want to read. + */ + kfile_putc((fd->fd.seek_pos >> 16) & 0xFF, fd->channel); + kfile_putc((fd->fd.seek_pos >> 8) & 0xFF, fd->channel); + kfile_putc(fd->fd.seek_pos & 0xFF, fd->channel); + + kfile_read(fd->channel, data, size); + + CS_DISABLE(); + + fd->fd.seek_pos += size; + + return size; +} + +/** + * Write \a _buf in serial flash memory + * + * Before to write data into flash we must enable + * memory writing. To do this we send a WRE command opcode. + * After this command the flash is ready to be write, and so + * we send a PROGRAM opcode followed to 3 byte of + * address memory, at the end of last address byte + * we can send the data. + * When we finish to send all data, we disable cs + * and flash write received data bytes on its memory. + * + * \note: WARNING: you could write only on erased memory section! + * Each write time you could write max a memory page size, + * because if you write more than memory page size the + * address roll over to first byte of page. + * + * \return the number of bytes write. + */ +static size_t flash25_write(struct KFile *_fd, const void *_buf, size_t size) +{ + flash25Offset_t offset; + flash25Size_t total_write = 0; + flash25Size_t wr_len; + const uint8_t *data = (const uint8_t *) _buf; + + Flash25 *fd = FLASH25_CAST(_fd); + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + while (size) + { + offset = fd->fd.seek_pos % (flash25Size_t)FLASH25_PAGE_SIZE; + wr_len = MIN((flash25Size_t)size, FLASH25_PAGE_SIZE - (flash25Size_t)offset); + + kprintf("[seek_pos-<%lu>, offset-<%d>]\n", fd->fd.seek_pos, offset); + + /* + * We check serial flash memory state, and wait until ready-flag + * is high. + */ + flash25_waitReady(fd); + + /* + * Start write cycle. + * We could write only data not more long than one + * page size. + * + * To write on serial flash memory we must first + * enable write with a WREN opcode command, before + * the PROGRAM opcode. + * + * \note: the same byte cannot be reprogrammed without + * erasing the whole sector first. + */ + flash25_sendCmd(fd, FLASH25_WREN); + + CS_ENABLE(); + kfile_putc(FLASH25_PROGRAM, fd->channel); + + /* + * Address that we want to write. + */ + kfile_putc((fd->fd.seek_pos >> 16) & 0xFF, fd->channel); + kfile_putc((fd->fd.seek_pos >> 8) & 0xFF, fd->channel); + kfile_putc(fd->fd.seek_pos & 0xFF, fd->channel); + + kfile_write(fd->channel, data, wr_len); + + CS_DISABLE(); + + data += wr_len; + fd->fd.seek_pos += wr_len; + size -= wr_len; + total_write += wr_len; + } + + kprintf("written %lu bytes\n", total_write); + return total_write; +} + +/** + * Sector erase function. + * + * Erase a select \p sector of serial flash memory. + * + * \note A sector size is FLASH25_SECTOR_SIZE. + * This operation could take a while. + */ +void flash25_sectorErase(Flash25 *fd, Flash25Sector sector) +{ + + /* + * Erase a sector could take a while, + * for debug we measure that time + * see datasheet to compare this time. + */ + DB(ticks_t start_time = timer_clock()); + + CS_ENABLE(); + + /* + * To erase a sector of serial flash memory we must first + * enable write with a WREN opcode command, before + * the SECTOR_ERASE opcode. Sector is automatically + * determinate if any address within the sector + * is selected. + */ + kfile_putc(FLASH25_WREN, fd->channel); + kfile_putc(FLASH25_SECTORE_ERASE,fd-> channel); + + /* + * Address inside the sector that we want to + * erase. + */ + kfile_putc(sector, fd->channel); + + CS_DISABLE(); + + /* + * We check serial flash memory state, and wait until ready-flag + * is hight. + */ + flash25_waitReady(fd); + + DB(kprintf("Erased sector [%ld] in %ld ms\n", (unsigned long)sector, (unsigned long)ticks_to_ms(timer_clock() - start_time))); +} + +/** + * Chip erase function. + * + * Erase all sector of serial flash memory. + * + * \note This operation could take a while. + */ +void flash25_chipErase(Flash25 *fd) +{ + /* + * Erase all chip could take a while, + * for debug we measure that time + * see datasheet to compare this time. + */ + DB(ticks_t start_time = timer_clock()); + + /* + * To erase serial flash memory we must first + * enable write with a WREN opcode command, before + * the CHIP_ERASE opcode. + */ + flash25_sendCmd(fd, FLASH25_WREN); + flash25_sendCmd(fd, FLASH25_CHIP_ERASE); + + /* + * We check serial flash memory state, and wait until ready-flag + * is high. + */ + flash25_waitReady(fd); + + DB(kprintf("Erased all memory in %ld ms\n", ticks_to_ms(timer_clock() - start_time))); + +} + +/** + * Init data flash memory interface. + */ +void flash25_init(Flash25 *fd, KFile *ch) +{ + + ASSERT(fd); + ASSERT(ch); + + //Set kfile struct type as a generic kfile structure. + DB(fd->fd._type = KFT_FLASH25); + + // Set up data flash programming functions. + fd->fd.reopen = flash25_reopen; + fd->fd.close = flash25_close; + fd->fd.read = flash25_read; + fd->fd.write = flash25_write; + fd->fd.seek = kfile_genericSeek; + + /* + * Init a local channel structure and flash kfile interface. + */ + fd->channel = ch; + flash25_reopen(&fd->fd); + + /* + * Init data flash memory and micro pin. + */ + if (!flash25_pin_init(fd)) + ASSERT(0); +} + + diff --git a/2.5/bertos/drv/flash25.h b/2.5/bertos/drv/flash25.h new file mode 100644 index 00000000..2712c70a --- /dev/null +++ b/2.5/bertos/drv/flash25.h @@ -0,0 +1,143 @@ +/** + * \file + * + * + * \brief Function library for serial Flash memory. + * + * + * \author Daniele Basile + * + * $WIZ$ module_name = "flash25" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_flash25.h" + */ + + +#ifndef DRV_FLASH25_H +#define DRV_FLASH25_H + +#include "cfg/cfg_flash25.h" +#include + +#include + +/** + * Type definition for serial flash memory. + */ +typedef uint32_t flash25Addr_t; +typedef uint32_t flash25Size_t; +typedef uint8_t flash25Offset_t; + +/** + * Flash25 KFile context structure. + */ +typedef struct Flash25 +{ + KFile fd; ///< File descriptor. + KFile *channel; ///< Dataflash comm channel (usually SPI). +} Flash25; + +/** + * ID for dataflash. + */ +#define KFT_FLASH25 MAKE_ID('F', 'L', '2', '5') + + +/** + * Convert + ASSERT from generic KFile to Flash25. + */ +INLINE Flash25 * FLASH25_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FLASH25); + return (Flash25 *)fd; +} + +/** + * Memory definition. + * + * \note Below are defined valid serial flash memory support to + * this drive. Every time we call flash25_init() function we check + * if memory defined are right (see flash25.c form more detail). + * + * $WIZ$ flash25_list = "FLASH25_AT25F2048" + */ +#define FLASH25_AT25F2048 1 + +#if CONFIG_FLASH25 == FLASH25_AT25F2048 + #define FLASH25_MANUFACTURER_ID 0x1F // ATMEL + #define FLASH25_DEVICE_ID 0x63 // Device ID + #define FLASH25_PAGE_SIZE 256 // Page size in byte + #define FLASH25_NUM_SECTOR 4 // Number of section in serial memory + #define FLASH25_SECTOR_SIZE 65536UL // Section size in byte + #define FLASH25_MEM_SIZE FLASH25_NUM_SECTOR * FLASH25_SECTOR_SIZE + #define FLASH25_NUM_PAGE FLASH25_MEM_SIZE / FLASH25_PAGE_SIZE +#else + #error Nothing memory defined in CONFIG_FLASH25 are support. +#endif + +#define RDY_BIT 0x1 // Statuts of write cycle + +/** + * Serial flash opcode commands. + */ +typedef enum { + FLASH25_WREN = 0x6, ///< Set write enable latch + FLASH25_WRDI = 0x4, ///< Reset enable write latch + FLASH25_RDSR = 0x5, ///< Read status register + FLASH25_WRSR = 0x1, ///< Write status register + FLASH25_READ = 0x3, ///< Read data from memory array + FLASH25_PROGRAM = 0x2, ///< Program data into memory array + FLASH25_SECTORE_ERASE = 0x52, ///< Erase one sector in memory array + FLASH25_CHIP_ERASE = 0x62, ///< Erase all sector in memory array + FLASH25_RDID = 0x15 ///< Read Manufacturer and product ID +} Flash25Opcode; + +/** + * Serial flash sector memory address. + */ +#if CONFIG_FLASH25 != FLASH25_AT25F2048 + #error Nothing memory defined in CONFIG_FLASH25 are support. +#endif + +typedef enum { + FLASH25_SECT1 = 0x0, ///< Sector 1 (0x0 -0xFFFF) + FLASH25_SECT2 = 0x10000, ///< Sector 2 (0x10000 -0x1FFFF) + FLASH25_SECT3 = 0x20000, ///< Sector 3 (0x20000 -0x2FFFF) + FLASH25_SECT4 = 0x30000, ///< Sector 4 (0x30000 -0x3FFFF) +} Flash25Sector; + +void flash25_init(Flash25 *fd, KFile *ch); +void flash25_chipErase(Flash25 *fd); +void flash25_sectorErase(Flash25 *fd, Flash25Sector sector); +bool flash25_test(KFile *channel); + +#endif /* DRV_FLASH25_H */ + diff --git a/2.5/bertos/drv/flash25_hwtest.c b/2.5/bertos/drv/flash25_hwtest.c new file mode 100644 index 00000000..1297feea --- /dev/null +++ b/2.5/bertos/drv/flash25_hwtest.c @@ -0,0 +1,84 @@ +/** + * \file + * + * + * \brief Test function for serial Flash memory. + * + * \version $Id$ + * \author Daniele Basile + */ + +/** + * Test function for flash25. + * + * \note: This implentation use a SPI channel. + */ + + +#include + +#include + +#include + +#warning FIXME:Review and refactor this test.. + +bool flash25_test(KFile *channel) +{ + Flash25 fd; + uint8_t test_buf[256]; + + /* + * Init a spi kfile interface and + * flash driver. + */ + flash25_init(&fd, channel); + + kprintf("Init serial flash\n"); + + flash25_chipErase(&fd); + + flash25_sectorErase(&fd, FLASH25_SECT1); + flash25_sectorErase(&fd, FLASH25_SECT2); + flash25_sectorErase(&fd, FLASH25_SECT3); + flash25_sectorErase(&fd, FLASH25_SECT4); + + /* + * Launche a kfile test interface. + */ + kprintf("Kfile test start..\n"); + if (!kfile_testRunGeneric(&fd.fd, test_buf, NULL, sizeof(test_buf))) + return false; + + return true; +} + + diff --git a/2.5/bertos/drv/ft245rl.c b/2.5/bertos/drv/ft245rl.c new file mode 100644 index 00000000..3cfac12c --- /dev/null +++ b/2.5/bertos/drv/ft245rl.c @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief Function library for Accessing FT245RL USB interface. + * + * This module handles USB communication with FT245RL chip. + * This chip is a parallel USB interface with data flow control. + * A kfile-like interface is supplied. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_ft245rl.h" +#include "ft245rl.h" + +#include +#include +#include + +#include + +#include + +#include + + +MOD_DEFINE(ft245rl); + +/** + * Read \a size bytes in buffer \a buf, from fid \a _fd. + */ +static size_t ft245rl_read(struct KFile *_fd, void *_buf, size_t size) +{ + Ft245rl *fd = FT245RL_CAST(_fd); + (void)fd; //unused + uint8_t *buf = (uint8_t *)_buf; + size_t total_read = 0; + + while (size--) + { + while(!FT245RL_DATA_RDY()) + /* busy waiy */; + + *buf++ = FT245RL_GETDATA(); + total_read++; + } + + return total_read; +} + +/** + * Write \a size bytes from buffer \a buf, of fid \a _fd. + */ +static size_t ft245rl_write(struct KFile *_fd, const void *_buf, size_t size) +{ + Ft245rl *fd = FT245RL_CAST(_fd); + (void)fd; //unused + const uint8_t *buf = (const uint8_t *)_buf; + size_t total_write = 0; + + while (size--) + { + while(!FT245RL_TX_ALLOWED()) + /* busy waiy */; + + FT245RL_SETDATA(*buf++); + total_write++; + } + + return total_write; +} + +/** + * Ft245rl init function. + */ +void ft245rl_init(Ft245rl *fd) +{ + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_FT245RL); + + // Setup data ft245rl communication functions. + fd->fd.read = ft245rl_read; + fd->fd.write = ft245rl_write; + + FT245RL_INIT(); + while (FT245RL_DATA_RDY()) + FT245RL_GETDATA(); + + MOD_INIT(ft245rl); +} diff --git a/2.5/bertos/drv/ft245rl.h b/2.5/bertos/drv/ft245rl.h new file mode 100644 index 00000000..258b0a4b --- /dev/null +++ b/2.5/bertos/drv/ft245rl.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Function library for Accessing FT245RL USB interface. + * + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "ft245rl" + * $WIZ$ module_depends = "kfile", "timer" + * $WIZ$ module_hw = "bertos/hw/hw_ft245rl.h" + */ + + +#ifndef DRV_FT245RL_H +#define DRV_FT245RL_H + +#include +#include + +/** + * ID for FT245RL KFiles. + */ +#define KFT_FT245RL MAKE_ID('F', '2', '4', '5') + +/** + * Ft245rl KFile context structure. + */ +typedef struct Ft245rl +{ + KFile fd; ///< File descriptor. +} Ft245rl; + + +/** + * Convert + ASSERT from generic KFile to KFileFt245rl. + */ +INLINE Ft245rl * FT245RL_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FT245RL); + return (Ft245rl *)fd; +} + +void ft245rl_init(Ft245rl *fd); + +#endif /* DRV_FT245RL_H */ diff --git a/2.5/bertos/drv/i2c.c b/2.5/bertos/drv/i2c.c new file mode 100644 index 00000000..575dc768 --- /dev/null +++ b/2.5/bertos/drv/i2c.c @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief I2C generic driver functions (implementation). + * + * \author Francesco Sacchi + */ + +#include "i2c.h" + +/** + * Send a sequence of bytes in master transmitter mode + * to the selected slave device through the I2C bus. + * + * \return true on success, false on error. + */ +bool i2c_send(const void *_buf, size_t count) +{ + const uint8_t *buf = (const uint8_t *)_buf; + + while (count--) + { + if (!i2c_put(*buf++)) + return false; + } + return true; +} + +/** + * Receive a sequence of one or more bytes from the + * selected slave device in master receive mode through + * the I2C bus. + * + * Received data is placed in \c buf. + * + * \note a NACK is automatically given on the last received + * byte. + * + * \return true on success, false on error + */ +bool i2c_recv(void *_buf, size_t count) +{ + uint8_t *buf = (uint8_t *)_buf; + + while (count--) + { + /* + * The last byte read does not has an ACK + * to stop communication. + */ + int c = i2c_get(count); + + if (c == EOF) + return false; + else + *buf++ = c; + } + + return true; +} + diff --git a/2.5/bertos/drv/i2c.h b/2.5/bertos/drv/i2c.h new file mode 100644 index 00000000..dff995cc --- /dev/null +++ b/2.5/bertos/drv/i2c.h @@ -0,0 +1,117 @@ +/** + * \file + * + * + * \brief I2C generic driver functions. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "i2c" + * $WIZ$ module_configuration = "bertos/cfg/cfg_i2c.h" + * $WIZ$ module_hw = "bertos/hw/hw_i2c_bitbang.h" + * $WIZ$ module_supports = "not atmega103 and not atmega168 and not at91" + */ + +#ifndef DRV_I2C_H +#define DRV_I2C_H + +#include "cfg/cfg_i2c.h" +#include + +#define I2C_READBIT BV(0) + +/** + * I2C Backends. + * Sometimes your cpu does not have a builtin + * i2c driver or you don't want, for some reason, to + * use that. + * With this you can choose, at compile time, which backend to use. + * + * $WIZ$ i2c_backend = "I2C_BACKEND_BUILTIN", "I2C_BACKEND_BITBANG" + */ +#define I2C_BACKEND_BUILTIN 0 ///< Uses cpu builtin i2c driver +#define I2C_BACKEND_BITBANG 1 ///< Uses emulated bitbang driver + + +/** + * I2c builtin prototypes. + * Do NOT use these function directly, instead, + * you can call the ones named without "_builtin_" + * and specify in cfg_i2c.h ( \see CONFIG_I2C_BACKEND) + * that you want the builtin backend. + * \{ + */ +void i2c_builtin_init(void); +bool i2c_builtin_start_w(uint8_t id); +bool i2c_builtin_start_r(uint8_t id); +void i2c_builtin_stop(void); +bool i2c_builtin_put(uint8_t _data); +int i2c_builtin_get(bool ack); +/*\}*/ + +/** + * I2c bitbang prototypes. + * Same thing here: do NOT use these function directly, instead, + * you can call the ones named without "_bitbang_" + * and specify in cfg_i2c.h ( \see CONFIG_I2C_BACKEND) + * that you want the bitbang backend. + * \{ + */ +void i2c_bitbang_init(void); +bool i2c_bitbang_start_w(uint8_t id); +bool i2c_bitbang_start_r(uint8_t id); +void i2c_bitbang_stop(void); +bool i2c_bitbang_put(uint8_t _data); +int i2c_bitbang_get(bool ack); +/*\}*/ + +#if CONFIG_I2C_BACKEND == I2C_BACKEND_BUILTIN + #define i2c_init i2c_builtin_init + #define i2c_start_w i2c_builtin_start_w + #define i2c_start_r i2c_builtin_start_r + #define i2c_stop i2c_builtin_stop + #define i2c_put i2c_builtin_put + #define i2c_get i2c_builtin_get +#elif CONFIG_I2C_BACKEND == I2C_BACKEND_BITBANG + #define i2c_init i2c_bitbang_init + #define i2c_start_w i2c_bitbang_start_w + #define i2c_start_r i2c_bitbang_start_r + #define i2c_stop i2c_bitbang_stop + #define i2c_put i2c_bitbang_put + #define i2c_get i2c_bitbang_get +#else + #error Unsupported i2c backend. +#endif + +bool i2c_send(const void *_buf, size_t count); +bool i2c_recv(void *_buf, size_t count); + +#endif diff --git a/2.5/bertos/drv/i2c_bitbang.c b/2.5/bertos/drv/i2c_bitbang.c new file mode 100644 index 00000000..5e9dfb0c --- /dev/null +++ b/2.5/bertos/drv/i2c_bitbang.c @@ -0,0 +1,179 @@ +/** + * \file + * + * + * \brief I2C bitbang driver (implementation) + * + * \author Francesco Sacchi + */ + +#include "i2c.h" +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include +#include +#include + +#include +#include + +#include "hw/hw_i2c_bitbang.h" + +INLINE bool i2c_bitbang_start(void) +{ + SDA_HI; + SCL_HI; + I2C_HALFBIT_DELAY(); + SDA_LO; + I2C_HALFBIT_DELAY(); + ASSERT(!SDA_IN); + return !SDA_IN; +} + +void i2c_bitbang_stop(void) +{ + SDA_LO; + SCL_HI; + I2C_HALFBIT_DELAY(); + SDA_HI; +} + +bool i2c_bitbang_put(uint8_t _data) +{ + /* Add ACK bit */ + uint16_t data = (_data << 1) | 1; + + for (uint16_t i = 0x100; i != 0; i >>= 1) + { + SCL_LO; + if (data & i) + SDA_HI; + else + SDA_LO; + I2C_HALFBIT_DELAY(); + + SCL_HI; + I2C_HALFBIT_DELAY(); + } + + bool ack = !SDA_IN; + SCL_LO; + I2C_HALFBIT_DELAY(); + return ack; +} + +bool i2c_bitbang_start_w(uint8_t id) +{ + id &= ~I2C_READBIT; + /* + * Loop on the select write sequence: when the device is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the deveice responds with an ACK. + */ + ticks_t start = timer_clock(); + while (i2c_bitbang_start()) + { + if (i2c_bitbang_put(id)) + return true; + else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on I2C start write\n"); + break; + } + //LOG_INFO("Rep start\n"); + } + + return false; +} + +bool i2c_bitbang_start_r(uint8_t id) +{ + id |= I2C_READBIT; + if (i2c_bitbang_start()) + { + if (i2c_bitbang_put(id)) + return true; + + LOG_ERR("NACK on I2c start read\n"); + } + + return false; +} + +int i2c_bitbang_get(bool ack) +{ + uint8_t data = 0; + for (uint8_t i = 0x80; i != 0; i >>= 1) + { + SCL_LO; + I2C_HALFBIT_DELAY(); + SCL_HI; + if (SDA_IN) + data |= i; + else + data &= ~i; + + I2C_HALFBIT_DELAY(); + } + SCL_LO; + + if (ack) + SDA_LO; + else + SDA_HI; + + I2C_HALFBIT_DELAY(); + SCL_HI; + I2C_HALFBIT_DELAY(); + SCL_LO; + SDA_HI; + /* avoid sign extension */ + return (int)(uint8_t)data; +} + +MOD_DEFINE(i2c); + +/** + * Initialize i2c module. + */ +void i2c_bitbang_init(void) +{ + MOD_CHECK(timer); + I2C_BITBANG_HW_INIT; + SDA_HI; + SCL_HI; + MOD_INIT(i2c); +} + diff --git a/2.5/bertos/drv/kbd.c b/2.5/bertos/drv/kbd.c new file mode 100644 index 00000000..fc6232c7 --- /dev/null +++ b/2.5/bertos/drv/kbd.c @@ -0,0 +1,486 @@ +/** + * \file + * + * + * \brief Keyboard driver (implementation) + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + * + */ + +#include "hw/hw_kbd.h" + +#include "cfg/cfg_kbd.h" +#include +#include + +#include +#include + + +/* Configuration sanity checks */ +#if !defined(CONFIG_KBD_POLL) || (CONFIG_KBD_POLL != KBD_POLL_SOFTINT) + #error CONFIG_KBD_POLL must be defined to either KBD_POLL_SOFTINT +#endif +#if !defined(CONFIG_KBD_BEEP) || (CONFIG_KBD_BEEP != 0 && CONFIG_KBD_BEEP != 1) + #error CONFIG_KBD_BEEP must be defined to either 0 or 1 +#endif +#if !defined(CONFIG_KBD_OBSERVER) || (CONFIG_KBD_OBSERVER != 0 && CONFIG_KBD_OBSERVER != 1) + #error CONFIG_KBD_OBSERVER must be defined to either 0 or 1 +#endif +#if !defined(CONFIG_KBD_LONGPRESS) || (CONFIG_KBD_LONGPRESS != 0 && CONFIG_KBD_LONGPRESS != 1) + #error CONFIG_KBD_LONGPRESS must be defined to either 0 or 1 +#endif + +#if CONFIG_KBD_BEEP + #include +#endif + +#define KBD_CHECK_INTERVAL 10 /**< (ms) Timing for kbd softint */ +#define KBD_DEBOUNCE_TIME 30 /**< (ms) Debounce time */ +#define KBD_BEEP_TIME 5 /**< (ms) Duration of keybeep */ + +#define KBD_REPEAT_DELAY 400 /**< (ms) Keyboard repeat delay for first character */ +#define KBD_REPEAT_RATE 100 /**< (ms) Initial interchar delay for keyboard repeat */ +#define KBD_REPEAT_MAXRATE 20 /**< (ms) Minimum delay for keyboard repeat */ +#define KBD_REPEAT_ACCEL 5 /**< (ms) Keyboard repeat speed increase */ + +#define KBD_LNG_DELAY 1000 /**< (ms) Keyboard long pression keys delay */ + + +/** Status for keyboard repeat state machine */ +static enum { KS_IDLE, KS_REPDELAY, KS_REPEAT } kbd_rptStatus; + + +static volatile keymask_t kbd_buf; /**< Single entry keyboard buffer */ +static volatile keymask_t kbd_cnt; /**< Number of keypress events in \c kbd_buf */ +static keymask_t kbd_rpt_mask; /**< Mask of repeatable keys. */ + +#if CONFIG_KBD_POLL == KBD_POLL_SOFTINT +static Timer kbd_timer; /**< Keyboard softtimer */ +#endif + +static List kbd_rawHandlers; /**< Raw keyboard handlers */ +static List kbd_handlers; /**< Cooked keyboard handlers */ + +static KbdHandler kbd_defHandler; /**< The default keyboard handler */ +static KbdHandler kbd_debHandler; /**< The debounce keyboard handler */ +static KbdHandler kbd_rptHandler; /**< Auto-repeat keyboard handler */ + +#if CONFIG_KBD_LONGPRESS +static KbdHandler kbd_lngHandler; /**< Long pression keys handler */ +#endif + +#if CONFIG_KBD_OBSERVER + #include + Subject kbd_subject; +#endif + + +/** + * Poll keyboard and dispatch keys to handlers. + * + * Read the key states and invoke all keyboard + * handlers to process the new state. + * + * Call this function periodically using a software + * timer, an interrupt or a process. + */ +static void kbd_poll(void) +{ + /** Currently depressed key */ + static keymask_t current_key; + + struct KbdHandler *handler; + keymask_t key = kbd_readkeys(); + + /* Call raw input handlers */ + FOREACH_NODE(handler, &kbd_rawHandlers) + key = handler->hook(key); + + /* If this key was not previously pressed */ + if (key != current_key) + { + /* Remember last key */ + current_key = key; + + /* Call cooked input handlers */ + FOREACH_NODE(handler, &kbd_handlers) + key = handler->hook(key); + } +} + +#if CONFIG_KBD_POLL == KBD_POLL_SOFTINT + +/** + * Keyboard soft-irq handler. + */ +static void kbd_softint(UNUSED_ARG(iptr_t, arg)) +{ + kbd_poll(); + timer_add(&kbd_timer); +} + +#else + #error "Define keyboard poll method" + +#endif /* CONFIG_KBD_POLL */ + +/** + * \brief Read a key from the keyboard buffer. + * + * When a key is kept depressed between calls of this function a value + * is returned only after the time specified with KBD_REPAT_DELAY to + * avoid too fast keyboard repeat. + * + * \note Calls \c schedule() internally. + * + * \note This function is \b not interrupt safe! + * + * \return The mask of depressed keys or 0 if no keys are depressed. + * + */ +keymask_t kbd_peek(void) +{ + keymask_t key = 0; + +#if CONFIG_KBD_SCHED + /* Let other tasks run for a while */ + extern void schedule(void); + schedule(); +#endif + + /* Extract an event from the keyboard buffer */ + IRQ_DISABLE; + if (kbd_cnt) + { + --kbd_cnt; + key = kbd_buf; + } + IRQ_ENABLE; + + return key; +} + +/** + * Wait for a keypress and return the mask of depressed keys. + * + * \note This function is \b not interrupt safe! + */ +keymask_t kbd_get(void) +{ + keymask_t key; + + while (!(key = kbd_peek())) {} + + return key; +} + + +/** + * Wait up to \c timeout ms for a keypress + * and return the mask of depressed keys, or K_TIMEOUT + * if the timeout was reacked. + */ +keymask_t kbd_get_timeout(mtime_t timeout) +{ + keymask_t key; + + ticks_t start = timer_clock(); + ticks_t stop = ms_to_ticks(timeout); + do + { + if ((key = kbd_peek())) + return key; + } + while (timer_clock() - start < stop); + + return K_TIMEOUT; +} + + +void kbd_addHandler(struct KbdHandler *handler) +{ + KbdHandler *node; + List *list; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Choose between raw and coocked handlers list */ + list = (handler->flags & KHF_RAWKEYS) ? + &kbd_rawHandlers : &kbd_handlers; + + /* + * Search for the first node whose priority + * is lower than the timer we want to add. + */ + FOREACH_NODE(node,list) + if (node->pri < handler->pri) + break; + + /* Enqueue handler in the handlers chain */ + INSERT_BEFORE(&handler->link, &node->link); + + IRQ_RESTORE(flags); +} + + +void kbd_remHandler(struct KbdHandler *handler) +{ + /* Remove the handler */ + ATOMIC(REMOVE(&handler->link)); +} + + +/** + * This is the default key handler, called after + * all other handlers have had their chance to + * do their special processing. This handler + * pushes all input in the keyboard FIFO buffer. + */ +static keymask_t kbd_defHandlerFunc(keymask_t key) +{ + if (key) + { + /* Force a single event in kbd buffer */ + kbd_buf = key; + kbd_cnt = 1; + + #if CONFIG_KBD_OBSERVER + observer_notify(&kbd_subject, KBD_EVENT_KEY, &key); + #endif + + #if CONFIG_KBD_BEEP + if (!(key & K_REPEAT)) + buz_beep(KBD_BEEP_TIME); + #endif + } + + /* Eat all input */ + return 0; +} + +/** + * Handle keyboard debounce + */ +static keymask_t kbd_debHandlerFunc(keymask_t key) +{ + /** Buffer for debounce */ + static keymask_t debounce_key; + + /** Timer for keyboard debounce */ + static ticks_t debounce_time; + + /** Key aquired after debounce */ + static keymask_t new_key; + + + ticks_t now = timer_clock(); + + if (key != debounce_key) + { + /* Reset debounce timer */ + debounce_key = key; + debounce_time = now; + } + else if ((new_key != debounce_key) + && (now - debounce_time > ms_to_ticks(KBD_DEBOUNCE_TIME))) + { + new_key = debounce_key; + debounce_time = now; + } + + return new_key; +} + +#if CONFIG_KBD_LONGPRESS +/** + * Handle long pression keys. + */ +static keymask_t kbd_lngHandlerFunc(keymask_t key) +{ + static ticks_t start; + ticks_t now = timer_clock(); + + if (key & K_LNG_MASK) + { + if (now - start > ms_to_ticks(KBD_LNG_DELAY)) + key |= K_LONG; + } + else + start = now; + return key; +} +#endif + +/** + * Set current mask of repeatable keys. + */ +keymask_t kbd_setRepeatMask(keymask_t mask) +{ + keymask_t oldmask = kbd_rpt_mask; + ATOMIC(kbd_rpt_mask = mask); + return oldmask; +} + +/** + * Handle keyboard repeat + */ +static keymask_t kbd_rptHandlerFunc(keymask_t key) +{ + /* Timer for keyboard repeat events. */ + static ticks_t repeat_time; + + /* Current repeat rate (for acceleration). */ + static ticks_t repeat_rate; /** Current repeat rate (for acceleration) */ + + ticks_t now = timer_clock(); + + switch (kbd_rptStatus) + { + case KS_IDLE: + if (key & kbd_rpt_mask) + { + repeat_time = now; + kbd_rptStatus = KS_REPDELAY; + } + break; + + case KS_REPDELAY: + if (key & kbd_rpt_mask) + { + if (now - repeat_time > ms_to_ticks(KBD_REPEAT_DELAY)) + { + key = (key & kbd_rpt_mask) | K_REPEAT; + repeat_time = now; + repeat_rate = ms_to_ticks(KBD_REPEAT_RATE); + kbd_rptStatus = KS_REPEAT; + } + else + key = 0; + } + else + kbd_rptStatus = KS_IDLE; + break; + + case KS_REPEAT: + if (key & kbd_rpt_mask) + { + if (now - repeat_time > repeat_rate) + { + /* Enqueue a new event in the buffer */ + key = (key & kbd_rpt_mask) | K_REPEAT; + repeat_time = now; + + /* Repeat rate acceleration */ + if (repeat_rate > ms_to_ticks(KBD_REPEAT_MAXRATE)) + repeat_rate -= ms_to_ticks(KBD_REPEAT_ACCEL); + } + else + key = 0; + } + else + kbd_rptStatus = KS_IDLE; + + break; + } + + return key; +} + + +MOD_DEFINE(kbd) + +/** + * Initialize keyboard ports and softtimer + */ +void kbd_init(void) +{ +#if CONFIG_KBD_BEEP + MOD_CHECK(buzzer); +#endif + + KBD_HW_INIT; + + /* Init handlers lists */ + LIST_INIT(&kbd_handlers); + LIST_INIT(&kbd_rawHandlers); + + /* Add debounce keyboard handler */ + kbd_debHandler.hook = kbd_debHandlerFunc; + kbd_debHandler.pri = 100; /* high priority */ + kbd_debHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&kbd_debHandler); + + #if CONFIG_KBD_LONGPRESS + /* Add long pression keyboard handler */ + kbd_lngHandler.hook = kbd_lngHandlerFunc; + kbd_lngHandler.pri = 90; /* high priority */ + kbd_lngHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&kbd_lngHandler); + #endif + + /* Add repeat keyboard handler */ + kbd_rptHandler.hook = kbd_rptHandlerFunc; + kbd_rptHandler.pri = 80; /* high priority */ + kbd_rptHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&kbd_rptHandler); + + /* Add default keyboard handler */ + kbd_defHandler.hook = kbd_defHandlerFunc; + kbd_defHandler.pri = -128; /* lowest priority */ + kbd_addHandler(&kbd_defHandler); + +#if CONFIG_KBD_OBSERVER + observer_InitSubject(&kbd_subject); +#endif + +#if CONFIG_KBD_POLL == KBD_POLL_SOFTINT + + MOD_CHECK(timer); + + /* Add kbd handler to soft timers list */ + event_initSoftint(&kbd_timer.expire, kbd_softint, NULL); + timer_setDelay(&kbd_timer, ms_to_ticks(KBD_CHECK_INTERVAL)); + timer_add(&kbd_timer); + +#else + #error "Define keyboard poll method" + +#endif + + MOD_INIT(kbd); +} diff --git a/2.5/bertos/drv/kbd.h b/2.5/bertos/drv/kbd.h new file mode 100644 index 00000000..978f142f --- /dev/null +++ b/2.5/bertos/drv/kbd.h @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \brief Keyboard driver. + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kbd" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_kbd.h" + * $WIZ$ module_hw = "bertos/hw/hw_kbd.h", "bertos/hw/kbd_map.h" + */ + +#ifndef DRV_KBD_H +#define DRV_KBD_H + +#include "hw/kbd_map.h" + +#include "cfg/cfg_kbd.h" // CONFIG_KBD_OBSERVER +#include + +#include + +/** + * \name Keyboard polling modes. + * + * Define CONFIG_KBD_POLL to one of these. + * + * \{ + */ +#define KBD_POLL_SOFTINT 1 +/* \} */ + +/** + * Keyboard handler descriptor + */ +typedef struct KbdHandler +{ + Node link; + keymask_t (*hook)(keymask_t); /**< Hook function */ + int8_t pri; /**< Priority in input queue */ + uint8_t flags; /**< See below for definitions */ +} KbdHandler; + +#define KHF_RAWKEYS BV(0) /**< Handler gets raw key events */ + + +void kbd_init(void); +keymask_t kbd_peek(void); +keymask_t kbd_get(void); +keymask_t kbd_get_timeout(mtime_t timeout); +void kbd_addHandler(struct KbdHandler *handler); +void kbd_remHandler(struct KbdHandler *handler); +keymask_t kbd_setRepeatMask(keymask_t mask); + +#if CONFIG_KBD_OBSERVER + struct Subject; + + /** Subject structure for keyboard observers. */ + extern struct Subject kbd_subject; + + enum + { + /* Event for key presses. */ + KBD_EVENT_KEY = 0x100 + }; +#endif + +#endif /* DRV_KBD_H */ diff --git a/2.5/bertos/drv/kdebug.c b/2.5/bertos/drv/kdebug.c new file mode 100644 index 00000000..cb04f70b --- /dev/null +++ b/2.5/bertos/drv/kdebug.c @@ -0,0 +1,284 @@ +/** + * \file + * + * + * \brief General pourpose debug support for embedded systems (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "cfg/cfg_debug.h" +#include /* for BV() */ +#include +#include + +#include +#include + +#include /* for _formatted_write() */ +#include + +#ifdef _DEBUG + +#if CPU_HARVARD && !defined(_PROGMEM) + #error This module build correctly only in program memory! +#endif + + +#if OS_HOSTED + #include // write() + + #define KDBG_WAIT_READY() do { /*nop*/ } while(0) + #define KDBG_WRITE_CHAR(c) do { char __c = (c); write(STDERR_FILENO, &__c, sizeof(__c)); } while(0) + #define KDBG_MASK_IRQ(old) do { (void)(old); } while(0) + #define KDBG_RESTORE_IRQ(old) do { /*nop*/ } while(0) + typedef char kdbg_irqsave_t; /* unused */ + + #define kdbg_hw_init() do {} while (0) ///< Not needed + + #if CONFIG_KDEBUG_PORT == 666 + #error BITBANG debug console missing for this platform + #endif +#else + #include CPU_CSOURCE(kdebug) +#endif + + +void kdbg_init(void) +{ + /* Init debug hw */ + kdbg_hw_init(); + kputs("\n\n*** BeRTOS DBG START ***\n"); +} + + +/** + * Output one character to the debug console + */ +static void __kputchar(char c, UNUSED_ARG(void *, unused)) +{ + /* Poll while serial buffer is still busy */ + KDBG_WAIT_READY(); + + /* Send '\n' as '\r\n' for dumb terminals */ + if (c == '\n') + { + KDBG_WRITE_CHAR('\r'); + KDBG_WAIT_READY(); + } + + KDBG_WRITE_CHAR(c); +} + + +void kputchar(char c) +{ + /* Mask serial TX intr */ + kdbg_irqsave_t irqsave; + KDBG_MASK_IRQ(irqsave); + + __kputchar(c, 0); + + /* Restore serial TX intr */ + KDBG_RESTORE_IRQ(irqsave); +} + + +static void PGM_FUNC(kvprintf)(const char * PGM_ATTR fmt, va_list ap) +{ +#if CONFIG_PRINTF + /* Mask serial TX intr */ + kdbg_irqsave_t irqsave; + KDBG_MASK_IRQ(irqsave); + + PGM_FUNC(_formatted_write)(fmt, __kputchar, 0, ap); + + /* Restore serial TX intr */ + KDBG_RESTORE_IRQ(irqsave); +#else + /* A better than nothing printf() surrogate. */ + PGM_FUNC(kputs)(fmt); +#endif /* CONFIG_PRINTF */ +} + +void PGM_FUNC(kprintf)(const char * PGM_ATTR fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + PGM_FUNC(kvprintf)(fmt, ap); + va_end(ap); +} + +void PGM_FUNC(kputs)(const char * PGM_ATTR str) +{ + char c; + + /* Mask serial TX intr */ + kdbg_irqsave_t irqsave; + KDBG_MASK_IRQ(irqsave); + + while ((c = PGM_READ_CHAR(str++))) + __kputchar(c, 0); + + KDBG_RESTORE_IRQ(irqsave); +} + + +/** + * Cheap function to print small integers without using printf(). + */ +int kputnum(int num) +{ + int output_len = 0; + int divisor = 10000; + int digit; + + do + { + digit = num / divisor; + num %= divisor; + + if (digit || output_len || divisor == 1) + { + kputchar(digit + '0'); + ++output_len; + } + } + while (divisor /= 10); + + return output_len; +} + + +static void klocation(const char * PGM_ATTR file, int line) +{ + PGM_FUNC(kputs)(file); + kputchar(':'); + kputnum(line); + PGM_FUNC(kputs)(PGM_STR(": ")); +} + +int PGM_FUNC(__bassert)(const char * PGM_ATTR cond, const char * PGM_ATTR file, int line) +{ + klocation(file, line); + PGM_FUNC(kputs)(PGM_STR("Assertion failed: ")); + PGM_FUNC(kputs)(cond); + kputchar('\n'); + BREAKPOINT; + return 1; +} + +/* + * Unfortunately, there's no way to get __func__ in + * program memory, so we waste quite a lot of RAM in + * AVR and other Harvard processors. + */ +void PGM_FUNC(__trace)(const char *name) +{ + PGM_FUNC(kprintf)(PGM_STR("%s()\n"), name); +} + +void PGM_FUNC(__tracemsg)(const char *name, const char * PGM_ATTR fmt, ...) +{ + va_list ap; + + PGM_FUNC(kprintf)(PGM_STR("%s(): "), name); + va_start(ap, fmt); + PGM_FUNC(kvprintf)(fmt, ap); + va_end(ap); + kputchar('\n'); +} + +int PGM_FUNC(__invalid_ptr)(void *value, const char * PGM_ATTR name, const char * PGM_ATTR file, int line) +{ + klocation(file, line); + PGM_FUNC(kputs)(PGM_STR("Invalid ptr: ")); + PGM_FUNC(kputs)(name); + #if CONFIG_PRINTF + PGM_FUNC(kprintf)(PGM_STR(" = 0x%p\n"), value); + #else + (void)value; + kputchar('\n'); + #endif + return 1; +} + + +void __init_wall(long *wall, int size) +{ + while(size--) + *wall++ = WALL_VALUE; +} + + +int PGM_FUNC(__check_wall)(long *wall, int size, const char * PGM_ATTR name, const char * PGM_ATTR file, int line) +{ + int i, fail = 0; + + for (i = 0; i < size; i++) + { + if (wall[i] != WALL_VALUE) + { + klocation(file, line); + PGM_FUNC(kputs)(PGM_STR("Wall broken: ")); + PGM_FUNC(kputs)(name); + #if CONFIG_PRINTF + PGM_FUNC(kprintf)(PGM_STR("[%d] (0x%p) = 0x%lx\n"), i, wall + i, wall[i]); + #else + kputchar('\n'); + #endif + fail = 1; + } + } + + return fail; +} + + +#if CONFIG_PRINTF + +/** + * Dump binary data in hex + */ +void kdump(const void *_buf, size_t len) +{ + const unsigned char *buf = (const unsigned char *)_buf; + + while (len--) + kprintf("%02X", *buf++); + kputchar('\n'); +} + +#endif /* CONFIG_PRINTF */ + +#endif /* _DEBUG */ diff --git a/2.5/bertos/drv/lcd_32122a.c b/2.5/bertos/drv/lcd_32122a.c new file mode 100644 index 00000000..b46ee0b7 --- /dev/null +++ b/2.5/bertos/drv/lcd_32122a.c @@ -0,0 +1,334 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + + +#include "lcd_32122a.h" + +#include "hw/hw_lcd_32122a.h" + +#include "cfg/cfg_lcd_32122a.h" + +#include /* BV() */ +#include +#include + +#include + +#include +#include + +#include +#include + + +/** Number of LCD pages */ +#define LCD_PAGES 4 + +/** Width of an LCD page */ +#define LCD_PAGESIZE (LCD_WIDTH / 2) + +/** + * \name 32122A Commands + * @{ + */ +#define LCD_CMD_DISPLAY_ON 0xAF +#define LCD_CMD_DISPLAY_OFF 0xAE +#define LCD_CMD_STARTLINE 0xC0 +#define LCD_CMD_PAGEADDR 0xB8 +#define LCD_CMD_COLADDR 0x00 +#define LCD_CMD_ADC_LEFT 0xA1 +#define LCD_CMD_ADC_RIGHT 0xA0 +#define LCD_CMD_STATIC_OFF 0xA4 +#define LCD_CMD_STATIC_ON 0xA5 +#define LCD_CMD_DUTY_32 0xA9 +#define LCD_CMD_DUTY_16 0xA8 +#define LCD_CMD_RMW_ON 0xE0 +#define LCD_CMD_RMW_OFF 0xEE +#define LCD_CMD_RESET 0xE2 +/*@}*/ + + +/* Status flags */ +#define LCDF_BUSY BV(7) + +#if CONFIG_LCD_WAIT + /** + * \code + * __ __ + * RS __\____________/__ + * ____________ + * R/W __/ \__ + * _______ + * E1 _____/ \____ + * ______ ____ + * DATA X/ \====/ + * + * \endcode + */ + #define WAIT_LCD \ + do { \ + uint8_t status; \ + LCD_DB_IN; \ + do { \ + LCD_SET_RD; \ + LCD_CLR_A0; \ + LCD_SET_E1; \ + LCD_DELAY_READ; \ + status = LCD_READ; \ + LCD_CLR_E1; \ + LCD_SET_A0; \ + LCD_CLR_RD; \ + } while (status & LCDF_BUSY); \ + LCD_DB_OUT; \ + } while (0) +#else /* CONFIG_LCD_WAIT */ + #define WAIT_LCD do {} while(0) +#endif /* CONFIG_LCD_WAIT */ + + +/** + * Raster buffer to draw into. + * + * Bits in the bitmap bytes have vertical orientation, + * as required by the LCD driver. + */ +static uint8_t lcd_raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]; + +/** Default LCD bitmap */ +struct Bitmap lcd_bitmap; + + +#if CONFIG_LCD_SOFTINT_REFRESH + +/** Timer for regular LCD refresh */ +static Timer lcd_refresh_timer; + +#endif /* CONFIG_LCD_SOFTINT_REFRESH */ + + +INLINE void lcd_32122_cmd(uint8_t cmd, uint8_t chip) +{ + WAIT_LCD; + + /* __ __ + * A0 __\____________/__ + * + * R/W __________________ + * ______ + * E1 _____/ \_____ + * + * DATA --<============>-- + */ + LCD_WRITE(cmd); + //LCD_DB_OUT; + LCD_CLR_A0; + LCD_SET_E(chip); + LCD_DELAY_WRITE; + LCD_CLR_E(chip); + LCD_SET_A0; + //LCD_DB_IN; + +} + + +INLINE uint8_t lcd_32122_read(uint8_t chip) +{ + uint8_t data; + + WAIT_LCD; + + /** + * \code + * __________________ + * A0 __/ \__ + * ____________ + * R/W __/ \__ + * _______ + * E1 _____/ \____ + * + * DATA -------<=====>---- + * + * \endcode + */ + LCD_DB_IN; + //LCD_SET_A0; + LCD_SET_RD; + LCD_SET_E(chip); + LCD_DELAY_READ; + data = LCD_READ; + LCD_CLR_E(chip); + LCD_CLR_RD; + //LCD_CLR_A0; + LCD_DB_OUT; + + return data; +} + +INLINE void lcd_32122_write(uint8_t c, uint8_t chip) +{ + WAIT_LCD; + + /** + * \code + * __________________ + * A0 ___/ \___ + * + * R/W __________________ + * ______ + * E1 _____/ \_____ + * + * DATA -<==============>- + * + * \endcode + */ + LCD_WRITE(c); + //LCD_DB_OUT; + //LCD_SET_A0; + LCD_SET_E(chip); + LCD_DELAY_WRITE; + LCD_CLR_E(chip); + //LCD_CLR_A0; + //LCD_DB_IN; +} + +static void lcd_32122_clear(void) +{ + uint8_t page, j; + + for (page = 0; page < LCD_PAGES; ++page) + { + lcd_32122_cmd(LCD_CMD_COLADDR, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2); + for (j = 0; j < LCD_PAGESIZE; j++) + lcd_32122_write(0, LCDF_E1 | LCDF_E2); + } +} + + +static void lcd_32122_writeRaster(const uint8_t *raster) +{ + uint8_t page, rows; + const uint8_t *right_raster; + + for (page = 0; page < LCD_PAGES; ++page) + { + lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2); + + /* Super optimized lamer loop */ + right_raster = raster + LCD_PAGESIZE; + rows = LCD_PAGESIZE; + do + { + lcd_32122_write(*raster++, LCDF_E1); + lcd_32122_write(*right_raster++, LCDF_E2); + } + while (--rows); + raster = right_raster; + } +} + +#if CONFIG_LCD_SOFTINT_REFRESH + +static void lcd_32122_refreshSoftint(void) +{ + lcd_32122_blitBitmap(&lcd_bitmap); + timer_setDelay(&lcd_refresh_timer, ms_to_ticks(CONFIG_LCD_REFRESH)); + timer_add(&lcd_refresh_timer); +} + +#endif /* CONFIG_LCD_SOFTINT_REFRESH */ + +/** + * Set LCD contrast PWM. + */ +void lcd_32122_setPwm(int duty) +{ + ASSERT(duty >= LCD_MIN_PWM); + ASSERT(duty <= LCD_MAX_PWM); + + pwm_setDuty(LCD_PWM_CH, duty); + pwm_enable(LCD_PWM_CH, true); +} + +/** + * Update the LCD display with data from the provided bitmap. + */ +void lcd_32122_blitBitmap(const Bitmap *bm) +{ + lcd_32122_writeRaster(bm->raster); +} + + +/** + * Initialize LCD subsystem. + * + * \note The PWM used for LCD contrast is initialized in drv/pwm.c + * because it is the same PWM used for output attenuation. + */ +void lcd_32122_init(void) +{ + MOD_CHECK(timer); + + pwm_init(); + + lcd_32122a_hw_bus_init(); + LCD_32122_RESET(); + + lcd_32122_cmd(LCD_CMD_RESET, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_DISPLAY_ON, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_STARTLINE | 0, LCDF_E1 | LCDF_E2); + + + lcd_32122_clear(); + lcd_32122_setPwm(LCD_DEF_PWM); + + gfx_bitmapInit(&lcd_bitmap, lcd_raster, LCD_WIDTH, LCD_HEIGHT); + gfx_bitmapClear(&lcd_bitmap); + +#if CONFIG_LCD_SOFTINT_REFRESH + /* Init IRQ driven LCD refresh */ + timer_setSoftint(&lcd_refresh_timer, (Hook)lcd_32122_refreshSoftint, 0); + timer_setDelay(&lcd_refresh_timer, ms_to_ticks(CONFIG_LCD_REFRESH)); + timer_add(&lcd_refresh_timer); +#endif /* CONFIG_LCD_SOFTINT_REFRESH */ + +} + diff --git a/2.5/bertos/drv/lcd_32122a.h b/2.5/bertos/drv/lcd_32122a.h new file mode 100644 index 00000000..ed9b1b5e --- /dev/null +++ b/2.5/bertos/drv/lcd_32122a.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Displaytech 32122A LCD driver + * + * $WIZ$ module_name = "lcd_32122a" + * $WIZ$ module_hw = "bertos/hw/hw_lcd_32122a.h" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lcd_32122a.h" + * $WIZ$ module_depends = "timer", "pwm" + */ + +#ifndef DRV_LCD_32122A_H +#define DRV_LCD_32122A_H + +/* Display bitmap dims */ +#define LCD_WIDTH 122 +#define LCD_HEIGHT 32 + +#include /* Bitmap */ + +#warning __FILTER_NEXT_WARNING__ +#warning this drive is untested.. + +void lcd_32122_init(void); +void lcd_32122_setPwm(int duty); +void lcd_32122_blitBitmap(const Bitmap *bm); + +#endif /* DRV_LCD_32122A_H */ diff --git a/2.5/bertos/drv/lcd_gfx_hwtest.c b/2.5/bertos/drv/lcd_gfx_hwtest.c new file mode 100644 index 00000000..c07be270 --- /dev/null +++ b/2.5/bertos/drv/lcd_gfx_hwtest.c @@ -0,0 +1,92 @@ +/** + * \file + * + * + * \brief dot-matrix LCD test. + * + * \author Bernie Innocenti + * + */ + + +#warning FIXME: broken test! + +#if 0 + +#include +#include + +#include + +static void magic(struct Bitmap *bitmap, coord_t x, coord_t y) +{ + static const coord_t coords[] = { 120, 34, 90, 90, 30, 90, 0, 34, 60, 0, 90, 90, 0, 34, 120, 34, 30, 90, 60, 0 }; + unsigned int i; + + gfx_moveTo(bitmap, coords[countof(coords)-2]/2 + x, coords[countof(coords)-1]/3 + y); + for (i = 0; i < countof(coords); i += 2) + gfx_lineTo(bitmap, coords[i]/2 + x, coords[i+1]/3 + y); +} + +int main(int argc, char *argv[]) +{ + emul_init(&argc, argv); + lcd_init(); + + coord_t x = 0, y = LCD_WIDTH / 2; + coord_t xdir = +1, ydir = -1; + Bitmap *bm = &lcd_bitmap; + + for(;;) + { + gfx_bitmapClear(bm); + gfx_setClipRect(bm, 0, 0, bm->width, bm->height); + gfx_rectDraw(bm, 10, 10, bm->width-10, bm->height-10); + gfx_setClipRect(bm, 11, 11, bm->width-11, bm->height-11); + magic(bm, x, y); + + x += xdir; + y += ydir; + if (x >= bm->width) xdir = -1; + if (x <= -50) xdir = +1; + if (y >= bm->height) ydir = -1; + if (y <= -50) ydir = +1; + + lcd_blit_bitmap(bm); + emul_idle(); + usleep(10000); + } + + emul_cleanup(); + return 0; +} + +#endif diff --git a/2.5/bertos/drv/lcd_gfx_qt.cpp b/2.5/bertos/drv/lcd_gfx_qt.cpp new file mode 100644 index 00000000..69ff66f4 --- /dev/null +++ b/2.5/bertos/drv/lcd_gfx_qt.cpp @@ -0,0 +1,187 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Custom control for graphics LCD emulation (implementation) + */ + +#include "lcd_gfx_qt.h" +#include +#include +#include // CONFIG_BITMAP_FMT + +#include +#include +#include +#include + +// Display colors +#define LCD_FG_COLOR 0x0, 0x0, 0x0 +#define LCD_BG_COLOR 0xBB, 0xCC, 0xBB + + +EmulLCD::EmulLCD(QWidget *parent) : + QFrame(parent), + fg_color(LCD_FG_COLOR), + bg_brush(QColor(LCD_BG_COLOR)) +{ + // Optimized rendering: we repaint everything anyway + setAttribute(Qt::WA_NoSystemBackground); + + // initialize bitmap + memset(raster, 0xAA, sizeof(raster)); + + // set widget frame + setFrameStyle(QFrame::Panel | QFrame::Sunken); + frame_width = frameWidth(); + + setMinimumSize(WIDTH + frame_width * 2, HEIGHT + frame_width * 2); + + #if CONFIG_EMULLCD_SCALE + QSizePolicy pol = QSizePolicy(QSizePolicy::Expanding, QSizePolicy::Preferred, QSizePolicy::Frame); + pol.setHeightForWidth(true); + #else + QSizePolicy pol = QSizePolicy(QSizePolicy::Fixed, QSizePolicy::Fixed, QSizePolicy::Frame); + #endif + setSizePolicy(pol); +} + + +EmulLCD::~EmulLCD() +{ + // nop +} + +#if CONFIG_EMULLCD_SCALE +int EmulLCD::heightForWidth(int w) const +{ + int h; + + w -= frame_width * 2; + h = (w * HEIGHT + WIDTH/2) / WIDTH; + h += frame_width * 2; + + return h; +} +#endif // CONFIG_EMULLCD_SCALE + +void EmulLCD::paintEvent(QPaintEvent * /*event*/) +{ + QPainter p(this); + QImage img(raster, WIDTH, HEIGHT, QImage::Format_Mono); + + #if CONFIG_EMULLCD_SCALE + int w = width() - frame_width * 2; + int h = height() - frame_width * 2; + if ((w != WIDTH) || (h != HEIGHT)) + { + p.scale((qreal)w / WIDTH, (qreal)h / HEIGHT); + //p.setRenderHint(QPainter::SmoothPixmapTransform); + } + #endif // CONFIG_EMULLCD_SCALE + + p.setBackgroundMode(Qt::OpaqueMode); + p.setBackground(bg_brush); + p.setPen(fg_color); + + p.drawImage(QPoint(frame_width, frame_width), img); +} + +void EmulLCD::writeRaster(uint8_t *new_raster) +{ +#if CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB + + // Straight copy + //memcpy(raster, new_raster, sizeof(raster)); + + // Inverting copy + for (int i = 0; i < (int)sizeof(raster); ++i) + raster[i] = ~new_raster[i]; + +#elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB + + // Rotation + inversion + for (int y = 0; y < HEIGHT; ++y) + { + for (int xbyte = 0; xbyte < WIDTH/8; ++xbyte) + { + uint8_t v = 0; + for (int xbit = 0; xbit < 8; ++xbit) + v |= (new_raster[(xbyte * 8 + xbit) + (y / 8) * WIDTH] & (1 << (y%8)) ) + ? (1 << (7 - xbit)) : 0; + + raster[y * ((WIDTH + 7) / 8) + xbyte] = v; + } + } +#else + #error Unsupported bitmap format +#endif + + repaint(); +} + + + +#include +#include + +DECLARE_WALL(wall_before_raster, WALL_SIZE) +/** + * Raster buffer to draw into. + * + * Bits in the bitmap bytes have vertical orientation, + * as required by the LCD driver. + */ +static uint8_t lcd_raster[RAST_SIZE(EmulLCD::WIDTH, EmulLCD::HEIGHT)]; +DECLARE_WALL(wall_after_raster, WALL_SIZE) + + + + +/*extern "C"*/ void lcd_gfx_qt_init(Bitmap *lcd_bitmap) +{ + //FIXME INIT_WALL(wall_before_raster); + //FIXME INIT_WALL(wall_after_raster); + gfx_bitmapInit(lcd_bitmap, lcd_raster, EmulLCD::WIDTH, EmulLCD::HEIGHT); + gfx_bitmapClear(lcd_bitmap); +} + +/*extern "C"*/ void lcd_gfx_qt_blitBitmap(const Bitmap *bm) +{ + //FIXME CHECK_WALL(wall_before_raster); + //FIXME CHECK_WALL(wall_after_raster); + emul->emulLCD->writeRaster(bm->raster); +} + +#include "lcd_gfx_qt_moc.cpp" + diff --git a/2.5/bertos/drv/lcd_gfx_qt.h b/2.5/bertos/drv/lcd_gfx_qt.h new file mode 100644 index 00000000..9840f24c --- /dev/null +++ b/2.5/bertos/drv/lcd_gfx_qt.h @@ -0,0 +1,98 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Custom control for graphics LCD emulation (interface) + */ + +#ifndef DRV_LCD_GFX_QT_H +#define DRV_LCD_GFX_QT_H + +// uint8_t +#include +#include + +#include +#include + +#define LCD_WIDTH 128 + +// fwd decls +class QSizePolicy; +class QPaintEvent; +class QResizeEvent; + +#define CONFIG_EMULLCD_SCALE 1 + +class EmulLCD : public QFrame +{ + Q_OBJECT + +public: +// Attributes + enum { WIDTH = 128, HEIGHT = 64 }; + +// Construction + EmulLCD(QWidget *parent = 0); + virtual ~EmulLCD(); + +// Base class overrides +protected: + virtual void paintEvent(QPaintEvent *event); + + #if CONFIG_EMULLCD_SCALE + virtual int heightForWidth(int w) const; + #endif + +// Operations +public: + void writeRaster(uint8_t *raster); + +// Implementation +protected: + /// Frame thickness + int frame_width; + + /// Brushes for painting the LCD + QColor fg_color; + QBrush bg_brush; + + /// Pixel storage + unsigned char raster[(WIDTH + 7 / 8) * HEIGHT]; +}; + + +void lcd_gfx_qt_init(Bitmap *lcd_bitmap); +void lcd_gfx_qt_blitBitmap(const Bitmap *bm); + +#endif // DRV_LCD_GFX_QT_H diff --git a/2.5/bertos/drv/lcd_hd44.c b/2.5/bertos/drv/lcd_hd44.c new file mode 100644 index 00000000..5bce8c6d --- /dev/null +++ b/2.5/bertos/drv/lcd_hd44.c @@ -0,0 +1,429 @@ +/** + * \file + * + * + * \brief LM044L type LCD hardware module (impl.) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "lcd_hd44.h" + +#include "hw/hw_lcd_hd44.h" + +#include "cfg/cfg_arch.h" + +#include + +#warning FIXME: Revise and refactor this code. + +#if defined(LCD_READ_H) && defined(LCD_READ_L) && defined(LCD_WRITE_H) && defined(LCD_WRITE_L) + #define CONFIG_LCD_4BIT 1 +#elif defined(LCD_READ) && defined(LCD_WRITE) + #define CONFIG_LCD_4BIT 0 +#else + #error Incomplete or missing LCD_READ/LCD_WRITE macros +#endif + +/** Flag di stato del display */ +#define LCDF_BUSY BV(7) + +#if CONFIG_LCD_ADDRESS_FAST == 1 +#define lcd_address(x) lcd_address[x] +/** + * Addresses of LCD display character positions, expanded + * for faster access (DB7 = 1). + */ +static const uint8_t lcd_address[] = +{ + /* row 0 */ + 0x80, 0x81, 0x82, 0x83, + 0x84, 0x85, 0x86, 0x87, + 0x88, 0x89, 0x8A, 0x8B, + 0x8C, 0x8D, 0x8E, 0x8F, +#if CONFIG_LCD_COLS > 16 + 0x90, 0x91, 0x92, 0x93, +#endif + + /* row 1 */ + 0xC0, 0xC1, 0xC2, 0xC3, + 0xC4, 0xC5, 0xC6, 0xC7, + 0xC8, 0xC9, 0xCA, 0xCB, + 0xCC, 0xCD, 0xCE, 0xCF, +#if CONFIG_LCD_COLS > 16 + 0xD0, 0xD1, 0xD2, 0xD3, +#endif + +#if CONFIG_LCD_ROWS > 2 + /* row 2 */ + 0x94, 0x95, 0x96, 0x97, + 0x98, 0x99, 0x9A, 0x9B, + 0x9C, 0x9D, 0x9E, 0x9F, + 0xA0, 0xA1, 0xA2, 0xA3, +#if CONFIG_LCD_COLS > 16 + 0xA4, 0xA5, 0xA6, 0xA7, +#endif + + /* row 3 */ + 0xD4, 0xD5, 0xD6, 0xD7, + 0xD8, 0xD9, 0xDA, 0xDB, + 0xDC, 0xDD, 0xDE, 0xDF, + 0xE0, 0xE1, 0xE2, 0xE3, +#if CONFIG_LCD_COLS > 16 + 0xE4, 0xE5, 0xE6, 0xE7, +#endif + +#endif /* CONFIG_LCD_ROWS > 2 */ +}; + +STATIC_ASSERT(countof(lcd_address) == CONFIG_LCD_ROWS * CONFIG_LCD_COLS); +#else /* CONFIG_LCD_ADDRESS_FAST == 0 */ + +static const uint8_t col_address[] = +{ + 0x80, + 0xC0, +#if CONFIG_LCD_ROWS > 2 + 0x94, + 0xD4 +#endif +}; +STATIC_ASSERT(countof(col_address) == CONFIG_LCD_ROWS); +/** + * Addresses of LCD display character positions, calculated runtime to save RAM + */ +static uint8_t lcd_address(uint8_t addr) +{ + return col_address[addr / CONFIG_LCD_COLS] + addr % CONFIG_LCD_COLS; +} +#endif /* CONFIG_LCD_ADDRESS_FAST */ + +/** + * Current display position. We remember this to optimize + * LCD output by avoiding to set the address every time. + */ +static lcdpos_t lcd_current_addr; + + +#if !defined(ARCH_EMUL) || !(ARCH & ARCH_EMUL) +/* __________________ + * RS + * + * R/W __________________ + * _______ + * ENA _____/ \____ + * + * DATA -<================ + */ +INLINE void lcd_dataWrite(uint8_t data) +{ +#if CONFIG_LCD_4BIT + /* Write high nibble */ + LCD_WRITE_H(data); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + + /* Write low nibble */ + LCD_WRITE_L(data); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + +#else /* !CONFIG_LCD_4BIT */ + + /* Write data */ + LCD_WRITE(data); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + +#endif /* !CONFIG_LCD_4BIT */ +} + +/* __________________ + * RS + * ____________ + * R/W __/ \__ + * _______ + * ENA _____/ \____ + * ______ ____ + * DATA X/ \====/ + */ +INLINE uint8_t lcd_dataRead(void) +{ + uint8_t data; + + LCD_SET_RD; + LCD_DB_IN; /* Set bus as input! */ + LCD_DELAY_READ; + +#if CONFIG_LCD_4BIT + + /* Read high nibble */ + LCD_SET_E; + LCD_DELAY_READ; + data = LCD_READ_H; + LCD_CLR_E; + LCD_DELAY_READ; + + /* Read low nibble */ + LCD_SET_E; + LCD_DELAY_READ; + data |= LCD_READ_L; + LCD_CLR_E; + LCD_DELAY_READ; + +#else /* !CONFIG_LCD_4BIT */ + + /* Read data */ + LCD_SET_E; + LCD_DELAY_READ; + data = LCD_READ; + LCD_CLR_E; + LCD_DELAY_READ; + +#endif /* !CONFIG_LCD_4BIT */ + + LCD_CLR_RD; + LCD_DB_OUT; /* Reset bus as output! */ + + return data; +} + +/* ___ __ + * RS \___________/ + * + * READ __________________ + * _______ + * ENA _____/ \____ + * + * DATA --<=============== + */ +INLINE void lcd_regWrite(uint8_t data) +{ + LCD_CLR_RS; + lcd_dataWrite(data); + LCD_SET_RS; +} + +/* __ _ + * RS \_____________/ + * ___________ + * READ ___/ \__ + * _______ + * ENA _____/ \____ + * ______ ____ + * DATA X/ \====/ + */ +INLINE uint8_t lcd_regRead(void) +{ + uint8_t data; + + LCD_CLR_RS; + data = lcd_dataRead(); + LCD_SET_RS; + return data; +} + +#if CONFIG_LCD_4BIT + +INLINE void lcd_mode4Bit(void) +{ + LCD_CLR_RS; + + LCD_WRITE_H(LCD_CMD_SETFUNC); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + + LCD_SET_RS; +} + +#endif /* CONFIG_LCD_4BIT */ + +#else /* ARCH_EMUL */ + +extern void Emul_LCDWriteReg(uint8_t d); +extern uint8_t Emul_LCDReadReg(void); +extern void Emul_LCDWriteData(uint8_t d); +extern uint8_t Emul_LCDReadData(void); + +#define lcd_regWrite(d) Emul_LCDWriteReg(d) +#define lcd_regRead(d) Emul_LCDReadReg() +#define lcd_dataWrite(d) Emul_LCDWriteData(d) +#define lcd_dataRead(d) Emul_LCDReadData() + +#endif /* ARCH_EMUL */ + + +/** + * Wait until the LCD busy flag clears. + */ +void lcd_waitBusy(void) +{ + for (;;) + { + uint8_t val = lcd_regRead(); + if (!(val & LCDF_BUSY)) + break; + } +} + + +/** + * Move the cursor to \a addr, only if not already there. + */ +void lcd_moveTo(uint8_t addr) +{ + if (addr != lcd_current_addr) + { + lcd_waitBusy(); + lcd_regWrite(lcd_address(addr)); + lcd_current_addr = addr; + } +} + + +/** + * Write a value in LCD data register, waiting for the busy flag. + */ +void lcd_setReg(uint8_t val) +{ + lcd_waitBusy(); + lcd_regWrite(val); +} + +#include +/** + * Write the character \a c on display address \a addr. + * + * NOTE: argh, the HD44 lcd type is a bad beast: our + * move/write -> write optimization requires this mess + * because display lines are interleaved! + */ +void lcd_putc(uint8_t addr, uint8_t c) +{ + if (addr != lcd_current_addr) + lcd_setReg(lcd_address(addr)); + + lcd_waitBusy(); + lcd_dataWrite(c); + lcd_current_addr = addr + 1; + + /* If we are at end of display wrap the address to 0 */ + if (lcd_current_addr == CONFIG_LCD_COLS * CONFIG_LCD_ROWS) + lcd_current_addr = 0; + + /* If we are at the end of a row put the cursor at the beginning of the next */ + if (!(lcd_current_addr % CONFIG_LCD_COLS)) + lcd_setReg(lcd_address(lcd_current_addr)); +} + + +/** + * Remap the glyph of a character. + * + * glyph - bitmap of 8x8 bits. + * code - must be 0-7 for the Hitachi LCD-II controller. + */ +void lcd_remapChar(const char *glyph, char code) +{ + int i; + + /* Set CG RAM address */ + lcd_setReg((uint8_t)((1<<6) | (code << 3))); + + /* Write bitmap data */ + for (i = 0; i < 8; i++) + { + lcd_waitBusy(); + lcd_dataWrite(glyph[i]); + } + + /* Move back to original address */ + lcd_setReg(lcd_address(lcd_current_addr)); +} + + +#if 0 /* unused */ +void lcd_remapfont(void) +{ + static const char lcd_glyphs[8] = + { + 0x04, 0x0E, 0x15, 0x04, 0x04, 0x04, 0x04, 0x00 /* up arrow */ + }; + int i; + + for (i = 0; i < 15; i++) + lcd_remapChar(i, bernie_char); + + + lcd_setAddr(lcd_DefLayer, 0); + for (i = 0; i < 80; i++) + lcd_putCharUnlocked(i); +} +#endif /* unused */ + +void lcd_hw_init(void) +{ + lcd_hd44_hw_bus_init(); + + timer_delay(50); + +#if CONFIG_LCD_4BIT + lcd_regWrite(LCD_CMD_SET8BIT); + lcd_mode4Bit(); + timer_delay(2); +#endif /* CONFIG_LCD_4BIT */ + + lcd_regWrite(LCD_CMD_SETFUNC); + timer_delay(2); + + lcd_regWrite(LCD_CMD_DISPLAY_ON); + timer_delay(2); + + lcd_regWrite(LCD_CMD_CLEAR); + timer_delay(2); + +#if !CONFIG_LCD_4BIT + lcd_regWrite(LCD_CMD_RESET_DDRAM); // 4 bit mode doesn't allow char reprogramming +#endif + lcd_regWrite(LCD_CMD_DISPLAYMODE); + timer_delay(2); +} + + diff --git a/2.5/bertos/drv/lcd_hd44.h b/2.5/bertos/drv/lcd_hd44.h new file mode 100644 index 00000000..b2ff8f0c --- /dev/null +++ b/2.5/bertos/drv/lcd_hd44.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Hitachi HD44780 and clones LCD module. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "lcd_hd44" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lcd_hd44.h" + * $WIZ$ module_hw = "bertos/hw/hw_lcd_hd44.h" + */ + +#ifndef DRV_LCD_HD44_H +#define DRV_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" +#include /* For stdint types */ + +/** + * \name Values for CONFIG_LCD_ROWS. + * + * Select the number of rows which are available + * on the HD44780 Display. + * $WIZ$ lcd_hd44_rows = "LCD_HD44_ROWS_2", "LCD_HD44_ROWS_4" + */ +#define LCD_HD44_ROWS_2 2 +#define LCD_HD44_ROWS_4 4 + +/** + * \name Values for CONFIG_LCD_COLS. + * + * Select the number of columns which are available + * on the HD44780 Display. + * $WIZ$ lcd_hd44_cols = "LCD_HD44_COLS_16", "LCD_HD44_COLS_20" + */ +#define LCD_HD44_COLS_16 16 +#define LCD_HD44_COLS_20 20 + +/** + * \name Hitachi HD44 commands. + * \{ + */ +#define LCD_CMD_DISPLAY_INI 0x30 + +#if CONFIG_LCD_4BIT + #define LCD_CMD_SETFUNC 0x28 /**< 4 bits, 2 lines, 5x7 dots */ +#else + #define LCD_CMD_SETFUNC 0x38 /**< 8 bits, 2 lines, 5x7 dots */ +#endif + +#define LCD_CMD_SET8BIT 0x30 +#define LCD_CMD_DISPLAY_ON 0x0F /**< Switch on display */ +#define LCD_CMD_DISPLAY_OFF 0x08 /**< Switch off display */ +#define LCD_CMD_CLEAR 0x01 /**< Clear display */ +#define LCD_CMD_CURSOR_BLOCK 0x0D /**< Show cursor (block) */ +#define LCD_CMD_CURSOR_LINE 0x0F /**< Show cursor (line) */ +#define LCD_CMD_CURSOR_OFF 0x0C /**< Hide cursor */ +#define LCD_CMD_DISPLAYMODE 0x06 +#define LCD_CMD_SET_CGRAMADDR 0x40 +#define LCD_CMD_RESET_DDRAM 0x80 +#define LCD_CMD_SET_DDRAMADDR 0x80 +#define LCD_CMD_DISPLAY_SHIFT 0x18 +#define LCD_CMD_MOVESHIFT_LEFT 0x00 +#define LCD_CMD_MOVESHIFT_RIGHT 0x04 +/*\}*/ + +/** Type for combined LCD cursor position (x,y). */ +typedef uint8_t lcdpos_t; + +void lcd_waitBusy(void); +void lcd_moveTo(uint8_t addr); +void lcd_setReg(uint8_t val); +void lcd_putc(uint8_t a, uint8_t c); +void lcd_remapChar(const char *glyph, char code); +void lcd_hw_init(void); +void lcd_hw_test(void); + +#endif /* DRV_LCD_HD44_H */ diff --git a/2.5/bertos/drv/lcd_hd44_hwtest.c b/2.5/bertos/drv/lcd_hd44_hwtest.c new file mode 100644 index 00000000..19c8d9f6 --- /dev/null +++ b/2.5/bertos/drv/lcd_hd44_hwtest.c @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \brief LM044L type LCD hardware module (impl.) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "lcd_hd44.h" +#include "hw/hw_lcd_hd44.h" + +#include +#include + +#warning TODO:Refactor this test to comply whit BeRTOS test policy. + +#if UNIT_TEST + +void lcd_hw_test(void) +{ + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 3); + timer_delay(1); + kprintf("3 -> %02X\n", lcd_regRead()); + timer_delay(1); + + for (int i = 0; i < 10; i++) + { + lcd_dataWrite('c'); + timer_delay(1); + kprintf("addr = %02X\n", lcd_regRead()); + timer_delay(1); + } + + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x4a); + timer_delay(1); + kprintf("4A -> %02X\n", lcd_regRead()); + timer_delay(1); + + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x52); + timer_delay(1); + kprintf("52 -> %02X\n", lcd_regRead()); + timer_delay(1); + + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x1F); + timer_delay(1); + kprintf("1F -> %02X\n", lcd_regRead()); + timer_delay(1); +} + + + +#include +#include + +int main(void) +{ + lcd_hw_test(); + + for(;;) + { + } + + return 0; +} + +#endif diff --git a/2.5/bertos/drv/lcd_lm44_qt.cpp b/2.5/bertos/drv/lcd_lm44_qt.cpp new file mode 100644 index 00000000..96bd3098 --- /dev/null +++ b/2.5/bertos/drv/lcd_lm44_qt.cpp @@ -0,0 +1,362 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Custom Qt widget for emulating a graphics LCD display (implementation) + */ + +/*#* + *#* $Log$ + *#* Revision 1.1 2006/01/16 03:51:35 bernie + *#* Add LCD Qt emulator. + *#* + *#*/ + +#include +#include +#include +#include +#include "EmulLCD.h" +#include "Emul.h" + + +// Display colors +#define LCD_FG_COLOR 0x0, 0x0, 0x0 +#define LCD_BG_COLOR 0xBB, 0xCC, 0xBB + + +EmulLCD::EmulLCD(QWidget *parent, const char *name) : + QFrame(parent, name, WRepaintNoErase | WResizeNoErase), + lcd_font("courier", 18), + fg_color(LCD_FG_COLOR), + bg_color(LCD_BG_COLOR), + cr_row(0), + cr_col(0), + cgramaddr(-1), + show_cursor(true) +{ + // initialize DDRAM + memcpy(ddram, + "01234567890123456789" + "abcdefghijhlmnopqrst" + "ABCDEFGHIJKLMNOPQRST" + "!@#$%^&*()_+|{}':?><", + sizeof(ddram)); + + // setup font + lcd_font.setFixedPitch(true); + setFont(lcd_font); + + // get exact font size + QFontMetrics fm(lcd_font); + font_width = fm.width(QChar(' ')); + font_height = fm.height(); + + // set widget frame + setFrameStyle(QFrame::Panel | QFrame::Sunken); +// setLineWidth(2); + frame_width = frameWidth(); +} + + +EmulLCD::~EmulLCD() +{ + // nop +} + + +QSizePolicy EmulLCD::sizePolicy() const +{ + return QSizePolicy(QSizePolicy::Fixed, QSizePolicy::Fixed, false); +} + + +QSize EmulLCD::sizeHint() const +{ + return QSize( + font_width * COLS + frame_width * 2, + font_height * ROWS + frame_width * 2); +} + + +void EmulLCD::drawContents(QPainter *p) +{ + RedrawText(*p); +} + + +void EmulLCD::SetPainter(QPainter & p) +{ + p.setBackgroundMode(OpaqueMode); + p.setPen(fg_color); + p.setBackgroundColor(bg_color); +} + + +void EmulLCD::RedrawText(QPainter & p) +{ + int r, c; + + SetPainter(p); + + for (r = 0; r < ROWS; r++) + for (c = 0; c < COLS; c++) + PrintChar(p, r, c); +} + + +void EmulLCD::PrintChar(QPainter & p, int row, int col) +{ + // Fetch char from DD RAM + unsigned char c = ddram[row][col]; + + // Map some Hitachi characters to ISO Latin1 + switch(c) + { + case 0xDF: + c = 0xBA; // "degrees" glyph + break; + + case 0xE4: + c = 0xB5; // "micro" glyph + break; + + default: // all others + break; + } + + // Draw char on display + int x = col * font_width + frame_width; + int y = row * font_height + frame_width; + bool restore_colors = false; + + if (show_cursor && (row == cr_row) && (col == cr_col)) + { + // Exchange FG/BG colors + p.setPen(bg_color); + p.setBackgroundColor(fg_color); + restore_colors = true; + } + + p.drawText(x, y, x + font_width, y + font_height, 0 /*tf*/, + QString(QChar(c)), 1); + + if (restore_colors) + { + // Restore FG/BG colors + p.setPen(fg_color); + p.setBackgroundColor(bg_color); + } +} + + +void EmulLCD::MoveCursor(int r, int c) +{ + // Save old cursor position + int old_row = cr_row; + int old_col = cr_col; + + // Move the cursor + cgramaddr = -1; + cr_row = r; + cr_col = c; + + if (show_cursor && (old_col != cr_col || old_row != cr_row)) + { + QPainter p(this); + SetPainter(p); + + // Draw new cursor + PrintChar(p, cr_row, cr_col); + + // Erase old cursor + PrintChar(p, old_row, old_col); + } +} + + +void EmulLCD::ShowCursor(bool show) +{ + show_cursor = show; + + // Draw (or erase) cursor + QPainter p(this); + SetPainter(p); + PrintChar(p, cr_row, cr_col); +} + + +void EmulLCD::AdvanceCursor() +{ + // Move the cursor + if (cr_col == COLS - 1) + { + if (cr_row == ROWS - 1) + MoveCursor(0, 0); + else + MoveCursor(cr_row + 1, 0); + } + else + MoveCursor(cr_row, cr_col + 1); +} + + +void EmulLCD::PutChar(unsigned char c) +{ + if (cgramaddr != -1) + { + // Write data in CGRAM + cgram[cgramaddr] = c; + + // Auto increment CGRAM address + cgramaddr = (cgramaddr + 1) & 0x3F; + } + else + { + // Writing in DDRAM + ddram[cr_row][cr_col] = c; + + // Update display + { + QPainter p(this); + SetPainter(p); + PrintChar(p, cr_row, cr_col); + } + AdvanceCursor(); + } +} + + +char EmulLCD::GetChar() +{ + char c = ddram[cr_row][cr_col]; + AdvanceCursor(); + return c; +} + + +void EmulLCD::Clear() +{ + memset(ddram, ' ', sizeof(ddram)); + cr_row = cr_col = 0; + + QPainter p(this); + RedrawText(p); +} + + +void EmulLCD::SetCGRamAddr(unsigned char addr) +{ + cgramaddr = addr & (sizeof(cgram) - 1); +} + + +// Hitachi LM044L register-level emulation + +#define INI_DISPLAY 0x30 +#define INI_OP_DISP 0x38 /* 8 bits, 2 lines, 5x7 dots */ +#define ON_DISPLAY 0x0F /* Switch on display */ +#define OFF_DISPLAY 0x08 /* Switch off display */ +#define CLR_DISPLAY 0x01 /* Clear display */ +#define CURSOR_BLOCK 0x0D /* Show cursor (block) */ +#define CURSOR_LINE 0x0F /* Show cursor (line) */ +#define CURSOR_OFF 0x0C /* Hide cursor */ +#define MODE_DISPL 0x06 +#define SHIFT_DISPLAY 0x18 +#define MOVESHIFT_LEFT 0x00 +#define MOVESHIFT_RIGHT 0x04 +#define LCD_CGRAMADDR (1<<6) +#define LCD_DDRAMADDR (1<<7) + + +extern "C" void Emul_LCDWriteReg(unsigned char d) +{ + static const unsigned char lcd_rowaddress[EmulLCD::ROWS] = { 0x80, 0xC0, 0x94, 0xD4 }; + + switch(d) + { + case CLR_DISPLAY: + emul->emulLCD->Clear(); + break; + + case CURSOR_BLOCK: + case CURSOR_LINE: + emul->emulLCD->ShowCursor(true); + break; + + case CURSOR_OFF: + emul->emulLCD->ShowCursor(false); + break; + + default: + // Set DDRAM address? + if (d & LCD_DDRAMADDR) + { + for (int i = 0; i < EmulLCD::ROWS; i++) + { + if ((d >= lcd_rowaddress[i]) && (d < lcd_rowaddress[i] + EmulLCD::COLS)) + { + emul->emulLCD->MoveCursor(i, d - lcd_rowaddress[i]); + break; + } + } + } + else if (d & LCD_CGRAMADDR) + emul->emulLCD->SetCGRamAddr(d); + break; + } +} + + +extern "C" unsigned char Emul_LCDReadReg(void) +{ + return 0; /* This LCD model is never busy ;-) */ +} + + +extern "C" void Emul_LCDWriteData(unsigned char d) +{ + emul->emulLCD->PutChar(d); +} + + +extern "C" unsigned char Emul_LCDReadData(void) +{ + return emul->emulLCD->GetChar(); +} + +#include "EmulLCD.moc" + diff --git a/2.5/bertos/drv/lcd_lm44_qt.h b/2.5/bertos/drv/lcd_lm44_qt.h new file mode 100644 index 00000000..a3fd1cf1 --- /dev/null +++ b/2.5/bertos/drv/lcd_lm44_qt.h @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Custom Qt widget for emulating a graphics LCD display (implementation) + */ + +#ifndef EMULLCD_H +#define EMULLCD_H + +#include +#include +#include + +// fwd decls +class QSizePolicy; +class QPaintEvent; +class QResizeEvent; + +/** + * Qt widget to emulate a dot-matrix LCD display. + */ +class EmulLCD : public QFrame +{ + Q_OBJECT + +public: +// Attributes + enum { COLS = 20, ROWS = 4 }; + +// Construction + EmulLCD(QWidget *parent = 0, const char *name = 0); + virtual ~EmulLCD(); + +// Base class overrides +protected: + virtual QSizePolicy sizePolicy() const; + virtual QSize sizeHint() const; + virtual void drawContents(QPainter *p); + +// Operations +public: + void MoveCursor (int col, int row); + void ShowCursor (bool show = true); + void PutChar (unsigned char c); + char GetChar (); + void Clear (); + void SetCGRamAddr (unsigned char addr); + +// Implementation +protected: + void SetPainter(QPainter & p); + void RedrawText(QPainter & p); + void PrintChar(QPainter & p, int row, int col); + void AdvanceCursor(); + + QFont lcd_font; ///< Display character font + QColor fg_color, bg_color; ///< LCD colors + int font_width, font_height; ///< Font dimensions + int frame_width; ///< Frame width (and height) + int cr_row, cr_col; ///< Cursor position + int cgramaddr; ///< CGRAM Address (-1 disabled) + unsigned char ddram[ROWS][COLS];///< Display data RAM + unsigned char cgram[8*8]; ///< CGRAM + bool show_cursor; ///< Cursor enabled? +}; + +#endif // !defined(EMULLCD_H) + diff --git a/2.5/bertos/drv/lcd_rit128x96.c b/2.5/bertos/drv/lcd_rit128x96.c new file mode 100644 index 00000000..f917cbb7 --- /dev/null +++ b/2.5/bertos/drv/lcd_rit128x96.c @@ -0,0 +1,211 @@ +/** + * \file + * + * + * \brief OLED-RIT-128x96 (P14201) graphic display driver + * + * \author Andrea Righi + */ + +#include "lcd_rit128x96.h" + +#include "hw/hw_rit128x96.h" + +#include +#include + + +/* + * Hard-coded command initialization sequence. + * + * NOTE: the first byte is the size of the command. + */ +static const uint8_t init_cmd[] = +{ + /* Unlock commands */ + 3, 0xfd, 0x12, 0xe3, + /* Display off */ + 2, 0xae, 0xe3, + /* Icon off */ + 3, 0x94, 0, 0xe3, + /* Multiplex ratio */ + 3, 0xa8, 95, 0xe3, + /* Contrast */ + 3, 0x81, 0xb7, 0xe3, + /* Pre-charge current */ + 3, 0x82, 0x3f, 0xe3, + /* Display Re-map */ + 3, 0xa0, 0x52, 0xe3, + /* Display Start Line */ + 3, 0xa1, 0, 0xe3, + /* Display Offset */ + 3, 0xa2, 0x00, 0xe3, + /* Display Mode Normal */ + 2, 0xa4, 0xe3, + /* Phase Length */ + 3, 0xb1, 0x11, 0xe3, + /* Frame frequency */ + 3, 0xb2, 0x23, 0xe3, + /* Front Clock Divider */ + 3, 0xb3, 0xe2, 0xe3, + /* Set gray scale table */ + 17, 0xb8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3, + /* Second pre-charge period */ + 3, 0xbb, 0x01, 0xe3, + /* Pre-charge voltage */ + 3, 0xbc, 0x3f, 0xe3, + /* Display ON */ + 2, 0xaf, 0xe3, +}; + +/* + * Hard-coded command shutdown sequence. + */ +static const uint8_t exit_cmd[] = +{ + /* Display OFF */ + 0xae, 0xe3 +}; + +/* + * Hard-coded horizontal increment command. + */ +static const uint8_t horizontal_inc[] = +{ + 0xa0, 0x52 +}; + +/** + * Write a sequence of data bytes to the LCD controller + */ +static void lcd_dataWrite(const uint8_t *buf, size_t count) +{ + while (count--) + LCD_WRITE(*buf++); +} + +/* Turn on the OLED display */ +void rit128x96_on(void) +{ + unsigned int i; + + /* Loop through the SSD1329 controller initialization sequence */ + LCD_SET_COMMAND(); + for (i = 0; i < sizeof(init_cmd); i += init_cmd[i] + 1) + lcd_dataWrite(init_cmd + i + 1, init_cmd[i] - 1); +} + +/* Turn off the OLED display */ +void rit128x96_off(void) +{ + LCD_SET_COMMAND(); + lcd_dataWrite(exit_cmd, sizeof(exit_cmd)); +} + +static void lcd_start_blit(uint8_t x, uint8_t y, uint8_t width, uint8_t height) +{ + uint8_t buffer[3]; + + ASSERT((x + width) <= LCD_WIDTH); + ASSERT((y + height) <= LCD_HEIGHT); + + /* Enter command mode */ + LCD_SET_COMMAND(); + + buffer[0] = 0x15; + buffer[1] = x / 2; + buffer[2] = (x + width - 2) / 2; + lcd_dataWrite(buffer, 3); + + buffer[0] = 0x75; + buffer[1] = y; + buffer[2] = y + height - 1; + lcd_dataWrite(buffer, 3); + lcd_dataWrite((const uint8_t *)&horizontal_inc, sizeof(horizontal_inc)); +} + +/* Refresh a raw image on screen */ +void rit128x96_blitRaw(const uint8_t *data, + uint8_t x, uint8_t y, uint8_t width, uint8_t height) +{ + lcd_start_blit(x, y, width, height); + /* + * Enter data mode and send the encoded image data to the OLED display, + * over the SSI bus. + */ + LCD_SET_DATA(); + while (height--) + { + /* Write an entire row at once */ + lcd_dataWrite(data, width / 2); + data += width / 2; + } +} + +/* Refresh a bitmap on screen */ +void rit128x96_blitBitmap(const Bitmap *bm) +{ + uint8_t lcd_row[bm->width / 2]; + uint8_t mask; + int i, l; + + lcd_start_blit(0, 0, bm->width, bm->height); + /* + * Enter data mode and send the encoded image data to the OLED display, + * over the SSI bus. + */ + LCD_SET_DATA(); + for (l = 0; l < bm->height / 8; l++) + { + for (mask = 1; mask; mask <<= 1) + { + for (i = 0; i < bm->width; i++) + { + if (bm->raster[l * bm->width + i] & mask) + lcd_row[i / 2] |= i & 1 ? 0x0f : 0xf0; + else + lcd_row[i / 2] &= i & 1 ? 0xf0 : 0x0f; + } + /* Write an entire row at once */ + lcd_dataWrite(lcd_row, sizeof(lcd_row)); + } + } +} + +/* Initialize the OLED display */ +void rit128x96_init(void) +{ + /* Initialize the communication bus */ + lcd_rit128x96_hw_bus_init(); + + /* Turn on the OLED display */ + rit128x96_on(); +} diff --git a/2.5/bertos/drv/lcd_rit128x96.h b/2.5/bertos/drv/lcd_rit128x96.h new file mode 100644 index 00000000..04b8e388 --- /dev/null +++ b/2.5/bertos/drv/lcd_rit128x96.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief OLED-RIT-128x96 (P14201) graphic display driver + * + * $WIZ$ module_name = "lcd_rit128x96" + * $WIZ$ module_hw = "bertos/hw/hw_rit128x96.h" + */ + +#ifndef LCD_LM3S_H +#define LCD_LM3S_H + +#include /* Bitmap */ + +#include + +#define LCD_WIDTH 128 +#define LCD_HEIGHT 96 + +void rit128x96_blitRaw(const uint8_t *data, + uint8_t x, uint8_t y, uint8_t width, uint8_t height); +void rit128x96_blitBitmap(const Bitmap *bm); +void rit128x96_on(void); +void rit128x96_off(void); +void rit128x96_init(void); + +#endif /* LCD_LM3S_H */ diff --git a/2.5/bertos/drv/lcd_text.c b/2.5/bertos/drv/lcd_text.c new file mode 100644 index 00000000..ff480776 --- /dev/null +++ b/2.5/bertos/drv/lcd_text.c @@ -0,0 +1,458 @@ +/** + * \file + * + * + * \brief Generic text LCD driver (impl.). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "lcd_text.h" +#include "lcd_hd44.h" + +#include // BV() +#include + +#include // timer_delay() + +#include // _formatted_write() +#include // LIST_EMPTY() + +#include // strlen() + + +/** Maximum number of layers. */ +#define LCD_LAYERS 6 + +#if CONFIG_KERN + #include + /** Semaphore to arbitrate access to the display. */ + static struct Semaphore lcd_semaphore; + #define LOCK_LCD sem_obtain(&lcd_semaphore) + #define UNLOCK_LCD sem_release(&lcd_semaphore) +#else /* !CONFIG_KERN */ + #define LOCK_LCD do {} while (0) + #define UNLOCK_LCD do {} while (0) +#endif /* !CONFIG_KERN */ + +DECLARE_LIST_TYPE(Layer); + +Layer *lcd_DefLayer; +static Layer lcd_LayersPool[LCD_LAYERS]; +static LIST_TYPE(Layer) lcd_Layers; +static LIST_TYPE(Layer) lcd_FreeLayers; + +/** + * Current cursor status. + * + * One of LCD_CMD_CURSOR_OFF, LCD_CMD_CURSOR_BLOCK or LCD_CMD_CURSOR_LINE. + */ +static uint8_t lcd_CursorStatus; + +/** Current cursor position, encoded as a Cursor position and status. */ +static lcdpos_t lcd_CursorAddr; + + +void lcd_setAddr(Layer *layer, lcdpos_t addr) +{ + /* Sanity check: wrap around to display limits */ + while (addr >= CONFIG_LCD_ROWS * CONFIG_LCD_COLS) + addr -= CONFIG_LCD_ROWS * CONFIG_LCD_COLS; + + layer->addr = addr; +} + +#if CONFIG_KERN + +void lcd_lock(void) +{ + LOCK_LCD; +} + + +void lcd_unlock(void) +{ + UNLOCK_LCD; +} + +#endif /* CONFIG_KERN */ + + +/** + * Write one character to the display at the current + * cursor prosition, then move the cursor right. The + * cursor is wrapped to the next line when it moves + * beyond the end of the current line. + * + * \note Does _NOT_ lock the display semaphore. + */ +static void lcd_putCharUnlocked(char c, Layer *layer) +{ + Layer *l2; + lcdpos_t addr = layer->addr; + + /* Store character in layer buffer */ + layer->buf[addr] = c; + + /* Move to next character */ + if (++layer->addr >= CONFIG_LCD_COLS * CONFIG_LCD_ROWS) + layer->addr = 0; + + /* Do not write on LCD if layer is hidden. */ + if (layer->pri == LAYER_HIDDEN) + return; + + /* + * Check if this location is obscured by + * other layers above us. + */ + for (l2 = layer->pred; l2->pred; l2 = l2->pred) + { + if (l2->buf[addr]) + { + /* DB(kprintf("layer %04x obs %04x at %d\n", l2, layer, addr);) */ + return; + } + } + + /* Write character */ + if (c) + lcd_putc(addr, c); + else + /* FIXME: should look for layers beneath! */ + lcd_putc(addr, ' '); +} + + +void lcd_putChar(char c, Layer *layer) +{ + LOCK_LCD; + lcd_putCharUnlocked(c, layer); + UNLOCK_LCD; +} + +void lcd_layerSet(Layer *layer, char c) +{ + int i; + + LOCK_LCD; + lcd_setAddr(layer, 0); + for (i = 0; i < CONFIG_LCD_COLS * CONFIG_LCD_ROWS; i++) + lcd_putCharUnlocked(c, layer); + UNLOCK_LCD; +} + + +void lcd_clear(Layer *layer) +{ + lcd_layerSet(layer, 0); +} + + +void lcd_clearLine(Layer *layer, int y) +{ + int i; + + LOCK_LCD; + lcd_setAddr(layer, LCD_POS(0, y)); + for (i = 0; i < CONFIG_LCD_COLS; i++) + lcd_putCharUnlocked(0, layer); + UNLOCK_LCD; +} + + +void lcd_moveCursor(lcdpos_t addr) +{ + LOCK_LCD; + lcd_moveTo(addr); + UNLOCK_LCD; +} + + +char lcd_setCursor(char mode) +{ + static const char cursor_cmd[3] = + { + LCD_CMD_CURSOR_OFF, LCD_CMD_CURSOR_BLOCK, LCD_CMD_CURSOR_LINE + }; + char oldmode = lcd_CursorStatus; + + LOCK_LCD; + lcd_CursorStatus = mode; + lcd_setReg(cursor_cmd[(int)mode]); + if (mode) + lcd_moveCursor(lcd_CursorAddr); + UNLOCK_LCD; + + return oldmode; +} + + +int lcd_vprintf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, va_list ap) +{ + int len; + + LOCK_LCD; + + /* + * Se il cursore era acceso, spegnilo durante + * l'output per evitare che salti alla posizione + * in cui si scrive. + */ + if (lcd_CursorStatus) + lcd_setReg(LCD_CMD_CURSOR_OFF); + + /* Spostamento del cursore */ + lcd_setAddr(layer, addr); + + if (mode & LCD_CENTER) + { + int pad; + + /* + * NOTE: calculating the string lenght BEFORE it gets + * printf()-formatted. Real lenght may differ. + */ + pad = (CONFIG_LCD_COLS - strlen(format)) / 2; + while (pad--) + lcd_putCharUnlocked(' ', layer); + } + + len = _formatted_write(format, (void (*)(char, void *))lcd_putCharUnlocked, layer, ap); + + if (mode & (LCD_FILL | LCD_CENTER)) + while (layer->addr % CONFIG_LCD_COLS) + lcd_putCharUnlocked(' ', layer); + + /* + * Riaccendi il cursore e riportalo alla + * vecchia posizione + */ + if (lcd_CursorStatus) + lcd_setCursor(lcd_CursorStatus); + + UNLOCK_LCD; + + return len; +} + + +int lcd_printf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, ...) +{ + int len; + va_list ap; + + va_start(ap, format); + len = lcd_vprintf(layer, addr, mode, format, ap); + va_end(ap); + + return len; +} + + +/** + * Internal function to move a layer between two positions. + * + * \note The layer must be *already* enqueued in some list. + * \note The display must be already locked! + */ +static void lcd_enqueueLayer(Layer *layer, char pri) +{ + Layer *l2; + + /* Remove layer from whatever list it was in before */ + REMOVE(layer); + + layer->pri = pri; + + /* + * Search for the first layer whose priority + * is less or equal to the layer we are adding. + */ + FOREACH_NODE(l2, &lcd_Layers) + if (l2->pri <= pri) + break; + + /* Enqueue layer */ + INSERT_BEFORE(layer, l2); +} + +Layer *lcd_newLayer(char pri) +{ + Layer *layer; + + LOCK_LCD; + + if (LIST_EMPTY(&lcd_FreeLayers)) + { + UNLOCK_LCD; + //ASSERT(false); + return NULL; + } + + layer = (Layer *)LIST_HEAD(&lcd_FreeLayers); + layer->addr = 0; + memset(layer->buf, 0, CONFIG_LCD_ROWS * CONFIG_LCD_COLS); + + lcd_enqueueLayer(layer, pri); + + UNLOCK_LCD; + return layer; +} + +/** + * Redraw the display (internal). + * + * \note The display must be already locked. + */ +static void lcd_refresh(void) +{ + lcdpos_t addr; + Layer *l; + + for (addr = 0; addr < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++addr) + { + FOREACH_NODE(l, &lcd_Layers) + { + //kprintf("%d %x %p\n", addr, l->buf[0], l); + if (l->pri == LAYER_HIDDEN) + break; + + if (l->buf[addr]) + { + /* Refresh location */ + lcd_putc(addr, l->buf[addr]); + goto done; + } + } + + /* Draw background */ + lcd_putc(addr, ' '); + done: + ; + } +} + +/** + * Rearrange layer depth and refresh display accordingly. + * + * \note Setting a priority of LAYER_HIDDEN makes the layer invisible. + */ +void lcd_setLayerDepth(Layer *layer, char pri) +{ + if (pri != layer->pri) + { + LOCK_LCD; + lcd_enqueueLayer(layer, pri); + /* Vile but simple */ + lcd_refresh(); + UNLOCK_LCD; + } +} + +void lcd_deleteLayer(Layer *layer) +{ + LOCK_LCD; + +/* We use lcd_refresh() instead. Much simpler than this mess, but slower. */ +#if 0 + Layer *l2; + lcdpos_t addr; + + /* Repair damage on underlaying layers */ + for (addr = 0; addr < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++addr) + { + /* If location was covered by us */ + if (layer->buf[addr]) + { + /* ...and it wasn't covered by others above us... */ + for (l2 = layer->pred; l2->pred; l2 = l2->pred) + if (l2->buf[addr]) + /* can't just break here! */ + goto not_visible; + + /* ...scan underlaying layers to repair damage */ + for (l2 = layer->succ; l2->succ; l2 = l2->succ) + if (l2->buf[addr]) + { + /* Refresh character */ + lcd_putc(addr, l2->buf[addr]); + + /* No need to search on deeper layers */ + break; + } + + not_visible: + ; + } + } +#endif + + // Remove layer from lcd_Layers list. + REMOVE(layer); + + /* Put layer back into free list */ + ADDHEAD(&lcd_FreeLayers, layer); + + lcd_refresh(); + + UNLOCK_LCD; +} + + +static void lcd_setDefLayer(Layer *layer) +{ + lcd_DefLayer = layer; +} + +#include +void lcd_init(void) +{ + #if CONFIG_KERN + sem_init(&lcd_semaphore); + #endif + + int i; + + LIST_INIT(&lcd_Layers); + LIST_INIT(&lcd_FreeLayers); + for (i = 0; i < LCD_LAYERS; ++i) + ADDHEAD(&lcd_FreeLayers, &lcd_LayersPool[i]); + + lcd_setDefLayer(lcd_newLayer(0)); + + lcd_hw_init(); + + lcd_setCursor(0); +} + + diff --git a/2.5/bertos/drv/lcd_text.h b/2.5/bertos/drv/lcd_text.h new file mode 100644 index 00000000..09a1c70e --- /dev/null +++ b/2.5/bertos/drv/lcd_text.h @@ -0,0 +1,122 @@ +/** + * \file + * + * + * \brief Generic text LCD driver (interface). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "lcd_text" + * $WIZ$ module_depends = "lcd_hd44", "timer", "formatwr" + */ + +#ifndef DRV_LCD_H +#define DRV_LCD_H + +#include "lcd_hd44.h" + +#include +#include +#include + +#include // vprintf() + + +/* flags for lcd_printf() */ +#define LCD_NORMAL 0 /* Scrittura normale */ +#define LCD_FILL BV(0) /* Fill rest of line with spaces */ +#define LCD_CENTER BV(1) /* Center string in line */ +#define LCD_NOCURSOR BV(2) /* Scrittura senza spostamento cursore */ + +/** Special priority value for lcd_setLayerDepth(). */ +#define LAYER_HIDDEN -127 + +/* Compute LCD address from x/y coordinates */ +#define LCD_POS(x,y) ((lcdpos_t)((uint8_t)(x) + (uint8_t)(y) * (uint8_t)CONFIG_LCD_COLS)) +#define LCD_ROW0 (CONFIG_LCD_COLS * 0) +#define LCD_ROW1 (CONFIG_LCD_COLS * 1) +#define LCD_ROW2 (CONFIG_LCD_COLS * 2) +#define LCD_ROW3 (CONFIG_LCD_COLS * 3) + +/** + * Overwrapping layer context. + */ +typedef struct _Layer +{ + /** + * Active layers are linked together in a list + * sorted in top to bottom order. + */ + DECLARE_NODE_ANON(struct _Layer) + + /** Current XY address into this layer, for write operations. */ + lcdpos_t addr; + + /** Priority of this layer (greater in front of lesser). */ + signed char pri; + + /** + * Layer backing store buffer. + * + * All writes through the layer are copied into this buffer. + * Characters cells with value 0 are transparent with respect + * to other layers in the background. + */ + char buf[CONFIG_LCD_COLS * CONFIG_LCD_ROWS]; +} Layer; + + +/* Global variables */ +extern Layer *lcd_DefLayer; + +/* Function prototypes */ +extern void lcd_init(void); +extern void lcd_test(void); + +extern void lcd_moveCursor(lcdpos_t addr); +extern char lcd_setCursor(char state); + +extern void lcd_setAddr(Layer *layer, lcdpos_t addr); +extern void lcd_putChar(char c, Layer *layer); +extern int lcd_vprintf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, va_list ap) FORMAT(printf, 4, 0); +extern int lcd_printf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, ...) FORMAT(printf, 4, 5); +extern void lcd_clear(Layer *layer); +extern void lcd_layerSet(Layer *layer, char c); +extern void lcd_clearLine(Layer *layer, int y); + +extern void lcd_setLayerDepth(Layer *layer, char pri); +extern Layer *lcd_newLayer(char pri); +extern void lcd_deleteLayer(Layer *layer); +extern void lcd_lock(void); +extern void lcd_unlock(void); + +#endif /* DRV_LCD_H */ diff --git a/2.5/bertos/drv/lcd_text_hwtest.c b/2.5/bertos/drv/lcd_text_hwtest.c new file mode 100644 index 00000000..028b8327 --- /dev/null +++ b/2.5/bertos/drv/lcd_text_hwtest.c @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Generic text LCD driver (Test). + * + * \version $Id$ + * + * \author Daniele Basile + * + */ + +#warning TODO:This test is incomplete, you must review! + +#if 0 +void lcd_test(void) +{ + int i; + + for (i = 0; i < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++i) + { + lcd_putCharUnlocked('0' + (i % 10), lcd_DefLayer); + timer_delay(100); + } +} +#endif + diff --git a/2.5/bertos/drv/lm75.c b/2.5/bertos/drv/lm75.c new file mode 100644 index 00000000..db8f8a94 --- /dev/null +++ b/2.5/bertos/drv/lm75.c @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief LM75 sensor temperature family. + * + * \author Daniele Basile + * + */ + +#include "lm75.h" + +#include "hw/hw_lm75.h" + +#include "cfg/cfg_lm75.h" + +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL LM75_LOG_LEVEL +#define LOG_FORMAT LM75_LOG_FORMAT + +#include + +#include +#include // Macro and data type to manage celsius degree + +#define SELECT_ADDRESS(addr) LM75_ADDRESS_BYTE | (addr << 1) + +deg_t lm75_read(uint8_t sens_addr) +{ + uint8_t data[2]; + int16_t degree; + int16_t deci_degree; + + i2c_start_w(SELECT_ADDRESS(sens_addr)); + i2c_put(LM75_PAD_BYTE); + i2c_start_r(SELECT_ADDRESS(sens_addr)); + i2c_recv(data, sizeof(data)); + + degree = (int16_t)data[0]; + deci_degree = (int16_t)(((data[1] >> 7) & 1 ) * 5); + + LOG_INFO("[%d.%d C]\n", degree, deci_degree); + + return degree * 10 + deci_degree; +} + +void lm75_init(void) +{ + // Check dependence + MOD_CHECK(i2c); + LM75_HW_INIT(); +} + + diff --git a/2.5/bertos/drv/lm75.h b/2.5/bertos/drv/lm75.h new file mode 100644 index 00000000..62e25c7b --- /dev/null +++ b/2.5/bertos/drv/lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief LM75 sensor temperature family. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "lm75" + * $WIZ$ module_depends = "timer", "i2c" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lm75.h" + * $WIZ$ module_hw = "bertos/hw/hw_lm75.h" + */ + +#ifndef DRV_LM75_H +#define DRV_LM75_H + +#include + +#include // Macro and data type to manage celsius degree + +#define LM75_ADDRESS_BYTE 0x91 +#define LM75_PAD_BYTE 0x0 + +deg_t lm75_read(uint8_t sens_addr); + +void lm75_init(void); + +#endif /* DRV_LM75_H */ diff --git a/2.5/bertos/drv/mcp41.c b/2.5/bertos/drv/mcp41.c new file mode 100644 index 00000000..bfa8fd4e --- /dev/null +++ b/2.5/bertos/drv/mcp41.c @@ -0,0 +1,80 @@ +/** + * \file + * + * + * + * \brief MCP41xxx digital potentiomenter driver (implementation) + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#include +#include +#include + +static KFile *ch; + +/** + * Set resitance for digital pot \a dev + */ +void mcp41_setResistance(Mcp41Dev dev, mcp41_res_t res) +{ + MCP41_ON(dev); + /* send command byte */ + kfile_putc(MCP41_WRITE_DATA, ch); + kfile_putc(((MCP41_HW_MAX * (uint32_t)res) + (MCP41_MAX / 2)) / MCP41_MAX, ch); + kfile_flush(ch); + + MCP41_OFF(dev); +} + + +/** + * Initialize mcp41 potentiometer driver + */ +void mcp41_init(KFile *_ch) +{ + Mcp41Dev dev; + + /* Init all potentiometer ports */ + for (dev = 0; dev < MCP41_CNT; dev++) + { + SET_MCP41_DDR(dev); + MCP41_OFF(dev); + } + + ch = _ch; +} diff --git a/2.5/bertos/drv/mcp41.h b/2.5/bertos/drv/mcp41.h new file mode 100644 index 00000000..6f5cf366 --- /dev/null +++ b/2.5/bertos/drv/mcp41.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief MCP41xxx digital potentiomenter driver. + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "mcp41" + * $WIZ$ module_depends = "timer", "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_mcp41.h", "bertos/hw/hw_mcp41.c", "bertos/hw/mcp41_map.h" + */ + +#ifndef DRV_MCP41_H +#define DRV_MCP41_H + +#include "hw/mcp41_map.h" +#include + +#include + +#define MCP41_WRITE_DATA 0x11 +#define MCP41_HW_MAX 255 +#define MCP41_MAX 999 + +/** + * Type for digital potentiometer resistance. + */ +typedef uint16_t mcp41_res_t; + +void mcp41_setResistance(Mcp41Dev dev, mcp41_res_t res); +void mcp41_init(KFile *ch); + +#endif /* DRV_MCP41_H */ diff --git a/2.5/bertos/drv/mpxx6115a.h b/2.5/bertos/drv/mpxx6115a.h new file mode 100644 index 00000000..aa5a682d --- /dev/null +++ b/2.5/bertos/drv/mpxx6115a.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief MPXX6115A Pressure Sensor convert formula. + * + * This module convert read voltage value from MPXX6115A + * pressure sensor into hPascal value unit. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "mpxx6115a" + * $WIZ$ module_depends = "adc" + * $WIZ$ module_configuration = "" + * $WIZ$ module_hw = "" + */ + +#ifndef DRV_MPXX6115A_H +#define DRV_MPXX6115A_H + +#include + +#define MPXX6115A_DIV_CONST 0.009f +#define MPXX6115A_ADD_CONST 0.095f + + +/** + * Convert read voltage from MPXX6115A Pressure Sensor in hPascal value. + * + * The conversion formula may be consulted on constructor datasheet + * (see Freescale Semiconductor MP3H6115A, MPXAZ6115A). + * + * \param vout output voltage read from pin sensor. + * \param vref reference voltage that supplies the MPXX6115A sensor. + * + * \return integer value that represent measured pressure in hPascal. + * + * \note: To compute the pressure we use the Vout/Vref ratio, so + * these two values can be expressed in any unit, even ADC levels. + * + */ +INLINE int16_t mpxx6115a_press(adcread_t vout, adcread_t vref) +{ + float tmp; + + tmp = (float)vout/(float)vref + MPXX6115A_ADD_CONST; + + // To return hpascal we should multiply by 10 because the ratio is in kpascal + return (int16_t)(tmp / MPXX6115A_DIV_CONST * 10); +} + +#endif /* DRV_MPXX6115A_H */ diff --git a/2.5/bertos/drv/ntc.c b/2.5/bertos/drv/ntc.c new file mode 100644 index 00000000..8f03732e --- /dev/null +++ b/2.5/bertos/drv/ntc.c @@ -0,0 +1,154 @@ +/** + * \file + * + * + * \brief Driver for NTC (reads a temperature through an ADC) + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * + * + * This module handles an external NTC bound to an AD converter. As usual, + * it relies on a low-level API (ntc_hw_*) (see below): + * + */ + +#include "hw/hw_ntc.h" +#include "hw/ntc_map.h" + +#include "cfg/cfg_ntc.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL CONFIG_NTC_LOG_LEVEL +#define LOG_VERBOSITY CONFIG_NTC_LOG_FORMAT +#include +#include + +#include + +DB(bool ntc_initialized;) + +/** + * Find in a table of values \a orig_table of size \a size, the index which + * value is less or equal to \a val. + * + * \retval 0 When \a val is higher than the first table entry. + * \retval size When \a val is lower than the last table entry. + * \retval 1..size-1 When \a val is within the table. + */ +static size_t upper_bound(const res_t *orig_table, size_t size, res_t val) +{ + const res_t *table = orig_table; + + while (size) + { + size_t pos = size / 2; + if (val > table[pos]) + size = pos; + else + { + table += pos+1; + size -= pos+1; + } + } + + return table - orig_table; +} + + +/** + * Read the temperature for the NTC channel \a dev. + * First read the resistence of the NTC through ntc_hw_read(), then, + * for the conversion from resistance to temperature, since the formula + * varies from device to device, we implemented a generic system using + * a table of data which maps temperature (index) to resistance (data). + * The range of the table (min/max temperature) and the step + * (temperature difference between two consecutive elements of the table) + * is variable and can be specified. Notice that values inbetween the + * table elements are still possible as the library does a linear + * interpolation using the actual calculated resistance to find out + * the exact temperature. + * + * The low-level API provides a function to get access to a description + * of the NTC (ntc_hw_getInfo()), including the resistance table. + * + */ +deg_t ntc_read(NtcDev dev) +{ + const NtcHwInfo* hw = ntc_hw_getInfo(dev); + const res_t* r = hw->resistances; + + res_t rx; + size_t i; + deg_t degrees = 0; + + rx = ntc_hw_read(dev); + + + i = upper_bound(r, hw->num_resistances, rx); + ASSERT(i <= hw->num_resistances); + + if (i >= hw->num_resistances) + return NTC_SHORT_CIRCUIT; + else if (i == 0) + return NTC_OPEN_CIRCUIT; + + /* + * Interpolated value in 0.1 degrees multiplied by 10: + * delta t step t + * ---------- = ---------------- + * (rx - r[i]) (r[i-1] - r [i]) + */ + float tmp; + tmp = 10 * hw->degrees_step * (rx - r[i]) / (r[i - 1] - r[i]); + + /* + * degrees = integer part corresponding to the superior index + * in the table multiplied by 10 + * - decimal part interpolated (already multiplied by 10) + */ + degrees = (i * hw->degrees_step + hw->degrees_min) * 10 - (int)(tmp); + + //kprintf("dev= %d, I=%d, degrees = %d\n", dev, i , degrees); + + return degrees; +} + + +/** + * Init NTC hardware. + */ +void ntc_init(void) +{ + NTC_HW_INIT; + DB(ntc_initialized = true;) +} + diff --git a/2.5/bertos/drv/ntc.h b/2.5/bertos/drv/ntc.h new file mode 100644 index 00000000..cb606b87 --- /dev/null +++ b/2.5/bertos/drv/ntc.h @@ -0,0 +1,91 @@ +/** + * \file + * + * + * \brief Driver for NTC sensors (reads a temperature through an ADC). + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * + * $WIZ$ module_name = "ntc" + * $WIZ$ module_hw = "bertos/hw/hw_ntc.h", "bertos/hw/ntc_map.h", "bertos/hw/hw_ntc.c" + */ + +#ifndef DRV_NTC_H +#define DRV_NTC_H + +#include "hw/ntc_map.h" + +#include +#include + +#define NTC_OPEN_CIRCUIT -32768 +#define NTC_SHORT_CIRCUIT 32767 + +typedef int16_t deg_t; /** type for celsius degrees deg_t = °C * 10 */ + +/** Macro for converting from deg to deg_t type */ +#define DEG_TO_DEG_T(x) ((deg_t)((x) * 10)) + +/** Macro for converting from deg_t to celsius degrees (returns only the integer part) */ +#define DEG_T_TO_INTDEG(x) ((x) / 10) + +/** Macro for converting from deg_t to celsius degrees (returns only the decimal part) */ +#define DEG_T_TO_DECIMALDEG(x) ((x) % 10) + +/** Macro for converting from deg_t to celsius degrees (returns type is float) */ +#define DEG_T_TO_FLOATDEG(x) ((x) / 10.0) + + +typedef uint32_t res_t; /** type for resistor res_t = Ohm * 100 */ +typedef float amp_t; /** type for defining amplifications amp_t = A, where A is a pure number */ + +DB(extern bool ntc_initialized;) + + +/** Describe a NTC chip */ +typedef struct NtcHwInfo +{ + const res_t *resistances; ///< resistances of the NTC (ohms * 100) + size_t num_resistances; ///< number of resistances + deg_t degrees_min; ///< degrees corresponding to the first entry in the table (celsius * 10) + deg_t degrees_step; ///< difference in degrees between two consecutive elements in the table (celsius * 10) +} NtcHwInfo; + +/** Initialize the NTC module */ +void ntc_init(void); + +/** Read a single temperature value from the NTC */ +deg_t ntc_read(NtcDev dev); + +#endif /* DRV_NTC_H */ diff --git a/2.5/bertos/drv/pcf8574.c b/2.5/bertos/drv/pcf8574.c new file mode 100644 index 00000000..71150427 --- /dev/null +++ b/2.5/bertos/drv/pcf8574.c @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief PCF8574 i2c port expander driver. + * + * This driver controls the PCF8574. + * The PCF8574 is an 8bit i2c port expander. + * You can read/write 8 pins through an i2c bus. + * The pins are quasi-bidirectionals, this mean that + * without the need of a direction register you can use + * each pin as input or output, see datasheet on how this + * is achieved. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "pcf8574.h" +#include +#include + +/** + * Read PCF8574 \a pcf bit status. + * \return the pins status or EOF on errors. + */ +int pcf8574_get(Pcf8574 *pcf) +{ + if (!i2c_start_r(PCF8574ID | ((pcf->addr << 1) & 0xF7))) + return EOF; + + int data = i2c_get(false); + i2c_stop(); + return data; +} + +/** + * Write to PCF8574 \a pcf port \a data. + * \return true if ok, false on errors. + */ +bool pcf8574_put(Pcf8574 *pcf, uint8_t data) +{ + bool res = i2c_start_w(PCF8574ID | ((pcf->addr << 1) & 0xF7)) && i2c_put(data); + i2c_stop(); + return res; +} + +/** + * Init a PCF8574 on the bus with addr \a addr. + * \return true if device is found, false otherwise. + */ +bool pcf8574_init(Pcf8574 *pcf, pcf8574_addr addr) +{ + MOD_CHECK(i2c); + pcf->addr = addr; + return pcf8574_get(pcf) != EOF; +} diff --git a/2.5/bertos/drv/pcf8574.h b/2.5/bertos/drv/pcf8574.h new file mode 100644 index 00000000..605b89b9 --- /dev/null +++ b/2.5/bertos/drv/pcf8574.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief PCF8574 i2c port expander driver. + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "pcf8574" + * $WIZ$ module_depends = "i2c" + */ + +#ifndef DRV_PCF8574_H +#define DRV_PCF8574_H + +#include + +typedef uint8_t pcf8574_addr; + +/** + * Context for accessing a PCF8574. + */ +typedef struct Pcf8574 +{ + pcf8574_addr addr; +} Pcf8574; + +#define PCF8574ID 0x40 ///< I2C address + +int pcf8574_get(Pcf8574 *pcf); +bool pcf8574_put(Pcf8574 *pcf, uint8_t data); +bool pcf8574_init(Pcf8574 *pcf, pcf8574_addr addr); + +#endif /* DRV_PCF8574_H */ diff --git a/2.5/bertos/drv/phase.c b/2.5/bertos/drv/phase.c new file mode 100644 index 00000000..81e73f91 --- /dev/null +++ b/2.5/bertos/drv/phase.c @@ -0,0 +1,192 @@ +/** + * \file + * + * + * \brief Phase control driver (implementation) + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + + +#include "hw/hw_phase.h" + +#include +#include + +#include +#include + +#include +#include + +#include + +/** Array of triacs */ +static Triac triacs[TRIAC_CNT]; + +DB(bool phase_initialized;) + +/** + * Zerocross interrupt, call when 220V cross zero. + * + * This function turn off all triacs that have duty < 100% + * and arm the triac timers for phase control. + * This function is frequency adaptive so can work both at 50 or 60Hz. + */ +DEFINE_ZEROCROSS_ISR() +{ + ticks_t period, now; + static ticks_t prev_time; + TriacDev dev; + + now = timer_clock_unlocked(); + period = now - prev_time; + + for (dev = 0; dev < TRIAC_CNT; dev++) + { + /* Only turn off triac if duty is != 100% */ + if (triacs[dev].duty != CONFIG_TRIAC_MAX_DUTY) + TRIAC_OFF(dev); + /* Compute delay from duty */ + timer_setDelay(&triacs[dev].timer, DIV_ROUND(period * (CONFIG_TRIAC_MAX_DUTY - triacs[dev].duty), CONFIG_TRIAC_MAX_DUTY)); + + /* This check avoids inserting the same timer twice + * in case of an intempestive zerocross or spike */ + if (triacs[dev].running) + { + timer_abort(&triacs[dev].timer); + //kprintf("[%lu]\n", timer_clock()); + } + + triacs[dev].running = true; + timer_add(&triacs[dev].timer); + } + prev_time = now; +} + + + +/** + * Set duty of the triac channel \a dev (interrupt safe). + */ +void phase_setDuty(TriacDev dev, triac_duty_t duty) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + phase_setDutyUnlock(dev,duty); + + IRQ_RESTORE(flags); +} + + + +/** + * Set duty of the triac channel \a dev (NOT INTERRUPT SAFE). + */ +void phase_setDutyUnlock(TriacDev dev, triac_duty_t duty) +{ + triacs[dev].duty = MIN(duty, (triac_duty_t)CONFIG_TRIAC_MAX_DUTY); +} + + + +/** + * Set power of the triac channel \a dev (interrupt safe). + * + * This function approsimate the sine wave to a triangular wave to compute + * RMS power. + */ +void phase_setPower(TriacDev dev, triac_power_t power) +{ + bool greater_fifty = false; + triac_duty_t duty; + + power = MIN(power, (triac_power_t)CONFIG_TRIAC_MAX_POWER); + + if (power > CONFIG_TRIAC_MAX_POWER / 2) + { + greater_fifty = true; + power = CONFIG_TRIAC_MAX_POWER - power; + } + + duty = TRIAC_POWER_K * sqrt(power); + + if (greater_fifty) + duty = CONFIG_TRIAC_MAX_DUTY - duty; + phase_setDuty(dev, duty); +} + + + +/** + * Soft int for each \a _dev triac. + * + * The triacs are turned on at different time to achieve phase control. + */ +static void phase_softint(void *_dev) +{ + TriacDev dev = (TriacDev)_dev; + + /* Only turn on if duty is !=0 */ + if (triacs[dev].duty) + TRIAC_ON(dev); + triacs[dev].running = false; +} + + + +/** + * Initialize phase control driver + */ +void phase_init(void) +{ + cpu_flags_t flags; + TriacDev dev; + + /* Init timers and ensure that all triac are off */ + for (dev = 0; dev < TRIAC_CNT; dev++) + { + triacs[dev].duty = 0; + triacs[dev].running = false; + SET_TRIAC_DDR(dev); + TRIAC_OFF(dev); + timer_setSoftint(&triacs[dev].timer, (Hook)phase_softint, (void *)dev); + } + IRQ_SAVE_DISABLE(flags); + + /* Init zero cross interrupt */ + PHASE_HW_INIT; + DB(phase_initialized = true;) + IRQ_RESTORE(flags); +} + diff --git a/2.5/bertos/drv/phase.h b/2.5/bertos/drv/phase.h new file mode 100644 index 00000000..52bc067d --- /dev/null +++ b/2.5/bertos/drv/phase.h @@ -0,0 +1,86 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Phase partialization driver with TRIACs. + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "phase" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_phase.h" + * $WIZ$ module_hw = "bertos/hw/hw_phase.h", "bertos/hw/phase_map.h", "bertos/hw/hw_phase.c" + */ + +#ifndef DRV_PHASE_H +#define DRV_PHASE_H + +#include "hw/phase_map.h" + +#include "cfg/cfg_phase.h" + +#include + +#define TRIAC_POWER_K CONFIG_TRIAC_MAX_DUTY * (1 / sqrt(2 * CONFIG_TRIAC_MAX_POWER)) + +/** + * \name Types for duty and power. + * \{ + */ +typedef uint16_t triac_duty_t; +typedef uint16_t triac_power_t; +/* \} */ + + +DB(extern bool phase_initialized;) + +/** + * \name Type for triac control. + * \{ + */ +typedef struct Triac +{ + Timer timer; /**< Timer for phase control. */ + triac_duty_t duty; /**< Duty cycle of the channel. */ + bool running; /**< True when the timer is active. */ +} Triac; +/* \} */ + +void phase_setDutyUnlock(TriacDev dev, triac_duty_t duty); +void phase_setDuty(TriacDev dev, triac_duty_t duty); +void phase_setPower(TriacDev dev, triac_power_t power); + +void phase_init(void); + + +#endif /* DRV_PHASE_H */ diff --git a/2.5/bertos/drv/pwm.c b/2.5/bertos/drv/pwm.c new file mode 100644 index 00000000..d09d9627 --- /dev/null +++ b/2.5/bertos/drv/pwm.c @@ -0,0 +1,121 @@ +/** + * \file + * + * + * + * \brief PWM driver (implementation) + * + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + +#include "cfg/cfg_pwm.h" + +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PWM_LOG_LEVEL +#define LOG_VERBOSITY PWM_LOG_FORMAT + +#include +#include + +#include + +#include CPU_HEADER(pwm) + +#include +#include + + +/** + * Set duty of pwm channel \p dev. + */ +void pwm_setDuty(PwmDev dev, pwm_duty_t duty) +{ + pwm_period_t period = 0; + pwm_duty_t real_duty = 0; + + duty = MIN(duty, PWM_MAX_DUTY); + + period = pwm_hw_getPeriod(dev); + + real_duty = (uint64_t)(duty * period) >> (uint64_t)PWM_MAX_PERIOD_LOG2; + + LOG_INFO("real_duty[%d] duty[%d], period[%d]\n", real_duty, duty, period); + pwm_hw_setDutyUnlock(dev, real_duty); +} + +/** + * Set frequency of pwm channel \p dev at \p freq in Hz. + */ +void pwm_setFrequency(PwmDev dev, pwm_freq_t freq) +{ + pwm_hw_setFrequency(dev, freq); +} + +/** + * Set duty of pwm channel \p dev. + */ +void pwm_enable(PwmDev dev, bool state) +{ + if (state) + pwm_hw_enable(dev); + else + pwm_hw_disable(dev); +} + +MOD_DEFINE(pwm); + +/** + * Initialize PWM hw. + */ +void pwm_init(void) +{ + cpu_flags_t flags; + PwmDev dev; + + IRQ_SAVE_DISABLE(flags); + + pwm_hw_init(); + + /* set all pwm to 0 */ + for (dev = 0; dev < PWM_CNT; dev++) + pwm_setDuty(dev, 0); + + IRQ_RESTORE(flags); + MOD_INIT(pwm); +} + + + + diff --git a/2.5/bertos/drv/pwm.h b/2.5/bertos/drv/pwm.h new file mode 100644 index 00000000..60ae6e92 --- /dev/null +++ b/2.5/bertos/drv/pwm.h @@ -0,0 +1,92 @@ +/** + * \file + * + * + * + * \brief Pulse Width Modulation (PWM) driver. + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "pwm" + * $WIZ$ module_configuration = "bertos/cfg/cfg_pwm.h" + * $WIZ$ module_hw = "bertos/hw/pwm_map.h" + * $WIZ$ module_supports = "not avr and not cm3" + */ + +#ifndef DRV_PWM_H +#define DRV_PWM_H + +#include "hw/pwm_map.h" + +#include + +#include CPU_HEADER(pwm) + +#include + +#define PWM_MAX_DUTY ((pwm_duty_t)0xFFFF) +#define PWM_MAX_PERIOD 0xFFFF +#define PWM_MAX_PERIOD_LOG2 16 + +/** + * PWM type define. + */ +typedef uint16_t pwm_duty_t; +typedef uint32_t pwm_freq_t; + + + +/** + * Set PWM polarity of pwm \p dev. + */ +INLINE void pwm_setPolarity(PwmDev dev, bool pol) +{ + pwm_hw_setPolarity(dev, pol); +} + +void pwm_setDuty(PwmDev dev, pwm_duty_t duty); +void pwm_setFrequency(PwmDev dev, pwm_freq_t freq); +void pwm_setPolarity(PwmDev dev, bool pol); +void pwm_enable(PwmDev dev, bool state); +void pwm_init(void); + +/** + * Test function prototypes. + * + * See pwm_test.c for implemntation of these functions. + */ +void pwm_testRun(void); +int pwm_testSetup(void); +/* For backward compatibility */ +#define pwm_testSetUp() pwm_testSetup() +int pwm_testTearDown(void); + +#endif /* DRV_PWM_H */ diff --git a/2.5/bertos/drv/pwm_hwtest.c b/2.5/bertos/drv/pwm_hwtest.c new file mode 100644 index 00000000..12a941dd --- /dev/null +++ b/2.5/bertos/drv/pwm_hwtest.c @@ -0,0 +1,239 @@ +/** + * \file + * + * + * + * \brief Test for PWM driver (implementation) + * + * This is a simple test for PWM driver. This module + * is target independent, so you can test all target that + * BeRTOS support. + * To use this test you should include a pwm_map.h header where + * are defined the PWM channels for your target. Then you should add + * or remove a test setting in pwm_test_cfg array, and edit a value for + * your specific test. + * Afther this, all is ready and you can test PWM driver. + * + * The test check first if all PWM channel starts, and then try + * to change a PWM duty cicle for all channel. + * The change of duty cycle is operate when a PWM channel is enable, + * in this way you can see if a pwm signal is clean and work properly. + * The duty value is change incrementaly, and when it arrive to 100% or 0%, + * we reset the duty value and restart the test. + * Further the duty test, we check also a PWM polarity, infact when we + * reach a reset duty value, we invert a polary of PWM wavform. + * So you can see if the hardware manage correctly this situation. + * + * Note: To be simple and target independently we not use a timer module, + * and so the delay is do with a for cycle. + * + * \version $Id$ + * \author Daniele Basile + */ + +#include "hw/pwm_map.h" // For PwmDev and channel avaible on thi target +#include "cfg/cfg_pwm.h" +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PWM_LOG_LEVEL +#define LOG_FORMAT PWM_LOG_FORMAT +#include // for logging system + +#include +#include + +#include +#include CPU_HEADER(pwm) + +#define DELAY_TIME 10000 // This is a number of for cycle before to set a new value of duty +#define PWM_DUTY_INC 200 // Incremental value for duty + + +/** + * Simple struct to store + * the testing value. + */ +typedef struct PwmTest +{ + int ch; + bool pol; + pwm_freq_t freq; + pwm_duty_t duty; +} PwmTest; + +/* + * Test settings for each channel. + * + * Frequency value is in Hz. + * + * Esample of value for duty cycle" + * + * - 100% => 0xFFFFFFFF + * - 80% => 0xCCCCCCCC + * - 75% => 0xBFFFFFFF + * - 50% => 0x7FFFFFFF + * - 25% => 0x3FFFFFFF + * - 33% => 0x55555555 + * - 16% => 0x2AAAAAAA + */ +static PwmTest pwm_test_cfg[PWM_CNT] = +{ + /* Channel, polarity, frequecy, duty */ + { 0, false, 100UL, 0 }, /* 100Hz, 0% duty */ + { 1, false, 1000UL, 0x7FFF }, /* 1KHz, 50% duty */ + { 2, false, 12356UL, 0x5555 }, /* 12,356KHz, 33% duty */ + { 3, false, 100000UL, 0xCCCC } /* 100KHz, 80% duty */ +}; + +/** + * Setup all needed to test PWM on AT91 + * + */ +int pwm_testSetup(void) +{ + LOG_INFO("Init pwm.."); + pwm_init(); + LOG_INFO("done.\n"); + + return 0; +} + + +/** + * Test suit for genation of pwm waveform. + * + */ +void NORETURN pwm_testRun(void) +{ + pwm_duty_t duty = 0; + int delay = 0; + + pwm_testSetup(); + + LOG_INFO("\n\n===== BeRTOS PWM test =====\n\n"); + + for (int i = 0; i < PWM_CNT; i++) + { + LOG_INFO("PWM test ch[%d]\n", pwm_test_cfg[i].ch); + LOG_INFO("--> set pol[%d]", pwm_test_cfg[i].pol); + LOG_INFO("\n(Note: if polarity is false the output waveform start at high level,\n see low level implentation for detail)i\n"); + pwm_setPolarity(pwm_test_cfg[i].ch, pwm_test_cfg[i].pol); + LOG_INFO("..ok\n"); + + LOG_INFO("--> set freq[%ld]", pwm_test_cfg[i].freq); + pwm_setFrequency(pwm_test_cfg[i].ch, pwm_test_cfg[i].freq); + LOG_INFO("..ok\n"); + + LOG_INFO("--> set duty[%d]", pwm_test_cfg[i].duty); + pwm_setDuty(pwm_test_cfg[i].ch, pwm_test_cfg[i].duty); + LOG_INFO("..ok\n"); + + LOG_INFO("--> Enable pwm"); + pwm_enable(pwm_test_cfg[i].ch, true); + LOG_INFO("..ok\n"); + } + + LOG_INFO("\n-------------------------- Dinamic PWM test --------------------------\n"); + LOG_INFO("We test if driver change correctly the duty cycle durind it working.\n"); + LOG_INFO("On your oscilloscope you should see the pwm singal that increase until\n"); + LOG_INFO("the duty value is 100%%. After this value we invert a polarity of pwm,\n"); + LOG_INFO("and repeat the test. But now you should see that pwm duty decreasing until\n"); + LOG_INFO("0%% duty value.\nAfter that, we repeat the test from beginning.\n\n"); + + for (;;) + { + if (delay == DELAY_TIME) + { + for (int i = 0; i < PWM_CNT; i++) + { + LOG_INFO("PWM test ch[%d]\n", pwm_test_cfg[i].ch); + LOG_INFO("--> set duty[%d]", duty); + pwm_setDuty(pwm_test_cfg[i].ch, duty); + LOG_INFO("..ok\n"); + } + LOG_INFO("\n++++++++++++++++++++\n"); + duty += PWM_DUTY_INC; + delay = 0; + } + + //Reset duty cycle overflow + if (duty >= (pwm_duty_t)0xFFFF) + { + duty = 0; + for (int i = 0; i < PWM_CNT; i++) + { + LOG_INFO("Duty reset, swap polarity:\n"); + LOG_INFO("--> pol from [%d] to [%d]", pwm_test_cfg[i].pol, !pwm_test_cfg[i].pol); + + pwm_test_cfg[i].pol = !pwm_test_cfg[i].pol; + pwm_setPolarity(pwm_test_cfg[i].ch, pwm_test_cfg[i].pol); + + LOG_INFO("..ok\n"); + } + LOG_INFO("\n++++++++++++++++++++\n"); + } + delay++; + } +} + +/** + * End a PWM Test. + * (Unused) + */ +int pwm_testTearDown(void) +{ + /* */ + return 0; +} + +/* + * Empty main. + * + * Look it as exmple or use it if + * you want test a PWM driver stand alone. + */ +#if 0 +int main(void) +{ + IRQ_ENABLE; + kdbg_init(); + + pwm_testRun(); + + for(;;) + { + } + +} +#endif + + diff --git a/2.5/bertos/drv/sd.c b/2.5/bertos/drv/sd.c new file mode 100644 index 00000000..0c151563 --- /dev/null +++ b/2.5/bertos/drv/sd.c @@ -0,0 +1,498 @@ +/** + * \file + * + * + * \brief Function library for secure digital memory. + * + * \version $Id$ + * \author Francesco Sacchi + */ + + +#include "sd.h" +#include "hw/hw_sd.h" +#include +#include + +#include + +#include +#include + +#include /* memset */ + +/** + * Card Specific Data + * read directly from the card. + */ +typedef struct CardCSD +{ + uint16_t block_len; ///< Length of a block + uint32_t block_num; ///< Number of block on the card + uint16_t capacity; ///< Card capacity in MB +} CardCSD; + +#define SD_IN_IDLE 0x01 +#define SD_STARTTOKEN 0xFE + +#define TIMEOUT_NAC 256 + +#define SD_DEFAULT_BLOCKLEN 512 + +/** + * SPI communication channel. + */ +static KFile *fd; + +/** + * Current SD status. + */ +static bool sd_status; + +#define SD_BUSY_TIMEOUT ms_to_ticks(200) + +static bool sd_select(bool state) +{ + if (state) + { + ticks_t start = timer_clock(); + do + { + SD_CS_ON(); + if (kfile_getc(fd) == 0xff) + return true; + SD_CS_OFF(); + kfile_putc(0xff, fd); + kfile_flush(fd); + cpu_relax(); + } + while (timer_clock() - start < SD_BUSY_TIMEOUT); + + LOG_ERR("sd_select timeout\n"); + return false; + } + else + { + kfile_putc(0xff, fd); + kfile_flush(fd); + SD_CS_OFF(); + return true; + } +} + +static int16_t sd_waitR1(void) +{ + uint8_t datain; + + for (int i = 0; i < TIMEOUT_NAC; i++) + { + datain = kfile_getc(fd); + if (datain != 0xff) + return (int16_t)datain; + } + LOG_ERR("Timeout waiting R1\n"); + return EOF; +} + +static int16_t sd_sendCommand(uint8_t cmd, uint32_t param, uint8_t crc) +{ + /* The 7th bit of command must be a 1 */ + kfile_putc(cmd | 0x40, fd); + + /* send parameter */ + kfile_putc((param >> 24) & 0xFF, fd); + kfile_putc((param >> 16) & 0xFF, fd); + kfile_putc((param >> 8) & 0xFF, fd); + kfile_putc((param) & 0xFF, fd); + + kfile_putc(crc, fd); + + return sd_waitR1(); +} + + +static bool sd_getBlock(void *buf, size_t len) +{ + uint8_t token; + uint16_t crc; + + for (int i = 0; i < TIMEOUT_NAC; i++) + { + token = kfile_getc(fd); + if (token != 0xff) + { + if (token == SD_STARTTOKEN) + { + if (kfile_read(fd, buf, len) == len) + { + if (kfile_read(fd, &crc, sizeof(crc)) == sizeof(crc)) + /* check CRC here if needed */ + return true; + else + LOG_ERR("get_block error getting crc\n"); + } + else + LOG_ERR("get_block len error: %d\n", (int)len); + } + else + LOG_ERR("get_block token error: %02X\n", token); + + return false; + } + } + + LOG_ERR("get_block timeout waiting token\n"); + return false; +} + +#define SD_SELECT() \ +do \ +{ \ + if (!sd_select(true)) \ + { \ + LOG_ERR("%s failed, card busy\n", __func__); \ + return EOF; \ + } \ +} \ +while (0) + +#define SD_SETBLOCKLEN 0x50 + +static int16_t sd_setBlockLen(uint32_t newlen) +{ + SD_SELECT(); + + int16_t r1 = sd_sendCommand(SD_SETBLOCKLEN, newlen, 0); + + sd_select(false); + return r1; +} + +#define SD_SEND_CSD 0x49 + +static int16_t sd_getCSD(CardCSD *csd) +{ + SD_SELECT(); + + int16_t r1 = sd_sendCommand(SD_SEND_CSD, 0, 0); + + if (r1) + { + LOG_ERR("send_csd failed: %04X\n", r1); + sd_select(false); + return r1; + } + + uint8_t buf[16]; + bool res = sd_getBlock(buf, sizeof(buf)); + sd_select(false); + + if (res) + { + uint16_t mult = (1L << ((((buf[9] & 0x03) << 1) | ((buf[10] & 0x80) >> 7)) + 2)); + uint16_t c_size = (((uint16_t)(buf[6] & 0x03)) << 10) | (((uint16_t)buf[7]) << 2) | + (((uint16_t)(buf[8] & 0xC0)) >> 6); + + csd->block_len = (1L << (buf[5] & 0x0F)); + csd->block_num = (c_size + 1) * mult; + csd->capacity = (csd->block_len * csd->block_num) >> 20; // in MB + + LOG_INFO("block_len %d bytes, block_num %ld, total capacity %dMB\n", csd->block_len, csd->block_num, csd->capacity); + return 0; + } + else + return EOF; +} + + +#define SD_READ_SINGLEBLOCK 0x51 + +static int16_t sd_readBlock(void *buf, uint32_t addr) +{ + SD_SELECT(); + + int16_t r1 = sd_sendCommand(SD_READ_SINGLEBLOCK, addr, 0); + + if (r1) + { + LOG_ERR("read single block failed: %04X\n", r1); + sd_select(false); + return r1; + } + + bool res = sd_getBlock(buf, SD_DEFAULT_BLOCKLEN); + sd_select(false); + if (!res) + { + LOG_ERR("read single block failed reading data\n"); + return EOF; + } + else + return 0; +} + +#define SD_WRITE_SINGLEBLOCK 0x58 +#define SD_DATA_ACCEPTED 0x05 + +static int16_t sd_writeBlock(const void *buf, uint32_t addr) +{ + SD_SELECT(); + + int16_t r1 = sd_sendCommand(SD_WRITE_SINGLEBLOCK, addr, 0); + + if (r1) + { + LOG_ERR("write single block failed: %04X\n", r1); + sd_select(false); + return r1; + } + + kfile_putc(SD_STARTTOKEN, fd); + kfile_write(fd, buf, SD_DEFAULT_BLOCKLEN); + /* send fake crc */ + kfile_putc(0, fd); + kfile_putc(0, fd); + uint8_t dataresp = (kfile_getc(fd) & 0x1F); + sd_select(false); + + // FIXME: sometimes dataresp is 0, find out why. + if (dataresp != SD_DATA_ACCEPTED) + { + LOG_ERR("write single block failed: %02X\n", dataresp); + return EOF; + } + else + return 0; +} + + +bool sd_test(void) +{ + CardCSD csd; + sd_getCSD(&csd); + + uint8_t buf[SD_DEFAULT_BLOCKLEN]; + + if (sd_readBlock(buf, 0) != 0) + return false; + + kputchar('\n'); + for (int i = 0; i < SD_DEFAULT_BLOCKLEN; i++) + { + kprintf("%02X ", buf[i]); + buf[i] = i; + if (!((i+1) % 16)) + kputchar('\n'); + } + + if (sd_writeBlock(buf, 0) != 0) + return false; + + memset(buf, 0, sizeof(buf)); + if (sd_readBlock(buf, 0) != 0) + return false; + + kputchar('\n'); + for (int i = 0; i < SD_DEFAULT_BLOCKLEN; i++) + { + kprintf("%02X ", buf[i]); + buf[i] = i; + if (!((i+1) % 16)) + kputchar('\n'); + } + + return true; +} + +#define SD_GO_IDLE_STATE 0x40 +#define SD_GO_IDLE_STATE_CRC 0x95 +#define SD_SEND_OP_COND 0x41 +#define SD_SEND_OP_COND_CRC 0xF9 + +#define SD_START_DELAY ms_to_ticks(10) +#define SD_INIT_TIMEOUT ms_to_ticks(1000) +#define SD_IDLE_RETRIES 4 + +bool sd_init(KFile *_fd) +{ + uint16_t r1; + + ASSERT(_fd); + fd = _fd; + + SD_CS_INIT(); + SD_CS_OFF(); + + /* Wait a few moments for supply voltage to stabilize */ + timer_delay(SD_START_DELAY); + + /* Give 80 clk pulses to wake up the card */ + for (int i = 0; i < 10; i++) + kfile_putc(0xff, fd); + kfile_flush(fd); + + for (int i = 0; i < SD_IDLE_RETRIES; i++) + { + SD_SELECT(); + r1 = sd_sendCommand(SD_GO_IDLE_STATE, 0, SD_GO_IDLE_STATE_CRC); + sd_select(false); + + if (r1 == SD_IN_IDLE) + break; + } + + if (r1 != SD_IN_IDLE) + { + LOG_ERR("go_idle_state failed: %04X\n", r1); + return false; + } + + ticks_t start = timer_clock(); + + /* Wait for card to start */ + do + { + SD_SELECT(); + r1 = sd_sendCommand(SD_SEND_OP_COND, 0, SD_SEND_OP_COND_CRC); + sd_select(false); + cpu_relax(); + } + while (r1 != 0 && timer_clock() - start < SD_INIT_TIMEOUT); + + if (r1) + { + LOG_ERR("send_op_cond failed: %04X\n", r1); + return false; + } + + r1 = sd_setBlockLen(SD_DEFAULT_BLOCKLEN); + + if (r1) + { + LOG_ERR("setBlockLen failed: %04X\n", r1); + return false; + } + + sd_status = !r1; + return sd_status; +} + +DSTATUS sd_disk_initialize(BYTE drv) +{ + return sd_disk_status(drv); +} + +DSTATUS sd_disk_status(BYTE drv) +{ + ASSERT(!drv); + + if (sd_status) + return RES_OK; + else + return STA_NOINIT; +} + +DRESULT sd_disk_read(BYTE drv, BYTE* buf, DWORD sector, BYTE count) +{ + ASSERT(!drv); + + if (!sd_status) + return RES_NOTRDY; + + while (count--) + { + if (sd_readBlock(buf, sector * SD_DEFAULT_BLOCKLEN)) + return RES_ERROR; + buf += SD_DEFAULT_BLOCKLEN; + sector++; + } + return RES_OK; +} + +DRESULT sd_disk_write(BYTE drv, const BYTE* buf, DWORD sector, BYTE count) +{ + ASSERT(!drv); + + if (!sd_status) + return RES_NOTRDY; + + while (count--) + { + if (sd_writeBlock(buf, sector * SD_DEFAULT_BLOCKLEN)) + return RES_ERROR; + buf += SD_DEFAULT_BLOCKLEN; + sector++; + } + return RES_OK; +} + +DRESULT sd_disk_ioctl(BYTE drv, BYTE cmd, void* buf) +{ + ASSERT(!drv); + + if (!sd_status) + return RES_NOTRDY; + + switch (cmd) + { + case CTRL_SYNC: + return RES_OK; + + case GET_SECTOR_SIZE: + *(WORD *)buf = SD_DEFAULT_BLOCKLEN; + return RES_OK; + + case GET_SECTOR_COUNT: + { + CardCSD csd; + if (sd_getCSD(&csd)) + return RES_ERROR; + else + { + *(DWORD *)buf = csd.block_num; + return RES_OK; + } + + } + + case GET_BLOCK_SIZE: + *(DWORD *)buf = 1; + return RES_OK; + + default: + LOG_ERR("unknown command: [%d]\n", cmd); + return RES_PARERR; + } +} + +DWORD get_fattime(void) +{ + return 0; +} diff --git a/2.5/bertos/drv/sd.h b/2.5/bertos/drv/sd.h new file mode 100644 index 00000000..42c1d7df --- /dev/null +++ b/2.5/bertos/drv/sd.h @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \brief Function library for secure digital memory. + * + * Right now, the interface for these function is the one defined in diskio.h from + * the FatFS module. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "sd" + * $WIZ$ module_depends = "kfile", "timer" + * $WIZ$ module_hw = "bertos/hw/hw_sd.h" + */ + + +#ifndef DRV_SD_H +#define DRV_SD_H + +#include "cfg/cfg_fat.h" + +#include + +#include + +bool sd_test(void); + +/** + * Initializes the SD driver. + * + * \param _fd A pointer to a kfile where the SD will read/write to. + * \return true if initialization succeds, false otherwise. + */ +bool sd_init(KFile *_fd); + +#if CONFIG_FAT_DRIVES == 1 + + /** + * Same as sd_disk_status. + * + * Card initialization must be done with sd_init. + */ + #define sd_disk_initialize disk_initialize + + /** + * Return the status of the disk. + * + * \param drv The number of the drive to initialize. Currently only drive 0 is allowed. + * \return RES_OK if the sd card was correctly initialized by a previous call to sd_init(), STA_NOINIT otherwise. + */ + #define sd_disk_status disk_status + /** + * Read \a count sectors from SD card. + * + * \param drv The drive number to read from. Only 0 is supported. + * \param buf A buffer to store read data. You can get sector size using sd_disk_ioctl. + * \param sector Start sector number. + * \param count The number of sectors to read. + * \return RES_OK if the function succeded, RES_ERROR if any error occurred, RES_NOTRDY if the disk is not initialized. + * + * \sa diskio.h + */ + #define sd_disk_read disk_read + + #if CONFIG_FAT_FS_READONLY == 0 + + /** + * Write \a count sectors to SD card. + * + * \param drv The drive number to read from. Only 0 is supported. + * \param buf The data to be written. + * \param sector Start sector number. + * \param count The number of sectors to write. + * \return RES_OK if the function succeded, RES_ERROR if any error occurred, RES_NOTRDY if the disk is not initialized. + * + * \sa diskio.h + */ + #define sd_disk_write disk_write + #endif + + /** + * Interface to send device independant commands to the device. + * + * \sa diskio.h and related documentation for further explanations. + */ + #define sd_disk_ioctl disk_ioctl + +#endif /* CONFIG_FAT_DRIVES == 1 */ + +#endif /* DRV_SD_H */ diff --git a/2.5/bertos/drv/ser.c b/2.5/bertos/drv/ser.c new file mode 100644 index 00000000..4a2c923d --- /dev/null +++ b/2.5/bertos/drv/ser.c @@ -0,0 +1,504 @@ +/** + * \file + * + * + * \brief Buffered serial I/O driver + * + * The serial rx interrupt buffers incoming data in a software FIFO + * to decouple the higher level protocols from the line speed. + * Outgoing data is buffered as well for better performance. + * This driver is not optimized for best performance, but it + * has proved to be fast enough to handle transfer rates up to + * 38400bps on a 16MHz 80196. + * + * MODULE CONFIGURATION + * + * \li \c CONFIG_SER_HWHANDSHAKE - set to 1 to enable RTS/CTS handshake. + * Support is incomplete/untested. + * \li \c CONFIG_SER_TXTIMEOUT - Enable software serial transmission timeouts + * + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "ser.h" +#include "wdt.h" +#include "timer.h" +#include "ser_p.h" + +#include "cfg/cfg_ser.h" +#include "cfg/cfg_proc.h" +#include + +#include + +#include /* cpu_relax() */ + +#include /* memset() */ + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_KERN) || ((CONFIG_KERN != 0) && CONFIG_KERN != 1) + #error CONFIG_KERN must be set to either 0 or 1 in cfg_kern.h +#endif +#if !defined(CONFIG_SER_RXTIMEOUT) + #error CONFIG_SER_TXTIMEOUT missing in cfg_ser.h +#endif +#if !defined(CONFIG_SER_RXTIMEOUT) + #error CONFIG_SER_RXTIMEOUT missing in cfg_ser.h +#endif +#if !defined(CONFIG_SER_DEFBAUDRATE) + #error CONFIG_SER_DEFBAUDRATE missing in cfg_ser.h +#endif + + +struct Serial *ser_handles[SER_CNT]; + +/** + * Insert \a c in tx FIFO buffer. + * \note This function will switch out the calling process + * if the tx buffer is full. If the buffer is full + * and \a port->txtimeout is 0 return EOF immediatly. + * + * \return EOF on error or timeout, \a c otherwise. + */ +static int ser_putchar(int c, struct Serial *port) +{ + if (fifo_isfull_locked(&port->txfifo)) + { +#if CONFIG_SER_TXTIMEOUT != -1 + /* If timeout == 0 we don't want to wait */ + if (port->txtimeout == 0) + return EOF; + + ticks_t start_time = timer_clock(); +#endif + + /* Wait while buffer is full... */ + do + { + cpu_relax(); + +#if CONFIG_SER_TXTIMEOUT != -1 + if (timer_clock() - start_time >= port->txtimeout) + { + ATOMIC(port->status |= SERRF_TXTIMEOUT); + return EOF; + } +#endif /* CONFIG_SER_TXTIMEOUT */ + } + while (fifo_isfull_locked(&port->txfifo)); + } + + fifo_push_locked(&port->txfifo, (unsigned char)c); + + /* (re)trigger tx interrupt */ + port->hw->table->txStart(port->hw); + + /* Avoid returning signed extended char */ + return (int)((unsigned char)c); +} + + +/** + * Fetch a character from the rx FIFO buffer. + * \note This function will switch out the calling process + * if the rx buffer is empty. If the buffer is empty + * and \a port->rxtimeout is 0 return EOF immediatly. + * + * \return EOF on error or timeout, \a c otherwise. + */ +static int ser_getchar(struct Serial *port) +{ + if (fifo_isempty_locked(&port->rxfifo)) + { +#if CONFIG_SER_RXTIMEOUT != -1 + /* If timeout == 0 we don't want to wait for chars */ + if (port->rxtimeout == 0) + return EOF; + + ticks_t start_time = timer_clock(); +#endif + + /* Wait while buffer is empty */ + do + { + cpu_relax(); + +#if CONFIG_SER_RXTIMEOUT != -1 + if (timer_clock() - start_time >= port->rxtimeout) + { + ATOMIC(port->status |= SERRF_RXTIMEOUT); + return EOF; + } +#endif /* CONFIG_SER_RXTIMEOUT */ + } + while (fifo_isempty_locked(&port->rxfifo) && (ser_getstatus(port) & SERRF_RX) == 0); + } + + /* + * Get a byte from the FIFO (avoiding sign-extension), + * re-enable RTS, then return result. + */ + if (ser_getstatus(port) & SERRF_RX) + return EOF; + return (int)(unsigned char)fifo_pop_locked(&port->rxfifo); +} + +/** + * Fetch a character from the rx FIFO buffer. + * If the buffer is empty, ser_getchar_nowait() returns + * EOF immediatly. + * \note Deprecated, use ser_getchar with rx_timeout set to 0. + */ +int ser_getchar_nowait(struct Serial *fd) +{ + if (fifo_isempty_locked(&fd->rxfifo)) + return EOF; + + /* NOTE: the double cast prevents unwanted sign extension */ + return (int)(unsigned char)fifo_pop_locked(&fd->rxfifo); +} + + + +/** + * Read at most \a size bytes from \a port and put them in \a buf + * + * \return number of bytes actually read. + */ +static size_t ser_read(struct KFile *fd, void *_buf, size_t size) +{ + Serial *fds = SERIAL_CAST(fd); + + size_t i = 0; + char *buf = (char *)_buf; + int c; + + while (i < size) + { + if ((c = ser_getchar(fds)) == EOF) + break; + buf[i++] = c; + } + + return i; +} + +/** + * \brief Write a buffer to serial. + * + * \return 0 if OK, EOF in case of error. + * + * \todo Optimize with fifo_pushblock() + */ +static size_t ser_write(struct KFile *fd, const void *_buf, size_t size) +{ + Serial *fds = SERIAL_CAST(fd); + const char *buf = (const char *)_buf; + size_t i = 0; + + while (size--) + { + if (ser_putchar(*buf++, fds) == EOF) + break; + i++; + } + return i; +} + + +#if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1 +void ser_settimeouts(struct Serial *fd, mtime_t rxtimeout, mtime_t txtimeout) +{ + #if CONFIG_SER_RXTIMEOUT != -1 + fd->rxtimeout = ms_to_ticks(rxtimeout); + #else + (void)rxtimeout; + #endif + + #if CONFIG_SER_TXTIMEOUT != -1 + fd->txtimeout = ms_to_ticks(txtimeout); + #else + (void)txtimeout; + #endif +} +#endif /* CONFIG_SER_RXTIMEOUT || CONFIG_SER_TXTIMEOUT */ + + +/** + * Set the baudrate for the serial port + */ +void ser_setbaudrate(struct Serial *fd, unsigned long rate) +{ + fd->hw->table->setBaudrate(fd->hw, rate); +} + + +/** + * Set the parity for the \a fd serial port + */ +void ser_setparity(struct Serial *fd, int parity) +{ + fd->hw->table->setParity(fd->hw, parity); +} + +static int ser_error(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + return ser_getstatus(fds); +} + +static void ser_clearerr(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + ser_setstatus(fds, 0); +} + + + +/** + * Flush both the RX and TX buffers. + */ +void ser_purge(struct Serial *fd) +{ + ser_purgeRx(fd); + ser_purgeTx(fd); +} + +/** + * Flush RX buffer. + */ +void ser_purgeRx(struct Serial *fd) +{ + fifo_flush_locked(&fd->rxfifo); +} + +/** + * Flush TX buffer. + */ +void ser_purgeTx(struct Serial *fd) +{ + fifo_flush_locked(&fd->txfifo); +} + + +/** + * Wait until all pending output is completely + * transmitted to the other end. + * + * \note The current implementation only checks the + * software transmission queue. Any hardware + * FIFOs are ignored. + */ +static int ser_flush(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + + /* + * Wait until the FIFO becomes empty, and then until the byte currently in + * the hardware register gets shifted out. + */ + while (!fifo_isempty(&fds->txfifo) + || fds->hw->table->txSending(fds->hw)) + cpu_relax(); + return 0; +} + + +/** + * Initialize a serial port. + * + * \param fd KFile Serial struct interface. + * \param unit Serial unit to open. Possible values are architecture dependant. + */ +static struct Serial *ser_open(struct Serial *fd, unsigned int unit) +{ + ASSERT(unit < countof(ser_handles)); + + ser_handles[unit] = fd; + ASSERT(!fd->is_open); + DB(fd->is_open = true); + + fd->unit = unit; + + fd->hw = ser_hw_getdesc(unit); + + /* Initialize circular buffers */ + ASSERT(fd->hw->txbuffer); + ASSERT(fd->hw->rxbuffer); + fifo_init(&fd->txfifo, fd->hw->txbuffer, fd->hw->txbuffer_size); + fifo_init(&fd->rxfifo, fd->hw->rxbuffer, fd->hw->rxbuffer_size); + + fd->hw->table->init(fd->hw, fd); + + /* Set default values */ +#if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1 + ser_settimeouts(fd, CONFIG_SER_RXTIMEOUT, CONFIG_SER_TXTIMEOUT); +#endif +#if CONFIG_SER_DEFBAUDRATE + ser_setbaudrate(fd, CONFIG_SER_DEFBAUDRATE); +#endif + + /* Clear error flags */ + ser_setstatus(fd, 0); + + return fd; +} + + +/** + * Clean up serial port, disabling the associated hardware. + */ +static int ser_close(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + Serial *port = fds; + + ASSERT(port->is_open); + DB(port->is_open = false); + + // Wait until we finish sending everything + ser_flush(fd); + + port->hw->table->cleanup(port->hw); + DB(port->hw = NULL); + + /* + * We purge the FIFO buffer only after the low-level cleanup, so that + * we are sure that there are no more interrupts. + */ + ser_purge(fds); + return 0; +} + +/** + * Reopen serial port. + */ +static struct KFile *ser_reopen(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + + ser_close(fd); + ser_open(fds, fds->unit); + return (KFile *)fds; +} + +/** + * Init serial driver for \a unit. + * + * Use values SER_UARTn as values for \a unit. + */ +void ser_init(struct Serial *fds, unsigned int unit) +{ + memset(fds, 0, sizeof(*fds)); + + DB(fds->fd._type = KFT_SERIAL); + fds->fd.reopen = ser_reopen; + fds->fd.close = ser_close; + fds->fd.read = ser_read; + fds->fd.write = ser_write; + fds->fd.flush = ser_flush; + fds->fd.error = ser_error; + fds->fd.clearerr = ser_clearerr; + ser_open(fds, unit); +} + + +/** + * Read data from SPI bus. + * Since we are master, we have to trigger slave by sending + * fake chars on the bus. + */ +static size_t spimaster_read(struct KFile *fd, void *_buf, size_t size) +{ + Serial *fd_spi = SERIAL_CAST(fd); + + ser_flush(&fd_spi->fd); + ser_purgeRx(fd_spi); + + size_t total_rd = 0; + uint8_t *buf = (uint8_t *)_buf; + int c; + + while (size--) + { + /* + * Send and receive chars 1 by 1, otherwise the rxfifo + * will overrun. + */ + ser_putchar(0, fd_spi); + + if ((c = ser_getchar(fd_spi)) == EOF) + break; + + *buf++ = c; + total_rd++; + } + return total_rd; +} + +/** + * Write data to SPI bus. + */ +static size_t spimaster_write(struct KFile *fd, const void *buf, size_t size) +{ + Serial *fd_spi = SERIAL_CAST(fd); + + ser_purgeRx(fd_spi); + + return ser_write(&fd_spi->fd, buf, size); +} + + +/** + * Init SPI serial driver \a unit in master mode. + * + * Use SER_SPIn for \a unit parameter. + * + * This interface implements the SPI master protocol over a serial SPI + * driver. This is needed because normal serial driver send/receive data + * at the same time. SPI slaves like memories and other peripherals + * first receive and *then* send response back instead. + * To achieve this, when we are master and we are *sending*, + * we have to discard all incoming data. Then, when we want to + * receive, we must write fake data to SPI to trigger slave devices. + */ +void spimaster_init(Serial *fds, unsigned int unit) +{ + ser_init(fds, unit); + fds->fd.read = spimaster_read; + fds->fd.write = spimaster_write; +} + + diff --git a/2.5/bertos/drv/ser.h b/2.5/bertos/drv/ser.h new file mode 100644 index 00000000..226d9e0c --- /dev/null +++ b/2.5/bertos/drv/ser.h @@ -0,0 +1,218 @@ +/** + * \file + * + * + * \brief High level serial I/O API. + * + * \version $Id$ + * \author Bernie Innocenti + * + * $WIZ$ module_name = "ser" + * $WIZ$ module_depends = "kfile", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ser.h" + * $WIZ$ module_hw = "bertos/hw/hw_ser.h" + * $WIZ$ module_supports = "not atmega103 and not atmega32 and not atmega8" + */ + +#ifndef DRV_SER_H +#define DRV_SER_H + +#include +#include +#include + +#if OS_HOSTED + #include /* BV() */ + + typedef uint16_t serstatus_t; + + /* Software errors */ + #define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ + #define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ + #define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + + /* Hardware errors */ + #define SERRF_RXSROVERRUN 0 /**< Rx shift register overrun, unsupported in emulated serial port. */ + #define SERRF_FRAMEERROR 0 /**< Stop bit missing, unsupported in emulated serial port. */ + #define SERRF_PARITYERROR 0 /**< Parity error, unsupported in emulated serial port. */ + #define SERRF_NOISEERROR 0 /**< Noise error, unsupported in emulated serial port. */ + + enum + { + SER_UART0, + SER_UART1, + + SER_CNT /**< Number of serial ports */ + }; + +#else + #include CPU_HEADER(ser) +#endif + +#include "cfg/cfg_ser.h" + + + +/** + * \name Masks to group TX/RX errors. + * \{ + */ +#define SERRF_RX \ + ( SERRF_RXFIFOOVERRUN \ + | SERRF_RXTIMEOUT \ + | SERRF_RXSROVERRUN \ + | SERRF_PARITYERROR \ + | SERRF_FRAMEERROR \ + | SERRF_NOISEERROR) /**< All possible rx errors */ +#define SERRF_TX (SERRF_TXTIMEOUT) /**< All possible tx errors */ +/*\}*/ + +/** + * \name LSB or MSB first data order for SPI driver. + * + * $WIZ$ ser_order_bit = "SER_MSB_FIRST", "SER_LSB_FIRST" + */ +#define SER_MSB_FIRST 0 +#define SER_LSB_FIRST 1 + +/** + * \name Parity settings for ser_setparity(). + * + * \note Values are AVR-specific for performance reasons. + * Other processors should either decode them or + * redefine these macros. + * \{ + */ +#define SER_PARITY_NONE 0 +#define SER_PARITY_EVEN 2 +#define SER_PARITY_ODD 3 +/*\}*/ + + +/** + * \def CONFIG_SER_STROBE + * + * This is a debug facility that can be used to + * monitor SER interrupt activity on an external pin. + * + * To use strobes, redefine the macros SER_STROBE_ON, + * SER_STROBE_OFF and SER_STROBE_INIT and set + * CONFIG_SER_STROBE to 1. + */ +#if !defined(CONFIG_SER_STROBE) || !CONFIG_SER_STROBE + #define SER_STROBE_ON do {/*nop*/} while(0) + #define SER_STROBE_OFF do {/*nop*/} while(0) + #define SER_STROBE_INIT do {/*nop*/} while(0) +#endif + +struct SerialHardware; + +/** Human-readable serial error descriptions */ +extern const char * const serial_errors[8]; + +/** Serial handle structure */ +typedef struct Serial +{ + /** Serial have a KFile struct implementation **/ + KFile fd; + + /** Physical port number */ + unsigned int unit; + +#ifdef _DEBUG + bool is_open; +#endif + + /** + * \name Transmit and receive FIFOs. + * + * Declared volatile because handled asinchronously by interrupts. + * + * \{ + */ + FIFOBuffer txfifo; + FIFOBuffer rxfifo; + /* \} */ + +#if CONFIG_SER_RXTIMEOUT != -1 + ticks_t rxtimeout; +#endif +#if CONFIG_SER_TXTIMEOUT != -1 + ticks_t txtimeout; +#endif + + /** Holds the flags defined above. Will be 0 when no errors have occurred. */ + volatile serstatus_t status; + + /** Low-level interface to hardware. */ + struct SerialHardware* hw; +} Serial; + + +/** + * ID for serial. + */ +#define KFT_SERIAL MAKE_ID('S', 'E', 'R', 'L') + + +INLINE Serial * SERIAL_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SERIAL); + return (Serial *)fd; +} + +/* Function prototypes */ +//extern int ser_getchar_nowait(struct Serial *port); + +void ser_setbaudrate(struct Serial *fd, unsigned long rate); +void ser_setparity(struct Serial *fd, int parity); +void ser_settimeouts(struct Serial *fd, mtime_t rxtimeout, mtime_t txtimeout); +void ser_resync(struct Serial *fd, mtime_t delay); +int ser_getchar_nowait(struct Serial *fd); + +void ser_purgeRx(struct Serial *fd); +void ser_purgeTx(struct Serial *fd); +void ser_purge(struct Serial *fd); +void ser_init(struct Serial *fds, unsigned int unit); +void spimaster_init(Serial *fds, unsigned int unit); + + +/** + * \name Additional functions implemented as macros + * + * \{ + */ +#define ser_getstatus(serial) ((serial)->status) +#define ser_setstatus(serial, new_status) ((serial)->status = (new_status)) +/* \} */ + +#endif /* DRV_SER_H */ diff --git a/2.5/bertos/drv/ser_p.h b/2.5/bertos/drv/ser_p.h new file mode 100644 index 00000000..ff68f710 --- /dev/null +++ b/2.5/bertos/drv/ser_p.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Hardware dependent serial driver (interface) + * + * \version $Id$ + * + * \author Stefano Fedrigo + * \author Giovanni Bajo + */ + + +#ifndef DRV_SER_P_H +#define DRV_SER_P_H + +#include /* size_t */ + + + +struct SerialHardware; +struct Serial; + +struct SerialHardwareVT +{ + void (*init)(struct SerialHardware *ctx, struct Serial *ser); + void (*cleanup)(struct SerialHardware *ctx); + void (*setBaudrate)(struct SerialHardware *ctx, unsigned long rate); + void (*setParity)(struct SerialHardware *ctx, int parity); + void (*txStart)(struct SerialHardware *ctx); + bool (*txSending)(struct SerialHardware *ctx); +}; + +struct SerialHardware +{ + const struct SerialHardwareVT *table; + unsigned char *txbuffer; + unsigned char *rxbuffer; + size_t txbuffer_size; + size_t rxbuffer_size; +}; + +struct SerialHardware *ser_hw_getdesc(int unit); + + + +#endif /* DRV_SER_P_H */ diff --git a/2.5/bertos/drv/sipo.c b/2.5/bertos/drv/sipo.c new file mode 100644 index 00000000..2d3d64fd --- /dev/null +++ b/2.5/bertos/drv/sipo.c @@ -0,0 +1,122 @@ +/** + * \file + * + * + * + * \brief SIPO Module + * + * The SIPO module transforms a serial input in a parallel output. Please check hw_sipo.h + * file to customize hardware related parameters. + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#include "sipo.h" + +#include "hw/hw_sipo.h" + +#include +#include + +#include + +#include + + +#define SIPO_DATAORDER_START(order) (order ? SIPO_DATAORDER_START_LSB : SIPO_DATAORDER_START_MSB) +#define SIPO_DATAORDER_SHIFT(shift, order) (order ? ((shift) <<= 1) : ((shift) >>= 1)) + +/** + * Write a char in sipo shift register + */ +INLINE void sipo_putchar(uint8_t c, uint8_t bit_order, uint8_t clock_pol) +{ + uint8_t shift = SIPO_DATAORDER_START(bit_order); + + for(int i = 0; i < 8; i++) + { + if((c & shift) == 0) + SIPO_SI_LOW(); + else + SIPO_SI_HIGH(); + + SIPO_SI_CLOCK(clock_pol); + + SIPO_DATAORDER_SHIFT(shift, bit_order); + } +} + +/** + * Write a buffer into the sipo register and, when finished, give a load pulse. + */ +static size_t sipo_write(struct KFile *_fd, const void *_buf, size_t size) +{ + const uint8_t *buf = (const uint8_t *)_buf; + Sipo *fd = SIPO_CAST(_fd); + size_t write_len = size; + + ASSERT(buf); + + SIPO_SET_SI_LEVEL(); + SIPO_SET_CLK_LEVEL(fd->clock_pol); + SIPO_SET_LD_LEVEL(fd->load_device, fd->load_pol); + + // Load into the shift register all the buffer bytes + while(size--) + sipo_putchar(*buf++, fd->bit_order, fd->clock_pol); + + // We finsh to load bytes, so load it. + SIPO_LOAD(fd->load_device, fd->load_pol); + + return write_len; +} + +/** + * Initialize the SIPO + */ +void sipo_init(Sipo *fd) +{ + ASSERT(fd); + + memset(fd, 0, sizeof(Sipo)); + + //Set kfile struct type as a generic kfile structure. + DB(fd->fd._type = KFT_SIPO); + + // Set up SIPO writing functions. + fd->fd.write = sipo_write; + + SIPO_INIT_PIN(); + + /* Enable sipo output */ + SIPO_ENABLE(); +} diff --git a/2.5/bertos/drv/sipo.h b/2.5/bertos/drv/sipo.h new file mode 100644 index 00000000..940f8537 --- /dev/null +++ b/2.5/bertos/drv/sipo.h @@ -0,0 +1,119 @@ +/** + * \file + * + * + * \brief Generic Serial-in, Parallel-out implementation (SIPO). + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + * + * $WIZ$ module_name = "sipo" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_sipo.h" + */ + + + + + +#ifndef DRV_SIPO_H +#define DRV_SIPO_H + +#include "hw/hw_sipo.h" + +#include + +#define SIPO_DATAORDER_START_LSB 1 +#define SIPO_DATAORDER_START_MSB 0x80 + +/** + * Define enum to set sipo data order. + */ +typedef enum SipoBitOrder +{ + SIPO_DATAORDER_MSB = 0, + SIPO_DATAORDER_LSB = 1 +} SipoBitOrder; + +/** + * Define enum to set the start level of clock. + */ +typedef enum SipoClockPol +{ + SIPO_START_LOW = 0, + SIPO_START_HIGH = 1 + +} SipoClkPol; + +/** + * Define enum to set load signal level. + */ +typedef enum SipoLoadPol +{ + SIPO_LOW_TO_HIGH = 0, + SIPO_HIGH_TO_LOW = 1 + +} SipoLoadPol; + +/** + * Sipo KFile context structure. + */ +typedef struct Sipo +{ + KFile fd; ///< File descriptor. + SipoMap load_device; ///< Descriptor of the device that we want drive. + SipoLoadPol load_pol; ///< Set polarity of load signal. + SipoClkPol clock_pol; ///< Set polarity of data clock. + SipoBitOrder bit_order; ///< Set the order of pushed bits in sipo. + +} Sipo; + +/** + * ID for sipo. + */ +#define KFT_SIPO MAKE_ID('S', 'I', 'P', 'O') + +/** + * Convert + ASSERT from generic KFile to Sipo. + */ +INLINE Sipo * SIPO_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SIPO); + return (Sipo *)fd; +} + +void sipo_init(Sipo *fd); + +#endif // DRV_SIPO_H + diff --git a/2.5/bertos/drv/spi_bitbang.c b/2.5/bertos/drv/spi_bitbang.c new file mode 100644 index 00000000..30209a37 --- /dev/null +++ b/2.5/bertos/drv/spi_bitbang.c @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief Emulated SPI Master for DSP firmware download (impl.) + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + + +#include "spi_bitbang.h" +#include "hw/hw_spi.h" + +#include "cfg/cfg_spi_bitbang.h" +#include + +#include + +void spi_assertSS(void) +{ + ATOMIC(SS_ACTIVE()); +} + +void spi_deassertSS(void) +{ + ATOMIC(SS_INACTIVE()); +} + +/** + * Send byte \c c over MOSI line, CONFIG_SPI_DATAORDER first. + * SS pin state is left unchanged. + */ +uint8_t spi_sendRecv(uint8_t c) +{ + uint8_t data = 0; + uint8_t shift = SPI_DATAORDER_START; + + + ATOMIC( + for (int i = 0; i < 8; i++) + { + /* Shift the i-th bit to MOSI */ + if (c & shift) + MOSI_HIGH(); + else + MOSI_LOW(); + /* Assert clock */ + SCK_ACTIVE(); + data |= IS_MISO_HIGH() ? shift : 0; + /* De-assert clock */ + SCK_INACTIVE(); + SPI_DATAORDER_SHIFT(shift); + } + ); + return data; +} + +MOD_DEFINE(spi); +void spi_init(void) +{ + ATOMIC(SPI_HW_INIT()); + MOD_INIT(spi); +} + +/** + * Read \param len from spi, and put it in \param _buff . + */ +void spi_read(void *_buff, size_t len) +{ + uint8_t *buff = (uint8_t *)_buff; + + while (len--) + /* Read byte from spi and put it in buffer. */ + *buff++ = spi_sendRecv(0); + +} + +/** + * Write \param len to spi, and take it from \param _buff . + */ +void spi_write(const void *_buff, size_t len) +{ + const uint8_t *buff = (const uint8_t *)_buff; + + while (len--) + /* Write byte pointed at by *buff to spi */ + spi_sendRecv(*buff++); + +} diff --git a/2.5/bertos/drv/spi_bitbang.h b/2.5/bertos/drv/spi_bitbang.h new file mode 100644 index 00000000..392c790d --- /dev/null +++ b/2.5/bertos/drv/spi_bitbang.h @@ -0,0 +1,77 @@ +/** + * \file + * + * + * \brief Emulated SPI driver. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "spi_bitbang" + * $WIZ$ module_configuration = "bertos/cfg/cfg_spi_bitbang.h" + * $WIZ$ module_hw = "bertos/hw/hw_spi.h" + */ + + +#ifndef DRV_SPI_BITBANG_H +#define DRV_SPI_BITBANG_H + +#include "cfg/cfg_spi_bitbang.h" + +#include + +/** + * Define send and receive order bit. + * + * $WIZ$ ordet_bit_list = "SPI_LSB_FIRST", "SPI_MSB_FIRST" + */ +#define SPI_LSB_FIRST 1 +#define SPI_MSB_FIRST 2 + +#if CONFIG_SPI_DATAORDER == SPI_LSB_FIRST + #define SPI_DATAORDER_START 1 + #define SPI_DATAORDER_SHIFT(i) ((i) <<= 1) +#elif CONFIG_SPI_DATAORDER == SPI_MSB_FIRST + #define SPI_DATAORDER_START 0x80 + #define SPI_DATAORDER_SHIFT(i) ((i) >>= 1) +#endif + +void spi_write(const void *buf, size_t len); +void spi_read(void *buf, size_t len); +uint8_t spi_sendRecv(uint8_t c); +void spi_init(void); +void spi_assertSS(void); +void spi_deassertSS(void); + +#endif /* DRV_SPI_BITBANG_H */ diff --git a/2.5/bertos/drv/stepper.c b/2.5/bertos/drv/stepper.c new file mode 100644 index 00000000..7586cf87 --- /dev/null +++ b/2.5/bertos/drv/stepper.c @@ -0,0 +1,979 @@ +/** + * \file + * + * + * \brief Driver to control stepper motor + * + * \version $Id$ + * \author Francesco Michelini + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Simone Zinanni + * \author Daniele Basile + */ + +#include "stepper.h" + +#include "hw/hw_stepper.h" +#include "hw/hw_sensor.h" + +#include "cfg/cfg_stepper.h" +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL STEPPER_LOG_LEVEL +#define LOG_FORMAT STEPPER_LOG_FORMAT +#include + +#include + +#include + +#include CPU_HEADER(stepper) + +#include // memset + +/** + * \name Motor timings + * \{ + */ +#define MOTOR_SWITCH_TICKS 60000 ///< Timer ticks to wait for 10ms +#define MOTOR_SWITCH_COUNT 5 ///< Number of intervals, long 10ms, to wait before/after switching current off/on +#define MOTOR_HOME_MAX_STEPS 30000 ///< Steps before giving up when trying to reach home +#define MOTOR_CURRENT_TICKS 6000 ///< Number of intervals, long 10ms, to mantain high current +// \} + +///< Stepper motors +static struct Stepper all_motors[CONFIG_NUM_STEPPER_MOTORS]; + +///< General FSM states (or NULL if state is not handled) +static fsm_state general_states[STEPPER_MAX_STATES]; + +// IRQ functions for stepper motors +static void stepper_interrupt(struct Stepper *motor); + +static void stepper_accel(struct Stepper *motor); +static void stepper_decel(struct Stepper *motor); + +static bool stepper_isState(struct Stepper *motor, enum StepperState state); +INLINE void stepper_changeState(struct Stepper *motor, enum StepperState newState); + +static void stepper_enableCheckHome(struct Stepper *motor, bool bDirPositive); + +#define MOTOR_INDEX(motor) (motor->index) + +//------------------------------------------------------------------------ + +INLINE bool setLowCurrent(struct Stepper* motor) +{ + if (motor->power == motor->cfg->powerIdle) + return false; + + motor->power = motor->cfg->powerIdle; + STEPPER_SET_POWER_CURRENT(MOTOR_INDEX(motor), motor->cfg->powerIdle); + + return true; +} + +INLINE bool setHighCurrent(struct Stepper* motor) +{ + if (motor->power == motor->cfg->powerRun) + return false; + + motor->power = motor->cfg->powerRun; + STEPPER_SET_POWER_CURRENT(MOTOR_INDEX(motor), motor->cfg->powerRun); + return true; +} + +INLINE void setCheckSensor(struct Stepper* motor, enum MotorHomeSensorCheck value) +{ + motor->enableCheckHome = value; +} + +INLINE int8_t getCheckSensor(struct Stepper* motor) +{ + return motor->enableCheckHome; +} + +INLINE void setDirection(struct Stepper* motor, enum MotorDirection dir) +{ + ASSERT(dir == DIR_POSITIVE || dir == DIR_NEGATIVE); + motor->dir = dir; + + if (!motor->cfg->flags.axisInverted) + { + STEPPER_SET_DIRECTION(MOTOR_INDEX(motor), (dir == DIR_POSITIVE)); + } + else + { + STEPPER_SET_DIRECTION(MOTOR_INDEX(motor), (dir != DIR_POSITIVE)); + } +} + +/** + * Schedule a new stepper IRQ to happen after \a delay (number of clocks), + * and optionally doing a step at the same time (if \a do_step is true). + */ +INLINE void FAST_FUNC stepper_schedule_irq(struct Stepper* motor, stepper_time_t delay, bool do_step) +{ + + if (do_step) + { + // Record the step we just did + motor->step += motor->dir; + stepper_tc_doPulse(motor->timer); + } + else + stepper_tc_skipPulse(motor->timer); + + stepper_tc_setDelay(motor->timer, delay); +} + + +static void stepper_accel(struct Stepper *motor) +{ + DB(uint16_t old_val = motor->rampValue;) + DB(uint32_t old_clock = motor->rampClock;) + + const struct Ramp *ramp = &motor->cfg->ramp; + + ASSERT(motor->rampClock != 0); + + motor->rampValue = ramp_evaluate(ramp, motor->rampClock); + motor->rampClock += motor->rampValue; + motor->rampStep++; + + DB(if (old_val && motor->rampValue > old_val) + { + LOG_ERR("Runtime ramp error: (max=%x, min=%x)\n", ramp->clocksMaxWL, ramp->clocksMinWL); + LOG_ERR(" %04x @ %lu --> %04x @ %lu\n", old_val, old_clock, motor->rampValue, motor->rampClock); + }) + +} + +static void stepper_decel(struct Stepper *motor) +{ + const struct Ramp *ramp = &motor->cfg->ramp; + DB(uint16_t old_val = motor->rampValue;) + + motor->rampClock -= motor->rampValue; + ASSERT(motor->rampClock != 0); + motor->rampValue = ramp_evaluate(ramp, motor->rampClock); + motor->rampStep--; + DB(ASSERT(!old_val || motor->rampValue >= old_val);); +} + +INLINE void stepper_enable_irq(struct Stepper* motor) +{ + stepper_tc_irq_enable(motor->timer); +} + +INLINE void stepper_disable_irq(struct Stepper* motor) +{ + stepper_tc_irq_disable(motor->timer); +} + +// the home sensor can be in the standard home list or in the digital +// sensor list +bool stepper_readHome(struct Stepper* motor) +{ + return (motor->cfg->homeSensorIndex < NUM_HOME_SENSORS) ? + hw_home_sensor_read(motor->cfg->homeSensorIndex) : + bld_hw_sensor_read(motor->cfg->homeSensorIndex - NUM_HOME_SENSORS); +} + +bool stepper_readLevel(struct Stepper* motor) +{ + return hw_level_sensor_read(motor->cfg->levelSensorIndex); +} + +/************************************************************************/ +/* Finite-state machine to drive stepper logic from IRQ */ +/************************************************************************/ + +INLINE void stepper_changeState(struct Stepper* motor, enum StepperState newState) +{ + ASSERT(newState < STEPPER_MAX_STATES); + + motor->state = motor->cfg->states[newState]; + if (!motor->state) + motor->state = general_states[newState]; + ASSERT(motor->state); +} + +static bool stepper_isState(struct Stepper* motor, enum StepperState state) +{ + return (motor->cfg->states[state] + ? motor->cfg->states[state] == motor->state + : general_states[state] == motor->state); +} + +static bool stepper_checkHomeErrors(struct Stepper* motor) +{ + bool home; + + home = stepper_readHome(motor); + + if (motor->enableCheckHome == MOTOR_HOMESENSOR_INCHECK && home + && (!motor->stepCircular || motor->step < motor->stepCircular / 2)) + /* + * if home Sensor check enabled in movement to 0 position and + * the motor is in home increase the counter + * for rotating motor we include the check that the motor is + * inside the last "lap" (FIXME: check it better) + */ + motor->stepsErrorHome++; + else if (motor->enableCheckHome == MOTOR_HOMESENSOR_OUTCHECK && !home) + /* + * if home Sensor check enabled in movement from 0 position and + * the motor is not in home increase the counter + */ + motor->stepsErrorHome++; + else + // clear error steps counter + motor->stepsErrorHome = 0; + + // if this is the last consecutive position in which the motor is in/out home ... + ASSERT(motor->stepsErrorHome <= MOTOR_CONSECUTIVE_ERROR_STEPS); + if (motor->stepsErrorHome >= MOTOR_CONSECUTIVE_ERROR_STEPS) + { + // if the position at which the motor first saw/didn't see the home + // is out of tolerance -> breakmotor -> ERROR + if (motor->step > motor->stepsTollMax || motor->step < motor->stepsTollMin ) + { + // break motor and error + motor->speed = SPEED_STOPPED; + motor->stepToReach = motor->step; + + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return false; + } + + // the motor reached the home crossing -> disable error check + setCheckSensor(motor, MOTOR_HOMESENSOR_NOCHECK); + } + + return true; +} + +static void stepper_checkLevelSensor(struct Stepper* motor) +{ + // level sensor check + if (motor->step > motor->stepsDeaf) + { + if (stepper_readLevel(motor)) + { + // record current position, disable check and stop motor + motor->stepsDeaf = DEAFSTEPS_DEFAULT; + motor->stepsLevel = motor->step; + //motor->stepToReach = motor->step + motor->rampStep * motor->dir; + + motor->stepToReach = motor->step; + motor->rampClock = motor->cfg->ramp.clocksMaxWL; + motor->rampValue = motor->cfg->ramp.clocksMaxWL; + } + } +} + +static enum StepperState FAST_FUNC FSM_run(struct Stepper *motor) +{ + uint16_t distance; + + if (!stepper_checkHomeErrors(motor)) + return MSTS_ERROR; + + stepper_checkLevelSensor(motor); + + if ((motor->stepToReach != STEPS_INFINITE_POSITIVE) && + (motor->stepToReach != STEPS_INFINITE_NEGATIVE )) + { + // Calculate (always positive) distance between current position and destination step + distance = (uint16_t)((motor->stepToReach - motor->step) * motor->dir); + } + else + { + // We're at a very long distance ;-) + distance = 0xFFFF; + // if the motor is rotating and it has just ran a complete round + // the position is set to 0 + if(motor->step == motor->stepCircular) + motor->step = 0; + } + + if (distance == 0) + // Position reached - stop motor + //motor->speed = SPEED_STOPPED; + motor->rampStep = -1; + //motor->rampClock = motor->ramp->clocksMaxWL; + //motor->rampValue = 0; + //motor->rampClock = motor->rampValue = motor->ramp->clocksMaxWL; + + else if (distance <= (uint16_t)motor->rampStep) + stepper_decel(motor); + + // check whether the velocity must be changed + else if (motor->speed < (uint16_t)motor->rampValue) + { + stepper_accel(motor); + if (motor->speed > (uint16_t)motor->rampValue) + motor->speed = (uint16_t)motor->rampValue; + } + else if (motor->speed > (uint16_t)motor->rampValue) + stepper_decel(motor); + + // If rampStep == -1, leave output pin high and wait for low current + if (motor->rampStep < 0) + { + // Wait before switching to low current + motor->speed = SPEED_STOPPED; + + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + + /* + * If there was a home sensor check activated, and the check has not + * been done yet, it means that we reached the end position without + * finding the home (or exiting from it). This is bad! + */ + if (motor->enableCheckHome != MOTOR_HOMESENSOR_NOCHECK) + return MSTS_ERROR; + + // check if the motor has to stay in high current + if(motor->cfg->flags.highcurrentBit) + { + motor->changeCurrentIrqs = MOTOR_CURRENT_TICKS; + return MSTS_IDLE; + } + + return MSTS_PREIDLE; + } + + // Wait for high->low transition + ASSERT(motor->rampValue > motor->cfg->pulse); + stepper_schedule_irq(motor, motor->rampValue, true); + + return MSTS_RUN; +} + +static enum StepperState FSM_idle(struct Stepper* motor) +{ + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + + if (motor->speed == SPEED_STOPPED) + { + // check if it's time to switch to low current + if(motor->changeCurrentIrqs > 0) + { + if(--motor->changeCurrentIrqs == 0) + setLowCurrent(motor); + } + return MSTS_IDLE; + } + + // Switch to high current and wait for stabilization + // (if the motor is in low current) + if(motor->changeCurrentIrqs == 0) + { + setHighCurrent(motor); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + } + + return MSTS_PRERUN; +} + +static enum StepperState FSM_preidle(struct Stepper* motor) +{ + // Normal operation mode + motor->changeCurrentIrqs = 0; + setLowCurrent(motor); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_IDLE; +} + +static enum StepperState FSM_error(struct Stepper* motor) +{ + // Error condition mode + setLowCurrent(motor); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_ERROR; +} + +static enum StepperState FSM_prerun(struct Stepper* motor) +{ + enum MotorDirection dir; + + // distance != 0? + if ((motor->stepToReach != motor->step) || + (motor->stepToReach == STEPS_INFINITE_POSITIVE) || + (motor->stepToReach == STEPS_INFINITE_NEGATIVE) ) + { + // Setup for first step + motor->rampStep = 0; + + // Setup Direction + if(motor->stepToReach == STEPS_INFINITE_POSITIVE) + dir = DIR_POSITIVE; + else if(motor->stepToReach == STEPS_INFINITE_NEGATIVE) + dir = DIR_NEGATIVE; + else if(motor->stepToReach > motor->step) + dir = DIR_POSITIVE; + else + dir = DIR_NEGATIVE; + + setDirection(motor, dir); + + // Enable of the home sensor control, if necessary + // (before calling this function set the motor direction as above) + stepper_enableCheckHome(motor, (dir == DIR_POSITIVE)); + + // if the movement is infinite negative set the sw direction positive + // (not the hw: see below) to count the steps + if(motor->stepToReach == STEPS_INFINITE_NEGATIVE) motor->dir = DIR_POSITIVE; + + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_RUN; + } + else + { + /* + * If we are here we should do at least one step. + * anyway .... + */ + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return MSTS_PREIDLE; + } +} + +static enum StepperState FSM_preinit(struct Stepper* motor) +{ + // Set current high, and wait for stabilization + if (setHighCurrent(motor)) + { + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return MSTS_PREINIT; + } + + /* + * This state is used when initializing the motor, to bring back + * to the home. The idea is that we do not know where the motor + * is at this point, so there can be two possibilities: + * + * - The motor is already in home. We do not know how much into the + * home we are. So we need to get out of the home (MSTS_LEAVING) + * and then get back into it of the desired number of steps. + * + * - The motor is not in home: we need to look for it (MSTS_INIT). + * We can safely assume that we will find the home in the negative + * direction. For circular motors, any direction would do. For + * other motors, the home is set at zero, so the current position + * has to be a positive value. + * + */ + if (stepper_readHome(motor)) + { + setDirection(motor, DIR_POSITIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_LEAVING; + } + + setDirection(motor, DIR_NEGATIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_INIT; +} + + +static enum StepperState FSM_init(struct Stepper* motor) +{ + // If we are not in home, keep looking + if (!stepper_readHome(motor)) + { + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_INIT; + } + + /* + * Home! We still need to enter the home of the specified number of steps. + * That will be our absolute zero. + */ + + motor->step = motor->cfg->stepsInHome - 1; // start counting down steps in home + motor->stepToReach = 0; + + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_ENTERING; +} + +static enum StepperState FSM_entering(struct Stepper* motor) +{ + // We must be in home + //ASSERT(stepper_readHome(motor)); + + // if while entering the sensor we are no more in home we reset the steps + // counter (optical sensor) + if(!stepper_readHome(motor)) + motor->step = motor->cfg->stepsInHome - 1; + + // Current Position must be non-negative + ASSERT(motor->step >= 0); + + if(motor->step == 0) + { + // reach the final target inside home sensor + motor->step = 0; + return MSTS_PREIDLE; + } + + // keep doing steps + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_ENTERING; +} + +static enum StepperState FSM_leaving(struct Stepper* motor) +{ + ASSERT(motor->dir == DIR_POSITIVE); + + motor->step = 0; + if (!stepper_readHome(motor)) + { + // we are out of home : change state and going far from sensor + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_OUTHOME; + } + else + { + // Still at home. Just wait here and keep doing steps + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_LEAVING; + } +} + +static enum StepperState FSM_outhome(struct Stepper* motor) +{ + ASSERT(motor->dir == DIR_POSITIVE); + + // We must be out of home: once we are no more in home + // we just need to move away, even if not very precide (optical sensor) + // ASSERT(!stepper_readHome(motor)); + + if(motor->step >= motor->cfg->stepsOutHome) + { + // reach the final target outside home sensor + motor->step = 0; + + // start home entering procedure (delay in executing step) + setDirection(motor, DIR_NEGATIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return MSTS_INIT; + } + + // keep doing steps + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_OUTHOME; +} + +static void FAST_FUNC stepper_interrupt(struct Stepper *motor) +{ + enum StepperState newState; + + // Check if we need to skip a certain number of IRQs + if (motor->skipIrqs) + { + --motor->skipIrqs; + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return; + } + + ASSERT(motor->state); + newState = motor->state(motor); + stepper_changeState(motor, newState); +} + + + + +/************************************************************************/ +/* Public API */ +/************************************************************************/ + +/** + * Initialize the stepper module + */ +void stepper_init(void) +{ + STEPPER_INIT(); + + // before starting the power all the stepper enable must be surely low + stepper_disable(); + + // Bind functions to general states + memset(general_states, 0, sizeof(general_states)); + general_states[MSTS_IDLE] = FSM_idle; + general_states[MSTS_PREIDLE] = FSM_preidle; + general_states[MSTS_PRERUN] = FSM_prerun; + general_states[MSTS_RUN] = FSM_run; + general_states[MSTS_PREINIT] = FSM_preinit; + general_states[MSTS_INIT] = FSM_init; + general_states[MSTS_ENTERING] = FSM_entering; + general_states[MSTS_LEAVING]= FSM_leaving; + general_states[MSTS_OUTHOME]= FSM_outhome; + general_states[MSTS_ERROR]= FSM_error; +} + +void stepper_end(void) +{ + // Disable all stepper timer interrupt to stop motors + for (int i = 0; i < CONFIG_NUM_STEPPER_MOTORS; i++) + stepper_disable_irq(&all_motors[i]); +} + +/** + * Apply a setup config to motor structure context + */ +struct Stepper* stepper_setup(int index, struct StepperConfig *cfg) +{ + struct Stepper* motor; + + ASSERT(index < CONFIG_NUM_STEPPER_MOTORS); + + motor = &all_motors[index]; + motor->index = index; + motor->cfg = cfg; + + //Register timer to stepper, and enable irq + stepper_tc_setup(motor->index, &stepper_interrupt, motor); + + stepper_reset(motor); + + stepper_enable_irq(motor); + + return motor; +} + +/** + * Set the enable for all the motors to 0 before switching on the power + */ +void stepper_disable(void) +{ + STEPPER_DISABLE_ALL(); +} + +/** + * Reset the motor + */ +void stepper_reset(struct Stepper *motor) +{ + /* + * To stop motor diable stepper irq. + */ + stepper_disable_irq(motor); + + //Disable a stepper motor + STEPPER_DISABLE(MOTOR_INDEX(motor)); + + // Setup context variables + motor->power = 0; + motor->step = 0; + motor->rampStep = -1; + // We cannot set the clock at zero at start because of a limit in the fixed point ramp + motor->rampClock = motor->cfg->ramp.clocksMaxWL; + motor->rampValue = motor->cfg->ramp.clocksMaxWL; + motor->speed = SPEED_STOPPED; + motor->stepToReach = 0; + motor->skipIrqs = 0; + motor->stepCircular = 0; + setDirection(motor, DIR_POSITIVE); + setLowCurrent(motor); + + motor->changeCurrentIrqs = 0; + + // default value (disable level sensor check) + motor->stepsDeaf = DEAFSTEPS_DEFAULT; + + STEPPER_SET_HALF_STEP(MOTOR_INDEX(motor), motor->cfg->flags.halfStep); + STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlBit); + + if (motor->cfg->homeSensorIndex < NUM_HOME_SENSORS) + hw_home_sensor_set_inverted(motor->cfg->homeSensorIndex, motor->cfg->flags.homeInverted); + + if (motor->cfg->levelSensorIndex != MOTOR_NO_LEVEL_SENSOR) + hw_level_sensor_set_inverted(motor->cfg->levelSensorIndex, motor->cfg->flags.levelInverted); + + stepper_changeState(motor, MSTS_IDLE); + + // Reset stepper timer counter + stepper_tc_resetTimer(motor->timer); + + // reset hw to the stepper motor + STEPPER_RESET(MOTOR_INDEX(motor)); + STEPPER_ENABLE(MOTOR_INDEX(motor)); +} + + +void stepper_updateHalfStep(struct Stepper *motor) +{ + STEPPER_SET_HALF_STEP(MOTOR_INDEX(motor), motor->cfg->flags.halfStep); +} + +void stepper_updateControlBit(struct Stepper *motor) +{ + STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlBit); +} + +void stepper_updateControlMoveBit(struct Stepper *motor) +{ + STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlMoveBit); +} + +/** + * Find the home of a \a motor assuming no current knowledge about its position. + * + * This must be done when the motor is desynchronized with the firmware and + * we do not know anymore where it is. + * + * In normal operation mode, to go back to the home, it is sufficient to use + * move to step #0 with stepper_move, since the home is always at step #0. + */ +void stepper_home(struct Stepper *motor) +{ + + // Begin home procedure + stepper_disable_irq(motor); + + // disable home sensor check (default) + setCheckSensor(motor, MOTOR_HOMESENSOR_NOCHECK); + // deafult value (disable level sensor check) + motor->stepsDeaf = DEAFSTEPS_DEFAULT; + + setDirection(motor, DIR_POSITIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + stepper_changeState(motor, MSTS_PREINIT); + + stepper_enable_irq(motor); +} + + +void stepper_setStep(struct Stepper *motor, int16_t step) +{ + motor->step = step; +} + + +int16_t stepper_getStep(struct Stepper *motor) +{ + return motor->step; +} + +int16_t stepper_getLevelStep(struct Stepper *motor) +{ + return motor->stepsLevel; +} + +void stepper_set_stepCircular(struct Stepper *motor, int16_t steps) +{ + motor->stepCircular = steps; +} + +int16_t stepper_get_stepCircular(struct Stepper *motor) +{ + return motor->stepCircular; +} + +int16_t stepper_scaleSteps(struct Stepper *motor, int16_t dir) +{ + int16_t steps; + + // scale the current position inside the motor lap + if(!motor->stepCircular) return 0; + + // to be sure .... + while(motor->step > motor->stepCircular) motor->step -= motor->stepCircular; + + if(dir == DIR_NEGATIVE) + { + steps = ((motor->stepCircular - motor->step) % motor->stepCircular); + motor->step = steps; + } + /* + else + steps = (motor->step % motor->stepCircular); + motor->step = steps; + */ + return motor->step; +} + +static void stepper_enableCheckHome(struct Stepper *motor, bool bDirPositive) +{ + enum MotorHomeSensorCheck value = MOTOR_HOMESENSOR_NOCHECK; // default + + motor->stepsTollMin = 0; + + if((motor->stepToReach != STEPS_INFINITE_POSITIVE) && + (motor->stepToReach != STEPS_INFINITE_NEGATIVE) ) + { + if(bDirPositive) // else if(motor->dir == DIR_POSITIVE) + { + /* if the direction is positive (movement from 0 position), + * if the starting position is inside home and the target position + * is outside home -> the motor has to cross the home sensor -> enable the control + */ + if (motor->step < motor->cfg->stepsInHome - motor->cfg->stepsTollOutHome && + motor->stepToReach > motor->cfg->stepsInHome + motor->cfg->stepsTollOutHome) + { + value = MOTOR_HOMESENSOR_OUTCHECK; + // home sensor out max position + motor->stepsTollMax = motor->cfg->stepsInHome + motor->cfg->stepsTollOutHome + MOTOR_CONSECUTIVE_ERROR_STEPS; + // home sensor in max position + if(motor->cfg->stepsInHome + MOTOR_CONSECUTIVE_ERROR_STEPS > motor->cfg->stepsTollOutHome) + motor->stepsTollMin = motor->cfg->stepsInHome + MOTOR_CONSECUTIVE_ERROR_STEPS - motor->cfg->stepsTollOutHome; + } + } + else // if(motor->dir == DIR_NEGATIVE) + { + /* + * if the direction is negative (movement to 0 position), + * if the starting position is far from home and the target position + * is inside home -> the motor has to cross the home sensor -> enable the control + */ + if (motor->step > motor->cfg->stepsInHome + motor->cfg->stepsTollInHome && + motor->stepToReach < motor->cfg->stepsInHome - motor->cfg->stepsTollInHome) + { + value = MOTOR_HOMESENSOR_INCHECK; + // home sensor out max position + motor->stepsTollMax = motor->cfg->stepsInHome + motor->cfg->stepsTollInHome - MOTOR_CONSECUTIVE_ERROR_STEPS; + // home sensor in max position + if(motor->cfg->stepsInHome > motor->cfg->stepsTollInHome + MOTOR_CONSECUTIVE_ERROR_STEPS) + motor->stepsTollMin = motor->cfg->stepsInHome - (motor->cfg->stepsTollInHome + MOTOR_CONSECUTIVE_ERROR_STEPS); + } + } + } + setCheckSensor(motor, value); +} + +/** + * Move motor to absolute position at specified speed + * + * \arg steps position to reach in steps + * \arg speed speed in timer ticks (use TIME2CLOCKS() to convert) + */ +int16_t stepper_move(struct Stepper *motor, int16_t steps, uint16_t speed, int16_t deafstep) +{ + // if the stepper already is in the desired position -> nothing to do + if (motor->step == steps) + return 0; + + stepper_disable_irq(motor); + + // final position + motor->stepToReach = steps; + + // clear error steps + motor->stepsErrorHome = 0; + + // position to start level check + motor->stepsDeaf = deafstep; + + // clear level position + motor->stepsLevel = 0; + + if (speed < motor->cfg->ramp.clocksMinWL) + { + ASSERT2(0, "speed too fast (small number)"); + speed = motor->cfg->ramp.clocksMinWL; + } + + motor->rampClock = motor->cfg->ramp.clocksMaxWL; + motor->rampValue = motor->cfg->ramp.clocksMaxWL; + + // TODO: find the exact value for motor->speed searching in the ramp array. + motor->speed = speed; + + stepper_enable_irq(motor); + + return 0; +} + + +/** + * Stop motor gracefully + */ +void stepper_stop(struct Stepper *motor) +{ + /* + * The best way is to set the target of the movement to the minimum + * distance needed to decelerate. The logic in FSM_run will do the rest. + */ + if(stepper_idle(motor)) + return; + + stepper_disable_irq(motor); + motor->stepToReach = motor->step + motor->rampStep * motor->dir; + stepper_enable_irq(motor); +} + + +/** + * Stop motor immediately, changing the status + */ +void stepper_break(struct Stepper *motor, enum StepperState state) +{ + // The best way to abort any operation is to go back to pre-idle mode + stepper_disable_irq(motor); + + // Set of Speed disabled and Steps reached so that the function + // stepper_idle() succeeds + motor->speed = SPEED_STOPPED; + motor->stepToReach = motor->step; + stepper_changeState(motor, state); + stepper_enable_irq(motor); +} + +///< Returns true if the stepper is in idle at the final position or in error: +// this means anyway that the motor is not moving +bool stepper_idle(struct Stepper *motor) +{ + return (stepper_isState(motor, MSTS_ERROR) || + (stepper_isState(motor, MSTS_IDLE) && motor->step == motor->stepToReach) ); +} + +///< Returns true if the stepper is in error mode +bool stepper_error(struct Stepper *motor) +{ + return (stepper_isState(motor, MSTS_ERROR)); +} + +///< check the home sensor in zero position +bool stepper_inhome(struct Stepper *motor) +{ + return(stepper_getStep(motor) == 0 && + !stepper_readHome(motor) ); +} diff --git a/2.5/bertos/drv/stepper.h b/2.5/bertos/drv/stepper.h new file mode 100644 index 00000000..1ad268b9 --- /dev/null +++ b/2.5/bertos/drv/stepper.h @@ -0,0 +1,228 @@ +/** + * \file + * + * + * \brief Driver to control stepper motor + * + * \version $Id$ + * + * \author Francesco Michelini + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Simone Zinanni + * \author Daniele Basile + * + * $WIZ$ module_name = "stepper" + * $WIZ$ module_depends = "timer", "ramp" + * $WIZ$ module_configuration = "bertos/cfg/cfg_stepper.h" + * $WIZ$ module_hw = "bertos/hw/hw_stepper.h" + * $WIZ$ module_supports = "not avr" + */ + +#ifndef DRV_STEPPER_H +#define DRV_STEPPER_H + +#include + +#include + +// Forward declaration +struct Stepper; + +///< Special value for steps to move the motor continuously +#define STEPS_INFINITE_POSITIVE ((int16_t)0xFFFF) +#define STEPS_INFINITE_NEGATIVE ((int16_t)0x8FFF) + +///< Maximum value for stepper steps +#define MAX_STEPS 0x7FFF + +///< Default value -> no level sensor associated to the motor +#define MOTOR_NO_LEVEL_SENSOR 0xFFFF + +///< Default value -> no home sensor associated to the motor +#define MOTOR_NO_HOME_SENSOR 0xFFFF + +///< Default value for deafsteps in normal movement (no level sensor) +#define DEAFSTEPS_DEFAULT MAX_STEPS + +///< Out-of-band values for speed +//\{ +#define SPEED_STOPPED 0xFFFF ///< motor is stopped +#define SPEED_HOMING 0xFFFE ///< motor is homing +//\} + +// default values for steps inside and outside home sensor +#define MOTOR_INSIDE_HOME_STEPS 10 +#define MOTOR_OUTSIDE_HOME_STEPS 40 + +// default value for home sensor tolerance +#define MOTOR_TOLERANCE_HOME_STEPS 2 + +// default value for consecutive error +#define MOTOR_CONSECUTIVE_ERROR_STEPS 3 + +// values for the home control enabling +enum MotorHomeSensorCheck +{ + MOTOR_HOMESENSOR_NOCHECK = 0, + MOTOR_HOMESENSOR_INCHECK, + MOTOR_HOMESENSOR_OUTCHECK +}; + +// default value in ms for home procedure timeout +#define MOTOR_TIMEOUT_HOME 20000 + +/** + * Motor direction + */ +enum MotorDirection +{ + DIR_POSITIVE = 1, ///< moving away from zero (which is the home) + DIR_NONE = 0, ///< no movement + DIR_NEGATIVE = -1 ///< moving towards towards zero (which is the home) +}; + +#define STEPPER_MAX_STATES 32 + + +/** + * Stepper state-machine conditions + */ +enum StepperState +{ + MSTS_UNINIT, ///< stepper_init() not yet called + MSTS_RUN, ///< running + MSTS_IDLE, ///< waiting for a command + MSTS_PREIDLE, ///< waiting before going low-current + MSTS_PRERUN, ///< waiting after high-current + +// Home procedure + MSTS_PREINIT, ///< preparing to initialize ;-) + MSTS_INIT, ///< initializing home procedure + MSTS_ENTERING, ///< entering home sensor + MSTS_LEAVING, ///< moving away from home (inside the sensor) + MSTS_OUTHOME, ///< moving away from home (outside the sensor) + + MSTS_ERROR, ///< error status + + ///< Dummy entry to guarantee the right underlying size for the enum + MSTS_DUMMY_ALIGN = STEPPER_MAX_STATES - 1 +}; + +///< Pointer to a function handling a state of the FSM driving the motor +typedef enum StepperState (*fsm_state)(struct Stepper* ); + +///< Pointer to a isr stepper function +typedef void (*stepper_isr_t)(struct Stepper* ); + +///< Time for steppers motor +typedef uint16_t stepper_time_t; + +/** + * Stepper configuration + */ +struct StepperConfig +{ + struct Ramp ramp; ///< Acceleration ramp + uint16_t pulse; ///< (clocks) Length of the clock pulse used to drive the motor + + fsm_state states[STEPPER_MAX_STATES]; ///< Custom FSM states (or NULL for default handling) + + int16_t stepsInHome; ///< Additional steps to do after home detection + int16_t stepsOutHome; ///< Additional steps to do leaving sensor in home procedure + uint16_t clocksHome; ///< Clock ticks for steps done when searching home + + int16_t stepsTollOutHome; ///< tolerance steps leaving home sensor control while moving + int16_t stepsTollInHome; ///< tolerance steps leaving home sensor control while moving + + int16_t timeoutHome; ///< timeout in ms in home procedure + + uint8_t powerRun; ///< Vref voltage when motor runs (0-255) + uint8_t powerIdle; ///< Vref voltage when motor is idle (0-255) + + uint16_t homeSensorIndex; ///< Home Sensor index in the sensor list + uint16_t levelSensorIndex; ///< Level Sensor index in the sensor list + + struct + { + bool homeInverted : 1; ///< True for inverted home sensor + bool halfStep : 1; ///< True for half-step mode + bool axisInverted : 1; ///< True if the CW/CCW are inverted from default + bool levelInverted : 1; ///< True for inverted level sensor + bool controlBit : 1; ///< Control bit status + bool controlMoveBit : 1; ///< Control bit status in movement + bool highcurrentBit : 1; ///< Mantain high current bit status + } flags; +}; + + +/** + * Motor context structure + */ +struct Stepper +{ + const struct StepperConfig *cfg; ///< Configuration of this stepper + fsm_state state; ///< Motor FSM state function + + struct TimerCounter *timer; ///< HW timer bound to this motor + uint16_t index; ///< Index of the motor + + volatile int16_t step; ///< Steps counter (used in interrupt) + volatile int16_t rampStep; ///< Current position in acceleration ramp (used in intrrupt) +#if RAMP_USE_FLOATING_POINT + float rampValue; ///< Nr of Ticks for current step in ramp + float rampClock; ///< Cumulative nr of ticks for current step in ramp +#else + uint16_t rampValue; + uint32_t rampClock; +#endif + + enum MotorDirection dir; ///< Current direction + uint8_t power; ///< Current power + + uint16_t speed; ///< Timer compare value to reach + int16_t stepToReach; ///< Final position to reach when running + + int16_t skipIrqs; ///< Counter used to skip IRQs (delay state changes) + int16_t changeCurrentIrqs; ///< Counter used to change current level (delay state changes) + + int8_t enableCheckHome; ///< enable the home sensor control during movement + int8_t stepsErrorHome; ///< number of consecutive steps in error + int16_t stepsTollMax; ///< home sensor out max position + int16_t stepsTollMin; ///< home sensor in max position + + int16_t stepsDeaf; ///< Position after which start the level check + int16_t stepsLevel; ///< Position of level contact + + int16_t stepCircular; ///< Steps corresponding to 360 degrees (rotating motor) +}; + + +void stepper_init(void); +void stepper_end(void); +struct Stepper *stepper_setup(int index, struct StepperConfig *cfg); +void stepper_disable(void); +void stepper_reset(struct Stepper *motor); +void stepper_home(struct Stepper *motor); +void stepper_setStep(struct Stepper *motor, int16_t step); +int16_t stepper_getStep(struct Stepper *motor); +int16_t stepper_move(struct Stepper *motor, int16_t step, uint16_t speed, int16_t deafstep); +void stepper_stop(struct Stepper *motor); +void stepper_break(struct Stepper *motor, enum StepperState state); +bool stepper_idle(struct Stepper *motor); +bool stepper_readHome(struct Stepper *motor); +bool stepper_readLevel(struct Stepper *motor); +void stepper_updateHalfStep(struct Stepper *motor); +void stepper_updateControlBit(struct Stepper *motor); +void stepper_updateControlMoveBit(struct Stepper *motor); +bool stepper_error(struct Stepper *motor); +bool stepper_inhome(struct Stepper *motor); +int16_t stepper_getLevelStep(struct Stepper *motor); +void stepper_set_stepCircular(struct Stepper *motor, int16_t steps); +int16_t stepper_get_stepCircular(struct Stepper *motor); +int16_t stepper_scaleSteps(struct Stepper *motor, int16_t dir); + +#endif /* DRV_STEPPER_H */ diff --git a/2.5/bertos/drv/tas5706a.c b/2.5/bertos/drv/tas5706a.c new file mode 100644 index 00000000..b935c42f --- /dev/null +++ b/2.5/bertos/drv/tas5706a.c @@ -0,0 +1,146 @@ +/** + * \file + * + * + * \brief TAS5706A Power DAC i2c driver. + * + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "tas5706a.h" +#include + +#include +#include + +#include "hw/hw_tas5706a.h" +#include "cfg/cfg_tas5706a.h" + +#define TAS_ADDR 0x36 + +typedef uint8_t tas_addr_t; + +static bool tas5706a_send(tas_addr_t addr, const void *buf, size_t len) +{ + bool ret = i2c_start_w(TAS_ADDR) && i2c_put(addr) && i2c_send(buf, len); + i2c_stop(); + return ret; +} + +INLINE bool tas5706a_putc(tas_addr_t addr, uint8_t ch) +{ + return tas5706a_send(addr, &ch, sizeof(ch)); +} + +static bool tas5706a_recv(tas_addr_t addr, void *buf, size_t len) +{ + bool ret = i2c_start_w(TAS_ADDR) && i2c_put(addr) && i2c_start_r(TAS_ADDR) && i2c_recv(buf, len); + i2c_stop(); + return ret; +} + +INLINE int tas5706a_getc(tas_addr_t addr) +{ + uint8_t ch; + if (tas5706a_recv(addr, &ch, sizeof(ch))) + return (int)(uint8_t)ch; + else + return EOF; +} + +#define TRIM_REG 0x1B +#define SYS_REG2 0x05 +#define VOLUME_REG 0x07 +#define MUTE_VOL 0xFF + +#define DB_TO_REG(db) ((24 - (db)) * 2) + +void tas5706a_init(void) +{ + MOD_CHECK(i2c); + MOD_CHECK(timer); + TAS5706A_PIN_INIT(); + timer_delay(200); + TAS5706A_SETPOWERDOWN(false); + TAS5706A_SETMUTE(false); + TAS5706A_MCLK_INIT(); + timer_delay(2); + TAS5706A_SETRESET(false); + timer_delay(20); + tas5706a_putc(TRIM_REG, 0x00); + + tas5706a_putc(VOLUME_REG, DB_TO_REG(CONFIG_TAS_MAX_VOL)); + + /* Unmute */ + tas5706a_putc(SYS_REG2, 0); +} + +#define CH1_VOL_REG 0x08 +#define CH2_VOL_REG 0x09 +#define CH3_VOL_REG 0x0A +#define CH4_VOL_REG 0x0B + +void tas5706a_setVolume(Tas5706aCh ch, tas5706a_vol_t vol) +{ + ASSERT(ch < TAS_CNT); + ASSERT(vol <= TAS_VOL_MAX); + + tas_addr_t addr1, addr2; + + switch(ch) + { + case TAS_CH1: + addr1 = CH1_VOL_REG; + addr2 = CH3_VOL_REG; + break; + case TAS_CH2: + addr1 = CH2_VOL_REG; + addr2 = CH4_VOL_REG; + break; + default: + ASSERT(0); + return; + } + + uint8_t vol_att = 0xff - ((vol * 0xff) / TAS_VOL_MAX); + + tas5706a_putc(addr1, vol_att); + tas5706a_putc(addr2, vol_att); +} + +void tas5706a_setLowPower(bool val) +{ + TAS5706A_SETPOWERDOWN(val); + TAS5706A_SETMUTE(val); +} + diff --git a/2.5/bertos/drv/tas5706a.h b/2.5/bertos/drv/tas5706a.h new file mode 100644 index 00000000..d7811de5 --- /dev/null +++ b/2.5/bertos/drv/tas5706a.h @@ -0,0 +1,94 @@ +/** + * \file + * + * + * \brief TAS5706A Power DAC i2c driver. + * + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "tas5706a" + * $WIZ$ module_depends = "timer", "i2c" + * $WIZ$ module_configuration = "bertos/cfg/cfg_tas5706a.h" + * $WIZ$ module_hw = "bertos/hw/hw_tas5706a.h" + */ + +#ifndef DRV_TAS5706A_H +#define DRV_TAS5706A_H + +#include + +typedef enum Tas5706aCh +{ + TAS_CH1, + TAS_CH2, + TAS_CNT, +} Tas5706aCh; + +/** + * TAS minimum volume (%). + */ +#define TAS_VOL_MIN 0 + +/** + * TAS maximum volume (%). + */ +#define TAS_VOL_MAX 100 + +typedef uint8_t tas5706a_vol_t; + +/** + * Set the volume for the specified channel. + * + * The volume must be expressed in % and will be at maximum CONFIG_TAS_MAX_VOL. + * + * \param ch The channel to be controlled. + * \param vol The volume you want to set. + */ +void tas5706a_setVolume(Tas5706aCh ch, tas5706a_vol_t vol); + +/** + * Initialize the TAS chip. + */ +void tas5706a_init(void); + +/** + * Set TAS chip to low power mode. + * + * When in low power mode, the TAS will not play any sound. You should put the TAS chip in low + * power whenever possible to prevent overheating and to save power. + * + * \param val True if you want to enable low power mode, false otherwise. + */ +void tas5706a_setLowPower(bool val); + +#endif /* DRV_TAS5706A_H */ diff --git a/2.5/bertos/drv/tc520.c b/2.5/bertos/drv/tc520.c new file mode 100644 index 00000000..f285f850 --- /dev/null +++ b/2.5/bertos/drv/tc520.c @@ -0,0 +1,169 @@ +/** + * \file + * + * + * + * \brief TC520 ADC driver (implementation) + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Marco Benelli + */ + + +#include "hw/hw_tc520.h" + +#include +#include + +#include +#include + +#warning FIXME:This implementation is obsolete. Refactor with KFile interface. + +#if 0 + +#include + +static Serial *spi_ser; + +#define TC520_CONVERSION_TIMEOUT ms_to_ticks(1000) +#define INIT_LOAD_VALUE 0x00 + +/** + * Start an AD conversion and return result. + * + * To start a conversion first we must pull down CE pin. + * The ADC starts a convertion and keeps the DV pin high until the end. + * At this point, we can read the conversion value by SPI. + * The convertion result is yield in 3 bytes. + * + * \verbatim + * + * First byte: + * bit | Value + * ----|------- + * 7 | Overrange + * 6 | Polarity + * 5:0 | data bits 15:10 + * + * Second byte: data 9:2 + * + * Third byte: + * bit | Value + * ----|------- + * 7 | data bit 1 + * 6 | data bit 0 + * 5:0 | '0' + * + * \endverbatim + * + * So, to get the result we must shift and recompose the bits. + * \note Overrange bit is handled as the 17th data bit. + */ +tc520_data_t tc520_read(void) +{ + /* Start convertion and wait */ + CE_LOW(); + ticks_t start = timer_clock(); + do + { + /* timeout check */ + if (timer_clock() - start >= TC520_CONVERSION_TIMEOUT) + { + ASSERT(0); + CE_HIGH(); + return TC520_MAX_VALUE; + } + } + while(DV_LOW()); + + start = timer_clock(); + do + { + /* timeout check */ + if (timer_clock() - start >= TC520_CONVERSION_TIMEOUT) + { + ASSERT(0); + CE_HIGH(); + return TC520_MAX_VALUE; + } + } + while(DV_HIGH()); + + /* Ok, convertion finished, read result */ + CE_HIGH(); + READ_LOW(); + + /* RX buffer could be dirty...*/ + ser_purge(spi_ser); + + /* I/O buffer */ + uint8_t buf[3] = "\x0\x0\x0"; + + /* Dummy write to activate recv */ + ser_write(spi_ser, buf, sizeof(buf)); + ser_drain(spi_ser); + READ_HIGH(); + + /* recv */ + ASSERT(ser_read(spi_ser, buf, sizeof(buf)) == sizeof(buf)); + + tc520_data_t res; + + /* Recompose data */ + res = (((tc520_data_t)(buf[0] & 0x3F)) << 10) | (((tc520_data_t)buf[1]) << 2) | (((tc520_data_t)buf[2]) >> 6); + + #define OVERRANGE_BIT BV(7) + /* Handle overrange bit as 17th bit */ + if (buf[0] & OVERRANGE_BIT) + res |= BV32(16); + + return res; +} + + +/** + * Initialize tc520 A/D converter driver + */ +void tc520_init(Serial *spi_port) +{ + spi_ser = spi_port; + /* init io ports */ + TC520_HW_INIT; + /* Send initial load value */ + LOAD_LOW(); + ser_putchar(INIT_LOAD_VALUE, spi_ser); + ser_drain(spi_ser); + LOAD_HIGH(); +} + +#endif diff --git a/2.5/bertos/drv/tc520.h b/2.5/bertos/drv/tc520.h new file mode 100644 index 00000000..bd40c493 --- /dev/null +++ b/2.5/bertos/drv/tc520.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief TC520 ADC driver (intercace) + * + * \version $Id$ + * \author Francesco Sacchi + * \author Marco Benelli + */ + +#ifndef DRV_TC520_H +#define DRV_TC520_H + +#warning FIXME: This drive is obsolete, you should refactor it. + +#include +#include + +typedef uint32_t tc520_data_t; + +/* 17 bit max value */ +#define TC520_MAX_VALUE 0x1FFFFUL + +tc520_data_t tc520_read(void); +void tc520_init(Serial *spi_port); + +#endif /* DRV_TC520_H */ diff --git a/2.5/bertos/drv/thermo.c b/2.5/bertos/drv/thermo.c new file mode 100644 index 00000000..6fa5ba2e --- /dev/null +++ b/2.5/bertos/drv/thermo.c @@ -0,0 +1,327 @@ +/** + * \file + * + * + * \brief Thermo-control driver. + * + * The Thermo controll can works both with kernel or without it. In the case + * we use kernel, the thermo controll is done by one process that poll every + * CONFIG_THERMO_INTERVAL_MS the temperature sensor and make all operation to + * follow the target temperature. While we not use the kernel the module works + * with one timer interrupt in the same way of the kenel case. + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * \author Daniele Basile + * + */ + +#include "hw/thermo_map.h" +#include "hw/hw_thermo.h" + +#include "cfg/cfg_thermo.h" + +#include +#include +#include +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL CONFIG_THERMO_LOG_LEVEL +#define LOG_VERBOSITY CONFIG_THERMO_LOG_FORMAT +#include + +#include +#include +#include + +#include + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) +#define THERMO_TIMER BV(7) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + + +#if CONFIG_KERN + /** Stack process for Thermo process. */ + static PROC_DEFINE_STACK(thermo_poll_stack, 400); +#else + /** Timer for thermo-regulation. */ + static Timer thermo_timer; +#endif + +typedef struct ThermoControlDev +{ + deg_t hifi_samples[CONFIG_THERMO_HIFI_NUM_SAMPLES]; + deg_t cur_hifi_sample; + deg_t target; + thermostatus_t status; + ticks_t expire; + ticks_t on_time; +} ThermoControlDev; + +/** Array of thermo-devices. */ +ThermoControlDev devs[THERMO_CNT]; + +/** + * Return the status of the specific \a dev thermo-device. + */ +thermostatus_t thermo_status(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + return devs[dev].status; +} + + +/** + * Do a single thermo control for device \a dev. + */ +static void thermo_do(ThermoDev index) +{ + ThermoControlDev* dev = &devs[index]; + deg_t cur_temp; + deg_t tolerance = thermo_hw_tolerance(index); + + cur_temp = thermo_hw_read(index); + + // Store the sample into the hifi FIFO buffer for later interpolation + dev->hifi_samples[dev->cur_hifi_sample] = cur_temp; + if (++dev->cur_hifi_sample == CONFIG_THERMO_HIFI_NUM_SAMPLES) + dev->cur_hifi_sample = 0; + + cur_temp = thermo_readTemperature(index); + + if (cur_temp == NTC_SHORT_CIRCUIT || cur_temp == NTC_OPEN_CIRCUIT) + { + if (cur_temp == NTC_SHORT_CIRCUIT) + { + LOG_INFOB(if (!(dev->status & THERMOERRF_NTCSHORT)) + LOG_INFO("dev[%d], thermo_do: NTC_SHORT\n",index);); + + dev->status |= THERMOERRF_NTCSHORT; + } + else + { + + LOG_INFOB(if (!(dev->status & THERMOERRF_NTCOPEN)) + LOG_INFO("dev[%d], thermo_do: NTC_OPEN\n", index);); + + dev->status |= THERMOERRF_NTCOPEN; + } + + /* Reset timeout when there is an ntc error */ + dev->expire = thermo_hw_timeout(index) + timer_clock(); + thermo_hw_off(index); + return; + } + dev->status &= ~(THERMOERRF_NTCOPEN | THERMOERRF_NTCSHORT); + + if ((cur_temp < dev->target - tolerance) || (cur_temp > dev->target + tolerance)) + { + dev->status &= ~THERMO_TGT_REACH; + + /* Check for timeout */ + if (timer_clock() - dev->expire > 0) + { + dev->status |= THERMOERRF_TIMEOUT; + LOG_INFO("dev[%d], thermo_do: TIMEOUT\n", index); + } + } + else /* In target */ + { + /* Clear errors */ + dev->status &= ~THERMO_ERRMASK; + dev->status |= THERMO_TGT_REACH; + + /* Reset timeout in case we go out of target in the future */ + dev->expire = thermo_hw_timeout(index) + timer_clock(); + } + + if (cur_temp < dev->target) + dev->status = (dev->status | THERMO_HEATING) & ~THERMO_FREEZING; + else + dev->status = (dev->status & ~THERMO_HEATING) | THERMO_FREEZING; + + thermo_hw_set(index, dev->target, cur_temp); + +} + +static void poll(void) +{ + for (int i = 0; i < THERMO_CNT; ++i) + if (devs[i].status & THERMO_ACTIVE) + { + LOG_INFO("THERMO [%d] on_time[%ld],\n", i, ticks_to_ms(devs[i].on_time)); + if ((devs[i].status & THERMO_TIMER) && (devs[i].on_time - timer_clock() < 0)) + { + thermo_stop(i); + continue; + } + + thermo_do((ThermoDev)i); + } +} + +#if CONFIG_KERN + static void NORETURN thermo_poll(void) + { + for (;;) + { + poll(); + timer_delay(CONFIG_THERMO_INTERVAL_MS); + } + } +#else + /** + * Thermo soft interrupt. + */ + static void thermo_softint(void) + { + poll(); + timer_add(&thermo_timer); + } +#endif + +/** + * Starts a thermo-regulation for channel \a dev, and turn off timer + * when \a on_time was elapsed. + */ +void thermo_timer(ThermoDev dev, mtime_t on_time) +{ + ASSERT(dev < THERMO_CNT); + devs[dev].on_time = timer_clock() + ms_to_ticks(on_time); + devs[dev].status |= THERMO_TIMER; + thermo_start(dev); +} + + +/** + * Set the target temperature \a temperature for a specific \a dev thermo-device. + */ +void thermo_setTarget(ThermoDev dev, deg_t temperature) +{ + ASSERT(dev < THERMO_CNT); + devs[dev].target = temperature; + devs[dev].expire = timer_clock() + thermo_hw_timeout(dev); + + LOG_INFO("THERMO Set Target dev[%d], T[%d.%d]\n", dev, temperature / 10, temperature % 10); +} + +/** + * Starts a thermo-regulation for channel \a dev. + */ +void thermo_start(ThermoDev dev) +{ + int i; + deg_t temp; + + ASSERT(dev < THERMO_CNT); + + devs[dev].status |= THERMO_ACTIVE; + LOG_INFO("THERMO Start dev[%d], status[%04x]\n", dev, devs[dev].status); + + /* Initialize the hifi FIFO with a constant value (the current temperature) */ + temp = thermo_hw_read(dev); + for (i = 0; i < CONFIG_THERMO_HIFI_NUM_SAMPLES; ++i) + devs[dev].hifi_samples[i] = temp; + devs[dev].cur_hifi_sample = 0; + + /* Reset timeout */ + devs[dev].expire = timer_clock() + thermo_hw_timeout(dev); +} + +/** + * Stops a thermo-regulation for channel \a dev. + */ +void thermo_stop(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + devs[dev].status &= ~THERMO_ACTIVE; + thermo_hw_off(dev); +} + + +/** + * Clear errors for channel \a dev. + */ +void thermo_clearErrors(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + devs[dev].status &= ~(THERMO_ERRMASK); +} + + +/** + * Read the temperature of the thermo-device \a dev using mobile mean. + */ +deg_t thermo_readTemperature(ThermoDev dev) +{ + int i; + long accum = 0; + + MOD_CHECK(thermo); + + for (i = 0; i < CONFIG_THERMO_HIFI_NUM_SAMPLES; i++) + accum += devs[dev].hifi_samples[i]; + + return (deg_t)(accum / CONFIG_THERMO_HIFI_NUM_SAMPLES); +} + +MOD_DEFINE(thermo) + +/** + * Init thermo-control and associated hw. + */ +void thermo_init(void) +{ + THERMO_HW_INIT; + + /* Set all status to off */ + for (int i = 0; i < THERMO_CNT; i++) + devs[i].status = THERMO_OFF; + + MOD_INIT(thermo); + + #if CONFIG_KERN + proc_new_with_name("Thermo", thermo_poll, NULL, sizeof(thermo_poll_stack), thermo_poll_stack); + #else + timer_setDelay(&thermo_timer, ms_to_ticks(CONFIG_THERMO_INTERVAL_MS)); + timer_setSoftint(&thermo_timer, (Hook)thermo_softint, 0); + timer_add(&thermo_timer); + #endif +} diff --git a/2.5/bertos/drv/thermo.h b/2.5/bertos/drv/thermo.h new file mode 100644 index 00000000..02b1ccbc --- /dev/null +++ b/2.5/bertos/drv/thermo.h @@ -0,0 +1,105 @@ +/** + * \file + * + * + * \brief Thermo-control driver. + * + * This module implements multiple thermo controls, which is the logic needed to try + * keeping the temperature of a device constant. For this module, a "device" is a black box + * whose temperature can be measured, and which has a mean to make it hotter or colder. + * For instance, a device could be the combination of a NTC (analog temperature reader) and + * a Peltier connected to the same physic block. + * + * This module relies on a low-level driver to communicate with the device (implementation + * of the black box). This low-level driver also controls the units in which the temperature + * is expressed: thermo control treats it just as a number. + * + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "thermo" + * $WIZ$ module_depends = "timer", "ntc" + * $WIZ$ module_configuration = "bertos/cfg/cfg_thermo.h" + * $WIZ$ module_hw = "bertos/hw/hw_thermo.h", "bertos/hw/thermo_map.h" + */ + +#ifndef DRV_THERMO_H +#define DRV_THERMO_H + +#include "hw/thermo_map.h" + +#include +#include + +typedef uint8_t thermostatus_t; + + +/** + * Set the target temperature at which a given device should be kept. + * + * \param dev Device + * \param temperature Target temperature + */ +void thermo_setTarget(ThermoDev dev, deg_t temperature); + +/** + * Start thermo control for a certain device \a dev and stop it after + * \a on_time msec. + */ +void thermo_timer(ThermoDev dev, mtime_t on_time); + +/** Start thermo control for a certain device \a dev */ +void thermo_start(ThermoDev dev); + +/** Stop thermo control for a certain device \a dev */ +void thermo_stop(ThermoDev dev); + +/** Clear errors for channel \a dev */ +void thermo_clearErrors(ThermoDev dev); + +/** Return the status of the specific \a dev thermo-device. */ +thermostatus_t thermo_status(ThermoDev dev); + +/** + * Return the current temperature of a device currently under thermo + * control. + * + * \param dev Device + * \return Current temperature (Celsius degrees * 10) + */ +deg_t thermo_readTemperature(ThermoDev dev); + +void thermo_init(void); + + +#endif /* DRV_THERMO_H */ diff --git a/2.5/bertos/drv/timer.c b/2.5/bertos/drv/timer.c new file mode 100644 index 00000000..d380e5f1 --- /dev/null +++ b/2.5/bertos/drv/timer.c @@ -0,0 +1,402 @@ +/** + * \file + * + * + * \brief Hardware independent timer driver (implementation) + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include "timer.h" +#include "hw/hw_timer.h" + +#include "cfg/cfg_timer.h" +#include "cfg/cfg_wdt.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include +#include +#include + +#include +#include +#include +#include // cpu_relax() + +#include // proc_decQuantun() + +/* + * Include platform-specific binding code if we're hosted. + * Try the CPU specific one for bare-metal environments. + */ +#if OS_HOSTED + //#include OS_CSOURCE(timer) + #include +#else + #ifndef WIZ_AUTOGEN + #warning Deprecated: now you should include timer_ directly in the makefile. Remove this line and the following once done. + #include CPU_CSOURCE(timer) + #endif +#endif + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_KERN) || ((CONFIG_KERN != 0) && CONFIG_KERN != 1) + #error CONFIG_KERN must be set to either 0 or 1 in config.h +#endif +#if !defined(CONFIG_WATCHDOG) || ((CONFIG_WATCHDOG != 0) && CONFIG_WATCHDOG != 1) + #error CONFIG_WATCHDOG must be set to either 0 or 1 in config.h +#endif + +#if CONFIG_WATCHDOG + #include +#endif + +#if defined (CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + #include /* sig_wait(), sig_check() */ + #include /* proc_current() */ + #include /* BV() */ +#endif + + +/** + * \def CONFIG_TIMER_STROBE + * + * This is a debug facility that can be used to + * monitor timer interrupt activity on an external pin. + * + * To use strobes, redefine the macros TIMER_STROBE_ON, + * TIMER_STROBE_OFF and TIMER_STROBE_INIT and set + * CONFIG_TIMER_STROBE to 1. + */ +#if !defined(CONFIG_TIMER_STROBE) || !CONFIG_TIMER_STROBE + #define TIMER_STROBE_ON do {/*nop*/} while(0) + #define TIMER_STROBE_OFF do {/*nop*/} while(0) + #define TIMER_STROBE_INIT do {/*nop*/} while(0) +#endif + + +/// Master system clock (1 tick accuracy) +volatile ticks_t _clock; + + +#if CONFIG_TIMER_EVENTS + +/** + * List of active asynchronous timers. + */ +REGISTER static List timers_queue; + +/** + * This function really does the job. It adds \a timer to \a queue. + * \see timer_add for details. + */ +INLINE void timer_addToList(Timer *timer, List *queue) +{ + /* Inserting timers twice causes mayhem. */ + ASSERT(timer->magic != TIMER_MAGIC_ACTIVE); + DB(timer->magic = TIMER_MAGIC_ACTIVE;) + + + /* Calculate expiration time for this timer */ + timer->tick = _clock + timer->_delay; + + /* + * Search for the first node whose expiration time is + * greater than the timer we want to add. + */ + Timer *node = (Timer *)LIST_HEAD(queue); + while (node->link.succ) + { + /* + * Stop just after the insertion point. + * (this fancy compare takes care of wrap-arounds). + */ + if (node->tick - timer->tick > 0) + break; + + /* Go to next node */ + node = (Timer *)node->link.succ; + } + + /* Enqueue timer request into the list */ + INSERT_BEFORE(&timer->link, &node->link); +} + +/** + * Add the specified timer to the software timer service queue. + * When the delay indicated by the timer expires, the timer + * device will execute the event associated with it. + * + * \note Interrupt safe + */ +void timer_add(Timer *timer) +{ + ATOMIC(timer_addToList(timer, &timers_queue)); +} + +/** + * Remove a timer from the timers queue before it has expired. + * + * \note Attempting to remove a timer already expired cause + * undefined behaviour. + */ +Timer *timer_abort(Timer *timer) +{ + ATOMIC(REMOVE(&timer->link)); + DB(timer->magic = TIMER_MAGIC_INACTIVE;) + + return timer; +} + + +INLINE void timer_poll(List *queue) +{ + Timer *timer; + + /* + * Check the first timer request in the list and process + * it when it has expired. Repeat this check until the + * first node has not yet expired. Since the list is sorted + * by expiry time, all the following requests are guaranteed + * to expire later. + */ + while ((timer = (Timer *)LIST_HEAD(queue))->link.succ) + { + /* This request in list has not yet expired? */ + if (timer_clock() - timer->tick < 0) + break; + + /* Retreat the expired timer */ + REMOVE(&timer->link); + DB(timer->magic = TIMER_MAGIC_INACTIVE;) + + /* Execute the associated event */ + event_do(&timer->expire); + } +} + +/** + * Add \a timer to \a queue. + * \see synctimer_poll() for details. + */ +void synctimer_add(Timer *timer, List *queue) +{ + timer_addToList(timer, queue); +} + +/** + * Simple synchronous timer based scheduler polling routine. + * + * Sometimes you would like to have a proper scheduler, + * but you can't afford it due to memory constraints. + * + * This is a simple replacement: you can create events and call + * them periodically at specific time intervals. + * All you have to do is to set up normal timers, and call synctimer_add() + * instead of timer_add() to add the events to your specific queue. + * Then, in the main loop or wherever you want, you can call + * synctimer_poll() to process expired events. The associated callbacks will be + * executed. + * As this is done synchronously you don't have to worry about race conditions. + * You can kill an event by simply calling synctimer_abort(). + * + */ +void synctimer_poll(List *queue) +{ + timer_poll(queue); +} + +#endif /* CONFIG_TIMER_EVENTS */ + + +/** + * Wait for the specified amount of timer ticks. + * + * \note Sleeping while preemption is disabled fallbacks to a busy wait sleep. + */ +void timer_delayTicks(ticks_t delay) +{ + /* We shouldn't sleep with interrupts disabled */ + IRQ_ASSERT_ENABLED(); + +#if CONFIG_KERN_SIGNALS + Timer t; + + if (proc_preemptAllowed()) + { + ASSERT(!sig_check(SIG_SINGLE)); + timer_setSignal(&t, proc_current(), SIG_SINGLE); + timer_setDelay(&t, delay); + timer_add(&t); + sig_wait(SIG_SINGLE); + } + else +#endif /* !CONFIG_KERN_SIGNALS */ + { + ticks_t start = timer_clock(); + + /* Busy wait */ + while (timer_clock() - start < delay) + cpu_relax(); + } +} + + +#if CONFIG_TIMER_UDELAY + +/** + * Busy wait until the specified amount of high-precision ticks have elapsed. + * + * \note This function is interrupt safe, the only + * requirement is a running hardware timer. + */ +void timer_busyWait(hptime_t delay) +{ + hptime_t now, prev = timer_hw_hpread(); + hptime_t delta; + + for(;;) + { + now = timer_hw_hpread(); + /* + * We rely on hptime_t being unsigned here to + * reduce the modulo to an AND in the common + * case of TIMER_HW_CNT. + */ + delta = (now - prev) % TIMER_HW_CNT; + if (delta >= delay) + break; + delay -= delta; + prev = now; + } +} + +/** + * Wait for the specified amount of time (expressed in microseconds). + * + * \bug In AVR arch the maximum amount of time that can be used as + * delay could be very limited, depending on the hardware timer + * used. Check timer_avr.h, and what register is used as hptime_t. + */ +void timer_delayHp(hptime_t delay) +{ + if (UNLIKELY(delay > us_to_hptime(1000))) + { + timer_delayTicks(delay / (TIMER_HW_HPTICKS_PER_SEC / TIMER_TICKS_PER_SEC)); + delay %= (TIMER_HW_HPTICKS_PER_SEC / TIMER_TICKS_PER_SEC); + } + + timer_busyWait(delay); +} +#endif /* CONFIG_TIMER_UDELAY */ + +/** + * Timer interrupt handler. Find soft timers expired and + * trigger corresponding events. + */ +DEFINE_TIMER_ISR +{ + /* + * With the Metrowerks compiler, the only way to force the compiler generate + * an interrupt service routine is to put a pragma directive within the function + * body. + */ + #ifdef __MWERKS__ + #pragma interrupt saveall + #endif + + /* + * On systems sharing IRQ line and vector, this check is needed + * to ensure that IRQ is generated by timer source. + */ + if (!timer_hw_triggered()) + return; + + TIMER_STROBE_ON; + + /* Update the master ms counter */ + ++_clock; + + /* Update the current task's quantum (if enabled). */ + proc_decQuantum(); + + #if CONFIG_TIMER_EVENTS + timer_poll(&timers_queue); + #endif + + /* Perform hw IRQ handling */ + timer_hw_irq(); + + TIMER_STROBE_OFF; +} + +MOD_DEFINE(timer) + +/** + * Initialize timer + */ +void timer_init(void) +{ + #if CONFIG_KERN_IRQ + MOD_CHECK(irq); + #endif + + #if CONFIG_TIMER_EVENTS + LIST_INIT(&timers_queue); + #endif + + TIMER_STROBE_INIT; + + _clock = 0; + + timer_hw_init(); + + MOD_INIT(timer); +} + + +#if (ARCH & ARCH_EMUL) +/** + * Stop timer (only used by emulator) + */ +void timer_cleanup(void) +{ + MOD_CLEANUP(timer); + + timer_hw_cleanup(); + + // Hmmm... apparently, the demo app does not cleanup properly + //ASSERT(LIST_EMPTY(&timers_queue)); +} +#endif /* ARCH_EMUL */ diff --git a/2.5/bertos/drv/timer.h b/2.5/bertos/drv/timer.h new file mode 100644 index 00000000..50d118a9 --- /dev/null +++ b/2.5/bertos/drv/timer.h @@ -0,0 +1,316 @@ +/** + * \file + * + * + * \brief Hardware independent timer driver. + * + * All timer related functions are implemented in this module. You have several options to use timers: + * \li simple delay: just use timer_delay() if you want to wait for a few milliseconds; + * \li delay with callback: create a timer structure and use timer_setDelay() and timer_setSoftint() to set the callback; + * \li delay with signal: same as above but use timer_setSignal() to set specify which signal to send. + * \li simple synchronous timer based scheduler: use synctimer_add() to schedule an event in a user provided queue. + * + * Whenever a timer expires you need to explicitly arm it again with timer_add(). If you want to abort a timer, use timer_abort(). + * You can use conversion macros when using msecs to specify the delay. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_timer.h" + * $WIZ$ module_depends = "event", "sysirq" + * $WIZ$ module_supports = "not atmega103 and not atmega8" + */ + +#ifndef DRV_TIMER_H +#define DRV_TIMER_H + +#include +#include + +#include +#include + + +/* + * Include platform-specific binding header if we're hosted. + * Try the CPU specific one for bare-metal environments. + */ +#if OS_HOSTED + //#include OS_HEADER(timer) + #include +#else + #include CPU_HEADER(timer) +#endif + +STATIC_ASSERT(sizeof(hptime_t) == SIZEOF_HPTIME_T); + +#include "cfg/cfg_timer.h" +#include +#include + +#include + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_TIMER_EVENTS) || ((CONFIG_TIMER_EVENTS != 0) && CONFIG_TIMER_EVENTS != 1) + #error CONFIG_TIMER_EVENTS must be set to either 0 or 1 in cfg_timer.h +#endif +#if !defined(CONFIG_TIMER_UDELAY) || ((CONFIG_TIMER_UDELAY != 0) && CONFIG_TIMER_EVENTS != 1) + #error CONFIG_TIMER_UDELAY must be set to either 0 or 1 in cfg_timer.h +#endif +#if defined(CONFIG_TIMER_DISABLE_UDELAY) + #error Obosolete config option CONFIG_TIMER_DISABLE_UDELAY. Use CONFIG_TIMER_UDELAY +#endif +#if defined(CONFIG_TIMER_DISABLE_EVENTS) + #error Obosolete config option CONFIG_TIMER_DISABLE_EVENTS. Use CONFIG_TIMER_EVENTS +#endif + +extern volatile ticks_t _clock; + +/** + * \brief Return the system tick counter (expressed in ticks) + * + * The result is guaranteed to increment monotonically, + * but client code must be tolerant with respect to overflows. + * + * The following code is safe: + * + * \code + * drop_teabag(); + * ticks_t tea_start_time = timer_clock(); + * + * for (;;) + * { + * if (timer_clock() - tea_start_time > TEAPOT_DELAY) + * { + * printf("Your tea, Sir.\n"); + * break; + * } + * patience(); + * } + * \endcode + * + * \note This function must disable interrupts on 8/16bit CPUs because the + * clock variable is larger than the processor word size and can't + * be copied atomically. + * \sa timer_delay() + */ +INLINE ticks_t timer_clock(void) +{ + ticks_t result; + + ATOMIC(result = _clock); + + return result; +} + +/** + * Faster version of timer_clock(), to be called only when the timer + * interrupt is disabled (DISABLE_INTS) or overridden by a + * higher-priority or non-nesting interrupt. + * + * \sa timer_clock + */ +INLINE ticks_t timer_clock_unlocked(void) +{ + return _clock; +} + + +/** Convert \a ms [ms] to ticks. */ +INLINE ticks_t ms_to_ticks(mtime_t ms) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return (ms * TIMER_TICKS_PER_SEC) / 1000; +#else + /* Fast timer: don't overflow ticks_t. */ + return ms * DIV_ROUND(TIMER_TICKS_PER_SEC, 1000); +#endif +} + +/** Convert \a us [us] to ticks. */ +INLINE ticks_t us_to_ticks(utime_t us) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return ((us / 1000) * TIMER_TICKS_PER_SEC) / 1000; +#else + /* Fast timer: don't overflow ticks_t. */ + return (us * DIV_ROUND(TIMER_TICKS_PER_SEC, 1000)) / 1000; +#endif +} + +/** Convert \a ticks [ticks] to ms. */ +INLINE mtime_t ticks_to_ms(ticks_t ticks) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return (ticks * 1000) / TIMER_TICKS_PER_SEC; +#else + /* Fast timer: avoid overflowing ticks_t. */ + return ticks / (TIMER_TICKS_PER_SEC / 1000); +#endif +} + +/** Convert \a ticks [ticks] to us. */ +INLINE utime_t ticks_to_us(ticks_t ticks) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return ((ticks * 1000) / TIMER_TICKS_PER_SEC) * 1000; +#else + /* Fast timer: avoid overflowing ticks_t. */ + return (ticks / (TIMER_TICKS_PER_SEC / 1000)) * 1000; +#endif +} + +/** Convert \a us [us] to hpticks */ +INLINE hptime_t us_to_hptime(utime_t us) +{ +#if TIMER_HW_HPTICKS_PER_SEC > 10000000UL + return us * DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, 1000000UL); +#else + return (us * ((TIMER_HW_HPTICKS_PER_SEC + 500) / 1000UL) + 500) / 1000UL; +#endif +} + +/** Convert \a hpticks [hptime] to usec */ +INLINE utime_t hptime_to_us(hptime_t hpticks) +{ +#if TIMER_HW_HPTICKS_PER_SEC < 100000UL + return hpticks * DIV_ROUND(1000000UL, TIMER_HW_HPTICKS_PER_SEC); +#else + return (hpticks * 1000UL) / DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, 1000UL); +#endif /* TIMER_HW_HPTICKS_PER_SEC < 100000UL */ +} + +void timer_delayTicks(ticks_t delay); +/** + * Wait some time [ms]. + * + * \note CPU is released while waiting so you don't have to call cpu_relax() explicitly. + * \param delay Time to wait [ms]. + */ +INLINE void timer_delay(mtime_t delay) +{ + timer_delayTicks(ms_to_ticks(delay)); +} + +void timer_init(void); +void timer_cleanup(void); + +int timer_testSetup(void); +int timer_testRun(void); +int timer_testTearDown(void); + +#if CONFIG_TIMER_UDELAY +void timer_busyWait(hptime_t delay); +void timer_delayHp(hptime_t delay); +INLINE void timer_udelay(utime_t delay) +{ + timer_delayHp(us_to_hptime(delay)); +} +#endif + +#if CONFIG_TIMER_EVENTS + +#include + +/** + * The timer driver supports multiple synchronous timers + * that can trigger an event when they expire. + * + * \sa timer_add() + * \sa timer_abort() + */ +typedef struct Timer +{ + Node link; /**< Link into timers queue */ + ticks_t _delay; /**< [ticks] Timer delay */ + ticks_t tick; /**< [ticks] When this timer will expire */ + Event expire; /**< Event to execute when the timer expires */ + DB(uint16_t magic;) +} Timer; + +/* Timer is active when Timer.magic contains this value (for debugging purposes). */ +#define TIMER_MAGIC_ACTIVE 0xABBA +#define TIMER_MAGIC_INACTIVE 0xBAAB + +void timer_add(Timer *timer); +Timer *timer_abort(Timer *timer); + +/** + * Set the timer so that it calls an user hook when it expires + * + * Sometimes you may want to use the same callback for different events, so you must have + * different data to operate on. The user_data parameter is such data. + * + * \param timer Timer struct to set the callback to + * \param func Function that will be called when the timer expires + * \param user_data Additional data you may want to pass to the callback + */ +INLINE void timer_setSoftint(Timer *timer, Hook func, iptr_t user_data) +{ + event_initSoftint(&timer->expire, func, user_data); +} + +/** Set the timer delay (the time before the event will be triggered) */ +INLINE void timer_setDelay(Timer *timer, ticks_t delay) +{ + timer->_delay = delay; +} + + +void synctimer_add(Timer *timer, List* q); + +/** \sa timer_abort */ +#define synctimer_abort(t) timer_abort(t) + +void synctimer_poll(List* q); + + +#endif /* CONFIG_TIMER_EVENTS */ + +#if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + +/** Set the timer so that it sends a signal when it expires */ +INLINE void timer_setSignal(Timer *timer, struct Process *proc, sigmask_t sigs) +{ + event_initSignal(&timer->expire, proc, sigs); +} + +#define timer_set_event_signal timer_setSignal + +#endif /* CONFIG_KERN_SIGNALS */ + +#endif /* DRV_TIMER_H */ diff --git a/2.5/bertos/drv/timer_test.c b/2.5/bertos/drv/timer_test.c new file mode 100644 index 00000000..6569781b --- /dev/null +++ b/2.5/bertos/drv/timer_test.c @@ -0,0 +1,210 @@ +/** + * \file + * + * + * \brief Hardware independent timer driver (implementation) + * + * \version $Id$ + * \author Bernie Innocenti + * + */ + +#include + +#include +#include + +#include + +#include + +static void timer_test_constants(void) +{ + kprintf("TIMER_HW_HPTICKS_PER_SEC=%lu\n", (unsigned long)TIMER_HW_HPTICKS_PER_SEC); + #ifdef TIMER_PRESCALER + kprintf("TIMER_PRESCALER = %lu\n", (unsigned long)TIMER_PRESCALER); + #endif + #ifdef TIMER1_OVF_COUNT + kprintf("TIMER1_OVF_COUNT = %lu\n", (unsigned long)TIMER1_OVF_COUNT); + #endif + kprintf("TIMER_TICKS_PER_SEC= %lu\n", (unsigned long)TIMER_TICKS_PER_SEC); + kprintf("\n"); + kprintf("ms_to_ticks(100) = %lu\n", (unsigned long)ms_to_ticks(100)); + kprintf("ms_to_ticks(10000) = %lu\n", (unsigned long)ms_to_ticks(10000)); + kprintf("us_to_ticks(100) = %lu\n", (unsigned long)us_to_ticks(100)); + kprintf("us_to_ticks(10000) = %lu\n", (unsigned long)us_to_ticks(10000)); + kprintf("\n"); + kprintf("ticks_to_ms(100) = %lu\n", (unsigned long)ticks_to_ms(100)); + kprintf("ticks_to_ms(10000) = %lu\n", (unsigned long)ticks_to_ms(10000)); + kprintf("ticks_to_us(100) = %lu\n", (unsigned long)ticks_to_us(100)); + kprintf("ticks_to_us(10000) = %lu\n", (unsigned long)ticks_to_us(10000)); + kprintf("\n"); + kprintf("hptime_to_us(100) = %lu\n", (unsigned long)hptime_to_us(100)); + #if (SIZEOF_HPTIME_T > 1) + kprintf("hptime_to_us(10000)= %lu\n", (unsigned long)hptime_to_us(10000)); + #endif + kprintf("us_to_hptime(100) = %lu\n", (unsigned long)us_to_hptime(100)); + kprintf("us_to_hptime(10000)= %lu\n", (unsigned long)us_to_hptime(10000)); +} + +static void timer_test_delay(void) +{ + int i; + + kputs("Delay test\n"); + for (i = 0; i < 1000; i += 100) + { + kprintf("delay %d...", i); + timer_delay(i); + kputs("done\n"); + } +} + +static void timer_test_hook(iptr_t _timer) +{ + Timer *timer = (Timer *)(void *)_timer; + + kprintf("Timer %lu expired\n", (unsigned long)ticks_to_ms(timer->_delay)); + timer_add(timer); +} + +static Timer test_timers[5]; + +List synctimer_list; +static Timer synctimer_timers[5]; + +static void synctimer_test_hook(iptr_t _timer) +{ + Timer *timer = (Timer *)(void *)_timer; + kprintf("Sync timer process %lu expired\n", (unsigned long)ticks_to_ms(timer->_delay)); + synctimer_add(timer, &synctimer_list); +} + + +static const mtime_t test_delays[5] = { 170, 50, 310, 1500, 310 }; + +static void timer_test_async(void) +{ + size_t i; + + for (i = 0; i < countof(test_timers); ++i) + { + Timer *timer = &test_timers[i]; + timer_setDelay(timer, ms_to_ticks(test_delays[i])); + timer_setSoftint(timer, timer_test_hook, (iptr_t)timer); + timer_add(timer); + } +} + +static void timer_test_poll(void) +{ + int secs = 0; + mtime_t start_time = ticks_to_ms(timer_clock()); + mtime_t now; + + while (secs <= 10) + { + now = ticks_to_ms(timer_clock()); + if (now - start_time >= 1000) + { + ++secs; + start_time += 1000; + kprintf("seconds = %d, ticks=%lu\n", secs, (unsigned long)now); + } + wdt_reset(); + } +} + +static void synctimer_test(void) +{ + size_t i; + + LIST_INIT(&synctimer_list); + for (i = 0; i < countof(synctimer_timers); ++i) + { + Timer *timer = &synctimer_timers[i]; + timer_setDelay(timer, ms_to_ticks(test_delays[i])); + timer_setSoftint(timer, synctimer_test_hook, (iptr_t)timer); + synctimer_add(timer, &synctimer_list); + } + + int secs = 0; + mtime_t start_time = ticks_to_ms(timer_clock()); + mtime_t now; + + while (secs <= 10) + { + now = ticks_to_ms(timer_clock()); + synctimer_poll(&synctimer_list); + if (now - start_time >= 1000) + { + ++secs; + start_time += 1000; + kprintf("seconds = %d, ticks=%lu\n", secs, (unsigned long)now); + } + wdt_reset(); + } + + for (i = 0; i < countof(synctimer_timers); ++i) + { + synctimer_abort(&synctimer_timers[i]); + } +} + +int timer_testSetup(void) +{ + IRQ_ENABLE; + wdt_start(7); + timer_init(); + kdbg_init(); + return 0; +} + +int timer_testRun(void) +{ + timer_test_constants(); + timer_test_delay(); + timer_test_async(); + timer_test_poll(); + synctimer_test(); + return 0; +} + +int timer_testTearDown(void) +{ + unsigned i; + for (i = 0; i < countof(test_timers); ++i) + timer_abort(&test_timers[i]); + return 0; +} + +TEST_MAIN(timer); + diff --git a/2.5/bertos/drv/tlv5618.c b/2.5/bertos/drv/tlv5618.c new file mode 100644 index 00000000..4639df6b --- /dev/null +++ b/2.5/bertos/drv/tlv5618.c @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * Texas instrument TLV5618 DAC driver. + */ + +#include "tlv5618.h" +#include "hw/hw_tlv5618.h" + +#include + +#include //memset + + +static void tlv5618_write(Tlv5618 *ctx, uint16_t val) +{ + TLV5618_CSLOW(ctx->cs_pin); + kfile_putc(val >> 8, ctx->ch); + kfile_putc(val & 0xFF, ctx->ch); + kfile_flush(ctx->ch); + TLV5618_CSHIGH(ctx->cs_pin); +} + +#define POWERDOWN 0x2000 +#define OUTA 0xC000 +#define OUTB 0x4000 + +/** + * Set DAC output A to \a val. + * \a val ranges from 0 to 4095 (12 bit). + * \note : if in power down, the device will be awaken. + */ +void tlv5618_setOutA(Tlv5618 *ctx, uint16_t val) +{ + val &= 0x0FFF; + tlv5618_write(ctx, val | OUTA); +} + +/** + * Set DAC output B to \a val. + * \a val ranges from 0 to 4095 (12 bit). + * \note : if in power down, the device will be awaken. + */ +void tlv5618_setOutB(Tlv5618 *ctx, uint16_t val) +{ + val &= 0x0FFF; + tlv5618_write(ctx, val | OUTB); +} + +/** + * Set the TLV5618 in the power down state. + */ +void tlv5618_setPowerDown(Tlv5618 *ctx) +{ + tlv5618_write(ctx, POWERDOWN); +} + + +/** + * Init the TLV5618 with CS connected to \a cs_pin. + * \a ch should be the SPI channel needed to communicate with the DAC. + * This SPI should also be correctly configured (the MOSI should + * change on the rising edge of the SCK clock). + * \note the device is set in power down mode. + */ +void tlv5618_init(Tlv5618 *ctx, KFile *ch, int cs_pin) +{ + memset(ctx, 0, sizeof(*ctx)); + ctx->cs_pin = cs_pin; + ctx->ch = ch; + TLV5618_CSINIT(cs_pin); + tlv5618_setPowerDown(ctx); +} diff --git a/2.5/bertos/drv/tlv5618.h b/2.5/bertos/drv/tlv5618.h new file mode 100644 index 00000000..7deb1eb7 --- /dev/null +++ b/2.5/bertos/drv/tlv5618.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Texas instrument TLV5618 DAC driver. + * + * $WIZ$ module_name = "tlv5618" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_tlv5618.h" + */ + +#ifndef DRV_TLV5618_H +#define DRV_TLV5618_H + +#include +#include + +typedef struct Tlv5618 +{ + KFile *ch; + int cs_pin; +} Tlv5618; + +void tlv5618_setOutA(Tlv5618 *ctx, uint16_t val); +void tlv5618_setOutB(Tlv5618 *ctx, uint16_t val); +void tlv5618_setPowerDown(Tlv5618 *ctx); +void tlv5618_init(Tlv5618 *ctx, KFile *ch, int pin); + +#endif /* DRV_TLV5618_H */ diff --git a/2.5/bertos/drv/tmp123.c b/2.5/bertos/drv/tmp123.c new file mode 100644 index 00000000..cce2696a --- /dev/null +++ b/2.5/bertos/drv/tmp123.c @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief TMP123 Texas Intrument sensor temperature. + * + * \author Daniele Basile + * + */ + +#include "tmp123.h" + +#include "hw/hw_tmp123.h" + +#include + +#include + +#include + +#include // Macro and data type to manage celsius degree + +/** + * Read temperature from TMP123 chip. + */ +deg_t tmp123_read(KFile *fd) +{ + int16_t tmp; + + TMP123_HW_CS_EN(); + kfile_read(fd, &tmp, sizeof(tmp)); + tmp = be16_to_cpu(tmp); + TMP123_HW_CS_DIS(); + + tmp >>= 3; + return DIV_ROUND((tmp * 10), 16); +} +/** + * Init module + */ +void tmp123_init(void) +{ + TMP123_HW_INIT(); +} + + diff --git a/2.5/bertos/drv/tmp123.h b/2.5/bertos/drv/tmp123.h new file mode 100644 index 00000000..85859b25 --- /dev/null +++ b/2.5/bertos/drv/tmp123.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief TMP123 Texas Intrument sensor temperature. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "tmp123" + * $WIZ$ module_depends = "timer", "kfile" + * $WIZ$ module_configuration = "" + * $WIZ$ module_hw = "bertos/hw/hw_tmp123.h" + */ + +#ifndef DRV_TMP123_H +#define DRV_TMP123_H + +#include + +#include + +#include // Macro and data type to manage celsius degree + +deg_t tmp123_read(KFile *fd); + +void tmp123_init(void); + +#endif /* DRV_TMP123_H */ diff --git a/2.5/bertos/drv/wdt.h b/2.5/bertos/drv/wdt.h new file mode 100644 index 00000000..89752bf7 --- /dev/null +++ b/2.5/bertos/drv/wdt.h @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Watchdog module, supplies a simple API to manage wdt on supported target. + * + * $WIZ$ module_name = "wdt" + * $WIZ$ module_configuration = "bertos/cfg/cfg_wdt.h" + * $WIZ$ module_supports = "avr" + */ + +#ifndef DRV_WDT_H +#define DRV_WDT_H + +#include "cfg/cfg_wdt.h" + +#include // INLINE + +/* Configury sanity check */ +#if !defined(CONFIG_WATCHDOG) || (CONFIG_WATCHDOG != 0 && CONFIG_WATCHDOG != 1) + #error CONFIG_WATCHDOG must be defined to either 0 or 1 +#endif + +#if OS_HOSTED + #include + #include + + #if OS_QT + #include + #elif OS_POSIX + #include + #else + #error unknown CPU + #endif +#elif CONFIG_WATCHDOG + #include CPU_HEADER(wdt) +#endif /* CONFIG_WATCHDOG */ + + +#if OS_HOSTED || !CONFIG_WATCHDOG + + /** + * Reset the watchdog timer. + */ + INLINE void wdt_reset(void) + { + #if CONFIG_WATCHDOG + #if OS_POSIX + static struct timeval tv = { 0, 0 }; + select(0, NULL, NULL, NULL, &tv); + #endif + #endif /* CONFIG_WATCHDOG */ + } + + /** + * Start the watchdog timer that fire at the select + * timeout. + * + * \param timeout this value is target dependant. + * See the target documentation for more details. + */ + INLINE void wdt_start(uint32_t timeout) + { + #if CONFIG_WATCHDOG + #if OS_QT + // Create a dummy QApplication object + if (!qApp) + { + int argc; + new QApplication(argc, (char **)NULL); + } + (void)timeout; + #elif OS_POSIX + (void)timeout; // NOP + #endif + #endif /* CONFIG_WATCHDOG */ + (void)timeout; // NOP + } + + INLINE void wdt_stop(void) + { + #if CONFIG_WATCHDOG + #if OS_QT + // NOP + #elif OS_POSIX + // NOP + #else + #error unknown CPU + #endif + #endif /* CONFIG_WATCHDOG */ + } +#endif /* OS_HOSTED || !CONFIG_WATCHDOG */ + +#endif /* DRV_WDT_H */ diff --git a/2.5/bertos/dt/dnotifier.c b/2.5/bertos/dt/dnotifier.c new file mode 100644 index 00000000..6c1ddd45 --- /dev/null +++ b/2.5/bertos/dt/dnotifier.c @@ -0,0 +1,163 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Notifier obj (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include + +#include
+#include
+#include + +/** + * Default update used to notify target: notify all trasparently all + * targets in the list. + */ +static void notifier_update(DNotifier *n, dtag_t tag, dval_t val) +{ + dnotify_targets(n, tag, val); +} + +/** + * Init. + */ +void notifier_init(DNotifier *n) +{ + // Init instance + n->update = notifier_update; + LIST_INIT(&n->targets); +} + +/** + * Search in the map a tag and a val corresponding to the ones supplied. + * If a match is found change them to the corresponding ones in the map. + * If map is NULL the filter is trasparent and all messages sent to filter + * will be forwarded to its target. + */ +void filter_update(DFilter *f, dtag_t tag, dval_t val) +{ + + const DFilterMap *map = f->map; + + if (map) + { + while (map->src.tag != TAG_END) + { + if ((map->src.tag == tag) && (map->src.val == val)) + { + tag = map->dst.tag; + val = map->dst.val; + break; + } + /* TAG_ANY matches anything */ + if (map->src.tag == TAG_ANY) + break; + map++; + } + + if (map->src.tag != TAG_END) + dnotify(f->target, tag, val); + } + else + dnotify(f->target, tag, val); +} + + +/** + * Search in the table a tag corresponding to the one supplied and a val + * that has at least the mask map supplied bits to one. + * If a match is found change them to the corresponding ones in the map. + * If map is NULL the filter is trasparent and all messages sent to filter + * will be forwarded to its target. + */ +void filter_mask_update(DFilter *f, dtag_t tag, dval_t val) +{ + + const DFilterMap *map = f->map; + dfilter_mask_t mask; + + if (map) + { + while (map->src.tag != TAG_END) + { + mask = (dfilter_mask_t) map->src.val; + if ((map->src.tag == tag) && ((mask & (dfilter_mask_t)val) == mask)) + { + tag = map->dst.tag; + val = map->dst.val; + break; + } + /* TAG_ANY matches anything */ + if (map->src.tag == TAG_ANY) + break; + map++; + } + + + if (map->src.tag != TAG_END) + dnotify(f->target, tag, val); + } + else + dnotify(f->target, tag, val); +} + + +#define FILTER_MAGIC_ACTIVE 0xAA +/** + * Init filter. + * If \a masked is true, all the fields value in \a map must be interpreted as a mask of bits. + */ +void filter_init(DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target) +{ + // Init instance + if (masked) + f->update = (update_filter_ptr)filter_mask_update; + else + f->update = (update_filter_ptr)filter_update; + + /* set filter map and target */ + f->map = map; + f->target = target; + + /* these ensure that the filter is not inserted in more than one list */ + ASSERT(f->magic != FILTER_MAGIC_ACTIVE); + DB(f->magic = FILTER_MAGIC_ACTIVE;) + + /* Add the filter to source filter list */ + ADDTAIL(&source->targets, &f->link); +} diff --git a/2.5/bertos/dt/dnotifier.h b/2.5/bertos/dt/dnotifier.h new file mode 100644 index 00000000..4b4ef1bf --- /dev/null +++ b/2.5/bertos/dt/dnotifier.h @@ -0,0 +1,151 @@ +/** + * \file + * + * + * \brief Notifier obj (interface). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#ifndef DT_DNOTIFIER_H +#define DT_DNOTIFIER_H + +#include + +#include
+#include + +//Fwd declaretion. +struct DNotifier; +struct DFilter; + +typedef void (* update_func_ptr)(struct DNotifier *, dtag_t, dval_t); +typedef void (* update_filter_ptr)(struct DFilter *, dtag_t, dval_t); + +/** + * Base object for receive and forward messages. + * It contains an update function used to update itslef and a list to + * notify other DNotifer eventually connected. + */ +typedef struct DNotifier +{ + /// Receive new attributes from other notifiers. + update_func_ptr update; + + /// List of target notifiers to set new attributes to. + List targets; +} DNotifier; + +/** + * Map for messages. + * Used to translate src message to dst message. + */ +typedef struct DFilterMap +{ + DTagItem src; + DTagItem dst; +} DFilterMap; + + +/** + * A filter is an interface between two notifier. + * It can translate messages between them through a map (if it is not null). + */ +typedef struct DFilter +{ + /// Allow creating a list of dfilter objects. + Node link; + + /// Target of the filter + DNotifier *target; + + /// Update function called by the source dnotifier + update_filter_ptr update; + + ///Map for translating messages for target + const DFilterMap *map; + + ///Used in debug to prevent inserting this filter in more than one list + DB(uint8_t magic;) +} DFilter; + +/// Type for filter-mask checking +typedef unsigned int dfilter_mask_t; + +/// Filter init +void filter_init(DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target); + +/// Filter update function without masking capabilities. +void filter_update(DFilter *f, dtag_t tag, dval_t val); + +/// Filter update function with masking capabilities. +void filter_mask_update(DFilter *f, dtag_t tag, dval_t val); + +/// Notifier init +void notifier_init(DNotifier *n); + + +/** + * Macro to notify the target object. + */ +INLINE void dnotify(DNotifier *target, dtag_t tag, dval_t val) +{ + if (target) + target->update(target, tag, val); +} + +/** + * Macro to notify all the targets of \a target object. + */ +INLINE void dnotify_targets(DNotifier *target, dtag_t tag, dval_t val) +{ + DFilter *f; + if (!LIST_EMPTY(&target->targets)) + FOREACH_NODE(f, &target->targets) + f->update(f, tag, val); +} + + +/** + * Macro that connect \a src notifier to \a tgt using \a map and passing \a opt for filtering option. + * It declares a static filter to achieve connection and messages translation. + * \note Due its static filter declaration, DCONNECT MUST NOT be used inside loops or in functions called multiple times. + * Failing to do so will lead to unpredictable connections between notifiers. + */ +#define DCONNECT(src, tgt, map, opt) \ + do { \ + static DFilter _filter_; /* Declare a filter */ \ + filter_init(&(_filter_), map, opt, src, tgt); /* Init it. */ \ + } while (0) + + +#endif /* DT_DNOTIFIER_H */ diff --git a/2.5/bertos/dt/dtag.h b/2.5/bertos/dt/dtag.h new file mode 100644 index 00000000..799ec6b4 --- /dev/null +++ b/2.5/bertos/dt/dtag.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Tags interface. + * This module contains the base message definitions and the list of all available tags. + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.1 2005/11/04 18:26:38 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.8 2005/06/07 15:22:29 batt + *#* Add const_dval_t. + *#* + *#* Revision 1.7 2005/06/06 17:42:23 batt + *#* Add error tag TAG_ERROR. + *#* + *#* Revision 1.6 2005/06/06 12:45:33 batt + *#* Add TAG_NONE tag. + *#* + *#* Revision 1.5 2005/06/06 11:04:12 batt + *#* Add some comments. + *#* + *#* Revision 1.4 2005/05/31 11:09:52 batt + *#* Add some tags. + *#* + *#* Revision 1.3 2005/05/26 14:55:12 batt + *#* Add form_processTime; change form_kbdProcess to form_processKey. + *#* + *#* Revision 1.2 2005/05/26 14:43:33 batt + *#* Add new message filter interface. + *#* + *#* Revision 1.1 2005/05/26 08:32:53 batt + *#* Add new Develer widget system :) + *#* + *#*/ + +#ifndef DT_DTAG_H +#define DT_DTAG_H + +#include + +/** Type for values associated with tags. */ +typedef iptr_t dval_t; + +/** Type for constant values associated with tags. */ +typedef const_iptr_t const_dval_t; + +/** Type for tag */ +typedef enum dtag_t +{ + TAG_END = 0, + TAG_NONE, + TAG_ANY, + TAG_SETVALUE, + TAG_UP, + TAG_DOWN, + TAG_START, + TAG_STOP, + TAG_TOGGLE, + TAG_KEY, + TAG_TIME, + TAG_ERROR, +} dtag_t; + +/** This is the basic message structure used by all dnotifiers. */ +typedef struct DTagItem +{ + dtag_t tag; + dval_t val; +} DTagItem; + +/** Marker to indicate the end of a map for message filtering/translating */ +#define TAG_END_MARKER {{TAG_END, 0}, {TAG_END, 0}} +#endif diff --git a/2.5/bertos/dt/dwidget.c b/2.5/bertos/dt/dwidget.c new file mode 100644 index 00000000..f399caa4 --- /dev/null +++ b/2.5/bertos/dt/dwidget.c @@ -0,0 +1,77 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Widget (implementation). + * A widget is typically a graphic object on a device. + * Its proproperties are the position, the size and a context on which the widget is drawn. + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.1 2005/11/04 18:26:38 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.3 2005/06/06 11:04:12 batt + *#* Add some comments. + *#* + *#* Revision 1.2 2005/05/26 14:44:10 batt + *#* Abstract widget from layer: use context. + *#* + *#* Revision 1.1 2005/05/26 08:32:53 batt + *#* Add new Develer widget system :) + *#* + *#*/ + +#include
+#include
+ +/** + * Init the widget of \a pos and \a size on the drawing \a context. + */ +void widget_init(DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context) +{ + // Init superclass + notifier_init(&w->notifier); + + // Init instance + w->pos = pos; + w->size = size; + w->context = context; +} diff --git a/2.5/bertos/dt/dwidget.h b/2.5/bertos/dt/dwidget.h new file mode 100644 index 00000000..24549d7d --- /dev/null +++ b/2.5/bertos/dt/dwidget.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Widget (interface). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#ifndef DT_DWIDGET_H +#define DT_DWIDGET_H + +#include
+#include + +/** Widget position. */ +typedef uint8_t dpos_t; + +/** Widget drawing context. */ +typedef iptr_t dcontext_t; + +/** Widget definition. */ +typedef struct DWidget +{ + DNotifier notifier; + + dpos_t pos; + dpos_t size; + dcontext_t *context; +} DWidget; + + +void widget_init(DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context); + +#endif diff --git a/2.5/bertos/dt/editbool.c b/2.5/bertos/dt/editbool.c new file mode 100644 index 00000000..b0290c6e --- /dev/null +++ b/2.5/bertos/dt/editbool.c @@ -0,0 +1,99 @@ +/** + * \file + * + * + * \brief Edit bool widget (implementation). + * This widget handles boolean editing. + * The boolean value will be displayed using two strings: + * one when the bool is false and one when it's true. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "editbool.h" +#include
+ +#include + +/** + * Init widget. + */ +void editbool_init(DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *value, const char *true_string, const char *false_string) +{ + // Initialize superclass + widget_init(&e->widget, pos, size, context); + + // Override superclass methods + e->widget.notifier.update = (update_func_ptr)editbool_update; + + // Init instance + e->value = value; + e->true_string = true_string; + e->false_string = false_string; + e->draw = editbool_draw; +} + +/** + * Handle the messages (edit the bool). + */ +void editbool_update(DEditBool *e, dtag_t tag, dval_t _val) +{ + bool changed = false; + + switch (tag) + { + case TAG_SETVALUE: + *e->value = (bool)_val; + changed = true; + break; + + case TAG_TOGGLE: + *e->value = !*e->value; + changed = true; + break; + default: + break; + } + + if (changed) + { + e->draw(e); + dnotify_targets(&e->widget.notifier, TAG_SETVALUE, (dval_t)*e->value); + } +} + +/** + * Draw the string on the context. + */ +void editbool_draw(DEditBool *e) +{ + lcd_printf((Layer *)e->widget.context, (lcdpos_t)e->widget.pos, LCD_NORMAL, "%*s", (int)e->widget.size , *e->value? e->true_string: e->false_string); +} diff --git a/2.5/bertos/dt/editbool.h b/2.5/bertos/dt/editbool.h new file mode 100644 index 00000000..a339330d --- /dev/null +++ b/2.5/bertos/dt/editbool.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Edit bool widget (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef DT_EDITBOOL_H +#define DT_EDITBOOL_H + +#include
+#include
+ +typedef struct DEditBool +{ + DWidget widget; + bool *value; + const char *true_string; + const char *false_string; + void (*draw)(struct DEditBool *); +} DEditBool; + +void editbool_init(DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *val, const char *true_str, const char *false_str); +void editbool_update(DEditBool *e, dtag_t tag, dval_t val); +void editbool_draw(DEditBool *e); + + +#endif /* DT_EDITBOOL_H */ diff --git a/2.5/bertos/dt/editint.c b/2.5/bertos/dt/editint.c new file mode 100644 index 00000000..26fcde90 --- /dev/null +++ b/2.5/bertos/dt/editint.c @@ -0,0 +1,127 @@ +/** + * \file + * + * + * \brief Integer edit widget (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include "editint.h" + +#include + +#include
+#include
+#include
+ +#include + +/** + * Init. + */ +void editint_init(DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max) +{ + // Initialize superclass + widget_init(&e->widget, pos, size, context); + + // Override superclass methods + e->widget.notifier.update = (update_func_ptr)editint_update; + + // Init instance + e->value = value; + e->min = min; + e->max = max; + e->style = EDIS_DEFAULT; + e->draw = editint_draw; +} + +/** + * Handle the messages (edit the int). + */ +void editint_update(DEditInt *e, dtag_t tag, dval_t _val) +{ + bool changed = false; + int val = (int)_val; + + switch (tag) + { + case TAG_SETVALUE: + *e->value = MINMAX(e->min, val, e->max); + changed = true; + break; + + /* Increments the integer by val */ + case TAG_UP: + if (e->style & EDIS_WRAP) + { + if (*e->value + val > e->max) + *e->value = (*e->value + val - e->min) % (e->max - e->min + 1) + e->min; + else + *e->value += val; + } + else + *e->value = MIN(*e->value + val, e->max); + changed = true; + break; + /* Decrements the integer by val */ + case TAG_DOWN: + if (e->style & EDIS_WRAP) + { + if (*e->value - val < e->min) + *e->value = e->max - (e->max - (*e->value - val)) % (e->max - e->min + 1); + else + *e->value -= val; + } + else + *e->value = MAX(*e->value - val, e->min); + changed = true; + break; + + default: + break; + } + + if (changed) + { + e->draw(e); + dnotify_targets(&e->widget.notifier, TAG_SETVALUE, (dval_t)*e->value); + } +} + +/** + * Draw the integer on the context. + */ +void editint_draw(DEditInt *e) +{ + lcd_printf((Layer *)e->widget.context, (lcdpos_t)e->widget.pos, LCD_NORMAL,"%*d", (int)e->widget.size, *e->value); +} diff --git a/2.5/bertos/dt/editint.h b/2.5/bertos/dt/editint.h new file mode 100644 index 00000000..f719eadf --- /dev/null +++ b/2.5/bertos/dt/editint.h @@ -0,0 +1,94 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Integer edit (interface). + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.1 2005/11/04 18:26:38 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.3 2005/06/10 15:46:09 batt + *#* Add EDIS_WRAP style that wrap around min and max. + *#* + *#* Revision 1.2 2005/05/26 14:44:10 batt + *#* Abstract widget from layer: use context. + *#* + *#* Revision 1.1 2005/05/26 08:32:53 batt + *#* Add new Develer widget system :) + *#* + *#*/ + +#ifndef DT_EDITINT_H +#define DT_EDITINT_H + +#include
+#include
+#include + +#include +#include + + +#define EDIS_DEFAULT 0 +#define EDIS_CURSORLEFT BV(0) +#define EDIS_WRAP BV(1) + +/** Type for edit style */ +typedef uint16_t dstyle_t; + +typedef struct DEditInt +{ + DWidget widget; + + int *value; + int min; + int max; + dstyle_t style; + void (*draw)(struct DEditInt *); + +} DEditInt; + +void editint_init(DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max); +void editint_update(DEditInt *e, dtag_t tag, dval_t val); +void editint_draw(DEditInt *e); + +#endif diff --git a/2.5/bertos/emul/diskio_emul.c b/2.5/bertos/emul/diskio_emul.c new file mode 100644 index 00000000..d3470cac --- /dev/null +++ b/2.5/bertos/emul/diskio_emul.c @@ -0,0 +1,220 @@ +/** + * \file + * + * + * \brief Low level disk access for FatFs emulated. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */ +/*-----------------------------------------------------------------------*/ + +#include +#include +#include +#include + +#define SECTOR_SIZE 512 + +static volatile DSTATUS Stat = STA_NOINIT; + +/** + * This is an example implementation, used to simulate the the calls to normal filesystem calls + * It only works for drive 0. + */ + + +/*-----------------------------------------------------------------------*/ +/* Inidialize a Drive */ + +static FILE *fake_disk = 0; + +DSTATUS disk_initialize ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + if (drv) + return STA_NOINIT; /* Support only drive 0 */ + // XXX: pay attention here: some functions call disk_initialize *after* it has + // been initialized for the first time. + // Here we just return the status (that should always be ~STA_NOINIT after the first + // call) + if (fake_disk) + return Stat; + + const char *path = "emuldisk.dsk"; + fake_disk = fopen(path, "w+"); + int err = errno; + if (!fake_disk) + { + switch (err) + { + case EINVAL: + fprintf(stderr, "invalid mode\n"); + default: + return STA_NOINIT; + } + } + Stat &= ~STA_NOINIT; + return Stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Return Disk Status */ + +DSTATUS disk_status ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + if (drv) + return STA_NOINIT; /* Support only drive 0 */ + return Stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Read Sector(s) */ + +DRESULT disk_read ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE *buff, /* Data buffer to store read data */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to read (1..255) */ +) +{ + if (drv || !count) return RES_PARERR; + if (Stat & STA_NOINIT) return RES_NOTRDY; + + fseek(fake_disk, sector * SECTOR_SIZE, SEEK_SET); + size_t read_items = fread(buff, SECTOR_SIZE, count, fake_disk); + if (read_items == count) + return RES_OK; + else + { + if (feof(fake_disk)) + fprintf(stderr, "end-of-file\n"); + if (ferror(fake_disk)) + fprintf(stderr, "error\n"); + return RES_ERROR; + } +} + + +/*-----------------------------------------------------------------------*/ +/* Write Sector(s) */ + +#if _READONLY == 0 +DRESULT disk_write ( + BYTE drv, /* Physical drive nmuber (0..) */ + const BYTE *buff, /* Data to be written */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to write (1..255) */ +) +{ + if (drv || !count) return RES_PARERR; + if (Stat & STA_NOINIT) return RES_NOTRDY; + if (Stat & STA_PROTECT) return RES_WRPRT; + + fseek(fake_disk, sector * SECTOR_SIZE, SEEK_SET); + size_t write_items = fwrite(buff, SECTOR_SIZE, count, fake_disk); + if (write_items == count) + return RES_OK; + else + { + if (feof(fake_disk)) + fprintf(stderr, "end-of-file\n"); + if (ferror(fake_disk)) + fprintf(stderr, "error\n"); + return RES_ERROR; + } +} +#endif /* _READONLY */ + + + +/*-----------------------------------------------------------------------*/ +/* Miscellaneous Functions */ + +DRESULT disk_ioctl ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive control data */ +) +{ + if (drv) return RES_PARERR; + if (Stat & STA_NOINIT) return RES_NOTRDY; + + switch (ctrl) + { + case GET_SECTOR_SIZE: + *(WORD*)buff = SECTOR_SIZE; + break; + case GET_SECTOR_COUNT: + *(DWORD*)buff = 65536; + break; + case GET_BLOCK_SIZE: + *(DWORD*)buff = 1; + break; + case CTRL_SYNC: + fflush(fake_disk); + break; + default: + return RES_PARERR; + } + return RES_OK; +} + +DWORD get_fattime(void) +{ + time_t tmp = time(0); + struct tm *t = localtime(&tmp); + DWORD tim = 0; + // seconds + tim |= (t->tm_sec / 2); + // min + tim |= (t->tm_min << 5); + // hour + tim |= (t->tm_hour << 11); + // month day (1..31) + tim |= (t->tm_mday << 16); + // month (1..12) + tim |= ((t->tm_mon + 1) << 21); + // year (0..127) + tim |= ((t->tm_year - 80) << 25); + return tim; +} + diff --git a/2.5/bertos/emul/emul.cpp b/2.5/bertos/emul/emul.cpp new file mode 100644 index 00000000..7e1da2ed --- /dev/null +++ b/2.5/bertos/emul/emul.cpp @@ -0,0 +1,105 @@ +/** + * \file + * + * + * \brief Qt-based emulator framework for embedded applications (implementation) + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "emul.h" +#include "emulwin.h" + +#include + +#include +#include // std::exit() + + +/// The global emulator instance. +Emulator *emul; + +Emulator::Emulator(int &argc, char **argv) : + emulApp(new QApplication(argc, argv)), + emulWin(new EmulWin(this)) +{ + emulWin->show(); +} + + +Emulator::~Emulator() +{ + // we don't delete emulWin because it automatically + // deletes itself when closed + delete emulApp; +} + + +NORETURN void Emulator::quit() +{ + // WHAT A KLUDGE! + this->~Emulator(); + emul = NULL; + + // do we have a better way to shut down the emulation? + exit(0); +} + +MOD_DEFINE(emul) + +/// Main emulator entry point. +extern "C" void emul_init(int *argc, char *argv[]) +{ + // setup global emulator pointer + emul = new Emulator(*argc, argv); + + MOD_INIT(emul); +} + +extern "C" void emul_cleanup() +{ + MOD_CLEANUP(emul); + + // Timer must be made inactive before we destroy the emulator + extern bool timer_initialized; + ASSERT(!timer_initialized); + + delete emul; + emul = NULL; +} + +extern "C" void emul_idle() +{ + // We process GUI events when the application is idle. + emul->emulApp->processEvents(); +} + diff --git a/2.5/bertos/emul/emul.h b/2.5/bertos/emul/emul.h new file mode 100644 index 00000000..f542a5bf --- /dev/null +++ b/2.5/bertos/emul/emul.h @@ -0,0 +1,101 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Qt-based emulator framework for embedded applications (interface) + */ + +/*#* + *#* $Log$ + *#* Revision 1.4 2006/02/15 09:11:17 bernie + *#* Add keyboard emulator. + *#* + *#* Revision 1.3 2006/01/23 23:12:08 bernie + *#* Let Doxygen see through C++ protected section. + *#* + *#* Revision 1.2 2006/01/16 03:51:51 bernie + *#* Fix boilerplate. + *#* + *#* Revision 1.1 2006/01/16 03:37:12 bernie + *#* Add emulator skeleton. + *#* + *#*/ + +#ifndef EMUL_EMUL_H +#define EMUL_EMUL_H + +#include + +#if defined(__cplusplus) || defined(__doxygen__) + +// fwd decls +class QApplication; +class EmulWin; +class EmulPRT; +class EmulLCD; +class EmulKbd; +class QCheckBox; +class QSlider; +class QLabel; + +class Emulator +{ +// data members +public: + QApplication *emulApp; ///< QT Application. + EmulWin *emulWin; ///< Main window. + + EmulLCD *emulLCD; ///< Display emulator. + EmulKbd *emulKbd; ///< Keyboard emulator. + +// construction + Emulator(int &argc, char **argv); + ~Emulator(); + +// public methods + void quit(); +}; + +extern Emulator *emul; + +#endif /* __cplusplus */ + +EXTERN_C void emul_init(int *argc, char *argv[]); +EXTERN_C void emul_cleanup(); +EXTERN_C void emul_idle(); + +#endif /* EMUL_EMUL_H */ + diff --git a/2.5/bertos/emul/emul.mk b/2.5/bertos/emul/emul.mk new file mode 100644 index 00000000..779d9220 --- /dev/null +++ b/2.5/bertos/emul/emul.mk @@ -0,0 +1,22 @@ +# +# Copyright 2007 Bernie Innocenti (http://www.codewiz.org/) +# All rights reserved. +# +# Author: Bernie Innocenti +# +# Qt configuration for BeRTOS emulator. Include it from +# your app Makefile fragment + +#On Darwin architecture environment variables need a different configuration. +ifeq ($(shell uname | grep -c "Darwin"),1) + EMUL_CFLAGS = -D'ARCH=(ARCH_EMUL|ARCH_QT)' -DQT_CLEAN_NAMESPACE + EMUL_LDFLAGS = -framework QtGui -framework QtCore + QT_MOC = /usr/bin/moc +#On other platforms. +else + EMUL_CFLAGS = -D'ARCH=(ARCH_EMUL|ARCH_QT)' $(shell pkg-config QtCore QtGui --cflags) -DQT_CLEAN_NAMESPACE + EMUL_LDFLAGS = $(shell pkg-config QtCore QtGui --libs) + QT_MOC = $(shell pkg-config QtCore --variable=moc_location) + #QT_UIC = $(shell pkg-config QtCore --variable=uic_location) +endif + diff --git a/2.5/bertos/emul/emulkbd.cpp b/2.5/bertos/emul/emulkbd.cpp new file mode 100644 index 00000000..7afc1f2a --- /dev/null +++ b/2.5/bertos/emul/emulkbd.cpp @@ -0,0 +1,231 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief QT-based widget for keyboard emulation (implementation) + */ + +#include "emulkbd.h" +#include "emul.h" + +#include +#include +#include +#include +#include +#include +#include +#include + + +EmulKey::EmulKey(EmulKbd *kbd, const char *label, int _keycode, int _row, int _col) : + QPushButton(label, kbd), + row(_row), col(_col), + keycode(_keycode) +{ + // don't let the widget get focus + setFocusPolicy(Qt::NoFocus); + + // unused + connect(this, SIGNAL(pressed()), this, SLOT(keyPressed())); + connect(this, SIGNAL(released()), this, SLOT(keyReleased())); +} + + +EmulKey::~EmulKey() +{ + // nop +} + + +/** + * Override standad QButton behaviour: we must also emit the signals. + */ +// unused +void EmulKey::setDown(bool enable) +{ + // let our superclass do everything else + QPushButton::setDown(enable); + + if (enable) + emit pressed(); + else + emit released(); +} + + +// unused +void EmulKey::keyPressed(void) +{ + static_cast(parent())->setKey(row, col, true); +} + + +// unused +void EmulKey::keyReleased(void) +{ + static_cast(parent())->setKey(row, col, false); +} + + +EmulKbd::EmulKbd(QWidget *parent, Qt::WFlags f) : + QFrame(parent, f), + layout(new QGridLayout(this)), + active_row(0) +{ + setFrameStyle(QFrame::Box | QFrame::Sunken); + setLineWidth(1); + setFocusPolicy(Qt::StrongFocus); + frame_width = frameWidth(); +} + + +EmulKbd::~EmulKbd() +{ + delete layout; +} + + +QSizePolicy EmulKbd::sizePolicy() const +{ + return QSizePolicy(QSizePolicy::Fixed, QSizePolicy::Fixed); +} + + +void EmulKbd::resizeEvent(QResizeEvent *event) +{ + // Let our superclass process the event first + QFrame::resizeEvent(event); +} + + +// handle key presses for all keys in keyboard +bool EmulKbd::event(QEvent *_e) +{ + switch (_e->type()) + { + case QEvent::KeyPress: + case QEvent::KeyRelease: + { + QKeyEvent *e = static_cast(_e); + int keycode = e->key(); + EmulKey *key; + + // ignore repeated keys + if (!e->isAutoRepeat()) + { + // scan all children + for (QObjectList::const_iterator it(children().begin()); it != children().end(); ++it) + { + // only keys, not other children! + if ((*it)->metaObject() == &EmulKey::staticMetaObject) + // if ((key = dynamic_cast(*it))) + { + key = static_cast(*it); + + // same key? + if (key->keycode == keycode) + { + // yes, tell key to go down (or up) + key->setDown(_e->type() == QEvent::KeyPress); + break; + } + } + } + } + return true; + } + + default: + // let superclass process this event + return QFrame::event(_e); + + } // end switch(_e->type()) +} + + +void EmulKbd::addKey(const char *label, int keycode, int row, int col, int matrix_row, int matrix_col) +{ + if (matrix_row == -1) + matrix_row = row; + if (matrix_col == -1) + matrix_col = col; + + layout->addWidget(new EmulKey(this, label, keycode, matrix_row, matrix_col), row, col); +} + + +// unused +void EmulKbd::setKey(int /*row*/, int /*col*/, bool /*on*/) +{ +} + + +void EmulKbd::setRow(int r) +{ + active_row = r; +} + +int EmulKbd::readCols(void) +{ + QLayoutItem *item; + EmulKey *key; + int cols = 0; + + for (int i = 0; (item = layout->itemAt(i)); ++i) + { + key = static_cast(item->widget()); + if (key->row == active_row) + { + if (key->isDown()) + cols |= (1<col); + } + } + return cols; +} + +extern "C" void emul_kbdSetRows(int r) +{ + emul->emulKbd->setRow(r); +} + + +extern "C" int emul_kbdReadCols(void) +{ + return emul->emulKbd->readCols(); +} + +#include "emulkbd_moc.cpp" diff --git a/2.5/bertos/emul/emulkbd.h b/2.5/bertos/emul/emulkbd.h new file mode 100644 index 00000000..9f3a32d1 --- /dev/null +++ b/2.5/bertos/emul/emulkbd.h @@ -0,0 +1,119 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief QT-based widget for leyboard emulation (interface) + */ + +#if !defined(EMULKBD_H) +#define EMULKBD_H + +#if defined (_MSC_VER) && (_MSC_VER > 1000) +#pragma once +#endif // _MSC_VER > 1000 + +#include + +// fwd decl +class QGridLayout; +class EmulKey; + +class EmulKbd : public QFrame +{ + Q_OBJECT + +// Data members +protected: + QGridLayout *layout; + int frame_width; + int active_row; + +// Construction +public: + EmulKbd(QWidget *parent = 0, Qt::WFlags f = 0); + virtual ~EmulKbd(); + +// Public methods + void addKey(const char *label, int keycode, int row, int col, int matrix_row = -1, int matrix_col = -1); + void setRow(int row); + int readCols(void); + +// Protected methods +protected: + void setKey(int row, int col, bool on); + +// Base class overrides +protected: + virtual QSizePolicy sizePolicy() const; + virtual void resizeEvent(QResizeEvent *e); + virtual bool event(QEvent *e); + +// Friends + friend class EmulKey; +}; + + +// Private helper class for EmulKbd +// NOTE: with protected inheritance, dynamic_cast<> does not work (gcc 2.96) +#include +class EmulKey : public QPushButton +{ + Q_OBJECT + +// Data members +protected: + int row, col; + int keycode; + +// Construction +public: + EmulKey(EmulKbd *parent, const char *label, int keycode, int _row, int _col); + virtual ~EmulKey(); + +// superclass overrides + void setDown(bool enable); + +protected slots: + void keyPressed(void); + void keyReleased(void); + +// Friends +public: + friend class EmulKbd; +}; + +#endif // !defined(EMULKBD_H) + diff --git a/2.5/bertos/emul/emulwin.cpp b/2.5/bertos/emul/emulwin.cpp new file mode 100644 index 00000000..c3c7c074 --- /dev/null +++ b/2.5/bertos/emul/emulwin.cpp @@ -0,0 +1,130 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Main Qt window for embedded applications emulator (implementation) + */ + +#include "emulwin.h" + +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +using namespace Qt; + +EmulWin::EmulWin(Emulator *e) +{ + setWindowTitle(tr("BeRTOS Emul Demo")); + setAttribute(Qt::WA_DeleteOnClose); + + // Create the menu bar + QMenu *file_menu = menuBar()->addMenu(tr("&File")); + file_menu->addAction(tr("&Quit"), + e->emulApp, SLOT(closeAllWindows()), CTRL+Key_Q); + + menuBar()->addSeparator(); + + QMenu *help_menu = menuBar()->addMenu(tr("&Help")); + help_menu->addAction(tr("&About"), + this, SLOT(about()), Key_F1); + + // Make a central widget to contain the other widgets + QWidget *central = new QWidget(this); + setCentralWidget(central); + + // Create a layout to position the widgets + QHBoxLayout *box_main = new QHBoxLayout(central); + + // Main layout + QVBoxLayout *box_right = new QVBoxLayout(); + box_main->addLayout(box_right); + + // LCD + QHBoxLayout *lay_lcd = new QHBoxLayout(); + box_right->addLayout(lay_lcd); + lay_lcd->addStretch(1); + lay_lcd->addWidget(e->emulLCD = new EmulLCD(central), 8); + lay_lcd->addStretch(1); + + // Keyboard + box_right->addWidget(e->emulKbd = new EmulKbd(central)); + + // Setup keyboard: Label Keycode Row Col MRow MCol + e->emulKbd->addKey("^", Key_Up, 0, 0, 0, 0); + e->emulKbd->addKey("v", Key_Down, 1, 0, 0, 1); + e->emulKbd->addKey("OK", Key_Return, 0, 1, 0, 2); + e->emulKbd->addKey("ESC", Key_Escape, 1, 1, 0, 3); +} + + +EmulWin::~EmulWin() +{ + emul->quit(); +} + + +void EmulWin::closeEvent(QCloseEvent *ce) +{ + emul->quit(); + ce->accept(); +} + + +void EmulWin::about() +{ + QMessageBox::about(this, + "BeRTOS Embedded Application Emulator", + "Version 0.1\n" + "Copyright 2006, 2008 Develer S.r.l. (http://www.develer.com/)\n" + "Copyright 2001, 2002, 2003, 2005 Bernie Innocenti \n" + "All rights reserved." + ); +} + +#include "emulwin_moc.cpp" diff --git a/2.5/bertos/emul/emulwin.h b/2.5/bertos/emul/emulwin.h new file mode 100644 index 00000000..9d919505 --- /dev/null +++ b/2.5/bertos/emul/emulwin.h @@ -0,0 +1,82 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Main Qt window for embedded applications emulator (interface) + */ + +/*#* + *#* $Log$ + *#* Revision 1.4 2006/05/28 12:17:56 bernie + *#* Drop almost all the Qt3 cruft. + *#* + *#* Revision 1.3 2006/02/20 02:00:39 bernie + *#* Port to Qt 4.1. + *#* + *#* Revision 1.2 2006/01/16 03:51:51 bernie + *#* Fix boilerplate. + *#* + *#* Revision 1.1 2006/01/16 03:37:12 bernie + *#* Add emulator skeleton. + *#* + *#*/ + +#ifndef EMUL_EMULWIN_H +#define EMUL_EMULWIN_H + +#include + +// fwd decls +class Emulator; + +class EmulWin : public QMainWindow +{ + Q_OBJECT + +// construction +public: + EmulWin(Emulator *emul); + ~EmulWin(); + +protected: + void closeEvent(QCloseEvent *); + +private slots: + void about(); +}; + +#endif // EMUL_EMULWIN_H + diff --git a/2.5/bertos/emul/kfile_posix.c b/2.5/bertos/emul/kfile_posix.c new file mode 100644 index 00000000..1f09aaff --- /dev/null +++ b/2.5/bertos/emul/kfile_posix.c @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \brief KFile interface implementation in Posix systems. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#include +#include + +static size_t kfile_posix_read(struct KFile *_fd, void *buf, size_t size) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + return fread(buf, sizeof(uint8_t), size, fd->fp); +} + +static size_t kfile_posix_write(struct KFile *_fd, const void *buf, size_t size) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + return fwrite(buf, sizeof(uint8_t), size, fd->fp); +} + +static kfile_off_t kfile_posix_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + int std_whence; + switch (whence) + { + case KSM_SEEK_CUR: + std_whence = SEEK_CUR; + break; + case KSM_SEEK_END: + std_whence = SEEK_END; + break; + case KSM_SEEK_SET: + std_whence = SEEK_SET; + break; + default: + ASSERT(0); + return EOF; + } + int err = fseek(fd->fp, offset, std_whence); + if (err) + return err; + + return ftell(fd->fp); +} + +static int kfile_posix_close(struct KFile *_fd) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + return fclose(fd->fp); +} + +static int kfile_posix_flush(struct KFile *_fd) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + return fflush(fd->fp); +} + +FILE *kfile_posix_init(KFilePosix *file, const char *filename, const char *mode) +{ + memset(file, 0, sizeof(*file)); + DB(file->fd._type = KFT_KFILEPOSIX); + file->fd.read = kfile_posix_read; + file->fd.write = kfile_posix_write; + file->fd.close = kfile_posix_close; + file->fd.seek = kfile_posix_seek; + file->fd.flush = kfile_posix_flush; + + file->fp = fopen(filename, mode); + return file->fp; +} diff --git a/2.5/bertos/emul/kfile_posix.h b/2.5/bertos/emul/kfile_posix.h new file mode 100644 index 00000000..ba88ab78 --- /dev/null +++ b/2.5/bertos/emul/kfile_posix.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief KFile interface implementation in Posix systems. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef KFILE_POSIX_H +#define KFILE_POSIX_H + +#include +#include + +typedef struct KFilePosix +{ + KFile fd; + FILE *fp; +} KFilePosix; + +#define KFT_KFILEPOSIX MAKE_ID('K', 'F', 'T', 'P') + +INLINE KFilePosix *KFILEPOSIX_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEPOSIX); + return (KFilePosix *)fd; +} + +FILE *kfile_posix_init(KFilePosix *file, const char *filename, const char *mode); + +#endif /* KFILE_POSIX_H */ diff --git a/2.5/bertos/emul/ser_posix.c b/2.5/bertos/emul/ser_posix.c new file mode 100644 index 00000000..50a63ed7 --- /dev/null +++ b/2.5/bertos/emul/ser_posix.c @@ -0,0 +1,179 @@ +/** + * \file + * + * + * \brief Serial port emulator for hosted environments. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "cfg/cfg_ser.h" + +#include +#include + +#include +#include + +#include + +#include +#include + +#include /* open() */ +#include /* read(), write() */ + + +/* From the high-level serial driver */ +extern struct Serial ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; +static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; +static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; + + +/** + * Internal state structure + */ +struct EmulSerial +{ + struct SerialHardware hw; + struct Serial *ser; + int fd; +}; + + +/* + * Callbacks + */ +static void uart_init(struct SerialHardware *_hw, struct Serial *ser) +{ + struct EmulSerial *hw = (struct EmulSerial *)_hw; + + hw->ser = ser; + hw->fd = open("/dev/ttyS0", O_RDWR); +} + +static void uart_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + struct EmulSerial *hw = (struct EmulSerial *)_hw; + + close(hw->fd); + hw->fd = -1; +} + +static void uart_txStart(struct SerialHardware * _hw) +{ + struct EmulSerial *hw = (struct EmulSerial *)_hw; + + while(!fifo_isempty(&hw->ser->txfifo)) + { + char c = fifo_pop(&hw->ser->txfifo); + write(hw->fd, &c, 1); + } +} + +static bool uart_txSending(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + return false; +} + + +static void uart_setBaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + TRACEMSG("rate=%lu", rate); + // TODO + +} + +static void uart_setParity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + TRACEMSG("parity=%d", parity); + // TODO +} + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures. + */ +static const struct SerialHardwareVT uart_vtable = +{ + C99INIT(init, uart_init), + C99INIT(cleanup, uart_cleanup), + C99INIT(setBaudrate, uart_setBaudrate), + C99INIT(setParity, uart_setParity), + C99INIT(txStart, uart_txStart), + C99INIT(txSending, uart_txSending), +}; + +static struct EmulSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &uart_vtable), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(ser, NULL), + C99INIT(fd, -1), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &uart_vtable), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(ser, NULL), + C99INIT(fd, -1), + }, +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} diff --git a/2.5/bertos/emul/switch.S b/2.5/bertos/emul/switch.S new file mode 100644 index 00000000..110d62f5 --- /dev/null +++ b/2.5/bertos/emul/switch.S @@ -0,0 +1,2 @@ +#warning This file is deprecated, use switch_ctx_emul.S +#include "switch_ctx_emul.S" diff --git a/2.5/bertos/emul/switch_ctx_emul.S b/2.5/bertos/emul/switch_ctx_emul.S new file mode 100644 index 00000000..50567d19 --- /dev/null +++ b/2.5/bertos/emul/switch_ctx_emul.S @@ -0,0 +1,10 @@ +#if defined(__i386__) + #include "switch_i386.S" +#elif defined(__x86_64__) + #include "switch_x86_64.s" +#elif defined(_ARCH_PPC) || defined(_ARCH_PPC64) + #include "switch_ppc.S" +#else + #error Unknown CPU +#endif + diff --git a/2.5/bertos/emul/switch_i386.S b/2.5/bertos/emul/switch_i386.S new file mode 100644 index 00000000..abcb487b --- /dev/null +++ b/2.5/bertos/emul/switch_i386.S @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * + * \brief i386 context switch + * + * x86 function calling convention: + * -------------------------------- + * arguments | callee-saved | extra caller-saved | return + * [callee-clobbered] | | [callee-clobbered] | + * ------------------------------------------------------------------------- + * eax edx ecx | ebx edi esi ebp [*] | | eax, edx + * + * [*] In the frame-pointers case rbp must hold a base address for the + * current stack frame. + * + * asm_switch_context() can be considered as a normal function call, so we need + * to save all the callee-clobbered registers minus the return registers. + */ + +#ifdef __APPLE__ + // This workaround is necessary to compile under OS X assembler. + #define SWITCH_CONTEXT _asm_switch_context +#else + #define SWITCH_CONTEXT asm_switch_context +#endif + +/* void asm_switch_context(void ** new_sp [sp+4], void ** save_sp [sp+8]) */ +.globl SWITCH_CONTEXT +SWITCH_CONTEXT: + pushl %ebp + pushl %ecx + movl 0x10(%esp),%ebp /* ebp = save_sp */ + movl %esp,(%ebp) /* *save_sp = esp */ + movl 0x0c(%esp),%ebp /* ebp = new_sp */ + movl (%ebp),%esp /* esp = *new_sp */ + popl %ecx + popl %ebp + ret diff --git a/2.5/bertos/emul/switch_ppc.S b/2.5/bertos/emul/switch_ppc.S new file mode 100644 index 00000000..082efa8e --- /dev/null +++ b/2.5/bertos/emul/switch_ppc.S @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \version $Id: switch_i386.S 1578 2008-08-08 10:54:40Z bernie $ + * \author Bernie Innocenti + * + * \brief PowerPC context switch + */ + +#ifdef __APPLE__ + //This workaround is necessary to compile under OS X assembler. + #define SWITCH_CONTEXT _asm_switch_context +#else + #define SWITCH_CONTEXT asm_switch_context +#endif + +.balign 4 + +/* void asm_switch_context(void ** new_sp, void ** save_sp) */ +/* r3 r4 */ +.globl SWITCH_CONTEXT +SWITCH_CONTEXT: + mflr 0 /* r0 = lr */ + stw 0,8(1) /* store lr at *(sp+8) */ + stw 1,0(4) /* *save_sp = sp */ + lwz 1,0(3) /* sp = *new_sp */ + lwz 0,8(1) /* retrieve lr from *(sp+8) */ + mtlr 0 /* lr = r0 */ + blr /* return */ diff --git a/2.5/bertos/emul/switch_win32.s b/2.5/bertos/emul/switch_win32.s new file mode 100644 index 00000000..c258f6ef --- /dev/null +++ b/2.5/bertos/emul/switch_win32.s @@ -0,0 +1,82 @@ +/** + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * + * \brief i386 context switch for WIN32 + */ + +!!!!!! THIS FILE HAS NOT BEEN REVISED FOR THE NEW SCHEDULER API !!!!!! + +__declspec(naked) void AsmSwitchContext(void * new_sp, void ** save_sp) +{ + __asm + { + push eax + push ebx + push ecx + push edx + push esi + push edi + push ebp + mov ebp,dword ptr [esp+24h] ; ebp <- save_sp + mov dword ptr [ebp],esp ; *save_sp = esp + mov esp,dword ptr [esp+20h] ; new_sp + pop ebp + pop edi + pop esi + pop edx + pop ecx + pop ebx + pop eax + ret + } +} + +__declspec(naked) void AsmReplaceContext(void * new_sp, void ** dummy) +{ + __asm + { + mov esp,dword ptr [esp + 4] ; new_sp + pop ebp + pop edi + pop esi + pop edx + pop ecx + pop ebx + pop eax + ret + } +} + diff --git a/2.5/bertos/emul/switch_x86_64.s b/2.5/bertos/emul/switch_x86_64.s new file mode 100644 index 00000000..df12bed1 --- /dev/null +++ b/2.5/bertos/emul/switch_x86_64.s @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * + * \brief x86_64 context switch + * + * x86_64 function call convention: + * -------------------------------- + * arguments | callee-saved | extra caller-saved | return + * [callee-clobbered] | | [callee-clobbered] | + * ------------------------------------------------------------------------- + * rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx + * + * [*] In the frame-pointers case rbp must hold a base address for the + * current stack frame. + * + * asm_switch_context() can be considered as a normal function call, so we need + * to save all the callee-clobbered registers minus the return registers. + */ + +/* void asm_switch_context(void **new_sp [%rdi], void **save_sp [%rsi]) */ +.globl asm_switch_context +asm_switch_context: + pushq %rbp + pushq %rdi + pushq %rsi + pushq %rcx + pushq %r8 + pushq %r9 + pushq %r10 + pushq %r11 + movq %rsp,(%rsi) /* *save_sp = rsp */ + movq (%rdi),%rsp /* rsp = *new_sp */ + popq %r11 + popq %r10 + popq %r9 + popq %r8 + popq %rcx + popq %rsi + popq %rdi + popq %rbp + ret diff --git a/2.5/bertos/emul/timer_posix.c b/2.5/bertos/emul/timer_posix.c new file mode 100644 index 00000000..70990a21 --- /dev/null +++ b/2.5/bertos/emul/timer_posix.c @@ -0,0 +1,93 @@ +/** + * \file + * + * + * \brief Low-level timer module for Qt emulator (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + */ +//#include // hptime.t +#include +#include // irq_register() + +#if !CONFIG_KERN_IRQ +#include // sigaction() +#include // memset() +#endif +#include // setitimer() + + +// Forward declaration for the user interrupt server routine. +void timer_isr(int); + +/// HW dependent timer initialization. +static void timer_hw_init(void) +{ + #if CONFIG_KERN_IRQ + irq_register(SIGALRM, (void (*)(void))timer_isr); + #else // ! CONFIG_KERN_IRQ + struct sigaction sa; + memset(&sa, 0, sizeof(sa)); + + // Setup interrupt callback + sa.sa_handler = timer_isr; + sigemptyset(&sa.sa_mask); + sigaddset(&sa.sa_mask, SIGALRM); + sa.sa_flags = SA_RESTART; + sigaction(SIGALRM, &sa, NULL); + #endif // CONFIG_KERN_IRQ + + // Setup POSIX realtime timer to interrupt every 1/TIMER_TICKS_PER_SEC. + static const struct itimerval itv = + { + { 0, 1000000 / TIMER_TICKS_PER_SEC }, /* it_interval */ + { 0, 1000000 / TIMER_TICKS_PER_SEC } /* it_value */ + }; + setitimer(ITIMER_REAL, &itv, NULL); +} + +static void timer_hw_cleanup(void) +{ + static const struct itimerval itv = + { + { 0, 0 }, /* it_interval */ + { 0, 0 } /* it_value */ + }; + setitimer(ITIMER_REAL, &itv, NULL); + signal(SIGALRM, SIG_DFL); +} + +INLINE hptime_t timer_hw_hpread(void) +{ + return hptime_get(); +} + +#define timer_hw_triggered() (true) diff --git a/2.5/bertos/emul/timer_posix.h b/2.5/bertos/emul/timer_posix.h new file mode 100644 index 00000000..e782da6e --- /dev/null +++ b/2.5/bertos/emul/timer_posix.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for POSIX systems (interface). + */ +#ifndef DRV_TIMER_POSIX_H +#define DRV_TIMER_POSIX_H + +// HW dependent timer initialization + +#define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_isr) + +/** Most Linux kernels can't do better than this (CONFIG_HZ=250). */ +#define TIMER_TICKS_PER_SEC 250 + +#define TIMER_HW_CNT (1<<31) /* We assume 32bit integers here */ + +#include + +/// Frequency of the hardware high-precision timer. +#define TIMER_HW_HPTICKS_PER_SEC HPTIME_TICKS_PER_SECOND + +/// Not needed. +#define timer_hw_irq() do {} while (0) + +#endif /* DRV_TIMER_POSIX_H */ diff --git a/2.5/bertos/emul/timer_qt.c b/2.5/bertos/emul/timer_qt.c new file mode 100644 index 00000000..0b24178d --- /dev/null +++ b/2.5/bertos/emul/timer_qt.c @@ -0,0 +1,156 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for Qt emulator (implementation). + */ +#include /* hptime.t */ + +// Qt headers +#include +#include + +#if CONFIG_KERN_IRQ +#include +#endif + + +// The user interrupt server routine +void timer_isr(void); + + +/** + * Singleton class for Qt-based hardware timer emulation. + */ +class EmulTimer : public QObject +{ +private: + Q_OBJECT; + + /// System timer (counts ms since application startup) + QTime system_time; + + /// The 1ms "hardware" tick counter. + QTimer timer; + + /** + * We deliberately don't use RAII because the real hardware + * we're simulating needs to be initialized manually. + */ + bool initialized; + + /// Private ctor (singleton) + EmulTimer() : initialized(false) { } + +public: + /// Return singleton instance + static EmulTimer &instance() + { + static EmulTimer et; + return et; + } + + /// Start timer emulator. + void init() + { + // Timer initialized twice? + ASSERT(!initialized); + + // Record initial time + system_time.start(); + + #if CONFIG_KERN_IRQ + irq_register(SIGALRM, timer_isr); + #endif + + // Activate timer interrupt + connect(&timer, SIGNAL(timeout()), SLOT(timerInterrupt())); + timer.start(1000 / TIMER_TICKS_PER_SEC); + + initialized = true; + } + + void cleanup() + { + // Timer cleaned twice? + ASSERT(initialized); + + timer.stop(); + timer.disconnect(); + + initialized = false; + } + + /// Return current time in high-precision format. + hptime_t hpread() + { + ASSERT(initialized); + return system_time.elapsed(); + } + +public slots: + void timerInterrupt(void) + { + // Just call user interrupt server, timer restarts automatically. + #if CONFIG_KERN_IRQ + irq_entry(SIGALRM); + #else + timer_isr(); + #endif + } + +}; + +#include "timer_qt_moc.cpp" + + +/// HW dependent timer initialization. +static void timer_hw_init(void) +{ + EmulTimer::instance().init(); +} + +static void timer_hw_cleanup(void) +{ + EmulTimer::instance().cleanup(); +} + +INLINE hptime_t timer_hw_hpread(void) +{ + return EmulTimer::instance().hpread(); +} + +/** Not needed, timer IRQ handler called only for timer source */ +#define timer_hw_triggered() (true) diff --git a/2.5/bertos/emul/timer_qt.h b/2.5/bertos/emul/timer_qt.h new file mode 100644 index 00000000..1f37c6c9 --- /dev/null +++ b/2.5/bertos/emul/timer_qt.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for Qt emulator (interface). + */ +#ifndef DRV_TIMER_QT_H +#define DRV_TIMER_QT_H + +// HW dependent timer initialization + +#define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_isr) +#define TIMER_TICKS_PER_SEC 250 +#define TIMER_HW_CNT (1<<31) /* We assume 32bit integers here */ + +/// Type of time expressed in ticks of the hardware high-precision timer. +typedef unsigned int hptime_t; +#define SIZEOF_HPTIME_T 4 + +/// Frequency of the hardware high-precision timer. +#define TIMER_HW_HPTICKS_PER_SEC 1000 + +/// Not needed. +#define timer_hw_irq() do {} while (0) + +#endif /* DRV_TIMER_QT_H */ diff --git a/2.5/bertos/fonts/convbdf b/2.5/bertos/fonts/convbdf new file mode 100755 index 00000000..1e9e97e6 --- /dev/null +++ b/2.5/bertos/fonts/convbdf @@ -0,0 +1,209 @@ +#! /usr/bin/perl -w +# +# Convert BDF files to nano-X font files +# modified by G Haerr from bdftobogl for 16 bit MWIMAGEBITS +# modified on 2/10/00 by K Harris to accept any size input character +# modified on 3/26/00 by G Haerr added ascent field, fixed $IMAGE_BITS +# modified on 2/15/06 by for DevLib. +# originally from BOGL - Ben's Own Graphics Library . +# + +use POSIX; + +if ($#ARGV < 0) { + print "Usage: convbdf font.bdf > font.c\n"; + exit -1; +} + +$LAST_CHAR = 0xff; +$IMAGE_BITS = 8; +$IMAGE_NIBBLES = $IMAGE_BITS/4; +$IMAGE_MASK = 0xff; +$IMAGE_VERTICAL = 1; + +$file = $ARGV[0]; + +$font = $file; +$font =~ s#.*/##; # remove path name +$font =~ s/\.bdf//; +$font =~ tr/a-zA-Z0-9_/_/cs; + +print "/* Generated by convbdf on ", substr(`date`, 0, -1), ". */\n"; +print "#include \n\n"; + +open BDF, "<$file" || die; +while () { + chop; + $pixel_size = $1 if /^PIXEL_SIZE (\d+)$/; + $font_ascent = $1 if /^FONT_ASCENT (\d+)$/; + $font_descent = $1 if /^FONT_DESCENT (\d+)$/; + $font_name = $1 if /^FONT (.*)$/; + $default_char = $1 if /^DEFAULT_CHAR (\d+)$/; + + last if /^CHARS /; +} + +print "/* Font information:\n\n"; +print " name: $font_name\n"; +print " pixel size: $pixel_size\n"; +print " ascent: $font_ascent\n"; +print " descent: $font_descent\n"; +print "*/\n\n"; + +print "/* Font character bitmap data. */\n"; +print "static const PROGMEM uint8_t font_${font}_glyphs[] = {\n"; + +$ch_height = $font_ascent + $font_descent; +$ofs = 0; +$maxwidth = 0; +$proportional = 0; +$firstchar = -1; +while () { + chop; + undef $encoding, undef $width, undef $bbx, undef $bby, undef $bbw, undef $bbh if /^STARTCHAR /; + $encoding = $1 if /^ENCODING (\d+)/; + last if defined $encoding && $encoding > $LAST_CHAR; + $width = $1 if /^DWIDTH (-?\d+)/; + ($bbw, $bbh, $bbx, $bby) = ($1, $2, $3, $4) if /^BBX (-?\d+) (-?\d+) (-?\d+) (-?\d+)/; + + if (/^BITMAP$/) { + next if !defined $encoding; + $firstchar = $encoding if $firstchar < 0; + $encoding_tab[$encoding] = $ofs; + $width -= $bbx, $bbx = 0 if $bbx < 0; + $width[$encoding] = $width; + $maxwidth != 0 and $width != $maxwidth and $proportional = 1; + $maxwidth = $width if $width > $maxwidth; + $ch_words = int (($width+$IMAGE_BITS-1)/$IMAGE_BITS); + $ch_bits = $ch_words*$IMAGE_BITS; + for (my $i = 0; $i < $ch_height; $i++) { + for (my $k = 0; $k < $ch_words; $k++) { + $bm[$i][$k] = 0; + } + } + for (my $i = 0; ; $i++) { + $_ = ; + chop; + last if /^ENDCHAR$/; + + @hexnibbles = split //,$_; + for (my $k=0; $k<$ch_words; $k++) { + $ndx = $k*$IMAGE_NIBBLES; + $padnibbles = @hexnibbles - $ndx; + # if bbx pushes bits into next word + # and no more bits from bdf file + last if $padnibbles <= 0; + $padnibbles = 0 if $padnibbles >= $IMAGE_NIBBLES; + $value = hex join '',@hexnibbles[$ndx..($ndx+$IMAGE_NIBBLES-1-$padnibbles)]; + $value = $value << ($padnibbles*$IMAGE_NIBBLES); + $bm[$ch_height - $font_descent - $bby - $bbh + $i][$k] |= + $value >> ($bbx); + if ($bbx) { # handle overflow into next image_word + $bm[$ch_height - $font_descent - $bby - $bbh + $i][$k+1] = + ($value << ($IMAGE_BITS - $bbx)) & $IMAGE_MASK; + } + } + } + + # GLYPH PREVIEW +### printf "\n/* Character %c (0x%02x): ", $encoding, $encoding; + printf "\n/* Character (0x%02x): ", $encoding; + print "bbw=$bbw, bbh=$bbh, bbx=$bbx, bby=$bby, width=$width */\n"; + + # GLYPH DATA + if ($IMAGE_VERTICAL) { + my $bitstring = ""; + for (my $k = 0; $k < int(($ch_height + $IMAGE_BITS - 1) / $IMAGE_BITS); $k++) { + for (my $x = 0; $x < $width; $x++) { + my $v = 0; + for (my $y = 0; $y < $IMAGE_BITS && ($y + $k * $IMAGE_BITS < $ch_height); ++$y) { + my $bit = ($bm[$k * $IMAGE_BITS + $y][int($x / $IMAGE_BITS)] & (1 << ($IMAGE_BITS - ($x % $IMAGE_BITS) - 1))) ? 1 : 0; + $bitstring .= $bit ? '*' : ' '; + $v |= $bit << $y; + } + $ofs++; + printf "0x%02x, ", $v; + } + # Preview + printf "/* $bitstring */\n"; + } + + } + else { # IMAGE_HORIZONTAL + + # Preview + print " +", ("-" x $ch_bits), "+\n"; + for (my $i = 0; $i < $ch_height; $i++) { + print " |"; + for (my $k = 0; $k < $ch_words; $k++) { + for (my $j = $IMAGE_BITS - 1; $j >= 0; $j--) { + print $bm[$i][$k] & (1 << $j) ? "*" : " "; + } + } + print "|\n"; + } + print " +", ("-" x $ch_bits), "+ */\n"; + + for (my $i = 0; $i < $ch_height; $i++) { + for (my $k=0; $k<$ch_words; $k++) { + $ofs++; + printf "0x%02x, ", $bm[$i][$k]; + } + printf "\n"; + } + } + } +} + +print "};\n\n"; + +#print STDERR "Maximum character width=$maxwidth\n"; + +if ($proportional) { + print "/* Character->glyph data. */\n"; + print "static const PROGMEM uint16_t ${font}_offset[] = {\n"; + for (my $i = $firstchar; $i <= $LAST_CHAR; $i++) { + my $char = $i; + my $ofs = $encoding_tab[$i]; + $ofs = $encoding_tab[$default_char], $char = $default_char if !defined $ofs; + ### printf " $ofs,\t/* %c (0x%02x) */\n", $char, $i; + printf " $ofs,\t/* (0x%02x) */\n", $i; + } + print "};\n\n"; + + print "/* Character width data. */\n"; + print "static const PROGMEM uint8_t ${font}_width[] = {\n"; + for (my $i = $firstchar; $i <= $LAST_CHAR; $i++) { + my $char = $i; + my $width = $width[$i]; + $width = $width[$default_char], $char = $default_char if !defined $encoding_tab[$i]; + ### printf " $width,\t/* %c (0x%02x) */\n", $char, $i; + printf " $width,\t/* (0x%02x) */\n", $i; + } + print "};\n\n"; + + $font_offset = "${font}_offset"; + $font_width = "${font}_width"; +} else { + $font_offset = "NULL"; + $font_width = "NULL"; +} + +$lastchar = $LAST_CHAR; +#$size = $lastchar - $firstchar + 1; + +print < + * + * --> + * + * \brief Font 8x6 IBM-PC 8bit + * + * \version $Id$ + * + * \author Bernie Innocenti + * + */ + +#include + +static const PROGMEM uint8_t default_font_glyphs[256 * 6] = +{ +/* 0x00 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + 0x3E, 0x45, 0x51, 0x45, 0x3E, 0x00, /* */ + 0x3E, 0x7B, 0x6F, 0x7B, 0x3E, 0x00, /* */ + 0x1C, 0x3E, 0x7C, 0x3E, 0x1C, 0x00, /* */ + 0x08, 0x1C, 0x3E, 0x1C, 0x08, 0x00, /* */ + 0x18, 0x5A, 0x67, 0x5A, 0x18, 0x00, /* */ + 0x0C, 0x5E, 0x6F, 0x5E, 0x0C, 0x00, /* */ + 0x08, 0x1C, 0x3E, 0x1C, 0x08, 0x00, /* */ +/* 0x08 */ + 0x77, 0x63, 0x41, 0x63, 0x77, 0x00, /* */ + 0x18, 0x3C, 0x66, 0x3C, 0x18, 0x00, /* */ + 0x77, 0x63, 0x41, 0x63, 0x77, 0x00, /* */ + 0x20, 0x50, 0x5A, 0x56, 0x2E, 0x00, /* */ + 0x06, 0x29, 0x79, 0x29, 0x06, 0x00, /* */ + 0x60, 0x60, 0x7F, 0x05, 0x07, 0x00, /* */ + 0x18, 0x1F, 0x01, 0x61, 0x7F, 0x00, /* */ + 0x15, 0x0E, 0x1B, 0x0E, 0x15, 0x00, /* */ +/* 0x10 */ + 0x00, 0x08, 0x1C, 0x3E, 0x08, 0x08, /* */ + 0x7F, 0x3E, 0x1C, 0x08, 0x00, 0x00, /* */ + 0x14, 0x36, 0x7F, 0x36, 0x14, 0x00, /* */ + 0x00, 0x5F, 0x00, 0x5F, 0x00, 0x00, /* */ + 0x02, 0x05, 0x7F, 0x01, 0x7F, 0x00, /* */ + 0x20, 0x4A, 0x55, 0x29, 0x02, 0x00, /* */ + 0x60, 0x60, 0x60, 0x60, 0x60, 0x00, /* */ + 0x54, 0x76, 0x7F, 0x76, 0x54, 0x00, /* */ +/* 0x18 */ + 0x08, 0x0C, 0x7E, 0x0C, 0x08, 0x00, /* */ + 0x10, 0x30, 0x7E, 0x30, 0x10, 0x00, /* */ + 0x08, 0x08, 0x3E, 0x1C, 0x08, 0x00, /* */ + 0x08, 0x1C, 0x3E, 0x08, 0x08, 0x00, /* */ + 0x1C, 0x10, 0x10, 0x10, 0x10, 0x00, /* */ + 0x08, 0x1C, 0x08, 0x1C, 0x08, 0x00, /* */ + 0x18, 0x1C, 0x1E, 0x1C, 0x18, 0x00, /* */ + 0x0C, 0x1C, 0x3C, 0x1C, 0x0C, 0x00, /* */ +/* 0x20 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + 0x00, 0x00, 0x4F, 0x00, 0x00, 0x00, /* ! */ + 0x00, 0x07, 0x00, 0x07, 0x00, 0x00, /* " */ + 0x14, 0x7F, 0x14, 0x7F, 0x14, 0x00, /* # */ + 0x24, 0x2A, 0x7F, 0x2A, 0x12, 0x00, /* $ */ + 0x63, 0x13, 0x08, 0x64, 0x63, 0x00, /* % */ + 0x36, 0x49, 0x55, 0x22, 0x50, 0x00, /* & */ + 0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* ' */ +/* 0x28 */ + 0x00, 0x1C, 0x22, 0x41, 0x00, 0x00, /* ( */ + 0x00, 0x00, 0x41, 0x22, 0x1C, 0x00, /* ) */ + 0x14, 0x08, 0x3E, 0x08, 0x14, 0x00, /* * */ + 0x08, 0x08, 0x3E, 0x08, 0x08, 0x00, /* + */ + 0x00, 0x50, 0x30, 0x00, 0x00, 0x00, /* , */ + 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, /* - */ + 0x00, 0x60, 0x60, 0x00, 0x00, 0x00, /* . */ + 0x20, 0x10, 0x08, 0x04, 0x02, 0x00, /* / */ +/* 0x30 */ + 0x3E, 0x51, 0x49, 0x45, 0x3E, 0x00, /* 0 */ + 0x00, 0x42, 0x7F, 0x40, 0x00, 0x00, /* 1 */ + 0x62, 0x51, 0x49, 0x49, 0x46, 0x00, /* 2 */ + 0x21, 0x41, 0x45, 0x4B, 0x31, 0x00, /* 3 */ + 0x18, 0x14, 0x12, 0x7F, 0x10, 0x00, /* 4 */ + 0x27, 0x45, 0x45, 0x45, 0x39, 0x00, /* 5 */ + 0x3C, 0x4A, 0x49, 0x49, 0x30, 0x00, /* 6 */ + 0x01, 0x71, 0x09, 0x05, 0x03, 0x00, /* 7 */ +/* 0x38 */ + 0x36, 0x49, 0x49, 0x49, 0x36, 0x00, /* 8 */ + 0x06, 0x49, 0x49, 0x29, 0x1E, 0x00, /* 9 */ + 0x00, 0x36, 0x36, 0x00, 0x00, 0x00, /* : */ + 0x00, 0x56, 0x36, 0x00, 0x00, 0x00, /* ; */ + 0x08, 0x14, 0x22, 0x41, 0x00, 0x00, /* < */ + 0x14, 0x14, 0x14, 0x14, 0x14, 0x00, /* = */ + 0x00, 0x41, 0x22, 0x14, 0x08, 0x00, /* > */ + 0x02, 0x01, 0x51, 0x09, 0x06, 0x00, /* ? */ +/* 0x40 */ + 0x32, 0x49, 0x79, 0x41, 0x3E, 0x00, /* @ */ + 0x7E, 0x09, 0x09, 0x09, 0x7E, 0x00, /* A */ + 0x7F, 0x49, 0x49, 0x49, 0x36, 0x00, /* B */ + 0x3E, 0x41, 0x41, 0x41, 0x22, 0x00, /* C */ + 0x7F, 0x41, 0x41, 0x22, 0x1C, 0x00, /* D */ + 0x7F, 0x49, 0x49, 0x49, 0x41, 0x00, /* E */ + 0x7F, 0x09, 0x09, 0x09, 0x01, 0x00, /* F */ + 0x3E, 0x41, 0x49, 0x49, 0x7A, 0x00, /* G */ +/* 0x48 */ + 0x7F, 0x08, 0x08, 0x08, 0x7F, 0x00, /* H */ + 0x00, 0x41, 0x7F, 0x41, 0x00, 0x00, /* I */ + 0x20, 0x40, 0x41, 0x3F, 0x01, 0x00, /* J */ + 0x7F, 0x08, 0x14, 0x22, 0x41, 0x00, /* K */ + 0x7F, 0x40, 0x40, 0x40, 0x40, 0x00, /* L */ + 0x7F, 0x02, 0x0C, 0x02, 0x7F, 0x00, /* M */ + 0x7F, 0x04, 0x08, 0x10, 0x7F, 0x00, /* N */ + 0x3E, 0x41, 0x41, 0x41, 0x3E, 0x00, /* O */ +/* 0x50 */ + 0x7F, 0x09, 0x09, 0x09, 0x06, 0x00, /* P */ + 0x3E, 0x41, 0x51, 0x21, 0x5E, 0x00, /* Q */ + 0x7F, 0x09, 0x19, 0x29, 0x46, 0x00, /* R */ + 0x26, 0x49, 0x49, 0x49, 0x32, 0x00, /* S */ + 0x01, 0x01, 0x7F, 0x01, 0x01, 0x00, /* T */ + 0x3F, 0x40, 0x40, 0x40, 0x3F, 0x00, /* U */ + 0x1F, 0x20, 0x40, 0x20, 0x1F, 0x00, /* V */ + 0x3F, 0x40, 0x38, 0x40, 0x3F, 0x00, /* W */ +/* 0x58 */ + 0x63, 0x14, 0x08, 0x14, 0x63, 0x00, /* X */ + 0x07, 0x08, 0x70, 0x08, 0x07, 0x00, /* Y */ + 0x61, 0x51, 0x49, 0x45, 0x43, 0x00, /* Z */ + 0x00, 0x7F, 0x41, 0x41, 0x00, 0x00, /* [ */ + 0x02, 0x04, 0x08, 0x10, 0x20, 0x00, /* \ */ + 0x00, 0x41, 0x41, 0x7F, 0x00, 0x00, /* ] */ + 0x04, 0x02, 0x01, 0x02, 0x04, 0x00, /* ^ */ + 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, /* _ */ +/* 0x60 */ + 0x00, 0x01, 0x02, 0x04, 0x00, 0x00, /* ` */ + 0x00, 0x74, 0x54, 0x54, 0x78, 0x00, /* a */ + 0x7F, 0x44, 0x44, 0x44, 0x38, 0x00, /* b */ + 0x38, 0x44, 0x44, 0x44, 0x28, 0x00, /* c */ + 0x38, 0x44, 0x44, 0x44, 0x7F, 0x00, /* d */ + 0x38, 0x54, 0x54, 0x54, 0x18, 0x00, /* e */ + 0x08, 0x7E, 0x09, 0x01, 0x02, 0x00, /* f */ + 0x08, 0x54, 0x54, 0x54, 0x3C, 0x00, /* g */ +/* 0x68 */ + 0x7F, 0x04, 0x04, 0x04, 0x78, 0x00, /* h */ + 0x00, 0x44, 0x7D, 0x40, 0x00, 0x00, /* i */ + 0x20, 0x40, 0x44, 0x3D, 0x00, 0x00, /* j */ + 0x7F, 0x10, 0x28, 0x44, 0x00, 0x00, /* k */ + 0x00, 0x41, 0x7F, 0x40, 0x00, 0x00, /* l */ + 0x7C, 0x04, 0x18, 0x04, 0x78, 0x00, /* m */ + 0x7C, 0x08, 0x04, 0x04, 0x78, 0x00, /* n */ + 0x38, 0x44, 0x44, 0x44, 0x38, 0x00, /* o */ +/* 0x70 */ + 0x7C, 0x14, 0x14, 0x14, 0x08, 0x00, /* p */ + 0x08, 0x14, 0x14, 0x14, 0x7C, 0x00, /* q */ + 0x7C, 0x08, 0x04, 0x04, 0x08, 0x00, /* r */ + 0x48, 0x54, 0x54, 0x54, 0x24, 0x00, /* s */ + 0x04, 0x3F, 0x44, 0x40, 0x20, 0x00, /* t */ + 0x3C, 0x40, 0x40, 0x20, 0x7C, 0x00, /* u */ + 0x1C, 0x20, 0x40, 0x20, 0x1C, 0x00, /* v */ + 0x3C, 0x40, 0x30, 0x40, 0x3C, 0x00, /* w */ +/* 0x78 */ + 0x44, 0x28, 0x10, 0x28, 0x44, 0x00, /* x */ + 0x0C, 0x50, 0x50, 0x50, 0x3C, 0x00, /* y */ + 0x44, 0x64, 0x54, 0x4C, 0x44, 0x00, /* z */ + 0x00, 0x08, 0x36, 0x41, 0x00, 0x00, /* { */ + 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, /* | */ + 0x00, 0x41, 0x36, 0x08, 0x00, 0x00, /* } */ + 0x02, 0x01, 0x02, 0x01, 0x00, 0x00, /* ~ */ + 0x70, 0x48, 0x44, 0x48, 0x70, 0x00, /*  */ +/* 0x80 */ + 0x38, 0xC4, 0xC4, 0x44, 0x28, 0x00, /* € */ + 0x3A, 0x40, 0x40, 0x20, 0x7A, 0x00, /*  */ + 0x38, 0x54, 0x54, 0x55, 0x19, 0x00, /* ‚ */ + 0x22, 0x55, 0x55, 0x55, 0x78, 0x00, /* ƒ */ + 0x20, 0x55, 0x54, 0x54, 0x79, 0x00, /* „ */ + 0x21, 0x75, 0x55, 0x54, 0x78, 0x00, /* … */ + 0x20, 0x74, 0x57, 0x54, 0x78, 0x00, /* † */ + 0x08, 0x54, 0x54, 0x74, 0x14, 0x00, /* ‡ */ +/* 0x88 */ + 0x3A, 0x55, 0x55, 0x55, 0x1A, 0x00, /* ˆ */ + 0x39, 0x54, 0x54, 0x55, 0x18, 0x00, /* ‰ */ + 0x39, 0x55, 0x55, 0x54, 0x18, 0x00, /* Š */ + 0x00, 0x45, 0x7C, 0x41, 0x00, 0x00, /* ‹ */ + 0x02, 0x45, 0x7D, 0x42, 0x00, 0x00, /* Œ */ + 0x01, 0x45, 0x7D, 0x40, 0x00, 0x00, /*  */ + 0x79, 0x14, 0x12, 0x14, 0x79, 0x00, /* Ž */ + 0x70, 0x2B, 0x2B, 0x2B, 0x70, 0x00, /*  */ +/* 0x90 */ + 0x7C, 0x54, 0x55, 0x55, 0x45, 0x00, /*  */ + 0x20, 0x54, 0x38, 0x54, 0x48, 0x00, /* ‘ */ + 0x7E, 0x09, 0x7F, 0x49, 0x49, 0x00, /* ’ */ + 0x32, 0x49, 0x49, 0x49, 0x32, 0x00, /* “ */ + 0x32, 0x48, 0x48, 0x48, 0x32, 0x00, /* ” */ + 0x32, 0x4A, 0x4A, 0x48, 0x30, 0x00, /* • */ + 0x3A, 0x41, 0x41, 0x21, 0x7A, 0x00, /* – */ + 0x3A, 0x42, 0x42, 0x20, 0x78, 0x00, /* — */ +/* 0x98 */ + 0x0D, 0x50, 0x50, 0x50, 0x3D, 0x00, /* ˜ */ + 0x19, 0x24, 0x42, 0x24, 0x19, 0x00, /* ™ */ + 0x3D, 0x40, 0x40, 0x40, 0x3D, 0x00, /* š */ + 0x18, 0x24, 0x7E, 0x24, 0x24, 0x00, /* › */ + 0x28, 0x5E, 0x29, 0x42, 0x20, 0x00, /* œ */ + 0x09, 0x2A, 0x7C, 0x2A, 0x09, 0x00, /*  */ + 0x7F, 0x05, 0x15, 0x3D, 0x52, 0x00, /* ž */ + 0x20, 0x48, 0x3E, 0x09, 0x02, 0x00, /* Ÿ */ +/* 0xa0 */ + 0x20, 0x74, 0x55, 0x55, 0x79, 0x00, /*   */ + 0x01, 0x45, 0x7D, 0x40, 0x00, 0x00, /* ¡ */ + 0x30, 0x48, 0x4A, 0x4A, 0x32, 0x00, /* ¢ */ + 0x38, 0x40, 0x42, 0x22, 0x7A, 0x00, /* £ */ + 0x7A, 0x12, 0x0A, 0x0A, 0x72, 0x00, /* ¤ */ + 0x7D, 0x09, 0x11, 0x21, 0x7D, 0x00, /* ¥ */ + 0x02, 0x15, 0x15, 0x12, 0x04, 0x00, /* ¦ */ + 0x02, 0x15, 0x15, 0x15, 0x02, 0x00, /* § */ +/* 0xa8 */ + 0x30, 0x48, 0x45, 0x40, 0x20, 0x00, /* ¨ */ + 0x00, 0x38, 0x08, 0x08, 0x08, 0x00, /* © */ + 0x00, 0x08, 0x08, 0x08, 0x38, 0x00, /* ª */ + 0x0B, 0x04, 0x6A, 0x55, 0x48, 0x00, /* « */ + 0x0B, 0x24, 0x32, 0x79, 0x20, 0x00, /* ¬ */ + 0x00, 0x00, 0x79, 0x00, 0x00, 0x00, /* ­ */ + 0x08, 0x14, 0x2A, 0x14, 0x22, 0x00, /* ® */ + 0x22, 0x14, 0x2A, 0x14, 0x08, 0x00, /* ¯ */ +/* 0xb0 */ + 0x2A, 0x55, 0x00, 0x2A, 0x55, 0x00, /* ° */ + 0x2A, 0x55, 0x2A, 0x55, 0x2A, 0x55, /* ± */ + 0x55, 0x2A, 0x7F, 0x55, 0x2A, 0x7F, /* ² */ + 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, /* ³ */ + 0x08, 0x08, 0xFF, 0x00, 0x00, 0x00, /* ´ */ + 0x14, 0x14, 0xFF, 0x00, 0x00, 0x00, /* µ */ + 0x08, 0xFF, 0x00, 0xFF, 0x00, 0x00, /* ¶ */ + 0x08, 0xF8, 0x08, 0xF8, 0x00, 0x00, /* · */ +/* 0xb8 */ + 0x14, 0x14, 0xFC, 0x00, 0x00, 0x00, /* ¸ */ + 0x14, 0xF7, 0x00, 0xFF, 0x00, 0x00, /* ¹ */ + 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, /* º */ + 0x14, 0xF4, 0x04, 0xFC, 0x00, 0x00, /* » */ + 0x14, 0x17, 0x10, 0x1F, 0x00, 0x00, /* ¼ */ + 0x08, 0x0F, 0x08, 0x0F, 0x00, 0x00, /* ½ */ + 0x14, 0x14, 0x1F, 0x00, 0x00, 0x00, /* ¾ */ + 0x08, 0x08, 0xF8, 0x00, 0x00, 0x00, /* ¿ */ +/* 0xc0 */ + 0x00, 0x00, 0x0F, 0x08, 0x08, 0x08, /* À */ + 0x08, 0x08, 0x0F, 0x08, 0x08, 0x08, /* Á */ + 0x08, 0x08, 0xF8, 0x08, 0x08, 0x08, /*  */ + 0x00, 0x00, 0xFF, 0x08, 0x08, 0x08, /* à */ + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, /* Ä */ + 0x08, 0x08, 0xFF, 0x08, 0x08, 0x08, /* Å */ + 0x00, 0x00, 0xFF, 0x14, 0x14, 0x14, /* Æ */ + 0x00, 0xFF, 0x00, 0xFF, 0x08, 0x08, /* Ç */ +/* 0xc8 */ + 0x00, 0x1F, 0x10, 0x17, 0x14, 0x14, /* È */ + 0x00, 0xFC, 0x04, 0xF4, 0x14, 0x14, /* É */ + 0x28, 0x2F, 0x20, 0x2F, 0x28, 0x28, /* Ê */ + 0x14, 0xF4, 0x04, 0xF4, 0x14, 0x14, /* Ë */ + 0x00, 0xFF, 0x00, 0xF7, 0x14, 0x14, /* Ì */ + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, /* Í */ + 0x14, 0xF7, 0x00, 0xF7, 0x14, 0x14, /* Î */ + 0x14, 0x14, 0xF7, 0x14, 0x14, 0x14, /* Ï */ +/* 0xd0 */ + 0x08, 0x0F, 0x08, 0x0F, 0x08, 0x08, /* Ð */ + 0x14, 0x14, 0xF4, 0x14, 0x14, 0x14, /* Ñ */ + 0x08, 0x08, 0xF8, 0x08, 0x08, 0x08, /* Ò */ + 0x08, 0x0F, 0x08, 0x0F, 0x08, 0x08, /* Ó */ + 0x00, 0x00, 0x1F, 0x14, 0x14, 0x14, /* Ô */ + 0x00, 0x00, 0xFC, 0x14, 0x14, 0x14, /* Õ */ + 0x00, 0xF8, 0x08, 0xF8, 0x08, 0x08, /* Ö */ + 0x08, 0xFF, 0x08, 0xFF, 0x08, 0x08, /* × */ +/* 0xd8 */ + 0x14, 0x14, 0xFF, 0x14, 0x14, 0x14, /* Ø */ + 0x08, 0x08, 0x0F, 0x00, 0x00, 0x00, /* Ù */ + 0x00, 0x00, 0xF8, 0x08, 0x08, 0x08, /* Ú */ + 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x00, /* Û */ + 0x70, 0x70, 0x70, 0x70, 0x70, 0x00, /* Ü */ + 0x7F, 0x7F, 0x7F, 0x00, 0x00, 0x00, /* Ý */ + 0x00, 0x00, 0x00, 0x7F, 0x7F, 0x00, /* Þ */ + 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, /* ß */ +/* 0xe0 */ + 0x30, 0x48, 0x48, 0x30, 0x48, 0x00, /* à */ + 0x7E, 0x11, 0x25, 0x25, 0x1A, 0x00, /* á */ + 0x7E, 0x02, 0x02, 0x02, 0x06, 0x00, /* â */ + 0x04, 0x7C, 0x04, 0x7C, 0x04, 0x00, /* ã */ + 0x41, 0x63, 0x55, 0x49, 0x63, 0x00, /* ä */ + 0x3C, 0x42, 0x4A, 0x4A, 0x31, 0x00, /* å */ + 0x40, 0x7C, 0x20, 0x20, 0x1C, 0x00, /* æ */ + 0x08, 0x04, 0x7C, 0x08, 0x04, 0x00, /* ç */ +/* 0xe8 */ + 0x49, 0x55, 0x77, 0x55, 0x49, 0x00, /* è */ + 0x1C, 0x2A, 0x49, 0x2A, 0x1C, 0x00, /* é */ + 0x4C, 0x72, 0x02, 0x72, 0x4C, 0x00, /* ê */ + 0x30, 0x4A, 0x45, 0x49, 0x31, 0x00, /* ë */ + 0x18, 0x24, 0x18, 0x24, 0x18, 0x00, /* ì */ + 0x5C, 0x72, 0x2A, 0x27, 0x1D, 0x00, /* í */ + 0x1C, 0x2A, 0x49, 0x49, 0x00, 0x00, /* î */ + 0x7E, 0x01, 0x01, 0x01, 0x7E, 0x00, /* ï */ +/* 0xf0 */ + 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x00, /* ð */ + 0x24, 0x24, 0x2E, 0x24, 0x24, 0x00, /* ñ */ + 0x40, 0x51, 0x4A, 0x44, 0x00, 0x00, /* ò */ + 0x44, 0x4A, 0x51, 0x40, 0x00, 0x00, /* ó */ + 0x00, 0x00, 0xFE, 0x01, 0x02, 0x00, /* ô */ + 0x20, 0x40, 0x3F, 0x00, 0x00, 0x00, /* õ */ + 0x08, 0x08, 0x2A, 0x08, 0x08, 0x00, /* ö */ + 0x24, 0x12, 0x24, 0x12, 0x00, 0x00, /* ÷ */ +/* 0xf8 */ + 0x06, 0x09, 0x09, 0x09, 0x06, 0x00, /* ø */ + 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, /* ù */ + 0x00, 0x10, 0x10, 0x00, 0x00, 0x00, /* ú */ + 0x10, 0x30, 0x7F, 0x01, 0x01, 0x00, /* û */ + 0x01, 0x0E, 0x01, 0x01, 0x0E, 0x00, /* ü */ + 0x0A, 0x09, 0x0D, 0x0A, 0x00, 0x00, /* ý */ + 0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, /* þ */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ÿ */ +}; + + +#ifndef default_font +struct Font default_font = +{ + /* .glyph = */ default_font_glyphs, + /* .width = */ 6, + /* .height = */ 8 +}; + +#endif diff --git a/2.5/bertos/fonts/fonts.mk b/2.5/bertos/fonts/fonts.mk new file mode 100644 index 00000000..5d6e3ba8 --- /dev/null +++ b/2.5/bertos/fonts/fonts.mk @@ -0,0 +1,12 @@ +# +# $Id$ +# Copyright 2003, 2004, 2005, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile fragment for DevLib demo application. +# +# Author: Bernie Innocenti +# + +%.c: %.bdf + bertos/fonts/convbdf $< > $@ diff --git a/2.5/bertos/fonts/gohu.bdf b/2.5/bertos/fonts/gohu.bdf new file mode 100644 index 00000000..2e757833 --- /dev/null +++ b/2.5/bertos/fonts/gohu.bdf @@ -0,0 +1,2714 @@ +STARTFONT 2.1 +COMMENT "Copyright by Hugo Chargois" +COMMENT "Licensed under the WTFPL" +FONT -Gohu-GohuFont-Medium-R-Normal--11-80-100-100-C-60-ISO8859-1 +SIZE 11 100 100 +FONTBOUNDINGBOX 6 11 0 -2 +STARTPROPERTIES 30 +FOUNDRY "Gohu" +FAMILY_NAME "GohuFont" +WEIGHT_NAME "Medium" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 11 +POINT_SIZE 80 +RESOLUTION_X 100 +RESOLUTION_Y 100 +SPACING "C" +AVERAGE_WIDTH 60 +CHARSET_REGISTRY "ISO8859" +CHARSET_ENCODING "1" +FONTNAME_REGISTRY "" +FONT_NAME "GohuFont" +FACE_NAME "GohuFont" +FONT_VERSION "003.000" +FONT_ASCENT 9 +FONT_DESCENT 2 +UNDERLINE_POSITION -1 +UNDERLINE_THICKNESS 1 +X_HEIGHT 4 +CAP_HEIGHT 7 +RAW_ASCENT 818 +RAW_DESCENT 182 +NORM_SPACE 6 +FIGURE_WIDTH 6 +AVG_LOWERCASE_WIDTH 60 +AVG_UPPERCASE_WIDTH "60" +ENDPROPERTIES +CHARS 191 +STARTCHAR SPACE +ENCODING 32 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 0 0 0 0 +BITMAP +ENDCHAR +STARTCHAR EXCLAMATION MARK +ENCODING 33 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 8 2 0 +BITMAP +80 +80 +80 +80 +80 +80 +00 +80 +ENDCHAR +STARTCHAR QUOTATION MARK +ENCODING 34 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 3 1 5 +BITMAP +A0 +A0 +A0 +ENDCHAR +STARTCHAR NUMBER SIGN +ENCODING 35 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 1 +BITMAP +50 +50 +F8 +50 +F8 +50 +50 +ENDCHAR +STARTCHAR DOLLAR SIGN +ENCODING 36 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +20 +70 +A8 +A0 +70 +28 +A8 +70 +20 +ENDCHAR +STARTCHAR PERCENT SIGN +ENCODING 37 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +48 +A8 +50 +20 +50 +A8 +90 +ENDCHAR +STARTCHAR AMPERSAND +ENCODING 38 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +60 +90 +A0 +40 +A8 +90 +68 +ENDCHAR +STARTCHAR APOSTROPHE +ENCODING 39 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 3 2 5 +BITMAP +80 +80 +80 +ENDCHAR +STARTCHAR LEFT PARENTHESIS +ENCODING 40 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 -1 +BITMAP +20 +40 +40 +80 +80 +80 +40 +40 +20 +ENDCHAR +STARTCHAR RIGHT PARENTHESIS +ENCODING 41 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 -1 +BITMAP +80 +40 +40 +20 +20 +20 +40 +40 +80 +ENDCHAR +STARTCHAR ASTERISK +ENCODING 42 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +20 +A8 +70 +A8 +20 +ENDCHAR +STARTCHAR PLUS SIGN +ENCODING 43 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +20 +20 +F8 +20 +20 +ENDCHAR +STARTCHAR COMMA +ENCODING 44 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 4 1 -2 +BITMAP +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR HYPHEN-MINUS +ENCODING 45 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 1 0 3 +BITMAP +F8 +ENDCHAR +STARTCHAR FULL STOP +ENCODING 46 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 2 1 0 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR SOLIDUS +ENCODING 47 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 10 0 -2 +BITMAP +08 +08 +10 +10 +20 +20 +40 +40 +80 +80 +ENDCHAR +STARTCHAR DIGIT ZERO +ENCODING 48 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +98 +A8 +C8 +88 +70 +ENDCHAR +STARTCHAR DIGIT ONE +ENCODING 49 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 7 0 0 +BITMAP +20 +60 +A0 +20 +20 +20 +20 +ENDCHAR +STARTCHAR DIGIT TWO +ENCODING 50 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +08 +10 +20 +40 +F8 +ENDCHAR +STARTCHAR DIGIT THREE +ENCODING 51 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +08 +30 +08 +88 +70 +ENDCHAR +STARTCHAR DIGIT FOUR +ENCODING 52 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +10 +30 +50 +90 +F8 +10 +10 +ENDCHAR +STARTCHAR DIGIT FIVE +ENCODING 53 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +F8 +80 +F0 +08 +08 +88 +70 +ENDCHAR +STARTCHAR DIGIT SIX +ENCODING 54 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +80 +F0 +88 +88 +88 +70 +ENDCHAR +STARTCHAR DIGIT SEVEN +ENCODING 55 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +F8 +08 +10 +10 +20 +20 +20 +ENDCHAR +STARTCHAR DIGIT EIGHT +ENCODING 56 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +88 +70 +88 +88 +70 +ENDCHAR +STARTCHAR DIGIT NINE +ENCODING 57 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +88 +78 +08 +08 +70 +ENDCHAR +STARTCHAR COLON +ENCODING 58 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 5 2 0 +BITMAP +C0 +C0 +00 +C0 +C0 +ENDCHAR +STARTCHAR SEMICOLON +ENCODING 59 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 7 1 -2 +BITMAP +C0 +C0 +00 +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR LESS-THAN SIGN +ENCODING 60 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 7 1 0 +BITMAP +10 +20 +40 +80 +40 +20 +10 +ENDCHAR +STARTCHAR EQUALS SIGN +ENCODING 61 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 3 0 2 +BITMAP +F8 +00 +F8 +ENDCHAR +STARTCHAR GREATER-THAN SIGN +ENCODING 62 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 7 1 0 +BITMAP +80 +40 +20 +10 +20 +40 +80 +ENDCHAR +STARTCHAR QUESTION MARK +ENCODING 63 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +08 +10 +20 +00 +20 +ENDCHAR +STARTCHAR COMMERCIAL AT +ENCODING 64 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +B8 +A8 +B8 +80 +78 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A +ENCODING 65 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +88 +F8 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER B +ENCODING 66 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +F0 +88 +88 +88 +F0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER C +ENCODING 67 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +80 +80 +80 +80 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER D +ENCODING 68 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +88 +88 +88 +88 +F0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E +ENCODING 69 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +80 +80 +F0 +80 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER F +ENCODING 70 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +80 +80 +F0 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER G +ENCODING 71 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +80 +B8 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER H +ENCODING 72 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +F8 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I +ENCODING 73 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 8 1 0 +BITMAP +E0 +40 +40 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER J +ENCODING 74 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +08 +08 +08 +08 +08 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER K +ENCODING 75 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +90 +A0 +C0 +A0 +90 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER L +ENCODING 76 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +80 +80 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER M +ENCODING 77 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +D8 +A8 +A8 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER N +ENCODING 78 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +C8 +C8 +A8 +A8 +98 +98 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O +ENCODING 79 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER P +ENCODING 80 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +F0 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Q +ENCODING 81 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +70 +88 +88 +88 +88 +A8 +90 +68 +08 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER R +ENCODING 82 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +F0 +90 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER S +ENCODING 83 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +80 +70 +08 +08 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER T +ENCODING 84 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +20 +20 +20 +20 +20 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U +ENCODING 85 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER V +ENCODING 86 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +88 +50 +50 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER W +ENCODING 87 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +A8 +A8 +A8 +50 +50 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER X +ENCODING 88 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +50 +20 +50 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Y +ENCODING 89 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +50 +20 +20 +20 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Z +ENCODING 90 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +08 +10 +20 +40 +80 +80 +F8 +ENDCHAR +STARTCHAR LEFT SQUARE BRACKET +ENCODING 91 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 2 -1 +BITMAP +E0 +80 +80 +80 +80 +80 +80 +80 +E0 +ENDCHAR +STARTCHAR REVERSE SOLIDUS +ENCODING 92 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 10 1 -2 +BITMAP +80 +80 +40 +40 +20 +20 +10 +10 +08 +08 +ENDCHAR +STARTCHAR RIGHT SQUARE BRACKET +ENCODING 93 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 0 -1 +BITMAP +E0 +20 +20 +20 +20 +20 +20 +20 +E0 +ENDCHAR +STARTCHAR CIRCUMFLEX ACCENT +ENCODING 94 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 3 0 4 +BITMAP +20 +50 +88 +ENDCHAR +STARTCHAR LOW LINE +ENCODING 95 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 1 0 -1 +BITMAP +FC +ENDCHAR +STARTCHAR GRAVE ACCENT +ENCODING 96 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 3 1 5 +BITMAP +80 +40 +20 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A +ENCODING 97 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER B +ENCODING 98 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +B0 +C8 +88 +88 +F0 +ENDCHAR +STARTCHAR LATIN SMALL LETTER C +ENCODING 99 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +78 +80 +80 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER D +ENCODING 100 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +08 +08 +08 +78 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E +ENCODING 101 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER F +ENCODING 102 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 8 1 0 +BITMAP +60 +80 +80 +E0 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER G +ENCODING 103 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +78 +88 +88 +98 +68 +08 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER H +ENCODING 104 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +B0 +C8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I +ENCODING 105 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 7 1 0 +BITMAP +40 +00 +C0 +40 +40 +40 +60 +ENDCHAR +STARTCHAR LATIN SMALL LETTER J +ENCODING 106 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 0 -2 +BITMAP +20 +00 +60 +20 +20 +20 +20 +20 +C0 +ENDCHAR +STARTCHAR LATIN SMALL LETTER K +ENCODING 107 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +90 +A0 +E0 +90 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER L +ENCODING 108 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 8 1 0 +BITMAP +C0 +40 +40 +40 +40 +40 +40 +30 +ENDCHAR +STARTCHAR LATIN SMALL LETTER M +ENCODING 109 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +F0 +A8 +A8 +A8 +A8 +ENDCHAR +STARTCHAR LATIN SMALL LETTER N +ENCODING 110 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +F0 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O +ENCODING 111 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER P +ENCODING 112 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +B0 +C8 +88 +88 +F0 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Q +ENCODING 113 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +78 +88 +88 +98 +68 +08 +08 +ENDCHAR +STARTCHAR LATIN SMALL LETTER R +ENCODING 114 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +B0 +C8 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER S +ENCODING 115 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +80 +70 +08 +F0 +ENDCHAR +STARTCHAR LATIN SMALL LETTER T +ENCODING 116 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 8 0 0 +BITMAP +40 +40 +40 +F0 +40 +40 +40 +30 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U +ENCODING 117 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER V +ENCODING 118 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +88 +50 +50 +20 +ENDCHAR +STARTCHAR LATIN SMALL LETTER W +ENCODING 119 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +A8 +A8 +A8 +50 +ENDCHAR +STARTCHAR LATIN SMALL LETTER X +ENCODING 120 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +50 +20 +50 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Y +ENCODING 121 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +88 +88 +88 +98 +68 +08 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Z +ENCODING 122 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +F8 +10 +20 +40 +F8 +ENDCHAR +STARTCHAR LEFT CURLY BRACKET +ENCODING 123 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 11 0 -2 +BITMAP +18 +20 +20 +20 +20 +C0 +20 +20 +20 +20 +18 +ENDCHAR +STARTCHAR VERTICAL LINE +ENCODING 124 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 9 2 -1 +BITMAP +80 +80 +80 +80 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR RIGHT CURLY BRACKET +ENCODING 125 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 11 0 -2 +BITMAP +C0 +20 +20 +20 +20 +18 +20 +20 +20 +20 +C0 +ENDCHAR +STARTCHAR TILDE +ENCODING 126 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 3 0 2 +BITMAP +40 +A8 +10 +ENDCHAR +STARTCHAR NO-BREAK SPACE +ENCODING 160 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 0 0 0 0 +BITMAP +ENDCHAR +STARTCHAR INVERTED EXCLAMATION MARK +ENCODING 161 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 8 2 0 +BITMAP +80 +00 +80 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR CENT SIGN +ENCODING 162 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -1 +BITMAP +20 +78 +A0 +A0 +A0 +78 +20 +ENDCHAR +STARTCHAR POUND SIGN +ENCODING 163 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +30 +48 +40 +40 +E0 +40 +48 +B0 +ENDCHAR +STARTCHAR CURRENCY SIGN +ENCODING 164 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +70 +50 +70 +88 +ENDCHAR +STARTCHAR YEN SIGN +ENCODING 165 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +88 +88 +50 +20 +F8 +20 +F8 +20 +20 +ENDCHAR +STARTCHAR BROKEN BAR +ENCODING 166 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 9 2 -1 +BITMAP +80 +80 +80 +80 +00 +80 +80 +80 +80 +ENDCHAR +STARTCHAR SECTION SIGN +ENCODING 167 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 9 1 -1 +BITMAP +70 +80 +80 +E0 +90 +70 +10 +10 +E0 +ENDCHAR +STARTCHAR DIAERESIS +ENCODING 168 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 1 1 7 +BITMAP +A0 +ENDCHAR +STARTCHAR COPYRIGHT SIGN +ENCODING 169 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +A8 +C8 +A8 +88 +70 +ENDCHAR +STARTCHAR FEMININE ORDINAL INDICATOR +ENCODING 170 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 6 1 1 +BITMAP +70 +90 +B0 +50 +00 +F0 +ENDCHAR +STARTCHAR LEFT-POINTING DOUBLE ANGLE QUOTATION MARK +ENCODING 171 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +24 +48 +90 +48 +24 +ENDCHAR +STARTCHAR NOT SIGN +ENCODING 172 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 2 1 2 +BITMAP +F0 +10 +ENDCHAR +STARTCHAR SOFT HYPHEN +ENCODING 173 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 1 1 3 +BITMAP +F0 +ENDCHAR +STARTCHAR REGISTERED SIGN +ENCODING 174 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +E8 +C8 +C8 +88 +70 +ENDCHAR +STARTCHAR MACRON +ENCODING 175 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 1 0 7 +BITMAP +F8 +ENDCHAR +STARTCHAR DEGREE SIGN +ENCODING 176 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 3 1 4 +BITMAP +40 +A0 +40 +ENDCHAR +STARTCHAR PLUS-MINUS SIGN +ENCODING 177 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +20 +20 +F8 +20 +20 +F8 +ENDCHAR +STARTCHAR SUPERSCRIPT TWO +ENCODING 178 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 5 1 3 +BITMAP +60 +90 +20 +40 +F0 +ENDCHAR +STARTCHAR SUPERSCRIPT THREE +ENCODING 179 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 5 1 3 +BITMAP +E0 +10 +60 +10 +E0 +ENDCHAR +STARTCHAR ACUTE ACCENT +ENCODING 180 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 2 2 6 +BITMAP +40 +80 +ENDCHAR +STARTCHAR MICRO SIGN +ENCODING 181 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 6 0 -1 +BITMAP +88 +88 +88 +C8 +B0 +80 +ENDCHAR +STARTCHAR PILCROW SIGN +ENCODING 182 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +78 +E8 +E8 +68 +28 +28 +28 +ENDCHAR +STARTCHAR MIDDLE DOT +ENCODING 183 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 1 2 3 +BITMAP +80 +ENDCHAR +STARTCHAR CEDILLA +ENCODING 184 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 2 2 -2 +BITMAP +40 +80 +ENDCHAR +STARTCHAR SUPERSCRIPT ONE +ENCODING 185 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 5 1 3 +BITMAP +40 +C0 +40 +40 +E0 +ENDCHAR +STARTCHAR MASCULINE ORDINAL INDICATOR +ENCODING 186 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 6 1 1 +BITMAP +60 +90 +90 +60 +00 +F0 +ENDCHAR +STARTCHAR RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK +ENCODING 187 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +90 +48 +24 +48 +90 +ENDCHAR +STARTCHAR VULGAR FRACTION ONE QUARTER +ENCODING 188 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 9 0 -1 +BITMAP +40 +C0 +40 +40 +E4 +0C +14 +3C +04 +ENDCHAR +STARTCHAR VULGAR FRACTION ONE HALF +ENCODING 189 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 9 0 -1 +BITMAP +40 +C0 +40 +40 +E8 +14 +04 +08 +1C +ENDCHAR +STARTCHAR VULGAR FRACTION THREE QUARTERS +ENCODING 190 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +C0 +20 +40 +20 +C8 +18 +28 +78 +08 +ENDCHAR +STARTCHAR INVERTED QUESTION MARK +ENCODING 191 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +20 +00 +20 +40 +80 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH GRAVE +ENCODING 192 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +70 +88 +88 +F8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH ACUTE +ENCODING 193 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +70 +88 +88 +F8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH CIRCUMFLEX +ENCODING 194 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +88 +88 +F8 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH TILDE +ENCODING 195 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +68 +B0 +00 +70 +88 +88 +F8 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH DIAERESIS +ENCODING 196 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +70 +88 +88 +F8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH RING ABOVE +ENCODING 197 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +20 +70 +88 +88 +F8 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER AE +ENCODING 198 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +78 +A0 +A0 +F0 +A0 +A0 +B8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER C WITH CEDILLA +ENCODING 199 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +70 +88 +80 +80 +80 +88 +70 +20 +40 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH GRAVE +ENCODING 200 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH ACUTE +ENCODING 201 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH CIRCUMFLEX +ENCODING 202 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH DIAERESIS +ENCODING 203 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH GRAVE +ENCODING 204 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +40 +20 +00 +E0 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH ACUTE +ENCODING 205 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +40 +80 +00 +E0 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH CIRCUMFLEX +ENCODING 206 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +40 +A0 +00 +E0 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH DIAERESIS +ENCODING 207 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +A0 +00 +E0 +40 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER ETH +ENCODING 208 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +48 +48 +E8 +48 +48 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER N WITH TILDE +ENCODING 209 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +68 +B0 +88 +C8 +A8 +98 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH GRAVE +ENCODING 210 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH ACUTE +ENCODING 211 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH CIRCUMFLEX +ENCODING 212 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH TILDE +ENCODING 213 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +68 +B0 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH DIAERESIS +ENCODING 214 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR MULTIPLICATION SIGN +ENCODING 215 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +88 +50 +20 +50 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH STROKE +ENCODING 216 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 6 0 1 +BITMAP +74 +88 +98 +A8 +C8 +F0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH GRAVE +ENCODING 217 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH ACUTE +ENCODING 218 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH CIRCUMFLEX +ENCODING 219 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH DIAERESIS +ENCODING 220 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Y WITH ACUTE +ENCODING 221 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +88 +88 +88 +50 +20 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER THORN +ENCODING 222 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +80 +F0 +88 +88 +F0 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER SHARP S +ENCODING 223 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +30 +48 +88 +90 +90 +88 +88 +B0 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH GRAVE +ENCODING 224 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +10 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH ACUTE +ENCODING 225 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH CIRCUMFLEX +ENCODING 226 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH TILDE +ENCODING 227 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +68 +B0 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH DIAERESIS +ENCODING 228 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH RING ABOVE +ENCODING 229 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +20 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER AE +ENCODING 230 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +A8 +B8 +A0 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER C WITH CEDILLA +ENCODING 231 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +78 +80 +80 +80 +78 +20 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH GRAVE +ENCODING 232 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +40 +20 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH ACUTE +ENCODING 233 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH CIRCUMFLEX +ENCODING 234 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH DIAERESIS +ENCODING 235 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH GRAVE +ENCODING 236 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 8 2 0 +BITMAP +80 +40 +00 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH ACUTE +ENCODING 237 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 8 1 0 +BITMAP +40 +80 +00 +40 +40 +40 +40 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH CIRCUMFLEX +ENCODING 238 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 8 1 0 +BITMAP +40 +A0 +00 +40 +40 +40 +40 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH DIAERESIS +ENCODING 239 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 7 1 0 +BITMAP +A0 +00 +40 +40 +40 +40 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER ETH +ENCODING 240 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +60 +60 +10 +78 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER N WITH TILDE +ENCODING 241 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +50 +A0 +00 +F0 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH GRAVE +ENCODING 242 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +40 +20 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH ACUTE +ENCODING 243 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH CIRCUMFLEX +ENCODING 244 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH TILDE +ENCODING 245 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +50 +A0 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH DIAERESIS +ENCODING 246 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR DIVISION SIGN +ENCODING 247 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +20 +00 +F8 +00 +20 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH STROKE +ENCODING 248 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +98 +A8 +C8 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH GRAVE +ENCODING 249 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +40 +20 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH ACUTE +ENCODING 250 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH CIRCUMFLEX +ENCODING 251 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH DIAERESIS +ENCODING 252 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Y WITH ACUTE +ENCODING 253 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 10 0 -2 +BITMAP +10 +20 +00 +88 +88 +88 +98 +68 +08 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER THORN +ENCODING 254 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +80 +80 +F0 +88 +88 +88 +F0 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Y WITH DIAERESIS +ENCODING 255 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +50 +00 +88 +88 +88 +98 +68 +08 +70 +ENDCHAR +ENDFONT diff --git a/2.5/bertos/fonts/gohu.c b/2.5/bertos/fonts/gohu.c new file mode 100644 index 00000000..523cf21a --- /dev/null +++ b/2.5/bertos/fonts/gohu.c @@ -0,0 +1,792 @@ +/* Generated by convbdf on Wed Apr 28 11:17:58 CEST 2010. */ +#include + +/* Font information: + + name: -Gohu-GohuFont-Medium-R-Normal--11-80-100-100-C-60-ISO8859-1 + pixel size: 11 + ascent: 9 + descent: 2 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_gohu_glyphs[] = { + +/* Character (0x20): bbw=0, bbh=0, bbx=0, bby=0, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=1, bbh=8, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, /* ****** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* ****** * */ + +/* Character (0x22): bbw=3, bbh=3, bbx=1, bby=5, width=6 */ +0x00, 0x0e, 0x00, 0x0e, 0x00, 0x00, /* *** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** */ + +/* Character (0x23): bbw=5, bbh=7, bbx=0, bby=1, width=6 */ +0x28, 0xfe, 0x28, 0xfe, 0x28, 0x00, /* * * ******* * * ******* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ******* * * ******* * * */ + +/* Character (0x24): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0x98, 0x24, 0xfe, 0x24, 0xc8, 0x00, /* ** * * * ******* * * * ** */ +0x00, 0x01, 0x03, 0x01, 0x00, 0x00, /* ** * * * ******* * * * ** * ** * */ + +/* Character (0x25): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x88, 0x54, 0xa8, 0x50, 0x8c, 0x00, /* * * * * * * * * * * ** * */ +0x01, 0x00, 0x00, 0x01, 0x00, 0x00, /* * * * * * * * * * * ** * * * */ + +/* Character (0x26): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xd8, 0x24, 0x54, 0x88, 0x40, 0x00, /* ** ** * * * * * * * * */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* ** ** * * * * * * * * * * * */ + +/* Character (0x27): bbw=1, bbh=3, bbx=2, bby=5, width=6 */ +0x00, 0x00, 0x0e, 0x00, 0x00, 0x00, /* *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** */ + +/* Character (0x28): bbw=3, bbh=9, bbx=1, bby=-1, width=6 */ +0x00, 0x70, 0x8c, 0x02, 0x00, 0x00, /* *** ** * * */ +0x00, 0x00, 0x01, 0x02, 0x00, 0x00, /* *** ** * * * * */ + +/* Character (0x29): bbw=3, bbh=9, bbx=1, bby=-1, width=6 */ +0x00, 0x02, 0x8c, 0x70, 0x00, 0x00, /* * ** * *** */ +0x00, 0x02, 0x01, 0x00, 0x00, 0x00, /* * ** * *** * * */ + +/* Character (0x2a): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x50, 0x20, 0xf8, 0x20, 0x50, 0x00, /* * * * ***** * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ***** * * * */ + +/* Character (0x2b): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x20, 0x20, 0xf8, 0x20, 0x20, 0x00, /* * * ***** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ***** * * */ + +/* Character (0x2c): bbw=2, bbh=4, bbx=1, bby=-2, width=6 */ +0x00, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * */ +0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* * * * *** */ + +/* Character (0x2d): bbw=5, bbh=1, bbx=0, bby=3, width=6 */ +0x20, 0x20, 0x20, 0x20, 0x20, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x2e): bbw=2, bbh=2, bbx=1, bby=0, width=6 */ +0x00, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * */ +0x00, 0x01, 0x01, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0x2f): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0x00, 0x80, 0x60, 0x18, 0x06, 0x00, /* * ** ** ** */ +0x06, 0x01, 0x00, 0x00, 0x00, 0x00, /* * ** ** ** *** */ + +/* Character (0x30): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x44, 0x24, 0x14, 0xf8, 0x00, /* ***** * * * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * * * * * * ***** * * * */ + +/* Character (0x31): bbw=3, bbh=7, bbx=0, bby=0, width=6 */ +0x10, 0x08, 0xfc, 0x00, 0x00, 0x00, /* * * ****** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * ****** * */ + +/* Character (0x32): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x08, 0x84, 0x44, 0x24, 0x18, 0x00, /* * * * * * * * ** */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * ** * * * * * */ + +/* Character (0x33): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x88, 0x04, 0x24, 0x24, 0xd8, 0x00, /* * * * * * * * ** ** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * * * * * ** ** * * * */ + +/* Character (0x34): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x60, 0x50, 0x48, 0xfc, 0x40, 0x00, /* ** * * * * ****** * */ +0x00, 0x00, 0x00, 0x01, 0x00, 0x00, /* ** * * * * ****** * * */ + +/* Character (0x35): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x9c, 0x14, 0x14, 0x14, 0xe4, 0x00, /* *** * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * * * * *** * * * */ + +/* Character (0x36): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x14, 0x14, 0x14, 0xe0, 0x00, /* ***** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * * * * * * *** * * * */ + +/* Character (0x37): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x04, 0x04, 0xc4, 0x34, 0x0c, 0x00, /* * * * ** * ** ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * * ** * ** ** * */ + +/* Character (0x38): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xd8, 0x24, 0x24, 0x24, 0xd8, 0x00, /* ** ** * * * * * * ** ** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** ** * * * * * * ** ** * * * */ + +/* Character (0x39): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x18, 0x24, 0x24, 0x24, 0xf8, 0x00, /* ** * * * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * * * ***** * * * */ + +/* Character (0x3a): bbw=2, bbh=5, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xb0, 0xb0, 0x00, 0x00, /* ** * ** * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* ** * ** * * * */ + +/* Character (0x3b): bbw=2, bbh=7, bbx=1, bby=-2, width=6 */ +0x00, 0xb0, 0xb0, 0x00, 0x00, 0x00, /* ** * ** * */ +0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* ** * ** * * *** */ + +/* Character (0x3c): bbw=4, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x20, 0x50, 0x88, 0x04, 0x00, /* * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x00, /* * * * * * * * */ + +/* Character (0x3d): bbw=5, bbh=3, bbx=0, bby=2, width=6 */ +0x50, 0x50, 0x50, 0x50, 0x50, 0x00, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0x3e): bbw=4, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0x88, 0x50, 0x20, 0x00, /* * * * * * * */ +0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * */ + +/* Character (0x3f): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x08, 0x04, 0x44, 0x24, 0x18, 0x00, /* * * * * * * ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * * * * * ** * */ + +/* Character (0x40): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x04, 0x74, 0x54, 0x78, 0x00, /* ***** * * *** * * * **** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* ***** * * *** * * * **** * * * * */ + +/* Character (0x41): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x12, 0x12, 0x12, 0xfc, 0x00, /* ****** * * * * * * ****** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ****** * * * * * * ****** * * */ + +/* Character (0x42): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0xec, 0x00, /* ******* * * * * * * ** *** */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * * * * * * ** *** * * * * */ + +/* Character (0x43): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x02, 0x02, 0x02, 0x84, 0x00, /* ****** * * * * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * * * * * * */ + +/* Character (0x44): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x02, 0x02, 0x02, 0xfc, 0x00, /* ******* * * * ****** */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * * * ****** * * * * */ + +/* Character (0x45): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0x02, 0x00, /* ******* * * * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * * * * * * * * * * * */ + +/* Character (0x46): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0x02, 0x00, /* ******* * * * * * * * */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* ******* * * * * * * * * */ + +/* Character (0x47): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x02, 0x12, 0x12, 0xf4, 0x00, /* ****** * * * * * * **** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * * * * **** * * * */ + +/* Character (0x48): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x10, 0x10, 0x10, 0xfe, 0x00, /* ******* * * * ******* */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * ******* * * */ + +/* Character (0x49): bbw=3, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xfe, 0x02, 0x00, 0x00, /* * ******* * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * ******* * * * * */ + +/* Character (0x4a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xc0, 0x00, 0x00, 0x00, 0xfe, 0x00, /* ** ******* */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** ******* * * * */ + +/* Character (0x4b): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x10, 0x28, 0x44, 0x82, 0x00, /* ******* * * * * * * * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * * * * * * * */ + +/* Character (0x4c): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, /* ******* */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * * * * */ + +/* Character (0x4d): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x04, 0x18, 0x04, 0xfe, 0x00, /* ******* * ** * ******* */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * ** * ******* * * */ + +/* Character (0x4e): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x0c, 0x30, 0xc0, 0xfe, 0x00, /* ******* ** ** ** ******* */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* ** ** ** ******* * * */ + +/* Character (0x4f): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x02, 0x02, 0x02, 0xfc, 0x00, /* ****** * * * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * ****** * * * */ + +/* Character (0x50): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0x0c, 0x00, /* ******* * * * * * * ** */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* ******* * * * * * * ** * */ + +/* Character (0x51): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0xfc, 0x02, 0x42, 0x82, 0x7c, 0x00, /* ****** * * * * * ***** */ +0x00, 0x01, 0x01, 0x00, 0x03, 0x00, /* ****** * * * * * ***** * * ** */ + +/* Character (0x52): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x32, 0xcc, 0x00, /* ******* * * * * * ** ** ** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * * * ** ** ** * * */ + +/* Character (0x53): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x8c, 0x12, 0x12, 0x12, 0xe4, 0x00, /* ** * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * * * * * *** * * * */ + +/* Character (0x54): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x02, 0x02, 0xfe, 0x02, 0x02, 0x00, /* * * ******* * * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * ******* * * * */ + +/* Character (0x55): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x00, 0x00, 0x00, 0xfe, 0x00, /* ******* ******* */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* ******* * * * */ + +/* Character (0x56): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x1e, 0x60, 0x80, 0x60, 0x1e, 0x00, /* **** ** * ** **** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* **** ** * ** **** * */ + +/* Character (0x57): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x7e, 0x80, 0x70, 0x80, 0x7e, 0x00, /* ****** * *** * ****** */ +0x00, 0x01, 0x00, 0x01, 0x00, 0x00, /* ****** * *** * ****** * * */ + +/* Character (0x58): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xc6, 0x28, 0x10, 0x28, 0xc6, 0x00, /* ** ** * * * * * ** ** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ** ** * * * * * ** ** * * */ + +/* Character (0x59): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x06, 0x08, 0xf0, 0x08, 0x06, 0x00, /* ** * **** * ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* ** * **** * ** * */ + +/* Character (0x5a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xc2, 0x22, 0x12, 0x0a, 0x06, 0x00, /* * ** * * * * * * ** */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * ** * * * * * * ** * * * * * */ + +/* Character (0x5b): bbw=3, bbh=9, bbx=2, bby=-1, width=6 */ +0x00, 0x00, 0xfe, 0x02, 0x02, 0x00, /* ******* * * */ +0x00, 0x00, 0x03, 0x02, 0x02, 0x00, /* ******* * * ** * * */ + +/* Character (0x5c): bbw=5, bbh=10, bbx=1, bby=-2, width=6 */ +0x00, 0x06, 0x18, 0x60, 0x80, 0x00, /* ** ** ** * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x06, /* ** ** ** * * ** */ + +/* Character (0x5d): bbw=3, bbh=9, bbx=0, bby=-1, width=6 */ +0x02, 0x02, 0xfe, 0x00, 0x00, 0x00, /* * * ******* */ +0x02, 0x02, 0x03, 0x00, 0x00, 0x00, /* * * ******* * * ** */ + +/* Character (0x5e): bbw=5, bbh=3, bbx=0, bby=4, width=6 */ +0x10, 0x08, 0x04, 0x08, 0x10, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x5f): bbw=6, bbh=1, bbx=0, bby=-1, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, /* * * * * * * */ + +/* Character (0x60): bbw=3, bbh=3, bbx=1, bby=5, width=6 */ +0x00, 0x02, 0x04, 0x08, 0x00, 0x00, /* * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * */ + +/* Character (0x61): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x80, 0x50, 0x50, 0x50, 0xe0, 0x00, /* * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * *** * * * * */ + +/* Character (0x62): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x20, 0x10, 0x10, 0xe0, 0x00, /* ******* * * * *** */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * * * *** * * * * */ + +/* Character (0x63): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x10, 0x10, 0x10, 0x00, /* *** * * * * */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * */ + +/* Character (0x64): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x10, 0x90, 0xfe, 0x00, /* *** * * * * ******* */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* *** * * * * ******* * * * */ + +/* Character (0x65): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x50, 0x50, 0x50, 0x60, 0x00, /* *** * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * ** * * * * */ + +/* Character (0x66): bbw=3, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0xfc, 0x12, 0x12, 0x00, 0x00, /* ****** * * * * */ +0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /* ****** * * * * * */ + +/* Character (0x67): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xe0, 0x10, 0x10, 0x90, 0xf0, 0x00, /* *** * * * * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* *** * * * * **** * ** * *** */ + +/* Character (0x68): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x20, 0x10, 0x10, 0xe0, 0x00, /* ******* * * * *** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * *** * * */ + +/* Character (0x69): bbw=3, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x10, 0xf4, 0x00, 0x00, 0x00, /* * * **** */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * **** * * */ + +/* Character (0x6a): bbw=3, bbh=9, bbx=0, bby=-2, width=6 */ +0x00, 0x10, 0xf4, 0x00, 0x00, 0x00, /* * * **** */ +0x04, 0x04, 0x03, 0x00, 0x00, 0x00, /* * * **** * *** */ + +/* Character (0x6b): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x40, 0x60, 0x90, 0x00, 0x00, /* ******* * ** * * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * ** * * * * */ + +/* Character (0x6c): bbw=4, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xfe, 0x00, 0x00, 0x00, /* * ******* */ +0x00, 0x00, 0x00, 0x01, 0x01, 0x00, /* * ******* * * */ + +/* Character (0x6d): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x10, 0xf0, 0x10, 0xe0, 0x00, /* **** * **** * *** */ +0x01, 0x00, 0x01, 0x00, 0x01, 0x00, /* **** * **** * *** * * * */ + +/* Character (0x6e): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x10, 0x10, 0x10, 0xe0, 0x00, /* **** * * * *** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* **** * * * *** * * */ + +/* Character (0x6f): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x10, 0x10, 0xe0, 0x00, /* *** * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * *** * * * */ + +/* Character (0x70): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xf0, 0x20, 0x10, 0x10, 0xe0, 0x00, /* **** * * * *** */ +0x07, 0x01, 0x01, 0x01, 0x00, 0x00, /* **** * * * *** **** * * */ + +/* Character (0x71): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xe0, 0x10, 0x10, 0x90, 0xf0, 0x00, /* *** * * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x07, 0x00, /* *** * * * * **** * * *** */ + +/* Character (0x72): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x20, 0x10, 0x10, 0x20, 0x00, /* **** * * * * */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** * * * * * */ + +/* Character (0x73): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x20, 0x50, 0x50, 0x50, 0x80, 0x00, /* * * * * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * * * * * * * * * * */ + +/* Character (0x74): bbw=4, bbh=8, bbx=0, bby=0, width=6 */ +0x10, 0xfe, 0x10, 0x10, 0x00, 0x00, /* * ******* * * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * ******* * * * * */ + +/* Character (0x75): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x00, 0x00, 0x80, 0xf0, 0x00, /* **** * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * **** * * * */ + +/* Character (0x76): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x30, 0xc0, 0x00, 0xc0, 0x30, 0x00, /* ** ** ** ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* ** ** ** ** * */ + +/* Character (0x77): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x00, 0xe0, 0x00, 0xf0, 0x00, /* **** *** **** */ +0x00, 0x01, 0x00, 0x01, 0x00, 0x00, /* **** *** **** * * */ + +/* Character (0x78): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x10, 0xa0, 0x40, 0xa0, 0x10, 0x00, /* * * * * * * * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * * * * * * * * * */ + +/* Character (0x79): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xf0, 0x00, 0x00, 0x80, 0xf0, 0x00, /* **** * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* **** * **** * ** * *** */ + +/* Character (0x7a): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x10, 0x90, 0x50, 0x30, 0x10, 0x00, /* * * * * * ** * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * ** * * * * * * */ + +/* Character (0x7b): bbw=6, bbh=11, bbx=0, bby=-2, width=6 */ +0x20, 0x20, 0xde, 0x01, 0x01, 0x00, /* * * **** *** * */ +0x00, 0x00, 0x03, 0x04, 0x04, 0x00, /* * * **** *** * ** * * */ + +/* Character (0x7c): bbw=1, bbh=9, bbx=2, bby=-1, width=6 */ +0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, /* ******* */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ******* ** */ + +/* Character (0x7d): bbw=6, bbh=11, bbx=0, bby=-2, width=6 */ +0x01, 0x01, 0xde, 0x20, 0x20, 0x00, /* * * **** ** * * */ +0x04, 0x04, 0x03, 0x00, 0x00, 0x00, /* * * **** ** * * * *** */ + +/* Character (0x7e): bbw=5, bbh=3, bbx=0, bby=2, width=6 */ +0x20, 0x10, 0x20, 0x40, 0x20, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0xa0): bbw=0, bbh=0, bbx=0, bby=0, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=1, bbh=8, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xfa, 0x00, 0x00, 0x00, /* * ***** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * ***** * */ + +/* Character (0xa2): bbw=5, bbh=7, bbx=0, bby=-1, width=6 */ +0xe0, 0x10, 0xf8, 0x10, 0x10, 0x00, /* *** * ***** * * */ +0x00, 0x01, 0x03, 0x01, 0x01, 0x00, /* *** * ***** * * * ** * * */ + +/* Character (0xa3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x20, 0xfc, 0x22, 0x02, 0x84, 0x00, /* * ****** * * * * * */ +0x01, 0x00, 0x01, 0x01, 0x00, 0x00, /* * ****** * * * * * * * * */ + +/* Character (0xa4): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x10, 0xe0, 0xa0, 0xe0, 0x10, 0x00, /* * *** * * *** * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * *** * * *** * * * */ + +/* Character (0xa5): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0xa6, 0xa8, 0xf0, 0xa8, 0xa6, 0x00, /* ** * * * * * **** * * * ** * * */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ** * * * * * **** * * * ** * * ** */ + +/* Character (0xa6): bbw=1, bbh=9, bbx=2, bby=-1, width=6 */ +0x00, 0x00, 0xde, 0x00, 0x00, 0x00, /* **** ** */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* **** ** ** */ + +/* Character (0xa7): bbw=4, bbh=9, bbx=1, bby=-1, width=6 */ +0x00, 0x3c, 0x52, 0x52, 0xe2, 0x00, /* **** * * * * * * * *** */ +0x00, 0x02, 0x02, 0x02, 0x01, 0x00, /* **** * * * * * * * *** * * * * */ + +/* Character (0xa8): bbw=3, bbh=1, bbx=1, bby=7, width=6 */ +0x00, 0x02, 0x00, 0x02, 0x00, 0x00, /* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * */ + +/* Character (0xa9): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x24, 0x54, 0x04, 0xf8, 0x00, /* ***** * * * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * * * * * * ***** * * * */ + +/* Character (0xaa): bbw=4, bbh=6, bbx=1, bby=1, width=6 */ +0x00, 0x98, 0xa4, 0x94, 0xbc, 0x00, /* ** * * * * * * * **** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * * * * * * * **** * */ + +/* Character (0xab): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x20, 0x50, 0x88, 0x20, 0x50, 0x88, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xac): bbw=4, bbh=2, bbx=1, bby=2, width=6 */ +0x00, 0x20, 0x20, 0x20, 0x60, 0x00, /* * * * ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** */ + +/* Character (0xad): bbw=4, bbh=1, bbx=1, bby=3, width=6 */ +0x00, 0x20, 0x20, 0x20, 0x20, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xae): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x74, 0x14, 0x04, 0xf8, 0x00, /* ***** * *** * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * *** * * * ***** * * * */ + +/* Character (0xaf): bbw=5, bbh=1, bbx=0, bby=7, width=6 */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0xb0): bbw=3, bbh=3, bbx=1, bby=4, width=6 */ +0x00, 0x08, 0x14, 0x08, 0x00, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xb1): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x20, 0x20, 0xf8, 0x20, 0x20, 0x00, /* * * ***** * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * ***** * * * * * * * */ + +/* Character (0xb2): bbw=4, bbh=5, bbx=1, bby=3, width=6 */ +0x00, 0x24, 0x32, 0x2a, 0x24, 0x00, /* * * * ** * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * * * * * */ + +/* Character (0xb3): bbw=4, bbh=5, bbx=1, bby=3, width=6 */ +0x00, 0x22, 0x2a, 0x2a, 0x14, 0x00, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xb4): bbw=2, bbh=2, bbx=2, bby=6, width=6 */ +0x00, 0x00, 0x04, 0x02, 0x00, 0x00, /* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * */ + +/* Character (0xb5): bbw=5, bbh=6, bbx=0, bby=-1, width=6 */ +0xf0, 0x80, 0x00, 0x00, 0xf0, 0x00, /* **** * **** */ +0x03, 0x00, 0x01, 0x01, 0x00, 0x00, /* **** * **** ** * * */ + +/* Character (0xb6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x18, 0x3c, 0xfc, 0x04, 0xfc, 0x00, /* ** **** ****** * ****** */ +0x00, 0x00, 0x01, 0x00, 0x01, 0x00, /* ** **** ****** * ****** * * */ + +/* Character (0xb7): bbw=1, bbh=1, bbx=2, bby=3, width=6 */ +0x00, 0x00, 0x20, 0x00, 0x00, 0x00, /* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * */ + +/* Character (0xb8): bbw=2, bbh=2, bbx=2, bby=-2, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x04, 0x02, 0x00, 0x00, /* * * */ + +/* Character (0xb9): bbw=3, bbh=5, bbx=1, bby=3, width=6 */ +0x00, 0x24, 0x3e, 0x20, 0x00, 0x00, /* * * ***** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ***** * */ + +/* Character (0xba): bbw=4, bbh=6, bbx=1, bby=1, width=6 */ +0x00, 0x98, 0xa4, 0xa4, 0x98, 0x00, /* ** * * * * * * * ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * * * * * * * ** * */ + +/* Character (0xbb): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x88, 0x50, 0x20, 0x88, 0x50, 0x20, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xbc): bbw=6, bbh=9, bbx=0, bby=-1, width=6 */ +0x24, 0x3e, 0x20, 0x80, 0x40, 0xe0, /* * * ***** * * * *** */ +0x00, 0x00, 0x01, 0x01, 0x01, 0x03, /* * * ***** * * * *** * * * ** */ + +/* Character (0xbd): bbw=6, bbh=9, bbx=0, bby=-1, width=6 */ +0x24, 0x3e, 0x20, 0x40, 0x20, 0xc0, /* * * ***** * * * ** */ +0x00, 0x00, 0x00, 0x02, 0x03, 0x02, /* * * ***** * * * ** * ** * */ + +/* Character (0xbe): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0x22, 0x2a, 0x94, 0x40, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x03, 0x00, /* * * * * * * * * * *** * * * ** */ + +/* Character (0xbf): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xc0, 0x20, 0x14, 0x00, 0x80, 0x00, /* ** * * * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * * * * */ + +/* Character (0xc0): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x25, 0x26, 0x24, 0xf8, 0x00, /* ****** * * ** * * * ***** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ****** * * ** * * * ***** * * */ + +/* Character (0xc1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x24, 0x26, 0x25, 0xf8, 0x00, /* ***** * * ** * * * * ***** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ***** * * ** * * * * ***** * * */ + +/* Character (0xc2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0x4a, 0x49, 0x4a, 0xf0, 0x00, /* **** * * * * * * * * * **** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* **** * * * * * * * * * **** * * */ + +/* Character (0xc3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf2, 0x49, 0x4b, 0x4a, 0xf1, 0x00, /* * ***** * * ** * * * * * * **** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * ***** * * ** * * * * * * **** * * */ + +/* Character (0xc4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x25, 0x24, 0x25, 0xf8, 0x00, /* ****** * * * * * * * ***** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ****** * * * * * * * ***** * * */ + +/* Character (0xc5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0x4a, 0x4d, 0x4a, 0xf0, 0x00, /* **** * * * * ** * * * * **** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* **** * * * * ** * * * * **** * * */ + +/* Character (0xc6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x24, 0xfc, 0x24, 0x04, 0x00, /* ***** * * ****** * * * */ +0x01, 0x00, 0x01, 0x01, 0x01, 0x00, /* ***** * * ****** * * * * * * * */ + +/* Character (0xc7): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */ +0xf8, 0x04, 0x04, 0x04, 0x88, 0x00, /* ***** * * * * * */ +0x00, 0x05, 0x03, 0x01, 0x00, 0x00, /* ***** * * * * * * *** * */ + +/* Character (0xc8): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x25, 0x26, 0x24, 0x04, 0x00, /* ******* * * ** * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * ** * * * * * * * * * */ + +/* Character (0xc9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x24, 0x26, 0x25, 0x04, 0x00, /* ****** * * ** * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ****** * * ** * * * * * * * * * * */ + +/* Character (0xca): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x26, 0x25, 0x26, 0x04, 0x00, /* ****** ** * * * * ** * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ****** ** * * * * ** * * * * * * * */ + +/* Character (0xcb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x25, 0x24, 0x25, 0x04, 0x00, /* ******* * * * * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * * * * * * * * * * * * */ + +/* Character (0xcc): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x08, 0xf9, 0x0a, 0x00, 0x00, /* * * ***** * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * ***** * * * * * */ + +/* Character (0xcd): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x0a, 0xf9, 0x08, 0x00, 0x00, /* * * * ***** * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * ***** * * * * */ + +/* Character (0xce): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x0a, 0xf9, 0x0a, 0x00, 0x00, /* * * * ***** * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * ***** * * * * * */ + +/* Character (0xcf): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x05, 0xfc, 0x05, 0x00, 0x00, /* * * ******* * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * ******* * * * * */ + +/* Character (0xd0): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x20, 0xfc, 0x24, 0x04, 0xf8, 0x00, /* * ****** * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * ****** * * * ***** * * * */ + +/* Character (0xd1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfe, 0x09, 0x13, 0x22, 0xfd, 0x00, /* ******** * ** * * * * ****** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******** * ** * * * * ****** * * */ + +/* Character (0xd2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x05, 0x06, 0x04, 0xf8, 0x00, /* ****** * ** * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * ** * ***** * * * */ + +/* Character (0xd3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x04, 0x06, 0x05, 0xf8, 0x00, /* ***** * ** * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * ** * * ***** * * * */ + +/* Character (0xd4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0x0a, 0x09, 0x0a, 0xf0, 0x00, /* **** * * * * * * **** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* **** * * * * * * **** * * * */ + +/* Character (0xd5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfa, 0x05, 0x07, 0x06, 0xf9, 0x00, /* * ****** * *** ** * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * ****** * *** ** * ***** * * * */ + +/* Character (0xd6): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x05, 0x04, 0x05, 0xf8, 0x00, /* ****** * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * * ***** * * * */ + +/* Character (0xd7): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x88, 0x50, 0x20, 0x50, 0x88, 0x00, /* * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * */ + +/* Character (0xd8): bbw=6, bbh=6, bbx=0, bby=1, width=6 */ +0xf8, 0xc4, 0xa4, 0x94, 0x78, 0x04, /* ***** * ** * * * * * * **** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** * ** * * * * * * **** * */ + +/* Character (0xd9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x01, 0x02, 0x00, 0xfc, 0x00, /* ******* * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * ****** * * * */ + +/* Character (0xda): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x00, 0x02, 0x01, 0xfc, 0x00, /* ****** * * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * ****** * * * */ + +/* Character (0xdb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x00, 0x02, 0x01, 0xfc, 0x00, /* ****** * * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * ****** * * * */ + +/* Character (0xdc): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x01, 0x00, 0x01, 0xfc, 0x00, /* ******* * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * ****** * * * */ + +/* Character (0xdd): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0x1c, 0x20, 0xc2, 0x21, 0x1c, 0x00, /* *** * * *** * *** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* *** * * *** * *** * */ + +/* Character (0xde): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xfc, 0x48, 0x48, 0x48, 0x30, 0x00, /* ****** * * * * * * ** */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** * * * * * * ** * */ + +/* Character (0xdf): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0xf8, 0x04, 0x02, 0x32, 0xcc, 0x00, /* ***** * * * ** ** ** */ +0x03, 0x00, 0x01, 0x01, 0x00, 0x00, /* ***** * * * ** ** ** ** * * */ + +/* Character (0xe0): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x50, 0x52, 0x54, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * *** * * * * */ + +/* Character (0xe1): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x50, 0x54, 0x52, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * *** * * * * */ + +/* Character (0xe2): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x54, 0x52, 0x54, 0xe0, 0x00, /* * * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * * *** * * * * */ + +/* Character (0xe3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x84, 0x52, 0x56, 0x54, 0xe2, 0x00, /* * * * * * ** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * ** * * * * * * *** * * * * */ + +/* Character (0xe4): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x80, 0x54, 0x50, 0x54, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * *** * * * * */ + +/* Character (0xe5): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x54, 0x5a, 0x54, 0xe0, 0x00, /* * * * * * ** * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * ** * * * * *** * * * * */ + +/* Character (0xe6): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0xf0, 0x50, 0x60, 0x00, /* *** * **** * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * **** * * ** * * * * */ + +/* Character (0xe7): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xe0, 0x10, 0x10, 0x10, 0x10, 0x00, /* *** * * * * */ +0x00, 0x05, 0x03, 0x01, 0x01, 0x00, /* *** * * * * * *** * * */ + +/* Character (0xe8): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x52, 0x54, 0x50, 0x60, 0x00, /* *** * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * ** * * * * */ + +/* Character (0xe9): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x50, 0x54, 0x52, 0x60, 0x00, /* *** * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * ** * * * * */ + +/* Character (0xea): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x54, 0x52, 0x54, 0x60, 0x00, /* *** * * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * * ** * * * * */ + +/* Character (0xeb): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xe0, 0x54, 0x50, 0x54, 0x60, 0x00, /* *** * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * ** * * * * */ + +/* Character (0xec): bbw=2, bbh=8, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xf2, 0x04, 0x00, 0x00, /* * **** * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * **** * * */ + +/* Character (0xed): bbw=2, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0xf2, 0x00, 0x00, 0x00, /* * * **** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * **** * */ + +/* Character (0xee): bbw=3, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0xf2, 0x04, 0x00, 0x00, /* * * **** * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * **** * * */ + +/* Character (0xef): bbw=3, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0xf0, 0x04, 0x00, 0x00, /* * **** * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * **** * * */ + +/* Character (0xf0): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x16, 0x16, 0x18, 0xf0, 0x00, /* *** ** * ** * ** **** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** ** * ** * ** **** * * * */ + +/* Character (0xf1): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf4, 0x12, 0x14, 0x12, 0xe0, 0x00, /* * **** * * * * * * *** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * **** * * * * * * *** * * */ + +/* Character (0xf2): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x12, 0x14, 0x10, 0xe0, 0x00, /* *** * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * *** * * * */ + +/* Character (0xf3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x14, 0x12, 0xe0, 0x00, /* *** * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * *** * * * */ + +/* Character (0xf4): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x14, 0x12, 0x14, 0xe0, 0x00, /* *** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * * *** * * * */ + +/* Character (0xf5): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe4, 0x12, 0x14, 0x12, 0xe0, 0x00, /* * *** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * *** * * * * * * *** * * * */ + +/* Character (0xf6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xe0, 0x14, 0x10, 0x14, 0xe0, 0x00, /* *** * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * *** * * * */ + +/* Character (0xf7): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x20, 0x20, 0xa8, 0x20, 0x20, 0x00, /* * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * */ + +/* Character (0xf8): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x90, 0x50, 0x30, 0xe0, 0x00, /* *** * * * * ** *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * ** *** * * * */ + +/* Character (0xf9): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf0, 0x02, 0x04, 0x80, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * **** * * * */ + +/* Character (0xfa): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf0, 0x00, 0x04, 0x82, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * **** * * * */ + +/* Character (0xfb): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf0, 0x04, 0x02, 0x84, 0xf0, 0x00, /* **** * * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * * **** * * * */ + +/* Character (0xfc): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf0, 0x04, 0x00, 0x84, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * **** * * * */ + +/* Character (0xfd): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0xf0, 0x00, 0x04, 0x82, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* **** * * * **** * ** * *** */ + +/* Character (0xfe): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */ +0xfc, 0x10, 0x10, 0x10, 0xe0, 0x00, /* ****** * * * *** */ +0x07, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * *** **** * * */ + +/* Character (0xff): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */ +0xf0, 0x04, 0x00, 0x84, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* **** * * * **** * ** * *** */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_gohu = +{ + /* .glyph = */ font_gohu_glyphs, + /* .name = "gohu", */ + /* .width = */ 6, + /* .height = */ 11, + /* .ascent = 9, */ + /* .first = */ 32, + /* .last = */ 255, + /* .offset = */ NULL, + /* .width = */ NULL, +}; diff --git a/2.5/bertos/fonts/helvB10.bdf b/2.5/bertos/fonts/helvB10.bdf new file mode 100644 index 00000000..fe548f54 --- /dev/null +++ b/2.5/bertos/fonts/helvB10.bdf @@ -0,0 +1,3305 @@ +STARTFONT 2.1 +FONT -Adobe-Helvetica-Bold-R-Normal--10-100-75-75-P-60-ISO8859-1 +SIZE 10 75 75 +FONTBOUNDINGBOX 11 13 -1 -2 +COMMENT $XConsortium: helvB10.bdf,v 1.13 95/01/26 18:01:30 gildea Exp $ +COMMENT +COMMENT + +COMMENT Copyright 1984-1989, 1994 Adobe Systems Incorporated. +COMMENT Copyright 1988, 1994 Digital Equipment Corporation. +COMMENT +COMMENT Adobe is a trademark of Adobe Systems Incorporated which may be +COMMENT registered in certain jurisdictions. +COMMENT Permission to use these trademarks is hereby granted only in +COMMENT association with the images described in this file. +COMMENT +COMMENT Permission to use, copy, modify, distribute and sell this software +COMMENT and its documentation for any purpose and without fee is hereby +COMMENT granted, provided that the above copyright notices appear in all +COMMENT copies and that both those copyright notices and this permission +COMMENT notice appear in supporting documentation, and that the names of +COMMENT Adobe Systems and Digital Equipment Corporation not be used in +COMMENT advertising or publicity pertaining to distribution of the software +COMMENT without specific, written prior permission. Adobe Systems and +COMMENT Digital Equipment Corporation make no representations about the +COMMENT suitability of this software for any purpose. It is provided "as +COMMENT is" without express or implied warranty. +COMMENT - +STARTPROPERTIES 28 +FOUNDRY "Adobe" +FAMILY_NAME "Helvetica" +WEIGHT_NAME "Bold" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 10 +POINT_SIZE 100 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "P" +AVERAGE_WIDTH 60 +CHARSET_REGISTRY "ISO8859" +CHARSET_ENCODING "1" +CAP_HEIGHT 8 +X_HEIGHT 6 +FONT_ASCENT 10 +FONT_DESCENT 2 +FACE_NAME "Helvetica Bold" +COPYRIGHT "Copyright (c) 1984, 1987 Adobe Systems Incorporated. All Rights Reserved. Copyright (c) 1988, 1991 Digital Equipment Corporation. All Rights Reserved." +NOTICE "Helvetica is a trademark of Linotype-Hell AG and/or its subsidiaries. " +_DEC_DEVICE_FONTNAMES "PS=Helvetica-Bold" +_DEC_PRODUCTINFO "DECwindows Fonts V2.2, 07-Nov-1991" +DEFAULT_CHAR 32 +RELATIVE_SETWIDTH 50 +RELATIVE_WEIGHT 70 +CHARSET_COLLECTIONS "ASCII ISO8859-1 ADOBE-STANDARD" +FULL_NAME "Helvetica Bold" +ENDPROPERTIES +CHARS 229 +STARTCHAR space +ENCODING 32 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclam +ENCODING 33 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 2 8 1 0 +BITMAP +C0 +C0 +C0 +C0 +80 +80 +00 +C0 +ENDCHAR +STARTCHAR quotedbl +ENCODING 34 +SWIDTH 474 0 +DWIDTH 5 0 +BBX 3 3 1 5 +BITMAP +A0 +A0 +A0 +ENDCHAR +STARTCHAR numbersign +ENCODING 35 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 7 0 0 +BITMAP +50 +50 +FC +50 +F8 +A0 +A0 +ENDCHAR +STARTCHAR dollar +ENCODING 36 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +20 +70 +A8 +E0 +70 +38 +A8 +70 +20 +ENDCHAR +STARTCHAR percent +ENCODING 37 +SWIDTH 889 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +62 +B4 +68 +10 +10 +2C +56 +8C +ENDCHAR +STARTCHAR ampersand +ENCODING 38 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +70 +D8 +D8 +70 +DE +CC +DC +76 +ENDCHAR +STARTCHAR quoteright +ENCODING 39 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 3 0 5 +BITMAP +C0 +40 +80 +ENDCHAR +STARTCHAR parenleft +ENCODING 40 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 10 0 -2 +BITMAP +20 +60 +40 +C0 +C0 +C0 +C0 +40 +60 +20 +ENDCHAR +STARTCHAR parenright +ENCODING 41 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 10 0 -2 +BITMAP +80 +C0 +40 +60 +60 +60 +60 +40 +C0 +80 +ENDCHAR +STARTCHAR asterisk +ENCODING 42 +SWIDTH 389 0 +DWIDTH 4 0 +BBX 3 3 0 5 +BITMAP +A0 +40 +A0 +ENDCHAR +STARTCHAR plus +ENCODING 43 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +30 +30 +FC +30 +30 +ENDCHAR +STARTCHAR comma +ENCODING 44 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 4 0 -2 +BITMAP +40 +40 +40 +80 +ENDCHAR +STARTCHAR minus +ENCODING 45 +SWIDTH 584 0 +DWIDTH 7 0 +BBX 5 1 1 3 +BITMAP +F8 +ENDCHAR +STARTCHAR period +ENCODING 46 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 1 2 1 0 +BITMAP +80 +80 +ENDCHAR +STARTCHAR slash +ENCODING 47 +SWIDTH 278 0 +DWIDTH 4 0 +BBX 4 8 0 0 +BITMAP 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9 0 0 +BITMAP +40 +20 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR eacute +ENCODING 233 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR ecircumflex +ENCODING 234 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR edieresis +ENCODING 235 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +50 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR igrave +ENCODING 236 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 9 0 0 +BITMAP +80 +40 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR iacute +ENCODING 237 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 9 0 0 +BITMAP +20 +40 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR icircumflex +ENCODING 238 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 9 -1 0 +BITMAP +40 +A0 +00 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR idieresis +ENCODING 239 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 9 0 0 +BITMAP +A0 +A0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR eth +ENCODING 240 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +60 +A0 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR ntilde +ENCODING 241 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +28 +50 +00 +B0 +D8 +D8 +D8 +D8 +D8 +ENDCHAR +STARTCHAR ograve +ENCODING 242 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR oacute +ENCODING 243 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR ocircumflex +ENCODING 244 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR otilde +ENCODING 245 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +A0 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR odieresis +ENCODING 246 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +50 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR divide +ENCODING 247 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +30 +00 +FC +00 +30 +ENDCHAR +STARTCHAR oslash +ENCODING 248 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 6 6 0 0 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0 +BBX 6 8 -1 0 +BITMAP +60 +60 +60 +70 +E0 +60 +60 +7C +ENDCHAR +STARTCHAR OE +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 9 8 0 0 +BITMAP +3F80 +6C00 +CC00 +CF80 +CC00 +CC00 +6C00 +3F80 +ENDCHAR +STARTCHAR Scaron +ENCODING -1 +SWIDTH 667 0 +DWIDTH 7 0 +BBX 6 9 0 0 +BITMAP +28 +10 +00 +78 +CC +70 +3C +CC +78 +ENDCHAR +STARTCHAR Ydieresis +ENCODING -1 +SWIDTH 667 0 +DWIDTH 8 0 +BBX 8 8 0 0 +BITMAP +14 +00 +C3 +66 +3C +18 +18 +18 +ENDCHAR +STARTCHAR Zcaron +ENCODING -1 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 6 9 0 0 +BITMAP +28 +10 +00 +FC +18 +30 +60 +C0 +FC +ENDCHAR +STARTCHAR breve +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 4 2 0 6 +BITMAP +90 +60 +ENDCHAR +STARTCHAR bullet +ENCODING -1 +SWIDTH 350 0 +DWIDTH 4 0 +BBX 2 2 1 2 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR caron +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 2 0 6 +BITMAP +A0 +40 +ENDCHAR +STARTCHAR circumflex +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 2 0 6 +BITMAP +40 +A0 +ENDCHAR +STARTCHAR dagger +ENCODING -1 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 10 0 -2 +BITMAP +30 +30 +FC +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR daggerdbl +ENCODING -1 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 10 0 -2 +BITMAP +30 +30 +FC +30 +30 +30 +FC +30 +30 +30 +ENDCHAR +STARTCHAR dotaccent +ENCODING -1 +SWIDTH 333 0 +DWIDTH 2 0 +BBX 1 1 0 7 +BITMAP +80 +ENDCHAR +STARTCHAR dotlessi +ENCODING -1 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 6 0 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR ellipsis +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 8 1 1 0 +BITMAP +DB +ENDCHAR +STARTCHAR emdash +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 10 1 0 3 +BITMAP +FFC0 +ENDCHAR +STARTCHAR endash +ENCODING -1 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 1 0 3 +BITMAP +FC +ENDCHAR +STARTCHAR fi +ENCODING -1 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 7 8 -1 0 +BITMAP +36 +60 +F6 +66 +66 +66 +66 +66 +ENDCHAR +STARTCHAR fl +ENCODING -1 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 7 8 -1 0 +BITMAP +36 +66 +F6 +66 +66 +66 +66 +66 +ENDCHAR +STARTCHAR florin +ENCODING -1 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +38 +60 +F8 +60 +60 +60 +60 +60 +C0 +ENDCHAR +STARTCHAR fraction +ENCODING -1 +SWIDTH 167 0 +DWIDTH 4 0 +BBX 5 7 -1 0 +BITMAP +08 +10 +10 +20 +40 +40 +80 +ENDCHAR +STARTCHAR grave +ENCODING -1 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 2 0 6 +BITMAP +80 +40 +ENDCHAR +STARTCHAR guilsinglleft +ENCODING -1 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 3 3 1 1 +BITMAP +60 +C0 +60 +ENDCHAR +STARTCHAR guilsinglright +ENCODING -1 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 3 3 1 1 +BITMAP +C0 +60 +C0 +ENDCHAR +STARTCHAR hungarumlaut +ENCODING -1 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 4 2 0 6 +BITMAP +50 +A0 +ENDCHAR +STARTCHAR lslash +ENCODING -1 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 4 8 -1 0 +BITMAP +60 +60 +60 +70 +E0 +60 +60 +60 +ENDCHAR +STARTCHAR oe +ENCODING -1 +SWIDTH 944 0 +DWIDTH 10 0 +BBX 9 6 0 0 +BITMAP +7700 +CD80 +CF80 +CC00 +CD80 +7700 +ENDCHAR +STARTCHAR ogonek +ENCODING -1 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 2 0 -2 +BITMAP +80 +C0 +ENDCHAR +STARTCHAR perthousand +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 11 0 +BBX 10 7 0 0 +BITMAP +6200 +B400 +6800 +1000 +2D80 +56C0 +8D80 +ENDCHAR +STARTCHAR quotedblbase +ENCODING -1 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 3 0 -2 +BITMAP +D8 +48 +90 +ENDCHAR +STARTCHAR quotedblleft +ENCODING -1 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 3 0 5 +BITMAP +48 +90 +D8 +ENDCHAR +STARTCHAR quotedblright +ENCODING -1 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 3 0 5 +BITMAP +D8 +48 +90 +ENDCHAR +STARTCHAR quotesinglbase +ENCODING -1 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 3 0 -2 +BITMAP +C0 +40 +80 +ENDCHAR +STARTCHAR quotesingle +ENCODING -1 +SWIDTH 238 0 +DWIDTH 3 0 +BBX 1 3 1 5 +BITMAP +80 +80 +80 +ENDCHAR +STARTCHAR ring +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 3 0 5 +BITMAP +40 +A0 +40 +ENDCHAR +STARTCHAR scaron +ENCODING -1 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +20 +00 +70 +D8 +70 +18 +D8 +70 +ENDCHAR +STARTCHAR tilde +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 4 2 0 6 +BITMAP +50 +A0 +ENDCHAR +STARTCHAR trademark +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 11 0 +BBX 9 4 1 3 +BITMAP +E880 +4D80 +4A80 +4A80 +ENDCHAR +STARTCHAR zcaron +ENCODING -1 +SWIDTH 500 0 +DWIDTH 5 0 +BBX 5 9 0 0 +BITMAP +50 +20 +00 +F8 +18 +30 +60 +C0 +F8 +ENDCHAR +ENDFONT diff --git a/2.5/bertos/fonts/helvB10.c b/2.5/bertos/fonts/helvB10.c new file mode 100644 index 00000000..b3282ced --- /dev/null +++ b/2.5/bertos/fonts/helvB10.c @@ -0,0 +1,1248 @@ +/* Generated by convbdf on Wed Apr 28 00:42:58 CEST 2010. */ +#include + +/* Font information: + + name: -Adobe-Helvetica-Bold-R-Normal--10-100-75-75-P-60-ISO8859-1 + pixel size: 10 + ascent: 10 + descent: 2 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_helvB10_glyphs[] = { + +/* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=3 */ +0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=2, bbh=8, bbx=1, bby=0, width=4 */ +0x00, 0xfc, 0x3c, 0x00, /* ****** **** */ +0x00, 0x02, 0x02, 0x00, /* ****** **** * * */ + +/* Character (0x22): bbw=3, bbh=3, bbx=1, bby=5, width=5 */ +0x00, 0x1c, 0x00, 0x1c, 0x00, /* *** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** */ + +/* Character (0x23): bbw=6, bbh=7, bbx=0, bby=0, width=6 */ +0xa0, 0xf8, 0xa0, 0xf8, 0xa0, 0x20, /* * * ***** * * ***** * * * */ +0x03, 0x00, 0x03, 0x00, 0x00, 0x00, /* * * ***** * * ***** * * * ** ** */ + +/* Character (0x24): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0x30, 0x68, 0xfc, 0xc8, 0x90, 0x00, /* ** * ** ****** * ** * * */ +0x01, 0x02, 0x07, 0x02, 0x01, 0x00, /* ** * ** ****** * ** * * * * *** * * */ + +/* Character (0x25): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x08, 0x14, 0x9c, 0x68, 0x90, 0x88, 0x04, 0x00, /* * * * *** * * ** * * * * * */ +0x02, 0x01, 0x00, 0x01, 0x02, 0x03, 0x01, 0x00, /* * * * *** * * ** * * * * * * * * * ** * */ + +/* Character (0x26): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xd8, 0xfc, 0x24, 0x7c, 0xd8, 0xc0, 0x40, 0x00, /* ** ** ****** * * ***** ** ** ** * */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x03, 0x02, 0x00, /* ** ** ****** * * ***** ** ** ** * * ** * ** * ** * */ + +/* Character (0x27): bbw=2, bbh=3, bbx=0, bby=5, width=3 */ +0x14, 0x0c, 0x00, /* * * ** */ +0x00, 0x00, 0x00, /* * * ** */ + +/* Character (0x28): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0xe0, 0xf8, 0x0c, 0x00, /* *** ***** ** */ +0x01, 0x07, 0x0c, 0x00, /* *** ***** ** * *** ** */ + +/* Character (0x29): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0x0c, 0xf8, 0xe0, 0x00, /* ** ***** *** */ +0x0c, 0x07, 0x01, 0x00, /* ** ***** *** ***** * */ + +/* Character (0x2a): bbw=3, bbh=3, bbx=0, bby=5, width=4 */ +0x14, 0x08, 0x14, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x2b): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x40, 0x40, 0xf0, 0xf0, 0x40, 0x40, /* * * **** **** * * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * **** **** * * * * */ + +/* Character (0x2c): bbw=2, bbh=4, bbx=0, bby=-2, width=3 */ +0x00, 0x00, 0x00, /* */ +0x08, 0x07, 0x00, /* **** */ + +/* Character (0x2d): bbw=5, bbh=1, bbx=1, bby=3, width=7 */ +0x00, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x2e): bbw=1, bbh=2, bbx=1, bby=0, width=3 */ +0x00, 0x00, 0x00, /* */ +0x00, 0x03, 0x00, /* ** */ + +/* Character (0x2f): bbw=4, bbh=8, bbx=0, bby=0, width=4 */ +0x00, 0xc0, 0x30, 0x0c, /* ** ** ** */ +0x03, 0x00, 0x00, 0x00, /* ** ** ** ** */ + +/* Character (0x30): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf8, 0xfc, 0x04, 0xfc, 0xf8, 0x00, /* ***** ****** * ****** ***** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ***** ****** * ****** ***** * ** * ** * */ + +/* Character (0x31): bbw=4, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, /* * * ****** ****** */ +0x00, 0x00, 0x03, 0x03, 0x00, 0x00, /* * * ****** ****** ** ** */ + +/* Character (0x32): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0x8c, 0xc4, 0x7c, 0x38, 0x00, /* * ** * * ** ***** *** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* * ** * * ** ***** *** ** ** * * * */ + +/* Character (0x33): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0x0c, 0x24, 0xfc, 0xd8, 0x00, /* * ** * * ****** ** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * ** * * ****** ** ** * ** * ** * */ + +/* Character (0x34): bbw=6, bbh=8, bbx=0, bby=0, width=6 */ +0xc0, 0xb0, 0x88, 0xfc, 0xfc, 0x80, /* ** ** * * * ****** ****** * */ +0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* ** ** * * * ****** ****** * ** ** */ + +/* Character (0x35): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xbc, 0x3c, 0x24, 0xe4, 0xc4, 0x00, /* **** * **** * * * *** * ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* **** * **** * * * *** * ** * ** * ** * */ + +/* Character (0x36): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf8, 0xfc, 0x24, 0xec, 0xc8, 0x00, /* ***** ****** * * ** *** * ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ***** ****** * * ** *** * ** * ** * ** * */ + +/* Character (0x37): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x04, 0x04, 0xe4, 0xfc, 0x1c, 0x00, /* * * * *** ****** *** */ +0x00, 0x03, 0x03, 0x00, 0x00, 0x00, /* * * * *** ****** *** ** ** */ + +/* Character (0x38): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xd8, 0xfc, 0x24, 0xfc, 0xd8, 0x00, /* ** ** ****** * * ****** ** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ** ** ****** * * ****** ** ** * ** * ** * */ + +/* Character (0x39): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x38, 0x7c, 0x44, 0xfc, 0xf8, 0x00, /* *** ***** * * ****** ***** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** ***** * * ****** ***** * ** * ** * */ + +/* Character (0x3a): bbw=1, bbh=6, bbx=1, bby=0, width=3 */ +0x00, 0x30, 0x00, /* ** */ +0x00, 0x03, 0x00, /* ** ** */ + +/* Character (0x3b): bbw=2, bbh=8, bbx=0, bby=-2, width=3 */ +0x00, 0x30, 0x00, /* ** */ +0x08, 0x07, 0x00, /* ** **** */ + +/* Character (0x3c): bbw=4, bbh=5, bbx=0, bby=1, width=5 */ +0x40, 0xe0, 0xb0, 0x10, 0x00, /* * *** ** * * */ +0x00, 0x00, 0x01, 0x01, 0x00, /* * *** ** * * * * */ + +/* Character (0x3d): bbw=5, bbh=3, bbx=0, bby=2, width=6 */ +0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0x00, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0x3e): bbw=4, bbh=5, bbx=0, bby=1, width=5 */ +0x10, 0xb0, 0xe0, 0x40, 0x00, /* * ** * *** * */ +0x01, 0x01, 0x00, 0x00, 0x00, /* * ** * *** * * * */ + +/* Character (0x3f): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0xcc, 0xe4, 0x3c, 0x18, 0x00, /* * ** ** * *** **** ** */ +0x00, 0x02, 0x02, 0x00, 0x00, 0x00, /* * ** ** * *** **** ** * * */ + +/* Character (0x40): bbw=10, bbh=9, bbx=0, bby=-2, width=11 */ +0xc0, 0x30, 0x90, 0x48, 0x28, 0x28, 0xc8, 0x28, 0x10, 0xe0, 0x00, /* ** ** * * * * * * * * * ** * * * *** */ +0x03, 0x04, 0x09, 0x0a, 0x0a, 0x09, 0x0a, 0x02, 0x01, 0x00, 0x00, /* ** ** * * * * * * * * * ** * * * *** ** * * * * * * ** * * * * * */ + +/* Character (0x41): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfc, 0x8c, 0xfc, 0xf0, 0x80, 0x00, /* * **** ****** ** * ****** **** * */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* * **** ****** ** * ****** **** * ** ** ** ** */ + +/* Character (0x42): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x24, 0x24, 0xfc, 0xd8, 0x00, /* ****** ****** * * * * ****** ** ** */ +0x03, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * * * * ****** ** ** ** ** * * ** * */ + +/* Character (0x43): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x04, 0x0c, 0x98, 0x00, /* **** ***** ** * * ** ** * */ +0x00, 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* **** ***** ** * * ** ** * * ** * * ** * */ + +/* Character (0x44): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x04, 0x0c, 0xf8, 0xf0, 0x00, /* ****** ****** * ** ***** **** */ +0x03, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* ****** ****** * ** ***** **** ** ** * ** * */ + +/* Character (0x45): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x24, 0x24, 0x24, 0x00, /* ****** ****** * * * * * * */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* ****** ****** * * * * * * ** ** * * * */ + +/* Character (0x46): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x24, 0x24, 0x04, 0x00, /* ****** ****** * * * * * */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /* ****** ****** * * * * * ** ** */ + +/* Character (0x47): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x44, 0xcc, 0xd8, 0x00, /* **** ***** ** * * * ** ** ** ** */ +0x00, 0x01, 0x03, 0x02, 0x02, 0x01, 0x03, 0x00, /* **** ***** ** * * * ** ** ** ** * ** * * * ** */ + +/* Character (0x48): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x20, 0x20, 0xfc, 0xfc, 0x00, /* ****** ****** * * ****** ****** */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* ****** ****** * * ****** ****** ** ** ** ** */ + +/* Character (0x49): bbw=2, bbh=8, bbx=0, bby=0, width=3 */ +0xfc, 0xfc, 0x00, /* ****** ****** */ +0x03, 0x03, 0x00, /* ****** ****** ** ** */ + +/* Character (0x4a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, /* ****** ****** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ** * ** * */ + +/* Character (0x4b): bbw=7, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x70, 0xd8, 0x8c, 0x04, 0x00, /* ****** ****** *** ** ** ** * * */ +0x03, 0x03, 0x00, 0x00, 0x01, 0x03, 0x02, /* ****** ****** *** ** ** ** * * ** ** * ** * */ + +/* Character (0x4c): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, /* ****** ****** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* ****** ****** ** ** * * * */ + +/* Character (0x4d): bbw=9, bbh=8, bbx=0, bby=0, width=10 */ +0xfc, 0xfc, 0x38, 0xe0, 0x80, 0xe0, 0x38, 0xfc, 0xfc, 0x00, /* ****** ****** *** *** * *** *** ****** ****** */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* ****** ****** *** *** * *** *** ****** ****** ** ** ** ** ** */ + +/* Character (0x4e): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xfc, 0xfc, 0x18, 0x60, 0x80, 0xfc, 0xfc, 0x00, /* ****** ****** ** ** * ****** ****** */ +0x03, 0x03, 0x00, 0x00, 0x01, 0x03, 0x03, 0x00, /* ****** ****** ** ** * ****** ****** ** ** * ** ** */ + +/* Character (0x4f): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x0c, 0xf8, 0xf0, 0x00, /* **** ***** ** * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ***** ** * ** ***** **** * ** * ** * */ + +/* Character (0x50): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x44, 0x44, 0x7c, 0x38, 0x00, /* ****** ****** * * * * ***** *** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** * * * * ***** *** ** ** */ + +/* Character (0x51): bbw=7, bbh=9, bbx=0, bby=-1, width=8 */ +0xf0, 0xf8, 0x0c, 0x84, 0x0c, 0xf8, 0xf0, 0x00, /* **** ***** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x03, 0x04, 0x00, /* **** ***** ** * * ** ***** **** * ** * ** ** * */ + +/* Character (0x52): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x44, 0x44, 0xfc, 0xb8, 0x00, /* ****** ****** * * * * ****** *** * */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* ****** ****** * * * * ****** *** * ** ** ** ** */ + +/* Character (0x53): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x98, 0x3c, 0x34, 0x64, 0xec, 0xc8, 0x00, /* ** * **** * ** * ** ** *** * ** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ** * **** * ** * ** ** *** * ** * ** * * ** * */ + +/* Character (0x54): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x04, 0x04, 0xfc, 0xfc, 0x04, 0x04, 0x00, /* * * ****** ****** * * */ +0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, /* * * ****** ****** * * ** ** */ + +/* Character (0x55): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x00, 0x00, 0xfc, 0xfc, 0x00, /* ****** ****** ****** ****** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ****** ****** ****** ****** * ** * * ** * */ + +/* Character (0x56): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x0c, 0x7c, 0xf0, 0x80, 0xf0, 0x7c, 0x0c, 0x00, /* ** ***** **** * **** ***** ** */ +0x00, 0x00, 0x01, 0x03, 0x01, 0x00, 0x00, 0x00, /* ** ***** **** * **** ***** ** * ** * */ + +/* Character (0x57): bbw=10, bbh=8, bbx=0, bby=0, width=11 */ +0x1c, 0xfc, 0xe0, 0x80, 0xfc, 0xfc, 0x80, 0xe0, 0xfc, 0x1c, 0x00, /* *** ****** *** * ****** ****** * *** ****** *** */ +0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, /* *** ****** *** * ****** ****** * *** ****** *** ** * * ** */ + +/* Character (0x58): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x0c, 0x9c, 0xf0, 0x60, 0xf0, 0x9c, 0x0c, 0x00, /* ** *** * **** ** **** *** * ** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* ** *** * **** ** **** *** * ** ** ** ** ** */ + +/* Character (0x59): bbw=8, bbh=8, bbx=0, bby=0, width=9 */ +0x0c, 0x3c, 0x70, 0xc0, 0xc0, 0x70, 0x3c, 0x0c, 0x00, /* ** **** *** ** ** *** **** ** */ +0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /* ** **** *** ** ** *** **** ** ** ** */ + +/* Character (0x5a): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x04, 0xc4, 0xe4, 0x74, 0x1c, 0x0c, 0x00, /* * * ** * *** * *** *** ** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x02, 0x00, /* * * ** * *** * *** *** ** ** ** * * * * */ + +/* Character (0x5b): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0xfc, 0xfc, 0x04, 0x00, /* ****** ****** * */ +0x0f, 0x0f, 0x08, 0x00, /* ****** ****** * ******** * */ + +/* Character (0x5c): bbw=4, bbh=8, bbx=0, bby=0, width=4 */ +0x0c, 0x30, 0xc0, 0x00, /* ** ** ** */ +0x00, 0x00, 0x00, 0x03, /* ** ** ** ** */ + +/* Character (0x5d): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0x04, 0xfc, 0xfc, 0x00, /* * ****** ****** */ +0x08, 0x0f, 0x0f, 0x00, /* * ****** ****** ********* */ + +/* Character (0x5e): bbw=5, bbh=4, bbx=0, bby=4, width=5 */ +0x30, 0x18, 0x0c, 0x18, 0x30, /* ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** */ + +/* Character (0x5f): bbw=6, bbh=1, bbx=0, bby=-2, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x08, 0x08, 0x08, 0x08, 0x08, 0x08, /* * * * * * * */ + +/* Character (0x60): bbw=2, bbh=3, bbx=0, bby=5, width=3 */ +0x18, 0x14, 0x00, /* ** * * */ +0x00, 0x00, 0x00, /* ** * * */ + +/* Character (0x61): bbw=6, bbh=6, bbx=0, bby=0, width=6 */ +0xa0, 0xd0, 0x50, 0xf0, 0xe0, 0x00, /* * * * ** * * **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * ** * * **** *** * ** * * ** * */ + +/* Character (0x62): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x10, 0x30, 0xe0, 0x00, /* ****** ****** * ** *** */ +0x03, 0x03, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ** *** ** ** * ** * */ + +/* Character (0x63): bbw=4, bbh=6, bbx=0, bby=0, width=5 */ +0xe0, 0xf0, 0x10, 0x30, 0x00, /* *** **** * ** */ +0x01, 0x03, 0x02, 0x03, 0x00, /* *** **** * ** * ** * ** */ + +/* Character (0x64): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x30, 0x10, 0xfc, 0xfc, 0x00, /* *** ** * ****** ****** */ +0x01, 0x03, 0x02, 0x03, 0x03, 0x00, /* *** ** * ****** ****** * ** * ** ** */ + +/* Character (0x65): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x50, 0x70, 0x60, 0x00, /* *** **** * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * *** ** * ** * ** * */ + +/* Character (0x66): bbw=4, bbh=8, bbx=0, bby=0, width=4 */ +0xf8, 0xfc, 0x14, 0x04, /* ***** ****** * * * */ +0x03, 0x03, 0x00, 0x00, /* ***** ****** * * * ** ** */ + +/* Character (0x67): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xe0, 0x30, 0x10, 0xe0, 0xf0, 0x00, /* *** ** * *** **** */ +0x01, 0x0b, 0x0a, 0x0f, 0x07, 0x00, /* *** ** * *** **** * ** * * ******** */ + +/* Character (0x68): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x10, 0xf0, 0xe0, 0x00, /* ****** ****** * **** *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* ****** ****** * **** *** ** ** ** ** */ + +/* Character (0x69): bbw=2, bbh=8, bbx=0, bby=0, width=3 */ +0xf4, 0xf4, 0x00, /* * **** * **** */ +0x03, 0x03, 0x00, /* * **** * **** ** ** */ + +/* Character (0x6a): bbw=2, bbh=10, bbx=0, bby=-2, width=3 */ +0xf4, 0xf4, 0x00, /* * **** * **** */ +0x0f, 0x07, 0x00, /* * **** * **** ******* */ + +/* Character (0x6b): bbw=6, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0xe0, 0xb0, 0x10, 0x00, /* ****** ****** *** ** * * */ +0x03, 0x03, 0x00, 0x01, 0x03, 0x02, /* ****** ****** *** ** * * ** ** * ** * */ + +/* Character (0x6c): bbw=2, bbh=8, bbx=0, bby=0, width=3 */ +0xfc, 0xfc, 0x00, /* ****** ****** */ +0x03, 0x03, 0x00, /* ****** ****** ** ** */ + +/* Character (0x6d): bbw=8, bbh=6, bbx=0, bby=0, width=9 */ +0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x00, /* **** *** * **** *** * **** *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* **** *** * **** *** * **** *** ** ** ** ** ** ** */ + +/* Character (0x6e): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x00, /* **** *** * **** *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* **** *** * **** *** ** ** ** ** */ + +/* Character (0x6f): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x10, 0xf0, 0xe0, 0x00, /* *** **** * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * **** *** * ** * ** * */ + +/* Character (0x70): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xf0, 0xe0, 0x10, 0x30, 0xe0, 0x00, /* **** *** * ** *** */ +0x0f, 0x0f, 0x02, 0x03, 0x01, 0x00, /* **** *** * ** *** ******** * ** * */ + +/* Character (0x71): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xe0, 0x30, 0x10, 0xe0, 0xf0, 0x00, /* *** ** * *** **** */ +0x01, 0x03, 0x02, 0x0f, 0x0f, 0x00, /* *** ** * *** **** * ** * ******** */ + +/* Character (0x72): bbw=4, bbh=6, bbx=0, bby=0, width=4 */ +0xf0, 0xe0, 0x30, 0x10, /* **** *** ** * */ +0x03, 0x03, 0x00, 0x00, /* **** *** ** * ** ** */ + +/* Character (0x73): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x20, 0x70, 0x50, 0xf0, 0xa0, 0x00, /* * *** * * **** * * */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * *** * * **** * * * ** * ** * */ + +/* Character (0x74): bbw=3, bbh=8, bbx=0, bby=0, width=4 */ +0xfc, 0xfc, 0x10, 0x00, /* ****** ****** * */ +0x01, 0x03, 0x02, 0x00, /* ****** ****** * * ** * */ + +/* Character (0x75): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /* **** **** **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** **** **** **** * ** * * ** */ + +/* Character (0x76): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x70, 0xf0, 0x00, 0xf0, 0x70, 0x00, /* *** **** **** *** */ +0x00, 0x01, 0x03, 0x01, 0x00, 0x00, /* *** **** **** *** * ** * */ + +/* Character (0x77): bbw=7, bbh=6, bbx=0, bby=0, width=8 */ +0x70, 0xf0, 0x80, 0x70, 0x80, 0xf0, 0x70, 0x00, /* *** **** * *** * **** *** */ +0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x00, /* *** **** * *** * **** *** ** ** ** ** */ + +/* Character (0x78): bbw=6, bbh=6, bbx=0, bby=0, width=7 */ +0x10, 0xb0, 0xe0, 0xe0, 0xb0, 0x10, 0x00, /* * ** * *** *** ** * * */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* * ** * *** *** ** * * ** ** ** ** */ + +/* Character (0x79): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /* **** **** **** **** */ +0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /* **** **** **** **** * ******** * */ + +/* Character (0x7a): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x10, 0x90, 0xd0, 0x70, 0x30, 0x00, /* * * * * ** *** ** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* * * * * ** *** ** ** ** * * * */ + +/* Character (0x7b): bbw=4, bbh=10, bbx=0, bby=-2, width=5 */ +0x40, 0xf8, 0xbc, 0x04, 0x00, /* * ***** **** * * */ +0x00, 0x07, 0x0f, 0x08, 0x00, /* * ***** **** * * *** **** * */ + +/* Character (0x7c): bbw=1, bbh=10, bbx=1, bby=-2, width=3 */ +0x00, 0xfc, 0x00, /* ****** */ +0x00, 0x0f, 0x00, /* ****** **** */ + +/* Character (0x7d): bbw=4, bbh=10, bbx=0, bby=-2, width=5 */ +0x04, 0xbc, 0xf8, 0x40, 0x00, /* * **** * ***** * */ +0x08, 0x0f, 0x07, 0x00, 0x00, /* * **** * ***** * ******** */ + +/* Character (0x7e): bbw=6, bbh=2, bbx=0, bby=2, width=6 */ +0x80, 0xc0, 0x40, 0x80, 0xc0, 0x40, /* * ** * * ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * * ** * */ + +/* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=3 */ +0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=2, bbh=8, bbx=1, bby=-2, width=4 */ +0x00, 0x10, 0xd0, 0x00, /* * * ** */ +0x00, 0x0f, 0x0f, 0x00, /* * * ** ******** */ + +/* Character (0xa2): bbw=5, bbh=8, bbx=0, bby=-1, width=6 */ +0xe0, 0x30, 0xd0, 0x38, 0x20, 0x00, /* *** ** * ** *** * */ +0x01, 0x07, 0x02, 0x03, 0x01, 0x00, /* *** ** * ** *** * * *** * ** * */ + +/* Character (0xa3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x20, 0xf8, 0xfc, 0x24, 0x0c, 0x00, /* * ***** ****** * * ** */ +0x02, 0x03, 0x01, 0x02, 0x03, 0x00, /* * ***** ****** * * ** * ** * * ** */ + +/* Character (0xa4): bbw=5, bbh=6, bbx=0, bby=1, width=6 */ +0x68, 0xf8, 0x90, 0xf8, 0x68, 0x00, /* * ** ***** * * ***** * ** */ +0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /* * ** ***** * * ***** * ** * * * * */ + +/* Character (0xa5): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x4c, 0x78, 0xe0, 0xe0, 0x78, 0x4c, 0x00, /* ** * **** *** *** **** ** * */ +0x01, 0x01, 0x03, 0x03, 0x01, 0x01, 0x00, /* ** * **** *** *** **** ** * * * ** ** * * */ + +/* Character (0xa6): bbw=1, bbh=10, bbx=1, bby=-2, width=3 */ +0x00, 0x3c, 0x00, /* **** */ +0x00, 0x0f, 0x00, /* **** **** */ + +/* Character (0xa7): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0xd8, 0xbc, 0x34, 0x64, 0xc8, 0x00, /* ** ** **** * * ** * ** * ** */ +0x04, 0x09, 0x0b, 0x0f, 0x06, 0x00, /* ** ** **** * * ** * ** * ** * * *** ***** ** */ + +/* Character (0xa8): bbw=3, bbh=1, bbx=0, bby=7, width=3 */ +0x04, 0x00, 0x04, /* * * */ +0x00, 0x00, 0x00, /* * * */ + +/* Character (0xa9): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xf0, 0x08, 0x64, 0x94, 0x94, 0xa4, 0x08, 0xf0, 0x00, /* **** * * ** * * * * * * * * * * **** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, /* **** * * ** * * * * * * * * * * **** * * * * * * */ + +/* Character (0xaa): bbw=3, bbh=5, bbx=1, bby=3, width=5 */ +0x00, 0x54, 0x44, 0x5c, 0x00, /* * * * * * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * *** * */ + +/* Character (0xab): bbw=6, bbh=3, bbx=0, bby=1, width=7 */ +0x80, 0xc0, 0x40, 0x80, 0xc0, 0x40, 0x00, /* * ** * * ** * */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /* * ** * * ** * * * * * */ + +/* Character (0xac): bbw=5, bbh=3, bbx=1, bby=2, width=7 */ +0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0x00, /* * * * * *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * *** */ + +/* Character (0xad): bbw=4, bbh=1, bbx=0, bby=3, width=5 */ +0x40, 0x40, 0x40, 0x40, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xae): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xf0, 0x08, 0xf4, 0x54, 0x54, 0xb4, 0x08, 0xf0, 0x00, /* **** * * **** * * * * * * * ** * * **** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, /* **** * * **** * * * * * * * ** * * **** * * * * * * */ + +/* Character (0xaf): bbw=3, bbh=1, bbx=0, bby=7, width=3 */ +0x04, 0x04, 0x04, /* * * * */ +0x00, 0x00, 0x00, /* * * * */ + +/* Character (0xb0): bbw=3, bbh=3, bbx=1, bby=4, width=4 */ +0x00, 0x30, 0x28, 0x18, /* ** * * ** */ +0x00, 0x00, 0x00, 0x00, /* ** * * ** */ + +/* Character (0xb1): bbw=6, bbh=7, bbx=0, bby=0, width=6 */ +0x20, 0x20, 0xf8, 0xf8, 0x20, 0x20, /* * * ***** ***** * * */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, /* * * ***** ***** * * * * * * * * */ + +/* Character (0xb2): bbw=3, bbh=4, bbx=0, bby=3, width=3 */ +0x50, 0x68, 0x58, /* * * * ** ** * */ +0x00, 0x00, 0x00, /* * * * ** ** * */ + +/* Character (0xb3): bbw=3, bbh=4, bbx=0, bby=3, width=3 */ +0x48, 0x58, 0x28, /* * * ** * * * */ +0x00, 0x00, 0x00, /* * * ** * * * */ + +/* Character (0xb4): bbw=2, bbh=2, bbx=0, bby=7, width=3 */ +0x04, 0x02, 0x00, /* * * */ +0x00, 0x00, 0x00, /* * * */ + +/* Character (0xb5): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /* **** **** **** **** */ +0x0f, 0x0f, 0x02, 0x01, 0x03, 0x00, /* **** **** **** **** ******** * * ** */ + +/* Character (0xb6): bbw=6, bbh=10, bbx=0, bby=-2, width=6 */ +0x38, 0x7c, 0xfc, 0x04, 0xfc, 0x04, /* *** ***** ****** * ****** * */ +0x00, 0x00, 0x0f, 0x00, 0x0f, 0x00, /* *** ***** ****** * ****** * **** **** */ + +/* Character (0xb7): bbw=2, bbh=1, bbx=0, bby=3, width=3 */ +0x40, 0x40, 0x00, /* * * */ +0x00, 0x00, 0x00, /* * * */ + +/* Character (0xb8): bbw=2, bbh=2, bbx=0, bby=-2, width=3 */ +0x00, 0x00, 0x00, /* */ +0x08, 0x0c, 0x00, /* * ** */ + +/* Character (0xb9): bbw=2, bbh=4, bbx=0, bby=3, width=3 */ +0x10, 0x78, 0x00, /* * **** */ +0x00, 0x00, 0x00, /* * **** */ + +/* Character (0xba): bbw=3, bbh=5, bbx=1, bby=3, width=5 */ +0x00, 0x5c, 0x54, 0x5c, 0x00, /* *** * * * * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, /* *** * * * * *** * */ + +/* Character (0xbb): bbw=6, bbh=3, bbx=0, bby=1, width=7 */ +0x40, 0xc0, 0x80, 0x40, 0xc0, 0x80, 0x00, /* * ** * * ** * */ +0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00, /* * ** * * ** * * * * * */ + +/* Character (0xbc): bbw=8, bbh=8, bbx=0, bby=0, width=9 */ +0x08, 0x3c, 0x80, 0x40, 0x30, 0x88, 0xc4, 0x00, 0x00, /* * **** * * ** * * * ** */ +0x00, 0x02, 0x01, 0x00, 0x01, 0x01, 0x03, 0x01, 0x00, /* * **** * * ** * * * ** * * * * ** * */ + +/* Character (0xbd): bbw=7, bbh=8, bbx=0, bby=0, width=9 */ +0x08, 0x3c, 0x80, 0x40, 0xb0, 0x48, 0xc4, 0x00, 0x00, /* * **** * * ** * * * * ** */ +0x00, 0x02, 0x01, 0x00, 0x02, 0x03, 0x02, 0x00, 0x00, /* * **** * * ** * * * * ** * * * ** * */ + +/* Character (0xbe): bbw=8, bbh=8, bbx=0, bby=0, width=9 */ +0x24, 0x2c, 0x94, 0x40, 0x30, 0x88, 0xc4, 0x00, 0x00, /* * * ** * * * * * ** * * * ** */ +0x00, 0x02, 0x01, 0x00, 0x01, 0x01, 0x03, 0x01, 0x00, /* * * ** * * * * * ** * * * ** * * * * ** * */ + +/* Character (0xbf): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0x00, 0x00, 0xd0, 0xd0, 0x00, 0x00, /* * ** * ** */ +0x06, 0x0f, 0x09, 0x0c, 0x04, 0x00, /* * ** * ** ** ***** * ** * */ + +/* Character (0xc0): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfc, 0x8d, 0xfc, 0xf0, 0x80, 0x00, /* * **** ******* ** * ****** **** * */ +0x03, 0x03, 0x08, 0x00, 0x00, 0x03, 0x03, 0x00, /* * **** ******* ** * ****** **** * ** ** * ** ** */ + +/* Character (0xc1): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfc, 0x8d, 0xfc, 0xf0, 0x80, 0x00, /* * **** ******* ** * ****** **** * */ +0x03, 0x03, 0x00, 0x00, 0x08, 0x03, 0x03, 0x00, /* * **** ******* ** * ****** **** * ** ** *** ** */ + +/* Character (0xc2): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** ** ** ****** **** * */ +0x03, 0x03, 0x00, 0x08, 0x00, 0x03, 0x03, 0x00, /* * ***** ****** ** ** ****** **** * ** ** * ** ** */ + +/* Character (0xc3): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** ** ** ****** **** * */ +0x03, 0x03, 0x00, 0x08, 0x00, 0x0b, 0x03, 0x00, /* * ***** ****** ** ** ****** **** * ** ** * ** *** */ + +/* Character (0xc4): bbw=7, bbh=10, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** ** ** ****** **** * */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* * ***** ****** ** ** ****** **** * ** ** ** ** */ + +/* Character (0xc5): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8e, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** *** ** ****** **** * */ +0x03, 0x03, 0x00, 0x08, 0x00, 0x03, 0x03, 0x00, /* * ***** ****** *** ** ****** **** * ** ** * ** ** */ + +/* Character (0xc6): bbw=9, bbh=8, bbx=0, bby=0, width=10 */ +0x80, 0xf0, 0xfc, 0x8c, 0xfc, 0xfc, 0x24, 0x24, 0x24, 0x00, /* * **** ****** ** * ****** ****** * * * * * * */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* * **** ****** ** * ****** ****** * * * * * * ** ** ** ** * * * */ + +/* Character (0xc7): bbw=7, bbh=10, bbx=0, bby=-2, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x04, 0x0c, 0x98, 0x00, /* **** ***** ** * * ** ** * */ +0x00, 0x01, 0x0b, 0x0e, 0x02, 0x03, 0x01, 0x00, /* **** ***** ** * * ** ** * * ** * *** * ** * */ + +/* Character (0xc8): bbw=5, bbh=11, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x25, 0x24, 0x24, 0x00, /* ****** ******* * * * * * * */ +0x03, 0x0b, 0x02, 0x02, 0x02, 0x00, /* ****** ******* * * * * * * ** ** * * * * */ + +/* Character (0xc9): bbw=5, bbh=11, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x25, 0x24, 0x24, 0x00, /* ****** ******* * * * * * * */ +0x03, 0x03, 0x02, 0x0a, 0x02, 0x00, /* ****** ******* * * * * * * ** ** * * * * */ + +/* Character (0xca): bbw=5, bbh=11, bbx=0, bby=0, width=6 */ +0xfc, 0xfd, 0x24, 0x25, 0x24, 0x00, /* ******* ****** * * * * * * * */ +0x03, 0x03, 0x0a, 0x02, 0x02, 0x00, /* ******* ****** * * * * * * * ** ** * * * * */ + +/* Character (0xcb): bbw=5, bbh=10, bbx=0, bby=0, width=6 */ +0xfc, 0xfd, 0x24, 0x25, 0x24, 0x00, /* ******* ****** * * * * * * * */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* ******* ****** * * * * * * * ** ** * * * */ + +/* Character (0xcc): bbw=2, bbh=11, bbx=0, bby=0, width=3 */ +0xfc, 0xfd, 0x00, /* ******* ****** */ +0x0b, 0x03, 0x00, /* ******* ****** ** *** */ + +/* Character (0xcd): bbw=2, bbh=11, bbx=0, bby=0, width=3 */ +0xfd, 0xfc, 0x00, /* * ****** ****** */ +0x03, 0x0b, 0x00, /* * ****** ****** ** ** * */ + +/* Character (0xce): bbw=3, bbh=11, bbx=0, bby=0, width=3 */ +0xfd, 0xfc, 0x01, /* * ****** ******* */ +0x03, 0x0b, 0x00, /* * ****** ******* ** ** * */ + +/* Character (0xcf): bbw=3, bbh=10, bbx=0, bby=0, width=3 */ +0xfd, 0xfc, 0x01, /* * ****** ******* */ +0x03, 0x03, 0x00, /* * ****** ******* ** ** */ + +/* Character (0xd0): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x24, 0x0c, 0xf8, 0xf0, 0x00, /* ****** ****** * * ** ***** **** */ +0x03, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* ****** ****** * * ** ***** **** ** ** * ** * */ + +/* Character (0xd1): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xfc, 0xfc, 0x11, 0x60, 0x81, 0xfc, 0xfc, 0x00, /* ****** ******* * ** * * ****** ****** */ +0x03, 0x03, 0x00, 0x08, 0x01, 0x0b, 0x03, 0x00, /* ****** ******* * ** * * ****** ****** ** ** ** ** *** */ + +/* Character (0xd2): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x05, 0x0c, 0xf8, 0xf0, 0x00, /* **** ***** ** * * ** ***** **** */ +0x00, 0x01, 0x0b, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ***** ** * * ** ***** **** * ** * * ** * */ + +/* Character (0xd3): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ***** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x09, 0x00, 0x00, /* **** ***** ** * * ** ***** **** * ** * ** * * */ + +/* Character (0xd4): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ****** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x0a, 0x03, 0x01, 0x00, 0x00, /* **** ****** ** * * ** ***** **** * ** * *** * */ + +/* Character (0xd5): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ****** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x0a, 0x03, 0x09, 0x00, 0x00, /* **** ****** ** * * ** ***** **** * ** * *** * * */ + +/* Character (0xd6): bbw=7, bbh=10, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ****** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ****** ** * * ** ***** **** * ** * ** * */ + +/* Character (0xd7): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x10, 0xb0, 0xe0, 0xe0, 0xb0, 0x10, /* * ** * *** *** ** * * */ +0x01, 0x01, 0x00, 0x00, 0x01, 0x01, /* * ** * *** *** ** * * * * * * */ + +/* Character (0xd8): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x8c, 0x64, 0x1c, 0xf8, 0xf4, 0x00, /* **** ***** ** * * ** *** ***** * **** */ +0x02, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ***** ** * * ** *** ***** * **** * * ** * ** * */ + +/* Character (0xd9): bbw=6, bbh=11, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x00, 0x01, 0xfc, 0xfc, 0x00, /* ****** ****** * ****** ****** */ +0x01, 0x03, 0x0a, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ****** ****** * ** * * * ** * */ + +/* Character (0xda): bbw=6, bbh=11, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x00, 0x01, 0xfc, 0xfc, 0x00, /* ****** ****** * ****** ****** */ +0x01, 0x03, 0x02, 0x02, 0x0b, 0x01, 0x00, /* ****** ****** * ****** ****** * ** * * ** ** */ + +/* Character (0xdb): bbw=6, bbh=11, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x01, 0x00, 0xfd, 0xfc, 0x00, /* ****** ******* * ****** ****** */ +0x01, 0x03, 0x02, 0x0a, 0x03, 0x01, 0x00, /* ****** ******* * ****** ****** * ** * * *** * */ + +/* Character (0xdc): bbw=6, bbh=10, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x01, 0x00, 0xfd, 0xfc, 0x00, /* ****** ******* * ****** ****** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ****** ******* * ****** ****** * ** * * ** * */ + +/* Character (0xdd): bbw=8, bbh=11, bbx=0, bby=0, width=9 */ +0x0c, 0x3c, 0x70, 0xc0, 0xc1, 0x70, 0x3c, 0x0c, 0x00, /* ** **** *** *** ** *** **** ** */ +0x00, 0x00, 0x00, 0x03, 0x03, 0x08, 0x00, 0x00, 0x00, /* ** **** *** *** ** *** **** ** ** ** * */ + +/* Character (0xde): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x88, 0x88, 0xf8, 0x70, 0x00, /* ****** ****** * * * * ***** *** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** * * * * ***** *** ** ** */ + +/* Character (0xdf): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf8, 0xfc, 0x04, 0x24, 0xd8, 0x00, /* ***** ****** * * * ** ** */ +0x03, 0x03, 0x00, 0x02, 0x01, 0x00, /* ***** ****** * * * ** ** ** ** * * */ + +/* Character (0xe0): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd2, 0x54, 0xf0, 0xe0, 0x00, /* * * * * ** * * * **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** * * * **** *** * ** * * ** * */ + +/* Character (0xe1): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd0, 0x50, 0xf4, 0xe2, 0x00, /* * * * ** * * * **** * *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * ** * * * **** * *** * ** * * ** * */ + +/* Character (0xe2): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd4, 0x56, 0xf2, 0xe4, 0x00, /* * * * * ** ** * * * **** * *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** ** * * * **** * *** * ** * * ** * */ + +/* Character (0xe3): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd4, 0x52, 0xf4, 0xe2, 0x00, /* * * * * ** * * * * **** * *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** * * * * **** * *** * ** * * ** * */ + +/* Character (0xe4): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd6, 0x50, 0xf6, 0xe0, 0x00, /* * * ** * ** * * ** **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * ** * ** * * ** **** *** * ** * * ** * */ + +/* Character (0xe5): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd4, 0x5a, 0xf4, 0xe0, 0x00, /* * * * * ** * ** * * **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** * ** * * **** *** * ** * * ** * */ + +/* Character (0xe6): bbw=8, bbh=6, bbx=0, bby=0, width=9 */ +0xa0, 0xd0, 0x50, 0xf0, 0xf0, 0x50, 0x70, 0x60, 0x00, /* * * * ** * * **** **** * * *** ** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * * * ** * * **** **** * * *** ** * ** * * ** * ** * */ + +/* Character (0xe7): bbw=4, bbh=8, bbx=0, bby=-2, width=5 */ +0xe0, 0xf0, 0x10, 0x30, 0x00, /* *** **** * ** */ +0x01, 0x0b, 0x0e, 0x03, 0x00, /* *** **** * ** * ** * ***** */ + +/* Character (0xe8): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf2, 0x54, 0x70, 0x60, 0x00, /* *** * **** * * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * * *** ** * ** * ** * */ + +/* Character (0xe9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x54, 0x72, 0x60, 0x00, /* *** **** * * * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * * * *** ** * ** * ** * */ + +/* Character (0xea): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf4, 0x52, 0x74, 0x60, 0x00, /* *** * **** * * * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * * * *** ** * ** * ** * */ + +/* Character (0xeb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf6, 0x50, 0x76, 0x60, 0x00, /* *** ** **** * * ** *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** ** **** * * ** *** ** * ** * ** * */ + +/* Character (0xec): bbw=2, bbh=9, bbx=0, bby=0, width=3 */ +0xf2, 0xf4, 0x00, /* * **** * **** */ +0x03, 0x03, 0x00, /* * **** * **** ** ** */ + +/* Character (0xed): bbw=3, bbh=9, bbx=0, bby=0, width=3 */ +0xf0, 0xf4, 0x02, /* **** * **** * */ +0x03, 0x03, 0x00, /* **** * **** * ** ** */ + +/* Character (0xee): bbw=3, bbh=9, bbx=0, bby=0, width=4 */ +0x04, 0xf2, 0xf4, 0x00, /* * * **** * **** */ +0x00, 0x03, 0x03, 0x00, /* * * **** * **** ** ** */ + +/* Character (0xef): bbw=3, bbh=9, bbx=0, bby=0, width=3 */ +0xf6, 0xf0, 0x06, /* ** **** **** ** */ +0x03, 0x03, 0x00, /* ** **** **** ** ** ** */ + +/* Character (0xf0): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe8, 0xf6, 0x1c, 0xf2, 0xe0, 0x00, /* * *** ** **** *** * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * *** ** **** *** * **** *** * ** * ** * */ + +/* Character (0xf1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xe4, 0x12, 0xf4, 0xe2, 0x00, /* **** * *** * * * **** * *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* **** * *** * * * **** * *** ** ** ** ** */ + +/* Character (0xf2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf2, 0x14, 0xf0, 0xe0, 0x00, /* *** * **** * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * **** *** * ** * ** * */ + +/* Character (0xf3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x14, 0xf2, 0xe0, 0x00, /* *** **** * * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * * **** *** * ** * ** * */ + +/* Character (0xf4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf4, 0x12, 0xf4, 0xe0, 0x00, /* *** * **** * * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * * **** *** * ** * ** * */ + +/* Character (0xf5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe4, 0xf2, 0x14, 0xf2, 0xe0, 0x00, /* * *** * **** * * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * *** * **** * * * **** *** * ** * ** * */ + +/* Character (0xf6): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf6, 0x10, 0xf6, 0xe0, 0x00, /* *** ** **** * ** **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** ** **** * ** **** *** * ** * ** * */ + +/* Character (0xf7): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x40, 0x40, 0x50, 0x50, 0x40, 0x40, /* * * * * * * * * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xf8): bbw=6, bbh=6, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x50, 0xf0, 0xe0, 0x10, /* *** **** * * **** *** * */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * **** *** * * ** * ** * */ + +/* Character (0xf9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf2, 0x04, 0xf0, 0xf0, 0x00, /* **** * **** * **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** * **** * **** **** * ** * * ** */ + +/* Character (0xfa): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf0, 0x04, 0xf2, 0xf0, 0x00, /* **** **** * * **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** **** * * **** **** * ** * * ** */ + +/* Character (0xfb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf4, 0x02, 0xf4, 0xf0, 0x00, /* **** * **** * * **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** * **** * * **** **** * ** * * ** */ + +/* Character (0xfc): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf6, 0x00, 0xf6, 0xf0, 0x00, /* **** ** **** ** **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** ** **** ** **** **** * ** * * ** */ + +/* Character (0xfd): bbw=5, bbh=11, bbx=0, bby=-2, width=6 */ +0xf0, 0xf0, 0x04, 0xf2, 0xf0, 0x00, /* **** **** * * **** **** */ +0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /* **** **** * * **** **** * ******** * */ + +/* Character (0xfe): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0xfc, 0xfc, 0x10, 0x30, 0xe0, 0x00, /* ****** ****** * ** *** */ +0x0f, 0x0f, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ** *** ******** * ** * */ + +/* Character (0xff): bbw=5, bbh=11, bbx=0, bby=-2, width=6 */ +0xf0, 0xf6, 0x00, 0xf6, 0xf0, 0x00, /* **** ** **** ** **** **** */ +0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /* **** ** **** ** **** **** * ******** * */ +}; + +/* Character->glyph data. */ +static const PROGMEM uint16_t helvB10_offset[] = { + 0, /* (0x20) */ + 6, /* (0x21) */ + 14, /* (0x22) */ + 24, /* (0x23) */ + 36, /* (0x24) */ + 48, /* (0x25) */ + 64, /* (0x26) */ + 80, /* (0x27) */ + 86, /* (0x28) */ + 94, /* (0x29) */ + 102, /* (0x2a) */ + 110, /* (0x2b) */ + 122, /* (0x2c) */ + 128, /* (0x2d) */ + 142, /* (0x2e) */ + 148, /* (0x2f) */ + 156, /* (0x30) */ + 168, /* (0x31) */ + 180, /* (0x32) */ + 192, /* (0x33) */ + 204, /* (0x34) */ + 216, /* (0x35) */ + 228, /* (0x36) */ + 240, /* (0x37) */ + 252, /* (0x38) */ + 264, /* (0x39) */ + 276, /* (0x3a) */ + 282, /* (0x3b) */ + 288, /* (0x3c) */ + 298, /* (0x3d) */ + 310, /* (0x3e) */ + 320, /* (0x3f) */ + 332, /* (0x40) */ + 354, /* (0x41) */ + 370, /* (0x42) */ + 384, /* (0x43) */ + 400, /* (0x44) */ + 414, /* (0x45) */ + 426, /* (0x46) */ + 438, /* (0x47) */ + 454, /* (0x48) */ + 468, /* (0x49) */ + 474, /* (0x4a) */ + 486, /* (0x4b) */ + 500, /* (0x4c) */ + 512, /* (0x4d) */ + 532, /* (0x4e) */ + 548, /* (0x4f) */ + 564, /* (0x50) */ + 578, /* (0x51) */ + 594, /* (0x52) */ + 608, /* (0x53) */ + 622, /* (0x54) */ + 636, /* (0x55) */ + 650, /* (0x56) */ + 666, /* (0x57) */ + 688, /* (0x58) */ + 704, /* (0x59) */ + 722, /* (0x5a) */ + 736, /* (0x5b) */ + 744, /* (0x5c) */ + 752, /* (0x5d) */ + 760, /* (0x5e) */ + 770, /* (0x5f) */ + 782, /* (0x60) */ + 788, /* (0x61) */ + 800, /* (0x62) */ + 812, /* (0x63) */ + 822, /* (0x64) */ + 834, /* (0x65) */ + 846, /* (0x66) */ + 854, /* (0x67) */ + 866, /* (0x68) */ + 878, /* (0x69) */ + 884, /* (0x6a) */ + 890, /* (0x6b) */ + 902, /* (0x6c) */ + 908, /* (0x6d) */ + 926, /* (0x6e) */ + 938, /* (0x6f) */ + 950, /* (0x70) */ + 962, /* (0x71) */ + 974, /* (0x72) */ + 982, /* (0x73) */ + 994, /* (0x74) */ + 1002, /* (0x75) */ + 1014, /* (0x76) */ + 1026, /* (0x77) */ + 1042, /* (0x78) */ + 1056, /* (0x79) */ + 1068, /* (0x7a) */ + 1080, /* (0x7b) */ + 1090, /* (0x7c) */ + 1096, /* (0x7d) */ + 1106, /* (0x7e) */ + 0, /* (0x7f) */ + 0, /* (0x80) */ + 0, /* (0x81) */ + 0, /* (0x82) */ + 0, /* (0x83) */ + 0, /* (0x84) */ + 0, /* (0x85) */ + 0, /* (0x86) */ + 0, /* (0x87) */ + 0, /* (0x88) */ + 0, /* (0x89) */ + 0, /* (0x8a) */ + 0, /* (0x8b) */ + 0, /* (0x8c) */ + 0, /* (0x8d) */ + 0, /* (0x8e) */ + 0, /* (0x8f) */ + 0, /* (0x90) */ + 0, /* (0x91) */ + 0, /* (0x92) */ + 0, /* (0x93) */ + 0, /* (0x94) */ + 0, /* (0x95) */ + 0, /* (0x96) */ + 0, /* (0x97) */ + 0, /* (0x98) */ + 0, /* (0x99) */ + 0, /* (0x9a) */ + 0, /* (0x9b) */ + 0, /* (0x9c) */ + 0, /* (0x9d) */ + 0, /* (0x9e) */ + 0, /* (0x9f) */ + 1118, /* (0xa0) */ + 1124, /* (0xa1) */ + 1132, /* (0xa2) */ + 1144, /* (0xa3) */ + 1156, /* (0xa4) */ + 1168, /* (0xa5) */ + 1182, /* (0xa6) */ + 1188, /* (0xa7) */ + 1200, /* (0xa8) */ + 1206, /* (0xa9) */ + 1226, /* (0xaa) */ + 1236, /* (0xab) */ + 1250, /* (0xac) */ + 1264, /* (0xad) */ + 1274, /* (0xae) */ + 1294, /* (0xaf) */ + 1300, /* (0xb0) */ + 1308, /* (0xb1) */ + 1320, /* (0xb2) */ + 1326, /* (0xb3) */ + 1332, /* (0xb4) */ + 1338, /* (0xb5) */ + 1350, /* (0xb6) */ + 1362, /* (0xb7) */ + 1368, /* (0xb8) */ + 1374, /* (0xb9) */ + 1380, /* (0xba) */ + 1390, /* (0xbb) */ + 1404, /* (0xbc) */ + 1422, /* (0xbd) */ + 1440, /* (0xbe) */ + 1458, /* (0xbf) */ + 1470, /* (0xc0) */ + 1486, /* (0xc1) */ + 1502, /* (0xc2) */ + 1518, /* (0xc3) */ + 1534, /* (0xc4) */ + 1550, /* (0xc5) */ + 1566, /* (0xc6) */ + 1586, /* (0xc7) */ + 1602, /* (0xc8) */ + 1614, /* (0xc9) */ + 1626, /* (0xca) */ + 1638, /* (0xcb) */ + 1650, /* (0xcc) */ + 1656, /* (0xcd) */ + 1662, /* (0xce) */ + 1668, /* (0xcf) */ + 1674, /* (0xd0) */ + 1688, /* (0xd1) */ + 1704, /* (0xd2) */ + 1720, /* (0xd3) */ + 1736, /* (0xd4) */ + 1752, /* (0xd5) */ + 1768, /* (0xd6) */ + 1784, /* (0xd7) */ + 1796, /* (0xd8) */ + 1812, /* (0xd9) */ + 1826, /* (0xda) */ + 1840, /* (0xdb) */ + 1854, /* (0xdc) */ + 1868, /* (0xdd) */ + 1886, /* (0xde) */ + 1900, /* (0xdf) */ + 1912, /* (0xe0) */ + 1924, /* (0xe1) */ + 1936, /* (0xe2) */ + 1948, /* (0xe3) */ + 1960, /* (0xe4) */ + 1972, /* (0xe5) */ + 1984, /* (0xe6) */ + 2002, /* (0xe7) */ + 2012, /* (0xe8) */ + 2024, /* (0xe9) */ + 2036, /* (0xea) */ + 2048, /* (0xeb) */ + 2060, /* (0xec) */ + 2066, /* (0xed) */ + 2072, /* (0xee) */ + 2080, /* (0xef) */ + 2086, /* (0xf0) */ + 2098, /* (0xf1) */ + 2110, /* (0xf2) */ + 2122, /* (0xf3) */ + 2134, /* (0xf4) */ + 2146, /* (0xf5) */ + 2158, /* (0xf6) */ + 2170, /* (0xf7) */ + 2182, /* (0xf8) */ + 2194, /* (0xf9) */ + 2206, /* (0xfa) */ + 2218, /* (0xfb) */ + 2230, /* (0xfc) */ + 2242, /* (0xfd) */ + 2254, /* (0xfe) */ + 2266, /* (0xff) */ +}; + +/* Character width data. */ +static const PROGMEM uint8_t helvB10_width[] = { + 3, /* (0x20) */ + 4, /* (0x21) */ + 5, /* (0x22) */ + 6, /* (0x23) */ + 6, /* (0x24) */ + 8, /* (0x25) */ + 8, /* (0x26) */ + 3, /* (0x27) */ + 4, /* (0x28) */ + 4, /* (0x29) */ + 4, /* (0x2a) */ + 6, /* (0x2b) */ + 3, /* (0x2c) */ + 7, /* (0x2d) */ + 3, /* (0x2e) */ + 4, /* (0x2f) */ + 6, /* (0x30) */ + 6, /* (0x31) */ + 6, /* (0x32) */ + 6, /* (0x33) */ + 6, /* (0x34) */ + 6, /* (0x35) */ + 6, /* (0x36) */ + 6, /* (0x37) */ + 6, /* (0x38) */ + 6, /* (0x39) */ + 3, /* (0x3a) */ + 3, /* (0x3b) */ + 5, /* (0x3c) */ + 6, /* (0x3d) */ + 5, /* (0x3e) */ + 6, /* (0x3f) */ + 11, /* (0x40) */ + 8, /* (0x41) */ + 7, /* (0x42) */ + 8, /* (0x43) */ + 7, /* (0x44) */ + 6, /* (0x45) */ + 6, /* (0x46) */ + 8, /* (0x47) */ + 7, /* (0x48) */ + 3, /* (0x49) */ + 6, /* (0x4a) */ + 7, /* (0x4b) */ + 6, /* (0x4c) */ + 10, /* (0x4d) */ + 8, /* (0x4e) */ + 8, /* (0x4f) */ + 7, /* (0x50) */ + 8, /* (0x51) */ + 7, /* (0x52) */ + 7, /* (0x53) */ + 7, /* (0x54) */ + 7, /* (0x55) */ + 8, /* (0x56) */ + 11, /* (0x57) */ + 8, /* (0x58) */ + 9, /* (0x59) */ + 7, /* (0x5a) */ + 4, /* (0x5b) */ + 4, /* (0x5c) */ + 4, /* (0x5d) */ + 5, /* (0x5e) */ + 6, /* (0x5f) */ + 3, /* (0x60) */ + 6, /* (0x61) */ + 6, /* (0x62) */ + 5, /* (0x63) */ + 6, /* (0x64) */ + 6, /* (0x65) */ + 4, /* (0x66) */ + 6, /* (0x67) */ + 6, /* (0x68) */ + 3, /* (0x69) */ + 3, /* (0x6a) */ + 6, /* (0x6b) */ + 3, /* (0x6c) */ + 9, /* (0x6d) */ + 6, /* (0x6e) */ + 6, /* (0x6f) */ + 6, /* (0x70) */ + 6, /* (0x71) */ + 4, /* (0x72) */ + 6, /* (0x73) */ + 4, /* (0x74) */ + 6, /* (0x75) */ + 6, /* (0x76) */ + 8, /* (0x77) */ + 7, /* (0x78) */ + 6, /* (0x79) */ + 6, /* (0x7a) */ + 5, /* (0x7b) */ + 3, /* (0x7c) */ + 5, /* (0x7d) */ + 6, /* (0x7e) */ + 3, /* (0x7f) */ + 3, /* (0x80) */ + 3, /* (0x81) */ + 3, /* (0x82) */ + 3, /* (0x83) */ + 3, /* (0x84) */ + 3, /* (0x85) */ + 3, /* (0x86) */ + 3, /* (0x87) */ + 3, /* (0x88) */ + 3, /* (0x89) */ + 3, /* (0x8a) */ + 3, /* (0x8b) */ + 3, /* (0x8c) */ + 3, /* (0x8d) */ + 3, /* (0x8e) */ + 3, /* (0x8f) */ + 3, /* (0x90) */ + 3, /* (0x91) */ + 3, /* (0x92) */ + 3, /* (0x93) */ + 3, /* (0x94) */ + 3, /* (0x95) */ + 3, /* (0x96) */ + 3, /* (0x97) */ + 3, /* (0x98) */ + 3, /* (0x99) */ + 3, /* (0x9a) */ + 3, /* (0x9b) */ + 3, /* (0x9c) */ + 3, /* (0x9d) */ + 3, /* (0x9e) */ + 3, /* (0x9f) */ + 3, /* (0xa0) */ + 4, /* (0xa1) */ + 6, /* (0xa2) */ + 6, /* (0xa3) */ + 6, /* (0xa4) */ + 7, /* (0xa5) */ + 3, /* (0xa6) */ + 6, /* (0xa7) */ + 3, /* (0xa8) */ + 10, /* (0xa9) */ + 5, /* (0xaa) */ + 7, /* (0xab) */ + 7, /* (0xac) */ + 5, /* (0xad) */ + 10, /* (0xae) */ + 3, /* (0xaf) */ + 4, /* (0xb0) */ + 6, /* (0xb1) */ + 3, /* (0xb2) */ + 3, /* (0xb3) */ + 3, /* (0xb4) */ + 6, /* (0xb5) */ + 6, /* (0xb6) */ + 3, /* (0xb7) */ + 3, /* (0xb8) */ + 3, /* (0xb9) */ + 5, /* (0xba) */ + 7, /* (0xbb) */ + 9, /* (0xbc) */ + 9, /* (0xbd) */ + 9, /* (0xbe) */ + 6, /* (0xbf) */ + 8, /* (0xc0) */ + 8, /* (0xc1) */ + 8, /* (0xc2) */ + 8, /* (0xc3) */ + 8, /* (0xc4) */ + 8, /* (0xc5) */ + 10, /* (0xc6) */ + 8, /* (0xc7) */ + 6, /* (0xc8) */ + 6, /* (0xc9) */ + 6, /* (0xca) */ + 6, /* (0xcb) */ + 3, /* (0xcc) */ + 3, /* (0xcd) */ + 3, /* (0xce) */ + 3, /* (0xcf) */ + 7, /* (0xd0) */ + 8, /* (0xd1) */ + 8, /* (0xd2) */ + 8, /* (0xd3) */ + 8, /* (0xd4) */ + 8, /* (0xd5) */ + 8, /* (0xd6) */ + 6, /* (0xd7) */ + 8, /* (0xd8) */ + 7, /* (0xd9) */ + 7, /* (0xda) */ + 7, /* (0xdb) */ + 7, /* (0xdc) */ + 9, /* (0xdd) */ + 7, /* (0xde) */ + 6, /* (0xdf) */ + 6, /* (0xe0) */ + 6, /* (0xe1) */ + 6, /* (0xe2) */ + 6, /* (0xe3) */ + 6, /* (0xe4) */ + 6, /* (0xe5) */ + 9, /* (0xe6) */ + 5, /* (0xe7) */ + 6, /* (0xe8) */ + 6, /* (0xe9) */ + 6, /* (0xea) */ + 6, /* (0xeb) */ + 3, /* (0xec) */ + 3, /* (0xed) */ + 4, /* (0xee) */ + 3, /* (0xef) */ + 6, /* (0xf0) */ + 6, /* (0xf1) */ + 6, /* (0xf2) */ + 6, /* (0xf3) */ + 6, /* (0xf4) */ + 6, /* (0xf5) */ + 6, /* (0xf6) */ + 6, /* (0xf7) */ + 6, /* (0xf8) */ + 6, /* (0xf9) */ + 6, /* (0xfa) */ + 6, /* (0xfb) */ + 6, /* (0xfc) */ + 6, /* (0xfd) */ + 6, /* (0xfe) */ + 6, /* (0xff) */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_helvB10 = +{ + /* .glyph = */ font_helvB10_glyphs, + /* .name = "helvB10", */ + /* .width = */ 11, + /* .height = */ 12, + /* .ascent = 10, */ + /* .first = */ 32, + /* .last = */ 255, + /* .offset = */ helvB10_offset, + /* .width = */ helvB10_width, +}; diff --git a/2.5/bertos/fonts/luBS14.bdf b/2.5/bertos/fonts/luBS14.bdf new file mode 100644 index 00000000..90c37be9 --- /dev/null +++ b/2.5/bertos/fonts/luBS14.bdf @@ -0,0 +1,13542 @@ +STARTFONT 2.1 +COMMENT $Xorg: $ +COMMENT ISO10646-1 extension by Markus Kuhn , 2001-03-20 +COMMENT (c) Copyright Bigelow & Holmes 1986, 1985. Lucida is a registered +COMMENT trademark of Bigelow & Holmes. See LEGAL NOTICE file for terms +COMMENT of the license. +COMMENT GRID 0014 0014 0200 0200 +FONT -B&H-Lucida-Bold-R-Normal-Sans-14-140-75-75-P-92-ISO10646-1 +SIZE 14 72 72 +FONTBOUNDINGBOX 18 21 -1 -5 +STARTPROPERTIES 22 +COMMENT Begin LogicalFontDescription +FONTNAME_REGISTRY "" +FOUNDRY "B&H" +FAMILY_NAME "Lucida" +WEIGHT_NAME "Bold" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "Sans" +PIXEL_SIZE 14 +POINT_SIZE 140 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "P" +AVERAGE_WIDTH 92 +CHARSET_REGISTRY "ISO10646" +CHARSET_ENCODING "1" +COMMENT END LogicalFontDescription +FONT_ASCENT 13 +FONT_DESCENT 2 +DEFAULT_CHAR 0 +COPYRIGHT "Copyright Bigelow & Holmes 1986, 1985." +FACE_NAME "Lucida Sans Bold" +X_HEIGHT 8 +CAP_HEIGHT 10 +ENDPROPERTIES +CHARS 756 +STARTCHAR char0 +ENCODING 0 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 7 9 2 0 +BITMAP +AA +00 +82 +00 +82 +00 +82 +00 +AA +ENDCHAR +STARTCHAR space +ENCODING 32 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclam 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+0C +FE +18 +FE +30 +FE +60 +60 +C0 +ENDCHAR +STARTCHAR lessequal +ENCODING 8804 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 9 2 -1 +BITMAP +0C +38 +60 +C0 +60 +38 +0C +00 +FC +ENDCHAR +STARTCHAR greaterequal +ENCODING 8805 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 9 2 -1 +BITMAP +C0 +70 +18 +0C +18 +70 +C0 +00 +FC +ENDCHAR +STARTCHAR uni226E +ENCODING 8814 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -1 +BITMAP +03 +06 +06 +0E +1C +38 +78 +30 +3C +66 +60 +C0 +ENDCHAR +STARTCHAR uni226F +ENCODING 8815 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -1 +BITMAP +03 +06 +06 +6C +3C +1C +1E +3C +38 +60 +60 +C0 +ENDCHAR +STARTCHAR uni2270 +ENCODING 8816 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +03 +06 +06 +1C +3C +78 +38 +3C +36 +60 +7E +C0 +ENDCHAR +STARTCHAR uni2271 +ENCODING 8817 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +03 +06 +66 +3C +0C +1E +1C +38 +70 +60 +7E +C0 +ENDCHAR +STARTCHAR fi +ENCODING -1 +SWIDTH 711 0 +DWIDTH 11 0 +BBX 9 11 0 0 +BITMAP +1D80 +3180 +3000 +FF80 +3180 +3180 +3180 +3180 +3180 +3180 +3180 +ENDCHAR +STARTCHAR fl +ENCODING -1 +SWIDTH 711 0 +DWIDTH 10 0 +BBX 9 11 0 0 +BITMAP +1F80 +3180 +3180 +FD80 +3180 +3180 +3180 +3180 +3180 +3180 +3180 +ENDCHAR +ENDFONT diff --git a/2.5/bertos/fonts/luBS14.c b/2.5/bertos/fonts/luBS14.c new file mode 100644 index 00000000..ee717dec --- /dev/null +++ b/2.5/bertos/fonts/luBS14.c @@ -0,0 +1,1316 @@ +/* Generated by convbdf on Thu Apr 8 16:34:22 CEST 2010. */ +#include + +/* Font information: + + name: -B&H-Lucida-Bold-R-Normal-Sans-14-140-75-75-P-92-ISO10646-1 + pixel size: 14 + ascent: 13 + descent: 2 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_luBS14_glyphs[] = { + +/* Character (0x00): bbw=7, bbh=9, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0x50, 0x00, 0x10, 0x00, 0x10, 0x00, 0x50, 0x00, 0x00, 0x00, /* * * * * * * */ +0x00, 0x00, 0x15, 0x00, 0x10, 0x00, 0x10, 0x00, 0x15, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * */ + +/* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=2, bbh=10, bbx=1, bby=0, width=4 */ +0x00, 0xf8, 0xf8, 0x00, /* ***** ***** */ +0x00, 0x1b, 0x18, 0x00, /* ***** ***** ** ** ** */ + +/* Character (0x22): bbw=5, bbh=4, bbx=1, bby=7, width=7 */ +0x00, 0x3c, 0x0c, 0x00, 0x3c, 0x0c, 0x00, /* **** ** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ** **** ** */ + +/* Character (0x23): bbw=9, bbh=10, bbx=0, bby=0, width=10 */ +0x00, 0x40, 0xc0, 0xf8, 0x78, 0xc0, 0xf8, 0x78, 0x40, 0x00, /* * ** ***** **** ** ***** **** * */ +0x02, 0x1e, 0x1f, 0x03, 0x1e, 0x1f, 0x03, 0x02, 0x02, 0x00, /* * ** ***** **** ** ***** **** * * **** ***** ** **** ***** ** * * */ + +/* Character (0x24): bbw=7, bbh=12, bbx=1, bby=-1, width=10 */ +0x00, 0x70, 0xf8, 0xc8, 0xfc, 0x08, 0x18, 0x10, 0x00, 0x00, /* *** ***** * ** ****** * ** * */ +0x00, 0x08, 0x18, 0x10, 0x3f, 0x13, 0x1f, 0x0e, 0x00, 0x00, /* *** ***** * ** ****** * ** * * ** * ****** ** * ***** *** */ + +/* Character (0x25): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0x30, 0x78, 0x48, 0x78, 0x30, 0x80, 0x60, 0x30, 0x10, 0x00, 0x00, /* ** **** * * **** ** * ** ** * */ +0x00, 0x00, 0x08, 0x0c, 0x06, 0x01, 0x0c, 0x1e, 0x12, 0x1e, 0x0c, 0x00, /* ** **** * * **** ** * ** ** * * ** ** * ** **** * * **** ** */ + +/* Character (0x26): bbw=9, bbh=10, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x70, 0xf8, 0x88, 0x88, 0x78, 0x30, 0x80, 0x80, 0x00, /* *** ***** * * * * **** ** * * */ +0x00, 0x0e, 0x1f, 0x18, 0x11, 0x13, 0x0e, 0x0c, 0x1b, 0x11, 0x00, /* *** ***** * * * * **** ** * * *** ***** ** * * ** * *** ** ** ** * * */ + +/* Character (0x27): bbw=2, bbh=4, bbx=1, bby=7, width=4 */ +0x00, 0x3c, 0x0c, 0x00, /* **** ** */ +0x00, 0x00, 0x00, 0x00, /* **** ** */ + +/* Character (0x28): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0xe0, 0xf8, 0x1c, 0x04, 0x00, /* *** ***** *** * */ +0x00, 0x07, 0x1f, 0x38, 0x20, 0x00, /* *** ***** *** * *** ***** *** * */ + +/* Character (0x29): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x04, 0x1c, 0xf8, 0xe0, 0x00, /* * *** ***** *** */ +0x00, 0x20, 0x38, 0x1f, 0x07, 0x00, /* * *** ***** *** * *** ***** *** */ + +/* Character (0x2a): bbw=5, bbh=5, bbx=1, bby=5, width=7 */ +0x00, 0x50, 0x20, 0xf8, 0x20, 0x50, 0x00, /* * * * ***** * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ***** * * * */ + +/* Character (0x2b): bbw=7, bbh=7, bbx=1, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** */ +0x00, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * **** * * * */ + +/* Character (0x2c): bbw=2, bbh=4, bbx=1, bby=-2, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x58, 0x38, 0x00, /* ** * *** */ + +/* Character (0x2d): bbw=3, bbh=1, bbx=1, bby=4, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x01, 0x01, 0x01, 0x00, /* * * * */ + +/* Character (0x2e): bbw=2, bbh=2, bbx=1, bby=0, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x18, 0x18, 0x00, /* ** ** */ + +/* Character (0x2f): bbw=8, bbh=12, bbx=0, bby=-1, width=8 */ +0x00, 0x00, 0x00, 0x80, 0xe0, 0x78, 0x1c, 0x04, /* * *** **** *** * */ +0x20, 0x38, 0x1e, 0x07, 0x01, 0x00, 0x00, 0x00, /* * *** **** *** * * *** **** *** * */ + +/* Character (0x30): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * ** **** *** *** **** ** * * ** **** *** */ + +/* Character (0x31): bbw=5, bbh=10, bbx=2, bby=0, width=10 */ +0x00, 0x00, 0x10, 0x10, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x00, /* * * * ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, /* * * * ***** ***** ***** ***** */ + +/* Character (0x32): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x10, 0x18, 0x08, 0x08, 0x08, 0x98, 0xf8, 0x70, 0x00, /* * ** * * * ** * ***** *** */ +0x00, 0x18, 0x1c, 0x1c, 0x1a, 0x1b, 0x19, 0x18, 0x18, 0x00, /* * ** * * * ** * ***** *** ** *** *** * ** ** ** * ** ** ** */ + +/* Character (0x33): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x10, 0x18, 0x88, 0x88, 0x88, 0xd8, 0x78, 0x30, 0x00, /* * ** * * * * * * ** ** **** ** */ +0x00, 0x08, 0x18, 0x10, 0x10, 0x10, 0x19, 0x1f, 0x0e, 0x00, /* * ** * * * * * * ** ** **** ** * ** * * * * ** ***** *** */ + +/* Character (0x34): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0x40, 0x20, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x00, /* * * * * ***** ***** */ +0x00, 0x03, 0x03, 0x03, 0x03, 0x1f, 0x1f, 0x03, 0x03, 0x00, /* * * * * ***** ***** ** ** ** ** ***** ***** ** ** */ + +/* Character (0x35): bbw=7, bbh=10, bbx=2, bby=0, width=10 */ +0x00, 0x00, 0xf8, 0x98, 0x98, 0x98, 0x98, 0x98, 0x00, 0x00, /* ***** ** * ** * ** * ** * ** * */ +0x00, 0x00, 0x08, 0x18, 0x10, 0x10, 0x19, 0x0f, 0x07, 0x00, /* ***** ** * ** * ** * ** * ** * * ** * * * ** **** *** */ + +/* Character (0x36): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xf0, 0x98, 0x48, 0x48, 0xc8, 0x98, 0x10, 0x00, /* *** **** ** * * * * * * ** ** * * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * * * ** ** * * *** **** ** * * ** **** *** */ + +/* Character (0x37): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x18, 0x18, 0x98, 0xd8, 0x78, 0x38, 0x18, 0x00, /* ** ** ** ** * ** ** **** *** ** */ +0x00, 0x00, 0x1c, 0x1f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** * ** ** **** *** ** *** ***** ** */ + +/* Character (0x38): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x30, 0x78, 0xc8, 0xc8, 0x88, 0x98, 0x78, 0x30, 0x00, /* ** **** * ** * ** * * ** * **** ** */ +0x00, 0x0e, 0x1f, 0x18, 0x10, 0x11, 0x13, 0x1f, 0x0e, 0x00, /* ** **** * ** * ** * * ** * **** ** *** ***** ** * * * ** * ***** *** */ + +/* Character (0x39): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * ** **** *** */ +0x00, 0x08, 0x19, 0x11, 0x12, 0x12, 0x19, 0x0f, 0x07, 0x00, /* *** **** ** * * ** **** *** * * ** * * * * * * * ** **** *** */ + +/* Character (0x3a): bbw=2, bbh=7, bbx=1, bby=0, width=4 */ +0x00, 0xc0, 0xc0, 0x00, /* ** ** */ +0x00, 0x18, 0x18, 0x00, /* ** ** ** ** */ + +/* Character (0x3b): bbw=2, bbh=9, bbx=1, bby=-2, width=4 */ +0x00, 0xc0, 0xc0, 0x00, /* ** ** */ +0x00, 0x58, 0x38, 0x00, /* ** ** ** * *** */ + +/* Character (0x3c): bbw=6, bbh=7, bbx=2, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x80, 0xc0, 0x40, 0x60, 0x20, 0x00, 0x00, /* * ** * ** * */ +0x00, 0x00, 0x01, 0x03, 0x06, 0x04, 0x0c, 0x08, 0x00, 0x00, /* * ** * ** * * ** ** * ** * */ + +/* Character (0x3d): bbw=7, bbh=3, bbx=1, bby=3, width=10 */ +0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * */ +0x00, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, 0x00, /* * * * * * * * * * * * * * * */ + +/* Character (0x3e): bbw=6, bbh=7, bbx=2, bby=1, width=10 */ +0x00, 0x00, 0x20, 0x60, 0x40, 0xc0, 0x80, 0x00, 0x00, 0x00, /* * ** * ** * */ +0x00, 0x00, 0x08, 0x0c, 0x04, 0x06, 0x03, 0x01, 0x00, 0x00, /* * ** * ** * * ** * ** ** * */ + +/* Character (0x3f): bbw=6, bbh=10, bbx=1, bby=0, width=8 */ +0x00, 0x10, 0x18, 0x08, 0x88, 0xf8, 0x70, 0x00, /* * ** * * * ***** *** */ +0x00, 0x00, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00, /* * ** * * * ***** *** ** ** ** ** */ + +/* Character (0x40): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0xc0, 0x30, 0x10, 0x88, 0xc8, 0x48, 0x48, 0xf0, 0xe0, 0x00, 0x00, /* ** ** * * * * ** * * * * **** *** */ +0x00, 0x03, 0x0c, 0x08, 0x13, 0x17, 0x14, 0x14, 0x13, 0x07, 0x04, 0x00, /* ** ** * * * * ** * * * * **** *** ** ** * ** * *** * * * * * ** * *** * */ + +/* Character (0x41): bbw=9, bbh=10, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe0, 0x18, 0x18, 0x78, 0xe0, 0x80, 0x00, 0x00, /* * *** ** ** **** *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * *** ** ** **** *** * **** ***** * * * * ** ***** *** */ + +/* Character (0x42): bbw=7, bbh=10, bbx=2, bby=0, width=10 */ +0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x48, 0x78, 0x30, 0x00, /* ***** ***** * * * * * * **** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x11, 0x1f, 0x0e, 0x00, /* ***** ***** * * * * * * **** ** ***** ***** * * * * ***** *** */ + +/* Character (0x43): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /* *** **** ** * * * ** * */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x18, 0x08, 0x00, /* *** **** ** * * * ** * *** **** ** * * * ** * */ + +/* Character (0x44): bbw=9, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* ***** ***** * * * * ** **** *** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* ***** ***** * * * * ** **** *** ***** ***** * * * * ** **** *** */ + +/* Character (0x45): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /* ***** ***** * * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** ***** * * * * * * * ***** ***** * * * * */ + +/* Character (0x46): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /* ***** ***** * * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** * * * * * * * ***** ***** */ + +/* Character (0x47): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /* *** **** ** * * * ** * */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x1f, 0x1f, 0x00, /* *** **** ** * * * ** * *** **** ** * * * ***** ***** */ + +/* Character (0x48): bbw=8, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x80, 0x80, 0x80, 0x80, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** * * * * ***** ***** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ***** ***** * * * * ***** ***** ***** ***** ***** ***** */ + +/* Character (0x49): bbw=2, bbh=10, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ***** ***** ***** ***** */ + +/* Character (0x4a): bbw=4, bbh=12, bbx=0, bby=-2, width=6 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** */ +0x40, 0x40, 0x7f, 0x3f, 0x00, 0x00, /* ***** ***** * ************** */ + +/* Character (0x4b): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xf8, 0xf8, 0x80, 0xc0, 0x60, 0x30, 0x18, 0x08, 0x00, /* ***** ***** * ** ** ** ** * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x00, /* ***** ***** * ** ** ** ** * ***** ***** * ** ** *** ** */ + +/* Character (0x4c): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** ***** ***** ***** * * * * */ + +/* Character (0x4d): bbw=11, bbh=10, bbx=2, bby=0, width=15 */ +0x00, 0x00, 0xf8, 0x18, 0xf8, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0x18, 0xf8, 0xf8, 0x00, 0x00, /* ***** ** ***** *** *** ** ***** ***** */ +0x00, 0x00, 0x1f, 0x00, 0x00, 0x03, 0x0f, 0x0c, 0x03, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ***** ** ***** *** *** ** ***** ***** ***** ** **** ** ** ***** ***** */ + +/* Character (0x4e): bbw=8, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0x18, 0x78, 0xe0, 0x80, 0x00, 0x00, 0xf8, 0x00, 0x00, /* ***** ** **** *** * ***** */ +0x00, 0x00, 0x1f, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1f, 0x00, 0x00, /* ***** ** **** *** * ***** ***** * *** **** ** ***** */ + +/* Character (0x4f): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0x50): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0xf8, 0xf0, 0x00, /* ***** ***** * * ***** **** */ +0x00, 0x00, 0x1f, 0x1f, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** ***** * * ***** **** ***** ***** * * * */ + +/* Character (0x51): bbw=10, bbh=12, bbx=1, bby=-2, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x30, 0x78, 0x4f, 0x07, 0x00, /* *** **** ** * * * * ** **** *** *** **** ** * * * ** ******** **** */ + +/* Character (0x52): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0x88, 0xf8, 0x30, 0x00, 0x00, /* ***** ***** * * * * ***** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x01, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x00, /* ***** ***** * * * * ***** ** ***** ***** * * ** ** *** ** */ + +/* Character (0x53): bbw=7, bbh=10, bbx=1, bby=0, width=9 */ +0x00, 0x70, 0xf8, 0xc8, 0x88, 0x88, 0x18, 0x10, 0x00, /* *** ***** * ** * * * * ** * */ +0x00, 0x08, 0x18, 0x11, 0x11, 0x13, 0x1f, 0x0e, 0x00, /* *** ***** * ** * * * * ** * * ** * * * * ** * ***** *** */ + +/* Character (0x54): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x08, 0x08, 0x08, 0xf8, 0xf8, 0x08, 0x08, 0x08, 0x00, /* * * * ***** ***** * * * */ +0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* * * * ***** ***** * * * ***** ***** */ + +/* Character (0x55): bbw=8, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ***** ***** ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0x56): bbw=9, bbh=10, bbx=1, bby=0, width=11 */ +0x00, 0x38, 0xf8, 0xc0, 0x00, 0x00, 0x00, 0x80, 0xf8, 0x38, 0x00, /* *** ***** ** * ***** *** */ +0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1c, 0x07, 0x01, 0x00, 0x00, /* *** ***** ** * ***** *** * *** **** ** *** *** * */ + +/* Character (0x57): bbw=11, bbh=10, bbx=1, bby=0, width=13 */ +0x00, 0x78, 0xf8, 0x80, 0x00, 0x00, 0xe0, 0xe0, 0x00, 0x00, 0xf8, 0x78, 0x00, /* **** ***** * *** *** ***** **** */ +0x00, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x00, 0x00, /* **** ***** * *** *** ***** **** *** ***** *** *** *** ***** *** *** */ + +/* Character (0x58): bbw=7, bbh=10, bbx=1, bby=0, width=9 */ +0x00, 0x18, 0x78, 0xe0, 0x80, 0xe0, 0x78, 0x18, 0x00, /* ** **** *** * *** **** ** */ +0x00, 0x18, 0x1e, 0x07, 0x01, 0x07, 0x1e, 0x18, 0x00, /* ** **** *** * *** **** ** ** **** *** * *** **** ** */ + +/* Character (0x59): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x78, 0xe0, 0x80, 0x00, 0xc0, 0x78, 0x18, 0x00, /* ** **** *** * ** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* ** **** *** * ** **** ** ***** ***** */ + +/* Character (0x5a): bbw=7, bbh=10, bbx=1, bby=0, width=9 */ +0x00, 0x08, 0x08, 0x08, 0xc8, 0xe8, 0x78, 0x18, 0x00, /* * * * * ** * *** **** ** */ +0x00, 0x18, 0x1e, 0x17, 0x13, 0x10, 0x10, 0x10, 0x00, /* * * * * ** * *** **** ** ** **** *** * ** * * * * */ + +/* Character (0x5b): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0xfc, 0xfc, 0x04, 0x04, 0x00, /* ****** ****** * * */ +0x00, 0x3f, 0x3f, 0x20, 0x20, 0x00, /* ****** ****** * * ****** ****** * * */ + +/* Character (0x5c): bbw=8, bbh=12, bbx=0, bby=-1, width=8 */ +0x04, 0x1c, 0x78, 0xe0, 0x80, 0x00, 0x00, 0x00, /* * *** **** *** * */ +0x00, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x38, 0x20, /* * *** **** *** * * *** **** *** * */ + +/* Character (0x5d): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x04, 0x04, 0xfc, 0xfc, 0x00, /* * * ****** ****** */ +0x00, 0x20, 0x20, 0x3f, 0x3f, 0x00, /* * * ****** ****** * * ****** ****** */ + +/* Character (0x5e): bbw=6, bbh=7, bbx=2, bby=3, width=10 */ +0x00, 0x00, 0x80, 0xe0, 0x38, 0x38, 0xe0, 0x80, 0x00, 0x00, /* * *** *** *** *** * */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, /* * *** *** *** *** * ** ** */ + +/* Character (0x5f): bbw=9, bbh=1, bbx=1, bby=-1, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, /* * * * * * * * * * */ + +/* Character (0x60): bbw=5, bbh=2, bbx=2, bby=9, width=10 */ +0x00, 0x00, 0x04, 0x04, 0x0c, 0x08, 0x08, 0x00, 0x00, 0x00, /* * * ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * */ + +/* Character (0x61): bbw=8, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* * * * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0x62): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xfc, 0xfc, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* ****** ****** * * * ** ** * */ +0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* ****** ****** * * * ** ** * ***** ***** * * * ** **** *** */ + +/* Character (0x63): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0x40, 0x00, /* * ** ** * * ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x08, 0x00, /* * ** ** * * ** * *** **** ** * * * * */ + +/* Character (0x64): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xfc, 0xfc, 0x00, /* * ** ** * * * ****** ****** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* * ** ** * * * ****** ****** *** **** ** * * * ***** ***** */ + +/* Character (0x65): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* * ** ** * * *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** ** * * *** ** *** **** * ** * * * * * * * * */ + +/* Character (0x66): bbw=7, bbh=11, bbx=0, bby=0, width=7 */ +0x20, 0x20, 0xf8, 0xfc, 0x24, 0x24, 0x24, /* * * ***** ****** * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, /* * * ***** ****** * * * * * * ***** ***** */ + +/* Character (0x67): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xe0, 0xe0, 0x00, /* * ** ** * * * *** *** */ +0x00, 0x23, 0x67, 0x4c, 0x48, 0x48, 0x64, 0x3f, 0x1f, 0x00, /* * ** ** * * * *** *** ** * *** ** ** * * * * * * ******** ***** */ + +/* Character (0x68): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xfc, 0xfc, 0x40, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0x00, /* ****** ****** * * * ** *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* ****** ****** * * * ** *** ** ***** ***** ***** ***** */ + +/* Character (0x69): bbw=2, bbh=11, bbx=1, bby=0, width=4 */ +0x00, 0xec, 0xec, 0x00, /* ** *** ** *** */ +0x00, 0x1f, 0x1f, 0x00, /* ** *** ** *** ***** ***** */ + +/* Character (0x6a): bbw=4, bbh=13, bbx=0, bby=-2, width=5 */ +0x00, 0x00, 0xec, 0xec, 0x00, /* ** *** ** *** */ +0x40, 0x40, 0x7f, 0x3f, 0x00, /* ** *** ** *** * ************** */ + +/* Character (0x6b): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0xfc, 0xfc, 0x00, 0x80, 0xc0, 0x60, 0x20, 0x00, /* ****** ****** * ** ** * */ +0x00, 0x1f, 0x1f, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x10, /* ****** ****** * ** ** * ***** ***** * ** ** *** ** * */ + +/* Character (0x6c): bbw=2, bbh=11, bbx=1, bby=0, width=4 */ +0x00, 0xfc, 0xfc, 0x00, /* ****** ****** */ +0x00, 0x1f, 0x1f, 0x00, /* ****** ****** ***** ***** */ + +/* Character (0x6d): bbw=12, bbh=8, bbx=1, bby=0, width=14 */ +0x00, 0xe0, 0xe0, 0x40, 0x20, 0x60, 0xe0, 0xc0, 0x60, 0x20, 0x60, 0xe0, 0xc0, 0x00, /* *** *** * * ** *** ** ** * ** *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* *** *** * * ** *** ** ** * ** *** ** ***** ***** ***** ***** ***** ***** */ + +/* Character (0x6e): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x40, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0x00, /* *** *** * * * ** *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* *** *** * * * ** *** ** ***** ***** ***** ***** */ + +/* Character (0x6f): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* * ** ** * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** ** * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0x70): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0xe0, 0xe0, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* *** *** * * * ** ** * */ +0x00, 0x7f, 0x7f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** *** * * * ** ** * ************** * * * ** **** *** */ + +/* Character (0x71): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xe0, 0xe0, 0x00, /* * ** ** * * * *** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x08, 0x7f, 0x7f, 0x00, /* * ** ** * * * *** *** *** **** ** * * * ************** */ + +/* Character (0x72): bbw=5, bbh=8, bbx=2, bby=0, width=8 */ +0x00, 0x00, 0xe0, 0xe0, 0x80, 0x60, 0x60, 0x00, /* *** *** * ** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* *** *** * ** ** ***** ***** */ + +/* Character (0x73): bbw=6, bbh=8, bbx=1, bby=0, width=8 */ +0x00, 0xc0, 0xe0, 0x20, 0x20, 0x20, 0x20, 0x00, /* ** *** * * * * */ +0x00, 0x11, 0x11, 0x13, 0x13, 0x1e, 0x0e, 0x00, /* ** *** * * * * * * * * ** * ** * **** *** */ + +/* Character (0x74): bbw=5, bbh=10, bbx=1, bby=0, width=7 */ +0x00, 0x20, 0xf8, 0xf8, 0x20, 0x20, 0x00, /* * ***** ***** * * */ +0x00, 0x00, 0x0f, 0x1f, 0x10, 0x10, 0x00, /* * ***** ***** * * **** ***** * * */ + +/* Character (0x75): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0x76): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x01, 0x07, 0x1e, 0x18, 0x1c, 0x03, 0x01, 0x00, /* *** *** *** *** * *** **** ** *** ** * */ + +/* Character (0x77): bbw=11, bbh=8, bbx=1, bby=0, width=13 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** ** *** *** */ +0x00, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x01, 0x07, 0x1c, 0x1f, 0x03, 0x00, 0x00, /* *** *** ** *** *** *** ***** *** *** * *** *** ***** ** */ + +/* Character (0x78): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x60, 0xe0, 0x80, 0x00, 0x00, 0xe0, 0x60, 0x00, /* ** *** * *** ** */ +0x00, 0x18, 0x1c, 0x03, 0x03, 0x07, 0x1c, 0x18, 0x00, /* ** *** * *** ** ** *** ** ** *** *** ** */ + +/* Character (0x79): bbw=7, bbh=10, bbx=1, bby=-2, width=9 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /* *** *** *** *** * **** ** ****** ** *** ** * */ + +/* Character (0x7a): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x20, 0x20, 0x20, 0x20, 0xa0, 0xe0, 0x60, 0x00, /* * * * * * * *** ** */ +0x00, 0x18, 0x1c, 0x16, 0x13, 0x11, 0x10, 0x10, 0x00, /* * * * * * * *** ** ** *** ** * ** * * * * * */ + +/* Character (0x7b): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x98, 0xbc, 0x64, 0x04, 0x00, /* ** * **** * * ** * */ +0x00, 0x1c, 0x3e, 0x23, 0x20, 0x00, /* ** * **** * * ** * *** ***** ** * * */ + +/* Character (0x7c): bbw=2, bbh=12, bbx=1, bby=-1, width=4 */ +0x00, 0xfc, 0xfc, 0x00, /* ****** ****** */ +0x00, 0x3f, 0x3f, 0x00, /* ****** ****** ****** ****** */ + +/* Character (0x7d): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x04, 0x64, 0xbc, 0x98, 0x00, /* * * ** **** * ** * */ +0x00, 0x20, 0x23, 0x3e, 0x1c, 0x00, /* * * ** **** * ** * * ** * ***** *** */ + +/* Character (0x7e): bbw=7, bbh=3, bbx=1, bby=3, width=9 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x00, /* * * * * */ +0x00, 0x03, 0x00, 0x01, 0x03, 0x03, 0x02, 0x01, 0x00, /* * * * * ** * ** ** * * */ + +/* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=2, bbh=10, bbx=1, bby=-2, width=4 */ +0x00, 0x60, 0x60, 0x00, /* ** ** */ +0x00, 0x7e, 0x7f, 0x00, /* ** ** ************* */ + +/* Character (0xa2): bbw=7, bbh=12, bbx=1, bby=-1, width=10 */ +0x00, 0xc0, 0xe0, 0x30, 0x10, 0xfc, 0x10, 0x30, 0x00, 0x00, /* ** *** ** * ****** * ** */ +0x00, 0x03, 0x07, 0x0c, 0x08, 0x3f, 0x08, 0x08, 0x00, 0x00, /* ** *** ** * ****** * ** ** *** ** * ****** * * */ + +/* Character (0xa3): bbw=7, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0x80, 0xf0, 0xf8, 0x88, 0x88, 0x10, 0x00, 0x00, /* * * **** ***** * * * * * */ +0x00, 0x10, 0x18, 0x1f, 0x17, 0x10, 0x10, 0x10, 0x00, 0x00, /* * * **** ***** * * * * * * ** ***** *** * * * * */ + +/* Character (0xa4): bbw=9, bbh=10, bbx=0, bby=0, width=10 */ +0x08, 0xd0, 0xe0, 0x20, 0x20, 0x20, 0xe0, 0xd0, 0x08, 0x00, /* * * ** *** * * * *** * ** * */ +0x10, 0x0b, 0x07, 0x04, 0x04, 0x04, 0x07, 0x0b, 0x10, 0x00, /* * * ** *** * * * *** * ** * * ** * *** * * * *** ** * * */ + +/* Character (0xa5): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x78, 0xe0, 0x80, 0x00, 0xc0, 0x78, 0x18, 0x00, /* ** **** *** * ** **** ** */ +0x00, 0x00, 0x05, 0x05, 0x1f, 0x1f, 0x05, 0x05, 0x00, 0x00, /* ** **** *** * ** **** ** * * * * ***** ***** * * * * */ + +/* Character (0xa6): bbw=2, bbh=12, bbx=1, bby=-1, width=4 */ +0x00, 0x7c, 0x7c, 0x00, /* ***** ***** */ +0x00, 0x3e, 0x3e, 0x00, /* ***** ***** ***** ***** */ + +/* Character (0xa7): bbw=6, bbh=11, bbx=2, bby=-1, width=10 */ +0x00, 0x00, 0xb0, 0xf8, 0x48, 0xc8, 0x98, 0x10, 0x00, 0x00, /* ** * ***** * * * ** ** * * */ +0x00, 0x00, 0x11, 0x33, 0x26, 0x24, 0x3f, 0x1b, 0x00, 0x00, /* ** * ***** * * * ** ** * * * * ** ** ** * * * ****** ** ** */ + +/* Character (0xa8): bbw=4, bbh=2, bbx=3, bby=9, width=10 */ +0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, /* ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** */ + +/* Character (0xa9): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0xc0, 0x30, 0x10, 0x88, 0xc8, 0x48, 0x48, 0x10, 0x30, 0xc0, 0x00, /* ** ** * * * * ** * * * * * ** ** */ +0x00, 0x03, 0x0c, 0x08, 0x11, 0x13, 0x12, 0x12, 0x08, 0x0c, 0x03, 0x00, /* ** ** * * * * ** * * * * * ** ** ** ** * * * ** * * * * * * ** ** */ + +/* Character (0xaa): bbw=6, bbh=6, bbx=1, bby=4, width=8 */ +0x00, 0xc0, 0xe8, 0x28, 0xf8, 0xf0, 0x00, 0x00, /* ** * *** * * ***** **** */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /* ** * *** * * ***** **** * * * * */ + +/* Character (0xab): bbw=8, bbh=5, bbx=0, bby=2, width=9 */ +0x00, 0x80, 0xc0, 0x40, 0x00, 0x80, 0xc0, 0x40, 0x00, /* * ** * * ** * */ +0x01, 0x03, 0x06, 0x04, 0x01, 0x03, 0x06, 0x04, 0x00, /* * ** * * ** * * ** ** * * ** ** * */ + +/* Character (0xac): bbw=7, bbh=4, bbx=1, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00, /* * * * * * * **** */ + +/* Character (0xad): bbw=3, bbh=1, bbx=1, bby=4, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x01, 0x01, 0x01, 0x00, /* * * * */ + +/* Character (0xae): bbw=7, bbh=7, bbx=1, bby=3, width=10 */ +0x00, 0xe0, 0x10, 0xe8, 0x68, 0xa8, 0x10, 0xe0, 0x00, 0x00, /* *** * * *** * ** * * * * *** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, /* *** * * *** * ** * * * * *** * * * * * */ + +/* Character (0xaf): bbw=4, bbh=1, bbx=3, bby=9, width=10 */ +0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xb0): bbw=4, bbh=3, bbx=0, bby=7, width=4 */ +0x10, 0x28, 0x28, 0x10, /* * * * * * * */ +0x00, 0x00, 0x00, 0x00, /* * * * * * * */ + +/* Character (0xb1): bbw=7, bbh=7, bbx=1, bby=1, width=10 */ +0x00, 0x80, 0x80, 0x80, 0xe0, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * *** * * * */ +0x00, 0x08, 0x08, 0x08, 0x0b, 0x08, 0x08, 0x08, 0x00, 0x00, /* * * * *** * * * * * * ** * * * * */ + +/* Character (0xb2): bbw=5, bbh=6, bbx=1, bby=4, width=7 */ +0x00, 0x88, 0xc8, 0x48, 0x38, 0x30, 0x00, /* * * * ** * * *** ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * ** * * *** ** * * * * * */ + +/* Character (0xb3): bbw=5, bbh=6, bbx=1, bby=4, width=7 */ +0x00, 0x08, 0x28, 0x28, 0xf8, 0xd0, 0x00, /* * * * * * ***** * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * * * ***** * ** * * * * */ + +/* Character (0xb4): bbw=5, bbh=2, bbx=3, bby=9, width=10 */ +0x00, 0x00, 0x00, 0x08, 0x08, 0x0c, 0x04, 0x04, 0x00, 0x00, /* * * ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * */ + +/* Character (0xb5): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x7f, 0x7f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** *** *** ************** ** * * * ***** ***** */ + +/* Character (0xb6): bbw=6, bbh=11, bbx=2, bby=-1, width=10 */ +0x00, 0x00, 0xf0, 0xf8, 0xf8, 0xf8, 0x08, 0xf8, 0x00, 0x00, /* **** ***** ***** ***** * ***** */ +0x00, 0x00, 0x00, 0x01, 0x01, 0x3f, 0x00, 0x3f, 0x00, 0x00, /* **** ***** ***** ***** * ***** * * ****** ****** */ + +/* Character (0xb7): bbw=2, bbh=2, bbx=4, bby=3, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /* ** ** */ + +/* Character (0xb8): bbw=3, bbh=2, bbx=3, bby=-2, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x40, 0x40, 0x20, 0x00, 0x00, 0x00, 0x00, /* * * * */ + +/* Character (0xb9): bbw=4, bbh=6, bbx=1, bby=4, width=7 */ +0x00, 0x10, 0x10, 0xf8, 0xf8, 0x00, 0x00, /* * * ***** ***** */ +0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * ***** ***** * * */ + +/* Character (0xba): bbw=6, bbh=6, bbx=1, bby=4, width=8 */ +0x00, 0xf0, 0xf8, 0x08, 0x08, 0xf8, 0xf0, 0x00, /* **** ***** * * ***** **** */ +0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* **** ***** * * ***** **** * * * * */ + +/* Character (0xbb): bbw=8, bbh=5, bbx=1, bby=2, width=9 */ +0x00, 0x40, 0xc0, 0x80, 0x00, 0x40, 0xc0, 0x80, 0x00, /* * ** * * ** * */ +0x00, 0x04, 0x06, 0x03, 0x01, 0x04, 0x06, 0x03, 0x01, /* * ** * * ** * * ** ** * * ** ** * */ + +/* Character (0xbc): bbw=12, bbh=10, bbx=1, bby=0, width=14 */ +0x00, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x80, 0x60, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /* * ***** ***** * ** ** * * * */ +0x00, 0x00, 0x01, 0x01, 0x18, 0x06, 0x01, 0x06, 0x05, 0x04, 0x1f, 0x1f, 0x04, 0x00, /* * ***** ***** * ** ** * * * * * ** ** * ** * * * ***** ***** * */ + +/* Character (0xbd): bbw=12, bbh=10, bbx=1, bby=0, width=14 */ +0x00, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x80, 0x60, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /* * ***** ***** * ** ** * * * */ +0x00, 0x00, 0x01, 0x01, 0x18, 0x06, 0x01, 0x00, 0x19, 0x1c, 0x16, 0x17, 0x13, 0x00, /* * ***** ***** * ** ** * * * * * ** ** * * ** *** ** * *** * ** * */ + +/* Character (0xbe): bbw=13, bbh=10, bbx=1, bby=0, width=15 */ +0x00, 0x90, 0x08, 0x28, 0xf8, 0xd0, 0x00, 0xc0, 0x20, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * ***** * ** ** * ** * * * */ +0x00, 0x00, 0x01, 0x01, 0x19, 0x04, 0x03, 0x00, 0x06, 0x05, 0x04, 0x1f, 0x1f, 0x04, 0x00, /* * * * * * ***** * ** ** * ** * * * * * * ** * ** ** * * * ***** ***** * */ + +/* Character (0xbf): bbw=6, bbh=10, bbx=1, bby=-2, width=8 */ +0x00, 0x00, 0x00, 0x60, 0x60, 0x00, 0x00, 0x00, /* ** ** */ +0x00, 0x38, 0x7c, 0x47, 0x43, 0x60, 0x20, 0x00, /* ** ** *** ******** *** * ** * */ + +/* Character (0xc0): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x81, 0xe1, 0x1b, 0x1a, 0x7a, 0xe0, 0x80, 0x00, 0x00, /* * ** ***** ** * ** * **** *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * ** ***** ** * ** * **** *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc1): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe0, 0x1a, 0x1a, 0x7b, 0xe1, 0x81, 0x00, 0x00, /* * *** * ** * ** ** **** * **** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * *** * ** * ** ** **** * **** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc2): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe2, 0x19, 0x19, 0x7b, 0xe2, 0x80, 0x00, 0x00, /* * * **** ** * ** ** **** * *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * * **** ** * ** ** **** * *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc3): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe2, 0x19, 0x1b, 0x7a, 0xe1, 0x80, 0x00, 0x00, /* * * **** ** ** ** * **** * *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * * **** ** ** ** * **** * *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc4): bbw=8, bbh=13, bbx=1, bby=0, width=10 */ +0x00, 0x00, 0x80, 0xe3, 0x18, 0x78, 0xe3, 0x80, 0x00, 0x00, /* *** *** ** **** ** *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* *** *** ** **** ** *** * **** ***** * * * ** ***** *** */ + +/* Character (0xc5): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe2, 0x1d, 0x1d, 0x7f, 0xe2, 0x80, 0x00, 0x00, /* * * **** *** * *** ******* * *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * * **** *** * *** ******* * *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc6): bbw=11, bbh=10, bbx=1, bby=0, width=13 */ +0x00, 0x00, 0x80, 0xe0, 0x18, 0x08, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /* * *** ** * ***** ***** * * * * * * * */ +0x00, 0x1c, 0x1f, 0x02, 0x02, 0x02, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* * *** ** * ***** ***** * * * * * * * *** ***** * * * ***** ***** * * * * */ + +/* Character (0xc7): bbw=8, bbh=12, bbx=2, bby=-2, width=11 */ +0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /* *** **** ** * * * ** * */ +0x00, 0x00, 0x07, 0x0f, 0x58, 0x50, 0x30, 0x10, 0x18, 0x08, 0x00, /* *** **** ** * * * ** * *** **** ** * * * ** * ** * */ + +/* Character (0xc8): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf9, 0x89, 0x8b, 0x8a, 0x0a, 0x00, /* ****** ****** * *** * * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ****** ****** * *** * * * * * * * ***** ***** * * * * */ + +/* Character (0xc9): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xfa, 0x8a, 0x8b, 0x89, 0x09, 0x00, /* ***** * ***** * * *** * ** * ** * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** * ***** * * *** * ** * ** * ***** ***** * * * * */ + +/* Character (0xca): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xfa, 0x89, 0x8b, 0x8a, 0x08, 0x00, /* ***** * ****** * *** * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** * ****** * *** * * * * * * ***** ***** * * * * */ + +/* Character (0xcb): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xfb, 0x88, 0x88, 0x8b, 0x08, 0x00, /* ******* ***** * * * *** * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ******* ***** * * * *** * * * ***** ***** * * * * */ + +/* Character (0xcc): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x01, 0xf9, 0xfb, 0x02, 0x00, /* * * ******* ***** * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* * * ******* ***** * ***** ***** */ + +/* Character (0xcd): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xfb, 0xf9, 0x01, 0x00, /* * ** ****** ****** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* * ** ****** ****** ***** ***** */ + +/* Character (0xce): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xf9, 0xfb, 0x02, 0x00, /* * * ******* ***** * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* * * ******* ***** * ***** ***** */ + +/* Character (0xcf): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x03, 0xf8, 0xf8, 0x03, 0x00, /* ** ***** ******* */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ** ***** ******* ***** ***** */ + +/* Character (0xd0): bbw=11, bbh=10, bbx=0, bby=0, width=12 */ +0x80, 0x80, 0xf8, 0xf8, 0x88, 0x88, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* * * ***** ***** * * * * * * ** **** *** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * * ***** ***** * * * * * * ** **** *** ***** ***** * * * * ** **** *** */ + +/* Character (0xd1): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0x18, 0x7a, 0xe1, 0x83, 0x02, 0x01, 0xf8, 0x00, 0x00, /* ***** ** * **** * ***** * * * ***** */ +0x00, 0x00, 0x1f, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1f, 0x00, 0x00, /* ***** ** * **** * ***** * * * ***** ***** * *** **** ** ***** */ + +/* Character (0xd2): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x19, 0x09, 0x0b, 0x0a, 0x0a, 0x18, 0xf0, 0xe0, 0x00, /* *** ***** ** * * ** * * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** ***** ** * * ** * * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd3): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x0a, 0x0b, 0x09, 0x19, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd4): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x09, 0x0b, 0x0a, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd5): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x09, 0x0b, 0x0a, 0x19, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd6): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x1b, 0x08, 0x08, 0x08, 0x08, 0x1b, 0xf0, 0xe0, 0x00, /* *** ****** ** * * * * ** ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** ****** ** * * * * ** ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd7): bbw=5, bbh=5, bbx=2, bby=2, width=10 */ +0x00, 0x00, 0x40, 0xc0, 0x80, 0x80, 0x40, 0x00, 0x00, 0x00, /* * ** * * * */ +0x00, 0x00, 0x04, 0x02, 0x03, 0x06, 0x04, 0x00, 0x00, 0x00, /* * ** * * * * * ** ** * */ + +/* Character (0xd8): bbw=10, bbh=12, bbx=1, bby=-1, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x88, 0x68, 0x18, 0xf0, 0xec, 0x00, /* *** **** ** * * * * * ** ** **** ** *** */ +0x00, 0x37, 0x0f, 0x18, 0x16, 0x11, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * * ** ** **** ** *** *** ** **** ** ** * * * * * ** **** *** */ + +/* Character (0xd9): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf9, 0x01, 0x03, 0x02, 0x02, 0xf8, 0xf8, 0x00, 0x00, /* ****** ****** ** * * ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ****** ****** ** * * ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0xda): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x02, 0x02, 0x03, 0x01, 0xf9, 0xf8, 0x00, 0x00, /* ***** ***** * * ** * * ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ***** ***** * * ** * * ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0xdb): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x02, 0x01, 0x03, 0x02, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** * * ** * ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ***** ***** * * ** * ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0xdc): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x03, 0x00, 0x00, 0x03, 0xf8, 0xf8, 0x00, 0x00, /* ***** ******* ** ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x07, 0x07, 0x00, 0x00, /* ***** ******* ** ***** ***** *** **** ** * * ** *** *** */ + +/* Character (0xdd): bbw=8, bbh=13, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x78, 0xe2, 0x82, 0x03, 0xc1, 0x79, 0x18, 0x00, /* ** **** * *** * *** * *** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* ** **** * *** * *** * *** **** ** ***** ***** */ + +/* Character (0xde): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* ***** ***** * * *** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x04, 0x04, 0x07, 0x03, 0x00, /* ***** ***** * * *** ** ***** ***** * * *** ** */ + +/* Character (0xdf): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xf8, 0xfc, 0x04, 0x04, 0x44, 0xfc, 0x98, 0x00, 0x00, /* ***** ****** * * * * ****** ** * */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x10, 0x10, 0x1f, 0x0f, 0x00, /* ***** ****** * * * * ****** ** * ***** ***** * * ***** **** */ + +/* Character (0xe0): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x24, 0x24, 0x2c, 0x28, 0xe8, 0xc0, 0x00, /* * * * * ** * * * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * ** * * * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe1): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x28, 0x28, 0x2c, 0xe4, 0xc4, 0x00, /* * * * * * ** * * *** * ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * * ** * * *** * ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe2): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x28, 0x24, 0x2c, 0xe8, 0xc0, 0x00, /* * * * * * ** * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * * ** * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe3): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x28, 0x24, 0x2c, 0x28, 0xe4, 0xc0, 0x00, /* * * * * ** * * * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * ** * * * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe4): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x2c, 0x20, 0x20, 0xec, 0xc0, 0x00, /* * ** * * * ** *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * ** * * * ** *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe5): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x28, 0x34, 0x3c, 0xe8, 0xc0, 0x00, /* * * * * ** **** * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * ** **** * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe6): bbw=12, bbh=8, bbx=1, bby=0, width=14 */ +0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0xc0, 0x60, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* * * * * *** ** ** * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x11, 0x0f, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * * * * *** ** ** * * *** ** *** ***** * * * * * * **** **** * ** * * * * * * * * */ + +/* Character (0xe7): bbw=7, bbh=10, bbx=1, bby=-2, width=9 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0x40, 0x00, /* * ** ** * * ** * */ +0x00, 0x07, 0x4f, 0x58, 0x30, 0x10, 0x10, 0x08, 0x00, /* * ** ** * * ** * *** **** * ** * ** * * * */ + +/* Character (0xe8): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc4, 0x64, 0x2c, 0x28, 0xe8, 0xc0, 0x00, /* * * ** * ** ** * * * * *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * * ** * ** ** * * * * *** ** *** **** * ** * * * * * * * * */ + +/* Character (0xe9): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x68, 0x28, 0x2c, 0xe4, 0xc4, 0x00, /* * ** * ** * * ** * * *** * ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** * ** * * ** * * *** * ** *** **** * ** * * * * * * * * */ + +/* Character (0xea): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x68, 0x24, 0x2c, 0xe8, 0xc0, 0x00, /* * ** * ** * * ** * * *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** * ** * * ** * * *** ** *** **** * ** * * * * * * * * */ + +/* Character (0xeb): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xcc, 0x60, 0x20, 0x20, 0xec, 0xc0, 0x00, /* * ** ** ** * * ** *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** ** ** * * ** *** ** *** **** * ** * * * * * * * * */ + +/* Character (0xec): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x04, 0xe4, 0xec, 0x08, /* * * *** ** *** * */ +0x00, 0x1f, 0x1f, 0x00, /* * * *** ** *** * ***** ***** */ + +/* Character (0xed): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x08, 0xec, 0xe4, 0x04, /* * ** *** * *** * */ +0x00, 0x1f, 0x1f, 0x00, /* * ** *** * *** * ***** ***** */ + +/* Character (0xee): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x08, 0xe4, 0xec, 0x08, /* * * *** ** *** * */ +0x00, 0x1f, 0x1f, 0x00, /* * * *** ** *** * ***** ***** */ + +/* Character (0xef): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x0c, 0xe0, 0xe0, 0x0c, /* ** *** *** ** */ +0x00, 0x1f, 0x1f, 0x00, /* ** *** *** ** ***** ***** */ + +/* Character (0xf0): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x68, 0x2c, 0x38, 0x78, 0xe8, 0x80, 0x00, /* * ** * ** ** * *** **** * *** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** * ** ** * *** **** * *** * *** **** ** * * ** **** *** */ + +/* Character (0xf1): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x48, 0x24, 0x2c, 0x68, 0xe4, 0xc0, 0x00, /* *** *** * * * * ** * * ** * *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* *** *** * * * * ** * * ** * *** ** ***** ***** ***** ***** */ + +/* Character (0xf2): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc4, 0x64, 0x2c, 0x28, 0x68, 0xc0, 0x80, 0x00, /* * * ** * ** ** * * * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * * ** * ** ** * * * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf3): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x68, 0x28, 0x2c, 0x64, 0xc4, 0x80, 0x00, /* * ** * ** * * ** * * ** * ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** * ** * * ** * * ** * ** * *** **** ** * * ** **** *** */ + +/* Character (0xf4): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x68, 0x24, 0x2c, 0x68, 0xc0, 0x80, 0x00, /* * ** * ** * * ** * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** * ** * * ** * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf5): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc8, 0x64, 0x2c, 0x28, 0x64, 0xc0, 0x80, 0x00, /* * * ** * ** ** * * * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * * ** * ** ** * * * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf6): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x6c, 0x20, 0x20, 0x6c, 0xc0, 0x80, 0x00, /* * ** ** ** * * ** ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** ** ** * * ** ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf7): bbw=7, bbh=7, bbx=1, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** */ +0x00, 0x01, 0x01, 0x01, 0x0d, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * ** * * * */ + +/* Character (0xf8): bbw=8, bbh=10, bbx=1, bby=-1, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0xa0, 0x60, 0xc0, 0xb0, 0x00, /* * ** ** * * * ** ** ** * */ +0x00, 0x37, 0x0f, 0x18, 0x16, 0x11, 0x18, 0x0f, 0x07, 0x00, /* * ** ** * * * ** ** ** * *** ** **** ** ** * * * ** **** *** */ + +/* Character (0xf9): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe4, 0x04, 0x0c, 0x08, 0x08, 0xe0, 0xe0, 0x00, /* *** * *** * ** * * *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** * *** * ** * * *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfa): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe8, 0x08, 0x0c, 0x04, 0x04, 0xe0, 0xe0, 0x00, /* *** * *** * ** * * *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** * *** * ** * * *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfb): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x08, 0x04, 0x0c, 0x08, 0xe0, 0xe0, 0x00, /* *** *** * * ** * *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** * * ** * *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfc): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x0c, 0x00, 0x00, 0x0c, 0xe0, 0xe0, 0x00, /* *** *** ** ** *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** ** ** *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfd): bbw=7, bbh=13, bbx=1, bby=-2, width=9 */ +0x00, 0xe0, 0xe8, 0x08, 0x0c, 0x04, 0xe4, 0xe0, 0x00, /* *** * *** * ** * * *** *** */ +0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /* *** * *** * ** * * *** *** * **** ** ****** ** *** ** * */ + +/* Character (0xfe): bbw=8, bbh=12, bbx=1, bby=-2, width=10 */ +0x00, 0xf8, 0xf8, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* ***** ***** * * * ** ** * */ +0x00, 0x7f, 0x7f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* ***** ***** * * * ** ** * ************** * * * ** **** *** */ + +/* Character (0xff): bbw=7, bbh=13, bbx=1, bby=-2, width=9 */ +0x00, 0xe0, 0xec, 0x00, 0x00, 0x00, 0xec, 0xe0, 0x00, /* *** ** *** ** *** *** */ +0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /* *** ** *** ** *** *** * **** ** ****** ** *** ** * */ +}; + +/* Character->glyph data. */ +static const PROGMEM uint16_t luBS14_offset[] = { + 0, /* (0x00) */ + 0, /* (0x01) */ + 0, /* (0x02) */ + 0, /* (0x03) */ + 0, /* (0x04) */ + 0, /* (0x05) */ + 0, /* (0x06) */ + 0, /* (0x07) */ + 0, /* (0x08) */ + 0, /* (0x09) */ + 0, /* (0x0a) */ + 0, /* (0x0b) */ + 0, /* (0x0c) */ + 0, /* (0x0d) */ + 0, /* (0x0e) */ + 0, /* (0x0f) */ + 0, /* (0x10) */ + 0, /* (0x11) */ + 0, /* (0x12) */ + 0, /* (0x13) */ + 0, /* (0x14) */ + 0, /* (0x15) */ + 0, /* (0x16) */ + 0, /* (0x17) */ + 0, /* (0x18) */ + 0, /* (0x19) */ + 0, /* (0x1a) */ + 0, /* (0x1b) */ + 0, /* (0x1c) */ + 0, /* (0x1d) */ + 0, /* (0x1e) */ + 0, /* (0x1f) */ + 24, /* (0x20) */ + 32, /* (0x21) */ + 40, /* (0x22) */ + 54, /* (0x23) */ + 74, /* (0x24) */ + 94, /* (0x25) */ + 118, /* (0x26) */ + 140, /* (0x27) */ + 148, /* (0x28) */ + 160, /* (0x29) */ + 172, /* (0x2a) */ + 186, /* (0x2b) */ + 206, /* (0x2c) */ + 214, /* (0x2d) */ + 224, /* (0x2e) */ + 232, /* (0x2f) */ + 248, /* (0x30) */ + 268, /* (0x31) */ + 288, /* (0x32) */ + 308, /* (0x33) */ + 328, /* (0x34) */ + 348, /* (0x35) */ + 368, /* (0x36) */ + 388, /* (0x37) */ + 408, /* (0x38) */ + 428, /* (0x39) */ + 448, /* (0x3a) */ + 456, /* (0x3b) */ + 464, /* (0x3c) */ + 484, /* (0x3d) */ + 504, /* (0x3e) */ + 524, /* (0x3f) */ + 540, /* (0x40) */ + 564, /* (0x41) */ + 586, /* (0x42) */ + 606, /* (0x43) */ + 628, /* (0x44) */ + 652, /* (0x45) */ + 670, /* (0x46) */ + 688, /* (0x47) */ + 710, /* (0x48) */ + 734, /* (0x49) */ + 746, /* (0x4a) */ + 758, /* (0x4b) */ + 780, /* (0x4c) */ + 798, /* (0x4d) */ + 828, /* (0x4e) */ + 852, /* (0x4f) */ + 876, /* (0x50) */ + 894, /* (0x51) */ + 918, /* (0x52) */ + 940, /* (0x53) */ + 958, /* (0x54) */ + 978, /* (0x55) */ + 1002, /* (0x56) */ + 1024, /* (0x57) */ + 1050, /* (0x58) */ + 1068, /* (0x59) */ + 1088, /* (0x5a) */ + 1106, /* (0x5b) */ + 1118, /* (0x5c) */ + 1134, /* (0x5d) */ + 1146, /* (0x5e) */ + 1166, /* (0x5f) */ + 1188, /* (0x60) */ + 1208, /* (0x61) */ + 1226, /* (0x62) */ + 1246, /* (0x63) */ + 1264, /* (0x64) */ + 1284, /* (0x65) */ + 1302, /* (0x66) */ + 1316, /* (0x67) */ + 1336, /* (0x68) */ + 1356, /* (0x69) */ + 1364, /* (0x6a) */ + 1374, /* (0x6b) */ + 1392, /* (0x6c) */ + 1400, /* (0x6d) */ + 1428, /* (0x6e) */ + 1448, /* (0x6f) */ + 1468, /* (0x70) */ + 1488, /* (0x71) */ + 1508, /* (0x72) */ + 1524, /* (0x73) */ + 1540, /* (0x74) */ + 1554, /* (0x75) */ + 1574, /* (0x76) */ + 1592, /* (0x77) */ + 1618, /* (0x78) */ + 1636, /* (0x79) */ + 1654, /* (0x7a) */ + 1672, /* (0x7b) */ + 1684, /* (0x7c) */ + 1692, /* (0x7d) */ + 1704, /* (0x7e) */ + 0, /* (0x7f) */ + 0, /* (0x80) */ + 0, /* (0x81) */ + 0, /* (0x82) */ + 0, /* (0x83) */ + 0, /* (0x84) */ + 0, /* (0x85) */ + 0, /* (0x86) */ + 0, /* (0x87) */ + 0, /* (0x88) */ + 0, /* (0x89) */ + 0, /* (0x8a) */ + 0, /* (0x8b) */ + 0, /* (0x8c) */ + 0, /* (0x8d) */ + 0, /* (0x8e) */ + 0, /* (0x8f) */ + 0, /* (0x90) */ + 0, /* (0x91) */ + 0, /* (0x92) */ + 0, /* (0x93) */ + 0, /* (0x94) */ + 0, /* (0x95) */ + 0, /* (0x96) */ + 0, /* (0x97) */ + 0, /* (0x98) */ + 0, /* (0x99) */ + 0, /* (0x9a) */ + 0, /* (0x9b) */ + 0, /* (0x9c) */ + 0, /* (0x9d) */ + 0, /* (0x9e) */ + 0, /* (0x9f) */ + 1722, /* (0xa0) */ + 1730, /* (0xa1) */ + 1738, /* (0xa2) */ + 1758, /* (0xa3) */ + 1778, /* (0xa4) */ + 1798, /* (0xa5) */ + 1818, /* (0xa6) */ + 1826, /* (0xa7) */ + 1846, /* (0xa8) */ + 1866, /* (0xa9) */ + 1890, /* (0xaa) */ + 1906, /* (0xab) */ + 1924, /* (0xac) */ + 1944, /* (0xad) */ + 1954, /* (0xae) */ + 1974, /* (0xaf) */ + 1994, /* (0xb0) */ + 2002, /* (0xb1) */ + 2022, /* (0xb2) */ + 2036, /* (0xb3) */ + 2050, /* (0xb4) */ + 2070, /* (0xb5) */ + 2090, /* (0xb6) */ + 2110, /* (0xb7) */ + 2130, /* (0xb8) */ + 2150, /* (0xb9) */ + 2164, /* (0xba) */ + 2180, /* (0xbb) */ + 2198, /* (0xbc) */ + 2226, /* (0xbd) */ + 2254, /* (0xbe) */ + 2284, /* (0xbf) */ + 2300, /* (0xc0) */ + 2322, /* (0xc1) */ + 2344, /* (0xc2) */ + 2366, /* (0xc3) */ + 2388, /* (0xc4) */ + 2408, /* (0xc5) */ + 2430, /* (0xc6) */ + 2456, /* (0xc7) */ + 2478, /* (0xc8) */ + 2496, /* (0xc9) */ + 2514, /* (0xca) */ + 2532, /* (0xcb) */ + 2550, /* (0xcc) */ + 2562, /* (0xcd) */ + 2574, /* (0xce) */ + 2586, /* (0xcf) */ + 2598, /* (0xd0) */ + 2622, /* (0xd1) */ + 2646, /* (0xd2) */ + 2670, /* (0xd3) */ + 2694, /* (0xd4) */ + 2718, /* (0xd5) */ + 2742, /* (0xd6) */ + 2766, /* (0xd7) */ + 2786, /* (0xd8) */ + 2810, /* (0xd9) */ + 2834, /* (0xda) */ + 2858, /* (0xdb) */ + 2882, /* (0xdc) */ + 2906, /* (0xdd) */ + 2926, /* (0xde) */ + 2944, /* (0xdf) */ + 2964, /* (0xe0) */ + 2982, /* (0xe1) */ + 3000, /* (0xe2) */ + 3018, /* (0xe3) */ + 3036, /* (0xe4) */ + 3054, /* (0xe5) */ + 3072, /* (0xe6) */ + 3100, /* (0xe7) */ + 3118, /* (0xe8) */ + 3136, /* (0xe9) */ + 3154, /* (0xea) */ + 3172, /* (0xeb) */ + 3190, /* (0xec) */ + 3198, /* (0xed) */ + 3206, /* (0xee) */ + 3214, /* (0xef) */ + 3222, /* (0xf0) */ + 3242, /* (0xf1) */ + 3262, /* (0xf2) */ + 3282, /* (0xf3) */ + 3302, /* (0xf4) */ + 3322, /* (0xf5) */ + 3342, /* (0xf6) */ + 3362, /* (0xf7) */ + 3382, /* (0xf8) */ + 3402, /* (0xf9) */ + 3422, /* (0xfa) */ + 3442, /* (0xfb) */ + 3462, /* (0xfc) */ + 3482, /* (0xfd) */ + 3500, /* (0xfe) */ + 3520, /* (0xff) */ +}; + +/* Character width data. */ +static const PROGMEM uint8_t luBS14_width[] = { + 12, /* (0x00) */ + 12, /* (0x01) */ + 12, /* (0x02) */ + 12, /* (0x03) */ + 12, /* (0x04) */ + 12, /* (0x05) */ + 12, /* (0x06) */ + 12, /* (0x07) */ + 12, /* (0x08) */ + 12, /* (0x09) */ + 12, /* (0x0a) */ + 12, /* (0x0b) */ + 12, /* (0x0c) */ + 12, /* (0x0d) */ + 12, /* (0x0e) */ + 12, /* (0x0f) */ + 12, /* (0x10) */ + 12, /* (0x11) */ + 12, /* (0x12) */ + 12, /* (0x13) */ + 12, /* (0x14) */ + 12, /* (0x15) */ + 12, /* (0x16) */ + 12, /* (0x17) */ + 12, /* (0x18) */ + 12, /* (0x19) */ + 12, /* (0x1a) */ + 12, /* (0x1b) */ + 12, /* (0x1c) */ + 12, /* (0x1d) */ + 12, /* (0x1e) */ + 12, /* (0x1f) */ + 4, /* (0x20) */ + 4, /* (0x21) */ + 7, /* (0x22) */ + 10, /* (0x23) */ + 10, /* (0x24) */ + 12, /* (0x25) */ + 11, /* (0x26) */ + 4, /* (0x27) */ + 6, /* (0x28) */ + 6, /* (0x29) */ + 7, /* (0x2a) */ + 10, /* (0x2b) */ + 4, /* (0x2c) */ + 5, /* (0x2d) */ + 4, /* (0x2e) */ + 8, /* (0x2f) */ + 10, /* (0x30) */ + 10, /* (0x31) */ + 10, /* (0x32) */ + 10, /* (0x33) */ + 10, /* (0x34) */ + 10, /* (0x35) */ + 10, /* (0x36) */ + 10, /* (0x37) */ + 10, /* (0x38) */ + 10, /* (0x39) */ + 4, /* (0x3a) */ + 4, /* (0x3b) */ + 10, /* (0x3c) */ + 10, /* (0x3d) */ + 10, /* (0x3e) */ + 8, /* (0x3f) */ + 12, /* (0x40) */ + 11, /* (0x41) */ + 10, /* (0x42) */ + 11, /* (0x43) */ + 12, /* (0x44) */ + 9, /* (0x45) */ + 9, /* (0x46) */ + 11, /* (0x47) */ + 12, /* (0x48) */ + 6, /* (0x49) */ + 6, /* (0x4a) */ + 11, /* (0x4b) */ + 9, /* (0x4c) */ + 15, /* (0x4d) */ + 12, /* (0x4e) */ + 12, /* (0x4f) */ + 9, /* (0x50) */ + 12, /* (0x51) */ + 11, /* (0x52) */ + 9, /* (0x53) */ + 10, /* (0x54) */ + 12, /* (0x55) */ + 11, /* (0x56) */ + 13, /* (0x57) */ + 9, /* (0x58) */ + 10, /* (0x59) */ + 9, /* (0x5a) */ + 6, /* (0x5b) */ + 8, /* (0x5c) */ + 6, /* (0x5d) */ + 10, /* (0x5e) */ + 11, /* (0x5f) */ + 10, /* (0x60) */ + 9, /* (0x61) */ + 10, /* (0x62) */ + 9, /* (0x63) */ + 10, /* (0x64) */ + 9, /* (0x65) */ + 7, /* (0x66) */ + 10, /* (0x67) */ + 10, /* (0x68) */ + 4, /* (0x69) */ + 5, /* (0x6a) */ + 9, /* (0x6b) */ + 4, /* (0x6c) */ + 14, /* (0x6d) */ + 10, /* (0x6e) */ + 10, /* (0x6f) */ + 10, /* (0x70) */ + 10, /* (0x71) */ + 8, /* (0x72) */ + 8, /* (0x73) */ + 7, /* (0x74) */ + 10, /* (0x75) */ + 9, /* (0x76) */ + 13, /* (0x77) */ + 9, /* (0x78) */ + 9, /* (0x79) */ + 9, /* (0x7a) */ + 6, /* (0x7b) */ + 4, /* (0x7c) */ + 6, /* (0x7d) */ + 9, /* (0x7e) */ + 12, /* (0x7f) */ + 12, /* (0x80) */ + 12, /* (0x81) */ + 12, /* (0x82) */ + 12, /* (0x83) */ + 12, /* (0x84) */ + 12, /* (0x85) */ + 12, /* (0x86) */ + 12, /* (0x87) */ + 12, /* (0x88) */ + 12, /* (0x89) */ + 12, /* (0x8a) */ + 12, /* (0x8b) */ + 12, /* (0x8c) */ + 12, /* (0x8d) */ + 12, /* (0x8e) */ + 12, /* (0x8f) */ + 12, /* (0x90) */ + 12, /* (0x91) */ + 12, /* (0x92) */ + 12, /* (0x93) */ + 12, /* (0x94) */ + 12, /* (0x95) */ + 12, /* (0x96) */ + 12, /* (0x97) */ + 12, /* (0x98) */ + 12, /* (0x99) */ + 12, /* (0x9a) */ + 12, /* (0x9b) */ + 12, /* (0x9c) */ + 12, /* (0x9d) */ + 12, /* (0x9e) */ + 12, /* (0x9f) */ + 4, /* (0xa0) */ + 4, /* (0xa1) */ + 10, /* (0xa2) */ + 10, /* (0xa3) */ + 10, /* (0xa4) */ + 10, /* (0xa5) */ + 4, /* (0xa6) */ + 10, /* (0xa7) */ + 10, /* (0xa8) */ + 12, /* (0xa9) */ + 8, /* (0xaa) */ + 9, /* (0xab) */ + 10, /* (0xac) */ + 5, /* (0xad) */ + 10, /* (0xae) */ + 10, /* (0xaf) */ + 4, /* (0xb0) */ + 10, /* (0xb1) */ + 7, /* (0xb2) */ + 7, /* (0xb3) */ + 10, /* (0xb4) */ + 10, /* (0xb5) */ + 10, /* (0xb6) */ + 10, /* (0xb7) */ + 10, /* (0xb8) */ + 7, /* (0xb9) */ + 8, /* (0xba) */ + 9, /* (0xbb) */ + 14, /* (0xbc) */ + 14, /* (0xbd) */ + 15, /* (0xbe) */ + 8, /* (0xbf) */ + 11, /* (0xc0) */ + 11, /* (0xc1) */ + 11, /* (0xc2) */ + 11, /* (0xc3) */ + 10, /* (0xc4) */ + 11, /* (0xc5) */ + 13, /* (0xc6) */ + 11, /* (0xc7) */ + 9, /* (0xc8) */ + 9, /* (0xc9) */ + 9, /* (0xca) */ + 9, /* (0xcb) */ + 6, /* (0xcc) */ + 6, /* (0xcd) */ + 6, /* (0xce) */ + 6, /* (0xcf) */ + 12, /* (0xd0) */ + 12, /* (0xd1) */ + 12, /* (0xd2) */ + 12, /* (0xd3) */ + 12, /* (0xd4) */ + 12, /* (0xd5) */ + 12, /* (0xd6) */ + 10, /* (0xd7) */ + 12, /* (0xd8) */ + 12, /* (0xd9) */ + 12, /* (0xda) */ + 12, /* (0xdb) */ + 12, /* (0xdc) */ + 10, /* (0xdd) */ + 9, /* (0xde) */ + 10, /* (0xdf) */ + 9, /* (0xe0) */ + 9, /* (0xe1) */ + 9, /* (0xe2) */ + 9, /* (0xe3) */ + 9, /* (0xe4) */ + 9, /* (0xe5) */ + 14, /* (0xe6) */ + 9, /* (0xe7) */ + 9, /* (0xe8) */ + 9, /* (0xe9) */ + 9, /* (0xea) */ + 9, /* (0xeb) */ + 4, /* (0xec) */ + 4, /* (0xed) */ + 4, /* (0xee) */ + 4, /* (0xef) */ + 10, /* (0xf0) */ + 10, /* (0xf1) */ + 10, /* (0xf2) */ + 10, /* (0xf3) */ + 10, /* (0xf4) */ + 10, /* (0xf5) */ + 10, /* (0xf6) */ + 10, /* (0xf7) */ + 10, /* (0xf8) */ + 10, /* (0xf9) */ + 10, /* (0xfa) */ + 10, /* (0xfb) */ + 10, /* (0xfc) */ + 9, /* (0xfd) */ + 10, /* (0xfe) */ + 9, /* (0xff) */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_luBS14 = +{ + /* .glyph = */ font_luBS14_glyphs, + /* .name = "luBS14", */ + /* .width = */ 15, + /* .height = */ 15, + /* .ascent = 13, */ + /* .first = */ 0, + /* .last = */ 255, + /* .offset = */ luBS14_offset, + /* .width = */ luBS14_width, +}; diff --git a/2.5/bertos/fonts/ncenB18.bdf b/2.5/bertos/fonts/ncenB18.bdf new file mode 100644 index 00000000..d8eae064 --- /dev/null +++ b/2.5/bertos/fonts/ncenB18.bdf @@ -0,0 +1,16273 @@ +STARTFONT 2.1 +FONT -Adobe-New Century Schoolbook-Bold-R-Normal--18-180-75-75-P-113-ISO10646-1 +SIZE 18 75 75 +FONTBOUNDINGBOX 24 31 -3 -8 +COMMENT $Xorg: $ +COMMENT ISO10646-1 extension by Markus Kuhn , 2001-03-20 +COMMENT +COMMENT + +COMMENT Copyright 1984-1989, 1994 Adobe Systems Incorporated. +COMMENT Copyright 1988, 1994 Digital Equipment Corporation. +COMMENT +COMMENT Adobe is a trademark of Adobe Systems Incorporated which may be +COMMENT registered in certain jurisdictions. +COMMENT Permission to use these trademarks is hereby granted only in +COMMENT association with the images described in this file. +COMMENT +COMMENT Permission to use, copy, modify, distribute and sell this software +COMMENT and its documentation for any purpose and without fee is hereby +COMMENT granted, provided that the above copyright notices appear in all +COMMENT copies and that both those copyright notices and this permission +COMMENT notice appear in supporting documentation, and that the names of +COMMENT Adobe Systems and Digital Equipment Corporation not be used in +COMMENT advertising or publicity pertaining to distribution of the software +COMMENT without specific, written prior permission. Adobe Systems and +COMMENT Digital Equipment Corporation make no representations about the +COMMENT suitability of this software for any purpose. It is provided "as +COMMENT is" without express or implied warranty. +COMMENT - +STARTPROPERTIES 26 +FOUNDRY "Adobe" +FAMILY_NAME "New Century Schoolbook" +WEIGHT_NAME "Bold" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 18 +POINT_SIZE 180 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "P" +AVERAGE_WIDTH 113 +CHARSET_REGISTRY "ISO10646" +CHARSET_ENCODING "1" +CAP_HEIGHT 14 +X_HEIGHT 9 +FONT_ASCENT 16 +FONT_DESCENT 4 +FACE_NAME "New Century Schoolbook Bold" +COPYRIGHT "Copyright (c) 1984, 1987 Adobe Systems Incorporated. All Rights Reserved. Copyright (c) 1988, 1991 Digital Equipment Corporation. All Rights Reserved." +NOTICE "New Century Schoolbook is a trademark of Linotype-Hell AG and/or its subsidiaries." +_DEC_DEVICE_FONTNAMES "PS=NewCenturySchlbk-Bold" +DEFAULT_CHAR 0 +RELATIVE_SETWIDTH 50 +RELATIVE_WEIGHT 70 +FULL_NAME "New Century Schoolbook Bold" +ENDPROPERTIES +CHARS 756 +STARTCHAR char0 +ENCODING 0 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 13 13 1 0 +BITMAP +AAA8 +0000 +8008 +0000 +8008 +0000 +8008 +0000 +8008 +0000 +8008 +0000 +AAA8 +ENDCHAR +STARTCHAR space +ENCODING 32 +SWIDTH 287 0 +DWIDTH 5 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclam +ENCODING 33 +SWIDTH 296 0 +DWIDTH 6 0 +BBX 4 14 1 0 +BITMAP +60 +F0 +F0 +F0 +F0 +F0 +60 +60 +60 +00 +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR quotedbl +ENCODING 34 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 5 5 1 9 +BITMAP +D8 +D8 +D8 +D8 +D8 +ENDCHAR +STARTCHAR numbersign +ENCODING 35 +SWIDTH 574 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +0D80 +0D80 +0D80 +7FE0 +7FE0 +1B00 +1B00 +FFC0 +FFC0 +3600 +3600 +3600 +3600 +ENDCHAR +STARTCHAR dollar +ENCODING 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+FBE0 +ENDCHAR +STARTCHAR fl +ENCODING -1 +SWIDTH 685 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +1EC0 +33C0 +71C0 +71C0 +71C0 +FFC0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +FBE0 +ENDCHAR +ENDFONT diff --git a/2.5/bertos/fonts/ncenB18.c b/2.5/bertos/fonts/ncenB18.c new file mode 100644 index 00000000..3a1f8157 --- /dev/null +++ b/2.5/bertos/fonts/ncenB18.c @@ -0,0 +1,1508 @@ +/* Generated by convbdf on Thu Apr 8 18:53:54 CEST 2010. */ +#include + +/* Font information: + + name: -Adobe-New Century Schoolbook-Bold-R-Normal--18-180-75-75-P-113-ISO10646-1 + pixel size: 18 + ascent: 16 + descent: 4 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_ncenB18_glyphs[] = { + +/* Character (0x00): bbw=13, bbh=13, bbx=1, bby=0, width=16 */ +0x00, 0xa8, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0xa8, 0x00, 0x00, /* * * * * * * * * * * * */ +0x00, 0xaa, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0xaa, 0x00, 0x00, /* * * * * * * * * * * * * * * * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * * * * * * * * * * * */ + +/* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=4, bbh=14, bbx=1, bby=0, width=6 */ +0x00, 0xf8, 0xfc, 0xfc, 0xf8, 0x00, /* ***** ****** ****** ***** */ +0x00, 0x60, 0xf7, 0xf7, 0x60, 0x00, /* ***** ****** ****** ***** ** *** ******* **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ****** ****** ***** ** *** ******* **** ** */ + +/* Character (0x22): bbw=5, bbh=5, bbx=1, bby=9, width=8 */ +0x00, 0x7c, 0x7c, 0x00, 0x7c, 0x7c, 0x00, 0x00, /* ***** ***** ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** ***** ***** */ + +/* Character (0x23): bbw=11, bbh=13, bbx=0, bby=0, width=12 */ +0x00, 0xc0, 0xc0, 0xc0, 0xf8, 0xf8, 0xc0, 0xf8, 0xf8, 0xc0, 0xc0, 0x00, /* ** ** ** ***** ***** ** ***** ***** ** ** */ +0x0c, 0x0c, 0xfc, 0xff, 0x0f, 0xfc, 0xff, 0x0f, 0x0c, 0x0c, 0x00, 0x00, /* ** ** ** ***** ***** ** ***** ***** ** ** ** ** ****************** ****************** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ***** ***** ** ***** ***** ** ** ** ** ****************** ****************** ** ** */ + +/* Character (0x24): bbw=9, bbh=18, bbx=1, bby=-2, width=11 */ +0x00, 0xf0, 0xf8, 0xcc, 0x84, 0xff, 0x04, 0x0c, 0x38, 0x38, 0x00, /* **** ***** ** ** * ********* * ** *** *** */ +0x00, 0x70, 0xf1, 0xc3, 0x83, 0xff, 0x87, 0xcf, 0xfe, 0x7c, 0x00, /* **** ***** ** ** * ********* * ** *** *** *** * ****** **** ************ ***** ** ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * ********* * ** *** *** *** * ****** **** ************ ***** ** ******* ***** ** */ + +/* Character (0x25): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0xf0, 0xf8, 0x0c, 0x04, 0x84, 0x78, 0x08, 0xc8, 0x74, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** * * * **** * * ** * *** *** */ +0x00, 0x01, 0x01, 0xc1, 0x70, 0x1c, 0x07, 0x01, 0x78, 0xfc, 0x86, 0x82, 0x42, 0x3c, 0x00, /* **** ***** ** * * * **** * * ** * *** *** * * * ** *** *** *** * **** ****** ** * * * * * **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** * * * **** * * ** * *** *** * * * ** *** *** *** * **** ****** ** * * * * * **** */ + +/* Character (0x26): bbw=16, bbh=14, bbx=0, bby=0, width=17 */ +0x00, 0x00, 0x00, 0xf0, 0xf8, 0xcc, 0x84, 0xc4, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * * * ** ** ** *** */ +0x78, 0x7c, 0xfe, 0xc6, 0x83, 0x87, 0x8f, 0xde, 0x7c, 0x78, 0x79, 0xe7, 0xc3, 0xc1, 0x41, 0x20, 0x00, /* **** ***** ** ** * * * ** ** ** *** **** ***** ******* ** **** **** ***** * **** ** ***** **** * **** *** ***** *** *** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * * * ** ** ** *** **** ***** ******* ** **** **** ***** * **** ** ***** **** * **** *** ***** *** *** * * */ + +/* Character (0x27): bbw=2, bbh=5, bbx=1, bby=9, width=5 */ +0x00, 0x7c, 0x7c, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** */ + +/* Character (0x28): bbw=5, bbh=16, bbx=1, bby=-2, width=6 */ +0x00, 0xc0, 0xf0, 0x38, 0x0c, 0x04, /* ** **** *** ** * */ +0x00, 0x3f, 0xff, 0xc0, 0x00, 0x00, /* ** **** *** ** * ****** ******** ** */ +0x00, 0x00, 0x00, 0x01, 0x03, 0x02, /* ** **** *** ** * ****** ******** ** * ** * */ + +/* Character (0x29): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */ +0x04, 0x0c, 0x38, 0xf0, 0xc0, 0x00, /* * ** *** **** ** */ +0x00, 0x00, 0xc0, 0xff, 0x3f, 0x00, /* * ** *** **** ** **************** */ +0x02, 0x03, 0x01, 0x00, 0x00, 0x00, /* * ** *** **** ** **************** * ** * */ + +/* Character (0x2a): bbw=7, bbh=7, bbx=0, bby=7, width=8 */ +0xd8, 0x50, 0x24, 0xfc, 0x24, 0x50, 0xd8, 0x00, /* ** ** * * * * ****** * * * * ** ** */ +0x00, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, /* ** ** * * * * ****** * * * * ** ** * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * * * ****** * * * * ** ** * * * */ + +/* Character (0x2b): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** */ +0x0c, 0x0c, 0x0c, 0x0c, 0xff, 0xff, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** ** **************** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** **************** ** ** ** ** */ + +/* Character (0x2c): bbw=4, bbh=7, bbx=0, bby=-3, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x60, 0xf0, 0xf0, 0xe0, 0x00, /* ** **** **** *** */ +0x04, 0x02, 0x01, 0x00, 0x00, /* ** **** **** *** * * * */ + +/* Character (0x2d): bbw=5, bbh=2, bbx=0, bby=4, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** */ + +/* Character (0x2e): bbw=4, bbh=4, bbx=0, bby=0, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x60, 0xf0, 0xf0, 0x60, 0x00, /* ** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** */ + +/* Character (0x2f): bbw=6, bbh=14, bbx=0, bby=0, width=7 */ +0x00, 0x00, 0x00, 0xe0, 0xfc, 0x1c, 0x00, /* *** ****** *** */ +0xc0, 0xf8, 0x3f, 0x07, 0x00, 0x00, 0x00, /* *** ****** *** ** *********** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** ****** *** ** *********** *** */ + +/* Character (0x30): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xe0, 0xf8, 0xf8, 0x0c, 0x04, 0x0c, 0xf8, 0xf8, 0xe0, 0x00, /* *** ***** ***** ** * ** ***** ***** *** */ +0x00, 0x1f, 0x7f, 0x7f, 0xc0, 0x80, 0xc0, 0x7f, 0x7f, 0x1f, 0x00, /* *** ***** ***** ** * ** ***** ***** *** ***** ******* ******* ** * ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** ***** ***** ** * ** ***** ***** *** ***** ******* ******* ** * ********* ******* ***** */ + +/* Character (0x31): bbw=7, bbh=14, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0x10, 0x10, 0xf8, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, /* * * ***** ****** ****** */ +0x00, 0x00, 0x80, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x00, 0x00, /* * * ***** ****** ****** * ************************* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ***** ****** ****** * ************************* * * */ + +/* Character (0x32): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xf8, 0xf0, 0x00, /* ** **** **** * * ** ****** ***** **** */ +0x00, 0xc0, 0xe0, 0xf0, 0xd8, 0xcc, 0xc7, 0xc7, 0xc3, 0xe0, 0x00, /* ** **** **** * * ** ****** ***** **** ** *** **** ** ** ** ***** ***** **** ** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ***** **** ** *** **** ** ** ** ***** ***** **** ** *** */ + +/* Character (0x33): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xf8, 0x70, 0x00, /* ** **** **** * * ** ****** ***** *** */ +0x00, 0x30, 0x78, 0xf8, 0x81, 0x81, 0xc1, 0xfe, 0x7e, 0x3c, 0x00, /* ** **** **** * * ** ****** ***** *** ** **** ****** ** ** ** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ***** *** ** **** ****** ** ** ** ******* ****** **** */ + +/* Character (0x34): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x80, 0x60, 0x18, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /* * ** ** ****** ****** ****** */ +0x00, 0x18, 0x16, 0x11, 0x10, 0x90, 0xff, 0xff, 0xff, 0x90, 0x00, /* * ** ** ****** ****** ****** ** ** * * * * * ************************* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** ****** ****** ****** ** ** * * * * * ************************* * * */ + +/* Character (0x35): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0xfc, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x0c, 0x04, 0x00, /* ****** ** * ** * ** * ** * ** * ** * */ +0x00, 0x30, 0x79, 0xf8, 0x80, 0x80, 0xc1, 0xff, 0x7f, 0x3e, 0x00, /* ****** ** * ** * ** * ** * ** * ** * ** * **** ***** * ** ***************** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ** * ** * ** * ** * ** * ** * ** * **** ***** * ** ***************** ***** */ + +/* Character (0x36): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xe0, 0xf8, 0xf8, 0x0c, 0x84, 0x84, 0xbc, 0x3c, 0x18, 0x00, /* *** ***** ***** ** * * * * **** * **** ** */ +0x00, 0x1f, 0x7f, 0x7f, 0xc1, 0x80, 0x81, 0x7f, 0x7f, 0x3e, 0x00, /* *** ***** ***** ** * * * * **** * **** ** ***** ******* ******* * ** ** ******** ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** ***** ***** ** * * * * **** * **** ** ***** ******* ******* * ** ** ******** ******* ***** */ + +/* Character (0x37): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x3c, 0x1c, 0x1c, 0x1c, 0x1c, 0xdc, 0xfc, 0x3c, 0x1c, 0x00, /* **** *** *** *** *** *** ** ****** **** *** */ +0x00, 0x00, 0x00, 0xf0, 0xfc, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, /* **** *** *** *** *** *** ** ****** **** *** **** ****************** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** *** *** *** *** *** ** ****** **** *** **** ****************** */ + +/* Character (0x38): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xf0, 0xf8, 0xc8, 0x84, 0x84, 0x04, 0x88, 0xf8, 0x70, 0x00, /* **** ***** * ** * * * * * * * ***** *** */ +0x00, 0x78, 0x7d, 0xc3, 0x83, 0x87, 0x87, 0x4f, 0x7e, 0x3c, 0x00, /* **** ***** * ** * * * * * * * ***** *** **** * ***** ** **** **** **** ***** * ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** * ** * * * * * * * ***** *** **** * ***** ** **** **** **** ***** * ****** **** */ + +/* Character (0x39): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xf0, 0xf8, 0xf8, 0x04, 0x04, 0x0c, 0xf8, 0xf8, 0xe0, 0x00, /* **** ***** ***** * * ** ***** ***** *** */ +0x00, 0x61, 0xf3, 0xf7, 0x86, 0x84, 0xc2, 0x7f, 0x7f, 0x1f, 0x00, /* **** ***** ***** * * ** ***** ***** *** * ** ** ******* **** ** * * * * ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ***** * * ** ***** ***** *** * ** ** ******* **** ** * * * * ********* ******* ***** */ + +/* Character (0x3a): bbw=4, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x00, 0x80, 0x80, 0x00, 0x00, /* * * */ +0x00, 0x63, 0xf7, 0xf7, 0x63, 0x00, /* * * ** ** *** ******* ****** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** ** *** ******* ****** ** */ + +/* Character (0x3b): bbw=4, bbh=12, bbx=1, bby=-3, width=6 */ +0x00, 0x00, 0x80, 0x80, 0x00, 0x00, /* * * */ +0x00, 0x63, 0xf7, 0xf7, 0xe3, 0x00, /* * * ** ** *** ******* ****** *** */ +0x00, 0x04, 0x02, 0x01, 0x00, 0x00, /* * * ** ** *** ******* ****** *** * * * */ + +/* Character (0x3c): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0xc0, 0xc0, 0x00, /* * * ** ** */ +0x0c, 0x0c, 0x1e, 0x1e, 0x33, 0x33, 0x61, 0x61, 0xc0, 0xc0, 0x00, /* * * ** ** ** ** **** **** ** ** ** ** * ** * ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** ** ** ** **** **** ** ** ** ** * ** * ** ** ** */ + +/* Character (0x3d): bbw=9, bbh=6, bbx=1, bby=2, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ + +/* Character (0x3e): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0xc0, 0xc0, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * */ +0xc0, 0xc0, 0x61, 0x61, 0x33, 0x33, 0x1e, 0x1e, 0x0c, 0x0c, 0x00, /* ** ** * * ** *** ** * ** ** ** ** ** **** **** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * ** *** ** * ** ** ** ** ** **** **** ** ** */ + +/* Character (0x3f): bbw=9, bbh=14, bbx=0, bby=0, width=10 */ +0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xfc, 0x78, 0x00, /* ** **** **** * * ** ****** ****** **** */ +0x00, 0x00, 0x60, 0xf4, 0xf6, 0x63, 0x01, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ****** **** ** * **** ** ****** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ****** **** ** * **** ** ****** ** * */ + +/* Character (0x40): bbw=15, bbh=14, bbx=0, bby=0, width=16 */ +0x80, 0xe0, 0x70, 0x18, 0x88, 0xcc, 0x64, 0x24, 0x24, 0xe4, 0xe4, 0x0c, 0x18, 0xf8, 0xe0, 0x00, /* * *** *** ** * * ** ** * ** * * * * * *** * *** ** ** ***** *** */ +0x1f, 0x7f, 0x60, 0xce, 0xdf, 0x91, 0x90, 0x88, 0x9e, 0xdf, 0x51, 0x58, 0x2e, 0x07, 0x01, 0x00, /* * *** *** ** * * ** ** * ** * * * * * *** * *** ** ** ***** *** ***** ******* ** *** ******* *** * * * * * * **** ****** *** * * ** * *** * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** *** ** * * ** ** * ** * * * * * *** * *** ** ** ***** *** ***** ******* ** *** ******* *** * * * * * * **** ****** *** * * ** * *** * *** * */ + +/* Character (0x41): bbw=14, bbh=14, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7c, 0xfc, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /* ** *** ***** ****** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* ** *** ***** ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ***** ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ + +/* Character (0x42): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x8c, 0xfc, 0xfc, 0x78, 0x00, 0x00, /* * ****** ****** ****** * * * ** * ****** ****** **** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x81, 0x81, 0xc7, 0x7e, 0x7e, 0x3c, 0x00, /* * ****** ****** ****** * * * ** * ****** ****** **** ************************** ** ** ** **** ** ****** ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * ** * ****** ****** **** ************************** ** ** ** **** ** ****** ****** **** */ + +/* Character (0x43): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** */ +0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0x40, 0x60, 0x18, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** */ + +/* Character (0x44): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** ************************* * * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** ************************* * * * * ** *** **** ******* ****** **** */ + +/* Character (0x45): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ + +/* Character (0x46): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0xfc, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ****** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x01, 0x03, 0x0f, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ****** ************************** ** ** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ****** ************************** ** ** **** */ + +/* Character (0x47): bbw=13, bbh=14, bbx=1, bby=0, width=15 */ +0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** */ +0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0xc4, 0x7c, 0x7c, 0xfc, 0x04, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * ** ***** ***** ****** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * ** ***** ***** ****** * */ + +/* Character (0x48): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x00, 0x00, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* * ****** ****** ****** * * * * ****** ****** ****** * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x01, 0x01, 0x81, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** ****** ****** * * * * ****** ****** ****** * ************************** ** ** * * ** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ****** ****** ****** * ************************** ** ** * * ** ************************* * */ + +/* Character (0x49): bbw=5, bbh=14, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, /* * ****** ****** ****** * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * ****** ****** ****** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * ************************* * */ + +/* Character (0x4a): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* * * ****** ****** ****** * */ +0x38, 0x7c, 0x9c, 0x98, 0x80, 0xc0, 0xe0, 0x7f, 0x7f, 0x3f, 0x00, 0x00, /* * * ****** ****** ****** * *** ***** *** * ** * * ** ********** ******* ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ****** * *** ***** *** * ** * * ** ********** ******* ****** */ + +/* Character (0x4b): bbw=15, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x80, 0xc0, 0x60, 0x34, 0x1c, 0x0c, 0x04, 0x04, 0x00, /* * ****** ****** ****** * * * ** ** * ** *** ** * * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x86, 0x83, 0x07, 0x0f, 0xbf, 0xfe, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, /* * ****** ****** ****** * * * ** ** * ** *** ** * * ************************* ** *** **** **** ****** * ******* ***** **** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * ** ** * ** *** ** * * ************************* ** *** **** **** ****** * ******* ***** **** *** ** * */ + +/* Character (0x4c): bbw=11, bbh=14, bbx=1, bby=0, width=12 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0xf8, /* * ****** ****** ****** * * ************************* * * * * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * ************************* * * * * ** *** ***** */ + +/* Character (0x4d): bbw=17, bbh=14, bbx=1, bby=0, width=19 */ +0x00, 0x00, 0x04, 0xfc, 0x1c, 0xfc, 0xfc, 0xf0, 0xc0, 0x00, 0x00, 0x00, 0xe0, 0x38, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* * ****** *** ****** ****** **** ** *** *** ****** ****** ****** * */ +0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x03, 0x1f, 0x7f, 0xfe, 0x3c, 0x07, 0x01, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** *** ****** ****** **** ** *** *** ****** ****** ****** * * ********** ** *** ***** ******* ******* **** *** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** *** ****** ****** **** ** *** *** ****** ****** ****** * * ********** ** *** ***** ******* ******* **** *** * ************************* * */ + +/* Character (0x4e): bbw=15, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0x0c, 0xfc, 0x3c, 0x7c, 0xf8, 0xe0, 0xc0, 0x80, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, /* * ** ****** **** ***** ***** *** ** * * ** ****** ** * */ +0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x00, 0x01, 0x07, 0x0f, 0x3e, 0x7c, 0xf0, 0xff, 0x00, 0x00, /* * ** ****** **** ***** ***** *** ** * * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ****** **** ***** ***** *** ** * * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ */ + +/* Character (0x4f): bbw=15, bbh=14, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ + +/* Character (0x50): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x8c, 0xfc, 0xfc, 0xf8, 0x00, /* * ****** ****** ****** * * * * ** * ****** ****** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x82, 0x82, 0x02, 0x03, 0x03, 0x01, 0x01, 0x00, 0x00, /* * ****** ****** ****** * * * * ** * ****** ****** ***** ************************* * * * * * ** ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** * ****** ****** ***** ************************* * * * * * ** ** * * */ + +/* Character (0x51): bbw=15, bbh=18, bbx=0, bby=-4, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xd0, 0xc8, 0x88, 0x98, 0xf8, 0xf0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** * ** * ** * * ** * ***** **** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0f, 0x0e, 0x0c, 0x06, 0x00, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** * ** * ** * * ** * ***** **** *** **** ******* ****** **** *** **** *** ** ** */ + +/* Character (0x52): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x84, 0xcc, 0xfc, 0xfc, 0x78, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ** ** ****** ****** **** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x01, 0x01, 0x07, 0x3f, 0xfe, 0xfc, 0xe0, 0x80, 0x40, 0x00, /* * ****** ****** ****** * * * * * ** ** ****** ****** **** ************************** ** * *** ****** ******* ****** *** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ** ** ****** ****** **** ************************** ** * *** ****** ******* ****** *** * * */ + +/* Character (0x53): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0xf0, 0xf8, 0xcc, 0x84, 0x84, 0x84, 0x84, 0x0c, 0x18, 0x3c, 0x00, 0x00, /* **** ***** ** ** * * * * * * * * ** ** **** */ +0xf8, 0x63, 0xc3, 0x83, 0x87, 0x87, 0x87, 0x87, 0xcf, 0x7f, 0x3e, 0x00, /* **** ***** ** ** * * * * * * * * ** ** **** ******* ** ** **** **** **** **** **** ***** ********* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * * * * * * * * ** ** **** ******* ** ** **** **** **** **** **** ***** ********* ***** */ + +/* Character (0x54): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x7c, 0x1c, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x1c, 0x7c, 0x00, /* ***** *** * * ****** ****** ****** * * *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, /* ***** *** * * ****** ****** ****** * * *** ***** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** *** * * ****** ****** ****** * * *** ***** ************************* * */ + +/* Character (0x55): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ****** * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ + +/* Character (0x56): bbw=14, bbh=14, bbx=0, bby=0, width=14 */ +0x04, 0x1c, 0xfc, 0xfc, 0xf4, 0x80, 0x00, 0x00, 0x00, 0x84, 0xfc, 0x1c, 0x0c, 0x04, /* * *** ****** ****** * **** * * * ****** *** ** * */ +0x00, 0x00, 0x00, 0x03, 0x0f, 0x3f, 0xfe, 0xf0, 0x3c, 0x07, 0x00, 0x00, 0x00, 0x00, /* * *** ****** ****** * **** * * * ****** *** ** * ** **** ****** ******* **** **** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ****** ****** * **** * * * ****** *** ** * ** **** ****** ******* **** **** *** */ + +/* Character (0x57): bbw=19, bbh=14, bbx=0, bby=0, width=19 */ +0x04, 0x3c, 0xfc, 0xfc, 0xe4, 0x00, 0x04, 0x8c, 0xfc, 0xfc, 0xfc, 0xc4, 0x00, 0x00, 0x84, 0xfc, 0x1c, 0x0c, 0x04, /* * **** ****** ****** * *** * ** * ****** ****** ****** * ** * * ****** *** ** * */ +0x00, 0x00, 0x01, 0x0f, 0x7f, 0xff, 0x3c, 0x07, 0x00, 0x01, 0x0f, 0x7f, 0xfe, 0x3c, 0x07, 0x00, 0x00, 0x00, 0x00, /* * **** ****** ****** * *** * ** * ****** ****** ****** * ** * * ****** *** ** * * **** ******* ******** **** *** * **** ******* ******* **** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * **** ****** ****** * *** * ** * ****** ****** ****** * ** * * ****** *** ** * * **** ******* ******** **** *** * **** ******* ******* **** *** */ + +/* Character (0x58): bbw=16, bbh=14, bbx=0, bby=0, width=17 */ +0x00, 0x04, 0x0c, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x80, 0xc0, 0x64, 0x3c, 0x1c, 0x0c, 0x04, 0x04, 0x00, /* * ** *** ***** ****** * **** ** * ** * ** **** *** ** * * */ +0x80, 0xc0, 0xe0, 0xf0, 0x98, 0x0c, 0x07, 0x03, 0x07, 0x9f, 0xfe, 0xfc, 0xf0, 0xe0, 0xc0, 0x80, 0x00, /* * ** *** ***** ****** * **** ** * ** * ** **** *** ** * * * ** *** **** ** * ** *** ** *** ***** * ******* ****** **** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** *** ***** ****** * **** ** * ** * ** **** *** ** * * * ** *** **** ** * ** *** ** *** ***** * ******* ****** **** *** ** * */ + +/* Character (0x59): bbw=13, bbh=14, bbx=1, bby=0, width=15 */ +0x00, 0x04, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x00, 0x00, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /* * *** ***** ****** * **** ** * * *** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x87, 0xff, 0xff, 0xff, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** ** * * *** **** ** * * *** *************************** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** ** * * *** **** ** * * *** *************************** * */ + +/* Character (0x5a): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x7c, 0x1c, 0x0c, 0x04, 0x04, 0xc4, 0xe4, 0xfc, 0x7c, 0x3c, 0x0c, 0x00, /* ***** *** ** * * * ** * *** ****** ***** **** ** */ +0x00, 0xc0, 0xf0, 0xf8, 0xfe, 0x9f, 0x8f, 0x83, 0x81, 0xc0, 0xe0, 0xf8, 0x00, /* ***** *** ** * * * ** * *** ****** ***** **** ** ** **** ***** ************ ***** *** ** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** *** ** * * * ** * *** ****** ***** **** ** ** **** ***** ************ ***** *** ** * ** *** ***** */ + +/* Character (0x5b): bbw=4, bbh=16, bbx=1, bby=-2, width=5 */ +0x00, 0xfc, 0xfc, 0x04, 0x04, /* ****** ****** * * */ +0x00, 0xff, 0xff, 0x00, 0x00, /* ****** ****** * * **************** */ +0x00, 0x03, 0x03, 0x02, 0x02, /* ****** ****** * * **************** ** ** * * */ + +/* Character (0x5c): bbw=8, bbh=14, bbx=0, bby=0, width=9 */ +0x0c, 0x3c, 0xf0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** */ +0x00, 0x00, 0x00, 0x03, 0x0f, 0x3c, 0xf0, 0xc0, 0x00, /* ** **** **** ** ** **** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** ** **** **** **** ** */ + +/* Character (0x5d): bbw=4, bbh=16, bbx=0, bby=-2, width=5 */ +0x04, 0x04, 0xfc, 0xfc, 0x00, /* * * ****** ****** */ +0x00, 0x00, 0xff, 0xff, 0x00, /* * * ****** ****** **************** */ +0x02, 0x02, 0x03, 0x03, 0x00, /* * * ****** ****** **************** * * ** ** */ + +/* Character (0x5e): bbw=8, bbh=8, bbx=0, bby=6, width=9 */ +0x00, 0xc0, 0xf0, 0x3c, 0x3c, 0xf0, 0xc0, 0x00, 0x00, /* ** **** **** **** **** ** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* ** **** **** **** **** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** **** **** ** ** ** ** ** */ + +/* Character (0x5f): bbw=10, bbh=2, bbx=0, bby=-3, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, /* ** ** ** ** ** ** ** ** ** ** */ + +/* Character (0x60): bbw=5, bbh=4, bbx=1, bby=10, width=7 */ +0x00, 0x0c, 0x1c, 0x18, 0x30, 0x20, 0x00, /* ** *** ** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ** ** * */ + +/* Character (0x61): bbw=10, bbh=9, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * * * * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0x62): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * */ +0x00, 0xff, 0xff, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * ****** ****** ****** * * * * *********************** * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * *********************** * ** * * ** ********* ******* ***** */ + +/* Character (0x63): bbw=9, bbh=9, bbx=0, bby=0, width=10 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x81, 0x43, 0x63, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** */ + +/* Character (0x64): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /* * * * * * ****** ****** ****** */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0x41, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * ****** ****** ****** ***** ******* ******* * ** * * ** * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ****** ****** ****** ***** ******* ******* * ** * * ** * ************************ * */ + +/* Character (0x65): bbw=10, bbh=9, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0x66): bbw=8, bbh=14, bbx=0, bby=0, width=7 */ +0x80, 0xf0, 0xf8, 0xfc, 0x84, 0x9c, 0x1c, /* * **** ***** ****** * * *** * *** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * **** ***** ****** * * *** * *** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * **** ***** ****** * * *** * *** ************************* * */ + +/* Character (0x67): bbw=11, bbh=15, bbx=0, bby=-4, width=11 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x60, 0x60, /* * * * * * * * ** ** */ +0x00, 0x6f, 0xff, 0xd9, 0xd0, 0xd0, 0xd9, 0xdf, 0xcf, 0x80, 0x00, /* * * * * * * * ** ** **** ** ********* ** ** * ** * *** ** ******* ****** ** * */ +0x07, 0x0f, 0x0c, 0x08, 0x08, 0x08, 0x08, 0x0d, 0x07, 0x03, 0x00, /* * * * * * * * ** ** **** ** ********* ** ** * ** * *** ** ******* ****** ** * *** **** ** * * * ** ***** ** */ + +/* Character (0x68): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** ****** ****** * * * * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ************************** * * ************************* * */ + +/* Character (0x69): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0x80, 0x9c, 0x9c, 0x9c, 0x00, 0x00, /* * *** * *** * *** * */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * *** * *** * *** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** * *** * *** * ************************* * */ + +/* Character (0x6a): bbw=7, bbh=18, bbx=0, bby=-4, width=9 */ +0x00, 0x00, 0x00, 0x80, 0x9c, 0x9c, 0x9c, 0x00, 0x00, /* * *** * *** * *** * */ +0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, /* * *** * *** * *** * ************************ */ +0x06, 0x0e, 0x0e, 0x08, 0x0f, 0x07, 0x03, 0x00, 0x00, /* * *** * *** * *** * ************************ ** *** *** ******** ** */ + +/* Character (0x6b): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * ****** ****** ****** * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x88, 0x1c, 0xbe, 0xf9, 0xf1, 0xe0, 0xc0, 0x80, 0x00, /* * ****** ****** ****** * * * * * ************************* * * *** ***** ** ****** **** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ************************* * * *** ***** ** ****** **** *** ** * */ + +/* Character (0x6c): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /* * ****** ****** ****** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** ****** ****** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** ************************* * */ + +/* Character (0x6d): bbw=19, bbh=9, bbx=0, bby=0, width=20 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * * * * * * * * ************************** * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * * ************************** * * ************************** * * ************************* * */ + +/* Character (0x6e): bbw=12, bbh=9, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * * * * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * ************************** * * ************************* * */ + +/* Character (0x6f): bbw=11, bbh=9, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0x70): bbw=12, bbh=13, bbx=0, bby=-4, width=13 */ +0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * */ +0x00, 0xff, 0xff, 0xff, 0x41, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * * * * ************************* * * * ** ********* ******* ***** */ +0x08, 0x0f, 0x0f, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * ************************* * * * ** ********* ******* ***** ************* * */ + +/* Character (0x71): bbw=12, bbh=13, bbx=0, bby=-4, width=12 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x00, /* * * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0x41, 0xff, 0xff, 0xff, 0x00, /* * * * * * * ***** ******* ******* * ** * * ** * ************************ */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0f, 0x0f, 0x0f, 0x08, /* * * * * * * ***** ******* ******* * ** * * ** * ************************ ************* * */ + +/* Character (0x72): bbw=8, bbh=9, bbx=0, bby=0, width=9 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x00, /* * * * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x03, 0x03, 0x00, /* * * * * * * * ************************** * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * ************************** * ** ** */ + +/* Character (0x73): bbw=9, bbh=9, bbx=0, bby=0, width=10 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x00, 0x00, /* * * * * * */ +0xe6, 0x4f, 0x8f, 0x8c, 0x9c, 0x9c, 0xf9, 0x7b, 0x30, 0x00, /* * * * * * ** ******* * **** * ** * *** * *** ** ******* **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ******* * **** * ** * *** * *** ** ******* **** ** */ + +/* Character (0x74): bbw=7, bbh=13, bbx=0, bby=0, width=8 */ +0x80, 0xc0, 0xf0, 0xf8, 0x80, 0x80, 0x00, 0x00, /* * ** **** ***** * * */ +0x00, 0x7f, 0xff, 0xff, 0x80, 0x80, 0x60, 0x00, /* * ** **** ***** * * ******* **************** * * ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** **** ***** * * ******* **************** * * ** */ + +/* Character (0x75): bbw=12, bbh=9, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ******* **************** ** * * * ************************ * */ + +/* Character (0x76): bbw=10, bbh=9, bbx=0, bby=0, width=10 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, /* * * * * * * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0c, 0x03, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** */ + +/* Character (0x77): bbw=16, bbh=9, bbx=0, bby=0, width=16 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, /* * * * * * * * * * * * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0f, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0c, 0x03, 0x00, /* * * * * * * * * * * * * * ** **** ****** ****** **** ** **** **** ****** ****** **** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * ** **** ****** ****** **** ** **** **** ****** ****** **** ** ** ** */ + +/* Character (0x78): bbw=11, bbh=9, bbx=0, bby=0, width=12 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, /* * * * * * * * * * */ +0x80, 0xc1, 0xc3, 0x27, 0x1f, 0xbe, 0xfc, 0xf2, 0xe1, 0xc1, 0x80, 0x00, /* * * * * * * * * * ** **** ***** * ***** ***** * ****** * ***** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * ** **** ***** * ***** ***** * ****** * ***** **** ** * */ + +/* Character (0x79): bbw=11, bbh=13, bbx=0, bby=-4, width=12 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, /* * * * * * * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** ** */ +0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** ** ** *** ** * * ** */ + +/* Character (0x7a): bbw=8, bbh=9, bbx=0, bby=0, width=10 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * * */ +0xc3, 0xe1, 0xf8, 0xfc, 0x9f, 0x87, 0xc3, 0xf1, 0x00, 0x00, /* * * * * * * * * ** *** *** ***** *********** **** *** *** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ** *** *** ***** *********** **** *** *** **** */ + +/* Character (0x7b): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */ +0x00, 0xf0, 0xf8, 0x04, 0x04, 0x00, /* **** ***** * * */ +0x02, 0xff, 0xfd, 0x00, 0x00, 0x00, /* **** ***** * * * ********* ****** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x00, /* **** ***** * * * ********* ****** * * * */ + +/* Character (0x7c): bbw=2, bbh=14, bbx=4, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** **************** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** **************** */ + +/* Character (0x7d): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */ +0x04, 0x04, 0xf8, 0xf0, 0x00, 0x00, /* * * ***** **** */ +0x00, 0x00, 0xfd, 0xff, 0x02, 0x00, /* * * ***** **** * ************** * */ +0x02, 0x02, 0x01, 0x00, 0x00, 0x00, /* * * ***** **** * ************** * * * * */ + +/* Character (0x7e): bbw=10, bbh=3, bbx=1, bby=4, width=12 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x08, 0x0c, 0x0e, 0x06, 0x06, 0x0c, 0x0c, 0x0e, 0x06, 0x02, 0x00, /* * ** *** ** ** ** ** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** *** ** ** ** ** *** ** * */ + +/* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=4, bbh=14, bbx=1, bby=-4, width=7 */ +0x00, 0x80, 0xc0, 0xc0, 0x80, 0x00, 0x00, /* * ** ** * */ +0x00, 0xc1, 0xfb, 0xfb, 0xc1, 0x00, 0x00, /* * ** ** * * **** ******* ****** ** */ +0x00, 0x07, 0x0f, 0x0f, 0x07, 0x00, 0x00, /* * ** ** * * **** ******* ****** ** *** *********** */ + +/* Character (0xa2): bbw=9, bbh=13, bbx=1, bby=-2, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x00, /* * * * * * ** */ +0x00, 0x3e, 0x7f, 0x7f, 0xc1, 0xb0, 0x8c, 0x83, 0x43, 0x63, 0x00, /* * * * * * ** ***** ******* ******* * ** ** * ** *** *** * ** ** */ +0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ***** ******* ******* * ** ** * ** *** *** * ** ** ** */ + +/* Character (0xa3): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0xf0, 0xf8, 0xfc, 0x04, 0x04, 0x34, 0x3c, 0x38, 0x00, 0x00, /* **** ***** ****** * * * ** **** *** */ +0xc2, 0xa2, 0xa3, 0x7f, 0xdf, 0xce, 0xc2, 0xc2, 0xe2, 0x70, 0x00, /* **** ***** ****** * * * ** **** *** * ** * * *** * ******** ***** ** *** ** * ** * ** * *** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ****** * * * ** **** *** * ** * * *** * ******** ***** ** *** ** * ** * ** * *** *** */ + +/* Character (0xa4): bbw=9, bbh=9, bbx=0, bby=2, width=10 */ +0x60, 0xe0, 0xc0, 0x60, 0x60, 0x60, 0xc0, 0xe0, 0x60, 0x00, /* ** *** ** ** ** ** ** *** ** */ +0x37, 0x3f, 0x18, 0x30, 0x30, 0x30, 0x18, 0x3f, 0x37, 0x00, /* ** *** ** ** ** ** ** *** ** *** ** ****** ** ** ** ** ** ****** *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ** ** ** ** ** *** ** *** ** ****** ** ** ** ** ** ****** *** ** */ + +/* Character (0xa5): bbw=13, bbh=14, bbx=1, bby=0, width=15 */ +0x00, 0x04, 0x1c, 0x3c, 0xfc, 0xf4, 0xc0, 0x00, 0x00, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /* * *** **** ****** * **** ** * * *** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x0a, 0x8b, 0xff, 0xff, 0xff, 0x8b, 0x0a, 0x00, 0x00, 0x00, 0x00, /* * *** **** ****** * **** ** * * *** **** ** * * * ** * *************************** * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** **** ****** * **** ** * * *** **** ** * * * ** * *************************** * * * * */ + +/* Character (0xa6): bbw=2, bbh=14, bbx=4, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** ****** ****** */ + +/* Character (0xa7): bbw=7, bbh=16, bbx=0, bby=-2, width=8 */ +0x38, 0xec, 0xc4, 0xc4, 0x9c, 0x98, 0x00, 0x00, /* *** ** *** * ** * ** *** * ** * */ +0x8f, 0x9c, 0x18, 0x39, 0x31, 0xf3, 0x0f, 0x00, /* *** ** *** * ** * ** *** * ** * **** * *** * ** * *** * ** ** ******** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, 0x00, /* *** ** *** * ** * ** *** * ** * **** * *** * ** * *** * ** ** ******** * ** * * ** * */ + +/* Character (0xa8): bbw=6, bbh=2, bbx=2, bby=10, width=10 */ +0x00, 0x00, 0x30, 0x30, 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, /* ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** */ + +/* Character (0xa9): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x80, 0x60, 0x10, 0x88, 0xc8, 0x64, 0x24, 0x24, 0x64, 0xe8, 0x08, 0x10, 0x60, 0x80, 0x00, /* * ** * * * * ** * ** * * * * * ** * *** * * ** * */ +0x07, 0x18, 0x20, 0x47, 0x4f, 0x98, 0x90, 0x90, 0x90, 0x48, 0x40, 0x20, 0x18, 0x07, 0x00, /* * ** * * * * ** * ** * * * * * ** * *** * * ** * *** ** * *** * **** * ** * * * * * * * * * * * ** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * * * * ** * ** * * * * * ** * *** * * ** * *** ** * *** * **** * ** * * * * * * * * * * * ** *** */ + +/* Character (0xaa): bbw=7, bbh=8, bbx=0, bby=6, width=8 */ +0x68, 0xec, 0x94, 0x54, 0xfc, 0xf8, 0x80, 0x00, /* * ** ** *** * * * * * * ****** ***** * */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* * ** ** *** * * * * * * ****** ***** * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** *** * * * * * * ****** ***** * * * * * * * * */ + +/* Character (0xab): bbw=8, bbh=5, bbx=0, bby=3, width=9 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x04, 0x0e, 0x0a, 0x11, 0x04, 0x0e, 0x0a, 0x11, 0x00, /* * *** * * * * * *** * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** * * * * * *** * * * * */ + +/* Character (0xac): bbw=9, bbh=6, bbx=0, bby=2, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x3f, 0x3f, 0x00, /* ** ** ** ** ** ** ** ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** ** ****** ****** */ + +/* Character (0xad): bbw=5, bbh=2, bbx=0, bby=4, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** */ + +/* Character (0xae): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x80, 0x60, 0x10, 0x28, 0xe8, 0xe4, 0x24, 0x24, 0xe4, 0xc8, 0x08, 0x10, 0x60, 0x80, 0x00, /* * ** * * * * *** * *** * * * * * *** * ** * * ** * */ +0x07, 0x18, 0x20, 0x48, 0x4f, 0x8f, 0x89, 0x83, 0x8f, 0x4c, 0x48, 0x20, 0x18, 0x07, 0x00, /* * ** * * * * *** * *** * * * * * *** * ** * * ** * *** ** * * * **** * **** ** * *** ***** * ** * * * * ** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * * * * *** * *** * * * * * *** * ** * * ** * *** ** * * * **** * **** ** * *** ***** * ** * * * * ** *** */ + +/* Character (0xaf): bbw=6, bbh=2, bbx=1, bby=10, width=8 */ +0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x00, /* ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** */ + +/* Character (0xb0): bbw=6, bbh=6, bbx=0, bby=8, width=7 */ +0x78, 0xcc, 0x84, 0x84, 0xcc, 0x78, 0x00, /* **** ** ** * * * * ** ** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ** ** * * * * ** ** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ** ** * * * * ** ** **** */ + +/* Character (0xb1): bbw=10, bbh=11, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** */ +0xc3, 0xc3, 0xc3, 0xc3, 0xdf, 0xdf, 0xc3, 0xc3, 0xc3, 0xc3, 0x00, /* *** *** ** **** **** **** ******* ******* **** **** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** ** **** **** **** ******* ******* **** **** **** **** ** */ + +/* Character (0xb2): bbw=6, bbh=8, bbx=0, bby=6, width=6 */ +0x18, 0x9c, 0xc4, 0x64, 0x3c, 0x18, /* ** *** * * ** * ** **** ** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x03, /* ** *** * * ** * ** **** ** ** ** * * * ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** * * ** * ** **** ** ** ** * * * ** */ + +/* Character (0xb3): bbw=6, bbh=8, bbx=0, bby=6, width=6 */ +0x88, 0x8c, 0x24, 0x24, 0xfc, 0xd8, /* * * ** * * * * * ****** ** ** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, /* * * ** * * * * * ****** ** *** ** * * ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * ****** ** *** ** * * ** * */ + +/* Character (0xb4): bbw=5, bbh=4, bbx=1, bby=10, width=7 */ +0x00, 0x20, 0x30, 0x18, 0x1c, 0x0c, 0x00, /* * ** ** *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** *** ** */ + +/* Character (0xb5): bbw=12, bbh=13, bbx=0, bby=-4, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * * */ +0x00, 0xff, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * ************************ ** * * * ************************ * */ +0x00, 0x07, 0x0f, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ************************ ** * * * ************************ * *** **** ** */ + +/* Character (0xb6): bbw=13, bbh=14, bbx=0, bby=0, width=14 */ +0xf0, 0xf8, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* **** ***** ****** ****** ****** ****** ****** * * ****** ****** ****** * */ +0x00, 0x01, 0x03, 0x83, 0xff, 0xff, 0xff, 0x80, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* **** ***** ****** ****** ****** ****** ****** * * ****** ****** ****** * * ** ** ************************* * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ****** ****** ****** ****** ****** * * ****** ****** ****** * * ** ** ************************* * ************************* * */ + +/* Character (0xb7): bbw=4, bbh=4, bbx=0, bby=3, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x0c, 0x1e, 0x1e, 0x0c, 0x00, /* ** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** */ + +/* Character (0xb8): bbw=4, bbh=4, bbx=1, bby=-4, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, /* *** * *** ** */ + +/* Character (0xb9): bbw=6, bbh=8, bbx=0, bby=6, width=6 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, /* * * ****** ****** */ +0x02, 0x02, 0x03, 0x03, 0x02, 0x02, /* * * ****** ****** * * ** ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** * * ** ** * * */ + +/* Character (0xba): bbw=6, bbh=8, bbx=0, bby=6, width=7 */ +0x78, 0xfc, 0x84, 0x84, 0xfc, 0x78, 0x00, /* **** ****** * * * * ****** **** */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* **** ****** * * * * ****** **** * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ****** * * * * ****** **** * * * * * * */ + +/* Character (0xbb): bbw=8, bbh=5, bbx=0, bby=3, width=9 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x11, 0x0a, 0x0e, 0x04, 0x11, 0x0a, 0x0e, 0x04, 0x00, /* * * * * *** * * * * * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * *** * * * * * *** * */ + +/* Character (0xbc): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** */ +0x02, 0x02, 0x03, 0xc3, 0xf2, 0x3e, 0x0f, 0x33, 0x38, 0x2c, 0xa6, 0xff, 0xff, 0xa0, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** *** ** * ** * ***************** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** *** ** * ** * ***************** * * */ + +/* Character (0xbd): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** */ +0x02, 0x02, 0x03, 0xc3, 0xf2, 0x3e, 0x0f, 0x03, 0xc6, 0xe7, 0xb1, 0x99, 0x8f, 0xc6, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** ***** **** ** ** ** ***** * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** ***** **** ** ** ** ***** * ** ** */ + +/* Character (0xbe): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x88, 0x8c, 0x24, 0x24, 0xfc, 0xd8, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * ****** ** ** ** **** **** ** */ +0x01, 0x03, 0x02, 0xc2, 0xf3, 0x3d, 0x0f, 0x33, 0x38, 0x2c, 0xa6, 0xff, 0xff, 0xa0, 0x00, /* * * ** * * * * * ****** ** ** ** **** **** ** * ** * * **** ***** **** **** ** ** *** ** * ** * ***************** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * ****** ** ** ** **** **** ** * ** * * **** ***** **** **** ** ** *** ** * ** * ***************** * * */ + +/* Character (0xbf): bbw=9, bbh=14, bbx=0, bby=-4, width=10 */ +0x00, 0x00, 0x00, 0x80, 0xc0, 0xc0, 0x80, 0x00, 0x00, 0x00, /* * ** ** * */ +0x80, 0xc0, 0xe0, 0x31, 0x1b, 0x0b, 0x81, 0x80, 0x00, 0x00, /* * ** ** * * ** **** ** ** ** ** * * * * */ +0x07, 0x0f, 0x0f, 0x0c, 0x08, 0x08, 0x07, 0x07, 0x03, 0x00, /* * ** ** * * ** **** ** ** ** ** * * * * *** ******** ** * **** *** ** */ + +/* Character (0xc0): bbw=14, bbh=19, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7d, 0xfd, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * ** *** ** * */ + +/* Character (0xc1): bbw=14, bbh=19, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7d, 0xfd, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * ** *** ** */ + +/* Character (0xc2): bbw=14, bbh=18, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc1, 0x71, 0x7c, 0xfc, 0xf0, 0x81, 0x01, 0x00, 0x00, 0x00, /* * *** *** ***** ****** ***** ** */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* * *** *** ***** ****** ***** ** * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, /* * *** *** ***** ****** ***** ** * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * ** ** ** * */ + +/* Character (0xc3): bbw=14, bbh=18, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x01, 0xc0, 0x70, 0x7c, 0xfd, 0xf1, 0x80, 0x00, 0x00, 0x00, 0x00, /* * ** *** ***** * ******* **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* * ** *** ***** * ******* **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, /* * ** *** ***** * ******* **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * ** ** * * * * */ + +/* Character (0xc4): bbw=14, bbh=17, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc1, 0x71, 0x7c, 0xfc, 0xf1, 0x81, 0x00, 0x00, 0x00, 0x00, /* * *** *** ***** ******* ***** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* * *** *** ***** ******* ***** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, /* * *** *** ***** ******* ***** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * * * * */ + +/* Character (0xc5): bbw=14, bbh=18, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x71, 0x7e, 0xfe, 0xf1, 0x80, 0x00, 0x00, 0x00, 0x00, /* *** *** ****** ******** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* *** *** ****** ******** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x04, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** ****** ******** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * * * * */ + +/* Character (0xc6): bbw=20, bbh=14, bbx=0, bby=0, width=21 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc4, 0x74, 0x1c, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * * ** * *** *** * ****** ****** ****** * * * * * *** ** *** ***** */ +0x80, 0xc0, 0xf0, 0x8c, 0x06, 0x07, 0x04, 0x84, 0x84, 0x84, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * * ** * *** *** * ****** ****** ****** * * * * * *** ** *** ***** * ** **** ** * ** *** * * * * * * ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * *** *** * ****** ****** ****** * * * * * *** ** *** ***** * ** **** ** * ** *** * * * * * * ************************** ** *** ***** * ** *** ***** */ + +/* Character (0xc7): bbw=12, bbh=18, bbx=1, bby=-4, width=14 */ +0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** */ +0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0x40, 0x60, 0x18, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** *** * *** ** */ + +/* Character (0xc8): bbw=11, bbh=19, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x05, 0x85, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * ****** ****** ****** * * * * * * * *** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ****** ****** * * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** ** *** ** * */ + +/* Character (0xc9): bbw=11, bbh=19, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x05, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * ****** ****** ******* * * * * * * *** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ****** ******* * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** * ** *** ** */ + +/* Character (0xca): bbw=11, bbh=18, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfd, 0xfd, 0x04, 0x04, 0x84, 0xe5, 0x0d, 0x1c, 0x7c, 0x00, /* * ******* ******* ****** * * * ** * **** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ******* ******* ****** * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, /* * ******* ******* ****** * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** * ** ** ** * */ + +/* Character (0xcb): bbw=11, bbh=17, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfd, 0x05, 0x04, 0x84, 0xe5, 0x0d, 0x1c, 0x7c, 0x00, /* * ****** ******* ******* * * * ** * **** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ******* ******* * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, /* * ****** ******* ******* * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** * * * * */ + +/* Character (0xcc): bbw=5, bbh=19, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x04, 0xfc, 0xfc, 0xfd, 0x05, 0x00, 0x00, /* * ****** ******* ******* * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * ****** ******* ******* * ************************* * */ +0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, /* * ****** ******* ******* * ************************* * ** *** ** * */ + +/* Character (0xcd): bbw=6, bbh=19, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x04, 0xfd, 0xfd, 0xfc, 0x04, 0x00, 0x00, /* * * ******* ****** ****** * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * * ******* ****** ****** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, /* * * ******* ****** ****** * ************************* * * ** *** ** */ + +/* Character (0xce): bbw=7, bbh=18, bbx=1, bby=0, width=9 */ +0x00, 0x01, 0x05, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, /* * * * ****** ****** ******* * * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * * * ****** ****** ******* * * ************************* * */ +0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, /* * * * ****** ****** ******* * * ************************* * * ** ** ** * */ + +/* Character (0xcf): bbw=6, bbh=17, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x05, 0xfd, 0xfc, 0xfc, 0x05, 0x01, 0x00, /* * * * ****** ****** ******* * * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * * * ****** ****** ******* * * ************************* * */ +0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, /* * * * ****** ****** ******* * * ************************* * * * * * */ + +/* Character (0xd0): bbw=15, bbh=14, bbx=0, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** */ +0x01, 0x81, 0xff, 0xff, 0xff, 0x81, 0x81, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** * * ************************** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** * * ************************** ** * * * ** *** **** ******* ****** **** */ + +/* Character (0xd1): bbw=15, bbh=18, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0x0c, 0xfc, 0x3c, 0x7d, 0xf8, 0xe0, 0xc0, 0x81, 0x01, 0x04, 0x0c, 0xfc, 0x0c, 0x04, /* * ** ****** **** * ***** ***** *** *** ** * ** ****** ** * */ +0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x00, 0x01, 0x07, 0x0f, 0x3e, 0x7c, 0xf0, 0xff, 0x00, 0x00, /* * ** ****** **** * ***** ***** *** *** ** * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, /* * ** ****** **** * ***** ***** *** *** ** * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ * ** ** * * * * */ + +/* Character (0xd2): bbw=15, bbh=19, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x05, 0x05, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** ** *** ** * */ + +/* Character (0xd3): bbw=15, bbh=19, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x05, 0x05, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * ** *** ** */ + +/* Character (0xd4): bbw=15, bbh=18, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1d, 0x0d, 0x04, 0x04, 0x04, 0x0d, 0x1d, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** * *** * ** * * * * ** * *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** * *** * ** * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** * *** * ** * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * ** ** ** * */ + +/* Character (0xd5): bbw=15, bbh=18, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1d, 0x0c, 0x04, 0x04, 0x05, 0x0d, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** * *** ** * * * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** * *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** * *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * ** ** * * * * */ + +/* Character (0xd6): bbw=15, bbh=17, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0d, 0x05, 0x04, 0x04, 0x0d, 0x1d, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** * ** * * * * * ** * *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** * ** * * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** * ** * * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * * * * */ + +/* Character (0xd7): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0xc0, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc0, 0xc0, 0x00, /* ** ** * * ** ** */ +0xc0, 0xe1, 0x73, 0x3f, 0x1e, 0x1e, 0x3f, 0x73, 0xe1, 0xc0, 0x00, /* ** ** * * ** ** *** ***** *** ****** **** **** ****** ** *** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * ** ** *** ***** *** ****** **** **** ****** ** *** * *** ** */ + +/* Character (0xd8): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0xc0, 0xf0, 0xf8, 0x38, 0x0c, 0x04, 0x04, 0x84, 0x4c, 0x3c, 0x78, 0xf8, 0xf4, 0xc0, 0x00, /* ** **** ***** *** ** * * * * ** * **** **** ***** * **** ** */ +0x00, 0x8f, 0x7f, 0x7f, 0x70, 0xc8, 0x84, 0x83, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** *** ** * * * * ** * **** **** ***** * **** ** **** ******** ******* *** * ** * *** * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** *** ** * * * * ** * **** **** ***** * **** ** **** ******** ******* *** * ** * *** * * ** *** **** ******* ****** **** */ + +/* Character (0xd9): bbw=14, bbh=19, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, 0x01, 0x01, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** ** *** ** * */ + +/* Character (0xda): bbw=14, bbh=19, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x01, 0x01, 0x00, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** * ** *** ** */ + +/* Character (0xdb): bbw=14, bbh=18, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, 0x00, 0x00, 0x05, 0x0d, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** * ** ** ** * */ + +/* Character (0xdc): bbw=14, bbh=17, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, 0x00, 0x01, 0x05, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** * * * * */ + +/* Character (0xdd): bbw=13, bbh=19, bbx=1, bby=0, width=15 */ +0x00, 0x04, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x01, 0x01, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /* * *** ***** ****** * **** *** * * * *** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x87, 0xff, 0xff, 0xff, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** *** * * * *** **** ** * * *** *************************** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** *** * * * *** **** ** * * *** *************************** * * ** *** ** */ + +/* Character (0xde): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x24, 0x20, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0xc0, 0x00, /* * ****** ****** ****** * * * * * ** *** ** ** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x90, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x0f, 0x07, 0x00, /* * ****** ****** ****** * * * * * ** *** ** ** ************************* * * * * * ** **** **** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ** *** ** ** ************************* * * * * * ** **** **** *** */ + +/* Character (0xdf): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0xf0, 0xf8, 0xfc, 0x04, 0x04, 0x0c, 0xf8, 0xf8, 0x70, 0x00, 0x00, /* **** ***** ****** * * ** ***** ***** *** */ +0x80, 0xff, 0xff, 0xff, 0x00, 0x81, 0x81, 0xc3, 0x7e, 0x7e, 0x3c, 0x00, /* **** ***** ****** * * ** ***** ***** *** ************************* * ** *** ** ****** ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ****** * * ** ***** ***** *** ************************* * ** *** ** ****** ****** **** */ + +/* Character (0xe0): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0x8c, 0x9c, 0x98, 0xb0, 0xa0, 0x80, 0x00, 0x00, 0x00, /* * ** * *** * ** * ** * * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ** * *** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * *** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe1): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0xa0, 0xb0, 0x98, 0x9c, 0x8c, 0x80, 0x00, 0x00, 0x00, /* * * * ** * ** * *** * ** * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * ** * ** * *** * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * ** * *** * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe2): bbw=10, bbh=13, bbx=0, bby=0, width=11 */ +0x00, 0xa0, 0xb0, 0x98, 0x98, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * ** * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * ** * ** * ** * ** * ** * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * ** * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe3): bbw=10, bbh=13, bbx=0, bby=0, width=11 */ +0x00, 0xa0, 0x90, 0x98, 0x98, 0xb0, 0xb0, 0x90, 0x08, 0x00, 0x00, /* * * * * ** * ** * ** * ** * * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * ** * ** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ** * ** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe4): bbw=10, bbh=12, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0xb0, 0xb0, 0x80, 0x80, 0xb0, 0xb0, 0x00, 0x00, 0x00, /* * ** * ** * * * ** * ** * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ** * ** * * * ** * ** * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * * * ** * ** * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe5): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0x80, 0x98, 0xa4, 0xa4, 0x98, 0x80, 0x00, 0x00, 0x00, /* * * ** * * * * * * * ** * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * ** * * * * * * * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * * * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe6): bbw=16, bbh=9, bbx=0, bby=0, width=17 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ +0x72, 0xf3, 0xfb, 0x88, 0x88, 0x44, 0x7f, 0x7f, 0xff, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * * * * * * * * * * * *** ** ****** ***** * * * * * * ******* ******* ********* * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * *** ** ****** ***** * * * * * * ******* ******* ********* * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xe7): bbw=9, bbh=13, bbx=0, bby=-4, width=10 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x81, 0x43, 0x63, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** */ +0x00, 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** *** * *** ** */ + +/* Character (0xe8): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x0c, 0x9c, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, 0x00, /* ** *** * ** * ** * * * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* ** *** * ** * ** * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** * ** * ** * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xe9): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x20, 0xb0, 0x98, 0x9c, 0x8c, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * *** * ** * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * ** * ** * *** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * *** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xea): bbw=10, bbh=13, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x20, 0xb0, 0x98, 0x98, 0x98, 0x30, 0x20, 0x00, 0x00, /* * ** * ** * ** * ** * ** * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * ** * ** * ** * ** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xeb): bbw=10, bbh=12, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x30, 0xb0, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0x00, /* ** ** * * * ** * ** */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* ** ** * * * ** * ** ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * * ** * ** ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xec): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0x8c, 0x9c, 0x98, 0xb0, 0x20, 0x00, /* ** * *** * ** * ** * * */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* ** * *** * ** * ** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * *** * ** * ** * * ************************* * */ + +/* Character (0xed): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0xa0, 0xb0, 0x98, 0x9c, 0x0c, 0x00, /* * * ** * ** * *** * ** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * ** * ** * *** * ** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * *** * ** ************************* * */ + +/* Character (0xee): bbw=7, bbh=13, bbx=0, bby=0, width=7 */ +0x20, 0xb0, 0x98, 0x98, 0x98, 0x30, 0x20, /* * ** * ** * ** * ** * ** * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ** * ** * ** * ** * ** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * ************************* * */ + +/* Character (0xef): bbw=6, bbh=12, bbx=0, bby=0, width=6 */ +0xb0, 0xb0, 0x80, 0x80, 0x30, 0x30, /* ** * ** * * * ** ** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* ** * ** * * * ** ** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * ** * * * ** ** ************************* * */ + +/* Character (0xf0): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x24, 0x24, 0x98, 0x98, 0xb0, 0xe8, 0xc8, 0x80, 0x00, 0x00, 0x00, /* * * * * ** * ** * ** * * *** * ** * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * ** * ** * ** * * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ** * ** * ** * * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf1): bbw=12, bbh=13, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0xa0, 0x90, 0x18, 0x98, 0xb0, 0xb0, 0x90, 0x88, 0x00, 0x00, 0x00, /* * * * * * * ** ** * ** * ** * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * ** ** * ** * ** * * * * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * ** ** * ** * ** * * * * * ************************** * * ************************* * */ + +/* Character (0xf2): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0x8c, 0x9c, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, 0x00, /* ** * *** * ** * ** * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* ** * *** * ** * ** * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * *** * ** * ** * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf3): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0xa0, 0xb0, 0x98, 0x9c, 0x8c, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * *** * ** * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * ** * ** * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf4): bbw=11, bbh=13, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x20, 0xb0, 0x98, 0x98, 0x98, 0xb0, 0x20, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * ** * ** * ** * ** * ** * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf5): bbw=11, bbh=13, bbx=0, bby=0, width=12 */ +0x00, 0x20, 0x10, 0x98, 0x98, 0xb0, 0xb0, 0x90, 0x08, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * ** * ** * ** * ** * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf6): bbw=11, bbh=12, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0xb0, 0xb0, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0x00, /* ** * ** * * * ** * ** */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* ** * ** * * * ** * ** ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * ** * * * ** * ** ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf7): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** */ +0x0c, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ + +/* Character (0xf8): bbw=10, bbh=11, bbx=0, bby=-1, width=11 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0xc0, 0x00, 0x00, 0x00, /* * * * * ** */ +0x3e, 0x7f, 0xff, 0xc1, 0xb0, 0x8c, 0xc3, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * ** ***** ******* ********* ** ** * ** *** ********* ******* ***** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ** ***** ******* ********* ** ** * ** *** ********* ******* ***** * */ + +/* Character (0xf9): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x8c, 0x1c, 0x18, 0x30, 0xa0, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * ** * *** ** ** * * * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * ** * *** ** ** * * * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * *** ** ** * * * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfa): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x20, 0x30, 0x18, 0x9c, 0x8c, 0x80, 0x80, 0x00, 0x00, /* * * * * * ** ** *** * ** * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * ** ** *** * ** * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ** *** * ** * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfb): bbw=12, bbh=13, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0xa0, 0x30, 0x18, 0x18, 0x98, 0xb0, 0xa0, 0x80, 0x00, 0x00, /* * * * * * ** ** ** ** * ** * * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * ** ** ** ** * ** * * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ** ** ** * ** * * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfc): bbw=12, bbh=12, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0xb0, 0xb0, 0x80, 0x80, 0x00, 0x00, /* * * * ** * ** ** * ** * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * ** * ** ** * ** * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * ** ** * ** * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfd): bbw=11, bbh=18, bbx=0, bby=-4, width=12 */ +0x80, 0x80, 0x80, 0x80, 0xa0, 0x30, 0x18, 0x1c, 0x8c, 0x80, 0x80, 0x00, /* * * * * * * ** ** *** ** * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /* * * * * * * ** ** *** ** * * * ** **** ****** ****** **** ** ** ** ** */ +0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * ** ** *** ** * * * ** **** ****** ****** **** ** ** ** ** ** *** ** * * ** */ + +/* Character (0xfe): bbw=12, bbh=18, bbx=0, bby=-4, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * */ +0x00, 0xff, 0xff, 0xff, 0x41, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * ****** ****** ****** * * * * ************************* * * * ** ********* ******* ***** */ +0x08, 0x0f, 0x0f, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ************************* * * * ** ********* ******* ***** ************* * */ + +/* Character (0xff): bbw=11, bbh=16, bbx=0, bby=-4, width=12 */ +0x80, 0x80, 0x80, 0xb0, 0xb0, 0x00, 0x00, 0x30, 0xb0, 0x80, 0x80, 0x00, /* * * * ** * ** * ** ** * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /* * * * ** * ** * ** ** * * * ** **** ****** ****** **** ** ** ** ** */ +0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * ** * ** ** * * * ** **** ****** ****** **** ** ** ** ** ** *** ** * * ** */ +}; + +/* Character->glyph data. */ +static const PROGMEM uint16_t ncenB18_offset[] = { + 0, /* (0x00) */ + 0, /* (0x01) */ + 0, /* (0x02) */ + 0, /* (0x03) */ + 0, /* (0x04) */ + 0, /* (0x05) */ + 0, /* (0x06) */ + 0, /* (0x07) */ + 0, /* (0x08) */ + 0, /* (0x09) */ + 0, /* (0x0a) */ + 0, /* (0x0b) */ + 0, /* (0x0c) */ + 0, /* (0x0d) */ + 0, /* (0x0e) */ + 0, /* (0x0f) */ + 0, /* (0x10) */ + 0, /* (0x11) */ + 0, /* (0x12) */ + 0, /* (0x13) */ + 0, /* (0x14) */ + 0, /* (0x15) */ + 0, /* (0x16) */ + 0, /* (0x17) */ + 0, /* (0x18) */ + 0, /* (0x19) */ + 0, /* (0x1a) */ + 0, /* (0x1b) */ + 0, /* (0x1c) */ + 0, /* (0x1d) */ + 0, /* (0x1e) */ + 0, /* (0x1f) */ + 48, /* (0x20) */ + 63, /* (0x21) */ + 81, /* (0x22) */ + 105, /* (0x23) */ + 141, /* (0x24) */ + 174, /* (0x25) */ + 219, /* (0x26) */ + 270, /* (0x27) */ + 285, /* (0x28) */ + 303, /* (0x29) */ + 321, /* (0x2a) */ + 345, /* (0x2b) */ + 378, /* (0x2c) */ + 393, /* (0x2d) */ + 411, /* (0x2e) */ + 426, /* (0x2f) */ + 447, /* (0x30) */ + 480, /* (0x31) */ + 513, /* (0x32) */ + 546, /* (0x33) */ + 579, /* (0x34) */ + 612, /* (0x35) */ + 645, /* (0x36) */ + 678, /* (0x37) */ + 711, /* (0x38) */ + 744, /* (0x39) */ + 777, /* (0x3a) */ + 795, /* (0x3b) */ + 813, /* (0x3c) */ + 846, /* (0x3d) */ + 879, /* (0x3e) */ + 912, /* (0x3f) */ + 942, /* (0x40) */ + 990, /* (0x41) */ + 1032, /* (0x42) */ + 1074, /* (0x43) */ + 1116, /* (0x44) */ + 1164, /* (0x45) */ + 1203, /* (0x46) */ + 1242, /* (0x47) */ + 1287, /* (0x48) */ + 1335, /* (0x49) */ + 1362, /* (0x4a) */ + 1398, /* (0x4b) */ + 1446, /* (0x4c) */ + 1482, /* (0x4d) */ + 1539, /* (0x4e) */ + 1587, /* (0x4f) */ + 1635, /* (0x50) */ + 1677, /* (0x51) */ + 1725, /* (0x52) */ + 1773, /* (0x53) */ + 1809, /* (0x54) */ + 1848, /* (0x55) */ + 1896, /* (0x56) */ + 1938, /* (0x57) */ + 1995, /* (0x58) */ + 2046, /* (0x59) */ + 2091, /* (0x5a) */ + 2130, /* (0x5b) */ + 2145, /* (0x5c) */ + 2172, /* (0x5d) */ + 2187, /* (0x5e) */ + 2214, /* (0x5f) */ + 2244, /* (0x60) */ + 2265, /* (0x61) */ + 2298, /* (0x62) */ + 2337, /* (0x63) */ + 2367, /* (0x64) */ + 2406, /* (0x65) */ + 2439, /* (0x66) */ + 2460, /* (0x67) */ + 2493, /* (0x68) */ + 2532, /* (0x69) */ + 2550, /* (0x6a) */ + 2577, /* (0x6b) */ + 2616, /* (0x6c) */ + 2634, /* (0x6d) */ + 2694, /* (0x6e) */ + 2733, /* (0x6f) */ + 2769, /* (0x70) */ + 2808, /* (0x71) */ + 2844, /* (0x72) */ + 2871, /* (0x73) */ + 2901, /* (0x74) */ + 2925, /* (0x75) */ + 2964, /* (0x76) */ + 2994, /* (0x77) */ + 3042, /* (0x78) */ + 3078, /* (0x79) */ + 3114, /* (0x7a) */ + 3144, /* (0x7b) */ + 3162, /* (0x7c) */ + 3195, /* (0x7d) */ + 3213, /* (0x7e) */ + 0, /* (0x7f) */ + 0, /* (0x80) */ + 0, /* (0x81) */ + 0, /* (0x82) */ + 0, /* (0x83) */ + 0, /* (0x84) */ + 0, /* (0x85) */ + 0, /* (0x86) */ + 0, /* (0x87) */ + 0, /* (0x88) */ + 0, /* (0x89) */ + 0, /* (0x8a) */ + 0, /* (0x8b) */ + 0, /* (0x8c) */ + 0, /* (0x8d) */ + 0, /* (0x8e) */ + 0, /* (0x8f) */ + 0, /* (0x90) */ + 0, /* (0x91) */ + 0, /* (0x92) */ + 0, /* (0x93) */ + 0, /* (0x94) */ + 0, /* (0x95) */ + 0, /* (0x96) */ + 0, /* (0x97) */ + 0, /* (0x98) */ + 0, /* (0x99) */ + 0, /* (0x9a) */ + 0, /* (0x9b) */ + 0, /* (0x9c) */ + 0, /* (0x9d) */ + 0, /* (0x9e) */ + 0, /* (0x9f) */ + 3249, /* (0xa0) */ + 3264, /* (0xa1) */ + 3285, /* (0xa2) */ + 3318, /* (0xa3) */ + 3351, /* (0xa4) */ + 3381, /* (0xa5) */ + 3426, /* (0xa6) */ + 3459, /* (0xa7) */ + 3483, /* (0xa8) */ + 3513, /* (0xa9) */ + 3558, /* (0xaa) */ + 3582, /* (0xab) */ + 3609, /* (0xac) */ + 3639, /* (0xad) */ + 3657, /* (0xae) */ + 3702, /* (0xaf) */ + 3726, /* (0xb0) */ + 3747, /* (0xb1) */ + 3780, /* (0xb2) */ + 3798, /* (0xb3) */ + 3816, /* (0xb4) */ + 3837, /* (0xb5) */ + 3876, /* (0xb6) */ + 3918, /* (0xb7) */ + 3933, /* (0xb8) */ + 3951, /* (0xb9) */ + 3969, /* (0xba) */ + 3990, /* (0xbb) */ + 4017, /* (0xbc) */ + 4062, /* (0xbd) */ + 4107, /* (0xbe) */ + 4152, /* (0xbf) */ + 4182, /* (0xc0) */ + 4224, /* (0xc1) */ + 4266, /* (0xc2) */ + 4308, /* (0xc3) */ + 4350, /* (0xc4) */ + 4392, /* (0xc5) */ + 4434, /* (0xc6) */ + 4497, /* (0xc7) */ + 4539, /* (0xc8) */ + 4578, /* (0xc9) */ + 4617, /* (0xca) */ + 4656, /* (0xcb) */ + 4695, /* (0xcc) */ + 4722, /* (0xcd) */ + 4749, /* (0xce) */ + 4776, /* (0xcf) */ + 4803, /* (0xd0) */ + 4851, /* (0xd1) */ + 4899, /* (0xd2) */ + 4947, /* (0xd3) */ + 4995, /* (0xd4) */ + 5043, /* (0xd5) */ + 5091, /* (0xd6) */ + 5139, /* (0xd7) */ + 5172, /* (0xd8) */ + 5220, /* (0xd9) */ + 5268, /* (0xda) */ + 5316, /* (0xdb) */ + 5364, /* (0xdc) */ + 5412, /* (0xdd) */ + 5457, /* (0xde) */ + 5499, /* (0xdf) */ + 5535, /* (0xe0) */ + 5568, /* (0xe1) */ + 5601, /* (0xe2) */ + 5634, /* (0xe3) */ + 5667, /* (0xe4) */ + 5700, /* (0xe5) */ + 5733, /* (0xe6) */ + 5784, /* (0xe7) */ + 5814, /* (0xe8) */ + 5847, /* (0xe9) */ + 5880, /* (0xea) */ + 5913, /* (0xeb) */ + 5946, /* (0xec) */ + 5964, /* (0xed) */ + 5982, /* (0xee) */ + 6003, /* (0xef) */ + 6021, /* (0xf0) */ + 6057, /* (0xf1) */ + 6096, /* (0xf2) */ + 6132, /* (0xf3) */ + 6168, /* (0xf4) */ + 6204, /* (0xf5) */ + 6240, /* (0xf6) */ + 6276, /* (0xf7) */ + 6309, /* (0xf8) */ + 6342, /* (0xf9) */ + 6381, /* (0xfa) */ + 6420, /* (0xfb) */ + 6459, /* (0xfc) */ + 6498, /* (0xfd) */ + 6534, /* (0xfe) */ + 6573, /* (0xff) */ +}; + +/* Character width data. */ +static const PROGMEM uint8_t ncenB18_width[] = { + 16, /* (0x00) */ + 16, /* (0x01) */ + 16, /* (0x02) */ + 16, /* (0x03) */ + 16, /* (0x04) */ + 16, /* (0x05) */ + 16, /* (0x06) */ + 16, /* (0x07) */ + 16, /* (0x08) */ + 16, /* (0x09) */ + 16, /* (0x0a) */ + 16, /* (0x0b) */ + 16, /* (0x0c) */ + 16, /* (0x0d) */ + 16, /* (0x0e) */ + 16, /* (0x0f) */ + 16, /* (0x10) */ + 16, /* (0x11) */ + 16, /* (0x12) */ + 16, /* (0x13) */ + 16, /* (0x14) */ + 16, /* (0x15) */ + 16, /* (0x16) */ + 16, /* (0x17) */ + 16, /* (0x18) */ + 16, /* (0x19) */ + 16, /* (0x1a) */ + 16, /* (0x1b) */ + 16, /* (0x1c) */ + 16, /* (0x1d) */ + 16, /* (0x1e) */ + 16, /* (0x1f) */ + 5, /* (0x20) */ + 6, /* (0x21) */ + 8, /* (0x22) */ + 12, /* (0x23) */ + 11, /* (0x24) */ + 15, /* (0x25) */ + 17, /* (0x26) */ + 5, /* (0x27) */ + 6, /* (0x28) */ + 6, /* (0x29) */ + 8, /* (0x2a) */ + 11, /* (0x2b) */ + 5, /* (0x2c) */ + 6, /* (0x2d) */ + 5, /* (0x2e) */ + 7, /* (0x2f) */ + 11, /* (0x30) */ + 11, /* (0x31) */ + 11, /* (0x32) */ + 11, /* (0x33) */ + 11, /* (0x34) */ + 11, /* (0x35) */ + 11, /* (0x36) */ + 11, /* (0x37) */ + 11, /* (0x38) */ + 11, /* (0x39) */ + 6, /* (0x3a) */ + 6, /* (0x3b) */ + 11, /* (0x3c) */ + 11, /* (0x3d) */ + 11, /* (0x3e) */ + 10, /* (0x3f) */ + 16, /* (0x40) */ + 14, /* (0x41) */ + 14, /* (0x42) */ + 14, /* (0x43) */ + 16, /* (0x44) */ + 13, /* (0x45) */ + 13, /* (0x46) */ + 15, /* (0x47) */ + 16, /* (0x48) */ + 9, /* (0x49) */ + 12, /* (0x4a) */ + 16, /* (0x4b) */ + 12, /* (0x4c) */ + 19, /* (0x4d) */ + 16, /* (0x4e) */ + 16, /* (0x4f) */ + 14, /* (0x50) */ + 16, /* (0x51) */ + 16, /* (0x52) */ + 12, /* (0x53) */ + 13, /* (0x54) */ + 16, /* (0x55) */ + 14, /* (0x56) */ + 19, /* (0x57) */ + 17, /* (0x58) */ + 15, /* (0x59) */ + 13, /* (0x5a) */ + 5, /* (0x5b) */ + 9, /* (0x5c) */ + 5, /* (0x5d) */ + 9, /* (0x5e) */ + 10, /* (0x5f) */ + 7, /* (0x60) */ + 11, /* (0x61) */ + 13, /* (0x62) */ + 10, /* (0x63) */ + 13, /* (0x64) */ + 11, /* (0x65) */ + 7, /* (0x66) */ + 11, /* (0x67) */ + 13, /* (0x68) */ + 6, /* (0x69) */ + 9, /* (0x6a) */ + 13, /* (0x6b) */ + 6, /* (0x6c) */ + 20, /* (0x6d) */ + 13, /* (0x6e) */ + 12, /* (0x6f) */ + 13, /* (0x70) */ + 12, /* (0x71) */ + 9, /* (0x72) */ + 10, /* (0x73) */ + 8, /* (0x74) */ + 13, /* (0x75) */ + 10, /* (0x76) */ + 16, /* (0x77) */ + 12, /* (0x78) */ + 12, /* (0x79) */ + 10, /* (0x7a) */ + 6, /* (0x7b) */ + 11, /* (0x7c) */ + 6, /* (0x7d) */ + 12, /* (0x7e) */ + 16, /* (0x7f) */ + 16, /* (0x80) */ + 16, /* (0x81) */ + 16, /* (0x82) */ + 16, /* (0x83) */ + 16, /* (0x84) */ + 16, /* (0x85) */ + 16, /* (0x86) */ + 16, /* (0x87) */ + 16, /* (0x88) */ + 16, /* (0x89) */ + 16, /* (0x8a) */ + 16, /* (0x8b) */ + 16, /* (0x8c) */ + 16, /* (0x8d) */ + 16, /* (0x8e) */ + 16, /* (0x8f) */ + 16, /* (0x90) */ + 16, /* (0x91) */ + 16, /* (0x92) */ + 16, /* (0x93) */ + 16, /* (0x94) */ + 16, /* (0x95) */ + 16, /* (0x96) */ + 16, /* (0x97) */ + 16, /* (0x98) */ + 16, /* (0x99) */ + 16, /* (0x9a) */ + 16, /* (0x9b) */ + 16, /* (0x9c) */ + 16, /* (0x9d) */ + 16, /* (0x9e) */ + 16, /* (0x9f) */ + 5, /* (0xa0) */ + 7, /* (0xa1) */ + 11, /* (0xa2) */ + 11, /* (0xa3) */ + 10, /* (0xa4) */ + 15, /* (0xa5) */ + 11, /* (0xa6) */ + 8, /* (0xa7) */ + 10, /* (0xa8) */ + 15, /* (0xa9) */ + 8, /* (0xaa) */ + 9, /* (0xab) */ + 10, /* (0xac) */ + 6, /* (0xad) */ + 15, /* (0xae) */ + 8, /* (0xaf) */ + 7, /* (0xb0) */ + 11, /* (0xb1) */ + 6, /* (0xb2) */ + 6, /* (0xb3) */ + 7, /* (0xb4) */ + 13, /* (0xb5) */ + 14, /* (0xb6) */ + 5, /* (0xb7) */ + 6, /* (0xb8) */ + 6, /* (0xb9) */ + 7, /* (0xba) */ + 9, /* (0xbb) */ + 15, /* (0xbc) */ + 15, /* (0xbd) */ + 15, /* (0xbe) */ + 10, /* (0xbf) */ + 14, /* (0xc0) */ + 14, /* (0xc1) */ + 14, /* (0xc2) */ + 14, /* (0xc3) */ + 14, /* (0xc4) */ + 14, /* (0xc5) */ + 21, /* (0xc6) */ + 14, /* (0xc7) */ + 13, /* (0xc8) */ + 13, /* (0xc9) */ + 13, /* (0xca) */ + 13, /* (0xcb) */ + 9, /* (0xcc) */ + 9, /* (0xcd) */ + 9, /* (0xce) */ + 9, /* (0xcf) */ + 16, /* (0xd0) */ + 16, /* (0xd1) */ + 16, /* (0xd2) */ + 16, /* (0xd3) */ + 16, /* (0xd4) */ + 16, /* (0xd5) */ + 16, /* (0xd6) */ + 11, /* (0xd7) */ + 16, /* (0xd8) */ + 16, /* (0xd9) */ + 16, /* (0xda) */ + 16, /* (0xdb) */ + 16, /* (0xdc) */ + 15, /* (0xdd) */ + 14, /* (0xde) */ + 12, /* (0xdf) */ + 11, /* (0xe0) */ + 11, /* (0xe1) */ + 11, /* (0xe2) */ + 11, /* (0xe3) */ + 11, /* (0xe4) */ + 11, /* (0xe5) */ + 17, /* (0xe6) */ + 10, /* (0xe7) */ + 11, /* (0xe8) */ + 11, /* (0xe9) */ + 11, /* (0xea) */ + 11, /* (0xeb) */ + 6, /* (0xec) */ + 6, /* (0xed) */ + 7, /* (0xee) */ + 6, /* (0xef) */ + 12, /* (0xf0) */ + 13, /* (0xf1) */ + 12, /* (0xf2) */ + 12, /* (0xf3) */ + 12, /* (0xf4) */ + 12, /* (0xf5) */ + 12, /* (0xf6) */ + 11, /* (0xf7) */ + 11, /* (0xf8) */ + 13, /* (0xf9) */ + 13, /* (0xfa) */ + 13, /* (0xfb) */ + 13, /* (0xfc) */ + 12, /* (0xfd) */ + 13, /* (0xfe) */ + 12, /* (0xff) */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_ncenB18 = +{ + /* .glyph = */ font_ncenB18_glyphs, + /* .name = "ncenB18", */ + /* .width = */ 21, + /* .height = */ 20, + /* .ascent = 16, */ + /* .first = */ 0, + /* .last = */ 255, + /* .offset = */ ncenB18_offset, + /* .width = */ ncenB18_width, +}; diff --git a/2.5/bertos/fs/battfs.c b/2.5/bertos/fs/battfs.c new file mode 100644 index 00000000..deef25cc --- /dev/null +++ b/2.5/bertos/fs/battfs.c @@ -0,0 +1,1052 @@ +/** + * \file + * + * + * \brief BattFS: a filesystem for embedded platforms (implementation). + * + * \version $Id$ + * + * \author Francesco Sacchi + * + */ + +#include "battfs.h" +#include "cfg/cfg_battfs.h" +#include +#include /* MIN, MAX */ +#include +#include /* cpu_to_xx */ + +#define LOG_LEVEL BATTFS_LOG_LEVEL +#define LOG_FORMAT BATTFS_LOG_FORMAT +#include + +#include /* memset, memmove */ + +#if LOG_LEVEL >= LOG_LVL_INFO +static void dumpPageArray(struct BattFsSuper *disk) +{ + kprintf("Page array dump, free_page_start %d:", disk->free_page_start); + for (pgcnt_t i = 0; i < disk->page_count; i++) + { + if (!(i % 16)) + kputchar('\n'); + kprintf("%04d ", disk->page_array[i]); + } + kputchar('\n'); +} +#endif + +/** + * Convert from memory representation to disk structure. + * \note filesystem is in little-endian format. + */ +INLINE void battfs_to_disk(struct BattFsPageHeader *hdr, uint8_t *buf) +{ + STATIC_ASSERT(BATTFS_HEADER_LEN == 12); + buf[0] = hdr->inode; + + buf[1] = hdr->fill; + buf[2] = hdr->fill >> 8; + + buf[3] = hdr->pgoff; + buf[4] = hdr->pgoff >> 8; + + /* + * Sequence number is 40 bits long. + * No need to take care of wraparonds: the memory will die first! + */ + buf[5] = hdr->seq; + buf[6] = hdr->seq >> 8; + buf[7] = hdr->seq >> 16; + buf[8] = hdr->seq >> 24; + buf[9] = hdr->seq >> 32; + + /* + * This field must be the last one! + * This is needed because if the page is only partially + * written, we can use this to detect it. + */ + buf[10] = hdr->fcs; + buf[11] = hdr->fcs >> 8; +} + +/** + * Convert from disk structure to memory representation. + * \note filesystem is in little-endian format. + */ +INLINE void disk_to_battfs(uint8_t *buf, struct BattFsPageHeader *hdr) +{ + STATIC_ASSERT(BATTFS_HEADER_LEN == 12); + hdr->inode = buf[0]; + hdr->fill = buf[2] << 8 | buf[1]; + hdr->pgoff = buf[4] << 8 | buf[3]; + hdr->seq = (seq_t)buf[9] << 32 | (seq_t)buf[8] << 24 | (seq_t)buf[7] << 16 | buf[6] << 8 | buf[5]; + hdr->fcs = buf[11] << 8 | buf[10]; +} + +/** + * Compute the fcs of the header. + */ +static fcs_t computeFcs(struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + fcs_t cks; + + battfs_to_disk(hdr, buf); + rotating_init(&cks); + /* fcs is at the end of whole header */ + rotating_update(buf, BATTFS_HEADER_LEN - sizeof(fcs_t), &cks); + return cks; +} + +/** + * Read from disk. + * If available, the cache will be used. + * \return the number of bytes read. + */ +static size_t diskRead(struct BattFsSuper *disk, pgcnt_t page, pgaddr_t addr, void *buf, size_t size) +{ + /* Try to read from cache */ + if (page == disk->curr_page) + return disk->bufferRead(disk, addr, buf, size); + /* Read from disk */ + else + return disk->read(disk, page, addr, buf, size); +} + + +/** + * Read header of \a page in \a hdr. + * \return true on success, false otherwise. + */ +static bool readHdr(struct BattFsSuper *disk, pgcnt_t page, struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + /* + * Read header from disk. + * Header is actually a footer, and so + * resides at page end. + */ + if (diskRead(disk, page, disk->data_size, buf, BATTFS_HEADER_LEN) + != BATTFS_HEADER_LEN) + { + LOG_ERR("page[%d]\n", page); + return false; + } + + /* Fill header */ + disk_to_battfs(buf, hdr); + + return true; +} + +/** + * Set header on current \a disk page buffer. + * \return true on success, false otherwise. + */ +static bool setBufferHdr(struct BattFsSuper *disk, struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + + #warning FIXME:refactor computeFcs to save time and stack + hdr->fcs = computeFcs(hdr); + /* Fill buffer */ + battfs_to_disk(hdr, buf); + + /* + * write header to buffer. + * Header is actually a footer, and so + * resides at page end. + */ + if (disk->bufferWrite(disk, disk->data_size, buf, BATTFS_HEADER_LEN) + != BATTFS_HEADER_LEN) + { + LOG_ERR("writing to buffer\n"); + return false; + } + return true; +} + +static bool getBufferHdr(struct BattFsSuper *disk, struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + + if (disk->bufferRead(disk, disk->data_size, buf, BATTFS_HEADER_LEN) + != BATTFS_HEADER_LEN) + { + LOG_ERR("reading from buffer\n"); + return false; + } + + disk_to_battfs(buf, hdr); + + return true; +} + +/** + * Count the number of pages from + * inode 0 to \a inode in \a filelen_table. + */ +static pgcnt_t countPages(pgoff_t *filelen_table, inode_t inode) +{ + pgcnt_t cnt = 0; + + for (inode_t i = 0; i < inode; i++) + cnt += filelen_table[i]; + + return cnt; +} + +/** + * Move all pages in page allocation array from \a src to \a src + \a offset. + * The number of pages moved is page_count - MAX(dst, src). + */ +static void movePages(struct BattFsSuper *disk, pgcnt_t src, int offset) +{ + pgcnt_t dst = src + offset; + LOG_INFO("src %d, offset %d, size %d\n", src, offset, (unsigned int)((disk->page_count - MAX(dst, src)) * sizeof(pgcnt_t))); + memmove(&disk->page_array[dst], &disk->page_array[src], (disk->page_count - MAX(dst, src)) * sizeof(pgcnt_t)); + + if (offset < 0) + { + /* Fill empty space in array with sentinel */ + for (pgcnt_t page = disk->page_count + offset; page < disk->page_count; page++) + disk->page_array[page] = PAGE_UNSET_SENTINEL; + } +} + +/** + * Count number of pages per file on \a disk. + * This information is registered in \a filelen_table. + * Array index represent file inode, while value contained + * is the number of pages used by that file. + * + * \return true if ok, false on disk read errors. + * \note The whole disk is scanned once. + */ +static bool countDiskFilePages(struct BattFsSuper *disk, pgoff_t *filelen_table) +{ + BattFsPageHeader hdr; + disk->free_page_start = 0; + + /* Count the number of disk page per file */ + for (pgcnt_t page = 0; page < disk->page_count; page++) + { + if (!readHdr(disk, page, &hdr)) + return false; + + /* Increase free space */ + disk->free_bytes += disk->data_size; + + /* Check header FCS */ + if (hdr.fcs == computeFcs(&hdr)) + { + ASSERT(hdr.fill <= disk->data_size); + + /* Page is valid and is owned by a file */ + filelen_table[hdr.inode]++; + + /* Keep trace of free space */ + disk->free_bytes -= hdr.fill; + disk->free_page_start++; + } + } + LOG_INFO("free_bytes:%ld, free_page_start:%d\n", (long)disk->free_bytes, disk->free_page_start); + + return true; +} + +/** + * Fill page allocation array of \a disk + * using file lenghts in \a filelen_table. + * + * The page allocation array is an array containings all file infos. + * Is ordered by file, and within each file is ordered by page offset + * inside file. + * e.g. : at page array[0] you will find page address of the first page + * of the first file (if present). + * Free blocks are allocated after the last file. + * + * \return true if ok, false on disk read errors. + * \note The whole disk is scanned at max twice. + */ +static bool fillPageArray(struct BattFsSuper *disk, pgoff_t *filelen_table) +{ + BattFsPageHeader hdr; + pgcnt_t curr_free_page = disk->free_page_start; + /* Fill page allocation array */ + for (pgcnt_t page = 0; page < disk->page_count; page++) + { + if (!readHdr(disk, page, &hdr)) + return false; + + /* Check header FCS */ + if (hdr.fcs == computeFcs(&hdr)) + { + /* Compute array position */ + pgcnt_t array_pos = countPages(filelen_table, hdr.inode); + array_pos += hdr.pgoff; + + + /* Check if position is already used by another page of the same file */ + if (disk->page_array[array_pos] == PAGE_UNSET_SENTINEL) + disk->page_array[array_pos] = page; + else + { + BattFsPageHeader hdr_prv; + + if (!readHdr(disk, disk->page_array[array_pos], &hdr_prv)) + return false; + + /* Check header FCS */ + ASSERT(hdr_prv.fcs == computeFcs(&hdr_prv)); + + /* Only the very same page with a different seq number can be here */ + ASSERT(hdr.inode == hdr_prv.inode); + ASSERT(hdr.pgoff == hdr_prv.pgoff); + ASSERT(hdr.seq != hdr_prv.seq); + + pgcnt_t new_page, old_page; + fill_t old_fill; + + /* + * Sequence number comparison: since + * seq is 40 bits wide, it wraps once + * every 1.1E12 times. + * The memory will not live enough to + * see a wraparound, so we can use a simple + * compare here. + */ + if (hdr.seq > hdr_prv.seq) + { + /* Current header is newer than the previuos one */ + old_page = disk->page_array[array_pos]; + new_page = page; + old_fill = hdr_prv.fill; + } + else + { + /* Previous header is newer than the current one */ + old_page = page; + new_page = disk->page_array[array_pos]; + old_fill = hdr.fill; + } + + /* Set new page */ + disk->page_array[array_pos] = new_page; + /* Add free space */ + disk->free_bytes += old_fill; + /* Shift all array one position to the left, overwriting duplicate page */ + array_pos -= hdr.pgoff; + array_pos += filelen_table[hdr.inode]; + movePages(disk, array_pos, -1); + /* Move back all indexes */ + filelen_table[hdr.inode]--; + disk->free_page_start--; + curr_free_page--; + /* Set old page as free */ + ASSERT(disk->page_array[curr_free_page] == PAGE_UNSET_SENTINEL); + disk->page_array[curr_free_page++] = old_page; + + } + } + else + { + /* Invalid page, keep as free */ + ASSERT(disk->page_array[curr_free_page] == PAGE_UNSET_SENTINEL); + //LOG_INFO("Page %d invalid, keeping as free\n", page); + disk->page_array[curr_free_page++] = page; + } + } + return true; +} + + +/** + * Flush the current \a disk buffer. + * \return true if ok, false on errors. + */ +static bool flushBuffer(struct BattFsSuper *disk) +{ + if (disk->cache_dirty) + { + LOG_INFO("Flushing to disk page %d\n", disk->curr_page); + + if (!(disk->erase(disk, disk->curr_page) + && disk->save(disk, disk->curr_page))) + return false; + + disk->cache_dirty = false; + } + return true; +} + +/** + * Load \a new_page from \a disk in disk page buffer. + * If a previuos page is still dirty in the buffer, will be + * flushed first. The new page header loaded will be put in \a new_hdr. + * \return true if ok, false on errors. + */ +static bool loadPage(struct BattFsSuper *disk, pgcnt_t new_page, BattFsPageHeader *new_hdr) +{ + if (disk->curr_page == new_page) + return getBufferHdr(disk, new_hdr); + + LOG_INFO("Loading page %d\n", new_page); + + if (!(flushBuffer(disk) + && disk->load(disk, new_page) + && getBufferHdr(disk, new_hdr))) + return false; + + disk->curr_page = new_page; + + return true; +} + + +/** + * Initialize and mount disk described by + * \a disk. + * \return false on errors, true otherwise. + */ +bool battfs_mount(struct BattFsSuper *disk) +{ + pgoff_t filelen_table[BATTFS_MAX_FILES]; + + /* Disk open must set all of these */ + ASSERT(disk->read); + ASSERT(disk->load); + ASSERT(disk->bufferWrite); + ASSERT(disk->bufferRead); + ASSERT(disk->save); + ASSERT(disk->erase); + ASSERT(disk->close); + ASSERT(disk->page_size > BATTFS_HEADER_LEN); + /* Fill page_size with the usable space */ + disk->data_size = disk->page_size - BATTFS_HEADER_LEN; + ASSERT(disk->page_count); + ASSERT(disk->page_count < PAGE_UNSET_SENTINEL - 1); + ASSERT(disk->page_array); + + memset(filelen_table, 0, BATTFS_MAX_FILES * sizeof(pgoff_t)); + + disk->free_bytes = 0; + disk->disk_size = (disk_size_t)disk->data_size * disk->page_count; + + /* Initialize page buffer cache */ + disk->cache_dirty = false; + disk->curr_page = 0; + disk->load(disk, disk->curr_page); + + /* Count pages per file */ + if (!countDiskFilePages(disk, filelen_table)) + { + LOG_ERR("counting file pages\n"); + return false; + } + + /* Once here, we have filelen_table filled with file lengths */ + + /* Fill page array with sentinel */ + for (pgcnt_t page = 0; page < disk->page_count; page++) + disk->page_array[page] = PAGE_UNSET_SENTINEL; + + /* Fill page allocation array using filelen_table */ + if (!fillPageArray(disk, filelen_table)) + { + LOG_ERR("filling page array\n"); + return false; + } + #if LOG_LEVEL >= LOG_LVL_INFO + dumpPageArray(disk); + #endif + #if CONFIG_BATTFS_SHUFFLE_FREE_PAGES + SHUFFLE(&disk->page_array[disk->free_page_start], disk->page_count - disk->free_page_start); + + LOG_INFO("Page array after shuffle:\n"); + #if LOG_LEVEL >= LOG_LVL_INFO + dumpPageArray(disk); + #endif + #endif + /* Init list for opened files. */ + LIST_INIT(&disk->file_opened_list); + return true; +} + +/** + * Check the filesystem. + * \return true if ok, false on errors. + */ +bool battfs_fsck(struct BattFsSuper *disk) +{ + #define FSCHECK(cond) do { if(!(cond)) { LOG_ERR("\"" #cond "\"\n"); return false; } } while (0) + + FSCHECK(disk->free_page_start <= disk->page_count); + FSCHECK(disk->data_size < disk->page_size); + FSCHECK(disk->free_bytes <= disk->disk_size); + + disk_size_t free_bytes = 0; + BattFsPageHeader hdr, prev_hdr; + inode_t files = 0; + pgcnt_t page_used = 0; + + bool start = true; + + /* Uneeded, the first time will be overwritten but useful to silence + * the warning for uninitialized value */ + FSCHECK(readHdr(disk, 0, &prev_hdr)); + for (pgcnt_t page = 0; page < disk->page_count; page++) + { + FSCHECK(readHdr(disk, disk->page_array[page], &hdr)); + free_bytes += disk->data_size; + + if (page < disk->free_page_start) + { + FSCHECK(computeFcs(&hdr) == hdr.fcs); + page_used++; + free_bytes -= hdr.fill; + if (hdr.inode != prev_hdr.inode || start) + { + if (LIKELY(!start)) + FSCHECK(hdr.inode > prev_hdr.inode); + else + start = false; + + FSCHECK(hdr.pgoff == 0); + files++; + } + else + { + FSCHECK(hdr.fill != 0); + FSCHECK(prev_hdr.fill == disk->data_size); + FSCHECK(hdr.pgoff == prev_hdr.pgoff + 1); + } + prev_hdr = hdr; + } + } + + FSCHECK(page_used == disk->free_page_start); + FSCHECK(free_bytes == disk->free_bytes); + + return true; +} + +/** + * Flush file \a fd. + * \return 0 if ok, EOF on errors. + */ +static int battfs_flush(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + + if (flushBuffer(fdb->disk)) + return 0; + else + { + fdb->errors |= BATTFS_DISK_FLUSHBUF_ERR; + return EOF; + } +} + +/** + * Close file \a fd. + * \return 0 if ok, EOF on errors. + */ +static int battfs_fileclose(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + + if (battfs_flush(fd) == 0) + { + REMOVE(&fdb->link); + return 0; + } + else + return EOF; +} + + +static bool getNewPage(struct BattFsSuper *disk, pgcnt_t new_pos, inode_t inode, pgoff_t pgoff, BattFsPageHeader *new_hdr) +{ + if (SPACE_OVER(disk)) + { + LOG_ERR("No disk space available!\n"); + return false; + } + flushBuffer(disk); + LOG_INFO("Getting new page %d, pos %d\n", disk->page_array[disk->free_page_start], new_pos); + disk->curr_page = disk->page_array[disk->free_page_start++]; + memmove(&disk->page_array[new_pos + 1], &disk->page_array[new_pos], (disk->free_page_start - new_pos - 1) * sizeof(pgcnt_t)); + + Node *n; + /* Move following file start point one position ahead. */ + FOREACH_NODE(n, &disk->file_opened_list) + { + BattFs *file = containerof(n, BattFs, link); + if (file->inode > inode) + { + LOG_INFO("Move file %d start pos\n", file->inode); + file->start++; + } + } + + disk->page_array[new_pos] = disk->curr_page; + disk->cache_dirty = true; + + new_hdr->inode = inode; + new_hdr->pgoff = pgoff; + new_hdr->fill = 0; + new_hdr->seq = 0; + return setBufferHdr(disk, new_hdr); +} + +/** + * Write to file \a fd \a size bytes from \a buf. + * \return The number of bytes written. + */ +static size_t battfs_write(struct KFile *fd, const void *_buf, size_t size) +{ + BattFs *fdb = BATTFS_CAST(fd); + BattFsSuper *disk = fdb->disk; + const uint8_t *buf = (const uint8_t *)_buf; + + size_t total_write = 0; + pgoff_t pg_offset; + pgaddr_t addr_offset; + pgaddr_t wr_len; + BattFsPageHeader curr_hdr; + + if (fd->seek_pos < 0) + { + fdb->errors |= BATTFS_NEGATIVE_SEEK_ERR; + return total_write; + } + + if (fd->seek_pos > fd->size) + { + /* Handle writing when seek pos if far over EOF */ + if (!loadPage(disk, fdb->start[fdb->max_off], &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_LOADPAGE_ERR; + return total_write; + } + + /* Fill unused space of first page with 0s */ + uint8_t dummy = 0; + pgaddr_t zero_bytes = MIN(fd->seek_pos - fd->size, (kfile_off_t)(disk->data_size - curr_hdr.fill)); + while (zero_bytes--) + { + if (disk->bufferWrite(disk, curr_hdr.fill, &dummy, 1) != 1) + { + fdb->errors |= BATTFS_DISK_BUFFERWR_ERR; + return total_write; + } + curr_hdr.fill++; + fd->size++; + disk->free_bytes--; + disk->cache_dirty = true; + } + setBufferHdr(disk, &curr_hdr); + + /* Allocate the missing pages first. */ + pgoff_t missing_pages = fd->seek_pos / disk->data_size - fdb->max_off; + + if (missing_pages) + { + LOG_INFO("missing pages: %d\n", missing_pages); + flushBuffer(disk); + + /* Fill page buffer with 0 to avoid filling unused pages with garbage */ + for (pgaddr_t off = 0; off < disk->data_size; off++) + { + if (disk->bufferWrite(disk, off, &dummy, 1) != 1) + { + fdb->errors |= BATTFS_DISK_BUFFERWR_ERR; + return total_write; + } + } + + while (missing_pages--) + { + zero_bytes = MIN((kfile_off_t)disk->data_size, fd->seek_pos - fd->size); + /* Get the new page needed */ + if (!getNewPage(disk, (fdb->start - disk->page_array) + fdb->max_off + 1, fdb->inode, fdb->max_off + 1, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_GETNEWPAGE_ERR; + return total_write; + } + + /* Update size and free space left */ + fd->size += zero_bytes; + disk->free_bytes -= zero_bytes; + + curr_hdr.fill = zero_bytes; + setBufferHdr(disk, &curr_hdr); + + fdb->max_off++; + } + } + } + else if (!getBufferHdr(disk, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_BUFFERRD_ERR; + return total_write; + } + + while (size) + { + pg_offset = fd->seek_pos / disk->data_size; + addr_offset = fd->seek_pos % disk->data_size; + wr_len = MIN(size, (size_t)(disk->data_size - addr_offset)); + + /* Handle write outside EOF */ + if (pg_offset > fdb->max_off) + { + LOG_INFO("New page needed, pg_offset %d, pos %d\n", pg_offset, (int)((fdb->start - disk->page_array) + pg_offset)); + if (!getNewPage(disk, (fdb->start - disk->page_array) + pg_offset, fdb->inode, pg_offset, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_GETNEWPAGE_ERR; + return total_write; + } + + fdb->max_off = pg_offset; + } + /* Handle cache load of a new page*/ + else if (fdb->start[pg_offset] != disk->curr_page) + { + if (SPACE_OVER(disk)) + { + LOG_ERR("No disk space available!\n"); + fdb->errors |= BATTFS_DISK_SPACEOVER_ERR; + return total_write; + } + LOG_INFO("Re-writing page %d to %d\n", fdb->start[pg_offset], disk->page_array[disk->free_page_start]); + if (!loadPage(disk, fdb->start[pg_offset], &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_LOADPAGE_ERR; + return total_write; + } + + /* Get a free page */ + disk->curr_page = disk->page_array[disk->free_page_start]; + movePages(disk, disk->free_page_start + 1, -1); + + /* Insert previous page in free blocks list */ + LOG_INFO("Setting page %d as free\n", fdb->start[pg_offset]); + disk->page_array[disk->page_count - 1] = fdb->start[pg_offset]; + /* Assign new page */ + fdb->start[pg_offset] = disk->curr_page; + curr_hdr.seq++; + } + + //LOG_INFO("writing to buffer for page %d, offset %d, size %d\n", disk->curr_page, addr_offset, wr_len); + if (disk->bufferWrite(disk, addr_offset, buf, wr_len) != wr_len) + { + fdb->errors |= BATTFS_DISK_BUFFERWR_ERR; + return total_write; + } + disk->cache_dirty = true; + + size -= wr_len; + fd->seek_pos += wr_len; + total_write += wr_len; + buf += wr_len; + fill_t fill_delta = MAX((int32_t)(addr_offset + wr_len) - curr_hdr.fill, (int32_t)0); + disk->free_bytes -= fill_delta; + fd->size += fill_delta; + curr_hdr.fill += fill_delta; + + if (!setBufferHdr(disk, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_BUFFERWR_ERR; + return total_write; + } + + //LOG_INFO("free_bytes %d, seek_pos %d, size %d, curr_hdr.fill %d\n", disk->free_bytes, fd->seek_pos, fd->size, curr_hdr.fill); + } + return total_write; +} + + +/** + * Read from file \a fd \a size bytes in \a buf. + * \return The number of bytes read. + */ +static size_t battfs_read(struct KFile *fd, void *_buf, size_t size) +{ + BattFs *fdb = BATTFS_CAST(fd); + BattFsSuper *disk = fdb->disk; + uint8_t *buf = (uint8_t *)_buf; + + size_t total_read = 0; + pgoff_t pg_offset; + pgaddr_t addr_offset; + pgaddr_t read_len; + + if (fd->seek_pos < 0) + { + fdb->errors |= BATTFS_NEGATIVE_SEEK_ERR; + return total_read; + } + + size = MIN((kfile_off_t)size, MAX(fd->size - fd->seek_pos, (kfile_off_t)0)); + + while (size) + { + pg_offset = fd->seek_pos / disk->data_size; + addr_offset = fd->seek_pos % disk->data_size; + read_len = MIN(size, (size_t)(disk->data_size - addr_offset)); + + //LOG_INFO("reading from page %d, offset %d, size %d\n", fdb->start[pg_offset], addr_offset, read_len); + /* Read from disk */ + if (diskRead(disk, fdb->start[pg_offset], addr_offset, buf, read_len) != read_len) + { + fdb->errors |= BATTFS_DISK_READ_ERR; + return total_read; + } + + #ifdef _DEBUG + BattFsPageHeader hdr; + readHdr(disk, fdb->start[pg_offset], &hdr); + ASSERT(hdr.inode == fdb->inode); + #endif + + size -= read_len; + fd->seek_pos += read_len; + total_read += read_len; + buf += read_len; + } + return total_read; +} + + +/** + * Search file \a inode in \a disk using a binary search. + * \a last is filled with array offset of file start + * in disk->page_array if file is found, otherwise + * \a last is filled with the correct insert position + * for creating a file with the given \a inode. + * \return true if file is found, false otherwisr. + */ +static bool findFile(BattFsSuper *disk, inode_t inode, pgcnt_t *last) +{ + BattFsPageHeader hdr; + pgcnt_t first = 0, page; + *last = disk->free_page_start; + fcs_t fcs; + + while (first < *last) + { + page = (first + *last) / 2; + LOG_INFO("first %d, last %d, page %d\n", first, *last, page); + if (!readHdr(disk, disk->page_array[page], &hdr)) + return false; + LOG_INFO("inode read: %d\n", hdr.inode); + fcs = computeFcs(&hdr); + if (hdr.fcs == fcs && hdr.inode == inode) + { + *last = page - hdr.pgoff; + LOG_INFO("Found: %d\n", *last); + return true; + } + else if (hdr.fcs == fcs && hdr.inode < inode) + first = page + 1; + else + *last = page; + } + LOG_INFO("Not found: last %d\n", *last); + return false; +} + +/** + * \return true if file \a inode exists on \a disk, false otherwise. + */ +bool battfs_fileExists(BattFsSuper *disk, inode_t inode) +{ + pgcnt_t dummy; + return findFile(disk, inode, &dummy); +} + +/** + * Count size of file \a inode on \a disk, starting at pointer \a start + * in disk->page_array. Size is written in \a size. + * \return true if all s ok, false on disk read errors. + */ +static file_size_t countFileSize(BattFsSuper *disk, pgcnt_t *start, inode_t inode) +{ + file_size_t size = 0; + BattFsPageHeader hdr; + + while (start < &disk->page_array[disk->free_page_start]) + { + if (!readHdr(disk, *start++, &hdr)) + return EOF; + if (hdr.fcs == computeFcs(&hdr) && hdr.inode == inode) + size += hdr.fill; + else + break; + } + return size; +} + +static int battfs_error(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + return fdb->errors; +} + + +static void battfs_clearerr(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + fdb->errors = 0; +} + +/** + * Open file \a inode from \a disk in \a mode. + * File context is stored in \a fd. + * \return true if ok, false otherwise. + */ +bool battfs_fileopen(BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode) +{ + Node *n; + + memset(fd, 0, sizeof(*fd)); + + /* Search file start point in disk page array */ + pgcnt_t start_pos; + if (!findFile(disk, inode, &start_pos)) + { + LOG_INFO("file %d not found\n", inode); + if (!(mode & BATTFS_CREATE)) + { + fd->errors |= BATTFS_FILE_NOT_FOUND_ERR; + return false; + } + /* Create the file */ + BattFsPageHeader hdr; + if (!(getNewPage(disk, start_pos, inode, 0, &hdr))) + { + fd->errors |= BATTFS_DISK_GETNEWPAGE_ERR; + return false; + } + } + fd->start = &disk->page_array[start_pos]; + LOG_INFO("Start pos %d\n", start_pos); + + /* Fill file size */ + if ((fd->fd.size = countFileSize(disk, fd->start, inode)) == EOF) + { + fd->errors |= BATTFS_DISK_READ_ERR; + return false; + } + fd->max_off = fd->fd.size / disk->data_size; + + /* Reset seek position */ + fd->fd.seek_pos = 0; + + /* Insert file handle in list, ordered by inode, ascending. */ + FOREACH_NODE(n, &disk->file_opened_list) + { + BattFs *file = containerof(n, BattFs, link); + if (file->inode >= inode) + break; + } + INSERT_BEFORE(&fd->link, n); + + /* Fill in data */ + fd->inode = inode; + fd->mode = mode; + fd->disk = disk; + + fd->fd.close = battfs_fileclose; + fd->fd.flush = battfs_flush; + fd->fd.read = battfs_read; + fd->fd.reopen = kfile_genericReopen; + fd->fd.seek = kfile_genericSeek; + fd->fd.write = battfs_write; + + fd->fd.error = battfs_error; + fd->fd.clearerr = battfs_clearerr; + + DB(fd->fd._type = KFT_BATTFS); + + return true; +} + + +/** + * Umount \a disk. + */ +bool battfs_umount(struct BattFsSuper *disk) +{ + Node *n; + int res = 0; + + /* Close all open files */ + FOREACH_NODE(n, &disk->file_opened_list) + { + BattFs *file = containerof(n, BattFs, link); + res += battfs_fileclose(&file->fd); + } + + /* Close disk */ + return disk->close(disk) && (res == 0); +} + +#if UNIT_TEST + +bool battfs_writeTestBlock(struct BattFsSuper *disk, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff) +{ + BattFsPageHeader hdr; + + /* Reset page to all 0xff */ + uint8_t buf[disk->page_size]; + memset(buf, 0xFF, disk->page_size); + disk->bufferWrite(disk, 0, buf, disk->page_size); + + hdr.inode = inode; + hdr.fill = fill; + hdr.pgoff = pgoff; + hdr.seq = seq; + hdr.fcs = computeFcs(&hdr); + + if (!(setBufferHdr(disk, &hdr) && disk->save(disk, page))) + { + LOG_ERR("error writing hdr\n"); + return false; + } + + return true; +} +#endif diff --git a/2.5/bertos/fs/battfs.h b/2.5/bertos/fs/battfs.h new file mode 100644 index 00000000..4c7e619d --- /dev/null +++ b/2.5/bertos/fs/battfs.h @@ -0,0 +1,291 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief BattFS: a filesystem for embedded platforms (interface). + * TODO: Add detailed filesystem description. + * + * $WIZ$ module_name = "battfs" + * $WIZ$ module_depends = "rotating_hash", "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_battfs.h" + */ + +#ifndef FS_BATTFS_H +#define FS_BATTFS_H + +#include // uintXX_t; STATIC_ASSERT +#include // CPU_BITS_PER_CHAR +#include +#include +#include + +typedef uint16_t fill_t; ///< Type for keeping trace of space filled inside a page +typedef fill_t pgaddr_t; ///< Type for addressing space inside a page +typedef uint16_t pgcnt_t; ///< Type for counting pages on disk +typedef pgcnt_t pgoff_t; ///< Type for counting pages inside a file +typedef uint8_t inode_t; ///< Type for file inodes +typedef uint64_t seq_t; ///< Type for page seq number, at least 40bits wide. +typedef rotating_t fcs_t; ///< Type for header FCS. + + +/** + * BattFS page header, used to represent a page + * header in memory. + * To see how this is stored on disk: + * \see battfs_to_disk + * \see disk_to_battfs + */ +typedef struct BattFsPageHeader +{ + inode_t inode; ///< File inode (file identifier). + fill_t fill; ///< Filled bytes in page. + pgoff_t pgoff; ///< Page offset inside file. + + /** + * Page sequence number. + * Every time a page is rewritten the seq number is + * increased by 1. seq_t is wide enough to not to perform + * a wrap around before the memory death. + * So it can be kept as it would be + * monotonically increasing for our needs. + */ + seq_t seq; + + /** + * FCS (Frame Check Sequence) of the page header. + */ + fcs_t fcs; +} BattFsPageHeader; + +/** + * Size of the header once saved on disk. + * \see battfs_to_disk + * \see disk_to_battfs + */ +#define BATTFS_HEADER_LEN 12 + +/** + * Maximum page address. + */ +#define MAX_PAGE_ADDR ((1 << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1) + +/** + * Max number of files. + */ +#define BATTFS_MAX_FILES (1 << (CPU_BITS_PER_CHAR * sizeof(inode_t))) + +/* Fwd decl */ +struct BattFsSuper; + +/** + * Sentinel used to keep trace of unset pages in disk->page_array. + */ +#define PAGE_UNSET_SENTINEL ((pgcnt_t)((1L << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1)) + +/** + * Type interface for disk page read function. + * \a page is the page address, \a addr the address inside the page, + * \a size the lenght to be read. + * \return the number of bytes read. + */ +typedef size_t (*disk_page_read_t) (struct BattFsSuper *d, pgcnt_t page, pgaddr_t addr, void *buf, size_t); + + +/** + * Type interface for disk page load function. + * The disk should supply a buffer used for loading/saving pages. + * This has to be done by the disk driver because it knows memory details + * (e.g. some memories can have the buffer inside the memory itself). + * \a page is the page to be loaded from the disk in the buffer. + * \return true if ok, false on errors. + */ +typedef bool (*disk_page_load_t) (struct BattFsSuper *d, pgcnt_t page); + +/** + * Type interface for disk pagebuffer write function. + * \a addr is the address inside the current loaded page, + * \a size the lenght to be written. + * \return the number of bytes written. + */ +typedef size_t (*disk_buffer_write_t) (struct BattFsSuper *d, pgaddr_t addr, const void *buf, size_t); + +/** + * Type interface for disk pagebuffer read function. + * \a addr is the address inside the current loaded page, + * \a size the lenght to be read. + * \return the number of bytes read. + */ +typedef size_t (*disk_buffer_read_t) (struct BattFsSuper *d, pgaddr_t addr, void *buf, size_t); + +/** + * Type interface for disk page save function. + * The disk should supply a buffer used for loading/saving pages. + * For details \see disk_page_load_t. + * \a page is the page where the buffer will be written. + * \return true if ok, false on errors. + */ +typedef bool (*disk_page_save_t) (struct BattFsSuper *d, pgcnt_t page); + +/** + * Type interface for disk page erase function. + * \a page is the page address. + * \return true if all is ok, false otherwise. + */ +typedef bool (*disk_page_erase_t) (struct BattFsSuper *d, pgcnt_t page); + +/** + * Type interface for disk deinit function. + * \return true if all is ok, false otherwise. + */ +typedef bool (*disk_close_t) (struct BattFsSuper *d); + + +typedef uint32_t disk_size_t; ///< Type for disk sizes. + +/** + * Context used to describe a disk. + * This context structure will be used to access disk. + * Must be initialized by hw memory driver. + */ +typedef struct BattFsSuper +{ + void *disk_ctx; ///< Disk context used by disk access functions. + disk_page_read_t read; ///< Page read. + disk_page_load_t load; ///< Page load. + disk_buffer_write_t bufferWrite; ///< Buffer write. + disk_buffer_read_t bufferRead; ///< Buffer read. + disk_page_save_t save; ///< Page save. + disk_page_erase_t erase; ///< Page erase. + disk_close_t close; ///< Disk deinit. + + pgaddr_t page_size; ///< Size of a memory page, in bytes. Used by disk low level driver. + pgaddr_t data_size; ///< Size of space usable for data in a disk page, in bytes. The rest is used by the page header. + pgcnt_t page_count; ///< Number of pages on disk. + + /** + * Page allocation array. + * This array must be allocated somewhere and + * must have enough space for page_count elements. + * Is used by the filesystem to represent + * the entire disk in memory. + */ + pgcnt_t *page_array; + pgcnt_t curr_page; ///< Current page loaded in disk buffer. + bool cache_dirty; ///< True if current cache is dirty (nneds to be flushed). + + /** + * Lowest address, in page array, for free pages. + * Pages above this element are free for use. + */ + pgcnt_t free_page_start; + + disk_size_t disk_size; ///< Size of the disk, in bytes (page_count * page_size). + disk_size_t free_bytes; ///< Free space on the disk. + + List file_opened_list; ///< List used to keep trace of open files. + /* TODO add other fields. */ +} BattFsSuper; + +/** + * True if space on \a disk is over. + */ +#define SPACE_OVER(disk) ((disk)->free_page_start >= (disk)->page_count) + +typedef uint8_t filemode_t; ///< Type for file open modes. +typedef int32_t file_size_t; ///< Type for file sizes. + +/** + * Modes for battfs_fileopen. + * \{ + */ +#define BATTFS_CREATE BV(0) ///< Create file if does not exist +#define BATTFS_RD BV(1) ///< Open file for reading +#define BATTFS_WR BV(2) ///< Open file fir writing +/*/}*/ + + +/** + * File errors. + * \{ + */ +#define BATTFS_NEGATIVE_SEEK_ERR BV(0) ///< Trying to read/write before file start. +#define BATTFS_DISK_READ_ERR BV(1) ///< Error reading from disk driver. +#define BATTFS_DISK_LOADPAGE_ERR BV(2) ///< Error loading a disk page in the buffer. +#define BATTFS_DISK_BUFFERWR_ERR BV(3) ///< Error writing in the disk page buffer. +#define BATTFS_DISK_GETNEWPAGE_ERR BV(4) ///< Error getting a free page. +#define BATTFS_DISK_BUFFERRD_ERR BV(6) ///< Error reading from the disk page buffer. +#define BATTFS_DISK_SPACEOVER_ERR BV(7) ///< No more disk space available. +#define BATTFS_DISK_FLUSHBUF_ERR BV(8) ///< Error flushing (writing) the current page to disk. +#define BATTFS_FILE_NOT_FOUND_ERR BV(9) ///< File not found on disk. +/*/}*/ + +/** + * Describe a BattFs file usign a KFile. + */ +typedef struct BattFs +{ + KFile fd; ///< KFile context + Node link; ///< Link for inserting in opened file list + inode_t inode; ///< inode of the opened file + BattFsSuper *disk; ///< Disk context + filemode_t mode; ///< File open mode + pgcnt_t *start; ///< Pointer to page_array file start position. + pgcnt_t max_off; ///< Max page offset allocated for the file. + int errors; ///< File status/errors +} BattFs; + +/** + * Id for battfs file descriptors. + */ +#define KFT_BATTFS MAKE_ID('B', 'T', 'F', 'S') + +/** + * Macro used to cast a KFile to a BattFS. + * Also perform dynamic type check. + */ +INLINE BattFs * BATTFS_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_BATTFS); + return (BattFs *)fd; +} + +bool battfs_mount(struct BattFsSuper *d); +bool battfs_fsck(struct BattFsSuper *disk); +bool battfs_umount(struct BattFsSuper *disk); + +bool battfs_fileExists(BattFsSuper *disk, inode_t inode); +bool battfs_fileopen(BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode); +bool battfs_writeTestBlock(struct BattFsSuper *disk, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff); +#endif /* FS_BATTFS_H */ diff --git a/2.5/bertos/fs/battfs_test.c b/2.5/bertos/fs/battfs_test.c new file mode 100644 index 00000000..642e6d64 --- /dev/null +++ b/2.5/bertos/fs/battfs_test.c @@ -0,0 +1,1149 @@ +/** + * \file + * + * + * \brief BattFS Test. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include + +#include +#include + +#include +#include +#include + +#define FILE_SIZE 32768 +#define PAGE_SIZE 128 +#define PAGE_COUNT FILE_SIZE / PAGE_SIZE + +#if UNIT_TEST + +const char test_filename[]="battfs_disk.bin"; + +static uint8_t page_buffer[PAGE_SIZE]; + +static size_t disk_page_read(struct BattFsSuper *d, pgcnt_t page, pgaddr_t addr, void *buf, size_t size) +{ + //TRACEMSG("page:%d, addr:%d, size:%d", page, addr, size); + FILE *fp = (FILE *)d->disk_ctx; + fseek(fp, page * d->page_size + addr, SEEK_SET); + return fread(buf, 1, size, fp); +} + +static size_t disk_buffer_write(struct BattFsSuper *d, pgaddr_t addr, const void *buf, size_t size) +{ + //TRACEMSG("addr:%d, size:%d", addr, size); + ASSERT(addr + size <= d->page_size); + memcpy(&page_buffer[addr], buf, size); + + return size; +} + +static size_t disk_buffer_read(struct BattFsSuper *d, pgaddr_t addr, void *buf, size_t size) +{ + //TRACEMSG("addr:%d, size:%d", addr, size); + ASSERT(addr + size <= d->page_size); + memcpy(buf, &page_buffer[addr], size); + + return size; +} + +static bool disk_page_load(struct BattFsSuper *d, pgcnt_t page) +{ + FILE *fp = (FILE *)d->disk_ctx; + //TRACEMSG("page:%d", page); + fseek(fp, page * d->page_size, SEEK_SET); + return fread(page_buffer, 1, d->page_size, fp) == d->page_size; +} + +static bool disk_page_save(struct BattFsSuper *d, pgcnt_t page) +{ + FILE *fp = (FILE *)d->disk_ctx; + //TRACEMSG("page:%d", page); + fseek(fp, page * d->page_size, SEEK_SET); + return fwrite(page_buffer, 1, d->page_size, fp) == d->page_size; +} + +static bool disk_page_erase(struct BattFsSuper *d, pgcnt_t page) +{ + FILE *fp = (FILE *)d->disk_ctx; + //TRACEMSG("page:%d", page); + fseek(fp, page * d->page_size, SEEK_SET); + + for (int i = 0; i < d->page_size; i++) + if (fputc(0xff, fp) == EOF) + return false; + return true; +} + +static bool disk_close(struct BattFsSuper *d) +{ + FILE *fp = (FILE *)d->disk_ctx; + //TRACE; + free(d->page_array); + return (fclose(fp) != EOF); +} + +static bool disk_open(struct BattFsSuper *d) +{ + d->read = disk_page_read; + d->load = disk_page_load; + d->bufferWrite = disk_buffer_write; + d->bufferRead = disk_buffer_read; + d->save = disk_page_save; + d->erase = disk_page_erase; + d->close = disk_close; + + FILE *fp = fopen(test_filename, "r+b"); + ASSERT(fp); + d->disk_ctx = fp; + fseek(fp, 0, SEEK_END); + d->page_size = PAGE_SIZE; + d->page_count = ftell(fp) / d->page_size; + d->page_array = malloc(d->page_count * sizeof(pgcnt_t)); + //TRACEMSG("page_size:%d, page_count:%d\n", d->page_size, d->page_count); + return (fp && d->page_array); +} + +static void testCheck(BattFsSuper *disk, pgcnt_t *reference) +{ + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + + for (int i = 0; i < disk->page_count; i++) + { + if (disk->page_array[i] != reference[i]) + { + kprintf("Error at addr %d: page_array read", i); + for (pgcnt_t i = 0; i < disk->page_count; i++) + { + if (!(i % 16)) + kputchar('\n'); + kprintf("%04d ", disk->page_array[i]); + } + kputchar('\n'); + kprintf("Expected:"); + for (pgcnt_t i = 0; i < disk->page_count; i++) + { + if (!(i % 16)) + kputchar('\n'); + kprintf("%04d ", reference[i]); + } + kputchar('\n'); + battfs_umount(disk); + exit(2); + } + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); +} + +static void diskNew(BattFsSuper *disk) +{ + pgcnt_t ref[PAGE_COUNT]; + TRACEMSG("1: disk new\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + fclose(fpt); + for (int i = 0; i < PAGE_COUNT; i++) + ref[i] = i; + + testCheck(disk, ref); + TRACEMSG("1: passed\n"); +} + +static void disk1File(BattFsSuper *disk) +{ + pgcnt_t ref[PAGE_COUNT]; + TRACEMSG("2: disk full with 1 contiguos file\n"); + + + FILE *fp = fopen(test_filename, "w+"); + + for (int i = 0; i < PAGE_COUNT; i++) + { + battfs_writeTestBlock(disk, i, 0, 0, disk->data_size, i); + ref[i] = i; + } + fclose(fp); + + testCheck(disk, ref); + TRACEMSG("2: passed\n"); +} + + +static void diskHalfFile(BattFsSuper *disk) +{ + pgcnt_t ref[PAGE_COUNT]; + TRACEMSG("3: disk half full with 1 contiguos file, rest unformatted\n"); + + + FILE *fp = fopen(test_filename, "w+"); + + for (int i = 0; i < PAGE_COUNT / 2; i++) + { + battfs_writeTestBlock(disk, i, 0, 0, disk->data_size, i); + ref[i] = i; + } + fseek(fp, FILE_SIZE / 2, SEEK_SET); + for (int i = FILE_SIZE / 2; i < FILE_SIZE; i++) + fputc(0xff, fp); + fclose(fp); + + for (int i = PAGE_COUNT / 2; i < PAGE_COUNT; i++) + { + ref[i] = i; + } + + + testCheck(disk, ref); + TRACEMSG("3: passed\n"); +} + + +static void oldSeq1(BattFsSuper *disk) +{ + pgcnt_t ref[4]; + TRACEMSG("6: 1 file with 1 old seq num, 1 free block\n"); + + + FILE *fp = fopen(test_filename, "w+"); + // page, inode, seq, fill, pgoff + battfs_writeTestBlock(disk, 0, 0, 0, disk->data_size, 0); + battfs_writeTestBlock(disk, 1, 0, 0, disk->data_size, 1); + battfs_writeTestBlock(disk, 2, 0, 1, disk->data_size, 1); + disk->erase(disk, 3); + + + fclose(fp); + ref[0] = 0; + ref[1] = 2; + ref[2] = 1; + ref[3] = 3; + + testCheck(disk, ref); + TRACEMSG("6: passed\n"); +} + +static void oldSeq2(BattFsSuper *disk) +{ + pgcnt_t ref[4]; + TRACEMSG("7: 1 file with 1 old seq num, 1 free block\n"); + + + FILE *fp = fopen(test_filename, "w+"); + // page, inode, seq, fill, pgoff + battfs_writeTestBlock(disk, 0, 0, 0, disk->data_size, 0); + battfs_writeTestBlock(disk, 1, 0, 1, disk->data_size, 1); + battfs_writeTestBlock(disk, 2, 0, 0, disk->data_size, 1); + disk->erase(disk, 3); + + fclose(fp); + ref[0] = 0; + ref[1] = 1; + ref[2] = 2; + ref[3] = 3; + + testCheck(disk, ref); + TRACEMSG("7: passed\n"); +} + +static void oldSeq3(BattFsSuper *disk) +{ + pgcnt_t ref[4]; + TRACEMSG("8: 1 file with 1 old seq num, 1 free block\n"); + + + FILE *fp = fopen(test_filename, "w+"); + + // page, inode, seq, fill, pgoff + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, 0, 0, disk->data_size, 0); + battfs_writeTestBlock(disk, 2, 0, 1, disk->data_size, 1); + battfs_writeTestBlock(disk, 3, 0, 0, disk->data_size, 1); + + + fclose(fp); + ref[0] = 1; + ref[1] = 2; + ref[2] = 0; + ref[3] = 3; + + testCheck(disk, ref); + TRACEMSG("8: passed\n"); +} + +static void oldSeq2File(BattFsSuper *disk) +{ + pgcnt_t ref[8]; + TRACEMSG("9: 2 file with old seq num, 2 free block\n"); + + + FILE *fp = fopen(test_filename, "w+"); + + // page, inode, seq, fill, pgoff + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, 0, 0, disk->data_size, 0); + battfs_writeTestBlock(disk, 2, 0, 3, disk->data_size, 1); + battfs_writeTestBlock(disk, 3, 0, 0, disk->data_size, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, 4, 0, disk->data_size, 0); + battfs_writeTestBlock(disk, 6, 4, 1, disk->data_size, 1); + battfs_writeTestBlock(disk, 7, 4, 0, disk->data_size, 1); + + + fclose(fp); + ref[0] = 1; + ref[1] = 2; + ref[2] = 5; + ref[3] = 6; + ref[4] = 0; + ref[5] = 3; + ref[6] = 4; + ref[7] = 7; + + testCheck(disk, ref); + TRACEMSG("9: passed\n"); +} + +static void openFile(BattFsSuper *disk) +{ + BattFs fd1; + BattFs fd2; + TRACEMSG("10: open file test, inode 0 and inode 4\n"); + + FILE *fp = fopen(test_filename, "w+"); + + int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + inode_t INEXISTENT_INODE = 123; + unsigned int MODE = 0; + + // page, inode, seq, fill, pgoff + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 3, INODE, 0, PAGE_FILL, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 7, INODE2, 0, PAGE_FILL, 1); + + fclose(fp); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(!battfs_fileExists(disk, INEXISTENT_INODE)); + + ASSERT(battfs_fileExists(disk, INODE)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(fd1.fd.size == PAGE_FILL * 2); + ASSERT(fd1.fd.seek_pos == 0); + ASSERT(fd1.mode == MODE); + ASSERT(fd1.inode == INODE); + ASSERT(fd1.start == &disk->page_array[0]); + ASSERT(fd1.disk == disk); + ASSERT(LIST_HEAD(&disk->file_opened_list) == &fd1.link); + + ASSERT(kfile_reopen(&fd1.fd) == &fd1.fd); + ASSERT(fd1.fd.size == PAGE_FILL * 2); + ASSERT(fd1.fd.seek_pos == 0); + ASSERT(fd1.mode == MODE); + ASSERT(fd1.inode == INODE); + ASSERT(fd1.start == &disk->page_array[0]); + ASSERT(fd1.disk == disk); + ASSERT(LIST_HEAD(&disk->file_opened_list) == &fd1.link); + + ASSERT(battfs_fileExists(disk, INODE2)); + ASSERT(battfs_fileopen(disk, &fd2, INODE2, MODE)); + ASSERT(fd2.fd.size == PAGE_FILL * 2); + ASSERT(fd2.fd.seek_pos == 0); + ASSERT(fd2.mode == MODE); + ASSERT(fd2.inode == INODE2); + ASSERT(fd2.start == &disk->page_array[2]); + ASSERT(fd2.disk == disk); + ASSERT(LIST_HEAD(&disk->file_opened_list)->succ == &fd2.link); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(kfile_close(&fd2.fd) == 0); + ASSERT(kfile_error(&fd2.fd) == 0); + ASSERT(LIST_EMPTY(&disk->file_opened_list)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("10: passed\n"); +} + +static void readFile(BattFsSuper *disk) +{ + BattFs fd1; + uint8_t buf[16]; + + TRACEMSG("11: read file test\n"); + + FILE *fp = fopen(test_filename, "w+"); + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + unsigned int MODE = 0; + + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 3, INODE, 0, PAGE_FILL, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 7, INODE2, 0, PAGE_FILL, 1); + + fclose(fp); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("11: passed\n"); +} + +static void readAcross(BattFsSuper *disk) +{ + BattFs fd1; + + TRACEMSG("12: read file test across page boundary and seek test\n"); + + FILE *fp = fopen(test_filename, "w+"); + + const unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + unsigned int MODE = 0; + uint8_t buf[PAGE_FILL + BATTFS_HEADER_LEN / 2]; + + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 3, INODE, 0, PAGE_FILL, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, INODE, 0, PAGE_FILL, 2); + battfs_writeTestBlock(disk, 6, INODE, 1, PAGE_FILL, 3); + battfs_writeTestBlock(disk, 7, INODE, 0, PAGE_FILL, 3); + + fclose(fp); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 2); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 3); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == PAGE_FILL * 4 - sizeof(buf) * 3); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)fd1.fd.size); + for (size_t i = 0; i < PAGE_FILL * 4 - sizeof(buf) * 3; i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(fd1.fd.seek_pos == 0); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_END) == (kfile_off_t)fd1.fd.size); + ASSERT(fd1.fd.seek_pos = (kfile_off_t)fd1.fd.size); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("12: passed\n"); +} + + +static void writeFile(BattFsSuper *disk) +{ + BattFs fd1; + uint8_t buf[PAGE_SIZE - BATTFS_HEADER_LEN]; + + TRACEMSG("13: write file test\n"); + + FILE *fp = fopen(test_filename, "w+"); + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + unsigned int MODE = 0; + + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 3, INODE, 0, PAGE_FILL, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 7, INODE2, 0, PAGE_FILL, 1); + + fclose(fp); + + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = i; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(fd1.fd.seek_pos == 0); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == i); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("13: passed\n"); +} + +static void writeAcross(BattFsSuper *disk) +{ + BattFs fd1; + + TRACEMSG("14: write file test across page boundary and seek test\n"); + + FILE *fp = fopen(test_filename, "w+"); + + const unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + unsigned int MODE = 0; + uint8_t buf[PAGE_FILL + BATTFS_HEADER_LEN / 2]; + + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 3, INODE, 0, PAGE_FILL, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, INODE, 0, PAGE_FILL, 2); + battfs_writeTestBlock(disk, 6, INODE, 1, PAGE_FILL, 3); + battfs_writeTestBlock(disk, 7, INODE, 0, PAGE_FILL, 3); + + fclose(fp); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + + uint8_t val = 0; + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = val++; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf)); + + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = val++; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 2); + + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = val++; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 3); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(fd1.fd.seek_pos == 0); + val = 0; + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == val++); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == val++); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == val++); + + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 3); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("14: passed\n"); +} + +static void createFile(BattFsSuper *disk) +{ + TRACEMSG("15: file creation on new disk\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + fclose(fpt); + + BattFs fd1; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + for (int i = 0; i < FILE_SIZE / 2; i++) + ASSERT(kfile_putc(i, &fd1.fd) != EOF); + + ASSERT(fd1.fd.seek_pos == FILE_SIZE / 2); + ASSERT(fd1.fd.size == FILE_SIZE / 2); + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, 0)); + ASSERT(fd1.fd.size == FILE_SIZE / 2); + ASSERT(fd1.fd.seek_pos == 0); + + uint8_t buf[FILE_SIZE / 2]; + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, FILE_SIZE / 2) == FILE_SIZE / 2); + + for (int i = 0; i < FILE_SIZE / 2; i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(fd1.fd.seek_pos == FILE_SIZE / 2); + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + + TRACEMSG("15: passed\n"); +} + +static void multipleWrite(BattFsSuper *disk) +{ + TRACEMSG("16: multiple write on file\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + fclose(fpt); + + BattFs fd1; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + uint8_t buf[1000]; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + + int j; + for (j = 1; j < 1013; j++) + { + for (unsigned i = 0; i < sizeof(buf); i++) + buf[i] = j+i; + + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + ASSERT(fd1.fd.size == sizeof(buf)); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == ((j+i) & 0xff)); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(disk->free_bytes == disk->disk_size - sizeof(buf)); + } + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(disk->free_bytes == disk->disk_size - sizeof(buf)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, 0)); + ASSERT(fd1.fd.size == sizeof(buf)); + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == ((j-1+i) & 0xff)); + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + + TRACEMSG("16: passed\n"); +} + +static void increaseFile(BattFsSuper *disk) +{ + TRACEMSG("17: increasing dimension of a file with multiple open files.\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE / 10; i++) + fputc(0xff, fpt); + fclose(fpt); + + BattFs fd1,fd2; + inode_t INODE1 = 1, INODE2 = 2; + unsigned int MODE = BATTFS_CREATE; + uint8_t buf[1000]; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE1, MODE)); + ASSERT(battfs_fileopen(disk, &fd2, INODE2, MODE)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(kfile_putc(i, &fd2.fd) != EOF); + ASSERT(kfile_seek(&fd2.fd, 0, KSM_SEEK_SET) == 0); + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd2.fd, buf, sizeof(buf)) == sizeof(buf)); + + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == (i & 0xff)); + ASSERT(kfile_seek(&fd2.fd, 0, KSM_SEEK_SET) == 0); + + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(kfile_putc(i, &fd1.fd) != EOF); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd2.fd, buf, sizeof(buf)) == sizeof(buf)); + + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(kfile_close(&fd2.fd) == 0); + ASSERT(kfile_error(&fd2.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("17: passed\n"); +} + +static void readEOF(BattFsSuper *disk) +{ + BattFs fd1; + uint8_t buf[16]; + + TRACEMSG("18: reading over EOF test\n"); + + FILE *fp = fopen(test_filename, "w+"); + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + unsigned int MODE = 0; + + disk->erase(disk, 0); + battfs_writeTestBlock(disk, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 3, INODE, 0, PAGE_FILL, 1); + disk->erase(disk, 4); + battfs_writeTestBlock(disk, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(disk, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(disk, 7, INODE2, 0, PAGE_FILL, 1); + + fclose(fp); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_seek(&fd1.fd, fd1.fd.size + 10, SEEK_SET) == fd1.fd.size + 10); + ASSERT(fd1.fd.seek_pos == fd1.fd.size + 10); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == 0); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("18: passed\n"); +} + +static void writeEOF(BattFsSuper *disk) +{ + TRACEMSG("19: writing over EOF test\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE / 5; i++) + fputc(0xff, fpt); + fclose(fpt); + + BattFs fd1; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + uint8_t buf[FILE_SIZE / 13]; + + for (int i = 0; i < 2; i++) + buf[i] = i; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + disk_size_t prev_free = disk->free_bytes; + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(fd1.fd.size == 0); + + ASSERT(kfile_seek(&fd1.fd, 2, KSM_SEEK_END) == 2); + ASSERT(kfile_write(&fd1.fd, buf, 2)); + ASSERT(fd1.fd.seek_pos == 4); + ASSERT(fd1.fd.size == 4); + ASSERT(disk->free_bytes == prev_free - 4); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == 0); + + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(kfile_seek(&fd1.fd, sizeof(buf), KSM_SEEK_END) == sizeof(buf) + 4); + for (unsigned i = 0; i < sizeof(buf); i++) + buf[i] = i; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf))); + ASSERT(fd1.fd.seek_pos == sizeof(buf) * 2 + 4); + ASSERT(fd1.fd.size == sizeof(buf) * 2 + 4); + ASSERT(disk->free_bytes == prev_free - sizeof(buf) * 2 - 4); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + ASSERT(fd1.fd.seek_pos == 2); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == 0); + + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + ASSERT(fd1.fd.seek_pos == 4); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == (i & 0xff)); + + memset(buf, 0, 4); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf) + 4); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("19: passed\n"); + +} + +static void endOfSpace(BattFsSuper *disk) +{ + TRACEMSG("20: what happens when disk space is over?\n"); + BattFs fd1; + uint8_t buf[(PAGE_SIZE - BATTFS_HEADER_LEN) * 5]; + + FILE *fp = fopen(test_filename, "w+"); + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + + disk->erase(disk, 0); + disk->erase(disk, 1); + disk->erase(disk, 2); + disk->erase(disk, 3); + fclose(fp); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == PAGE_FILL * 4); + ASSERT(fd1.fd.size == (kfile_off_t)(PAGE_FILL * 4)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)(PAGE_FILL * 4)); + ASSERT(disk->free_bytes == 0); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == BATTFS_DISK_GETNEWPAGE_ERR); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("20: passed\n"); +} + + +static void multipleFilesRW(BattFsSuper *disk) +{ + TRACEMSG("21: multiple files read/write test\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + fclose(fpt); + + #define N_FILES 10 + BattFs fd[N_FILES]; + unsigned int MODE = BATTFS_CREATE; + uint32_t buf[FILE_SIZE / (4 * N_FILES * sizeof(uint32_t))]; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + for (inode_t i = 0; i < N_FILES; i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, MODE)); + + for (int i = N_FILES - 1; i >= 0; i--) + { + for (uint32_t j = 0; j < countof(buf); j++) + buf[j] = j+i; + + ASSERT(kfile_write(&fd[i].fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd[i].fd.size == sizeof(buf)); + ASSERT(fd[i].fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd[i].fd, 0, SEEK_SET) == 0); + } + + for (inode_t i = 0; i < N_FILES; i++) + { + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd[i].fd, buf, sizeof(buf)) == sizeof(buf)); + + for (uint32_t j = 0; j < countof(buf); j++) + ASSERT(buf[j] == j+i); + + ASSERT(fd[i].fd.size == sizeof(buf)); + ASSERT(fd[i].fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd[i].fd, 0, SEEK_SET) == 0); + } + + for (inode_t i = 0; i < N_FILES; i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + + for (inode_t i = 0; i < N_FILES; i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, 0)); + + for (inode_t i = 0; i < N_FILES; i++) + { + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd[i].fd, buf, sizeof(buf)) == sizeof(buf)); + + for (uint32_t j = 0; j < countof(buf); j++) + ASSERT(buf[j] == j+i); + + ASSERT(fd[i].fd.size == sizeof(buf)); + ASSERT(fd[i].fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd[i].fd, 0, SEEK_SET) == 0); + } + + for (inode_t i = 0; i < N_FILES; i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_umount(disk)); + TRACEMSG("21: passed\n"); +} + + +static void openAllFiles(BattFsSuper *disk) +{ + TRACEMSG("22: try to open a lot of files\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + fclose(fpt); + + BattFs fd[BATTFS_MAX_FILES]; + unsigned int MODE = BATTFS_CREATE; + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + for (unsigned i = 0; i < countof(fd); i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, MODE)); + + ASSERT(battfs_fsck(disk)); + + for (unsigned i = 0; i < countof(fd); i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + ASSERT(disk_open(disk)); + ASSERT(battfs_mount(disk)); + ASSERT(battfs_fsck(disk)); + + + for (unsigned i = 0; i < countof(fd); i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, MODE)); + + ASSERT(battfs_fsck(disk)); + + for (unsigned i = 0; i < countof(fd); i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + TRACEMSG("22: passed\n"); +} + + +int battfs_testRun(void) +{ + BattFsSuper disk; + + diskNew(&disk); + disk1File(&disk); + diskHalfFile(&disk); + oldSeq1(&disk); + oldSeq2(&disk); + oldSeq3(&disk); + oldSeq2File(&disk); + openFile(&disk); + readFile(&disk); + readAcross(&disk); + writeFile(&disk); + writeAcross(&disk); + createFile(&disk); + multipleWrite(&disk); + increaseFile(&disk); + readEOF(&disk); + writeEOF(&disk); + endOfSpace(&disk); + multipleFilesRW(&disk); + openAllFiles(&disk); + + kprintf("All tests passed!\n"); + + return 0; +} + +int battfs_testSetup(void) +{ + return 0; +} + +int battfs_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(battfs); + +#endif // _TEST diff --git a/2.5/bertos/fs/fat.c b/2.5/bertos/fs/fat.c new file mode 100644 index 00000000..77590c56 --- /dev/null +++ b/2.5/bertos/fs/fat.c @@ -0,0 +1,144 @@ +/** + * \file + * + * + * \brief FatFS: kfile interface for FatFS module by ChaN. + * + * \version $Id$ + * + * \author Luca Ottaviano + * + */ + +#include "fat.h" + +static size_t fatfile_read(struct KFile *_fd, void *buf, size_t size) +{ + FatFile *fd = FATFILE_CAST(_fd); + UINT count; + fd->error_code = f_read(&fd->fat_file, buf, size, &count); + return count; +} + +static size_t fatfile_write(struct KFile *_fd, const void *buf, size_t size) +{ + FatFile *fd = FATFILE_CAST(_fd); + UINT count; + fd->error_code = f_write(&fd->fat_file, buf, size, &count); + return count; +} + +static int fatfile_close(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + fd->error_code = f_close(&fd->fat_file); + if (fd->error_code) + return EOF; + else + return 0; +} + +static kfile_off_t fatfile_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence) +{ + /* clip at start-of-file + * don't clip at end-of-file when in write mode + */ + FatFile *fd = FATFILE_CAST(_fd); + DWORD lseek_offset = 0; + switch (whence) + { + case KSM_SEEK_SET: + if (offset > 0) + lseek_offset = (DWORD) offset; + break; + case KSM_SEEK_CUR: + if (offset > 0) + lseek_offset = fd->fat_file.fptr + (DWORD) offset; + else + { + if (fd->fat_file.fptr > (DWORD) (-offset)) + lseek_offset = fd->fat_file.fptr - (DWORD)(-offset); + } + break; + case KSM_SEEK_END: + if (offset > 0) + lseek_offset = fd->fat_file.fsize + (DWORD) offset; + else + { + if (fd->fat_file.fsize > (DWORD) (-offset)) + lseek_offset = fd->fat_file.fsize + (DWORD) offset; + } + break; + } + fd->error_code = f_lseek(&fd->fat_file, lseek_offset); + if ((fd->error_code) || (fd->fat_file.fptr != lseek_offset)) + return EOF; + else + /* TODO: this conversion may overflow */ + return (kfile_off_t)fd->fat_file.fptr; +} + +static int fatfile_flush(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + fd->error_code = f_sync(&fd->fat_file); + if (fd->error_code) + return EOF; + else + return 0; +} + +static int fatfile_error(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + return (int)fd->error_code; +} + +static void fatfile_clearerr(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + fd->error_code = FR_OK; +} + +FRESULT fatfile_open(FatFile *file, const char *file_path, BYTE mode) +{ + DB(file->fd._type = KFT_FATFILE); + file->fd.read = fatfile_read; + file->fd.write = fatfile_write; + file->fd.reopen = 0; + file->fd.close = fatfile_close; + file->fd.seek = fatfile_seek; + file->fd.flush = fatfile_flush; + file->fd.error = fatfile_error; + file->fd.clearerr = fatfile_clearerr; + return f_open(&file->fat_file, file_path, mode); +} + diff --git a/2.5/bertos/fs/fat.h b/2.5/bertos/fs/fat.h new file mode 100644 index 00000000..3e7dc787 --- /dev/null +++ b/2.5/bertos/fs/fat.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief FatFS: kfile interface for FatFS module by ChaN. + * + * This driver needs some low level hardware access functions. An example implementation + * is provided in sd.h. + * + * \version $Id$ + * + * \author Luca Ottaviano + * + * $WIZ$ module_name = "fat" + * $WIZ$ module_configuration = "bertos/cfg/cfg_fat.h" + * $WIZ$ module_depends = "kfile", "ff" + * + */ + +#ifndef FS_FAT_H +#define FS_FAT_H + +#include +#include "fatfs/ff.h" + +typedef struct FatFile +{ + KFile fd; + FIL fat_file; + FRESULT error_code; ///< error code for calls like kfile_read +} FatFile; + +#define KFT_FATFILE MAKE_ID('F', 'A', 'T', 'F') + +INLINE FatFile * FATFILE_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FATFILE); + return (FatFile *)fd; +} + +/** + * Initialize \a file and open \a file_path for reading. + * + * \a mode is a OR combination of various flags, you can use \a FA_READ for + * read access or \a FA_WRITE for write access. + * The function returns \a FR_OK if success, other values (defined in ff.h) in case + * of failure. + * + * \param file A pointer to a FatFile structure. + * \param file_path The file path on the filesystem. + * \param mode Open mode for the file, which can be OR'ed together + * \sa ff.h for return code meaning and \a mode flags. + */ +FRESULT fatfile_open(FatFile *file, const char *file_path, BYTE mode); + +#endif /* FS_FAT_H */ + diff --git a/2.5/bertos/fs/fat_test.c b/2.5/bertos/fs/fat_test.c new file mode 100644 index 00000000..8de93406 --- /dev/null +++ b/2.5/bertos/fs/fat_test.c @@ -0,0 +1,129 @@ +/** + * \file + * + * + * \brief FatFs test. + * + * \version $Id$ + * \author Luca Ottaviano + * + * $test$: cp bertos/cfg/cfg_fat.h $cfgdir/ + * $test$: echo "#undef CONFIG_FAT_USE_MKFS" >> $cfgdir/cfg_fat.h + * $test$: echo "#define CONFIG_FAT_USE_MKFS 1" >> $cfgdir/cfg_fat.h + * + */ + +#include "fat.h" + +#include "fatfs/ff.h" +#include "fatfs/diskio.h" + +#include + +/* avoid compiler warnings... */ +int fatfile_testSetup(void); +int fatfile_testTearDown(void); +int fatfile_testRun(void); + +static FATFS file_system; + +int fatfile_testSetup(void) +{ + FRESULT err; + err = f_mount(0, &file_system); + ASSERT(err == FR_OK); + + err = f_mkfs(0, 0, 512); + ASSERT(err == FR_OK); + return 0; +} + +int fatfile_testTearDown(void) +{ + FRESULT err; + err = f_mount(0, 0); + ASSERT(err == FR_OK); + return 0; +} + +int fatfile_testRun(void) +{ + FRESULT fat_err; + FatFile file_handler; + const int SIZE = 10; + int write[SIZE], read[SIZE]; + + fat_err = fatfile_open(&file_handler, "foo.txt", FA_WRITE | FA_CREATE_ALWAYS); + ASSERT(fat_err == FR_OK); + + for (int i = 0; i < SIZE; ++i) + { + write[i] = i; + size_t count = kfile_write(&file_handler.fd, &i, sizeof(int)); + ASSERT(count == sizeof(int)); + } + /* test error function */ + int tmp; + if (kfile_read(&file_handler.fd, &tmp, sizeof(int)) < sizeof(int)) + ASSERT(kfile_error(&file_handler.fd) == FR_DENIED); + kfile_clearerr(&file_handler.fd); + ASSERT(file_handler.error_code == FR_OK); + + + int err = 0; + err = kfile_close(&file_handler.fd); + ASSERT(err == 0); + + fat_err = fatfile_open(&file_handler, "foo.txt", FA_READ); + ASSERT(fat_err == FR_OK); + + for (int i = 0; i < SIZE; ++ i) + { + size_t count = kfile_read(&file_handler.fd, &read[i], sizeof(int)); + ASSERT(count == sizeof(int)); + /* check for correctness */ + ASSERT(read[i] == write[i]); + } + /* test kfile_seek() */ + ASSERT(kfile_seek(&file_handler.fd, -(sizeof(int) * SIZE * 2), KSM_SEEK_CUR) == 0); + ASSERT(kfile_seek(&file_handler.fd, sizeof(int), KSM_SEEK_END) == EOF); + + ASSERT(kfile_close(&file_handler.fd) == 0); + + fatfile_open(&file_handler, "foo.txt", FA_READ | FA_WRITE); + ASSERT((size_t)kfile_seek(&file_handler.fd, sizeof(int), KSM_SEEK_END) == sizeof(int) * (SIZE + 1)); + ASSERT(kfile_seek(&file_handler.fd, -SIZE, KSM_SEEK_SET) == 0); + + return 0; +} + + +TEST_MAIN(fatfile); diff --git a/2.5/bertos/fs/fatfs/00readme.txt b/2.5/bertos/fs/fatfs/00readme.txt new file mode 100644 index 00000000..f38a9587 --- /dev/null +++ b/2.5/bertos/fs/fatfs/00readme.txt @@ -0,0 +1,96 @@ +FatFs/Tiny-FatFs Module Source Files R0.07a (C)ChaN, 2009 + + +FILES + + ff.h Common include file for FatFs and application module. + ff.c FatFs module. + diskio.h Common include file for FatFs and disk I/O module. + diskio.c Skeleton of low level disk I/O module. + integer.h Alternative type definitions for integer variables. + option Optional external functions. + + Low level disk I/O module is not included in this archive because the FatFs + module is only a generic file system layer and not depend on any specific + storage device. You have to provide a low level disk I/O module that written + to control your storage device. + + + +AGREEMENTS + + FatFs module is an open source software to implement FAT file system to + small embedded systems. This is a free software and is opened for education, + research and commercial developments under license policy of following trems. + + Copyright (C) 2009, ChaN, all right reserved. + + * The FatFs module is a free software and there is NO WARRANTY. + * No restriction on use. You can use, modify and redistribute it for + personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY. + * Redistributions of source code must retain the above copyright notice. + + + +REVISION HISTORY + + Feb 26, 2006 R0.00 Prototype + + Apr 29, 2006 R0.01 First release. + + Jun 01, 2006 R0.02 Added FAT12. + Removed unbuffered mode. + Fixed a problem on small (<32M) patition. + + Jun 10, 2006 R0.02a Added a configuration option _FS_MINIMUM. + + Sep 22, 2006 R0.03 Added f_rename. + Changed option _FS_MINIMUM to _FS_MINIMIZE. + + Dec 11, 2006 R0.03a Improved cluster scan algolithm to write files fast. + Fixed f_mkdir creates incorrect directory on FAT32. + + Feb 04, 2007 R0.04 Supported multiple drive system. (FatFs) + Changed some APIs for multiple drive system. + Added f_mkfs. (FatFs) + Added _USE_FAT32 option. (Tiny-FatFs) + + Apr 01, 2007 R0.04a Supported multiple partitions on a plysical drive. (FatFs) + Fixed an endian sensitive code in f_mkfs. (FatFs) + Added a capability of extending the file size to f_lseek. + Added minimization level 3. + Fixed a problem that can collapse a sector when recreate an + existing file in any sub-directory at non FAT32 cfg. (Tiny-FatFs) + + May 05, 2007 R0.04b Added _USE_NTFLAG option. + Added FSInfo support. + Fixed some problems corresponds to FAT32. (Tiny-FatFs) + Fixed DBCS name can result FR_INVALID_NAME. + Fixed short seek (0 < ofs <= csize) collapses the file object. + + Aug 25, 2007 R0.05 Changed arguments of f_read, f_write. + Changed arguments of f_mkfs. (FatFs) + Fixed f_mkfs on FAT32 creates incorrect FSInfo. (FatFs) + Fixed f_mkdir on FAT32 creates incorrect directory. (FatFs) + + Feb 03, 2008 R0.05a Added f_truncate(). + Added f_utime(). + Fixed off by one error at FAT sub-type determination. + Fixed btr in f_read() can be mistruncated. + Fixed cached sector is not flushed when create and close without write. + + Apr 01, 2008 R0.06 Added f_forward(). (Tiny-FatFs) + Added string functions: fputc(), fputs(), fprintf() and fgets(). + Improved performance of f_lseek() on move to the same or following cluster. + + Apr 01, 2009, R0.07 Merged Tiny-FatFs as a buffer configuration option. + Added long file name support. + Added multiple code page support. + Added re-entrancy for multitask operation. + Added auto cluster size selection to f_mkfs(). + Added rewind option to f_readdir(). + Changed result code of critical errors. + Renamed string functions to avoid name collision. + + Apr 14, 2009, R0.07a Separated out OS dependent code on reentrant cfg. + Added multiple sector size support. diff --git a/2.5/bertos/fs/fatfs/diskio.c b/2.5/bertos/fs/fatfs/diskio.c new file mode 100644 index 00000000..756a45a9 --- /dev/null +++ b/2.5/bertos/fs/fatfs/diskio.c @@ -0,0 +1,202 @@ +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */ +/*-----------------------------------------------------------------------*/ +/* This is a stub disk I/O module that acts as front end of the existing */ +/* disk I/O modules and attach it to FatFs module with common interface. */ +/*-----------------------------------------------------------------------*/ + +#include "diskio.h" + +/*-----------------------------------------------------------------------*/ +/* Correspondence between physical drive number and physical drive. */ + +#define ATA 0 +#define MMC 1 +#define USB 2 + + + +/*-----------------------------------------------------------------------*/ +/* Inidialize a Drive */ + +DSTATUS disk_initialize ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + DSTATUS stat; + int result; + + switch (drv) { + case ATA : + result = ATA_disk_initialize(); + // translate the reslut code here + + return stat; + + case MMC : + result = MMC_disk_initialize(); + // translate the reslut code here + + return stat; + + case USB : + result = USB_disk_initialize(); + // translate the reslut code here + + return stat; + } + return STA_NOINIT; +} + + + +/*-----------------------------------------------------------------------*/ +/* Return Disk Status */ + +DSTATUS disk_status ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + DSTATUS stat; + int result; + + switch (drv) { + case ATA : + result = ATA_disk_status(); + // translate the reslut code here + + return stat; + + case MMC : + result = MMC_disk_status(); + // translate the reslut code here + + return stat; + + case USB : + result = USB_disk_status(); + // translate the reslut code here + + return stat; + } + return STA_NOINIT; +} + + + +/*-----------------------------------------------------------------------*/ +/* Read Sector(s) */ + +DRESULT disk_read ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE *buff, /* Data buffer to store read data */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to read (1..255) */ +) +{ + DRESULT res; + int result; + + switch (drv) { + case ATA : + result = ATA_disk_read(buff, sector, count); + // translate the reslut code here + + return res; + + case MMC : + result = MMC_disk_read(buff, sector, count); + // translate the reslut code here + + return res; + + case USB : + result = USB_disk_read(buff, sector, count); + // translate the reslut code here + + return res; + } + return RES_PARERR; +} + + + +/*-----------------------------------------------------------------------*/ +/* Write Sector(s) */ + +#if _READONLY == 0 +DRESULT disk_write ( + BYTE drv, /* Physical drive nmuber (0..) */ + const BYTE *buff, /* Data to be written */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to write (1..255) */ +) +{ + DRESULT res; + int result; + + switch (drv) { + case ATA : + result = ATA_disk_write(buff, sector, count); + // translate the reslut code here + + return res; + + case MMC : + result = MMC_disk_write(buff, sector, count); + // translate the reslut code here + + return res; + + case USB : + result = USB_disk_write(buff, sector, count); + // translate the reslut code here + + return res; + } + return RES_PARERR; +} +#endif /* _READONLY */ + + + +/*-----------------------------------------------------------------------*/ +/* Miscellaneous Functions */ + +DRESULT disk_ioctl ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive control data */ +) +{ + DRESULT res; + int result; + + switch (drv) { + case ATA : + // pre-process here + + result = ATA_disk_ioctl(ctrl, buff); + // post-process here + + return res; + + case MMC : + // pre-process here + + result = MMC_disk_ioctl(ctrl, buff); + // post-process here + + return res; + + case USB : + // pre-process here + + result = USB_disk_ioctl(ctrl, buff); + // post-process here + + return res; + } + return RES_PARERR; +} + diff --git a/2.5/bertos/fs/fatfs/diskio.h b/2.5/bertos/fs/fatfs/diskio.h new file mode 100644 index 00000000..6fde2dde --- /dev/null +++ b/2.5/bertos/fs/fatfs/diskio.h @@ -0,0 +1,70 @@ +/*----------------------------------------------------------------------- +/ Low level disk interface modlue include file R0.07 (C)ChaN, 2009 +/-----------------------------------------------------------------------*/ + +#ifndef _DISKIO + +#define _READONLY 0 /* 1: Read-only mode */ +#define _USE_IOCTL 1 + +#include "integer.h" + + +/* Status of Disk Functions */ +typedef BYTE DSTATUS; + +/* Results of Disk Functions */ +typedef enum { + RES_OK = 0, /* 0: Successful */ + RES_ERROR, /* 1: R/W Error */ + RES_WRPRT, /* 2: Write Protected */ + RES_NOTRDY, /* 3: Not Ready */ + RES_PARERR /* 4: Invalid Parameter */ +} DRESULT; + + +/*---------------------------------------*/ +/* Prototypes for disk control functions */ + +BOOL assign_drives (int argc, char *argv[]); +DSTATUS disk_initialize (BYTE); +DSTATUS disk_status (BYTE); +DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE); +#if _READONLY == 0 +DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE); +#endif +DRESULT disk_ioctl (BYTE, BYTE, void*); + + + +/* Disk Status Bits (DSTATUS) */ + +#define STA_NOINIT 0x01 /* Drive not initialized */ +#define STA_NODISK 0x02 /* No medium in the drive */ +#define STA_PROTECT 0x04 /* Write protected */ + + +/* Command code for disk_ioctrl() */ + +/* Generic command */ +#define CTRL_SYNC 0 /* Mandatory for write functions */ +#define GET_SECTOR_COUNT 1 /* Mandatory for only f_mkfs() */ +#define GET_SECTOR_SIZE 2 +#define GET_BLOCK_SIZE 3 /* Mandatory for only f_mkfs() */ +#define CTRL_POWER 4 +#define CTRL_LOCK 5 +#define CTRL_EJECT 6 +/* MMC/SDC command */ +#define MMC_GET_TYPE 10 +#define MMC_GET_CSD 11 +#define MMC_GET_CID 12 +#define MMC_GET_OCR 13 +#define MMC_GET_SDSTAT 14 +/* ATA/CF command */ +#define ATA_GET_REV 20 +#define ATA_GET_MODEL 21 +#define ATA_GET_SN 22 + + +#define _DISKIO +#endif diff --git a/2.5/bertos/fs/fatfs/ff.c b/2.5/bertos/fs/fatfs/ff.c new file mode 100644 index 00000000..ed16bc02 --- /dev/null +++ b/2.5/bertos/fs/fatfs/ff.c @@ -0,0 +1,2947 @@ +/*----------------------------------------------------------------------------/ +/ FatFs - FAT file system module R0.07a (C)ChaN, 2009 +/-----------------------------------------------------------------------------/ +/ FatFs module is an open source software to implement FAT file system to +/ small embedded systems. This is a free software and is opened for education, +/ research and commercial developments under license policy of following trems. +/ +/ Copyright (C) 2009, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +//-----------------------------------------------------------------------------/ +/ Feb 26,'06 R0.00 Prototype. +/ +/ Apr 29,'06 R0.01 First stable version. +/ +/ Jun 01,'06 R0.02 Added FAT12 support. +/ Removed unbuffered mode. +/ Fixed a problem on small (<32M) patition. +/ Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM). +/ +/ Sep 22,'06 R0.03 Added f_rename(). +/ Changed option _FS_MINIMUM to _FS_MINIMIZE. +/ Dec 11,'06 R0.03a Improved cluster scan algolithm to write files fast. +/ Fixed f_mkdir() creates incorrect directory on FAT32. +/ +/ Feb 04,'07 R0.04 Supported multiple drive system. +/ Changed some interfaces for multiple drive system. +/ Changed f_mountdrv() to f_mount(). +/ Added f_mkfs(). +/ Apr 01,'07 R0.04a Supported multiple partitions on a plysical drive. +/ Added a capability of extending file size to f_lseek(). +/ Added minimization level 3. +/ Fixed an endian sensitive code in f_mkfs(). +/ May 05,'07 R0.04b Added a configuration option _USE_NTFLAG. +/ Added FSInfo support. +/ Fixed DBCS name can result FR_INVALID_NAME. +/ Fixed short seek (<= csize) collapses the file object. +/ +/ Aug 25,'07 R0.05 Changed arguments of f_read(), f_write() and f_mkfs(). +/ Fixed f_mkfs() on FAT32 creates incorrect FSInfo. +/ Fixed f_mkdir() on FAT32 creates incorrect directory. +/ Feb 03,'08 R0.05a Added f_truncate() and f_utime(). +/ Fixed off by one error at FAT sub-type determination. +/ Fixed btr in f_read() can be mistruncated. +/ Fixed cached sector is not flushed when create and close +/ without write. +/ +/ Apr 01,'08 R0.06 Added fputc(), fputs(), fprintf() and fgets(). +/ Improved performance of f_lseek() on moving to the same +/ or following cluster. +/ +/ Apr 01,'09 R0.07 Merged Tiny-FatFs as a buffer configuration option. +/ Added long file name support. +/ Added multiple code page support. +/ Added re-entrancy for multitask operation. +/ Added auto cluster size selection to f_mkfs(). +/ Added rewind option to f_readdir(). +/ Changed result code of critical errors. +/ Renamed string functions to avoid name collision. +/ Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg. +/ Added multiple sector size support. +/---------------------------------------------------------------------------*/ + +#include "ff.h" /* FatFs configurations and declarations */ +#include "diskio.h" /* Declarations of low level disk I/O functions */ + + +/*-------------------------------------------------------------------------- + + Module Private Definitions + +---------------------------------------------------------------------------*/ + +#if _FS_REENTRANT +#if _USE_LFN == 1 +#error Static LFN work area must not be used in re-entrant configuration. +#endif +#define ENTER_FF(fs) { if (!lock_fs(fs)) return FR_TIMEOUT; } +#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; } + +#else +#define ENTER_FF(fs) +#define LEAVE_FF(fs, res) return res + +#endif + +#define ABORT(fs, res) { fp->flag |= FA__ERROR; LEAVE_FF(fs, res); } + +#ifndef NULL +#define NULL 0 +#endif + + +/*-------------------------------------------------------------------------- + + Private Work Area + +---------------------------------------------------------------------------*/ + +static +FATFS *FatFs[_DRIVES]; /* Pointer to the file system objects (logical drives) */ +static +WORD Fsid; /* File system mount ID */ + + +#if _USE_LFN == 1 /* LFN with static LFN working buffer */ +static +WORD LfnBuf[_MAX_LFN + 1]; +#define NAMEBUF(sp,lp) BYTE sp[12]; WCHAR *lp = LfnBuf +#define INITBUF(dj,sp,lp) dj.fn = sp; dj.lfn = lp + +#elif _USE_LFN > 1 /* LFN with dynamic LFN working buffer */ +#define NAMEBUF(sp,lp) BYTE sp[12]; WCHAR lbuf[_MAX_LFN + 1], *lp = lbuf +#define INITBUF(dj,sp,lp) dj.fn = sp; dj.lfn = lp + +#else /* No LFN */ +#define NAMEBUF(sp,lp) BYTE sp[12] +#define INITBUF(dj,sp,lp) dj.fn = sp + +#endif + + + + +/*-------------------------------------------------------------------------- + + Private Functions + +---------------------------------------------------------------------------*/ + + +/*-----------------------------------------------------------------------*/ +/* String functions */ +/*-----------------------------------------------------------------------*/ + +/* Copy memory to memory */ +static +void mem_cpy (void* dst, const void* src, int cnt) { + char *d = (char*)dst; + const char *s = (const char *)src; + while (cnt--) *d++ = *s++; +} + +/* Fill memory */ +static +void mem_set (void* dst, int val, int cnt) { + char *d = (char*)dst; + while (cnt--) *d++ = (char)val; +} + +/* Compare memory to memory */ +static +int mem_cmp (const void* dst, const void* src, int cnt) { + const char *d = (const char *)dst, *s = (const char *)src; + int r = 0; + while (cnt-- && (r = *d++ - *s++) == 0) ; + return r; +} + +/* Check if chr is contained in the string */ +static +int chk_chr (const char* str, int chr) { + while (*str && *str != chr) str++; + return *str; +} + + + +/*-----------------------------------------------------------------------*/ +/* Request/Release grant to access the volume */ +/*-----------------------------------------------------------------------*/ +#if _FS_REENTRANT + +static +BOOL lock_fs ( + FATFS *fs /* File system object */ +) +{ + return ff_req_grant(fs->sobj); +} + + +static +void unlock_fs ( + FATFS *fs, /* File system object */ + FRESULT res /* Result code to be returned */ +) +{ + if (res != FR_NOT_ENABLED && + res != FR_INVALID_DRIVE && + res != FR_INVALID_OBJECT && + res != FR_TIMEOUT) { + ff_rel_grant(fs->sobj); + } +} +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Change window offset */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT move_window ( + FATFS *fs, /* File system object */ + DWORD sector /* Sector number to make apperance in the fs->win[] */ +) /* Move to zero only writes back dirty window */ +{ + DWORD wsect; + + + wsect = fs->winsect; + if (wsect != sector) { /* Changed current window */ +#if !_FS_READONLY + if (fs->wflag) { /* Write back dirty window if needed */ + if (disk_write(fs->drive, fs->win, wsect, 1) != RES_OK) + return FR_DISK_ERR; + fs->wflag = 0; + if (wsect < (fs->fatbase + fs->sects_fat)) { /* In FAT area */ + BYTE nf; + for (nf = fs->n_fats; nf >= 2; nf--) { /* Refrect the change to FAT copy */ + wsect += fs->sects_fat; + disk_write(fs->drive, fs->win, wsect, 1); + } + } + } +#endif + if (sector) { + if (disk_read(fs->drive, fs->win, sector, 1) != RES_OK) + return FR_DISK_ERR; + fs->winsect = sector; + } + } + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Clean-up cached data */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT sync ( /* FR_OK: successful, FR_DISK_ERR: failed */ + FATFS *fs /* File system object */ +) +{ + FRESULT res; + + + res = move_window(fs, 0); + if (res == FR_OK) { + /* Update FSInfo sector if needed */ + if (fs->fs_type == FS_FAT32 && fs->fsi_flag) { + fs->winsect = 0; + mem_set(fs->win, 0, 512); + ST_WORD(fs->win+BS_55AA, 0xAA55); + ST_DWORD(fs->win+FSI_LeadSig, 0x41615252); + ST_DWORD(fs->win+FSI_StrucSig, 0x61417272); + ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust); + ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust); + disk_write(fs->drive, fs->win, fs->fsi_sector, 1); + fs->fsi_flag = 0; + } + /* Make sure that no pending write process in the physical drive */ + if (disk_ioctl(fs->drive, CTRL_SYNC, (void*)NULL) != RES_OK) + res = FR_DISK_ERR; + } + + return res; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Get a cluster status */ +/*-----------------------------------------------------------------------*/ + +static +DWORD get_cluster ( /* 0xFFFFFFFF:Disk error, 1:Interal error, Else:Cluster status */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to get the link information */ +) +{ + WORD wc, bc; + DWORD fsect; + + + if (clst < 2 || clst >= fs->max_clust) /* Check cluster address range */ + return 1; + + fsect = fs->fatbase; + switch (fs->fs_type) { + case FS_FAT12 : + bc = (WORD)clst * 3 / 2; + if (move_window(fs, fsect + (bc / SS(fs)))) break; + wc = fs->win[bc & (SS(fs) - 1)]; bc++; + if (move_window(fs, fsect + (bc / SS(fs)))) break; + wc |= (WORD)fs->win[bc & (SS(fs) - 1)] << 8; + return (clst & 1) ? (wc >> 4) : (wc & 0xFFF); + + case FS_FAT16 : + if (move_window(fs, fsect + (clst / (SS(fs) / 2)))) break; + return LD_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)]); + + case FS_FAT32 : + if (move_window(fs, fsect + (clst / (SS(fs) / 4)))) break; + return LD_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF; + } + + return 0xFFFFFFFF; /* An error occured at the disk I/O layer */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change a cluster status */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT put_cluster ( + FATFS *fs, /* File system object */ + DWORD clst, /* Cluster# to be changed (must be 2 to fs->max_clust-1) */ + DWORD val /* New value to mark the cluster */ +) +{ + WORD bc; + BYTE *p; + DWORD fsect; + FRESULT res; + + + if (clst < 2 || clst >= fs->max_clust) { /* Check cluster address range */ + res = FR_INT_ERR; + + } else { + fsect = fs->fatbase; + switch (fs->fs_type) { + case FS_FAT12 : + bc = (WORD)clst * 3 / 2; + res = move_window(fs, fsect + (bc / SS(fs))); + if (res != FR_OK) break; + p = &fs->win[bc & (SS(fs) - 1)]; + *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val; + bc++; + fs->wflag = 1; + res = move_window(fs, fsect + (bc / SS(fs))); + if (res != FR_OK) break; + p = &fs->win[bc & (SS(fs) - 1)]; + *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); + break; + + case FS_FAT16 : + res = move_window(fs, fsect + (clst / (SS(fs) / 2))); + if (res != FR_OK) break; + ST_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)], (WORD)val); + break; + + case FS_FAT32 : + res = move_window(fs, fsect + (clst / (SS(fs) / 4))); + if (res != FR_OK) break; + ST_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)], val); + break; + + default : + res = FR_INT_ERR; + } + fs->wflag = 1; + } + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Remove a cluster chain */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT remove_chain ( + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to remove chain from */ +) +{ + FRESULT res; + DWORD nxt; + + + if (clst < 2 || clst >= fs->max_clust) { /* Check cluster address range */ + res = FR_INT_ERR; + + } else { + res = FR_OK; + while (clst < fs->max_clust) { /* Not a last link? */ + nxt = get_cluster(fs, clst); /* Get cluster status */ + if (nxt == 0) break; /* Empty cluster? */ + if (nxt == 1) { res = FR_INT_ERR; break; } /* Internal error? */ + if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } /* Disk error? */ + res = put_cluster(fs, clst, 0); /* Mark the cluster "empty" */ + if (res != FR_OK) break; + if (fs->free_clust != 0xFFFFFFFF) { /* Update FSInfo */ + fs->free_clust++; + fs->fsi_flag = 1; + } + clst = nxt; /* Next cluster */ + } + } + + return res; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Stretch or create a cluster chain */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to stretch. 0 means create a new chain. */ +) +{ + DWORD cs, ncl, scl, mcl; + + + mcl = fs->max_clust; + if (clst == 0) { /* Create new chain */ + scl = fs->last_clust; /* Get suggested start point */ + if (scl == 0 || scl >= mcl) scl = 1; + } + else { /* Stretch existing chain */ + cs = get_cluster(fs, clst); /* Check the cluster status */ + if (cs < 2) return 1; /* It is an invalid cluster */ + if (cs < mcl) return cs; /* It is already followed by next cluster */ + scl = clst; + } + + ncl = scl; /* Start cluster */ + for (;;) { + ncl++; /* Next cluster */ + if (ncl >= mcl) { /* Wrap around */ + ncl = 2; + if (ncl > scl) return 0; /* No free custer */ + } + cs = get_cluster(fs, ncl); /* Get the cluster status */ + if (cs == 0) break; /* Found a free cluster */ + if (cs == 0xFFFFFFFF || cs == 1)/* An error occured */ + return cs; + if (ncl == scl) return 0; /* No free custer */ + } + + if (put_cluster(fs, ncl, 0x0FFFFFFF)) /* Mark the new cluster "in use" */ + return 0xFFFFFFFF; + if (clst != 0) { /* Link it to previous one if needed */ + if (put_cluster(fs, clst, ncl)) + return 0xFFFFFFFF; + } + + fs->last_clust = ncl; /* Update FSINFO */ + if (fs->free_clust != 0xFFFFFFFF) { + fs->free_clust--; + fs->fsi_flag = 1; + } + + return ncl; /* Return new cluster number */ +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Get sector# from cluster# */ +/*-----------------------------------------------------------------------*/ + +static +DWORD clust2sect ( /* !=0: sector number, 0: failed - invalid cluster# */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to be converted */ +) +{ + clst -= 2; + if (clst >= (fs->max_clust - 2)) return 0; /* Invalid cluster# */ + return clst * fs->csize + fs->database; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Seek directory index */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_seek ( + DIR *dj, /* Pointer to directory object */ + WORD idx /* Directory index number */ +) +{ + DWORD clst; + WORD ic; + + + dj->index = idx; + clst = dj->sclust; + if (clst == 1 || clst >= dj->fs->max_clust) /* Check start cluster range */ + return FR_INT_ERR; + + if (clst == 0) { /* Static table */ + if (idx >= dj->fs->n_rootdir) /* Index is out of range */ + return FR_INT_ERR; + dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / 32); + } + else { /* Dynamic table */ + ic = SS(dj->fs) / 32 * dj->fs->csize; /* Indexes per cluster */ + while (idx >= ic) { /* Follow cluster chain */ + clst = get_cluster(dj->fs, clst); /* Get next cluster */ + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ + if (clst < 2 || clst >= dj->fs->max_clust) /* Reached to end of table or int error */ + return FR_INT_ERR; + idx -= ic; + } + dj->clust = clst; + dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / 32); + } + dj->dir = dj->fs->win + (idx % (SS(dj->fs) / 32)) * 32; + + return FR_OK; /* Seek succeeded */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Move directory index next */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_next ( /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not streach */ + DIR *dj, /* Pointer to directory object */ + BOOL streach /* FALSE: Do not streach table, TRUE: Streach table if needed */ +) +{ + DWORD clst; + WORD i; + + + i = dj->index + 1; + if (!i || !dj->sect) /* Report EOT when index has reached 65535 */ + return FR_NO_FILE; + + if (!(i % (SS(dj->fs) / 32))) { /* Sector changed? */ + dj->sect++; /* Next sector */ + + if (dj->sclust == 0) { /* Static table */ + if (i >= dj->fs->n_rootdir) /* Report EOT when end of table */ + return FR_NO_FILE; + } + else { /* Dynamic table */ + if (((i / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) { /* Cluster changed? */ + clst = get_cluster(dj->fs, dj->clust); /* Get next cluster */ + if (clst <= 1) return FR_INT_ERR; + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; + if (clst >= dj->fs->max_clust) { /* When it reached end of dinamic table */ +#if !_FS_READONLY + BYTE c; + if (!streach) return FR_NO_FILE; /* When do not streach, report EOT */ + clst = create_chain(dj->fs, dj->clust); /* Streach cluster chain */ + if (clst == 0) return FR_DENIED; /* No free cluster */ + if (clst == 1) return FR_INT_ERR; + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; + /* Clean-up streached table */ + if (move_window(dj->fs, 0)) return FR_DISK_ERR; /* Flush active window */ + mem_set(dj->fs->win, 0, SS(dj->fs)); /* Clear window buffer */ + dj->fs->winsect = clust2sect(dj->fs, clst); /* Cluster start sector */ + for (c = 0; c < dj->fs->csize; c++) { /* Fill the new cluster with 0 */ + dj->fs->wflag = 1; + if (move_window(dj->fs, 0)) return FR_DISK_ERR; + dj->fs->winsect++; + } + dj->fs->winsect -= c; /* Rewind window address */ +#else + return FR_NO_FILE; /* Report EOT */ +#endif + } + dj->clust = clst; /* Initialize data for new cluster */ + dj->sect = clust2sect(dj->fs, clst); + } + } + } + + dj->index = i; + dj->dir = dj->fs->win + (i % (SS(dj->fs) / 32)) * 32; + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Test/Pick/Fit an LFN segment from/to directory entry */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +static +const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* Offset of LFN chars in the directory entry */ + + +static +BOOL test_lfn ( /* TRUE:Matched, FALSE:Not matched */ + WCHAR *lfnbuf, /* Pointer to the LFN to be compared */ + BYTE *dir /* Pointer to the directory entry containing a part of LFN */ +) +{ + int i, s; + WCHAR wc1, wc2; + + + i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13; /* Offset in the LFN buffer */ + s = 0; + do { + if (i >= _MAX_LFN) return FALSE; /* Out of buffer range? */ + wc1 = LD_WORD(dir+LfnOfs[s]); /* Get both characters to compare */ + wc2 = lfnbuf[i++]; + if (IsLower(wc1)) wc1 -= 0x20; /* Compare it (ignore case) */ + if (IsLower(wc2)) wc2 -= 0x20; + if (wc1 != wc2) return FALSE; + } while (++s < 13 && wc1); /* Repeat until last char or a NUL char is processed */ + + return TRUE; /* The LFN entry matched */ +} + + + +static +BOOL pick_lfn ( /* TRUE:Succeeded, FALSE:Buffer overflow */ + WCHAR *lfnbuf, /* Pointer to the Unicode-LFN buffer */ + BYTE *dir /* Pointer to the directory entry */ +) +{ + int i, s; + WCHAR wchr; + + + i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13; /* Offset in the LFN buffer */ + s = 0; + do { + wchr = LD_WORD(dir+LfnOfs[s]); /* Get an LFN char */ + if (!wchr) break; /* End of LFN? */ + if (i >= _MAX_LFN) return FALSE; /* Buffer overflow */ + lfnbuf[i++] = wchr; /* Store it */ + } while (++s < 13); /* Repeat until last char is copied */ + if (dir[LDIR_Ord] & 0x40) lfnbuf[i] = 0; /* Put terminator if last LFN entry */ + + return TRUE; +} + + +#if !_FS_READONLY +static +void fit_lfn ( + const WCHAR *lfnbuf, /* Pointer to the LFN buffer */ + BYTE *dir, /* Pointer to the directory entry */ + BYTE ord, /* LFN order (1-20) */ + BYTE sum /* SFN sum */ +) +{ + int i, s; + WCHAR wchr; + + + dir[LDIR_Chksum] = sum; /* Set check sum */ + dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */ + dir[LDIR_Type] = 0; + ST_WORD(dir+LDIR_FstClusLO, 0); + + i = (ord - 1) * 13; /* Offset in the LFN buffer */ + s = wchr = 0; + do { + if (wchr != 0xFFFF) wchr = lfnbuf[i++]; /* Get an effective char */ + ST_WORD(dir+LfnOfs[s], wchr); /* Put it */ + if (!wchr) wchr = 0xFFFF; /* Padding chars following last char */ + } while (++s < 13); + if (wchr == 0xFFFF || !lfnbuf[i]) ord |= 0x40;/* Bottom LFN part is the start of LFN sequence */ + dir[LDIR_Ord] = ord; /* Set the LFN order */ +} + +#endif +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Create numbered name */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +void gen_numname ( + BYTE *dst, /* Pointer to genartated SFN */ + const BYTE *src, /* Pointer to source SFN to be modified */ + const WCHAR *lfn, /* Pointer to LFN */ + WORD num /* Sequense number */ +) +{ + char ns[8]; + int i, j; + + + mem_cpy(dst, src, 11); + + if (num > 5) { /* On many collisions, generate a hash number instead of sequencial number */ + do num = (num >> 1) + (num << 15) + (WORD)*lfn++; while (*lfn); + } + + /* itoa */ + i = 7; + do { + ns[i--] = (num % 10) + '0'; + num /= 10; + } while (num); + ns[i] = '~'; + + /* Append the number */ + for (j = 0; j < i && dst[j] != ' '; j++) { + if (IsDBCS1(dst[j])) { + if (j == i - 1) break; + j++; + } + } + do { + dst[j++] = (i < 8) ? ns[i++] : ' '; + } while (j < 8); +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Calculate sum of an SFN */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +static +BYTE sum_sfn ( + const BYTE *dir /* Ptr to directory entry */ +) +{ + BYTE sum = 0; + int n = 11; + + do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n); + return sum; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Find an object in the directory */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_find ( + DIR *dj /* Pointer to the directory object linked to the file name */ +) +{ + FRESULT res; + BYTE a, c, lfen, ord, sum, *dir; + + + res = dir_seek(dj, 0); /* Rewind directory object */ + if (res != FR_OK) return res; + + ord = sum = 0xFF; lfen = *(dj->fn+11) & 1; + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + dir = dj->dir; /* Ptr to the directory entry of current index */ + c = dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ + a = dir[DIR_Attr] & AM_MASK; +#if _USE_LFN /* LFN configuration */ + if (c == 0xE5 || c == '.' || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (dj->lfn) { + if (c & 0x40) { /* Is it start of LFN sequence? */ + sum = dir[LDIR_Chksum]; + c &= 0xBF; ord = c; /* LFN start order */ + dj->lfn_idx = dj->index; + } + /* Check LFN validity. Compare LFN if it is out of 8.3 format */ + ord = (c == ord && sum == dir[LDIR_Chksum] && (!lfen || test_lfn(dj->lfn, dir))) ? ord - 1 : 0xFF; + } + } else { /* An SFN entry is found */ + if (ord || sum != sum_sfn(dir)) { /* Did not LFN match? */ + dj->lfn_idx = 0xFFFF; + ord = 0xFF; + } + if (lfen) { /* Match LFN if it is out of 8.3 format */ + if (ord == 0) break; + } else { /* Match SFN if LFN is in 8.3 format */ + if (!mem_cmp(dir, dj->fn, 11)) break; + } + } + } +#else /* Non LFN configuration */ + if (c != 0xE5 && c != '.' && !(a & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */ + break; +#endif + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK); + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read an object from the directory */ +/*-----------------------------------------------------------------------*/ +#if _FS_MINIMIZE <= 2 +static +FRESULT dir_read ( + DIR *dj /* Pointer to the directory object to store read object name */ +) +{ + FRESULT res; + BYTE a, c, ord, sum, *dir; + + + ord = sum = 0xFF; + res = FR_NO_FILE; + while (dj->sect) { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + dir = dj->dir; /* Ptr to the directory entry of current index */ + c = dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ + a = dir[DIR_Attr] & AM_MASK; +#if _USE_LFN /* LFN configuration */ + if (c == 0xE5 || c == '.' || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (c & 0x40) { /* Is it start of LFN sequence? */ + sum = dir[LDIR_Chksum]; + c &= 0xBF; ord = c; + dj->lfn_idx = dj->index; + } + /* Check LFN validity and capture it */ + ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF; + } else { /* An SFN entry is found */ + if (ord || sum != sum_sfn(dir)) /* Is there a valid LFN entry? */ + dj->lfn_idx = 0xFFFF; /* No LFN. */ + break; + } + } +#else /* Non LFN configuration */ + if (c != 0xE5 && c != '.' && !(a & AM_VOL)) /* Is it a valid entry? */ + break; +#endif + res = dir_next(dj, FALSE); /* Next entry */ + if (res != FR_OK) break; + } + + if (res != FR_OK) dj->sect = 0; + + return res; +} +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Register an object to the directory */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT dir_register ( /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */ + DIR *dj /* Target directory with object name to be created */ +) +{ + FRESULT res; + BYTE c, *dir; + +#if _USE_LFN /* LFN configuration */ + WORD n, ne, is; + BYTE sn[12], *fn, sum; + WCHAR *lfn; + + fn = dj->fn; lfn = dj->lfn; + mem_cpy(sn, fn, 12); + if (sn[11] & 1) { /* When LFN is out of 8.3 format, generate a numbered name */ + fn[11] = 0; dj->lfn = NULL; /* Find only SFN */ + for (n = 1; n < 100; n++) { + gen_numname(fn, sn, lfn, n); /* Generate a numbered name */ + res = dir_find(dj); /* Check if the name collides with existing SFN */ + if (res != FR_OK) break; + } + if (n == 100) return FR_DENIED; /* Abort if too many collisions */ + if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */ + fn[11] = sn[11]; dj->lfn = lfn; + } + if (sn[11] & 2) { /* When eliminate LFN, reserve only an SFN entry. */ + ne = 1; + } else { /* Otherwise reserve an SFN + LFN entries. */ + for (ne = 0; lfn[ne]; ne++) ; + ne = (ne + 25) / 13; + } + + /* Reserve contiguous entries */ + res = dir_seek(dj, 0); + if (res != FR_OK) return res; + n = is = 0; + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + c = *dj->dir; /* Check the entry status */ + if (c == 0xE5 || c == 0) { /* Is it a blank entry? */ + if (n == 0) is = dj->index; /* First index of the contigulus entry */ + if (++n == ne) break; /* A contiguous entry that requiered count is found */ + } else { + n = 0; /* Not a blank entry. Restart to search */ + } + res = dir_next(dj, TRUE); /* Next entry with table streach */ + } while (res == FR_OK); + + if (res == FR_OK && ne > 1) { /* Initialize LFN entry if needed */ + res = dir_seek(dj, is); + if (res == FR_OK) { + sum = sum_sfn(dj->fn); /* Sum of the SFN tied to the LFN */ + ne--; + do { /* Store LFN entries in bottom first */ + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + fit_lfn(dj->lfn, dj->dir, (BYTE)ne, sum); + dj->fs->wflag = 1; + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK && --ne); + } + } + +#else /* Non LFN configuration */ + res = dir_seek(dj, 0); + if (res == FR_OK) { + do { /* Find a blank entry for the SFN */ + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + c = *dj->dir; + if (c == 0xE5 || c == 0) break; /* Is it a blank entry? */ + res = dir_next(dj, TRUE); /* Next entry with table streach */ + } while (res == FR_OK); + } +#endif + + if (res == FR_OK) { /* Initialize the SFN entry */ + res = move_window(dj->fs, dj->sect); + if (res == FR_OK) { + dir = dj->dir; + mem_set(dir, 0, 32); /* Clean the entry */ + mem_cpy(dir, dj->fn, 11); /* Put SFN */ + dir[DIR_NTres] = *(dj->fn+11) & 0x18; /* Put NT flag */ + dj->fs->wflag = 1; + } + } + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Remove an object from the directory */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY && !_FS_MINIMIZE +static +FRESULT dir_remove ( /* FR_OK: Successful, FR_DISK_ERR: A disk error */ + DIR *dj /* Directory object pointing the entry to be removed */ +) +{ + FRESULT res; + +#if _USE_LFN /* LFN configuration */ + WORD i; + + i = dj->index; /* SFN index */ + res = dir_seek(dj, (WORD)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx)); /* Goto the SFN or top of the LFN entries */ + if (res == FR_OK) { + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + *dj->dir = 0xE5; /* Mark the entry "deleted" */ + dj->fs->wflag = 1; + if (dj->index >= i) break; /* When SFN is deleted, all entries of the object is deleted. */ + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK); + if (res == FR_NO_FILE) res = FR_INT_ERR; + } + +#else /* Non LFN configuration */ + res = dir_seek(dj, dj->index); + if (res == FR_OK) { + res = move_window(dj->fs, dj->sect); + if (res == FR_OK) { + *dj->dir = 0xE5; /* Mark the entry "deleted" */ + dj->fs->wflag = 1; + } + } +#endif + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Pick a segment and create the object name in directory form */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT create_name ( + DIR *dj, /* Pointer to the directory object */ + const char **path /* Pointer to pointer to the segment in the path string */ +) +{ +#if _USE_LFN + BYTE c, b, cf, *sfn; + WCHAR w, *lfn; + int i, ni, si, di; + const char *p; + + /* Create LFN in Unicode */ + si = di = 0; + p = *path; + lfn = dj->lfn; + for (;;) { + w = (BYTE)p[si++]; /* Get a character */ + if (w < ' ' || w == '/' || w == '\\') break; /* Break on end of segment */ + if (IsDBCS1(w)) { /* If it is DBC 1st byte */ + c = p[si++]; /* Get 2nd byte */ + if (!IsDBCS2(c)) /* Reject invalid DBC */ + return FR_INVALID_NAME; + w = (w << 8) + c; + } else { + if (chk_chr("\"*:<>\?|\x7F", w)) /* Reject unallowable chars for LFN */ + return FR_INVALID_NAME; + } + w = ff_convert(w, 1); /* Convert OEM to Unicode, store it */ + if (!w || di >= _MAX_LFN) /* Reject invalid code or too long name */ + return FR_INVALID_NAME; + lfn[di++] = w; + } + *path = &p[si]; /* Rerurn pointer to the next segment */ + cf = (w < ' ') ? 4 : 0; /* Set last segment flag if end of path */ + + while (di) { /* Strip trailing spaces and dots */ + w = lfn[di - 1]; + if (w != ' ' && w != '.') break; + di--; + } + if (!di) return FR_INVALID_NAME; /* Reject null string */ + + lfn[di] = 0; /* LFN is created */ + + /* Create SFN in directory form */ + sfn = dj->fn; + mem_set(sfn, ' ', 11); + for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ; /* Strip leading spaces and dots */ + if (si) cf |= 1; + while (di && lfn[di - 1] != '.') di--; /* Find extension (di<=si: no extension) */ + + b = i = 0; ni = 8; + for (;;) { + w = lfn[si++]; /* Get an LFN char */ + if (w == 0) break; /* Break when enf of the LFN */ + if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */ + cf |= 1; continue; + } + if (i >= ni || si == di) { /* Here is extension or end of SFN */ + if (ni == 11) { /* Extension is longer than 3 bytes */ + cf |= 1; break; + } + if (si != di) cf |= 1; /* File name is longer than 8 bytes */ + if (si > di) break; /* No extension */ + si = di; i = 8; ni = 11; /* Enter extension section */ + b <<= 2; continue; + } + w = ff_convert(w, 0); /* Unicode -> OEM code */ + if (w >= 0x80) cf |= 0x20; /* If there is any extended char, force create an LFN */ + if (w >= 0x100) { /* Double byte char */ + if (i >= ni - 1) { + cf |= 1; i = ni; continue; + } + sfn[i++] = (BYTE)(w >> 8); + } else { /* Single byte char */ + if (chk_chr("+,;[=]", w)) { /* Replace unallowable chars for SFN */ + w = '_'; cf |= 1; + } else { + if (IsUpper(w)) { /* Large capital */ + b |= 2; + } else { + if (IsLower(w)) { /* Small capital */ + b |= 1; w -= 0x20; + } + } + } + } + sfn[i++] = (BYTE)w; + } + if (sfn[0] == 0xE5) sfn[0] = 0x05; /* When first char collides with 0xE5, replace it with 0x05 */ + + if (ni == 8) b <<= 2; + if ((cf & 0x21) == 0) { /* When LFN is in 8.3 format without extended char, NT flags are created */ + if ((b & 0x03) == 0x01) cf |= 0x10; /* NT flag (Extension has only small capital) */ + if ((b & 0x0C) == 0x04) cf |= 0x08; /* NT flag (Filename has only small capital) */ + if ((b & 0x0C) != 0x0C && (b & 0x03) != 0x03) cf |= 2; /* Eliminate LFN when non composite capitals */ + } + + sfn[11] = cf; /* SFN is created */ + +#else + BYTE c, d, b, *sfn; + int ni, si, i; + const char *p; + + /* Create file name in directory form */ + sfn = dj->fn; + mem_set(sfn, ' ', 11); + si = i = b = 0; ni = 8; + p = *path; + for (;;) { + c = p[si++]; + if (c < ' ' || c == '/' || c == '\\') break; /* Break on end of segment */ + if (c == '.' || i >= ni) { + if (ni != 8 || c != '.') return FR_INVALID_NAME; + i = 8; ni = 11; + b <<= 2; continue; + } + if (c >= 0x80) b |= 3; /* If there is any extended char, eliminate NT flag */ + if (IsDBCS1(c)) { /* If it is DBC 1st byte */ + d = p[si++]; /* Get 2nd byte */ + if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */ + return FR_INVALID_NAME; + sfn[i++] = c; + sfn[i++] = d; + } else { + if (chk_chr(" +,;[=]\"*:<>\?|\x7F", c)) /* Reject unallowable chrs for SFN */ + return FR_INVALID_NAME; + if (IsUpper(c)) { + b |= 2; + } else { + if (IsLower(c)) { + b |= 1; c -= 0x20; + } + } + sfn[i++] = c; + } + } + *path = &p[si]; /* Rerurn pointer to the next segment */ + c = (c < ' ') ? 4 : 0; /* Set last segment flag if end of path */ + + if (!i) return FR_INVALID_NAME; /* Reject null string */ + if (sfn[0] == 0xE5) sfn[0] = 0x05; /* When first char collides with 0xE5, replace it with 0x05 */ + + if (ni == 8) b <<= 2; + if ((b & 0x03) == 0x01) c |= 0x10; /* NT flag (Extension has only small capital) */ + if ((b & 0x0C) == 0x04) c |= 0x08; /* NT flag (Filename has only small capital) */ + + sfn[11] = c; /* Store NT flag, File name is created */ +#endif + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Get file information from directory entry */ +/*-----------------------------------------------------------------------*/ +#if _FS_MINIMIZE <= 1 +static +void get_fileinfo ( /* No return code */ + DIR *dj, /* Pointer to the directory object */ + FILINFO *fno /* Pointer to store the file information */ +) +{ + int i; + BYTE c, nt, *dir; + char *p; + + + p = fno->fname; + if (dj->sect) { + dir = dj->dir; + nt = dir[DIR_NTres]; /* NT flag */ + for (i = 0; i < 8; i++) { /* Copy file name body */ + c = dir[i]; + if (c == ' ') break; + if (c == 0x05) c = 0xE5; + if ((nt & 0x08) && IsUpper(c)) c += 0x20; + *p++ = c; + } + if (dir[8] != ' ') { /* Copy file name extension */ + *p++ = '.'; + for (i = 8; i < 11; i++) { + c = dir[i]; + if (c == ' ') break; + if ((nt & 0x10) && IsUpper(c)) c += 0x20; + *p++ = c; + } + } + fno->fattrib = dir[DIR_Attr]; /* Attribute */ + fno->fsize = LD_DWORD(dir+DIR_FileSize); /* Size */ + fno->fdate = LD_WORD(dir+DIR_WrtDate); /* Date */ + fno->ftime = LD_WORD(dir+DIR_WrtTime); /* Time */ + } + *p = 0; + +#if _USE_LFN + p = fno->lfname; + if (p) { + WCHAR wchr, *lfn; + + i = 0; + if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */ + lfn = dj->lfn; + while ((wchr = *lfn++) != 0) { /* Get an LFN char */ + wchr = ff_convert(wchr, 0); /* Unicode -> OEM code */ + if (!wchr) { i = 0; break; } /* Conversion error, no LFN */ + if (_DF1S && wchr >= 0x100) /* Put 1st byte if it is a DBC */ + p[i++] = (char)(wchr >> 8); + p[i++] = (char)wchr; + if (i >= fno->lfsize) { i = 0; break; } /* Buffer overrun, no LFN */ + } + } + p[i] = 0; /* Terminator */ + } +#endif +} +#endif /* _FS_MINIMIZE <= 1 */ + + + + +/*-----------------------------------------------------------------------*/ +/* Follow a file path */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ + DIR *dj, /* Directory object to return last directory and found object */ + const char *path /* Full-path string to find a file or directory */ +) +{ + FRESULT res; + BYTE *dir, last; + + + if (*path == '/' || *path == '\\' ) path++; /* Strip heading separator */ + + dj->sclust = /* Set start directory (root dir) */ + (dj->fs->fs_type == FS_FAT32) ? dj->fs->dirbase : 0; + + if ((BYTE)*path < ' ') { /* Null path means the root directory */ + res = dir_seek(dj, 0); + dj->dir = NULL; + + } else { /* Follow path */ + for (;;) { + res = create_name(dj, &path); /* Get a segment */ + if (res != FR_OK) break; + res = dir_find(dj); /* Find it */ + last = *(dj->fn+11) & 4; + if (res != FR_OK) { /* Could not find the object */ + if (res == FR_NO_FILE && !last) + res = FR_NO_PATH; + break; + } + if (last) break; /* Last segment match. Function completed. */ + dir = dj->dir; /* There is next segment. Follow the sub directory */ + if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */ + res = FR_NO_PATH; break; + } + dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + } + } + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Load boot record and check if it is an FAT boot record */ +/*-----------------------------------------------------------------------*/ + +static +BYTE check_fs ( /* 0:The FAT boot record, 1:Valid boot record but not an FAT, 2:Not a boot record, 3:Error */ + FATFS *fs, /* File system object */ + DWORD sect /* Sector# (lba) to check if it is an FAT boot record or not */ +) +{ + if (disk_read(fs->drive, fs->win, sect, 1) != RES_OK) /* Load boot record */ + return 3; + if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55) /* Check record signature (always placed at offset 510 even if the sector size is >512) */ + return 2; + + if (!mem_cmp(&fs->win[BS_FilSysType], "FAT", 3)) /* Check FAT signature */ + return 0; + if (!mem_cmp(&fs->win[BS_FilSysType32], "FAT32", 5) && !(fs->win[BPB_ExtFlags] & 0x80)) + return 0; + + return 1; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Make sure that the file system is valid */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT auto_mount ( /* FR_OK(0): successful, !=0: any error occured */ + const char **path, /* Pointer to pointer to the path name (drive number) */ + FATFS **rfs, /* Pointer to pointer to the found file system object */ + BYTE chk_wp /* !=0: Check media write protection for write access */ +) +{ + FRESULT res; + BYTE vol, fmt, *tbl; + DSTATUS stat; + DWORD bsect, fsize, tsect, mclst; + const char *p = *path; + FATFS *fs; + + + /* Get logical drive number from the path name */ + vol = p[0] - '0'; /* Is there a drive number? */ + if (vol <= 9 && p[1] == ':') { + p += 2; /* Found a drive number, get and strip it */ + *path = p; /* Return pointer to the path name */ + } else { + vol = 0; /* No drive number is given, use drive number 0 as default */ + } + + /* Check if the logical drive number is valid or not */ + if (vol >= _DRIVES) return FR_INVALID_DRIVE; /* Is the drive number valid? */ + *rfs = fs = FatFs[vol]; /* Returen pointer to the corresponding file system object */ + if (!fs) return FR_NOT_ENABLED; /* Is the file system object registered? */ + + ENTER_FF(fs); /* Lock file system */ + + if (fs->fs_type) { /* If the logical drive has been mounted */ + stat = disk_status(fs->drive); + if (!(stat & STA_NOINIT)) { /* and physical drive is kept initialized (has not been changed), */ +#if !_FS_READONLY + if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */ + return FR_WRITE_PROTECTED; +#endif + return FR_OK; /* The file system object is valid */ + } + } + + /* The logical drive must be re-mounted. Following code attempts to mount the volume */ + + fs->fs_type = 0; /* Clear the file system object */ + fs->drive = LD2PD(vol); /* Bind the logical drive and a physical drive */ + stat = disk_initialize(fs->drive); /* Initialize low level disk I/O layer */ + if (stat & STA_NOINIT) /* Check if the drive is ready */ + return FR_NOT_READY; +#if _MAX_SS != 512 /* Get disk sector size if needed */ + if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS) + return FR_NO_FILESYSTEM; +#endif +#if !_FS_READONLY + if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */ + return FR_WRITE_PROTECTED; +#endif + /* Search FAT partition on the drive */ + fmt = check_fs(fs, bsect = 0); /* Check sector 0 as an SFD format */ + if (fmt == 1) { /* Not an FAT boot record, it may be patitioned */ + /* Check a partition listed in top of the partition table */ + tbl = &fs->win[MBR_Table + LD2PT(vol) * 16]; /* Partition table */ + if (tbl[4]) { /* Is the partition existing? */ + bsect = LD_DWORD(&tbl[8]); /* Partition offset in LBA */ + fmt = check_fs(fs, bsect); /* Check the partition */ + } + } + if (fmt == 3) return FR_DISK_ERR; + if (fmt || LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs)) /* No valid FAT patition is found */ + return FR_NO_FILESYSTEM; + + /* Initialize the file system object */ + fsize = LD_WORD(fs->win+BPB_FATSz16); /* Number of sectors per FAT */ + if (!fsize) fsize = LD_DWORD(fs->win+BPB_FATSz32); + fs->sects_fat = fsize; + fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FAT copies */ + fsize *= fs->n_fats; /* (Number of sectors in FAT area) */ + fs->fatbase = bsect + LD_WORD(fs->win+BPB_RsvdSecCnt); /* FAT start sector (lba) */ + fs->csize = fs->win[BPB_SecPerClus]; /* Number of sectors per cluster */ + fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt); /* Nmuber of root directory entries */ + tsect = LD_WORD(fs->win+BPB_TotSec16); /* Number of sectors on the file system */ + if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32); + fs->max_clust = mclst = (tsect /* Last cluster# + 1 */ + - LD_WORD(fs->win+BPB_RsvdSecCnt) - fsize - fs->n_rootdir / (SS(fs)/32) + ) / fs->csize + 2; + + fmt = FS_FAT12; /* Determine the FAT sub type */ + if (mclst >= 0xFF7) fmt = FS_FAT16; /* Number of clusters >= 0xFF5 */ + if (mclst >= 0xFFF7) fmt = FS_FAT32; /* Number of clusters >= 0xFFF5 */ + + if (fmt == FS_FAT32) + fs->dirbase = LD_DWORD(fs->win+BPB_RootClus); /* Root directory start cluster */ + else + fs->dirbase = fs->fatbase + fsize; /* Root directory start sector (lba) */ + fs->database = fs->fatbase + fsize + fs->n_rootdir / (SS(fs)/32); /* Data start sector (lba) */ + +#if !_FS_READONLY + /* Initialize allocation information */ + fs->free_clust = 0xFFFFFFFF; + fs->wflag = 0; + /* Get fsinfo if needed */ + if (fmt == FS_FAT32) { + fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo); + fs->fsi_flag = 0; + if (disk_read(fs->drive, fs->win, fs->fsi_sector, 1) == RES_OK && + LD_WORD(fs->win+BS_55AA) == 0xAA55 && + LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 && + LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) { + fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free); + fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count); + } + } +#endif + fs->winsect = 0; + fs->fs_type = fmt; /* FAT syb-type */ + fs->id = ++Fsid; /* File system mount ID */ + res = FR_OK; + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Check if the file/dir object is valid or not */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT validate ( /* FR_OK(0): The object is valid, !=0: Invalid */ + FATFS *fs, /* Pointer to the file system object */ + WORD id /* Member id of the target object to be checked */ +) +{ + if (!fs || !fs->fs_type || fs->id != id) + return FR_INVALID_OBJECT; + + ENTER_FF(fs); /* Lock file system */ + + if (disk_status(fs->drive) & STA_NOINIT) + return FR_NOT_READY; + + return FR_OK; +} + + + + +/*-------------------------------------------------------------------------- + + Public Functions + +--------------------------------------------------------------------------*/ + + + +/*-----------------------------------------------------------------------*/ +/* Mount/Unmount a Locical Drive */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mount ( + BYTE vol, /* Logical drive number to be mounted/unmounted */ + FATFS *fs /* Pointer to new file system object (NULL for unmount)*/ +) +{ + FATFS *rfs; + + + if (vol >= _DRIVES) /* Check if the drive number is valid */ + return FR_INVALID_DRIVE; + rfs = FatFs[vol]; /* Get current state */ + + if (rfs) { +#if _FS_REENTRANT /* Discard sync object of the current volume */ + if (!ff_del_syncobj(fs->sobj)) return FR_INT_ERR; +#endif + rfs->fs_type = 0; /* Clear old fs object */ + } + + if (fs) { + fs->fs_type = 0; /* Clear new fs object */ +#if _FS_REENTRANT /* Create sync object for the new volume */ + if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR; +#endif + } + FatFs[vol] = fs; /* Register new fs object */ + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Open or Create a File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_open ( + FIL *fp, /* Pointer to the blank file object */ + const char *path, /* Pointer to the file name */ + BYTE mode /* Access mode and file open mode flags */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + fp->fs = NULL; /* Clear file object */ +#if !_FS_READONLY + mode &= (FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW); + res = auto_mount(&path, &dj.fs, (BYTE)(mode & (FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW))); +#else + mode &= FA_READ; + res = auto_mount(&path, &dj.fs, 0); +#endif + if (res != FR_OK) LEAVE_FF(dj.fs, res); + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + +#if !_FS_READONLY + /* Create or Open a file */ + if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) { + DWORD ps, cl; + + if (res != FR_OK) { /* No file, create new */ + if (res == FR_NO_FILE) + res = dir_register(&dj); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + mode |= FA_CREATE_ALWAYS; + dir = dj.dir; + } + else { /* Any object is already existing */ + if (mode & FA_CREATE_NEW) /* Cannot create new */ + LEAVE_FF(dj.fs, FR_EXIST); + dir = dj.dir; + if (!dir || (dir[DIR_Attr] & (AM_RDO | AM_DIR))) /* Cannot overwrite it (R/O or DIR) */ + LEAVE_FF(dj.fs, FR_DENIED); + if (mode & FA_CREATE_ALWAYS) { /* Resize it to zero if needed */ + cl = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); /* Get start cluster */ + ST_WORD(dir+DIR_FstClusHI, 0); /* cluster = 0 */ + ST_WORD(dir+DIR_FstClusLO, 0); + ST_DWORD(dir+DIR_FileSize, 0); /* size = 0 */ + dj.fs->wflag = 1; + ps = dj.fs->winsect; /* Remove the cluster chain */ + if (cl) { + res = remove_chain(dj.fs, cl); + if (res) LEAVE_FF(dj.fs, res); + dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */ + } + res = move_window(dj.fs, ps); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + } + } + if (mode & FA_CREATE_ALWAYS) { + dir[DIR_Attr] = 0; /* Reset attribute */ + ps = get_fattime(); + ST_DWORD(dir+DIR_CrtTime, ps); /* Created time */ + dj.fs->wflag = 1; + mode |= FA__WRITTEN; /* Set file changed flag */ + } + } + /* Open an existing file */ + else { +#endif /* !_FS_READONLY */ + if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */ + dir = dj.dir; + if (!dir || (dir[DIR_Attr] & AM_DIR)) /* It is a directory */ + LEAVE_FF(dj.fs, FR_NO_FILE); +#if !_FS_READONLY + if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */ + LEAVE_FF(dj.fs, FR_DENIED); + } + fp->dir_sect = dj.fs->winsect; /* Pointer to the directory entry */ + fp->dir_ptr = dj.dir; +#endif + fp->flag = mode; /* File access mode */ + fp->org_clust = /* File start cluster */ + ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + fp->fsize = LD_DWORD(dir+DIR_FileSize); /* File size */ + fp->fptr = 0; fp->csect = 255; /* File pointer */ + fp->dsect = 0; + fp->fs = dj.fs; fp->id = dj.fs->id; /* Owner file system object of the file */ + + LEAVE_FF(dj.fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_read ( + FIL *fp, /* Pointer to the file object */ + void *buff, /* Pointer to data buffer */ + UINT btr, /* Number of bytes to read */ + UINT *br /* Pointer to number of bytes read */ +) +{ + FRESULT res; + DWORD clst, sect, remain; + UINT rcnt, cc; + BYTE *rbuff = buff; + + + *br = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_READ)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + remain = fp->fsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr; /* Repeat until all data transferred */ + rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->org_clust : get_cluster(fp->fs, fp->curr_clust); + if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector offset in the cluster */ + } + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect; + cc = btr / SS(fp->fs); /* When remaining bytes >= sector size, */ + if (cc) { /* Read maximum contiguous sectors directly */ + if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */ + cc = fp->fs->csize - fp->csect; + if (disk_read(fp->fs->drive, rbuff, sect, (BYTE)cc) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->csect += (BYTE)cc; /* Next sector address in the cluster */ + rcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ + continue; + } +#if !_FS_TINY +#if !_FS_READONLY + if (fp->flag & FA__DIRTY) { /* Write sector I/O buffer if needed */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + if (fp->dsect != sect) { /* Fill sector buffer with file data */ + if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + } +#endif + fp->dsect = sect; + fp->csect++; /* Next sector address in the cluster */ + } + rcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs)); /* Get partial sector data from sector buffer */ + if (rcnt > btr) rcnt = btr; +#if _FS_TINY + if (move_window(fp->fs, fp->dsect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ +#else + mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ +#endif + } + + + LEAVE_FF(fp->fs, FR_OK); +} + + + + +#if !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Write File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_write ( + FIL *fp, /* Pointer to the file object */ + const void *buff, /* Pointer to the data to be written */ + UINT btw, /* Number of bytes to write */ + UINT *bw /* Pointer to number of bytes written */ +) +{ + FRESULT res; + DWORD clst, sect; + UINT wcnt, cc; + const BYTE *wbuff = buff; + + + *bw = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_WRITE)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + if (fp->fsize + btw < fp->fsize) btw = 0; /* File size cannot reach 4GB */ + + for ( ; btw; /* Repeat until all data transferred */ + wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + if (fp->fptr == 0) { /* On the top of the file? */ + clst = fp->org_clust; /* Follow from the origin */ + if (clst == 0) /* When there is no cluster chain, */ + fp->org_clust = clst = create_chain(fp->fs, 0); /* Create a new cluster chain */ + } else { /* Middle or end of the file */ + clst = create_chain(fp->fs, fp->curr_clust); /* Follow or streach cluster chain */ + } + if (clst == 0) break; /* Could not allocate a new cluster (disk full) */ + if (clst == 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector address in the cluster */ + } +#if _FS_TINY + if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0)) /* Write back data buffer prior to following direct transfer */ + ABORT(fp->fs, FR_DISK_ERR); +#else + if (fp->flag & FA__DIRTY) { /* Write back data buffer prior to following direct transfer */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect; + cc = btw / SS(fp->fs); /* When remaining bytes >= sector size, */ + if (cc) { /* Write maximum contiguous sectors directly */ + if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */ + cc = fp->fs->csize - fp->csect; + if (disk_write(fp->fs->drive, wbuff, sect, (BYTE)cc) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#if _FS_TINY + if (fp->fs->winsect - sect < cc) { /* Refill sector cache if it gets dirty by the direct write */ + mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs)); + fp->fs->wflag = 0; + } +#else + if (fp->dsect - sect < cc) { /* Refill sector cache if it gets dirty by the direct write */ + mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs)); + fp->flag &= ~FA__DIRTY; + } +#endif + fp->csect += (BYTE)cc; /* Next sector address in the cluster */ + wcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ + continue; + } +#if _FS_TINY + if (fp->fptr >= fp->fsize) { /* Avoid silly buffer filling at growing edge */ + if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR); + fp->fs->winsect = sect; + } +#else + if (fp->dsect != sect) { /* Fill sector buffer with file data */ + if (fp->fptr < fp->fsize && + disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + } +#endif + fp->dsect = sect; + fp->csect++; /* Next sector address in the cluster */ + } + wcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs)); /* Put partial sector into file I/O buffer */ + if (wcnt > btw) wcnt = btw; +#if _FS_TINY + if (move_window(fp->fs, fp->dsect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + mem_cpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ + fp->fs->wflag = 1; +#else + mem_cpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ + fp->flag |= FA__DIRTY; +#endif + } + + if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */ + fp->flag |= FA__WRITTEN; /* Set file changed flag */ + + LEAVE_FF(fp->fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Synchronize the File Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_sync ( + FIL *fp /* Pointer to the file object */ +) +{ + FRESULT res; + DWORD tim; + BYTE *dir; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res == FR_OK) { + if (fp->flag & FA__WRITTEN) { /* Has the file been written? */ +#if !_FS_TINY /* Write-back dirty buffer */ + if (fp->flag & FA__DIRTY) { + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + LEAVE_FF(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + /* Update the directory entry */ + res = move_window(fp->fs, fp->dir_sect); + if (res == FR_OK) { + dir = fp->dir_ptr; + dir[DIR_Attr] |= AM_ARC; /* Set archive bit */ + ST_DWORD(dir+DIR_FileSize, fp->fsize); /* Update file size */ + ST_WORD(dir+DIR_FstClusLO, fp->org_clust); /* Update start cluster */ + ST_WORD(dir+DIR_FstClusHI, fp->org_clust >> 16); + tim = get_fattime(); /* Updated time */ + ST_DWORD(dir+DIR_WrtTime, tim); + fp->flag &= (BYTE)~FA__WRITTEN; + fp->fs->wflag = 1; + res = sync(fp->fs); + } + } + } + + LEAVE_FF(fp->fs, res); +} + +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Close File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_close ( + FIL *fp /* Pointer to the file object to be closed */ +) +{ + FRESULT res; + + +#if _FS_READONLY + res = validate(fp->fs, fp->id); + if (res == FR_OK) fp->fs = NULL; + LEAVE_FF(fp->fs, res); +#else + res = f_sync(fp); + if (res == FR_OK) fp->fs = NULL; + return res; +#endif +} + + + + +#if _FS_MINIMIZE <= 2 +/*-----------------------------------------------------------------------*/ +/* Seek File R/W Pointer */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_lseek ( + FIL *fp, /* Pointer to the file object */ + DWORD ofs /* File pointer from top of file */ +) +{ + FRESULT res; + DWORD clst, bcs, nsect, ifptr; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (ofs > fp->fsize /* In read-only mode, clip offset with the file size */ +#if !_FS_READONLY + && !(fp->flag & FA_WRITE) +#endif + ) ofs = fp->fsize; + + ifptr = fp->fptr; + fp->fptr = 0; fp->csect = 255; + nsect = 0; + if (ofs > 0) { + bcs = (DWORD)fp->fs->csize * SS(fp->fs); /* Cluster size (byte) */ + if (ifptr > 0 && + (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */ + fp->fptr = (ifptr - 1) & ~(bcs - 1); /* start from the current cluster */ + ofs -= fp->fptr; + clst = fp->curr_clust; + } else { /* When seek to back cluster, */ + clst = fp->org_clust; /* start from the first cluster */ +#if !_FS_READONLY + if (clst == 0) { /* If no cluster chain, create a new chain */ + clst = create_chain(fp->fs, 0); + if (clst == 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->org_clust = clst; + } +#endif + fp->curr_clust = clst; + } + if (clst != 0) { + while (ofs > bcs) { /* Cluster following loop */ +#if !_FS_READONLY + if (fp->flag & FA_WRITE) { /* Check if in write mode or not */ + clst = create_chain(fp->fs, clst); /* Force streached if in write mode */ + if (clst == 0) { /* When disk gets full, clip file size */ + ofs = bcs; break; + } + } else +#endif + clst = get_cluster(fp->fs, clst); /* Follow cluster chain if not in write mode */ + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + if (clst <= 1 || clst >= fp->fs->max_clust) ABORT(fp->fs, FR_INT_ERR); + fp->curr_clust = clst; + fp->fptr += bcs; + ofs -= bcs; + } + fp->fptr += ofs; + fp->csect = (BYTE)(ofs / SS(fp->fs)); /* Sector offset in the cluster */ + if (ofs % SS(fp->fs)) { + nsect = clust2sect(fp->fs, clst); /* Current sector */ + if (!nsect) ABORT(fp->fs, FR_INT_ERR); + nsect += fp->csect; + fp->csect++; + } + } + } + if (nsect && nsect != fp->dsect && fp->fptr % SS(fp->fs)) { +#if !_FS_TINY +#if !_FS_READONLY + if (fp->flag & FA__DIRTY) { /* Write-back dirty buffer if needed */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + if (disk_read(fp->fs->drive, fp->buf, nsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#endif + fp->dsect = nsect; + } +#if !_FS_READONLY + if (fp->fptr > fp->fsize) { /* Set changed flag if the file size is extended */ + fp->fsize = fp->fptr; + fp->flag |= FA__WRITTEN; + } +#endif + + LEAVE_FF(fp->fs, res); +} + + + + +#if _FS_MINIMIZE <= 1 +/*-----------------------------------------------------------------------*/ +/* Create a Directroy Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_opendir ( + DIR *dj, /* Pointer to directory object to create */ + const char *path /* Pointer to the directory path */ +) +{ + FRESULT res; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj->fs, 0); + if (res == FR_OK) { + INITBUF((*dj), sfn, lfn); + res = follow_path(dj, path); /* Follow the path to the directory */ + if (res == FR_OK) { /* Follow completed */ + dir = dj->dir; + if (dir) { /* It is not the root dir */ + if (dir[DIR_Attr] & AM_DIR) { /* The object is a directory */ + dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + } else { /* The object is not a directory */ + res = FR_NO_PATH; + } + } else { /* It is the root dir */ + dj->sclust = (dj->fs->fs_type == FS_FAT32) ? dj->fs->dirbase : 0; + } + if (res == FR_OK) res = dir_seek(dj, 0); + dj->id = dj->fs->id; + } else { + if (res == FR_NO_FILE) res = FR_NO_PATH; + } + } + + LEAVE_FF(dj->fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read Directory Entry in Sequense */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_readdir ( + DIR *dj, /* Pointer to the open directory object */ + FILINFO *fno /* Pointer to file information to return */ +) +{ + FRESULT res; + NAMEBUF(sfn, lfn); + + + res = validate(dj->fs, dj->id); /* Check validity of the object */ + if (res == FR_OK) { + INITBUF((*dj), sfn, lfn); + if (!fno) { + res = dir_seek(dj, 0); + } else { + res = dir_read(dj); + if (res == FR_NO_FILE) { + dj->sect = 0; + res = FR_OK; + } + if (res == FR_OK) { /* A valid entry is found */ + get_fileinfo(dj, fno); /* Get the object information */ + res = dir_next(dj, FALSE); /* Increment index for next */ + if (res == FR_NO_FILE) { + dj->sect = 0; + res = FR_OK; + } + } + } + } + + LEAVE_FF(dj->fs, res); +} + + + +#if _FS_MINIMIZE == 0 +/*-----------------------------------------------------------------------*/ +/* Get File Status */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_stat ( + const char *path, /* Pointer to the file path */ + FILINFO *fno /* Pointer to file information to return */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + + + res = auto_mount(&path, &dj.fs, 0); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { /* Follwo completed */ + if (dj.dir) /* Found an object */ + get_fileinfo(&dj, fno); + else /* It is root dir */ + res = FR_INVALID_NAME; + } + } + + LEAVE_FF(dj.fs, res); +} + + + +#if !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Truncate File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_truncate ( + FIL *fp /* Pointer to the file object */ +) +{ + FRESULT res; + DWORD ncl; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_WRITE)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + + if (fp->fsize > fp->fptr) { + fp->fsize = fp->fptr; /* Set file size to current R/W point */ + fp->flag |= FA__WRITTEN; + if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */ + res = remove_chain(fp->fs, fp->org_clust); + fp->org_clust = 0; + } else { /* When truncate a part of the file, remove remaining clusters */ + ncl = get_cluster(fp->fs, fp->curr_clust); + res = FR_OK; + if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; + if (ncl == 1) res = FR_INT_ERR; + if (res == FR_OK && ncl < fp->fs->max_clust) { + res = put_cluster(fp->fs, fp->curr_clust, 0x0FFFFFFF); + if (res == FR_OK) res = remove_chain(fp->fs, ncl); + } + } + } + if (res != FR_OK) fp->flag |= FA__ERROR; + + LEAVE_FF(fp->fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Get Number of Free Clusters */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_getfree ( + const char *path, /* Pointer to the logical drive number (root dir) */ + DWORD *nclst, /* Pointer to the variable to return number of free clusters */ + FATFS **fatfs /* Pointer to pointer to corresponding file system object to return */ +) +{ + FRESULT res; + DWORD n, clst, sect; + BYTE fat, f, *p; + + + /* Get drive number */ + res = auto_mount(&path, fatfs, 0); + if (res != FR_OK) LEAVE_FF(*fatfs, res); + + /* If number of free cluster is valid, return it without cluster scan. */ + if ((*fatfs)->free_clust <= (*fatfs)->max_clust - 2) { + *nclst = (*fatfs)->free_clust; + LEAVE_FF(*fatfs, FR_OK); + } + + /* Get number of free clusters */ + fat = (*fatfs)->fs_type; + n = 0; + if (fat == FS_FAT12) { + clst = 2; + do { + if ((WORD)get_cluster(*fatfs, clst) == 0) n++; + } while (++clst < (*fatfs)->max_clust); + } else { + clst = (*fatfs)->max_clust; + sect = (*fatfs)->fatbase; + f = 0; p = 0; + do { + if (!f) { + res = move_window(*fatfs, sect++); + if (res != FR_OK) + LEAVE_FF(*fatfs, res); + p = (*fatfs)->win; + } + if (fat == FS_FAT16) { + if (LD_WORD(p) == 0) n++; + p += 2; f += 1; + } else { + if (LD_DWORD(p) == 0) n++; + p += 4; f += 2; + } + } while (--clst); + } + (*fatfs)->free_clust = n; + if (fat == FS_FAT32) (*fatfs)->fsi_flag = 1; + *nclst = n; + + LEAVE_FF(*fatfs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Delete a File or Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_unlink ( + const char *path /* Pointer to the file or directory path */ +) +{ + FRESULT res; + DIR dj, sdj; + NAMEBUF(sfn, lfn); + BYTE *dir; + DWORD dclst; + + + res = auto_mount(&path, &dj.fs, 1); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */ + + dir = dj.dir; + if (!dir) /* Is it the root directory? */ + LEAVE_FF(dj.fs, FR_INVALID_NAME); + if (dir[DIR_Attr] & AM_RDO) /* Is it a R/O object? */ + LEAVE_FF(dj.fs, FR_DENIED); + dclst = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + + if (dir[DIR_Attr] & AM_DIR) { /* It is a sub-directory */ + if (dclst < 2) LEAVE_FF(dj.fs, FR_INT_ERR); + mem_cpy(&sdj, &dj, sizeof(DIR)); /* Check if the sub-dir is empty or not */ + sdj.sclust = dclst; + res = dir_seek(&sdj, 0); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + res = dir_read(&sdj); + if (res == FR_OK) res = FR_DENIED; /* Not empty sub-dir */ + if (res != FR_NO_FILE) LEAVE_FF(dj.fs, res); + } + + res = dir_remove(&dj); /* Remove directory entry */ + if (res == FR_OK) { + if (dclst) + res = remove_chain(dj.fs, dclst); /* Remove the cluster chain */ + if (res == FR_OK) res = sync(dj.fs); + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Create a Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mkdir ( + const char *path /* Pointer to the directory path */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir, n; + DWORD dsect, dclst, pclst, tim; + + + res = auto_mount(&path, &dj.fs, 1); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) res = FR_EXIST; /* Any file or directory is already existing */ + if (res != FR_NO_FILE) /* Any error occured */ + LEAVE_FF(dj.fs, res); + + dclst = create_chain(dj.fs, 0); /* Allocate a new cluster for new directory table */ + res = FR_OK; + if (dclst == 0) res = FR_DENIED; + if (dclst == 1) res = FR_INT_ERR; + if (dclst == 0xFFFFFFFF) res = FR_DISK_ERR; + if (res == FR_OK) + res = move_window(dj.fs, 0); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + dsect = clust2sect(dj.fs, dclst); + + dir = dj.fs->win; /* Initialize the new directory table */ + mem_set(dir, 0, SS(dj.fs)); + mem_set(dir+DIR_Name, ' ', 8+3); /* Create "." entry */ + dir[DIR_Name] = '.'; + dir[DIR_Attr] = AM_DIR; + tim = get_fattime(); + ST_DWORD(dir+DIR_WrtTime, tim); + ST_WORD(dir+DIR_FstClusLO, dclst); + ST_WORD(dir+DIR_FstClusHI, dclst >> 16); + mem_cpy(dir+32, dir, 32); /* Create ".." entry */ + dir[33] = '.'; + pclst = dj.sclust; + if (dj.fs->fs_type == FS_FAT32 && pclst == dj.fs->dirbase) + pclst = 0; + ST_WORD(dir+32+DIR_FstClusLO, pclst); + ST_WORD(dir+32+DIR_FstClusHI, pclst >> 16); + for (n = 0; n < dj.fs->csize; n++) { /* Write dot entries and clear left sectors */ + dj.fs->winsect = dsect++; + dj.fs->wflag = 1; + res = move_window(dj.fs, 0); + if (res) LEAVE_FF(dj.fs, res); + mem_set(dir, 0, SS(dj.fs)); + } + + res = dir_register(&dj); + if (res != FR_OK) { + remove_chain(dj.fs, dclst); + } else { + dir = dj.dir; + dir[DIR_Attr] = AM_DIR; /* Attribute */ + ST_DWORD(dir+DIR_WrtTime, tim); /* Crated time */ + ST_WORD(dir+DIR_FstClusLO, dclst); /* Table start cluster */ + ST_WORD(dir+DIR_FstClusHI, dclst >> 16); + dj.fs->wflag = 1; + res = sync(dj.fs); + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change File Attribute */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_chmod ( + const char *path, /* Pointer to the file path */ + BYTE value, /* Attribute bits */ + BYTE mask /* Attribute mask to change */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 1); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { + dir = dj.dir; + if (!dir) { /* Is it a root directory? */ + res = FR_INVALID_NAME; + } else { /* File or sub directory */ + mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */ + dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */ + dj.fs->wflag = 1; + res = sync(dj.fs); + } + } + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change Timestamp */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_utime ( + const char *path, /* Pointer to the file/directory name */ + const FILINFO *fno /* Pointer to the timestamp to be set */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 1); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { + dir = dj.dir; + if (!dir) { /* Root directory */ + res = FR_INVALID_NAME; + } else { /* File or sub-directory */ + ST_WORD(dir+DIR_WrtTime, fno->ftime); + ST_WORD(dir+DIR_WrtDate, fno->fdate); + dj.fs->wflag = 1; + res = sync(dj.fs); + } + } + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Rename File/Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_rename ( + const char *path_old, /* Pointer to the old name */ + const char *path_new /* Pointer to the new name */ +) +{ + FRESULT res; + DIR dj_old, dj_new; + NAMEBUF(sfn, lfn); + BYTE buf[21], *dir; + DWORD dw; + + + INITBUF(dj_old, sfn, lfn); + res = auto_mount(&path_old, &dj_old.fs, 1); + if (res == FR_OK) { + dj_new.fs = dj_old.fs; + res = follow_path(&dj_old, path_old); /* Check old object */ + } + if (res != FR_OK) LEAVE_FF(dj_old.fs, res); /* The old object is not found */ + + if (!dj_old.dir) LEAVE_FF(dj_old.fs, FR_NO_FILE); /* Is root dir? */ + mem_cpy(buf, dj_old.dir+DIR_Attr, 21); /* Save the object information */ + + mem_cpy(&dj_new, &dj_old, sizeof(DIR)); + res = follow_path(&dj_new, path_new); /* Check new object */ + if (res == FR_OK) res = FR_EXIST; /* The new object name is already existing */ + if (res == FR_NO_FILE) { /* Is it a valid path and no name collision? */ + res = dir_register(&dj_new); /* Register the new object */ + if (res == FR_OK) { + dir = dj_new.dir; /* Copy object information into new entry */ + mem_cpy(dir+13, buf+2, 19); + dir[DIR_Attr] = buf[0]; + dj_old.fs->wflag = 1; + if (dir[DIR_Attr] & AM_DIR) { /* Update .. entry in the directory if needed */ + dw = clust2sect(dj_new.fs, (DWORD)LD_WORD(dir+DIR_FstClusHI) | LD_WORD(dir+DIR_FstClusLO)); + if (!dw) { + res = FR_INT_ERR; + } else { + res = move_window(dj_new.fs, dw); + dir = dj_new.fs->win+32; + if (res == FR_OK && dir[1] == '.') { + dw = (dj_new.fs->fs_type == FS_FAT32 && dj_new.sclust == dj_new.fs->dirbase) ? 0 : dj_new.sclust; + ST_WORD(dir+DIR_FstClusLO, dw); + ST_WORD(dir+DIR_FstClusHI, dw >> 16); + dj_new.fs->wflag = 1; + } + } + } + if (res == FR_OK) { + res = dir_remove(&dj_old); /* Remove old entry */ + if (res == FR_OK) + res = sync(dj_old.fs); + } + } + } + + LEAVE_FF(dj_old.fs, res); +} + +#endif /* !_FS_READONLY */ +#endif /* _FS_MINIMIZE == 0 */ +#endif /* _FS_MINIMIZE <= 1 */ +#endif /* _FS_MINIMIZE <= 2 */ + + + +/*-----------------------------------------------------------------------*/ +/* Forward data to the stream directly (Available on only _FS_TINY cfg) */ +/*-----------------------------------------------------------------------*/ +#if _USE_FORWARD && _FS_TINY + +FRESULT f_forward ( + FIL *fp, /* Pointer to the file object */ + UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */ + UINT btr, /* Number of bytes to forward */ + UINT *bf /* Pointer to number of bytes forwarded */ +) +{ + FRESULT res; + DWORD remain, clst, sect; + UINT rcnt; + + + *bf = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check error flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_READ)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + + remain = fp->fsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr && (*func)(NULL, 0); /* Repeat until all data transferred or stream becomes busy */ + fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->org_clust : get_cluster(fp->fs, fp->curr_clust); + if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector address in the cluster */ + } + fp->csect++; /* Next sector address in the cluster */ + } + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current data sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect - 1; + if (move_window(fp->fs, sect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + fp->dsect = sect; + rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs)); /* Forward data from sector window */ + if (rcnt > btr) rcnt = btr; + rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt); + if (!rcnt) ABORT(fp->fs, FR_INT_ERR); + } + + LEAVE_FF(fp->fs, FR_OK); +} +#endif /* _USE_FORWARD */ + + + +#if _USE_MKFS && !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Create File System on the Drive */ +/*-----------------------------------------------------------------------*/ +#define N_ROOTDIR 512 /* Multiple of 32 and <= 2048 */ +#define N_FATS 1 /* 1 or 2 */ +#define MAX_SECTOR 131072000UL /* Maximum partition size */ +#define MIN_SECTOR 2000UL /* Minimum partition size */ + + +FRESULT f_mkfs ( + BYTE drv, /* Logical drive number */ + BYTE partition, /* Partitioning rule 0:FDISK, 1:SFD */ + WORD allocsize /* Allocation unit size [bytes] */ +) +{ + static const DWORD sstbl[] = { 2048000, 1024000, 512000, 256000, 128000, 64000, 32000, 16000, 8000, 4000, 0 }; + static const WORD cstbl[] = { 32768, 16384, 8192, 4096, 2048, 16384, 8192, 4096, 2048, 1024, 512 }; + BYTE fmt, m, *tbl; + DWORD b_part, b_fat, b_dir, b_data; /* Area offset (LBA) */ + DWORD n_part, n_rsv, n_fat, n_dir; /* Area size */ + DWORD n_clst, n; + WORD as; + FATFS *fs; + DSTATUS stat; + + + /* Check validity of the parameters */ + if (drv >= _DRIVES) return FR_INVALID_DRIVE; + if (partition >= 2) return FR_MKFS_ABORTED; + + /* Check mounted drive and clear work area */ + fs = FatFs[drv]; + if (!fs) return FR_NOT_ENABLED; + fs->fs_type = 0; + drv = LD2PD(drv); + + /* Get disk statics */ + stat = disk_initialize(drv); + if (stat & STA_NOINIT) return FR_NOT_READY; + if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; + if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR) + return FR_MKFS_ABORTED; + if (n_part > MAX_SECTOR) n_part = MAX_SECTOR; + b_part = (!partition) ? 63 : 0; /* Boot sector */ + n_part -= b_part; +#if _MAX_SS == 512 + if (!allocsize) { /* Auto selection of cluster size */ + for (n = 0; n_part < sstbl[n]; n++) ; + allocsize = cstbl[n]; + } +#endif + for (as = 512; as <= 32768U && as != allocsize; as <<= 1); + if (as != allocsize) return FR_MKFS_ABORTED; +#if _MAX_SS != 512 /* Check disk sector size */ + if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK + || SS(fs) > _MAX_SS + || SS(fs) > allocsize) + return FR_MKFS_ABORTED; +#endif + allocsize /= SS(fs); /* Number of sectors per cluster */ + + /* Pre-compute number of clusters and FAT type */ + n_clst = n_part / allocsize; + fmt = FS_FAT12; + if (n_clst >= 0xFF5) fmt = FS_FAT16; + if (n_clst >= 0xFFF5) fmt = FS_FAT32; + + /* Determine offset and size of FAT structure */ + switch (fmt) { + case FS_FAT12: + n_fat = ((n_clst * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs); + n_rsv = 1 + partition; + n_dir = N_ROOTDIR * 32 / SS(fs); + break; + case FS_FAT16: + n_fat = ((n_clst * 2) + 4 + SS(fs) - 1) / SS(fs); + n_rsv = 1 + partition; + n_dir = N_ROOTDIR * 32 / SS(fs); + break; + default: + n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs); + n_rsv = 33 - partition; + n_dir = 0; + } + b_fat = b_part + n_rsv; /* FATs start sector */ + b_dir = b_fat + n_fat * N_FATS; /* Directory start sector */ + b_data = b_dir + n_dir; /* Data start sector */ + + /* Align data start sector to erase block boundary (for flash memory media) */ + if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED; + n = (b_data + n - 1) & ~(n - 1); + n_fat += (n - b_data) / N_FATS; + /* b_dir and b_data are no longer used below */ + + /* Determine number of cluster and final check of validity of the FAT type */ + n_clst = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize; + if ( (fmt == FS_FAT16 && n_clst < 0xFF5) + || (fmt == FS_FAT32 && n_clst < 0xFFF5)) + return FR_MKFS_ABORTED; + + /* Create partition table if needed */ + if (!partition) { + DWORD n_disk = b_part + n_part; + + tbl = fs->win+MBR_Table; + ST_DWORD(tbl, 0x00010180); /* Partition start in CHS */ + if (n_disk < 63UL * 255 * 1024) { /* Partition end in CHS */ + n_disk = n_disk / 63 / 255; + tbl[7] = (BYTE)n_disk; + tbl[6] = (BYTE)((n_disk >> 2) | 63); + } else { + ST_WORD(&tbl[6], 0xFFFF); + } + tbl[5] = 254; + if (fmt != FS_FAT32) /* System ID */ + tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06; + else + tbl[4] = 0x0c; + ST_DWORD(tbl+8, 63); /* Partition start in LBA */ + ST_DWORD(tbl+12, n_part); /* Partition size in LBA */ + ST_WORD(tbl+64, 0xAA55); /* Signature */ + if (disk_write(drv, fs->win, 0, 1) != RES_OK) + return FR_DISK_ERR; + } + + /* Create boot record */ + tbl = fs->win; /* Clear buffer */ + mem_set(tbl, 0, SS(fs)); + ST_DWORD(tbl+BS_jmpBoot, 0x90FEEB); /* Boot code (jmp $, nop) */ + ST_WORD(tbl+BPB_BytsPerSec, SS(fs)); /* Sector size */ + tbl[BPB_SecPerClus] = (BYTE)allocsize; /* Sectors per cluster */ + ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv); /* Reserved sectors */ + tbl[BPB_NumFATs] = N_FATS; /* Number of FATs */ + ST_WORD(tbl+BPB_RootEntCnt, SS(fs) / 32 * n_dir); /* Number of rootdir entries */ + if (n_part < 0x10000) { /* Number of total sectors */ + ST_WORD(tbl+BPB_TotSec16, n_part); + } else { + ST_DWORD(tbl+BPB_TotSec32, n_part); + } + tbl[BPB_Media] = 0xF8; /* Media descripter */ + ST_WORD(tbl+BPB_SecPerTrk, 63); /* Number of sectors per track */ + ST_WORD(tbl+BPB_NumHeads, 255); /* Number of heads */ + ST_DWORD(tbl+BPB_HiddSec, b_part); /* Hidden sectors */ + n = get_fattime(); /* Use current time as a VSN */ + if (fmt != FS_FAT32) { + ST_DWORD(tbl+BS_VolID, n); /* Volume serial number */ + ST_WORD(tbl+BPB_FATSz16, n_fat); /* Number of secters per FAT */ + tbl[BS_DrvNum] = 0x80; /* Drive number */ + tbl[BS_BootSig] = 0x29; /* Extended boot signature */ + mem_cpy(tbl+BS_VolLab, "NO NAME FAT ", 19); /* Volume lavel, FAT signature */ + } else { + ST_DWORD(tbl+BS_VolID32, n); /* Volume serial number */ + ST_DWORD(tbl+BPB_FATSz32, n_fat); /* Number of secters per FAT */ + ST_DWORD(tbl+BPB_RootClus, 2); /* Root directory cluster (2) */ + ST_WORD(tbl+BPB_FSInfo, 1); /* FSInfo record offset (bs+1) */ + ST_WORD(tbl+BPB_BkBootSec, 6); /* Backup boot record offset (bs+6) */ + tbl[BS_DrvNum32] = 0x80; /* Drive number */ + tbl[BS_BootSig32] = 0x29; /* Extended boot signature */ + mem_cpy(tbl+BS_VolLab32, "NO NAME FAT32 ", 19); /* Volume lavel, FAT signature */ + } + ST_WORD(tbl+BS_55AA, 0xAA55); /* Signature */ + if (disk_write(drv, tbl, b_part+0, 1) != RES_OK) + return FR_DISK_ERR; + if (fmt == FS_FAT32) + disk_write(drv, tbl, b_part+6, 1); + + /* Initialize FAT area */ + for (m = 0; m < N_FATS; m++) { + mem_set(tbl, 0, SS(fs)); /* 1st sector of the FAT */ + if (fmt != FS_FAT32) { + n = (fmt == FS_FAT12) ? 0x00FFFFF8 : 0xFFFFFFF8; + ST_DWORD(tbl, n); /* Reserve cluster #0-1 (FAT12/16) */ + } else { + ST_DWORD(tbl+0, 0xFFFFFFF8); /* Reserve cluster #0-1 (FAT32) */ + ST_DWORD(tbl+4, 0xFFFFFFFF); + ST_DWORD(tbl+8, 0x0FFFFFFF); /* Reserve cluster #2 for root dir */ + } + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + mem_set(tbl, 0, SS(fs)); /* Following FAT entries are filled by zero */ + for (n = 1; n < n_fat; n++) { + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + } + } + + /* Initialize Root directory */ + m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir); + do { + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + } while (--m); + + /* Create FSInfo record if needed */ + if (fmt == FS_FAT32) { + ST_WORD(tbl+BS_55AA, 0xAA55); + ST_DWORD(tbl+FSI_LeadSig, 0x41615252); + ST_DWORD(tbl+FSI_StrucSig, 0x61417272); + ST_DWORD(tbl+FSI_Free_Count, n_clst - 1); + ST_DWORD(tbl+FSI_Nxt_Free, 0xFFFFFFFF); + disk_write(drv, tbl, b_part+1, 1); + disk_write(drv, tbl, b_part+7, 1); + } + + return (disk_ioctl(drv, CTRL_SYNC, (void*)NULL) == RES_OK) ? FR_OK : FR_DISK_ERR; +} + +#endif /* _USE_MKFS && !_FS_READONLY */ + + + + +#if _USE_STRFUNC +/*-----------------------------------------------------------------------*/ +/* Get a string from the file */ +/*-----------------------------------------------------------------------*/ +char* f_gets ( + char* buff, /* Pointer to the string buffer to read */ + int len, /* Size of string buffer */ + FIL* fil /* Pointer to the file object */ +) +{ + int i = 0; + char *p = buff; + UINT rc; + + + while (i < len - 1) { /* Read bytes until buffer gets filled */ + f_read(fil, p, 1, &rc); + if (rc != 1) break; /* Break when no data to read */ +#if _USE_STRFUNC >= 2 + if (*p == '\r') continue; /* Strip '\r' */ +#endif + i++; + if (*p++ == '\n') break; /* Break when reached end of line */ + } + *p = 0; + return i ? buff : NULL; /* When no data read (eof or error), return with error. */ +} + + + +#if !_FS_READONLY +#include +/*-----------------------------------------------------------------------*/ +/* Put a character to the file */ +/*-----------------------------------------------------------------------*/ +int f_putc ( + int chr, /* A character to be output */ + FIL* fil /* Ponter to the file object */ +) +{ + UINT bw; + char c; + + +#if _USE_STRFUNC >= 2 + if (chr == '\n') f_putc ('\r', fil); /* LF -> CRLF conversion */ +#endif + if (!fil) { /* Special value may be used to switch the destination to any other device */ + /* put_console(chr); */ + return chr; + } + c = (char)chr; + f_write(fil, &c, 1, &bw); /* Write a byte to the file */ + return bw ? chr : EOF; /* Return the result */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a string to the file */ +/*-----------------------------------------------------------------------*/ +int f_puts ( + const char* str, /* Pointer to the string to be output */ + FIL* fil /* Pointer to the file object */ +) +{ + int n; + + + for (n = 0; *str; str++, n++) { + if (f_putc(*str, fil) == EOF) return EOF; + } + return n; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a formatted string to the file */ +/*-----------------------------------------------------------------------*/ +int f_printf ( + FIL* fil, /* Pointer to the file object */ + const char* str, /* Pointer to the format string */ + ... /* Optional arguments... */ +) +{ + va_list arp; + UCHAR c, f, r; + ULONG val; + char s[16]; + int i, w, res, cc; + + + va_start(arp, str); + + for (cc = res = 0; cc != EOF; res += cc) { + c = *str++; + if (c == 0) break; /* End of string */ + if (c != '%') { /* Non escape cahracter */ + cc = f_putc(c, fil); + if (cc != EOF) cc = 1; + continue; + } + w = f = 0; + c = *str++; + if (c == '0') { /* Flag: '0' padding */ + f = 1; c = *str++; + } + while (c >= '0' && c <= '9') { /* Precision */ + w = w * 10 + (c - '0'); + c = *str++; + } + if (c == 'l') { /* Prefix: Size is long int */ + f |= 2; c = *str++; + } + if (c == 's') { /* Type is string */ + cc = f_puts(va_arg(arp, char*), fil); + continue; + } + if (c == 'c') { /* Type is character */ + cc = f_putc(va_arg(arp, int), fil); + if (cc != EOF) cc = 1; + continue; + } + r = 0; + if (c == 'd') r = 10; /* Type is signed decimal */ + if (c == 'u') r = 10; /* Type is unsigned decimal */ + if (c == 'X') r = 16; /* Type is unsigned hexdecimal */ + if (r == 0) break; /* Unknown type */ + if (f & 2) { /* Get the value */ + val = (ULONG)va_arg(arp, long); + } else { + val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int); + } + /* Put numeral string */ + if (c == 'd') { + if (val & 0x80000000) { + val = 0 - val; + f |= 4; + } + } + i = sizeof(s) - 1; s[i] = 0; + do { + c = (UCHAR)(val % r + '0'); + if (c > '9') c += 7; + s[--i] = c; + val /= r; + } while (i && val); + if (i && (f & 4)) s[--i] = '-'; + w = sizeof(s) - 1 - w; + while (i && i > w) s[--i] = (f & 1) ? '0' : ' '; + cc = f_puts(&s[i], fil); + } + + va_end(arp); + return (cc == EOF) ? cc : res; +} + +#endif /* !_FS_READONLY */ +#endif /* _USE_STRFUNC */ diff --git a/2.5/bertos/fs/fatfs/ff.h b/2.5/bertos/fs/fatfs/ff.h new file mode 100644 index 00000000..5461efe9 --- /dev/null +++ b/2.5/bertos/fs/fatfs/ff.h @@ -0,0 +1,570 @@ +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module include file R0.07a (C)ChaN, 2009 +/----------------------------------------------------------------------------/ +/ FatFs module is an open source software to implement FAT file system to +/ small embedded systems. This is a free software and is opened for education, +/ research and commercial developments under license policy of following trems. +/ +/ Copyright (C) 2009, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +/----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------/ +/ FatFs Configuration Options +/ +/ CAUTION! Do not forget to make clean the project after any changes to +/ the configuration options. +/ +/----------------------------------------------------------------------------*/ +#ifndef _FATFS +#define _FATFS + +#include "integer.h" +#include "cfg/cfg_fat.h" + +#ifndef _WORD_ACCESS +#define _WORD_ACCESS 0 +#endif +/* The _WORD_ACCESS option defines which access method is used to the word +/ data in the FAT structure. +/ +/ 0: Byte-by-byte access. Always compatible with all platforms. +/ 1: Word access. Do not choose this unless following condition is met. +/ +/ When the byte order on the memory is big-endian or address miss-aligned +/ word access results incorrect behavior, the _WORD_ACCESS must be set to 0. +/ If it is not the case, the value can also be set to 1 to improve the +/ performance and code efficiency. */ + +#ifndef _FS_READONLY +#define _FS_READONLY 0 +#endif +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, +/ f_truncate and useless f_getfree. */ + +#ifndef _FS_MINIMIZE +#define _FS_MINIMIZE 0 +#endif +/* The _FS_MINIMIZE option defines minimization level to remove some functions. +/ +/ 0: Full function. +/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename +/ are removed. +/ 2: f_opendir and f_readdir are removed in addition to level 1. +/ 3: f_lseek is removed in addition to level 2. */ + +#ifndef _FS_TINY +#define _FS_TINY 0 +#endif +/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system +/ object instead of the sector buffer in the individual file object for file +/ data transfer. This reduces memory consumption 512 bytes each file object. */ + +#ifndef _USE_STRFUNC +#define _USE_STRFUNC 0 +#endif +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + +#ifndef _USE_MKFS +#define _USE_MKFS 0 +#endif +/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#ifndef _USE_FORWARD +#define _USE_FORWARD 0 +#endif +/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +#ifndef _DRIVES +#define _DRIVES 1 +#endif +/* Number of volumes (logical drives) to be used. */ + +#ifndef _MAX_SS +#define _MAX_SS 512 +#endif +/* Maximum sector size to be handled. (512/1024/2048/4096) */ +/* 512 for memroy card and hard disk, 1024 for floppy disk, 2048 for MO disk */ + +#ifndef _MULTI_PARTITION +#define _MULTI_PARTITION 0 +#endif +/* When _MULTI_PARTITION is set to 0, each volume is bound to the same physical +/ drive number and can mount only first primaly partition. When it is set to 1, +/ each volume is tied to the partitions listed in Drives[]. */ + +#ifndef _CODE_PAGE +#define _CODE_PAGE 932 +#endif +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ When it is non LFN configuration, there is no difference between SBCS code +/ pages. When LFN is enabled, the code page must always be set correctly. +/ 437 - U.S. +/ 720 - Arabic +/ 737 - Greek +/ 775 - Baltic +/ 850 - Multilingual Latin 1 +/ 852 - Latin 2 +/ 855 - Cyrillic +/ 857 - Turkish +/ 858 - Multilingual Latin 1 + Euro +/ 862 - Hebrew +/ 866 - Russian +/ 874 - Thai +/ 932 - Japanese Shift-JIS (DBCS) +/ 936 - Simplified Chinese GBK (DBCS) +/ 949 - Korean (DBCS) +/ 950 - Traditional Chinese Big5 (DBCS) +/ 1258 - Vietnam +*/ + +#ifndef _USE_LFN +#define _USE_LFN 0 +#endif +#ifndef _MAX_LFN +#define _MAX_LFN 255 /* Maximum LFN length to handle (max:255) */ +#endif +/* The _USE_LFN option switches the LFN support. +/ +/ 0: Disable LFN. +/ 1: Enable LFN with static working buffer on the bss. NOT REENTRANT. +/ 2: Enable LFN with dynamic working buffer on the caller's STACK. +/ +/ The working buffer occupies (_MAX_LFN + 1) * 2 bytes. When enable LFN, +/ a Unicode - OEM code conversion function ff_convert() must be added to +/ the project. */ + +#ifndef _FS_REENTRANT +#define _FS_REENTRANT 0 +#endif +#ifndef _TIMEOUT +#define _TIMEOUT 1000 /* Timeout period in unit of time ticks */ +#endif +#ifndef _SYNC_t +#define _SYNC_t HANDLE /* Type of sync object used on the OS. */ + /* e.g. HANDLE, OS_EVENT*, ID and etc.. */ +#endif +/* To make the FatFs module re-entrant, set _FS_REENTRANT to 1 and add user +/ provided synchronization handlers, ff_req_grant, ff_rel_grant, +/ ff_del_syncobj and ff_cre_syncobj function to the project. */ + + + +/* End of configuration options. Do not change followings without care. */ +/*--------------------------------------------------------------------------*/ + + + +/* Definitions corresponds to multiple sector size */ + +#if _MAX_SS == 512 +#define SS(fs) 512 +#else +#if _MAX_SS == 1024 || _MAX_SS == 2048 || _MAX_SS == 4096 +#define SS(fs) ((fs)->s_size) +#else +#error Sector size must be 512, 1024, 2048 or 4096. +#endif +#endif + + + +/* File system object structure */ + +typedef struct _FATFS { + BYTE fs_type; /* FAT sub type */ + BYTE drive; /* Physical drive number */ + BYTE csize; /* Number of sectors per cluster */ + BYTE n_fats; /* Number of FAT copies */ + BYTE wflag; /* win[] dirty flag (1:must be written back) */ + BYTE pad1; + WORD id; /* File system mount ID */ + WORD n_rootdir; /* Number of root directory entries (0 on FAT32) */ +#if _FS_REENTRANT + _SYNC_t sobj; /* Identifier of sync object */ +#endif +#if _MAX_SS != 512U + WORD s_size; /* Sector size */ +#endif +#if !_FS_READONLY + BYTE fsi_flag; /* fsinfo dirty flag (1:must be written back) */ + BYTE pad2; + DWORD last_clust; /* Last allocated cluster */ + DWORD free_clust; /* Number of free clusters */ + DWORD fsi_sector; /* fsinfo sector */ +#endif + DWORD sects_fat; /* Sectors per fat */ + DWORD max_clust; /* Maximum cluster# + 1. Number of clusters is max_clust - 2 */ + DWORD fatbase; /* FAT start sector */ + DWORD dirbase; /* Root directory start sector (Cluster# on FAT32) */ + DWORD database; /* Data start sector */ + DWORD winsect; /* Current sector appearing in the win[] */ + BYTE win[_MAX_SS];/* Disk access window for Directory/FAT */ +} FATFS; + + + +/* Directory object structure */ + +typedef struct _DIR { + WORD id; /* Owner file system mount ID */ + WORD index; /* Current index number */ + FATFS* fs; /* Pointer to the owner file system object */ + DWORD sclust; /* Table start cluster (0:Static table) */ + DWORD clust; /* Current cluster */ + DWORD sect; /* Current sector */ + BYTE* dir; /* Pointer to the current SFN entry in the win[] */ + BYTE* fn; /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */ +#if _USE_LFN + WCHAR* lfn; /* Pointer to the LFN working buffer */ + WORD lfn_idx; /* Last matched LFN index (0xFFFF:No LFN) */ +#endif +} DIR; + + + +/* File object structure */ + +typedef struct _FIL { + FATFS* fs; /* Pointer to the owner file system object */ + WORD id; /* Owner file system mount ID */ + BYTE flag; /* File status flags */ + BYTE csect; /* Sector address in the cluster */ + DWORD fptr; /* File R/W pointer */ + DWORD fsize; /* File size */ + DWORD org_clust; /* File start cluster */ + DWORD curr_clust; /* Current cluster */ + DWORD dsect; /* Current data sector */ +#if !_FS_READONLY + DWORD dir_sect; /* Sector containing the directory entry */ + BYTE* dir_ptr; /* Ponter to the directory entry in the window */ +#endif +#if !_FS_TINY + BYTE buf[_MAX_SS];/* File R/W buffer */ +#endif +} FIL; + + + +/* File status structure */ + +typedef struct _FILINFO { + DWORD fsize; /* File size */ + WORD fdate; /* Last modified date */ + WORD ftime; /* Last modified time */ + BYTE fattrib; /* Attribute */ + char fname[13]; /* Short file name (8.3 format) */ +#if _USE_LFN + char *lfname; /* Pointer to the LFN buffer */ + int lfsize; /* Size of LFN buffer [bytes] */ +#endif +} FILINFO; + + + +/* DBCS code ranges */ + +#if _CODE_PAGE == 932 /* CP932 (Japanese Shift-JIS) */ +#define _DF1S 0x81 /* DBC 1st byte range 1 start */ +#define _DF1E 0x9F /* DBC 1st byte range 1 end */ +#define _DF2S 0xE0 /* DBC 1st byte range 2 start */ +#define _DF2E 0xFC /* DBC 1st byte range 2 end */ +#define _DS1S 0x40 /* DBC 2nd byte range 1 start */ +#define _DS1E 0x7E /* DBC 2nd byte range 1 end */ +#define _DS2S 0x80 /* DBC 2nd byte range 2 start */ +#define _DS2E 0xFC /* DBC 2nd byte range 2 end */ + +#elif _CODE_PAGE == 936 /* CP936 (Simplified Chinese GBK) */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x40 +#define _DS1E 0x7E +#define _DS2S 0x80 +#define _DS2E 0xFE + +#elif _CODE_PAGE == 949 /* CP949 (Korean) */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x41 +#define _DS1E 0x5A +#define _DS2S 0x61 +#define _DS2E 0x7A +#define _DS3S 0x81 +#define _DS3E 0xFE + +#elif _CODE_PAGE == 950 /* CP950 (Traditional Chinese Big5) */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x40 +#define _DS1E 0x7E +#define _DS2S 0xA1 +#define _DS2E 0xFE + +#else /* SBCS code pages */ +#define _DF1S 0 + +#endif + + + +/* Character code support macros */ + +#define IsUpper(c) (((c)>='A')&&((c)<='Z')) +#define IsLower(c) (((c)>='a')&&((c)<='z')) +#define IsDigit(c) (((c)>='0')&&((c)<='9')) + +#if _DF1S /* DBCS configuration */ + +#if _DF2S /* Two 1st byte areas */ +#define IsDBCS1(c) (((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E)) +#else /* One 1st byte area */ +#define IsDBCS1(c) ((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) +#endif + +#if _DS3S /* Three 2nd byte areas */ +#define IsDBCS2(c) (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E)) +#else /* Two 2nd byte areas */ +#define IsDBCS2(c) (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E)) +#endif + +#else /* SBCS configuration */ + +#define IsDBCS1(c) 0 +#define IsDBCS2(c) 0 + +#endif /* _DF1S */ + + + +/* Definitions corresponds to multi partition */ + +#if _MULTI_PARTITION /* Multiple partition configuration */ + +typedef struct _PARTITION { + BYTE pd; /* Physical drive# */ + BYTE pt; /* Partition # (0-3) */ +} PARTITION; + +extern +const PARTITION Drives[]; /* Logical drive# to physical location conversion table */ +#define LD2PD(drv) (Drives[drv].pd) /* Get physical drive# */ +#define LD2PT(drv) (Drives[drv].pt) /* Get partition# */ + +#else /* Single partition configuration */ + +#define LD2PD(drv) (drv) /* Physical drive# is equal to the logical drive# */ +#define LD2PT(drv) 0 /* Always mounts the 1st partition */ + +#endif + + + +/* File function return code (FRESULT) */ + +typedef enum { + FR_OK = 0, /* 0 */ + FR_DISK_ERR, /* 1 */ + FR_INT_ERR, /* 2 */ + FR_NOT_READY, /* 3 */ + FR_NO_FILE, /* 4 */ + FR_NO_PATH, /* 5 */ + FR_INVALID_NAME, /* 6 */ + FR_DENIED, /* 7 */ + FR_EXIST, /* 8 */ + FR_INVALID_OBJECT, /* 9 */ + FR_WRITE_PROTECTED, /* 10 */ + FR_INVALID_DRIVE, /* 11 */ + FR_NOT_ENABLED, /* 12 */ + FR_NO_FILESYSTEM, /* 13 */ + FR_MKFS_ABORTED, /* 14 */ + FR_TIMEOUT /* 15 */ +} FRESULT; + + + +/*--------------------------------------------------------------*/ +/* FatFs module application interface */ + +FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */ +FRESULT f_open (FIL*, const char*, BYTE); /* Open or create a file */ +FRESULT f_read (FIL*, void*, UINT, UINT*); /* Read data from a file */ +FRESULT f_write (FIL*, const void*, UINT, UINT*); /* Write data to a file */ +FRESULT f_lseek (FIL*, DWORD); /* Move file pointer of a file object */ +FRESULT f_close (FIL*); /* Close an open file object */ +FRESULT f_opendir (DIR*, const char*); /* Open an existing directory */ +FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */ +FRESULT f_stat (const char*, FILINFO*); /* Get file status */ +FRESULT f_getfree (const char*, DWORD*, FATFS**); /* Get number of free clusters on the drive */ +FRESULT f_truncate (FIL*); /* Truncate file */ +FRESULT f_sync (FIL*); /* Flush cached data of a writing file */ +FRESULT f_unlink (const char*); /* Delete an existing file or directory */ +FRESULT f_mkdir (const char*); /* Create a new directory */ +FRESULT f_chmod (const char*, BYTE, BYTE); /* Change attriburte of the file/dir */ +FRESULT f_utime (const char*, const FILINFO*); /* Change timestamp of the file/dir */ +FRESULT f_rename (const char*, const char*); /* Rename/Move a file or directory */ +FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*); /* Forward data to the stream */ +FRESULT f_mkfs (BYTE, BYTE, WORD); /* Create a file system on the drive */ + +#if _USE_STRFUNC +int f_putc (int, FIL*); /* Put a character to the file */ +int f_puts (const char*, FIL*); /* Put a string to the file */ +int f_printf (FIL*, const char*, ...); /* Put a formatted string to the file */ +char* f_gets (char*, int, FIL*); /* Get a string from the file */ +#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0) +#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0) +#ifndef EOF +#define EOF -1 +#endif +#endif + + + +/*--------------------------------------------------------------*/ +/* User defined functions */ + +/* Real time clock */ +#if !_FS_READONLY +DWORD get_fattime (void); /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */ + /* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */ +#endif + +/* Unicode - OEM code conversion */ +#if _USE_LFN +WCHAR ff_convert (WCHAR, UINT); +#endif + +/* Sync functions */ +#if _FS_REENTRANT +BOOL ff_cre_syncobj(BYTE, _SYNC_t*); +BOOL ff_del_syncobj(_SYNC_t); +BOOL ff_req_grant(_SYNC_t); +void ff_rel_grant(_SYNC_t); +#endif + + + +/*--------------------------------------------------------------*/ +/* Flags and offset address */ + + +/* File access control and file status flags (FIL.flag) */ + +#define FA_READ 0x01 +#define FA_OPEN_EXISTING 0x00 +#if _FS_READONLY == 0 +#define FA_WRITE 0x02 +#define FA_CREATE_NEW 0x04 +#define FA_CREATE_ALWAYS 0x08 +#define FA_OPEN_ALWAYS 0x10 +#define FA__WRITTEN 0x20 +#define FA__DIRTY 0x40 +#endif +#define FA__ERROR 0x80 + + +/* FAT sub type (FATFS.fs_type) */ + +#define FS_FAT12 1 +#define FS_FAT16 2 +#define FS_FAT32 3 + + +/* File attribute bits for directory entry */ + +#define AM_RDO 0x01 /* Read only */ +#define AM_HID 0x02 /* Hidden */ +#define AM_SYS 0x04 /* System */ +#define AM_VOL 0x08 /* Volume label */ +#define AM_LFN 0x0F /* LFN entry */ +#define AM_DIR 0x10 /* Directory */ +#define AM_ARC 0x20 /* Archive */ +#define AM_MASK 0x3F /* Mask of defined bits */ + + +/* FatFs refers the members in the FAT structures with byte offset instead +/ of structure member because there are incompatibility of the packing option +/ between various compilers. */ + +#define BS_jmpBoot 0 +#define BS_OEMName 3 +#define BPB_BytsPerSec 11 +#define BPB_SecPerClus 13 +#define BPB_RsvdSecCnt 14 +#define BPB_NumFATs 16 +#define BPB_RootEntCnt 17 +#define BPB_TotSec16 19 +#define BPB_Media 21 +#define BPB_FATSz16 22 +#define BPB_SecPerTrk 24 +#define BPB_NumHeads 26 +#define BPB_HiddSec 28 +#define BPB_TotSec32 32 +#define BS_55AA 510 + +#define BS_DrvNum 36 +#define BS_BootSig 38 +#define BS_VolID 39 +#define BS_VolLab 43 +#define BS_FilSysType 54 + +#define BPB_FATSz32 36 +#define BPB_ExtFlags 40 +#define BPB_FSVer 42 +#define BPB_RootClus 44 +#define BPB_FSInfo 48 +#define BPB_BkBootSec 50 +#define BS_DrvNum32 64 +#define BS_BootSig32 66 +#define BS_VolID32 67 +#define BS_VolLab32 71 +#define BS_FilSysType32 82 + +#define FSI_LeadSig 0 +#define FSI_StrucSig 484 +#define FSI_Free_Count 488 +#define FSI_Nxt_Free 492 + +#define MBR_Table 446 + +#define DIR_Name 0 +#define DIR_Attr 11 +#define DIR_NTres 12 +#define DIR_CrtTime 14 +#define DIR_CrtDate 16 +#define DIR_FstClusHI 20 +#define DIR_WrtTime 22 +#define DIR_WrtDate 24 +#define DIR_FstClusLO 26 +#define DIR_FileSize 28 +#define LDIR_Ord 0 +#define LDIR_Attr 11 +#define LDIR_Type 12 +#define LDIR_Chksum 13 +#define LDIR_FstClusLO 26 + + + +/*--------------------------------*/ +/* Multi-byte word access macros */ + +#if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */ +#define LD_WORD(ptr) (WORD)(*(WORD*)(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr)) +#define ST_WORD(ptr,val) *(WORD*)(BYTE*)(ptr)=(WORD)(val) +#define ST_DWORD(ptr,val) *(DWORD*)(BYTE*)(ptr)=(DWORD)(val) +#else /* Use byte-by-byte access to the FAT structure */ +#define LD_WORD(ptr) (WORD)(((WORD)*(BYTE*)((ptr)+1)<<8)|(WORD)*(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(((DWORD)*(BYTE*)((ptr)+3)<<24)|((DWORD)*(BYTE*)((ptr)+2)<<16)|((WORD)*(BYTE*)((ptr)+1)<<8)|*(BYTE*)(ptr)) +#define ST_WORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8) +#define ST_DWORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24) +#endif + + +#endif /* _FATFS */ diff --git a/2.5/bertos/fs/fatfs/integer.h b/2.5/bertos/fs/fatfs/integer.h new file mode 100644 index 00000000..32ccfd48 --- /dev/null +++ b/2.5/bertos/fs/fatfs/integer.h @@ -0,0 +1,39 @@ +/*-------------------------------------------*/ +/* Integer type definitions for FatFs module */ +/*-------------------------------------------*/ + +#ifndef _INTEGER + +#include + +#if 0 +#include +#else + +/* These types must be 16-bit, 32-bit or larger integer */ +typedef int INT; +typedef unsigned UINT; + +/* These types must be 8-bit integer */ +typedef int8_t CHAR; +typedef uint8_t UCHAR; +typedef uint8_t BYTE; + +/* These types must be 16-bit integer */ +typedef int16_t SHORT; +typedef uint16_t USHORT; +typedef uint16_t WORD; +typedef uint16_t WCHAR; + +/* These types must be 32-bit integer */ +typedef int32_t LONG; +typedef uint32_t ULONG; +typedef uint32_t DWORD; + +/* Boolean type */ +typedef enum { FALSE = 0, TRUE } BOOL; + +#endif + +#define _INTEGER +#endif diff --git a/2.5/bertos/fs/fatfs/option/cc932.c b/2.5/bertos/fs/fatfs/option/cc932.c new file mode 100644 index 00000000..8f7cd89a --- /dev/null +++ b/2.5/bertos/fs/fatfs/option/cc932.c @@ -0,0 +1,3784 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP932 (Japanese Shift-JIS) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + +#define _TINY_TABLE 0 + +#if _USE_LFN && _CODE_PAGE == 932 + + +static +const WCHAR uni2sjis[] = { +/* Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, */ + 0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D, + 0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180, + 0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2, + 0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6, + 0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA, + 0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE, + 0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2, + 0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6, + 0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2, + 0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6, + 0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA, + 0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE, + 0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2, + 0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6, + 0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442, + 0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447, + 0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B, + 0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F, + 0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453, + 0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457, + 0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B, + 0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F, + 0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472, + 0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477, + 0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B, + 0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480, + 0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484, + 0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488, + 0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C, + 0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490, + 0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C, + 0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168, + 0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163, + 0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6, + 0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0, + 0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757, + 0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B, + 0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41, + 0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45, + 0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49, + 0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB, + 0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD, + 0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9, + 0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187, + 0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8, + 0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7, + 0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6, + 0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF, + 0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2, + 0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 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0x93CE, + 0x9D03, 0xE9EE, 0x9D06, 0xE9EF, 0x9D07, 0x93BC, 0x9D08, 0xE9EC, + 0x9D09, 0xE9EB, 0x9D0E, 0x89A8, 0x9D12, 0xE9F7, 0x9D15, 0xE9F6, + 0x9D1B, 0x8995, 0x9D1F, 0xE9F4, 0x9D23, 0xE9F3, 0x9D26, 0xE9F1, + 0x9D28, 0x8A9B, 0x9D2A, 0xE9F0, 0x9D2B, 0x8EB0, 0x9D2C, 0x89A7, + 0x9D3B, 0x8D83, 0x9D3E, 0xE9FA, 0x9D3F, 0xE9F9, 0x9D41, 0xE9F8, + 0x9D44, 0xE9F5, 0x9D46, 0xE9FB, 0x9D48, 0xE9FC, 0x9D50, 0xEA44, + 0x9D51, 0xEA43, 0x9D59, 0xEA45, 0x9D5C, 0x894C, 0x9D5D, 0xEA40, + 0x9D5E, 0xEA41, 0x9D60, 0x8D94, 0x9D61, 0x96B7, 0x9D64, 0xEA42, + 0x9D6B, 0xFC48, 0x9D6C, 0x9651, 0x9D6F, 0xEA4A, 0x9D70, 0xFC47, + 0x9D72, 0xEA46, 0x9D7A, 0xEA4B, 0x9D87, 0xEA48, 0x9D89, 0xEA47, + 0x9D8F, 0x8C7B, 0x9D9A, 0xEA4C, 0x9DA4, 0xEA4D, 0x9DA9, 0xEA4E, + 0x9DAB, 0xEA49, 0x9DAF, 0xE9F2, 0x9DB2, 0xEA4F, 0x9DB4, 0x92DF, + 0x9DB8, 0xEA53, 0x9DBA, 0xEA54, 0x9DBB, 0xEA52, 0x9DC1, 0xEA51, + 0x9DC2, 0xEA57, 0x9DC4, 0xEA50, 0x9DC6, 0xEA55, 0x9DCF, 0xEA56, + 0x9DD3, 0xEA59, 0x9DD9, 0xEA58, 0x9DE6, 0xEA5B, 0x9DED, 0xEA5C, + 0x9DEF, 0xEA5D, 0x9DF2, 0x9868, 0x9DF8, 0xEA5A, 0x9DF9, 0x91E9, + 0x9DFA, 0x8DEB, 0x9DFD, 0xEA5E, 0x9E19, 0xFC4A, 0x9E1A, 0xEA5F, + 0x9E1B, 0xEA60, 0x9E1E, 0xEA61, 0x9E75, 0xEA62, 0x9E78, 0x8CB2, + 0x9E79, 0xEA63, 0x9E7D, 0xEA64, 0x9E7F, 0x8EAD, 0x9E81, 0xEA65, + 0x9E88, 0xEA66, 0x9E8B, 0xEA67, 0x9E8C, 0xEA68, 0x9E91, 0xEA6B, + 0x9E92, 0xEA69, 0x9E93, 0x985B, 0x9E95, 0xEA6A, 0x9E97, 0x97ED, + 0x9E9D, 0xEA6C, 0x9E9F, 0x97D9, 0x9EA5, 0xEA6D, 0x9EA6, 0x949E, + 0x9EA9, 0xEA6E, 0x9EAA, 0xEA70, 0x9EAD, 0xEA71, 0x9EB8, 0xEA6F, + 0x9EB9, 0x8D8D, 0x9EBA, 0x96CB, 0x9EBB, 0x9683, 0x9EBC, 0x9BF5, + 0x9EBE, 0x9F80, 0x9EBF, 0x969B, 0x9EC4, 0x89A9, 0x9ECC, 0xEA73, + 0x9ECD, 0x8B6F, 0x9ECE, 0xEA74, 0x9ECF, 0xEA75, 0x9ED0, 0xEA76, + 0x9ED1, 0xFC4B, 0x9ED2, 0x8D95, 0x9ED4, 0xEA77, 0x9ED8, 0xE0D2, + 0x9ED9, 0x96D9, 0x9EDB, 0x91E1, 0x9EDC, 0xEA78, 0x9EDD, 0xEA7A, + 0x9EDE, 0xEA79, 0x9EE0, 0xEA7B, 0x9EE5, 0xEA7C, 0x9EE8, 0xEA7D, + 0x9EEF, 0xEA7E, 0x9EF4, 0xEA80, 0x9EF6, 0xEA81, 0x9EF7, 0xEA82, + 0x9EF9, 0xEA83, 0x9EFB, 0xEA84, 0x9EFC, 0xEA85, 0x9EFD, 0xEA86, + 0x9F07, 0xEA87, 0x9F08, 0xEA88, 0x9F0E, 0x9343, 0x9F13, 0x8CDB, + 0x9F15, 0xEA8A, 0x9F20, 0x916C, 0x9F21, 0xEA8B, 0x9F2C, 0xEA8C, + 0x9F3B, 0x9540, 0x9F3E, 0xEA8D, 0x9F4A, 0xEA8E, 0x9F4B, 0xE256, + 0x9F4E, 0xE6D8, 0x9F4F, 0xE8EB, 0x9F52, 0xEA8F, 0x9F54, 0xEA90, + 0x9F5F, 0xEA92, 0x9F60, 0xEA93, 0x9F61, 0xEA94, 0x9F62, 0x97EE, + 0x9F63, 0xEA91, 0x9F66, 0xEA95, 0x9F67, 0xEA96, 0x9F6A, 0xEA98, + 0x9F6C, 0xEA97, 0x9F72, 0xEA9A, 0x9F76, 0xEA9B, 0x9F77, 0xEA99, + 0x9F8D, 0x97B4, 0x9F95, 0xEA9C, 0x9F9C, 0xEA9D, 0x9F9D, 0xE273, + 0x9FA0, 0xEA9E, 0xF929, 0xFAE0, 0xF9DC, 0xFBE9, 0xFA0E, 0xFA90, + 0xFA0F, 0xFA9B, 0xFA10, 0xFA9C, 0xFA11, 0xFAB1, 0xFA12, 0xFAD8, + 0xFA13, 0xFAE8, 0xFA14, 0xFAEA, 0xFA15, 0xFB58, 0xFA16, 0xFB5E, + 0xFA17, 0xFB75, 0xFA18, 0xFB7D, 0xFA19, 0xFB7E, 0xFA1A, 0xFB80, + 0xFA1B, 0xFB82, 0xFA1C, 0xFB86, 0xFA1D, 0xFB89, 0xFA1E, 0xFB92, + 0xFA1F, 0xFB9D, 0xFA20, 0xFB9F, 0xFA21, 0xFBA0, 0xFA22, 0xFBA9, + 0xFA23, 0xFBB1, 0xFA24, 0xFBB3, 0xFA25, 0xFBB4, 0xFA26, 0xFBB7, + 0xFA27, 0xFBD3, 0xFA28, 0xFBDA, 0xFA29, 0xFBEA, 0xFA2A, 0xFBF6, + 0xFA2B, 0xFBF7, 0xFA2C, 0xFBF9, 0xFA2D, 0xFC49, 0xFF01, 0x8149, + 0xFF02, 0xFA57, 0xFF03, 0x8194, 0xFF04, 0x8190, 0xFF05, 0x8193, + 0xFF06, 0x8195, 0xFF07, 0xFA56, 0xFF08, 0x8169, 0xFF09, 0x816A, + 0xFF0A, 0x8196, 0xFF0B, 0x817B, 0xFF0C, 0x8143, 0xFF0D, 0x817C, + 0xFF0E, 0x8144, 0xFF0F, 0x815E, 0xFF10, 0x824F, 0xFF11, 0x8250, + 0xFF12, 0x8251, 0xFF13, 0x8252, 0xFF14, 0x8253, 0xFF15, 0x8254, + 0xFF16, 0x8255, 0xFF17, 0x8256, 0xFF18, 0x8257, 0xFF19, 0x8258, + 0xFF1A, 0x8146, 0xFF1B, 0x8147, 0xFF1C, 0x8183, 0xFF1D, 0x8181, + 0xFF1E, 0x8184, 0xFF1F, 0x8148, 0xFF20, 0x8197, 0xFF21, 0x8260, + 0xFF22, 0x8261, 0xFF23, 0x8262, 0xFF24, 0x8263, 0xFF25, 0x8264, + 0xFF26, 0x8265, 0xFF27, 0x8266, 0xFF28, 0x8267, 0xFF29, 0x8268, + 0xFF2A, 0x8269, 0xFF2B, 0x826A, 0xFF2C, 0x826B, 0xFF2D, 0x826C, + 0xFF2E, 0x826D, 0xFF2F, 0x826E, 0xFF30, 0x826F, 0xFF31, 0x8270, + 0xFF32, 0x8271, 0xFF33, 0x8272, 0xFF34, 0x8273, 0xFF35, 0x8274, + 0xFF36, 0x8275, 0xFF37, 0x8276, 0xFF38, 0x8277, 0xFF39, 0x8278, + 0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E, + 0xFF3E, 0x814F, 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281, + 0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285, + 0xFF46, 0x8286, 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289, + 0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D, + 0xFF4E, 0x828E, 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291, + 0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295, + 0xFF56, 0x8296, 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299, + 0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170, + 0xFF5E, 0x8160, 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3, + 0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7, + 0xFF68, 0x00A8, 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB, + 0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF, + 0xFF70, 0x00B0, 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3, + 0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7, + 0xFF78, 0x00B8, 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB, + 0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF, + 0xFF80, 0x00C0, 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3, + 0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7, + 0xFF88, 0x00C8, 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB, + 0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF, + 0xFF90, 0x00D0, 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3, + 0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7, + 0xFF98, 0x00D8, 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB, + 0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF, + 0xFFE0, 0x8191, 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150, + 0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0 +}; + +#if !_TINY_TABLE +static +const WCHAR sjis2uni[] = { +/* SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, */ + 0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64, + 0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68, + 0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C, + 0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70, + 0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74, + 0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78, + 0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C, + 0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80, + 0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84, + 0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88, + 0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C, + 0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90, + 0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94, + 0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98, + 0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C, + 0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000, + 0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E, + 0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F, + 0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4, + 0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3, + 0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D, + 0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005, + 0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015, + 0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E, + 0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025, + 0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D, + 0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015, + 0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D, + 0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B, + 0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F, + 0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D, + 0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D, + 0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266, + 0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642, + 0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033, + 0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0, + 0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06, + 0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606, + 0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE, + 0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0, + 0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC, + 0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190, + 0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208, + 0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282, + 0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227, + 0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4, + 0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5, + 0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261, + 0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A, + 0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B, + 0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F, + 0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021, + 0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11, + 0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15, + 0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19, + 0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24, + 0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28, + 0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C, + 0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30, + 0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34, + 0x8274, 0xFF35, 0x8275, 0xFF36, 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0xFA41, 0x2171, 0xFA42, 0x2172, + 0xFA43, 0x2173, 0xFA44, 0x2174, 0xFA45, 0x2175, 0xFA46, 0x2176, + 0xFA47, 0x2177, 0xFA48, 0x2178, 0xFA49, 0x2179, 0xFA55, 0xFFE4, + 0xFA56, 0xFF07, 0xFA57, 0xFF02, 0xFA5C, 0x7E8A, 0xFA5D, 0x891C, + 0xFA5E, 0x9348, 0xFA5F, 0x9288, 0xFA60, 0x84DC, 0xFA61, 0x4FC9, + 0xFA62, 0x70BB, 0xFA63, 0x6631, 0xFA64, 0x68C8, 0xFA65, 0x92F9, + 0xFA66, 0x66FB, 0xFA67, 0x5F45, 0xFA68, 0x4E28, 0xFA69, 0x4EE1, + 0xFA6A, 0x4EFC, 0xFA6B, 0x4F00, 0xFA6C, 0x4F03, 0xFA6D, 0x4F39, + 0xFA6E, 0x4F56, 0xFA6F, 0x4F92, 0xFA70, 0x4F8A, 0xFA71, 0x4F9A, + 0xFA72, 0x4F94, 0xFA73, 0x4FCD, 0xFA74, 0x5040, 0xFA75, 0x5022, + 0xFA76, 0x4FFF, 0xFA77, 0x501E, 0xFA78, 0x5046, 0xFA79, 0x5070, + 0xFA7A, 0x5042, 0xFA7B, 0x5094, 0xFA7C, 0x50F4, 0xFA7D, 0x50D8, + 0xFA7E, 0x514A, 0xFA80, 0x5164, 0xFA81, 0x519D, 0xFA82, 0x51BE, + 0xFA83, 0x51EC, 0xFA84, 0x5215, 0xFA85, 0x529C, 0xFA86, 0x52A6, + 0xFA87, 0x52C0, 0xFA88, 0x52DB, 0xFA89, 0x5300, 0xFA8A, 0x5307, + 0xFA8B, 0x5324, 0xFA8C, 0x5372, 0xFA8D, 0x5393, 0xFA8E, 0x53B2, + 0xFA8F, 0x53DD, 0xFA90, 0xFA0E, 0xFA91, 0x549C, 0xFA92, 0x548A, + 0xFA93, 0x54A9, 0xFA94, 0x54FF, 0xFA95, 0x5586, 0xFA96, 0x5759, + 0xFA97, 0x5765, 0xFA98, 0x57AC, 0xFA99, 0x57C8, 0xFA9A, 0x57C7, + 0xFA9B, 0xFA0F, 0xFA9C, 0xFA10, 0xFA9D, 0x589E, 0xFA9E, 0x58B2, + 0xFA9F, 0x590B, 0xFAA0, 0x5953, 0xFAA1, 0x595B, 0xFAA2, 0x595D, + 0xFAA3, 0x5963, 0xFAA4, 0x59A4, 0xFAA5, 0x59BA, 0xFAA6, 0x5B56, + 0xFAA7, 0x5BC0, 0xFAA8, 0x752F, 0xFAA9, 0x5BD8, 0xFAAA, 0x5BEC, + 0xFAAB, 0x5C1E, 0xFAAC, 0x5CA6, 0xFAAD, 0x5CBA, 0xFAAE, 0x5CF5, + 0xFAAF, 0x5D27, 0xFAB0, 0x5D53, 0xFAB1, 0xFA11, 0xFAB2, 0x5D42, + 0xFAB3, 0x5D6D, 0xFAB4, 0x5DB8, 0xFAB5, 0x5DB9, 0xFAB6, 0x5DD0, + 0xFAB7, 0x5F21, 0xFAB8, 0x5F34, 0xFAB9, 0x5F67, 0xFABA, 0x5FB7, + 0xFABB, 0x5FDE, 0xFABC, 0x605D, 0xFABD, 0x6085, 0xFABE, 0x608A, + 0xFABF, 0x60DE, 0xFAC0, 0x60D5, 0xFAC1, 0x6120, 0xFAC2, 0x60F2, + 0xFAC3, 0x6111, 0xFAC4, 0x6137, 0xFAC5, 0x6130, 0xFAC6, 0x6198, + 0xFAC7, 0x6213, 0xFAC8, 0x62A6, 0xFAC9, 0x63F5, 0xFACA, 0x6460, + 0xFACB, 0x649D, 0xFACC, 0x64CE, 0xFACD, 0x654E, 0xFACE, 0x6600, + 0xFACF, 0x6615, 0xFAD0, 0x663B, 0xFAD1, 0x6609, 0xFAD2, 0x662E, + 0xFAD3, 0x661E, 0xFAD4, 0x6624, 0xFAD5, 0x6665, 0xFAD6, 0x6657, + 0xFAD7, 0x6659, 0xFAD8, 0xFA12, 0xFAD9, 0x6673, 0xFADA, 0x6699, + 0xFADB, 0x66A0, 0xFADC, 0x66B2, 0xFADD, 0x66BF, 0xFADE, 0x66FA, + 0xFADF, 0x670E, 0xFAE0, 0xF929, 0xFAE1, 0x6766, 0xFAE2, 0x67BB, + 0xFAE3, 0x6852, 0xFAE4, 0x67C0, 0xFAE5, 0x6801, 0xFAE6, 0x6844, + 0xFAE7, 0x68CF, 0xFAE8, 0xFA13, 0xFAE9, 0x6968, 0xFAEA, 0xFA14, + 0xFAEB, 0x6998, 0xFAEC, 0x69E2, 0xFAED, 0x6A30, 0xFAEE, 0x6A6B, + 0xFAEF, 0x6A46, 0xFAF0, 0x6A73, 0xFAF1, 0x6A7E, 0xFAF2, 0x6AE2, + 0xFAF3, 0x6AE4, 0xFAF4, 0x6BD6, 0xFAF5, 0x6C3F, 0xFAF6, 0x6C5C, + 0xFAF7, 0x6C86, 0xFAF8, 0x6C6F, 0xFAF9, 0x6CDA, 0xFAFA, 0x6D04, + 0xFAFB, 0x6D87, 0xFAFC, 0x6D6F, 0xFB40, 0x6D96, 0xFB41, 0x6DAC, + 0xFB42, 0x6DCF, 0xFB43, 0x6DF8, 0xFB44, 0x6DF2, 0xFB45, 0x6DFC, + 0xFB46, 0x6E39, 0xFB47, 0x6E5C, 0xFB48, 0x6E27, 0xFB49, 0x6E3C, + 0xFB4A, 0x6EBF, 0xFB4B, 0x6F88, 0xFB4C, 0x6FB5, 0xFB4D, 0x6FF5, + 0xFB4E, 0x7005, 0xFB4F, 0x7007, 0xFB50, 0x7028, 0xFB51, 0x7085, + 0xFB52, 0x70AB, 0xFB53, 0x710F, 0xFB54, 0x7104, 0xFB55, 0x715C, + 0xFB56, 0x7146, 0xFB57, 0x7147, 0xFB58, 0xFA15, 0xFB59, 0x71C1, + 0xFB5A, 0x71FE, 0xFB5B, 0x72B1, 0xFB5C, 0x72BE, 0xFB5D, 0x7324, + 0xFB5E, 0xFA16, 0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9, + 0xFB62, 0x73D6, 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407, + 0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429, + 0xFB6A, 0x742E, 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F, + 0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C, + 0xFB72, 0x769E, 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17, + 0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E, + 0xFB7A, 0x7864, 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18, + 0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B, + 0xFB83, 0x799B, 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C, + 0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48, + 0xFB8B, 0x7D5C, 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6, + 0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E, + 0xFB93, 0x8301, 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7, + 0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553, + 0xFB9B, 0x8559, 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0, + 0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5, + 0xFBA3, 0x8A12, 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7, + 0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6, + 0xFBAB, 0x8B53, 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4, + 0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF, + 0xFBB3, 0xFA24, 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE, + 0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA, + 0xFBBB, 0x91D7, 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE, + 0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210, + 0xFBC3, 0x920A, 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C, + 0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239, + 0xFBCB, 0x9267, 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278, + 0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0, + 0xFBD3, 0xFA27, 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3, + 0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28, + 0xFBDB, 0x931E, 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302, + 0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6, + 0xFBE3, 0x93DE, 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445, + 0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29, + 0xFBEB, 0x969D, 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B, + 0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751, + 0xFBF3, 0x9755, 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A, + 0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E, + 0xFBFB, 0x9A4E, 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75, + 0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB, + 0xFC46, 0x9C00, 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D, + 0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0 +}; +#endif + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src <= 0x80) { /* ASCII */ + c = src; + } else { +#if !_TINY_TABLE + if (dir) { /* OEMCP to unicode */ + p = sjis2uni; + hi = sizeof(sjis2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2sjis; + hi = sizeof(uni2sjis) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; +#else + if (dir) { /* OEMCP to unicode (Incremental search)*/ + p = &uni2sjis[1]; + do { + c = *p; + p += 2; + p -= 3; + c = *p; + } while (c && c != src); + } else { /* Unicode to OEMCP */ + li = 0; hi = sizeof(uni2sjis) / 4 - 1; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == uni2sjis[i * 2]) break; + if (src > uni2sjis[i * 2]) + li = i; + else + hi = i; + } + c = n ? uni2sjis[i * 2 + 1] : 0; + } +#endif + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/2.5/bertos/fs/fatfs/option/cc936.c b/2.5/bertos/fs/fatfs/option/cc936.c new file mode 100644 index 00000000..4238d91d --- /dev/null +++ b/2.5/bertos/fs/fatfs/option/cc936.c @@ -0,0 +1,10960 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP936 (Simplified Chinese GBK) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 936 + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A4, 0xA1E8, 0x00A7, 0xA1EC, 0x00A8, 0xA1A7, 0x00B0, 0xA1E3, + 0x00B1, 0xA1C0, 0x00B7, 0xA1A4, 0x00D7, 0xA1C1, 0x00E0, 0xA8A4, + 0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA, + 0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE, + 0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9, + 0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9, + 0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1, + 0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3, + 0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8, + 0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5, + 0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1, + 0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5, + 0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9, + 0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD, + 0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1, + 0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5, + 0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1, + 0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5, + 0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9, + 0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD, + 0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1, + 0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5, + 0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7, + 0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4, + 0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9, + 0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD, + 0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1, + 0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5, + 0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9, + 0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD, + 0x042C, 0xA7BE, 0x042D, 0xA7BF, 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0xDCB1, 0x9F1A, 0xFC8D, + 0x9F1B, 0xFC8E, 0x9F1C, 0xFC8F, 0x9F1D, 0xFC90, 0x9F1E, 0xFC91, + 0x9F1F, 0xFC92, 0x9F20, 0xCAF3, 0x9F21, 0xFC93, 0x9F22, 0xF7F7, + 0x9F23, 0xFC94, 0x9F24, 0xFC95, 0x9F25, 0xFC96, 0x9F26, 0xFC97, + 0x9F27, 0xFC98, 0x9F28, 0xFC99, 0x9F29, 0xFC9A, 0x9F2A, 0xFC9B, + 0x9F2B, 0xFC9C, 0x9F2C, 0xF7F8, 0x9F2D, 0xFC9D, 0x9F2E, 0xFC9E, + 0x9F2F, 0xF7F9, 0x9F30, 0xFC9F, 0x9F31, 0xFCA0, 0x9F32, 0xFD40, + 0x9F33, 0xFD41, 0x9F34, 0xFD42, 0x9F35, 0xFD43, 0x9F36, 0xFD44, + 0x9F37, 0xF7FB, 0x9F38, 0xFD45, 0x9F39, 0xF7FA, 0x9F3A, 0xFD46, + 0x9F3B, 0xB1C7, 0x9F3C, 0xFD47, 0x9F3D, 0xF7FC, 0x9F3E, 0xF7FD, + 0x9F3F, 0xFD48, 0x9F40, 0xFD49, 0x9F41, 0xFD4A, 0x9F42, 0xFD4B, + 0x9F43, 0xFD4C, 0x9F44, 0xF7FE, 0x9F45, 0xFD4D, 0x9F46, 0xFD4E, + 0x9F47, 0xFD4F, 0x9F48, 0xFD50, 0x9F49, 0xFD51, 0x9F4A, 0xFD52, + 0x9F4B, 0xFD53, 0x9F4C, 0xFD54, 0x9F4D, 0xFD55, 0x9F4E, 0xFD56, + 0x9F4F, 0xFD57, 0x9F50, 0xC6EB, 0x9F51, 0xECB4, 0x9F52, 0xFD58, + 0x9F53, 0xFD59, 0x9F54, 0xFD5A, 0x9F55, 0xFD5B, 0x9F56, 0xFD5C, + 0x9F57, 0xFD5D, 0x9F58, 0xFD5E, 0x9F59, 0xFD5F, 0x9F5A, 0xFD60, + 0x9F5B, 0xFD61, 0x9F5C, 0xFD62, 0x9F5D, 0xFD63, 0x9F5E, 0xFD64, + 0x9F5F, 0xFD65, 0x9F60, 0xFD66, 0x9F61, 0xFD67, 0x9F62, 0xFD68, + 0x9F63, 0xFD69, 0x9F64, 0xFD6A, 0x9F65, 0xFD6B, 0x9F66, 0xFD6C, + 0x9F67, 0xFD6D, 0x9F68, 0xFD6E, 0x9F69, 0xFD6F, 0x9F6A, 0xFD70, + 0x9F6B, 0xFD71, 0x9F6C, 0xFD72, 0x9F6D, 0xFD73, 0x9F6E, 0xFD74, + 0x9F6F, 0xFD75, 0x9F70, 0xFD76, 0x9F71, 0xFD77, 0x9F72, 0xFD78, + 0x9F73, 0xFD79, 0x9F74, 0xFD7A, 0x9F75, 0xFD7B, 0x9F76, 0xFD7C, + 0x9F77, 0xFD7D, 0x9F78, 0xFD7E, 0x9F79, 0xFD80, 0x9F7A, 0xFD81, + 0x9F7B, 0xFD82, 0x9F7C, 0xFD83, 0x9F7D, 0xFD84, 0x9F7E, 0xFD85, + 0x9F7F, 0xB3DD, 0x9F80, 0xF6B3, 0x9F81, 0xFD86, 0x9F82, 0xFD87, + 0x9F83, 0xF6B4, 0x9F84, 0xC1E4, 0x9F85, 0xF6B5, 0x9F86, 0xF6B6, + 0x9F87, 0xF6B7, 0x9F88, 0xF6B8, 0x9F89, 0xF6B9, 0x9F8A, 0xF6BA, + 0x9F8B, 0xC8A3, 0x9F8C, 0xF6BB, 0x9F8D, 0xFD88, 0x9F8E, 0xFD89, + 0x9F8F, 0xFD8A, 0x9F90, 0xFD8B, 0x9F91, 0xFD8C, 0x9F92, 0xFD8D, + 0x9F93, 0xFD8E, 0x9F94, 0xFD8F, 0x9F95, 0xFD90, 0x9F96, 0xFD91, + 0x9F97, 0xFD92, 0x9F98, 0xFD93, 0x9F99, 0xC1FA, 0x9F9A, 0xB9A8, + 0x9F9B, 0xEDE8, 0x9F9C, 0xFD94, 0x9F9D, 0xFD95, 0x9F9E, 0xFD96, + 0x9F9F, 0xB9EA, 0x9FA0, 0xD9DF, 0x9FA1, 0xFD97, 0x9FA2, 0xFD98, + 0x9FA3, 0xFD99, 0x9FA4, 0xFD9A, 0x9FA5, 0xFD9B, 0xF92C, 0xFD9C, + 0xF979, 0xFD9D, 0xF995, 0xFD9E, 0xF9E7, 0xFD9F, 0xF9F1, 0xFDA0, + 0xFA0C, 0xFE40, 0xFA0D, 0xFE41, 0xFA0E, 0xFE42, 0xFA0F, 0xFE43, + 0xFA11, 0xFE44, 0xFA13, 0xFE45, 0xFA14, 0xFE46, 0xFA18, 0xFE47, + 0xFA1F, 0xFE48, 0xFA20, 0xFE49, 0xFA21, 0xFE4A, 0xFA23, 0xFE4B, + 0xFA24, 0xFE4C, 0xFA27, 0xFE4D, 0xFA28, 0xFE4E, 0xFA29, 0xFE4F, + 0xFE30, 0xA955, 0xFE31, 0xA6F2, 0xFE33, 0xA6F4, 0xFE34, 0xA6F5, + 0xFE35, 0xA6E0, 0xFE36, 0xA6E1, 0xFE37, 0xA6F0, 0xFE38, 0xA6F1, + 0xFE39, 0xA6E2, 0xFE3A, 0xA6E3, 0xFE3B, 0xA6EE, 0xFE3C, 0xA6EF, + 0xFE3D, 0xA6E6, 0xFE3E, 0xA6E7, 0xFE3F, 0xA6E4, 0xFE40, 0xA6E5, + 0xFE41, 0xA6E8, 0xFE42, 0xA6E9, 0xFE43, 0xA6EA, 0xFE44, 0xA6EB, + 0xFE49, 0xA968, 0xFE4A, 0xA969, 0xFE4B, 0xA96A, 0xFE4C, 0xA96B, + 0xFE4D, 0xA96C, 0xFE4E, 0xA96D, 0xFE4F, 0xA96E, 0xFE50, 0xA96F, + 0xFE51, 0xA970, 0xFE52, 0xA971, 0xFE54, 0xA972, 0xFE55, 0xA973, + 0xFE56, 0xA974, 0xFE57, 0xA975, 0xFE59, 0xA976, 0xFE5A, 0xA977, + 0xFE5B, 0xA978, 0xFE5C, 0xA979, 0xFE5D, 0xA97A, 0xFE5E, 0xA97B, + 0xFE5F, 0xA97C, 0xFE60, 0xA97D, 0xFE61, 0xA97E, 0xFE62, 0xA980, + 0xFE63, 0xA981, 0xFE64, 0xA982, 0xFE65, 0xA983, 0xFE66, 0xA984, + 0xFE68, 0xA985, 0xFE69, 0xA986, 0xFE6A, 0xA987, 0xFE6B, 0xA988, + 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA1E7, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, + 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, + 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, + 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, + 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, + 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, + 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, + 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, + 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, + 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, + 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, + 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA, + 0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4, + 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05, + 0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17, + 0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23, + 0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F, + 0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37, + 0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42, + 0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51, + 0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B, + 0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65, + 0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B, + 0x8167, 0x4E6C, 0x8168, 0x4E6D, 0x8169, 0x4E6E, 0x816A, 0x4E6F, + 0x816B, 0x4E72, 0x816C, 0x4E74, 0x816D, 0x4E75, 0x816E, 0x4E76, + 0x816F, 0x4E77, 0x8170, 0x4E78, 0x8171, 0x4E79, 0x8172, 0x4E7A, + 0x8173, 0x4E7B, 0x8174, 0x4E7C, 0x8175, 0x4E7D, 0x8176, 0x4E7F, + 0x8177, 0x4E80, 0x8178, 0x4E81, 0x8179, 0x4E82, 0x817A, 0x4E83, + 0x817B, 0x4E84, 0x817C, 0x4E85, 0x817D, 0x4E87, 0x817E, 0x4E8A, + 0x8180, 0x4E90, 0x8181, 0x4E96, 0x8182, 0x4E97, 0x8183, 0x4E99, + 0x8184, 0x4E9C, 0x8185, 0x4E9D, 0x8186, 0x4E9E, 0x8187, 0x4EA3, + 0x8188, 0x4EAA, 0x8189, 0x4EAF, 0x818A, 0x4EB0, 0x818B, 0x4EB1, + 0x818C, 0x4EB4, 0x818D, 0x4EB6, 0x818E, 0x4EB7, 0x818F, 0x4EB8, + 0x8190, 0x4EB9, 0x8191, 0x4EBC, 0x8192, 0x4EBD, 0x8193, 0x4EBE, + 0x8194, 0x4EC8, 0x8195, 0x4ECC, 0x8196, 0x4ECF, 0x8197, 0x4ED0, + 0x8198, 0x4ED2, 0x8199, 0x4EDA, 0x819A, 0x4EDB, 0x819B, 0x4EDC, + 0x819C, 0x4EE0, 0x819D, 0x4EE2, 0x819E, 0x4EE6, 0x819F, 0x4EE7, + 0x81A0, 0x4EE9, 0x81A1, 0x4EED, 0x81A2, 0x4EEE, 0x81A3, 0x4EEF, + 0x81A4, 0x4EF1, 0x81A5, 0x4EF4, 0x81A6, 0x4EF8, 0x81A7, 0x4EF9, + 0x81A8, 0x4EFA, 0x81A9, 0x4EFC, 0x81AA, 0x4EFE, 0x81AB, 0x4F00, + 0x81AC, 0x4F02, 0x81AD, 0x4F03, 0x81AE, 0x4F04, 0x81AF, 0x4F05, + 0x81B0, 0x4F06, 0x81B1, 0x4F07, 0x81B2, 0x4F08, 0x81B3, 0x4F0B, + 0x81B4, 0x4F0C, 0x81B5, 0x4F12, 0x81B6, 0x4F13, 0x81B7, 0x4F14, + 0x81B8, 0x4F15, 0x81B9, 0x4F16, 0x81BA, 0x4F1C, 0x81BB, 0x4F1D, + 0x81BC, 0x4F21, 0x81BD, 0x4F23, 0x81BE, 0x4F28, 0x81BF, 0x4F29, + 0x81C0, 0x4F2C, 0x81C1, 0x4F2D, 0x81C2, 0x4F2E, 0x81C3, 0x4F31, + 0x81C4, 0x4F33, 0x81C5, 0x4F35, 0x81C6, 0x4F37, 0x81C7, 0x4F39, + 0x81C8, 0x4F3B, 0x81C9, 0x4F3E, 0x81CA, 0x4F3F, 0x81CB, 0x4F40, + 0x81CC, 0x4F41, 0x81CD, 0x4F42, 0x81CE, 0x4F44, 0x81CF, 0x4F45, + 0x81D0, 0x4F47, 0x81D1, 0x4F48, 0x81D2, 0x4F49, 0x81D3, 0x4F4A, + 0x81D4, 0x4F4B, 0x81D5, 0x4F4C, 0x81D6, 0x4F52, 0x81D7, 0x4F54, + 0x81D8, 0x4F56, 0x81D9, 0x4F61, 0x81DA, 0x4F62, 0x81DB, 0x4F66, + 0x81DC, 0x4F68, 0x81DD, 0x4F6A, 0x81DE, 0x4F6B, 0x81DF, 0x4F6D, + 0x81E0, 0x4F6E, 0x81E1, 0x4F71, 0x81E2, 0x4F72, 0x81E3, 0x4F75, + 0x81E4, 0x4F77, 0x81E5, 0x4F78, 0x81E6, 0x4F79, 0x81E7, 0x4F7A, + 0x81E8, 0x4F7D, 0x81E9, 0x4F80, 0x81EA, 0x4F81, 0x81EB, 0x4F82, + 0x81EC, 0x4F85, 0x81ED, 0x4F86, 0x81EE, 0x4F87, 0x81EF, 0x4F8A, + 0x81F0, 0x4F8C, 0x81F1, 0x4F8E, 0x81F2, 0x4F90, 0x81F3, 0x4F92, + 0x81F4, 0x4F93, 0x81F5, 0x4F95, 0x81F6, 0x4F96, 0x81F7, 0x4F98, + 0x81F8, 0x4F99, 0x81F9, 0x4F9A, 0x81FA, 0x4F9C, 0x81FB, 0x4F9E, + 0x81FC, 0x4F9F, 0x81FD, 0x4FA1, 0x81FE, 0x4FA2, 0x8240, 0x4FA4, + 0x8241, 0x4FAB, 0x8242, 0x4FAD, 0x8243, 0x4FB0, 0x8244, 0x4FB1, + 0x8245, 0x4FB2, 0x8246, 0x4FB3, 0x8247, 0x4FB4, 0x8248, 0x4FB6, + 0x8249, 0x4FB7, 0x824A, 0x4FB8, 0x824B, 0x4FB9, 0x824C, 0x4FBA, + 0x824D, 0x4FBB, 0x824E, 0x4FBC, 0x824F, 0x4FBD, 0x8250, 0x4FBE, + 0x8251, 0x4FC0, 0x8252, 0x4FC1, 0x8253, 0x4FC2, 0x8254, 0x4FC6, + 0x8255, 0x4FC7, 0x8256, 0x4FC8, 0x8257, 0x4FC9, 0x8258, 0x4FCB, + 0x8259, 0x4FCC, 0x825A, 0x4FCD, 0x825B, 0x4FD2, 0x825C, 0x4FD3, + 0x825D, 0x4FD4, 0x825E, 0x4FD5, 0x825F, 0x4FD6, 0x8260, 0x4FD9, + 0x8261, 0x4FDB, 0x8262, 0x4FE0, 0x8263, 0x4FE2, 0x8264, 0x4FE4, + 0x8265, 0x4FE5, 0x8266, 0x4FE7, 0x8267, 0x4FEB, 0x8268, 0x4FEC, + 0x8269, 0x4FF0, 0x826A, 0x4FF2, 0x826B, 0x4FF4, 0x826C, 0x4FF5, + 0x826D, 0x4FF6, 0x826E, 0x4FF7, 0x826F, 0x4FF9, 0x8270, 0x4FFB, + 0x8271, 0x4FFC, 0x8272, 0x4FFD, 0x8273, 0x4FFF, 0x8274, 0x5000, + 0x8275, 0x5001, 0x8276, 0x5002, 0x8277, 0x5003, 0x8278, 0x5004, + 0x8279, 0x5005, 0x827A, 0x5006, 0x827B, 0x5007, 0x827C, 0x5008, + 0x827D, 0x5009, 0x827E, 0x500A, 0x8280, 0x500B, 0x8281, 0x500E, + 0x8282, 0x5010, 0x8283, 0x5011, 0x8284, 0x5013, 0x8285, 0x5015, + 0x8286, 0x5016, 0x8287, 0x5017, 0x8288, 0x501B, 0x8289, 0x501D, + 0x828A, 0x501E, 0x828B, 0x5020, 0x828C, 0x5022, 0x828D, 0x5023, + 0x828E, 0x5024, 0x828F, 0x5027, 0x8290, 0x502B, 0x8291, 0x502F, + 0x8292, 0x5030, 0x8293, 0x5031, 0x8294, 0x5032, 0x8295, 0x5033, + 0x8296, 0x5034, 0x8297, 0x5035, 0x8298, 0x5036, 0x8299, 0x5037, + 0x829A, 0x5038, 0x829B, 0x5039, 0x829C, 0x503B, 0x829D, 0x503D, + 0x829E, 0x503F, 0x829F, 0x5040, 0x82A0, 0x5041, 0x82A1, 0x5042, + 0x82A2, 0x5044, 0x82A3, 0x5045, 0x82A4, 0x5046, 0x82A5, 0x5049, + 0x82A6, 0x504A, 0x82A7, 0x504B, 0x82A8, 0x504D, 0x82A9, 0x5050, + 0x82AA, 0x5051, 0x82AB, 0x5052, 0x82AC, 0x5053, 0x82AD, 0x5054, + 0x82AE, 0x5056, 0x82AF, 0x5057, 0x82B0, 0x5058, 0x82B1, 0x5059, + 0x82B2, 0x505B, 0x82B3, 0x505D, 0x82B4, 0x505E, 0x82B5, 0x505F, + 0x82B6, 0x5060, 0x82B7, 0x5061, 0x82B8, 0x5062, 0x82B9, 0x5063, + 0x82BA, 0x5064, 0x82BB, 0x5066, 0x82BC, 0x5067, 0x82BD, 0x5068, + 0x82BE, 0x5069, 0x82BF, 0x506A, 0x82C0, 0x506B, 0x82C1, 0x506D, + 0x82C2, 0x506E, 0x82C3, 0x506F, 0x82C4, 0x5070, 0x82C5, 0x5071, + 0x82C6, 0x5072, 0x82C7, 0x5073, 0x82C8, 0x5074, 0x82C9, 0x5075, + 0x82CA, 0x5078, 0x82CB, 0x5079, 0x82CC, 0x507A, 0x82CD, 0x507C, + 0x82CE, 0x507D, 0x82CF, 0x5081, 0x82D0, 0x5082, 0x82D1, 0x5083, + 0x82D2, 0x5084, 0x82D3, 0x5086, 0x82D4, 0x5087, 0x82D5, 0x5089, + 0x82D6, 0x508A, 0x82D7, 0x508B, 0x82D8, 0x508C, 0x82D9, 0x508E, + 0x82DA, 0x508F, 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0xF88F, 0x9D31, 0xF890, 0x9D32, + 0xF891, 0x9D33, 0xF892, 0x9D34, 0xF893, 0x9D35, 0xF894, 0x9D36, + 0xF895, 0x9D37, 0xF896, 0x9D38, 0xF897, 0x9D39, 0xF898, 0x9D3A, + 0xF899, 0x9D3B, 0xF89A, 0x9D3C, 0xF89B, 0x9D3D, 0xF89C, 0x9D3E, + 0xF89D, 0x9D3F, 0xF89E, 0x9D40, 0xF89F, 0x9D41, 0xF8A0, 0x9D42, + 0xF940, 0x9D43, 0xF941, 0x9D44, 0xF942, 0x9D45, 0xF943, 0x9D46, + 0xF944, 0x9D47, 0xF945, 0x9D48, 0xF946, 0x9D49, 0xF947, 0x9D4A, + 0xF948, 0x9D4B, 0xF949, 0x9D4C, 0xF94A, 0x9D4D, 0xF94B, 0x9D4E, + 0xF94C, 0x9D4F, 0xF94D, 0x9D50, 0xF94E, 0x9D51, 0xF94F, 0x9D52, + 0xF950, 0x9D53, 0xF951, 0x9D54, 0xF952, 0x9D55, 0xF953, 0x9D56, + 0xF954, 0x9D57, 0xF955, 0x9D58, 0xF956, 0x9D59, 0xF957, 0x9D5A, + 0xF958, 0x9D5B, 0xF959, 0x9D5C, 0xF95A, 0x9D5D, 0xF95B, 0x9D5E, + 0xF95C, 0x9D5F, 0xF95D, 0x9D60, 0xF95E, 0x9D61, 0xF95F, 0x9D62, + 0xF960, 0x9D63, 0xF961, 0x9D64, 0xF962, 0x9D65, 0xF963, 0x9D66, + 0xF964, 0x9D67, 0xF965, 0x9D68, 0xF966, 0x9D69, 0xF967, 0x9D6A, + 0xF968, 0x9D6B, 0xF969, 0x9D6C, 0xF96A, 0x9D6D, 0xF96B, 0x9D6E, + 0xF96C, 0x9D6F, 0xF96D, 0x9D70, 0xF96E, 0x9D71, 0xF96F, 0x9D72, + 0xF970, 0x9D73, 0xF971, 0x9D74, 0xF972, 0x9D75, 0xF973, 0x9D76, + 0xF974, 0x9D77, 0xF975, 0x9D78, 0xF976, 0x9D79, 0xF977, 0x9D7A, + 0xF978, 0x9D7B, 0xF979, 0x9D7C, 0xF97A, 0x9D7D, 0xF97B, 0x9D7E, + 0xF97C, 0x9D7F, 0xF97D, 0x9D80, 0xF97E, 0x9D81, 0xF980, 0x9D82, + 0xF981, 0x9D83, 0xF982, 0x9D84, 0xF983, 0x9D85, 0xF984, 0x9D86, + 0xF985, 0x9D87, 0xF986, 0x9D88, 0xF987, 0x9D89, 0xF988, 0x9D8A, + 0xF989, 0x9D8B, 0xF98A, 0x9D8C, 0xF98B, 0x9D8D, 0xF98C, 0x9D8E, + 0xF98D, 0x9D8F, 0xF98E, 0x9D90, 0xF98F, 0x9D91, 0xF990, 0x9D92, + 0xF991, 0x9D93, 0xF992, 0x9D94, 0xF993, 0x9D95, 0xF994, 0x9D96, + 0xF995, 0x9D97, 0xF996, 0x9D98, 0xF997, 0x9D99, 0xF998, 0x9D9A, + 0xF999, 0x9D9B, 0xF99A, 0x9D9C, 0xF99B, 0x9D9D, 0xF99C, 0x9D9E, + 0xF99D, 0x9D9F, 0xF99E, 0x9DA0, 0xF99F, 0x9DA1, 0xF9A0, 0x9DA2, + 0xFA40, 0x9DA3, 0xFA41, 0x9DA4, 0xFA42, 0x9DA5, 0xFA43, 0x9DA6, + 0xFA44, 0x9DA7, 0xFA45, 0x9DA8, 0xFA46, 0x9DA9, 0xFA47, 0x9DAA, + 0xFA48, 0x9DAB, 0xFA49, 0x9DAC, 0xFA4A, 0x9DAD, 0xFA4B, 0x9DAE, + 0xFA4C, 0x9DAF, 0xFA4D, 0x9DB0, 0xFA4E, 0x9DB1, 0xFA4F, 0x9DB2, + 0xFA50, 0x9DB3, 0xFA51, 0x9DB4, 0xFA52, 0x9DB5, 0xFA53, 0x9DB6, + 0xFA54, 0x9DB7, 0xFA55, 0x9DB8, 0xFA56, 0x9DB9, 0xFA57, 0x9DBA, + 0xFA58, 0x9DBB, 0xFA59, 0x9DBC, 0xFA5A, 0x9DBD, 0xFA5B, 0x9DBE, + 0xFA5C, 0x9DBF, 0xFA5D, 0x9DC0, 0xFA5E, 0x9DC1, 0xFA5F, 0x9DC2, + 0xFA60, 0x9DC3, 0xFA61, 0x9DC4, 0xFA62, 0x9DC5, 0xFA63, 0x9DC6, + 0xFA64, 0x9DC7, 0xFA65, 0x9DC8, 0xFA66, 0x9DC9, 0xFA67, 0x9DCA, + 0xFA68, 0x9DCB, 0xFA69, 0x9DCC, 0xFA6A, 0x9DCD, 0xFA6B, 0x9DCE, + 0xFA6C, 0x9DCF, 0xFA6D, 0x9DD0, 0xFA6E, 0x9DD1, 0xFA6F, 0x9DD2, + 0xFA70, 0x9DD3, 0xFA71, 0x9DD4, 0xFA72, 0x9DD5, 0xFA73, 0x9DD6, + 0xFA74, 0x9DD7, 0xFA75, 0x9DD8, 0xFA76, 0x9DD9, 0xFA77, 0x9DDA, + 0xFA78, 0x9DDB, 0xFA79, 0x9DDC, 0xFA7A, 0x9DDD, 0xFA7B, 0x9DDE, + 0xFA7C, 0x9DDF, 0xFA7D, 0x9DE0, 0xFA7E, 0x9DE1, 0xFA80, 0x9DE2, + 0xFA81, 0x9DE3, 0xFA82, 0x9DE4, 0xFA83, 0x9DE5, 0xFA84, 0x9DE6, + 0xFA85, 0x9DE7, 0xFA86, 0x9DE8, 0xFA87, 0x9DE9, 0xFA88, 0x9DEA, + 0xFA89, 0x9DEB, 0xFA8A, 0x9DEC, 0xFA8B, 0x9DED, 0xFA8C, 0x9DEE, + 0xFA8D, 0x9DEF, 0xFA8E, 0x9DF0, 0xFA8F, 0x9DF1, 0xFA90, 0x9DF2, + 0xFA91, 0x9DF3, 0xFA92, 0x9DF4, 0xFA93, 0x9DF5, 0xFA94, 0x9DF6, + 0xFA95, 0x9DF7, 0xFA96, 0x9DF8, 0xFA97, 0x9DF9, 0xFA98, 0x9DFA, + 0xFA99, 0x9DFB, 0xFA9A, 0x9DFC, 0xFA9B, 0x9DFD, 0xFA9C, 0x9DFE, + 0xFA9D, 0x9DFF, 0xFA9E, 0x9E00, 0xFA9F, 0x9E01, 0xFAA0, 0x9E02, + 0xFB40, 0x9E03, 0xFB41, 0x9E04, 0xFB42, 0x9E05, 0xFB43, 0x9E06, + 0xFB44, 0x9E07, 0xFB45, 0x9E08, 0xFB46, 0x9E09, 0xFB47, 0x9E0A, + 0xFB48, 0x9E0B, 0xFB49, 0x9E0C, 0xFB4A, 0x9E0D, 0xFB4B, 0x9E0E, + 0xFB4C, 0x9E0F, 0xFB4D, 0x9E10, 0xFB4E, 0x9E11, 0xFB4F, 0x9E12, + 0xFB50, 0x9E13, 0xFB51, 0x9E14, 0xFB52, 0x9E15, 0xFB53, 0x9E16, + 0xFB54, 0x9E17, 0xFB55, 0x9E18, 0xFB56, 0x9E19, 0xFB57, 0x9E1A, + 0xFB58, 0x9E1B, 0xFB59, 0x9E1C, 0xFB5A, 0x9E1D, 0xFB5B, 0x9E1E, + 0xFB5C, 0x9E24, 0xFB5D, 0x9E27, 0xFB5E, 0x9E2E, 0xFB5F, 0x9E30, + 0xFB60, 0x9E34, 0xFB61, 0x9E3B, 0xFB62, 0x9E3C, 0xFB63, 0x9E40, + 0xFB64, 0x9E4D, 0xFB65, 0x9E50, 0xFB66, 0x9E52, 0xFB67, 0x9E53, + 0xFB68, 0x9E54, 0xFB69, 0x9E56, 0xFB6A, 0x9E59, 0xFB6B, 0x9E5D, + 0xFB6C, 0x9E5F, 0xFB6D, 0x9E60, 0xFB6E, 0x9E61, 0xFB6F, 0x9E62, + 0xFB70, 0x9E65, 0xFB71, 0x9E6E, 0xFB72, 0x9E6F, 0xFB73, 0x9E72, + 0xFB74, 0x9E74, 0xFB75, 0x9E75, 0xFB76, 0x9E76, 0xFB77, 0x9E77, + 0xFB78, 0x9E78, 0xFB79, 0x9E79, 0xFB7A, 0x9E7A, 0xFB7B, 0x9E7B, + 0xFB7C, 0x9E7C, 0xFB7D, 0x9E7D, 0xFB7E, 0x9E80, 0xFB80, 0x9E81, + 0xFB81, 0x9E83, 0xFB82, 0x9E84, 0xFB83, 0x9E85, 0xFB84, 0x9E86, + 0xFB85, 0x9E89, 0xFB86, 0x9E8A, 0xFB87, 0x9E8C, 0xFB88, 0x9E8D, + 0xFB89, 0x9E8E, 0xFB8A, 0x9E8F, 0xFB8B, 0x9E90, 0xFB8C, 0x9E91, + 0xFB8D, 0x9E94, 0xFB8E, 0x9E95, 0xFB8F, 0x9E96, 0xFB90, 0x9E97, + 0xFB91, 0x9E98, 0xFB92, 0x9E99, 0xFB93, 0x9E9A, 0xFB94, 0x9E9B, + 0xFB95, 0x9E9C, 0xFB96, 0x9E9E, 0xFB97, 0x9EA0, 0xFB98, 0x9EA1, + 0xFB99, 0x9EA2, 0xFB9A, 0x9EA3, 0xFB9B, 0x9EA4, 0xFB9C, 0x9EA5, + 0xFB9D, 0x9EA7, 0xFB9E, 0x9EA8, 0xFB9F, 0x9EA9, 0xFBA0, 0x9EAA, + 0xFC40, 0x9EAB, 0xFC41, 0x9EAC, 0xFC42, 0x9EAD, 0xFC43, 0x9EAE, + 0xFC44, 0x9EAF, 0xFC45, 0x9EB0, 0xFC46, 0x9EB1, 0xFC47, 0x9EB2, + 0xFC48, 0x9EB3, 0xFC49, 0x9EB5, 0xFC4A, 0x9EB6, 0xFC4B, 0x9EB7, + 0xFC4C, 0x9EB9, 0xFC4D, 0x9EBA, 0xFC4E, 0x9EBC, 0xFC4F, 0x9EBF, + 0xFC50, 0x9EC0, 0xFC51, 0x9EC1, 0xFC52, 0x9EC2, 0xFC53, 0x9EC3, + 0xFC54, 0x9EC5, 0xFC55, 0x9EC6, 0xFC56, 0x9EC7, 0xFC57, 0x9EC8, + 0xFC58, 0x9ECA, 0xFC59, 0x9ECB, 0xFC5A, 0x9ECC, 0xFC5B, 0x9ED0, + 0xFC5C, 0x9ED2, 0xFC5D, 0x9ED3, 0xFC5E, 0x9ED5, 0xFC5F, 0x9ED6, + 0xFC60, 0x9ED7, 0xFC61, 0x9ED9, 0xFC62, 0x9EDA, 0xFC63, 0x9EDE, + 0xFC64, 0x9EE1, 0xFC65, 0x9EE3, 0xFC66, 0x9EE4, 0xFC67, 0x9EE6, + 0xFC68, 0x9EE8, 0xFC69, 0x9EEB, 0xFC6A, 0x9EEC, 0xFC6B, 0x9EED, + 0xFC6C, 0x9EEE, 0xFC6D, 0x9EF0, 0xFC6E, 0x9EF1, 0xFC6F, 0x9EF2, + 0xFC70, 0x9EF3, 0xFC71, 0x9EF4, 0xFC72, 0x9EF5, 0xFC73, 0x9EF6, + 0xFC74, 0x9EF7, 0xFC75, 0x9EF8, 0xFC76, 0x9EFA, 0xFC77, 0x9EFD, + 0xFC78, 0x9EFF, 0xFC79, 0x9F00, 0xFC7A, 0x9F01, 0xFC7B, 0x9F02, + 0xFC7C, 0x9F03, 0xFC7D, 0x9F04, 0xFC7E, 0x9F05, 0xFC80, 0x9F06, + 0xFC81, 0x9F07, 0xFC82, 0x9F08, 0xFC83, 0x9F09, 0xFC84, 0x9F0A, + 0xFC85, 0x9F0C, 0xFC86, 0x9F0F, 0xFC87, 0x9F11, 0xFC88, 0x9F12, + 0xFC89, 0x9F14, 0xFC8A, 0x9F15, 0xFC8B, 0x9F16, 0xFC8C, 0x9F18, + 0xFC8D, 0x9F1A, 0xFC8E, 0x9F1B, 0xFC8F, 0x9F1C, 0xFC90, 0x9F1D, + 0xFC91, 0x9F1E, 0xFC92, 0x9F1F, 0xFC93, 0x9F21, 0xFC94, 0x9F23, + 0xFC95, 0x9F24, 0xFC96, 0x9F25, 0xFC97, 0x9F26, 0xFC98, 0x9F27, + 0xFC99, 0x9F28, 0xFC9A, 0x9F29, 0xFC9B, 0x9F2A, 0xFC9C, 0x9F2B, + 0xFC9D, 0x9F2D, 0xFC9E, 0x9F2E, 0xFC9F, 0x9F30, 0xFCA0, 0x9F31, + 0xFD40, 0x9F32, 0xFD41, 0x9F33, 0xFD42, 0x9F34, 0xFD43, 0x9F35, + 0xFD44, 0x9F36, 0xFD45, 0x9F38, 0xFD46, 0x9F3A, 0xFD47, 0x9F3C, + 0xFD48, 0x9F3F, 0xFD49, 0x9F40, 0xFD4A, 0x9F41, 0xFD4B, 0x9F42, + 0xFD4C, 0x9F43, 0xFD4D, 0x9F45, 0xFD4E, 0x9F46, 0xFD4F, 0x9F47, + 0xFD50, 0x9F48, 0xFD51, 0x9F49, 0xFD52, 0x9F4A, 0xFD53, 0x9F4B, + 0xFD54, 0x9F4C, 0xFD55, 0x9F4D, 0xFD56, 0x9F4E, 0xFD57, 0x9F4F, + 0xFD58, 0x9F52, 0xFD59, 0x9F53, 0xFD5A, 0x9F54, 0xFD5B, 0x9F55, + 0xFD5C, 0x9F56, 0xFD5D, 0x9F57, 0xFD5E, 0x9F58, 0xFD5F, 0x9F59, + 0xFD60, 0x9F5A, 0xFD61, 0x9F5B, 0xFD62, 0x9F5C, 0xFD63, 0x9F5D, + 0xFD64, 0x9F5E, 0xFD65, 0x9F5F, 0xFD66, 0x9F60, 0xFD67, 0x9F61, + 0xFD68, 0x9F62, 0xFD69, 0x9F63, 0xFD6A, 0x9F64, 0xFD6B, 0x9F65, + 0xFD6C, 0x9F66, 0xFD6D, 0x9F67, 0xFD6E, 0x9F68, 0xFD6F, 0x9F69, + 0xFD70, 0x9F6A, 0xFD71, 0x9F6B, 0xFD72, 0x9F6C, 0xFD73, 0x9F6D, + 0xFD74, 0x9F6E, 0xFD75, 0x9F6F, 0xFD76, 0x9F70, 0xFD77, 0x9F71, + 0xFD78, 0x9F72, 0xFD79, 0x9F73, 0xFD7A, 0x9F74, 0xFD7B, 0x9F75, + 0xFD7C, 0x9F76, 0xFD7D, 0x9F77, 0xFD7E, 0x9F78, 0xFD80, 0x9F79, + 0xFD81, 0x9F7A, 0xFD82, 0x9F7B, 0xFD83, 0x9F7C, 0xFD84, 0x9F7D, + 0xFD85, 0x9F7E, 0xFD86, 0x9F81, 0xFD87, 0x9F82, 0xFD88, 0x9F8D, + 0xFD89, 0x9F8E, 0xFD8A, 0x9F8F, 0xFD8B, 0x9F90, 0xFD8C, 0x9F91, + 0xFD8D, 0x9F92, 0xFD8E, 0x9F93, 0xFD8F, 0x9F94, 0xFD90, 0x9F95, + 0xFD91, 0x9F96, 0xFD92, 0x9F97, 0xFD93, 0x9F98, 0xFD94, 0x9F9C, + 0xFD95, 0x9F9D, 0xFD96, 0x9F9E, 0xFD97, 0x9FA1, 0xFD98, 0x9FA2, + 0xFD99, 0x9FA3, 0xFD9A, 0x9FA4, 0xFD9B, 0x9FA5, 0xFD9C, 0xF92C, + 0xFD9D, 0xF979, 0xFD9E, 0xF995, 0xFD9F, 0xF9E7, 0xFDA0, 0xF9F1, + 0xFE40, 0xFA0C, 0xFE41, 0xFA0D, 0xFE42, 0xFA0E, 0xFE43, 0xFA0F, + 0xFE44, 0xFA11, 0xFE45, 0xFA13, 0xFE46, 0xFA14, 0xFE47, 0xFA18, + 0xFE48, 0xFA1F, 0xFE49, 0xFA20, 0xFE4A, 0xFA21, 0xFE4B, 0xFA23, + 0xFE4C, 0xFA24, 0xFE4D, 0xFA27, 0xFE4E, 0xFA28, 0xFE4F, 0xFA29, + 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/2.5/bertos/fs/fatfs/option/cc949.c b/2.5/bertos/fs/fatfs/option/cc949.c new file mode 100644 index 00000000..89679854 --- /dev/null +++ b/2.5/bertos/fs/fatfs/option/cc949.c @@ -0,0 +1,8588 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP949 (Korean) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 949 + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A1, 0xA2AE, 0x00A4, 0xA2B4, 0x00A7, 0xA1D7, 0x00A8, 0xA1A7, + 0x00AA, 0xA8A3, 0x00AD, 0xA1A9, 0x00AE, 0xA2E7, 0x00B0, 0xA1C6, + 0x00B1, 0xA1BE, 0x00B2, 0xA9F7, 0x00B3, 0xA9F8, 0x00B4, 0xA2A5, + 0x00B6, 0xA2D2, 0x00B7, 0xA1A4, 0x00B8, 0xA2AC, 0x00B9, 0xA9F6, + 0x00BA, 0xA8AC, 0x00BC, 0xA8F9, 0x00BD, 0xA8F6, 0x00BE, 0xA8FA, + 0x00BF, 0xA2AF, 0x00C6, 0xA8A1, 0x00D0, 0xA8A2, 0x00D7, 0xA1BF, + 0x00D8, 0xA8AA, 0x00DE, 0xA8AD, 0x00DF, 0xA9AC, 0x00E6, 0xA9A1, + 0x00F0, 0xA9A3, 0x00F7, 0xA1C0, 0x00F8, 0xA9AA, 0x00FE, 0xA9AD, + 0x0111, 0xA9A2, 0x0126, 0xA8A4, 0x0127, 0xA9A4, 0x0131, 0xA9A5, + 0x0132, 0xA8A6, 0x0133, 0xA9A6, 0x0138, 0xA9A7, 0x013F, 0xA8A8, + 0x0140, 0xA9A8, 0x0141, 0xA8A9, 0x0142, 0xA9A9, 0x0149, 0xA9B0, + 0x014A, 0xA8AF, 0x014B, 0xA9AF, 0x0152, 0xA8AB, 0x0153, 0xA9AB, + 0x0166, 0xA8AE, 0x0167, 0xA9AE, 0x02C7, 0xA2A7, 0x02D0, 0xA2B0, + 0x02D8, 0xA2A8, 0x02D9, 0xA2AB, 0x02DA, 0xA2AA, 0x02DB, 0xA2AD, + 0x02DD, 0xA2A9, 0x0391, 0xA5C1, 0x0392, 0xA5C2, 0x0393, 0xA5C3, + 0x0394, 0xA5C4, 0x0395, 0xA5C5, 0x0396, 0xA5C6, 0x0397, 0xA5C7, + 0x0398, 0xA5C8, 0x0399, 0xA5C9, 0x039A, 0xA5CA, 0x039B, 0xA5CB, + 0x039C, 0xA5CC, 0x039D, 0xA5CD, 0x039E, 0xA5CE, 0x039F, 0xA5CF, + 0x03A0, 0xA5D0, 0x03A1, 0xA5D1, 0x03A3, 0xA5D2, 0x03A4, 0xA5D3, + 0x03A5, 0xA5D4, 0x03A6, 0xA5D5, 0x03A7, 0xA5D6, 0x03A8, 0xA5D7, + 0x03A9, 0xA5D8, 0x03B1, 0xA5E1, 0x03B2, 0xA5E2, 0x03B3, 0xA5E3, + 0x03B4, 0xA5E4, 0x03B5, 0xA5E5, 0x03B6, 0xA5E6, 0x03B7, 0xA5E7, + 0x03B8, 0xA5E8, 0x03B9, 0xA5E9, 0x03BA, 0xA5EA, 0x03BB, 0xA5EB, + 0x03BC, 0xA5EC, 0x03BD, 0xA5ED, 0x03BE, 0xA5EE, 0x03BF, 0xA5EF, + 0x03C0, 0xA5F0, 0x03C1, 0xA5F1, 0x03C3, 0xA5F2, 0x03C4, 0xA5F3, + 0x03C5, 0xA5F4, 0x03C6, 0xA5F5, 0x03C7, 0xA5F6, 0x03C8, 0xA5F7, + 0x03C9, 0xA5F8, 0x0401, 0xACA7, 0x0410, 0xACA1, 0x0411, 0xACA2, + 0x0412, 0xACA3, 0x0413, 0xACA4, 0x0414, 0xACA5, 0x0415, 0xACA6, + 0x0416, 0xACA8, 0x0417, 0xACA9, 0x0418, 0xACAA, 0x0419, 0xACAB, + 0x041A, 0xACAC, 0x041B, 0xACAD, 0x041C, 0xACAE, 0x041D, 0xACAF, + 0x041E, 0xACB0, 0x041F, 0xACB1, 0x0420, 0xACB2, 0x0421, 0xACB3, + 0x0422, 0xACB4, 0x0423, 0xACB5, 0x0424, 0xACB6, 0x0425, 0xACB7, + 0x0426, 0xACB8, 0x0427, 0xACB9, 0x0428, 0xACBA, 0x0429, 0xACBB, + 0x042A, 0xACBC, 0x042B, 0xACBD, 0x042C, 0xACBE, 0x042D, 0xACBF, + 0x042E, 0xACC0, 0x042F, 0xACC1, 0x0430, 0xACD1, 0x0431, 0xACD2, + 0x0432, 0xACD3, 0x0433, 0xACD4, 0x0434, 0xACD5, 0x0435, 0xACD6, + 0x0436, 0xACD8, 0x0437, 0xACD9, 0x0438, 0xACDA, 0x0439, 0xACDB, + 0x043A, 0xACDC, 0x043B, 0xACDD, 0x043C, 0xACDE, 0x043D, 0xACDF, + 0x043E, 0xACE0, 0x043F, 0xACE1, 0x0440, 0xACE2, 0x0441, 0xACE3, + 0x0442, 0xACE4, 0x0443, 0xACE5, 0x0444, 0xACE6, 0x0445, 0xACE7, + 0x0446, 0xACE8, 0x0447, 0xACE9, 0x0448, 0xACEA, 0x0449, 0xACEB, + 0x044A, 0xACEC, 0x044B, 0xACED, 0x044C, 0xACEE, 0x044D, 0xACEF, + 0x044E, 0xACF0, 0x044F, 0xACF1, 0x0451, 0xACD7, 0x2015, 0xA1AA, + 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, + 0x2020, 0xA2D3, 0x2021, 0xA2D4, 0x2025, 0xA1A5, 0x2026, 0xA1A6, + 0x2030, 0xA2B6, 0x2032, 0xA1C7, 0x2033, 0xA1C8, 0x203B, 0xA1D8, + 0x2074, 0xA9F9, 0x207F, 0xA9FA, 0x2081, 0xA9FB, 0x2082, 0xA9FC, + 0x2083, 0xA9FD, 0x2084, 0xA9FE, 0x20AC, 0xA2E6, 0x2103, 0xA1C9, + 0x2109, 0xA2B5, 0x2113, 0xA7A4, 0x2116, 0xA2E0, 0x2121, 0xA2E5, + 0x2122, 0xA2E2, 0x2126, 0xA7D9, 0x212B, 0xA1CA, 0x2153, 0xA8F7, + 0x2154, 0xA8F8, 0x215B, 0xA8FB, 0x215C, 0xA8FC, 0x215D, 0xA8FD, + 0x215E, 0xA8FE, 0x2160, 0xA5B0, 0x2161, 0xA5B1, 0x2162, 0xA5B2, + 0x2163, 0xA5B3, 0x2164, 0xA5B4, 0x2165, 0xA5B5, 0x2166, 0xA5B6, + 0x2167, 0xA5B7, 0x2168, 0xA5B8, 0x2169, 0xA5B9, 0x2170, 0xA5A1, + 0x2171, 0xA5A2, 0x2172, 0xA5A3, 0x2173, 0xA5A4, 0x2174, 0xA5A5, + 0x2175, 0xA5A6, 0x2176, 0xA5A7, 0x2177, 0xA5A8, 0x2178, 0xA5A9, + 0x2179, 0xA5AA, 0x2190, 0xA1E7, 0x2191, 0xA1E8, 0x2192, 0xA1E6, + 0x2193, 0xA1E9, 0x2194, 0xA1EA, 0x2195, 0xA2D5, 0x2196, 0xA2D8, + 0x2197, 0xA2D6, 0x2198, 0xA2D9, 0x2199, 0xA2D7, 0x21D2, 0xA2A1, + 0x21D4, 0xA2A2, 0x2200, 0xA2A3, 0x2202, 0xA1D3, 0x2203, 0xA2A4, + 0x2207, 0xA1D4, 0x2208, 0xA1F4, 0x220B, 0xA1F5, 0x220F, 0xA2B3, + 0x2211, 0xA2B2, 0x221A, 0xA1EE, 0x221D, 0xA1F0, 0x221E, 0xA1C4, + 0x2220, 0xA1D0, 0x2225, 0xA1AB, 0x2227, 0xA1FC, 0x2228, 0xA1FD, + 0x2229, 0xA1FB, 0x222A, 0xA1FA, 0x222B, 0xA1F2, 0x222C, 0xA1F3, + 0x222E, 0xA2B1, 0x2234, 0xA1C5, 0x2235, 0xA1F1, 0x223C, 0xA1AD, + 0x223D, 0xA1EF, 0x2252, 0xA1D6, 0x2260, 0xA1C1, 0x2261, 0xA1D5, + 0x2264, 0xA1C2, 0x2265, 0xA1C3, 0x226A, 0xA1EC, 0x226B, 0xA1ED, + 0x2282, 0xA1F8, 0x2283, 0xA1F9, 0x2286, 0xA1F6, 0x2287, 0xA1F7, + 0x2299, 0xA2C1, 0x22A5, 0xA1D1, 0x2312, 0xA1D2, 0x2460, 0xA8E7, + 0x2461, 0xA8E8, 0x2462, 0xA8E9, 0x2463, 0xA8EA, 0x2464, 0xA8EB, + 0x2465, 0xA8EC, 0x2466, 0xA8ED, 0x2467, 0xA8EE, 0x2468, 0xA8EF, + 0x2469, 0xA8F0, 0x246A, 0xA8F1, 0x246B, 0xA8F2, 0x246C, 0xA8F3, + 0x246D, 0xA8F4, 0x246E, 0xA8F5, 0x2474, 0xA9E7, 0x2475, 0xA9E8, + 0x2476, 0xA9E9, 0x2477, 0xA9EA, 0x2478, 0xA9EB, 0x2479, 0xA9EC, + 0x247A, 0xA9ED, 0x247B, 0xA9EE, 0x247C, 0xA9EF, 0x247D, 0xA9F0, + 0x247E, 0xA9F1, 0x247F, 0xA9F2, 0x2480, 0xA9F3, 0x2481, 0xA9F4, + 0x2482, 0xA9F5, 0x249C, 0xA9CD, 0x249D, 0xA9CE, 0x249E, 0xA9CF, + 0x249F, 0xA9D0, 0x24A0, 0xA9D1, 0x24A1, 0xA9D2, 0x24A2, 0xA9D3, + 0x24A3, 0xA9D4, 0x24A4, 0xA9D5, 0x24A5, 0xA9D6, 0x24A6, 0xA9D7, + 0x24A7, 0xA9D8, 0x24A8, 0xA9D9, 0x24A9, 0xA9DA, 0x24AA, 0xA9DB, + 0x24AB, 0xA9DC, 0x24AC, 0xA9DD, 0x24AD, 0xA9DE, 0x24AE, 0xA9DF, + 0x24AF, 0xA9E0, 0x24B0, 0xA9E1, 0x24B1, 0xA9E2, 0x24B2, 0xA9E3, + 0x24B3, 0xA9E4, 0x24B4, 0xA9E5, 0x24B5, 0xA9E6, 0x24D0, 0xA8CD, + 0x24D1, 0xA8CE, 0x24D2, 0xA8CF, 0x24D3, 0xA8D0, 0x24D4, 0xA8D1, + 0x24D5, 0xA8D2, 0x24D6, 0xA8D3, 0x24D7, 0xA8D4, 0x24D8, 0xA8D5, + 0x24D9, 0xA8D6, 0x24DA, 0xA8D7, 0x24DB, 0xA8D8, 0x24DC, 0xA8D9, + 0x24DD, 0xA8DA, 0x24DE, 0xA8DB, 0x24DF, 0xA8DC, 0x24E0, 0xA8DD, + 0x24E1, 0xA8DE, 0x24E2, 0xA8DF, 0x24E3, 0xA8E0, 0x24E4, 0xA8E1, + 0x24E5, 0xA8E2, 0x24E6, 0xA8E3, 0x24E7, 0xA8E4, 0x24E8, 0xA8E5, + 0x24E9, 0xA8E6, 0x2500, 0xA6A1, 0x2501, 0xA6AC, 0x2502, 0xA6A2, + 0x2503, 0xA6AD, 0x250C, 0xA6A3, 0x250D, 0xA6C8, 0x250E, 0xA6C7, + 0x250F, 0xA6AE, 0x2510, 0xA6A4, 0x2511, 0xA6C2, 0x2512, 0xA6C1, + 0x2513, 0xA6AF, 0x2514, 0xA6A6, 0x2515, 0xA6C6, 0x2516, 0xA6C5, + 0x2517, 0xA6B1, 0x2518, 0xA6A5, 0x2519, 0xA6C4, 0x251A, 0xA6C3, + 0x251B, 0xA6B0, 0x251C, 0xA6A7, 0x251D, 0xA6BC, 0x251E, 0xA6C9, + 0x251F, 0xA6CA, 0x2520, 0xA6B7, 0x2521, 0xA6CB, 0x2522, 0xA6CC, + 0x2523, 0xA6B2, 0x2524, 0xA6A9, 0x2525, 0xA6BE, 0x2526, 0xA6CD, + 0x2527, 0xA6CE, 0x2528, 0xA6B9, 0x2529, 0xA6CF, 0x252A, 0xA6D0, + 0x252B, 0xA6B4, 0x252C, 0xA6A8, 0x252D, 0xA6D1, 0x252E, 0xA6D2, + 0x252F, 0xA6B8, 0x2530, 0xA6BD, 0x2531, 0xA6D3, 0x2532, 0xA6D4, + 0x2533, 0xA6B3, 0x2534, 0xA6AA, 0x2535, 0xA6D5, 0x2536, 0xA6D6, + 0x2537, 0xA6BA, 0x2538, 0xA6BF, 0x2539, 0xA6D7, 0x253A, 0xA6D8, + 0x253B, 0xA6B5, 0x253C, 0xA6AB, 0x253D, 0xA6D9, 0x253E, 0xA6DA, + 0x253F, 0xA6BB, 0x2540, 0xA6DB, 0x2541, 0xA6DC, 0x2542, 0xA6C0, + 0x2543, 0xA6DD, 0x2544, 0xA6DE, 0x2545, 0xA6DF, 0x2546, 0xA6E0, + 0x2547, 0xA6E1, 0x2548, 0xA6E2, 0x2549, 0xA6E3, 0x254A, 0xA6E4, + 0x254B, 0xA6B6, 0x2592, 0xA2C6, 0x25A0, 0xA1E1, 0x25A1, 0xA1E0, + 0x25A3, 0xA2C3, 0x25A4, 0xA2C7, 0x25A5, 0xA2C8, 0x25A6, 0xA2CB, + 0x25A7, 0xA2CA, 0x25A8, 0xA2C9, 0x25A9, 0xA2CC, 0x25B2, 0xA1E3, + 0x25B3, 0xA1E2, 0x25B6, 0xA2BA, 0x25B7, 0xA2B9, 0x25BC, 0xA1E5, + 0x25BD, 0xA1E4, 0x25C0, 0xA2B8, 0x25C1, 0xA2B7, 0x25C6, 0xA1DF, + 0x25C7, 0xA1DE, 0x25C8, 0xA2C2, 0x25CB, 0xA1DB, 0x25CE, 0xA1DD, + 0x25CF, 0xA1DC, 0x25D0, 0xA2C4, 0x25D1, 0xA2C5, 0x2605, 0xA1DA, + 0x2606, 0xA1D9, 0x260E, 0xA2CF, 0x260F, 0xA2CE, 0x261C, 0xA2D0, + 0x261E, 0xA2D1, 0x2640, 0xA1CF, 0x2642, 0xA1CE, 0x2660, 0xA2BC, + 0x2661, 0xA2BD, 0x2663, 0xA2C0, 0x2664, 0xA2BB, 0x2665, 0xA2BE, + 0x2667, 0xA2BF, 0x2668, 0xA2CD, 0x2669, 0xA2DB, 0x266A, 0xA2DC, + 0x266C, 0xA2DD, 0x266D, 0xA2DA, 0x3000, 0xA1A1, 0x3001, 0xA1A2, + 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3008, 0xA1B4, 0x3009, 0xA1B5, + 0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9, + 0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BC, 0x3011, 0xA1BD, + 0x3013, 0xA1EB, 0x3014, 0xA1B2, 0x3015, 0xA1B3, 0x3041, 0xAAA1, + 0x3042, 0xAAA2, 0x3043, 0xAAA3, 0x3044, 0xAAA4, 0x3045, 0xAAA5, + 0x3046, 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0xF957, 0xD2F5, + 0xF958, 0xD2F7, 0xF959, 0xD2F8, 0xF95A, 0xD4E6, 0xF95B, 0xD4FC, + 0xF95C, 0xD5A5, 0xF95D, 0xD5AB, 0xF95E, 0xD5AE, 0xF95F, 0xD6B8, + 0xF960, 0xD6CD, 0xF961, 0xD7CB, 0xF962, 0xD7E4, 0xF963, 0xDBC5, + 0xF964, 0xDBE4, 0xF965, 0xDCA5, 0xF966, 0xDDA5, 0xF967, 0xDDD5, + 0xF968, 0xDDF4, 0xF969, 0xDEFC, 0xF96A, 0xDEFE, 0xF96B, 0xDFB3, + 0xF96C, 0xDFE1, 0xF96D, 0xDFE8, 0xF96E, 0xE0F1, 0xF96F, 0xE1AD, + 0xF970, 0xE1ED, 0xF971, 0xE3F5, 0xF972, 0xE4A1, 0xF973, 0xE4A9, + 0xF974, 0xE5AE, 0xF975, 0xE5B1, 0xF976, 0xE5B2, 0xF977, 0xE5B9, + 0xF978, 0xE5BB, 0xF979, 0xE5BC, 0xF97A, 0xE5C4, 0xF97B, 0xE5CE, + 0xF97C, 0xE5D0, 0xF97D, 0xE5D2, 0xF97E, 0xE5D6, 0xF97F, 0xE5FA, + 0xF980, 0xE5FB, 0xF981, 0xE5FC, 0xF982, 0xE5FE, 0xF983, 0xE6A1, + 0xF984, 0xE6A4, 0xF985, 0xE6A7, 0xF986, 0xE6AD, 0xF987, 0xE6AF, + 0xF988, 0xE6B0, 0xF989, 0xE6B1, 0xF98A, 0xE6B3, 0xF98B, 0xE6B7, + 0xF98C, 0xE6B8, 0xF98D, 0xE6BC, 0xF98E, 0xE6C4, 0xF98F, 0xE6C6, + 0xF990, 0xE6C7, 0xF991, 0xE6CA, 0xF992, 0xE6D2, 0xF993, 0xE6D6, + 0xF994, 0xE6D9, 0xF995, 0xE6DC, 0xF996, 0xE6DF, 0xF997, 0xE6E1, + 0xF998, 0xE6E4, 0xF999, 0xE6E5, 0xF99A, 0xE6E6, 0xF99B, 0xE6E8, + 0xF99C, 0xE6EA, 0xF99D, 0xE6EB, 0xF99E, 0xE6EC, 0xF99F, 0xE6EF, + 0xF9A0, 0xE6F1, 0xF9A1, 0xE6F2, 0xF9A2, 0xE6F5, 0xF9A3, 0xE6F6, + 0xF9A4, 0xE6F7, 0xF9A5, 0xE6F9, 0xF9A6, 0xE7A1, 0xF9A7, 0xE7A6, + 0xF9A8, 0xE7A9, 0xF9A9, 0xE7AA, 0xF9AA, 0xE7AC, 0xF9AB, 0xE7AD, + 0xF9AC, 0xE7B0, 0xF9AD, 0xE7BF, 0xF9AE, 0xE7C1, 0xF9AF, 0xE7C6, + 0xF9B0, 0xE7C7, 0xF9B1, 0xE7CB, 0xF9B2, 0xE7CD, 0xF9B3, 0xE7CF, + 0xF9B4, 0xE7D0, 0xF9B5, 0xE7D3, 0xF9B6, 0xE7DF, 0xF9B7, 0xE7E4, + 0xF9B8, 0xE7E6, 0xF9B9, 0xE7F7, 0xF9BA, 0xE8E7, 0xF9BB, 0xE8E8, + 0xF9BC, 0xE8F0, 0xF9BD, 0xE8F1, 0xF9BE, 0xE8F7, 0xF9BF, 0xE8F9, + 0xF9C0, 0xE8FB, 0xF9C1, 0xE8FE, 0xF9C2, 0xE9A7, 0xF9C3, 0xE9AC, + 0xF9C4, 0xE9CC, 0xF9C5, 0xE9F7, 0xF9C6, 0xEAC1, 0xF9C7, 0xEAE5, + 0xF9C8, 0xEAF4, 0xF9C9, 0xEAF7, 0xF9CA, 0xEAFC, 0xF9CB, 0xEAFE, + 0xF9CC, 0xEBA4, 0xF9CD, 0xEBA7, 0xF9CE, 0xEBA9, 0xF9CF, 0xEBAA, + 0xF9D0, 0xEBBA, 0xF9D1, 0xEBBB, 0xF9D2, 0xEBBD, 0xF9D3, 0xEBC1, + 0xF9D4, 0xEBC2, 0xF9D5, 0xEBC6, 0xF9D6, 0xEBC7, 0xF9D7, 0xEBCC, + 0xF9D8, 0xEBCF, 0xF9D9, 0xEBD0, 0xF9DA, 0xEBD1, 0xF9DB, 0xEBD2, + 0xF9DC, 0xEBD8, 0xF9DD, 0xECA6, 0xF9DE, 0xECA7, 0xF9DF, 0xECAA, + 0xF9E0, 0xECAF, 0xF9E1, 0xECB0, 0xF9E2, 0xECB1, 0xF9E3, 0xECB2, + 0xF9E4, 0xECB5, 0xF9E5, 0xECB8, 0xF9E6, 0xECBA, 0xF9E7, 0xECC0, + 0xF9E8, 0xECC1, 0xF9E9, 0xECC5, 0xF9EA, 0xECC6, 0xF9EB, 0xECC9, + 0xF9EC, 0xECCA, 0xF9ED, 0xECD5, 0xF9EE, 0xECDD, 0xF9EF, 0xECDE, + 0xF9F0, 0xECE1, 0xF9F1, 0xECE4, 0xF9F2, 0xECE7, 0xF9F3, 0xECE8, + 0xF9F4, 0xECF7, 0xF9F5, 0xECF8, 0xF9F6, 0xECFA, 0xF9F7, 0xEDA1, + 0xF9F8, 0xEDA2, 0xF9F9, 0xEDA3, 0xF9FA, 0xEDEE, 0xF9FB, 0xEEDB, + 0xF9FC, 0xF2BD, 0xF9FD, 0xF2FA, 0xF9FE, 0xF3B1, 0xF9FF, 0xF4A7, + 0xFA00, 0xF4EE, 0xFA01, 0xF6F4, 0xFA02, 0xF6F6, 0xFA03, 0xF7B8, + 0xFA04, 0xF7C8, 0xFA05, 0xF7D3, 0xFA06, 0xF8DB, 0xFA07, 0xF8F0, + 0xFA08, 0xFAA1, 0xFA09, 0xFAA2, 0xFA0A, 0xFAE6, 0xFA0B, 0xFCA9, + 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA3A4, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, + 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, + 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, + 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, + 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, + 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, + 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, + 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, + 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, + 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, + 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, + 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC, + 0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC, + 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06, + 0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E, + 0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F, + 0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25, + 0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29, + 0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32, + 0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36, + 0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D, + 0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42, + 0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46, + 0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A, + 0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50, + 0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55, + 0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A, + 0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F, + 0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63, + 0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67, + 0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B, + 0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F, + 0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76, + 0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D, + 0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87, + 0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F, + 0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95, + 0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99, + 0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2, + 0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6, + 0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE, + 0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4, + 0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA, + 0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2, + 0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7, + 0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD, + 0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1, + 0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6, + 0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB, + 0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF, + 0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6, + 0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE, + 0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8, + 0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE, + 0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03, + 0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09, + 0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10, + 0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15, + 0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A, + 0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F, + 0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24, + 0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28, + 0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F, + 0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33, + 0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A, + 0x8265, 0xAD3B, 0x8266, 0xAD3D, 0x8267, 0xAD3E, 0x8268, 0xAD3F, + 0x8269, 0xAD40, 0x826A, 0xAD41, 0x826B, 0xAD42, 0x826C, 0xAD43, + 0x826D, 0xAD46, 0x826E, 0xAD48, 0x826F, 0xAD4A, 0x8270, 0xAD4B, + 0x8271, 0xAD4C, 0x8272, 0xAD4D, 0x8273, 0xAD4E, 0x8274, 0xAD4F, + 0x8275, 0xAD51, 0x8276, 0xAD52, 0x8277, 0xAD53, 0x8278, 0xAD55, + 0x8279, 0xAD56, 0x827A, 0xAD57, 0x8281, 0xAD59, 0x8282, 0xAD5A, + 0x8283, 0xAD5B, 0x8284, 0xAD5C, 0x8285, 0xAD5D, 0x8286, 0xAD5E, + 0x8287, 0xAD5F, 0x8288, 0xAD60, 0x8289, 0xAD62, 0x828A, 0xAD64, + 0x828B, 0xAD65, 0x828C, 0xAD66, 0x828D, 0xAD67, 0x828E, 0xAD68, + 0x828F, 0xAD69, 0x8290, 0xAD6A, 0x8291, 0xAD6B, 0x8292, 0xAD6E, + 0x8293, 0xAD6F, 0x8294, 0xAD71, 0x8295, 0xAD72, 0x8296, 0xAD77, + 0x8297, 0xAD78, 0x8298, 0xAD79, 0x8299, 0xAD7A, 0x829A, 0xAD7E, + 0x829B, 0xAD80, 0x829C, 0xAD83, 0x829D, 0xAD84, 0x829E, 0xAD85, + 0x829F, 0xAD86, 0x82A0, 0xAD87, 0x82A1, 0xAD8A, 0x82A2, 0xAD8B, + 0x82A3, 0xAD8D, 0x82A4, 0xAD8E, 0x82A5, 0xAD8F, 0x82A6, 0xAD91, + 0x82A7, 0xAD92, 0x82A8, 0xAD93, 0x82A9, 0xAD94, 0x82AA, 0xAD95, + 0x82AB, 0xAD96, 0x82AC, 0xAD97, 0x82AD, 0xAD98, 0x82AE, 0xAD99, + 0x82AF, 0xAD9A, 0x82B0, 0xAD9B, 0x82B1, 0xAD9E, 0x82B2, 0xAD9F, + 0x82B3, 0xADA0, 0x82B4, 0xADA1, 0x82B5, 0xADA2, 0x82B6, 0xADA3, + 0x82B7, 0xADA5, 0x82B8, 0xADA6, 0x82B9, 0xADA7, 0x82BA, 0xADA8, + 0x82BB, 0xADA9, 0x82BC, 0xADAA, 0x82BD, 0xADAB, 0x82BE, 0xADAC, + 0x82BF, 0xADAD, 0x82C0, 0xADAE, 0x82C1, 0xADAF, 0x82C2, 0xADB0, + 0x82C3, 0xADB1, 0x82C4, 0xADB2, 0x82C5, 0xADB3, 0x82C6, 0xADB4, + 0x82C7, 0xADB5, 0x82C8, 0xADB6, 0x82C9, 0xADB8, 0x82CA, 0xADB9, + 0x82CB, 0xADBA, 0x82CC, 0xADBB, 0x82CD, 0xADBC, 0x82CE, 0xADBD, + 0x82CF, 0xADBE, 0x82D0, 0xADBF, 0x82D1, 0xADC2, 0x82D2, 0xADC3, + 0x82D3, 0xADC5, 0x82D4, 0xADC6, 0x82D5, 0xADC7, 0x82D6, 0xADC9, + 0x82D7, 0xADCA, 0x82D8, 0xADCB, 0x82D9, 0xADCC, 0x82DA, 0xADCD, + 0x82DB, 0xADCE, 0x82DC, 0xADCF, 0x82DD, 0xADD2, 0x82DE, 0xADD4, + 0x82DF, 0xADD5, 0x82E0, 0xADD6, 0x82E1, 0xADD7, 0x82E2, 0xADD8, + 0x82E3, 0xADD9, 0x82E4, 0xADDA, 0x82E5, 0xADDB, 0x82E6, 0xADDD, + 0x82E7, 0xADDE, 0x82E8, 0xADDF, 0x82E9, 0xADE1, 0x82EA, 0xADE2, + 0x82EB, 0xADE3, 0x82EC, 0xADE5, 0x82ED, 0xADE6, 0x82EE, 0xADE7, + 0x82EF, 0xADE8, 0x82F0, 0xADE9, 0x82F1, 0xADEA, 0x82F2, 0xADEB, + 0x82F3, 0xADEC, 0x82F4, 0xADED, 0x82F5, 0xADEE, 0x82F6, 0xADEF, + 0x82F7, 0xADF0, 0x82F8, 0xADF1, 0x82F9, 0xADF2, 0x82FA, 0xADF3, + 0x82FB, 0xADF4, 0x82FC, 0xADF5, 0x82FD, 0xADF6, 0x82FE, 0xADF7, + 0x8341, 0xADFA, 0x8342, 0xADFB, 0x8343, 0xADFD, 0x8344, 0xADFE, + 0x8345, 0xAE02, 0x8346, 0xAE03, 0x8347, 0xAE04, 0x8348, 0xAE05, + 0x8349, 0xAE06, 0x834A, 0xAE07, 0x834B, 0xAE0A, 0x834C, 0xAE0C, + 0x834D, 0xAE0E, 0x834E, 0xAE0F, 0x834F, 0xAE10, 0x8350, 0xAE11, + 0x8351, 0xAE12, 0x8352, 0xAE13, 0x8353, 0xAE15, 0x8354, 0xAE16, + 0x8355, 0xAE17, 0x8356, 0xAE18, 0x8357, 0xAE19, 0x8358, 0xAE1A, + 0x8359, 0xAE1B, 0x835A, 0xAE1C, 0x8361, 0xAE1D, 0x8362, 0xAE1E, + 0x8363, 0xAE1F, 0x8364, 0xAE20, 0x8365, 0xAE21, 0x8366, 0xAE22, + 0x8367, 0xAE23, 0x8368, 0xAE24, 0x8369, 0xAE25, 0x836A, 0xAE26, + 0x836B, 0xAE27, 0x836C, 0xAE28, 0x836D, 0xAE29, 0x836E, 0xAE2A, + 0x836F, 0xAE2B, 0x8370, 0xAE2C, 0x8371, 0xAE2D, 0x8372, 0xAE2E, + 0x8373, 0xAE2F, 0x8374, 0xAE32, 0x8375, 0xAE33, 0x8376, 0xAE35, + 0x8377, 0xAE36, 0x8378, 0xAE39, 0x8379, 0xAE3B, 0x837A, 0xAE3C, + 0x8381, 0xAE3D, 0x8382, 0xAE3E, 0x8383, 0xAE3F, 0x8384, 0xAE42, + 0x8385, 0xAE44, 0x8386, 0xAE47, 0x8387, 0xAE48, 0x8388, 0xAE49, + 0x8389, 0xAE4B, 0x838A, 0xAE4F, 0x838B, 0xAE51, 0x838C, 0xAE52, + 0x838D, 0xAE53, 0x838E, 0xAE55, 0x838F, 0xAE57, 0x8390, 0xAE58, + 0x8391, 0xAE59, 0x8392, 0xAE5A, 0x8393, 0xAE5B, 0x8394, 0xAE5E, + 0x8395, 0xAE62, 0x8396, 0xAE63, 0x8397, 0xAE64, 0x8398, 0xAE66, + 0x8399, 0xAE67, 0x839A, 0xAE6A, 0x839B, 0xAE6B, 0x839C, 0xAE6D, + 0x839D, 0xAE6E, 0x839E, 0xAE6F, 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0x8A75, 0xB47C, 0x8A76, 0xB47D, 0x8A77, 0xB47E, 0x8A78, 0xB47F, + 0x8A79, 0xB481, 0x8A7A, 0xB482, 0x8A81, 0xB483, 0x8A82, 0xB484, + 0x8A83, 0xB485, 0x8A84, 0xB486, 0x8A85, 0xB487, 0x8A86, 0xB489, + 0x8A87, 0xB48A, 0x8A88, 0xB48B, 0x8A89, 0xB48C, 0x8A8A, 0xB48D, + 0x8A8B, 0xB48E, 0x8A8C, 0xB48F, 0x8A8D, 0xB490, 0x8A8E, 0xB491, + 0x8A8F, 0xB492, 0x8A90, 0xB493, 0x8A91, 0xB494, 0x8A92, 0xB495, + 0x8A93, 0xB496, 0x8A94, 0xB497, 0x8A95, 0xB498, 0x8A96, 0xB499, + 0x8A97, 0xB49A, 0x8A98, 0xB49B, 0x8A99, 0xB49C, 0x8A9A, 0xB49E, + 0x8A9B, 0xB49F, 0x8A9C, 0xB4A0, 0x8A9D, 0xB4A1, 0x8A9E, 0xB4A2, + 0x8A9F, 0xB4A3, 0x8AA0, 0xB4A5, 0x8AA1, 0xB4A6, 0x8AA2, 0xB4A7, + 0x8AA3, 0xB4A9, 0x8AA4, 0xB4AA, 0x8AA5, 0xB4AB, 0x8AA6, 0xB4AD, + 0x8AA7, 0xB4AE, 0x8AA8, 0xB4AF, 0x8AA9, 0xB4B0, 0x8AAA, 0xB4B1, + 0x8AAB, 0xB4B2, 0x8AAC, 0xB4B3, 0x8AAD, 0xB4B4, 0x8AAE, 0xB4B6, + 0x8AAF, 0xB4B8, 0x8AB0, 0xB4BA, 0x8AB1, 0xB4BB, 0x8AB2, 0xB4BC, + 0x8AB3, 0xB4BD, 0x8AB4, 0xB4BE, 0x8AB5, 0xB4BF, 0x8AB6, 0xB4C1, + 0x8AB7, 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0xF8D0, 0x5305, + 0xF8D1, 0x530D, 0xF8D2, 0x530F, 0xF8D3, 0x5486, 0xF8D4, 0x54FA, + 0xF8D5, 0x5703, 0xF8D6, 0x5E03, 0xF8D7, 0x6016, 0xF8D8, 0x629B, + 0xF8D9, 0x62B1, 0xF8DA, 0x6355, 0xF8DB, 0xFA06, 0xF8DC, 0x6CE1, + 0xF8DD, 0x6D66, 0xF8DE, 0x75B1, 0xF8DF, 0x7832, 0xF8E0, 0x80DE, + 0xF8E1, 0x812F, 0xF8E2, 0x82DE, 0xF8E3, 0x8461, 0xF8E4, 0x84B2, + 0xF8E5, 0x888D, 0xF8E6, 0x8912, 0xF8E7, 0x900B, 0xF8E8, 0x92EA, + 0xF8E9, 0x98FD, 0xF8EA, 0x9B91, 0xF8EB, 0x5E45, 0xF8EC, 0x66B4, + 0xF8ED, 0x66DD, 0xF8EE, 0x7011, 0xF8EF, 0x7206, 0xF8F0, 0xFA07, + 0xF8F1, 0x4FF5, 0xF8F2, 0x527D, 0xF8F3, 0x5F6A, 0xF8F4, 0x6153, + 0xF8F5, 0x6753, 0xF8F6, 0x6A19, 0xF8F7, 0x6F02, 0xF8F8, 0x74E2, + 0xF8F9, 0x7968, 0xF8FA, 0x8868, 0xF8FB, 0x8C79, 0xF8FC, 0x98C7, + 0xF8FD, 0x98C4, 0xF8FE, 0x9A43, 0xF9A1, 0x54C1, 0xF9A2, 0x7A1F, + 0xF9A3, 0x6953, 0xF9A4, 0x8AF7, 0xF9A5, 0x8C4A, 0xF9A6, 0x98A8, + 0xF9A7, 0x99AE, 0xF9A8, 0x5F7C, 0xF9A9, 0x62AB, 0xF9AA, 0x75B2, + 0xF9AB, 0x76AE, 0xF9AC, 0x88AB, 0xF9AD, 0x907F, 0xF9AE, 0x9642, + 0xF9AF, 0x5339, 0xF9B0, 0x5F3C, 0xF9B1, 0x5FC5, 0xF9B2, 0x6CCC, + 0xF9B3, 0x73CC, 0xF9B4, 0x7562, 0xF9B5, 0x758B, 0xF9B6, 0x7B46, + 0xF9B7, 0x82FE, 0xF9B8, 0x999D, 0xF9B9, 0x4E4F, 0xF9BA, 0x903C, + 0xF9BB, 0x4E0B, 0xF9BC, 0x4F55, 0xF9BD, 0x53A6, 0xF9BE, 0x590F, + 0xF9BF, 0x5EC8, 0xF9C0, 0x6630, 0xF9C1, 0x6CB3, 0xF9C2, 0x7455, + 0xF9C3, 0x8377, 0xF9C4, 0x8766, 0xF9C5, 0x8CC0, 0xF9C6, 0x9050, + 0xF9C7, 0x971E, 0xF9C8, 0x9C15, 0xF9C9, 0x58D1, 0xF9CA, 0x5B78, + 0xF9CB, 0x8650, 0xF9CC, 0x8B14, 0xF9CD, 0x9DB4, 0xF9CE, 0x5BD2, + 0xF9CF, 0x6068, 0xF9D0, 0x608D, 0xF9D1, 0x65F1, 0xF9D2, 0x6C57, + 0xF9D3, 0x6F22, 0xF9D4, 0x6FA3, 0xF9D5, 0x701A, 0xF9D6, 0x7F55, + 0xF9D7, 0x7FF0, 0xF9D8, 0x9591, 0xF9D9, 0x9592, 0xF9DA, 0x9650, + 0xF9DB, 0x97D3, 0xF9DC, 0x5272, 0xF9DD, 0x8F44, 0xF9DE, 0x51FD, + 0xF9DF, 0x542B, 0xF9E0, 0x54B8, 0xF9E1, 0x5563, 0xF9E2, 0x558A, + 0xF9E3, 0x6ABB, 0xF9E4, 0x6DB5, 0xF9E5, 0x7DD8, 0xF9E6, 0x8266, + 0xF9E7, 0x929C, 0xF9E8, 0x9677, 0xF9E9, 0x9E79, 0xF9EA, 0x5408, + 0xF9EB, 0x54C8, 0xF9EC, 0x76D2, 0xF9ED, 0x86E4, 0xF9EE, 0x95A4, + 0xF9EF, 0x95D4, 0xF9F0, 0x965C, 0xF9F1, 0x4EA2, 0xF9F2, 0x4F09, + 0xF9F3, 0x59EE, 0xF9F4, 0x5AE6, 0xF9F5, 0x5DF7, 0xF9F6, 0x6052, + 0xF9F7, 0x6297, 0xF9F8, 0x676D, 0xF9F9, 0x6841, 0xF9FA, 0x6C86, + 0xF9FB, 0x6E2F, 0xF9FC, 0x7F38, 0xF9FD, 0x809B, 0xF9FE, 0x822A, + 0xFAA1, 0xFA08, 0xFAA2, 0xFA09, 0xFAA3, 0x9805, 0xFAA4, 0x4EA5, + 0xFAA5, 0x5055, 0xFAA6, 0x54B3, 0xFAA7, 0x5793, 0xFAA8, 0x595A, + 0xFAA9, 0x5B69, 0xFAAA, 0x5BB3, 0xFAAB, 0x61C8, 0xFAAC, 0x6977, + 0xFAAD, 0x6D77, 0xFAAE, 0x7023, 0xFAAF, 0x87F9, 0xFAB0, 0x89E3, + 0xFAB1, 0x8A72, 0xFAB2, 0x8AE7, 0xFAB3, 0x9082, 0xFAB4, 0x99ED, + 0xFAB5, 0x9AB8, 0xFAB6, 0x52BE, 0xFAB7, 0x6838, 0xFAB8, 0x5016, + 0xFAB9, 0x5E78, 0xFABA, 0x674F, 0xFABB, 0x8347, 0xFABC, 0x884C, + 0xFABD, 0x4EAB, 0xFABE, 0x5411, 0xFABF, 0x56AE, 0xFAC0, 0x73E6, + 0xFAC1, 0x9115, 0xFAC2, 0x97FF, 0xFAC3, 0x9909, 0xFAC4, 0x9957, + 0xFAC5, 0x9999, 0xFAC6, 0x5653, 0xFAC7, 0x589F, 0xFAC8, 0x865B, + 0xFAC9, 0x8A31, 0xFACA, 0x61B2, 0xFACB, 0x6AF6, 0xFACC, 0x737B, + 0xFACD, 0x8ED2, 0xFACE, 0x6B47, 0xFACF, 0x96AA, 0xFAD0, 0x9A57, + 0xFAD1, 0x5955, 0xFAD2, 0x7200, 0xFAD3, 0x8D6B, 0xFAD4, 0x9769, + 0xFAD5, 0x4FD4, 0xFAD6, 0x5CF4, 0xFAD7, 0x5F26, 0xFAD8, 0x61F8, + 0xFAD9, 0x665B, 0xFADA, 0x6CEB, 0xFADB, 0x70AB, 0xFADC, 0x7384, + 0xFADD, 0x73B9, 0xFADE, 0x73FE, 0xFADF, 0x7729, 0xFAE0, 0x774D, + 0xFAE1, 0x7D43, 0xFAE2, 0x7D62, 0xFAE3, 0x7E23, 0xFAE4, 0x8237, + 0xFAE5, 0x8852, 0xFAE6, 0xFA0A, 0xFAE7, 0x8CE2, 0xFAE8, 0x9249, + 0xFAE9, 0x986F, 0xFAEA, 0x5B51, 0xFAEB, 0x7A74, 0xFAEC, 0x8840, + 0xFAED, 0x9801, 0xFAEE, 0x5ACC, 0xFAEF, 0x4FE0, 0xFAF0, 0x5354, + 0xFAF1, 0x593E, 0xFAF2, 0x5CFD, 0xFAF3, 0x633E, 0xFAF4, 0x6D79, + 0xFAF5, 0x72F9, 0xFAF6, 0x8105, 0xFAF7, 0x8107, 0xFAF8, 0x83A2, + 0xFAF9, 0x92CF, 0xFAFA, 0x9830, 0xFAFB, 0x4EA8, 0xFAFC, 0x5144, + 0xFAFD, 0x5211, 0xFAFE, 0x578B, 0xFBA1, 0x5F62, 0xFBA2, 0x6CC2, + 0xFBA3, 0x6ECE, 0xFBA4, 0x7005, 0xFBA5, 0x7050, 0xFBA6, 0x70AF, + 0xFBA7, 0x7192, 0xFBA8, 0x73E9, 0xFBA9, 0x7469, 0xFBAA, 0x834A, + 0xFBAB, 0x87A2, 0xFBAC, 0x8861, 0xFBAD, 0x9008, 0xFBAE, 0x90A2, + 0xFBAF, 0x93A3, 0xFBB0, 0x99A8, 0xFBB1, 0x516E, 0xFBB2, 0x5F57, + 0xFBB3, 0x60E0, 0xFBB4, 0x6167, 0xFBB5, 0x66B3, 0xFBB6, 0x8559, + 0xFBB7, 0x8E4A, 0xFBB8, 0x91AF, 0xFBB9, 0x978B, 0xFBBA, 0x4E4E, + 0xFBBB, 0x4E92, 0xFBBC, 0x547C, 0xFBBD, 0x58D5, 0xFBBE, 0x58FA, + 0xFBBF, 0x597D, 0xFBC0, 0x5CB5, 0xFBC1, 0x5F27, 0xFBC2, 0x6236, + 0xFBC3, 0x6248, 0xFBC4, 0x660A, 0xFBC5, 0x6667, 0xFBC6, 0x6BEB, + 0xFBC7, 0x6D69, 0xFBC8, 0x6DCF, 0xFBC9, 0x6E56, 0xFBCA, 0x6EF8, + 0xFBCB, 0x6F94, 0xFBCC, 0x6FE0, 0xFBCD, 0x6FE9, 0xFBCE, 0x705D, + 0xFBCF, 0x72D0, 0xFBD0, 0x7425, 0xFBD1, 0x745A, 0xFBD2, 0x74E0, + 0xFBD3, 0x7693, 0xFBD4, 0x795C, 0xFBD5, 0x7CCA, 0xFBD6, 0x7E1E, + 0xFBD7, 0x80E1, 0xFBD8, 0x82A6, 0xFBD9, 0x846B, 0xFBDA, 0x84BF, + 0xFBDB, 0x864E, 0xFBDC, 0x865F, 0xFBDD, 0x8774, 0xFBDE, 0x8B77, + 0xFBDF, 0x8C6A, 0xFBE0, 0x93AC, 0xFBE1, 0x9800, 0xFBE2, 0x9865, + 0xFBE3, 0x60D1, 0xFBE4, 0x6216, 0xFBE5, 0x9177, 0xFBE6, 0x5A5A, + 0xFBE7, 0x660F, 0xFBE8, 0x6DF7, 0xFBE9, 0x6E3E, 0xFBEA, 0x743F, + 0xFBEB, 0x9B42, 0xFBEC, 0x5FFD, 0xFBED, 0x60DA, 0xFBEE, 0x7B0F, + 0xFBEF, 0x54C4, 0xFBF0, 0x5F18, 0xFBF1, 0x6C5E, 0xFBF2, 0x6CD3, + 0xFBF3, 0x6D2A, 0xFBF4, 0x70D8, 0xFBF5, 0x7D05, 0xFBF6, 0x8679, + 0xFBF7, 0x8A0C, 0xFBF8, 0x9D3B, 0xFBF9, 0x5316, 0xFBFA, 0x548C, + 0xFBFB, 0x5B05, 0xFBFC, 0x6A3A, 0xFBFD, 0x706B, 0xFBFE, 0x7575, + 0xFCA1, 0x798D, 0xFCA2, 0x79BE, 0xFCA3, 0x82B1, 0xFCA4, 0x83EF, + 0xFCA5, 0x8A71, 0xFCA6, 0x8B41, 0xFCA7, 0x8CA8, 0xFCA8, 0x9774, + 0xFCA9, 0xFA0B, 0xFCAA, 0x64F4, 0xFCAB, 0x652B, 0xFCAC, 0x78BA, + 0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A, + 0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3, + 0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853, + 0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08, + 0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B, + 0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA, + 0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D, + 0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643, + 0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F, + 0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C, + 0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352, + 0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3, + 0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A, + 0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666, + 0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE, + 0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE, + 0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4, + 0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B, + 0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D, + 0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F, + 0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4, + 0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019, + 0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589, + 0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D, + 0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB, + 0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104, + 0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13, + 0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684, + 0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599, + 0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE, + 0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D, + 0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB, + 0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E, + 0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308, + 0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615, + 0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403, + 0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20, + 0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070, + 0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6, + 0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD, + 0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199, + 0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6, + 0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7, + 0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70, + 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/2.5/bertos/fs/fatfs/option/cc950.c b/2.5/bertos/fs/fatfs/option/cc950.c new file mode 100644 index 00000000..8e616774 --- /dev/null +++ b/2.5/bertos/fs/fatfs/option/cc950.c @@ -0,0 +1,6814 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP950 (Traditional Chinese Big5) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 950 + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3, + 0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE, + 0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5, + 0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346, + 0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A, + 0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E, + 0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352, + 0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356, + 0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A, + 0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E, + 0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362, + 0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366, + 0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A, + 0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E, + 0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372, + 0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5, + 0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C, + 0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB, + 0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1, + 0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB, + 0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF, + 0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6, + 0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8, + 0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241, + 0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7, + 0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5, + 0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE, + 0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8, + 0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6, + 0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A, + 0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275, + 0x2524, 0xA274, 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0x9D00, 0xE8EA, + 0x9D03, 0xBEA1, 0x9D04, 0xE8EF, 0x9D05, 0xE8EE, 0x9D06, 0xBE7D, + 0x9D07, 0xE8E9, 0x9D08, 0xE8ED, 0x9D09, 0xBE7E, 0x9D10, 0xECAC, + 0x9D12, 0xC06F, 0x9D14, 0xECA7, 0x9D15, 0xC06B, 0x9D17, 0xECA4, + 0x9D18, 0xECAA, 0x9D19, 0xECAD, 0x9D1B, 0xC070, 0x9D1D, 0xECA9, + 0x9D1E, 0xECA6, 0x9D1F, 0xECAE, 0x9D20, 0xECA5, 0x9D22, 0xECAB, + 0x9D23, 0xC06C, 0x9D25, 0xECA3, 0x9D26, 0xC06D, 0x9D28, 0xC06E, + 0x9D29, 0xECA8, 0x9D2D, 0xEFA9, 0x9D2E, 0xEF7A, 0x9D2F, 0xEF7B, + 0x9D30, 0xEF7E, 0x9D31, 0xEF7C, 0x9D33, 0xEF76, 0x9D36, 0xEF79, + 0x9D37, 0xEFA5, 0x9D38, 0xEF7D, 0x9D3B, 0xC245, 0x9D3D, 0xEFA7, + 0x9D3E, 0xEFA4, 0x9D3F, 0xC246, 0x9D40, 0xEFA6, 0x9D41, 0xEF77, + 0x9D42, 0xEFA2, 0x9D43, 0xEFA3, 0x9D45, 0xEFA1, 0x9D4A, 0xF1D2, + 0x9D4B, 0xF1D4, 0x9D4C, 0xF1D7, 0x9D4F, 0xF1D1, 0x9D51, 0xC359, + 0x9D52, 0xF1D9, 0x9D53, 0xF1D0, 0x9D54, 0xF1DA, 0x9D56, 0xF1D6, + 0x9D57, 0xF1D8, 0x9D58, 0xF1DC, 0x9D59, 0xF1D5, 0x9D5A, 0xF1DD, + 0x9D5B, 0xF1D3, 0x9D5C, 0xF1CF, 0x9D5D, 0xC35A, 0x9D5F, 0xF1DB, + 0x9D60, 0xC35B, 0x9D61, 0xC44D, 0x9D67, 0xEF78, 0x9D68, 0xF3F1, + 0x9D69, 0xF3E8, 0x9D6A, 0xC44F, 0x9D6B, 0xF3E4, 0x9D6C, 0xC450, + 0x9D6F, 0xF3ED, 0x9D70, 0xF3E7, 0x9D71, 0xF3DD, 0x9D72, 0xC44E, + 0x9D73, 0xF3EA, 0x9D74, 0xF3E5, 0x9D75, 0xF3E6, 0x9D77, 0xF3D8, + 0x9D78, 0xF3DF, 0x9D79, 0xF3EE, 0x9D7B, 0xF3EB, 0x9D7D, 0xF3E3, + 0x9D7F, 0xF3EF, 0x9D80, 0xF3DE, 0x9D81, 0xF3D9, 0x9D82, 0xF3EC, + 0x9D84, 0xF3DB, 0x9D85, 0xF3E9, 0x9D86, 0xF3E0, 0x9D87, 0xF3F0, + 0x9D88, 0xF3DC, 0x9D89, 0xC44C, 0x9D8A, 0xF3DA, 0x9D8B, 0xF3E1, + 0x9D8C, 0xF3E2, 0x9D90, 0xF57D, 0x9D92, 0xF57B, 0x9D94, 0xF5A2, + 0x9D96, 0xF5AE, 0x9D97, 0xF5A5, 0x9D98, 0xF57C, 0x9D99, 0xF578, + 0x9D9A, 0xF5A7, 0x9D9B, 0xF57E, 0x9D9C, 0xF5A3, 0x9D9D, 0xF57A, + 0x9D9E, 0xF5AA, 0x9D9F, 0xF577, 0x9DA0, 0xF5A1, 0x9DA1, 0xF5A6, + 0x9DA2, 0xF5A8, 0x9DA3, 0xF5AB, 0x9DA4, 0xF579, 0x9DA6, 0xF5AF, + 0x9DA7, 0xF5B0, 0x9DA8, 0xF5A9, 0x9DA9, 0xF5AD, 0x9DAA, 0xF5A4, + 0x9DAC, 0xF6C1, 0x9DAD, 0xF6C4, 0x9DAF, 0xC561, 0x9DB1, 0xF6C3, + 0x9DB2, 0xF6C8, 0x9DB3, 0xF6C6, 0x9DB4, 0xC562, 0x9DB5, 0xF6BD, + 0x9DB6, 0xF6B3, 0x9DB7, 0xF6B2, 0x9DB8, 0xC564, 0x9DB9, 0xF6BF, + 0x9DBA, 0xF6C0, 0x9DBB, 0xF6BC, 0x9DBC, 0xF6B4, 0x9DBE, 0xF6B9, + 0x9DBF, 0xF5AC, 0x9DC1, 0xF6B5, 0x9DC2, 0xC563, 0x9DC3, 0xF6BB, + 0x9DC5, 0xF6BA, 0x9DC7, 0xF6B6, 0x9DC8, 0xF6C2, 0x9DCA, 0xF6B7, + 0x9DCB, 0xF7BB, 0x9DCC, 0xF6C5, 0x9DCD, 0xF6C7, 0x9DCE, 0xF6BE, + 0x9DCF, 0xF6B8, 0x9DD0, 0xF7BC, 0x9DD1, 0xF7BE, 0x9DD2, 0xF7B8, + 0x9DD3, 0xC5C2, 0x9DD5, 0xF7C5, 0x9DD6, 0xF7C3, 0x9DD7, 0xC5C3, + 0x9DD8, 0xF7C2, 0x9DD9, 0xF7C1, 0x9DDA, 0xF7BA, 0x9DDB, 0xF7B7, + 0x9DDC, 0xF7BD, 0x9DDD, 0xF7C6, 0x9DDE, 0xF7B9, 0x9DDF, 0xF7BF, + 0x9DE1, 0xF869, 0x9DE2, 0xF86E, 0x9DE3, 0xF864, 0x9DE4, 0xF867, + 0x9DE5, 0xC5EE, 0x9DE6, 0xF86B, 0x9DE8, 0xF872, 0x9DE9, 0xF7C0, + 0x9DEB, 0xF865, 0x9DEC, 0xF86F, 0x9DED, 0xF873, 0x9DEE, 0xF86A, + 0x9DEF, 0xF863, 0x9DF0, 0xF86D, 0x9DF2, 0xF86C, 0x9DF3, 0xF871, + 0x9DF4, 0xF870, 0x9DF5, 0xF7C4, 0x9DF6, 0xF868, 0x9DF7, 0xF862, + 0x9DF8, 0xF866, 0x9DF9, 0xC64E, 0x9DFA, 0xC64F, 0x9DFB, 0xF861, + 0x9DFD, 0xF8E6, 0x9DFE, 0xF8DD, 0x9DFF, 0xF8E5, 0x9E00, 0xF8E2, + 0x9E01, 0xF8E3, 0x9E02, 0xF8DC, 0x9E03, 0xF8DF, 0x9E04, 0xF8E7, + 0x9E05, 0xF8E1, 0x9E06, 0xF8E0, 0x9E07, 0xF8DE, 0x9E09, 0xF8E4, + 0x9E0B, 0xF95D, 0x9E0D, 0xF95E, 0x9E0F, 0xF960, 0x9E10, 0xF95F, + 0x9E11, 0xF962, 0x9E12, 0xF961, 0x9E13, 0xF97C, 0x9E14, 0xF97B, + 0x9E15, 0xF9B7, 0x9E17, 0xF9B8, 0x9E19, 0xF9C5, 0x9E1A, 0xC678, + 0x9E1B, 0xC67C, 0x9E1D, 0xF9CF, 0x9E1E, 0xC67D, 0x9E75, 0xB3BF, + 0x9E79, 0xC4D0, 0x9E7A, 0xF6C9, 0x9E7C, 0xC650, 0x9E7D, 0xC651, + 0x9E7F, 0xB3C0, 0x9E80, 0xE0EE, 0x9E82, 0xB9A8, 0x9E83, 0xE8F0, + 0x9E86, 0xECB0, 0x9E87, 0xECB1, 0x9E88, 0xECAF, 0x9E89, 0xEFAB, + 0x9E8A, 0xEFAA, 0x9E8B, 0xC247, 0x9E8C, 0xF1DF, 0x9E8D, 0xEFAC, + 0x9E8E, 0xF1DE, 0x9E91, 0xF3F3, 0x9E92, 0xC451, 0x9E93, 0xC453, + 0x9E94, 0xF3F2, 0x9E97, 0xC452, 0x9E99, 0xF5B1, 0x9E9A, 0xF5B3, + 0x9E9B, 0xF5B2, 0x9E9C, 0xF6CA, 0x9E9D, 0xC565, 0x9E9F, 0xC5EF, + 0x9EA0, 0xF8E8, 0x9EA1, 0xF963, 0x9EA4, 0xF9D2, 0x9EA5, 0xB3C1, + 0x9EA7, 0xE4E5, 0x9EA9, 0xBEA2, 0x9EAD, 0xECB3, 0x9EAE, 0xECB2, + 0x9EB0, 0xEFAD, 0x9EB4, 0xC454, 0x9EB5, 0xC4D1, 0x9EB6, 0xF7C7, + 0x9EB7, 0xF9CB, 0x9EBB, 0xB3C2, 0x9EBC, 0xBBF2, 0x9EBE, 0xBEA3, + 0x9EC0, 0xF3F4, 0x9EC2, 0xF874, 0x9EC3, 0xB6C0, 0x9EC8, 0xEFAE, + 0x9ECC, 0xC664, 0x9ECD, 0xB6C1, 0x9ECE, 0xBEA4, 0x9ECF, 0xC248, + 0x9ED0, 0xF875, 0x9ED1, 0xB6C2, 0x9ED3, 0xE8F1, 0x9ED4, 0xC072, + 0x9ED5, 0xECB4, 0x9ED6, 0xECB5, 0x9ED8, 0xC071, 0x9EDA, 0xEFAF, + 0x9EDB, 0xC24C, 0x9EDC, 0xC24A, 0x9EDD, 0xC24B, 0x9EDE, 0xC249, + 0x9EDF, 0xF1E0, 0x9EE0, 0xC35C, 0x9EE4, 0xF5B5, 0x9EE5, 0xF5B4, + 0x9EE6, 0xF5B7, 0x9EE7, 0xF5B6, 0x9EE8, 0xC4D2, 0x9EEB, 0xF6CB, + 0x9EED, 0xF6CD, 0x9EEE, 0xF6CC, 0x9EEF, 0xC566, 0x9EF0, 0xF7C8, + 0x9EF2, 0xF876, 0x9EF3, 0xF877, 0x9EF4, 0xC5F0, 0x9EF5, 0xF964, + 0x9EF6, 0xF97D, 0x9EF7, 0xC675, 0x9EF9, 0xDCB0, 0x9EFA, 0xECB6, + 0x9EFB, 0xEFB0, 0x9EFC, 0xF3F5, 0x9EFD, 0xE0EF, 0x9EFF, 0xEFB1, + 0x9F00, 0xF1E2, 0x9F01, 0xF1E1, 0x9F06, 0xF878, 0x9F07, 0xC652, + 0x9F09, 0xF965, 0x9F0A, 0xF97E, 0x9F0E, 0xB9A9, 0x9F0F, 0xE8F2, + 0x9F10, 0xE8F3, 0x9F12, 0xECB7, 0x9F13, 0xB9AA, 0x9F15, 0xC35D, + 0x9F16, 0xF1E3, 0x9F18, 0xF6CF, 0x9F19, 0xC567, 0x9F1A, 0xF6D0, + 0x9F1B, 0xF6CE, 0x9F1C, 0xF879, 0x9F1E, 0xF8E9, 0x9F20, 0xB9AB, + 0x9F22, 0xEFB4, 0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4, + 0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5, + 0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3, + 0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA, + 0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B, + 0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D, + 0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D, + 0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4, + 0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9, + 0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5, + 0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC, + 0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD, + 0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6, + 0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569, + 0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5, + 0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1, + 0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED, + 0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969, + 0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365, + 0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE, + 0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF, + 0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A, + 0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F, + 0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167, + 0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F, + 0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177, + 0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6, + 0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8, + 0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E, + 0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153, + 0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1, + 0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC, + 0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF, + 0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242, + 0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149, + 0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE, + 0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF, + 0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE, + 0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2, + 0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6, + 0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146, + 0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148, + 0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1, + 0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5, + 0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9, + 0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD, + 0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1, + 0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5, + 0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240, + 0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB, + 0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF, + 0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3, + 0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7, + 0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB, + 0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340, + 0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161, + 0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246, + 0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002, + 0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A, + 0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026, + 0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52, + 0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56, + 0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31, + 0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34, + 0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35, + 0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37, + 0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39, + 0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B, + 0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D, + 0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F, + 0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41, + 0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43, + 0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B, + 0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018, + 0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D, + 0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03, + 0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7, + 0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3, + 0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605, + 0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0, + 0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105, + 0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD, + 0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E, + 0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60, + 0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7, + 0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C, + 0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267, + 0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261, + 0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65, + 0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A, + 0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF, + 0xA1EA, 0x33D2, 0xA1EB, 0x33D1, 0xA1EC, 0x222B, 0xA1ED, 0x222E, + 0xA1EE, 0x2235, 0xA1EF, 0x2234, 0xA1F0, 0x2640, 0xA1F1, 0x2642, + 0xA1F2, 0x2295, 0xA1F3, 0x2299, 0xA1F4, 0x2191, 0xA1F5, 0x2193, + 0xA1F6, 0x2190, 0xA1F7, 0x2192, 0xA1F8, 0x2196, 0xA1F9, 0x2197, + 0xA1FA, 0x2199, 0xA1FB, 0x2198, 0xA1FC, 0x2225, 0xA1FD, 0x2223, + 0xA1FE, 0xFF0F, 0xA240, 0xFF3C, 0xA241, 0x2215, 0xA242, 0xFE68, + 0xA243, 0xFF04, 0xA244, 0xFFE5, 0xA245, 0x3012, 0xA246, 0xFFE0, + 0xA247, 0xFFE1, 0xA248, 0xFF05, 0xA249, 0xFF20, 0xA24A, 0x2103, + 0xA24B, 0x2109, 0xA24C, 0xFE69, 0xA24D, 0xFE6A, 0xA24E, 0xFE6B, + 0xA24F, 0x33D5, 0xA250, 0x339C, 0xA251, 0x339D, 0xA252, 0x339E, + 0xA253, 0x33CE, 0xA254, 0x33A1, 0xA255, 0x338E, 0xA256, 0x338F, + 0xA257, 0x33C4, 0xA258, 0x00B0, 0xA259, 0x5159, 0xA25A, 0x515B, + 0xA25B, 0x515E, 0xA25C, 0x515D, 0xA25D, 0x5161, 0xA25E, 0x5163, + 0xA25F, 0x55E7, 0xA260, 0x74E9, 0xA261, 0x7CCE, 0xA262, 0x2581, + 0xA263, 0x2582, 0xA264, 0x2583, 0xA265, 0x2584, 0xA266, 0x2585, + 0xA267, 0x2586, 0xA268, 0x2587, 0xA269, 0x2588, 0xA26A, 0x258F, + 0xA26B, 0x258E, 0xA26C, 0x258D, 0xA26D, 0x258C, 0xA26E, 0x258B, + 0xA26F, 0x258A, 0xA270, 0x2589, 0xA271, 0x253C, 0xA272, 0x2534, + 0xA273, 0x252C, 0xA274, 0x2524, 0xA275, 0x251C, 0xA276, 0x2594, + 0xA277, 0x2500, 0xA278, 0x2502, 0xA279, 0x2595, 0xA27A, 0x250C, + 0xA27B, 0x2510, 0xA27C, 0x2514, 0xA27D, 0x2518, 0xA27E, 0x256D, + 0xA2A1, 0x256E, 0xA2A2, 0x2570, 0xA2A3, 0x256F, 0xA2A4, 0x2550, + 0xA2A5, 0x255E, 0xA2A6, 0x256A, 0xA2A7, 0x2561, 0xA2A8, 0x25E2, + 0xA2A9, 0x25E3, 0xA2AA, 0x25E5, 0xA2AB, 0x25E4, 0xA2AC, 0x2571, + 0xA2AD, 0x2572, 0xA2AE, 0x2573, 0xA2AF, 0xFF10, 0xA2B0, 0xFF11, + 0xA2B1, 0xFF12, 0xA2B2, 0xFF13, 0xA2B3, 0xFF14, 0xA2B4, 0xFF15, + 0xA2B5, 0xFF16, 0xA2B6, 0xFF17, 0xA2B7, 0xFF18, 0xA2B8, 0xFF19, + 0xA2B9, 0x2160, 0xA2BA, 0x2161, 0xA2BB, 0x2162, 0xA2BC, 0x2163, + 0xA2BD, 0x2164, 0xA2BE, 0x2165, 0xA2BF, 0x2166, 0xA2C0, 0x2167, + 0xA2C1, 0x2168, 0xA2C2, 0x2169, 0xA2C3, 0x3021, 0xA2C4, 0x3022, + 0xA2C5, 0x3023, 0xA2C6, 0x3024, 0xA2C7, 0x3025, 0xA2C8, 0x3026, + 0xA2C9, 0x3027, 0xA2CA, 0x3028, 0xA2CB, 0x3029, 0xA2CC, 0x5341, + 0xA2CD, 0x5344, 0xA2CE, 0x5345, 0xA2CF, 0xFF21, 0xA2D0, 0xFF22, + 0xA2D1, 0xFF23, 0xA2D2, 0xFF24, 0xA2D3, 0xFF25, 0xA2D4, 0xFF26, + 0xA2D5, 0xFF27, 0xA2D6, 0xFF28, 0xA2D7, 0xFF29, 0xA2D8, 0xFF2A, + 0xA2D9, 0xFF2B, 0xA2DA, 0xFF2C, 0xA2DB, 0xFF2D, 0xA2DC, 0xFF2E, + 0xA2DD, 0xFF2F, 0xA2DE, 0xFF30, 0xA2DF, 0xFF31, 0xA2E0, 0xFF32, + 0xA2E1, 0xFF33, 0xA2E2, 0xFF34, 0xA2E3, 0xFF35, 0xA2E4, 0xFF36, + 0xA2E5, 0xFF37, 0xA2E6, 0xFF38, 0xA2E7, 0xFF39, 0xA2E8, 0xFF3A, + 0xA2E9, 0xFF41, 0xA2EA, 0xFF42, 0xA2EB, 0xFF43, 0xA2EC, 0xFF44, + 0xA2ED, 0xFF45, 0xA2EE, 0xFF46, 0xA2EF, 0xFF47, 0xA2F0, 0xFF48, + 0xA2F1, 0xFF49, 0xA2F2, 0xFF4A, 0xA2F3, 0xFF4B, 0xA2F4, 0xFF4C, + 0xA2F5, 0xFF4D, 0xA2F6, 0xFF4E, 0xA2F7, 0xFF4F, 0xA2F8, 0xFF50, + 0xA2F9, 0xFF51, 0xA2FA, 0xFF52, 0xA2FB, 0xFF53, 0xA2FC, 0xFF54, + 0xA2FD, 0xFF55, 0xA2FE, 0xFF56, 0xA340, 0xFF57, 0xA341, 0xFF58, + 0xA342, 0xFF59, 0xA343, 0xFF5A, 0xA344, 0x0391, 0xA345, 0x0392, + 0xA346, 0x0393, 0xA347, 0x0394, 0xA348, 0x0395, 0xA349, 0x0396, + 0xA34A, 0x0397, 0xA34B, 0x0398, 0xA34C, 0x0399, 0xA34D, 0x039A, + 0xA34E, 0x039B, 0xA34F, 0x039C, 0xA350, 0x039D, 0xA351, 0x039E, + 0xA352, 0x039F, 0xA353, 0x03A0, 0xA354, 0x03A1, 0xA355, 0x03A3, + 0xA356, 0x03A4, 0xA357, 0x03A5, 0xA358, 0x03A6, 0xA359, 0x03A7, + 0xA35A, 0x03A8, 0xA35B, 0x03A9, 0xA35C, 0x03B1, 0xA35D, 0x03B2, + 0xA35E, 0x03B3, 0xA35F, 0x03B4, 0xA360, 0x03B5, 0xA361, 0x03B6, + 0xA362, 0x03B7, 0xA363, 0x03B8, 0xA364, 0x03B9, 0xA365, 0x03BA, + 0xA366, 0x03BB, 0xA367, 0x03BC, 0xA368, 0x03BD, 0xA369, 0x03BE, + 0xA36A, 0x03BF, 0xA36B, 0x03C0, 0xA36C, 0x03C1, 0xA36D, 0x03C3, + 0xA36E, 0x03C4, 0xA36F, 0x03C5, 0xA370, 0x03C6, 0xA371, 0x03C7, + 0xA372, 0x03C8, 0xA373, 0x03C9, 0xA374, 0x3105, 0xA375, 0x3106, + 0xA376, 0x3107, 0xA377, 0x3108, 0xA378, 0x3109, 0xA379, 0x310A, + 0xA37A, 0x310B, 0xA37B, 0x310C, 0xA37C, 0x310D, 0xA37D, 0x310E, + 0xA37E, 0x310F, 0xA3A1, 0x3110, 0xA3A2, 0x3111, 0xA3A3, 0x3112, + 0xA3A4, 0x3113, 0xA3A5, 0x3114, 0xA3A6, 0x3115, 0xA3A7, 0x3116, + 0xA3A8, 0x3117, 0xA3A9, 0x3118, 0xA3AA, 0x3119, 0xA3AB, 0x311A, + 0xA3AC, 0x311B, 0xA3AD, 0x311C, 0xA3AE, 0x311D, 0xA3AF, 0x311E, + 0xA3B0, 0x311F, 0xA3B1, 0x3120, 0xA3B2, 0x3121, 0xA3B3, 0x3122, + 0xA3B4, 0x3123, 0xA3B5, 0x3124, 0xA3B6, 0x3125, 0xA3B7, 0x3126, + 0xA3B8, 0x3127, 0xA3B9, 0x3128, 0xA3BA, 0x3129, 0xA3BB, 0x02D9, + 0xA3BC, 0x02C9, 0xA3BD, 0x02CA, 0xA3BE, 0x02C7, 0xA3BF, 0x02CB, + 0xA3E1, 0x20AC, 0xA440, 0x4E00, 0xA441, 0x4E59, 0xA442, 0x4E01, + 0xA443, 0x4E03, 0xA444, 0x4E43, 0xA445, 0x4E5D, 0xA446, 0x4E86, + 0xA447, 0x4E8C, 0xA448, 0x4EBA, 0xA449, 0x513F, 0xA44A, 0x5165, + 0xA44B, 0x516B, 0xA44C, 0x51E0, 0xA44D, 0x5200, 0xA44E, 0x5201, + 0xA44F, 0x529B, 0xA450, 0x5315, 0xA451, 0x5341, 0xA452, 0x535C, + 0xA453, 0x53C8, 0xA454, 0x4E09, 0xA455, 0x4E0B, 0xA456, 0x4E08, + 0xA457, 0x4E0A, 0xA458, 0x4E2B, 0xA459, 0x4E38, 0xA45A, 0x51E1, + 0xA45B, 0x4E45, 0xA45C, 0x4E48, 0xA45D, 0x4E5F, 0xA45E, 0x4E5E, + 0xA45F, 0x4E8E, 0xA460, 0x4EA1, 0xA461, 0x5140, 0xA462, 0x5203, + 0xA463, 0x52FA, 0xA464, 0x5343, 0xA465, 0x53C9, 0xA466, 0x53E3, + 0xA467, 0x571F, 0xA468, 0x58EB, 0xA469, 0x5915, 0xA46A, 0x5927, + 0xA46B, 0x5973, 0xA46C, 0x5B50, 0xA46D, 0x5B51, 0xA46E, 0x5B53, + 0xA46F, 0x5BF8, 0xA470, 0x5C0F, 0xA471, 0x5C22, 0xA472, 0x5C38, + 0xA473, 0x5C71, 0xA474, 0x5DDD, 0xA475, 0x5DE5, 0xA476, 0x5DF1, + 0xA477, 0x5DF2, 0xA478, 0x5DF3, 0xA479, 0x5DFE, 0xA47A, 0x5E72, + 0xA47B, 0x5EFE, 0xA47C, 0x5F0B, 0xA47D, 0x5F13, 0xA47E, 0x624D, + 0xA4A1, 0x4E11, 0xA4A2, 0x4E10, 0xA4A3, 0x4E0D, 0xA4A4, 0x4E2D, + 0xA4A5, 0x4E30, 0xA4A6, 0x4E39, 0xA4A7, 0x4E4B, 0xA4A8, 0x5C39, + 0xA4A9, 0x4E88, 0xA4AA, 0x4E91, 0xA4AB, 0x4E95, 0xA4AC, 0x4E92, + 0xA4AD, 0x4E94, 0xA4AE, 0x4EA2, 0xA4AF, 0x4EC1, 0xA4B0, 0x4EC0, + 0xA4B1, 0x4EC3, 0xA4B2, 0x4EC6, 0xA4B3, 0x4EC7, 0xA4B4, 0x4ECD, + 0xA4B5, 0x4ECA, 0xA4B6, 0x4ECB, 0xA4B7, 0x4EC4, 0xA4B8, 0x5143, + 0xA4B9, 0x5141, 0xA4BA, 0x5167, 0xA4BB, 0x516D, 0xA4BC, 0x516E, + 0xA4BD, 0x516C, 0xA4BE, 0x5197, 0xA4BF, 0x51F6, 0xA4C0, 0x5206, + 0xA4C1, 0x5207, 0xA4C2, 0x5208, 0xA4C3, 0x52FB, 0xA4C4, 0x52FE, + 0xA4C5, 0x52FF, 0xA4C6, 0x5316, 0xA4C7, 0x5339, 0xA4C8, 0x5348, + 0xA4C9, 0x5347, 0xA4CA, 0x5345, 0xA4CB, 0x535E, 0xA4CC, 0x5384, + 0xA4CD, 0x53CB, 0xA4CE, 0x53CA, 0xA4CF, 0x53CD, 0xA4D0, 0x58EC, + 0xA4D1, 0x5929, 0xA4D2, 0x592B, 0xA4D3, 0x592A, 0xA4D4, 0x592D, + 0xA4D5, 0x5B54, 0xA4D6, 0x5C11, 0xA4D7, 0x5C24, 0xA4D8, 0x5C3A, + 0xA4D9, 0x5C6F, 0xA4DA, 0x5DF4, 0xA4DB, 0x5E7B, 0xA4DC, 0x5EFF, + 0xA4DD, 0x5F14, 0xA4DE, 0x5F15, 0xA4DF, 0x5FC3, 0xA4E0, 0x6208, + 0xA4E1, 0x6236, 0xA4E2, 0x624B, 0xA4E3, 0x624E, 0xA4E4, 0x652F, + 0xA4E5, 0x6587, 0xA4E6, 0x6597, 0xA4E7, 0x65A4, 0xA4E8, 0x65B9, + 0xA4E9, 0x65E5, 0xA4EA, 0x66F0, 0xA4EB, 0x6708, 0xA4EC, 0x6728, + 0xA4ED, 0x6B20, 0xA4EE, 0x6B62, 0xA4EF, 0x6B79, 0xA4F0, 0x6BCB, + 0xA4F1, 0x6BD4, 0xA4F2, 0x6BDB, 0xA4F3, 0x6C0F, 0xA4F4, 0x6C34, + 0xA4F5, 0x706B, 0xA4F6, 0x722A, 0xA4F7, 0x7236, 0xA4F8, 0x723B, + 0xA4F9, 0x7247, 0xA4FA, 0x7259, 0xA4FB, 0x725B, 0xA4FC, 0x72AC, + 0xA4FD, 0x738B, 0xA4FE, 0x4E19, 0xA540, 0x4E16, 0xA541, 0x4E15, + 0xA542, 0x4E14, 0xA543, 0x4E18, 0xA544, 0x4E3B, 0xA545, 0x4E4D, + 0xA546, 0x4E4F, 0xA547, 0x4E4E, 0xA548, 0x4EE5, 0xA549, 0x4ED8, + 0xA54A, 0x4ED4, 0xA54B, 0x4ED5, 0xA54C, 0x4ED6, 0xA54D, 0x4ED7, + 0xA54E, 0x4EE3, 0xA54F, 0x4EE4, 0xA550, 0x4ED9, 0xA551, 0x4EDE, + 0xA552, 0x5145, 0xA553, 0x5144, 0xA554, 0x5189, 0xA555, 0x518A, + 0xA556, 0x51AC, 0xA557, 0x51F9, 0xA558, 0x51FA, 0xA559, 0x51F8, + 0xA55A, 0x520A, 0xA55B, 0x52A0, 0xA55C, 0x529F, 0xA55D, 0x5305, + 0xA55E, 0x5306, 0xA55F, 0x5317, 0xA560, 0x531D, 0xA561, 0x4EDF, + 0xA562, 0x534A, 0xA563, 0x5349, 0xA564, 0x5361, 0xA565, 0x5360, + 0xA566, 0x536F, 0xA567, 0x536E, 0xA568, 0x53BB, 0xA569, 0x53EF, + 0xA56A, 0x53E4, 0xA56B, 0x53F3, 0xA56C, 0x53EC, 0xA56D, 0x53EE, + 0xA56E, 0x53E9, 0xA56F, 0x53E8, 0xA570, 0x53FC, 0xA571, 0x53F8, + 0xA572, 0x53F5, 0xA573, 0x53EB, 0xA574, 0x53E6, 0xA575, 0x53EA, + 0xA576, 0x53F2, 0xA577, 0x53F1, 0xA578, 0x53F0, 0xA579, 0x53E5, + 0xA57A, 0x53ED, 0xA57B, 0x53FB, 0xA57C, 0x56DB, 0xA57D, 0x56DA, + 0xA57E, 0x5916, 0xA5A1, 0x592E, 0xA5A2, 0x5931, 0xA5A3, 0x5974, + 0xA5A4, 0x5976, 0xA5A5, 0x5B55, 0xA5A6, 0x5B83, 0xA5A7, 0x5C3C, + 0xA5A8, 0x5DE8, 0xA5A9, 0x5DE7, 0xA5AA, 0x5DE6, 0xA5AB, 0x5E02, + 0xA5AC, 0x5E03, 0xA5AD, 0x5E73, 0xA5AE, 0x5E7C, 0xA5AF, 0x5F01, + 0xA5B0, 0x5F18, 0xA5B1, 0x5F17, 0xA5B2, 0x5FC5, 0xA5B3, 0x620A, + 0xA5B4, 0x6253, 0xA5B5, 0x6254, 0xA5B6, 0x6252, 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0x9469, + 0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747, + 0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5, + 0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66, + 0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02, + 0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06, + 0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09, + 0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0, + 0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75, + 0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8, + 0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A, + 0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8, + 0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B, + 0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B, + 0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646, + 0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A, + 0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98, + 0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3, + 0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471, + 0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F, + 0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B, + 0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12, + 0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09, + 0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A, + 0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F, + 0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3, + 0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475, + 0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71, + 0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6, + 0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065, + 0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D, + 0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9, + 0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874, + 0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64, + 0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15, + 0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E, + 0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482, + 0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68, + 0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B, + 0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7, + 0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D, + 0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E, + 0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9, + 0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7, + 0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557, + 0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A, + 0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564, + 0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561, + 0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553, + 0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B, + 0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C, + 0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E, + 0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/2.5/bertos/fs/fatfs/option/ccsbcs.c b/2.5/bertos/fs/fatfs/option/ccsbcs.c new file mode 100644 index 00000000..0d544b68 --- /dev/null +++ b/2.5/bertos/fs/fatfs/option/ccsbcs.c @@ -0,0 +1,528 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - Local code bidirectional converter (C)ChaN, 2009 */ +/* (SBCS code pages) */ +/*------------------------------------------------------------------------*/ +/* 437 U.S. (OEM) +/ 720 Arabic (OEM) +/ 1256 Arabic (Windows) +/ 737 Greek (OEM) +/ 1253 Greek (Windows) +/ 1250 Central Europe (Windows) +/ 775 Baltic (OEM) +/ 1257 Baltic (Windows) +/ 850 Multilingual Latin 1 (OEM) +/ 852 Latin 2 (OEM) +/ 1252 Latin 1 (Windows) +/ 855 Cyrillic (OEM) +/ 1251 Cyrillic (Windows) +/ 866 Russian (OEM) +/ 857 Turkish (OEM) +/ 1254 Turkish (Windows) +/ 858 Multilingual Latin 1 + Euro (OEM) +/ 862 Hebrew (OEM) +/ 1255 Hebrew (Windows) +/ 874 Thai (OEM, Windows) +/ 1258 Vietnam (OEM, Windows) +*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 437 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, + 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 720 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */ + 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, + 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, + 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, + 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A, + 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 737 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */ + 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, + 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0, + 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, + 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8, + 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, + 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, + 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E, + 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 775 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */ + 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, + 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, + 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4, + 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, + 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, + 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D, + 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, + 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, + 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019, + 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, + 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 850 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, + 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 852 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, + 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106, + 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, + 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, + 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, + 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, + 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, + 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4, + 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 855 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */ + 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, + 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, + 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, + 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A, + 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, + 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, + 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, + 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580, + 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, + 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116, + 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, + 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 857 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, + 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 858 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, + 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 862 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */ + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, + 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, + 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, + 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 866 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */ + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, + 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 874 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07, + 0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F, + 0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17, + 0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F, + 0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27, + 0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F, + 0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37, + 0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F, + 0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47, + 0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F, + 0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57, + 0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000 +}; + +#elif _CODE_PAGE == 1250 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A, + 0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B, + 0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C, + 0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7, + 0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E, + 0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7, + 0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF, + 0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7, + 0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F, + 0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7, + 0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9 +}; + +#elif _CODE_PAGE == 1251 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */ + 0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021, + 0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F, + 0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F, + 0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7, + 0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407, + 0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7, + 0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457, + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042A, 0x042D, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F +}; + +#elif _CODE_PAGE == 1252 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, + 0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x00DD, 0x00DE, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, + 0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF +}; + +#elif _CODE_PAGE == 1253 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7, + 0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F, + 0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, + 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, + 0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, + 0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF, + 0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, + 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, + 0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7, + 0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000 +}; + +#elif _CODE_PAGE == 1254 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, + 0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, + 0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF +}; + +#elif _CODE_PAGE == 1255 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7, + 0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF, + 0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3, + 0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, + 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, + 0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000 +}; + +#elif _CODE_PAGE == 1256 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688, + 0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA, + 0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F, + 0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, + 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7, + 0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643, + 0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF, + 0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7, + 0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2 +} + +#elif _CODE_PAGE == 1257 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000, + 0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7, + 0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6, + 0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112, + 0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B, + 0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7, + 0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF, + 0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113, + 0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C, + 0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7, + 0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9 +}; + +#elif _CODE_PAGE == 1258 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF, + 0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF, + 0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF +}; + +#endif + + +#if _TBLDEF + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + + + if (src < 0x80) { /* ASCII */ + c = src; + + } else { + if (dir) { /* OEMCP to Unicode */ + c = (src >= 0x100) ? 0 : Tbl[src - 0x80]; + + } else { /* Unicode to OEMCP */ + for (c = 0; c < 0x80; c++) { + if (src == Tbl[c]) break; + } + c = (c + 0x80) & 0xFF; + } + } + + return c; +} + +#else +#error This file is not needed in current configuration + +#endif diff --git a/2.5/bertos/fs/fatfs/option/syncobj.c b/2.5/bertos/fs/fatfs/option/syncobj.c new file mode 100644 index 00000000..d5075920 --- /dev/null +++ b/2.5/bertos/fs/fatfs/option/syncobj.c @@ -0,0 +1,115 @@ +/*------------------------------------------------------------------------*/ +/* Sample code of OS dependent synchronization object controls */ +/* for FatFs R0.07a (C)ChaN, 2009 */ +/*------------------------------------------------------------------------*/ + +#include // Win32 +//#include // uC/OS-II + +#include "../ff.h" + +#if _FS_REENTRANT + +/*------------------------------------------------------------------------*/ +/* Create a Synchronization Object for a Volume +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount function to create a new +/ synchronization object, such as semaphore and mutex. When a FALSE is +/ returned, the f_mount function fails with FR_INT_ERR. +*/ + +BOOL ff_cre_syncobj ( /* TRUE:Function succeeded, FALSE:Could not create due to any error */ + BYTE vol, /* Corresponding logical drive being processed */ + _SYNC_t *sobj /* Pointer to return the created sync object */ +) +{ + BOOL ret; + + *sobj = CreateMutex(NULL, FALSE, NULL); // Win32 + ret = (*sobj != INVALID_HANDLE_VALUE) ? TRUE : FALSE; // + +// *sobj = VolumeSemId[vol]; // uITRON (give a static created sync object) +// ret = TRUE; // The initial value of the semaphore must be 1. + +// *sobj = OSMutexCreate(0, &err); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Delete a Synchronization Object */ +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount function to delete a synchronization +/ object that created with ff_cre_syncobj function. When a FALSE is +/ returned, the f_mount function fails with FR_INT_ERR. +*/ + +BOOL ff_del_syncobj ( /* TRUE:Function succeeded, FALSE:Could not delete due to any error */ + _SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ +) +{ + BOOL ret; + + ret = CloseHandle(sobj); // Win32 + +// ret = TRUE; // uITRON (nothing to do) + +// OSMutexDel(sobj, OS_DEL_ALWAYS, &err); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Request Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on entering file functions to lock the volume. +/ When a FALSE is returned, the file function fails with FR_TIMEOUT. +*/ + +BOOL ff_req_grant ( /* TRUE:Got a grant to access the volume, FALSE:Could not get a grant */ + _SYNC_t sobj /* Sync object to wait */ +) +{ + BOOL ret; + + ret = (WaitForSingleObject(sobj, _TIMEOUT) == WAIT_OBJECT_0) ? TRUE : FALSE; // Win32 + +// ret = (wai_sem(sobj) == E_OK) ? TRUE : FALSE; // uITRON + +// OSMutexPend(sobj, _TIMEOUT, &err)); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Release Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on leaving file functions to unlock the volume. +*/ + +void ff_rel_grant ( + _SYNC_t sobj /* Sync object to be signaled */ +) +{ + ReleaseMutex(sobj); // Win32 + +// sig_sem(sobj); // uITRON + +// OSMutexPost(sobj); // uC/OS-II +} + + +#else + +#error This file is not needed in this configuration. + +#endif diff --git a/2.5/bertos/gfx/bitmap.c b/2.5/bertos/gfx/bitmap.c new file mode 100644 index 00000000..c94306a9 --- /dev/null +++ b/2.5/bertos/gfx/bitmap.c @@ -0,0 +1,267 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Bitmap manipulation routines. + * \sa gfx.h + */ + +#include "gfx.h" +#include "gfx_p.h" + +#include "cfg/cfg_gfx.h" /* CONFIG_GFX_CLIPPING */ +#include /* MIN() */ +#include /* ASSERT() */ + +#include /* CPU_HARVARD */ + +#include /* memset() */ + +#if CONFIG_GFX_TEXT +#include /* default_font */ +#endif + + +/** + * Initialize a Bitmap structure with the provided parameters. + * + * \note The pen position is reset to the origin. + */ +void gfx_bitmapInit(Bitmap *bm, uint8_t *raster, coord_t w, coord_t h) +{ + bm->raster = raster; + bm->width = w; + bm->height = h; + #if (CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB) + bm->stride = (w + 7) / 8; + #elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB + bm->stride = w; + #else + #error Unknown value of CONFIG_BITMAP_FMT + #endif /* CONFIG_BITMAP_FMT */ + bm->penX = 0; + bm->penY = 0; + +#if CONFIG_GFX_TEXT + gfx_setFont(bm, &default_font); + bm->styles = 0; +#endif + +#if CONFIG_GFX_CLIPPING + bm->cr.xmin = 0; + bm->cr.ymin = 0; + bm->cr.xmax = w; + bm->cr.ymax = h; +#endif /* CONFIG_GFX_CLIPPING */ +} + + +/** + * Clear the whole bitmap surface to the background color. + * + * \note This function does \b not update the current pen position. + * \note This function bypasses the current clipping area. + */ +void gfx_bitmapClear(Bitmap *bm) +{ + memset(bm->raster, 0, RAST_SIZE(bm->width, bm->height)); +} + + +#if CPU_HARVARD + +#include /* FIXME: memcpy_P() */ + +/** + * Copy a raster picture located in program memory in the bitmap. + * The size of the raster to copy *must* be the same of the raster bitmap. + * + * \note This function does \b not update the current pen position + */ +void gfx_blit_P(Bitmap *bm, const pgm_uint8_t *raster) +{ + memcpy_P(bm->raster, raster, RAST_SIZE(bm->width, bm->height)); +} +#endif /* CPU_HARVARD */ + +#if CONFIG_GFX_CLIPPING + /** + * Clip destination coordinates inside a clipping range. + * + * This macro helps a drawing operation to adjust its + * destination X and Y coordinates inside the destination + * clipping range. + * + * The source start coordinate is adjusted as well + * when destination start clipping occurs. + */ + #define gfx_clip(dmin, dmax, smin, cmin, cmax) \ + do { \ + if ((dmin) < (cmin)) \ + { \ + (smin) += (cmin) - (dmin); \ + (dmin) = (cmin); \ + } \ + (dmax) = MIN((dmax), (cmax)); \ + } while(0) + +#else /* !CONFIG_GFX_CLIPPING */ + + #define gfx_clip(dmin, dmax, smin, cmin, cmax) do { } while (0) + +#endif /* !CONFIG_GFX_CLIPPING */ + + +/** + * Copy a rectangular area of a bitmap on another bitmap. + * + * Blitting is a common copy operation involving two bitmaps. + * A rectangular area of the source bitmap is copied bit-wise + * to a different position in the destination bitmap. + * + * \note Using the same bitmap for \a src and \a dst is unsupported. + * + * \param dst Bitmap where the operation writes. + * \param rect The (xmin;ymin) coordinates provide the top/left offset + * for drawing in the destination bitmap. If the source + * bitmap is larger than the rectangle, drawing is clipped. + * \param src Bitmap containing the source pixels. + * \param srcx Starting X offset in the source bitmap. + * \param srcy Starting Y offset in the source bitmap. + */ +void gfx_blit(Bitmap *dst, const Rect *rect, const Bitmap *src, coord_t srcx, coord_t srcy) +{ + coord_t dxmin, dymin, dxmax, dymax; + coord_t dx, dy, sx, sy; + + /* + * Pre-clip coordinates inside src->width/height. + */ + dxmin = rect->xmin; + dymin = rect->ymin; + dxmax = MIN(rect->xmax, rect->xmin + src->width); + dymax = MIN(rect->ymax, rect->ymin + src->height); + + /* Perform regular clipping */ + gfx_clip(dxmin, dxmax, srcx, dst->cr.xmin, dst->cr.xmax); + gfx_clip(dymin, dymax, srcy, dst->cr.ymin, dst->cr.ymax); + + //kprintf("dxmin=%d, sxmin=%d, dxmax=%d; ", dxmin, sxmin, dxmax); + //kprintf("dymin=%d, symin=%d, dymax=%d\n", dymin, symin, dymax); + + /* TODO: make it not as dog slow as this */ + for (dx = dxmin, sx = srcx; dx < dxmax; ++dx, ++sx) + for (dy = dymin, sy = srcy; dy < dymax; ++dy, ++sy) + BM_DRAWPIXEL(dst, dx, dy, BM_READPIXEL(src, sx, sy)); +} + +/** + * Blit a raster to a Bitmap. + * + * \todo Merge this function into gfx_blit() + * + * \see gfx_blit() + */ +void gfx_blitRaster(Bitmap *dst, coord_t dxmin, coord_t dymin, + const uint8_t *raster, coord_t w, coord_t h, coord_t stride) +{ + coord_t dxmax = dxmin + w, dymax = dymin + h; + coord_t sxmin = 0, symin = 0; + coord_t dx, dy, sx, sy; + + /* Perform regular clipping */ + gfx_clip(dxmin, dxmax, sxmin, dst->cr.xmin, dst->cr.xmax); + gfx_clip(dymin, dymax, symin, dst->cr.ymin, dst->cr.ymax); + + //kprintf("dxmin=%d, sxmin=%d, dxmax=%d; ", dxmin, sxmin, dxmax); + //kprintf("dymin=%d, symin=%d, dymax=%d\n", dymin, symin, dymax); + + /* TODO: make it not as dog slow as this */ + for (dx = dxmin, sx = sxmin; dx < dxmax; ++dx, ++sx) + for (dy = dymin, sy = symin; dy < dymax; ++dy, ++sy) + BM_DRAWPIXEL(dst, dx, dy, RAST_READPIXEL(raster, sx, sy, stride)); +} + +/** + * Blit an Image to a Bitmap. + * + * \see gfx_blit() + */ +void gfx_blitImage(Bitmap *dst, coord_t dxmin, coord_t dymin, const Image *image) +{ + ASSERT(image); + + gfx_blitRaster(dst, dxmin, dymin, + image->raster, image->width, image->height, image->stride); +} + + +#if CONFIG_GFX_CLIPPING || CONFIG_GFX_VCOORDS + +/** + * Set the bitmap clipping rectangle to the specified coordinates. + * + * All drawing performed on the bitmap will be clipped inside this + * rectangle. + * + * The clipping rectangle is also used as a bounding box for the + * logical view of the virtual coordinate system. + * + * \note Following the convention used for all other operations, the + * top-left pixels of the rectangle are included, while the + * bottom-right pixels are considered outside the clipping region. + * + * \see gfx_setViewRect + */ +void gfx_setClipRect(Bitmap *bm, coord_t minx, coord_t miny, coord_t maxx, coord_t maxy) +{ + ASSERT(minx < maxx); + ASSERT(miny < maxy); + ASSERT(miny >= 0); + ASSERT(minx >= 0); + ASSERT(maxx <= bm->width); + ASSERT(maxy <= bm->height); + + bm->cr.xmin = minx; + bm->cr.ymin = miny; + bm->cr.xmax = maxx; + bm->cr.ymax = maxy; + +// kprintf("cr.xmin = %d, cr.ymin = %d, cr.xmax = %d, cr.ymax = %d\n", +// bm->cr.xMin, bm->cr.ymin, bm->cr.xmax, bm->cr.ymax); +} + +#endif /* CONFIG_GFX_CLIPPING */ + diff --git a/2.5/bertos/gfx/charts.c b/2.5/bertos/gfx/charts.c new file mode 100644 index 00000000..718d0b78 --- /dev/null +++ b/2.5/bertos/gfx/charts.c @@ -0,0 +1,153 @@ +/** + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * + * \brief Simple charts on top of mware/gfx routines (implementation). + * + */ + +#include "charts.h" +#include + + +#ifndef CONFIG_CHART_ARROWS +#define CONFIG_CHART_ARROWS 0 +#endif + + +void chart_init(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax) +{ + /* Clear the chart area */ + gfx_rectClear(bm, xmin, ymin, xmax, ymax); + + gfx_setClipRect(bm, xmin + CHART_BORDERLEFT, ymin + CHART_BORDERTOP, + xmax - CHART_BORDERRIGHT, ymax - CHART_BORDERBOTTOM); + + chart_drawAxis(bm); +} + + +void chart_setScale(Bitmap *bm, chart_x_t xmin, chart_y_t ymin, chart_x_t xmax, chart_y_t ymax) +{ + gfx_setViewRect(bm, xmin, ymin, xmax, ymax); +} + + +/** + * Draw the chart axes + */ +void chart_drawAxis(Bitmap *bm) +{ +#if CONFIG_CHART_ARROWS + + /* Draw axis */ + gfx_moveTo(bm, bm->cr.xmin, bm->cr.ymin + 4); + gfx_lineTo(bm, bm->cr.xmin, bm->cr.ymax - 1); + gfx_lineTo(bm, bm->cr.xmax - 4 - 1, bm->cr.ymax - 1); + + /* Draw up arrow */ + gfx_moveTo(bm, bm->cr.xmin - 2, bm->cr.ymin + 3); + gfx_lineTo(bm, bm->cr.xmin + 2, bm->cr.ymin + 3); + gfx_lineTo(bm, bm->cr.xmin, bm->cr.ymin); + gfx_lineTo(bm, bm->cr.xmin - 2, bm->cr.ymin + 3); + + /* Draw right arrow */ + gfx_moveTo(bm, bm->cr.xmax - 4, bm->cr.ymax - 3); + gfx_lineTo(bm, bm->cr.xmax - 4, bm->cr.ymax + 1); + gfx_lineTo(bm, bm->cr.xmax - 1, bm->cr.ymax - 1); + gfx_lineTo(bm, bm->cr.xmax - 4, bm->cr.ymax - 3); + +#else /* CONFIG_CHART_ARROWS */ + + /* Draw a box around the chart */ + gfx_rectDraw(bm, bm->cr.xmin, bm->cr.ymin, bm->cr.xmax, bm->cr.ymax); + +#endif /* CONFIG_CHART_ARROWS */ + + //CHECK_WALL(wall_before_raster, WALL_SIZE); + //CHECK_WALL(wall_after_raster, WALL_SIZE); +} + + +/** + * Draw a set of \a curve_cnt connected segments, whose Y coordinates + * are identified by the \a curve_y array and X-coordinates are + * are evenly spaced by one virtual unit. + */ +void chart_drawCurve(Bitmap *bm, const chart_y_t *curve_y, int curve_cnt) +{ + int i; + + gfx_moveTo(bm, gfx_transformX(bm, 0), gfx_transformY(bm, curve_y[0])); + + for (i = 1; i < curve_cnt; i++) + gfx_lineTo(bm, gfx_transformX(bm, i), gfx_transformY(bm, curve_y[i])); + + //CHECK_WALL(wall_before_raster, WALL_SIZE); + //CHECK_WALL(wall_after_raster, WALL_SIZE); +} + + +/** + * Disegna dei dot in corrispondenza delle coppie (dotsx[i];dotsy[i]) + * Se dotsx e' NULL, i punti vengono disegnati ad intervalli regolari. + */ +void chart_drawDots(Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt) +{ + int i; + coord_t x, y; + + for (i = 0; i < cnt; i++) + { + if (dots_x) + x = gfx_transformX(bm, dots_x[i]); + else + x = gfx_transformX(bm, i); + + y = gfx_transformY(bm, dots_y[i]); + + /* Draw tick over the curve */ + gfx_rectFill(bm, + x - TICKS_WIDTH / 2, y - TICKS_HEIGHT / 2, + x + (TICKS_WIDTH + 1) / 2, y + (TICKS_HEIGHT + 1) / 2); + + /* Draw vertical line from the curve to the X-axis */ + //gfx_drawLine(bm, x, y, x, bm->cr.ymax - 1); + } + + //CHECK_WALL(wall_before_raster, WALL_SIZE); + //CHECK_WALL(wall_after_raster, WALL_SIZE); +} + diff --git a/2.5/bertos/gfx/charts.h b/2.5/bertos/gfx/charts.h new file mode 100644 index 00000000..8b4e3458 --- /dev/null +++ b/2.5/bertos/gfx/charts.h @@ -0,0 +1,99 @@ +/** + * \file + * + * + * \brief Simple charts on top of mware/gfx routines (interface). + * + * Configuration: + * - \c CONFIG_CHART_TYPE_X: type for the input dataset of X-coordinates + * - \c CONFIG_CHART_TYPE_Y: type for the input dataset of Y-coordinates + * + * Sample usage: + * + * \code + * bm = chart_init(0, ymax, N_POINTS_CURVE, ymin); + * + * chart_drawCurve(bm, curve_y, curve_points + 1); + * gfx_setViewRect(bm, xmin, ymax, xmax, ymin); + * chart_drawDots(bm, samples_x, samples_y, samples_cnt); + * + * print_bitmap(bm); + * \endcode + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef GFX_CHARTS_H +#define GFX_CHARTS_H + +#include "cfg/cfg_gfx.h" /* CONFIG_ stuff */ + +#include /* vcoord_t */ + +/** + * \name Width/height of the small ticks drawn over the axes + * \{ + */ +#define TICKS_HEIGHT 2 +#define TICKS_WIDTH 2 +/*\}*/ + +/** + * \name Chart frame dimensions + * \{ + */ +#define CHART_BORDERTOP 0 +#define CHART_BORDERBOTTOM 0 +#define CHART_BORDERLEFT 0 +#define CHART_BORDERRIGHT 0 +/*\}*/ + +#ifndef CONFIG_CHART_TYPE_X +#define CONFIG_CHART_TYPE_X vcoord_t +#endif +#ifndef CONFIG_CHART_TYPE_Y +#define CONFIG_CHART_TYPE_Y vcoord_t +#endif + + +typedef CONFIG_CHART_TYPE_X chart_x_t; +typedef CONFIG_CHART_TYPE_Y chart_y_t; + + +/* Public function protos */ +void chart_init(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax); +void chart_setScale(Bitmap *bm, chart_x_t xmin, chart_y_t ymin, chart_x_t xmax, chart_y_t ymax); +void chart_drawAxis(Bitmap *bm); +void chart_drawCurve(Bitmap *bm, const chart_y_t *curve_y, int curve_cnt); +void chart_drawDots(Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt); + +#endif /* GFX_CHARTS_H */ diff --git a/2.5/bertos/gfx/fillpoly.cpp b/2.5/bertos/gfx/fillpoly.cpp new file mode 100644 index 00000000..36483bf6 --- /dev/null +++ b/2.5/bertos/gfx/fillpoly.cpp @@ -0,0 +1,405 @@ +/** + * \file + * + * + * \version $Id$ + * \author Massimiliano Corsini + * + * + * \brief Low-level drawing routines. + * + * This file contains the implementation of the low-level drawing routines + * to draw fill rectangle, fill triangle and so on. + * + */ + +/*#* + *#* $Log$ + *#* Revision 1.1 2006/07/19 13:00:01 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.10 2005/10/15 15:03:43 rasky + *#* Remove per-pixel clipping from line(). + *#* Use clipLine() also for a-scope. + *#* + *#* Revision 1.9 2005/10/14 15:21:32 eldes + *#* Implement the cohen-sutherland clipping on the buffer + *#* + *#* Revision 1.8 2005/09/27 13:28:10 rasky + *#* Add clipping capabilities to line() + *#* Fix off-by-one computation of rectangles of drawing. + *#* + *#* Revision 1.7 2005/09/27 10:41:35 rasky + *#* Import line-drawing routine from Devlib + *#* + *#* Revision 1.6 2005/09/19 16:36:05 chad + *#* Fix doxygen autobrief + *#* + *#* Revision 1.5 2005/07/06 12:51:47 chad + *#* Make the fillRectangle() independent of the order of the points of the rectangle + *#* + *#* Revision 1.4 2005/06/17 15:06:36 chad + *#* Remove conversion warning + *#* + *#* Revision 1.3 2005/06/17 15:04:47 chad + *#* Add line clipping capability + *#* + *#* Revision 1.2 2005/06/15 14:04:43 chad + *#* Add line routine + *#* + *#* Revision 1.1 2005/06/15 13:34:34 chad + *#* Low-level drawing routines + *#* + *#*/ + +// Qt-specific headers +#include + + +/** + * Low-level routine to draw a line. + * + * This routine is based on the Bresenham Line-Drawing Algorithm. + * + * The \a stride represents the width of the image buffer. + * (\a x1, \a y1) are the coordinates of the starting point. + * (\a x2, \a y2) are the coordinates of the ending point. + * + * The line has no anti-alias, and clipping is not performed. The line + * must be fully contained in the buffer (use clipLine() if you need + * to clip it). + */ +void line(unsigned char *buf, + unsigned long bufw, unsigned long bufh, unsigned long stride, + int x1, int y1, int x2, int y2, unsigned char color) +{ + int x, y, e, len, adx, ady, signx, signy; + + if (x2 > x1) + { + /* left to right */ + signx = +1; + adx = x2 - x1; + } + else + { + /* right to left */ + signx = -1; + adx = x1 - x2; + } + + if (y2 > y1) + { + /* top to bottom */ + signy = +1; + ady = y2 - y1; + } + else + { + /* bottom to top */ + signy = -1; + ady = y1 - y2; + } + + x = x1; + y = y1; + + if (adx > ady) + { + /* X-major line (octants 1/4/5/8) */ + len = adx; + e = -adx; + while (len--) + { + /* Sanity check */ + assert(y >= 0 && y < static_cast(bufh) && + x >= 0 && x < static_cast(bufw)); + buf[y * stride + x] = color; + x += signx; + e += ady; + if (e >= 0) + { + y += signy; + e -= adx; + } + } + } + else + { + /* Y-major line (octants 2/3/6/7) */ + len = ady; + e = -ady; + while (len--) + { + /* Sanity check */ + assert(y >= 0 && y < static_cast(bufh) && + x >= 0 && x < static_cast(bufw)); + buf[y * stride + x] = color; + y += signy; + e += adx; + if (e >= 0) + { + x += signx; + e -= ady; + } + } + } +} + +/// Helper routine for clipLine(). +static int region(int x, int y, int w, int h) +{ + int code = 0; + + if (y >= h) + code |= 1; // top + else if (y < 0) + code |= 2; // bottom + + if (x >= w) + code |= 4; // right + else if (x < 0) + code |= 8; // left + + return code; +} + +/** + * Low-level routine to draw a line, clipped to the buffer extents. + * + * This routine executes the clipping, and then invokes line(). + * Parameters are the same of line(). The clipping is performed + * using the Cohen-Sutherland algorithm, which is very fast. + */ +void clipLine(unsigned char *buf, + unsigned long w, unsigned long h, unsigned long stride, + int x1, int y1, int x2, int y2, unsigned char color) +{ + int code1 = region(x1, y1, w, h); + int code2 = region(x2, y2, w, h); + + // Loop while there is at least one point outside + while (code1 | code2) + { + // Check for line totally outside + if (code1 & code2) + return; + + int c = code1 ? code1 : code2; + int x, y; + + if (c & 1) // top + { + x = x1 + (x2 - x1) * (h - y1) / (y2 - y1); + y = h - 1; + } + else if (c & 2) //bottom + { + x = x1 + (x2 - x1) * -y1 / (y2 - y1); + y = 0; + } + else if (c & 4) //right + { + y = y1 + (y2 - y1) * (w - x1) / (x2 - x1); + x = w - 1; + } + else //left + { + y = y1 + (y2 - y1) * -x1 / (x2 - x1); + x = 0; + } + + if (c == code1) // first endpoint was clipped + { + x1 = x; y1 = y; + code1 = region(x1, y1, w, h); + } + else //second endpoint was clipped + { + x2 = x; y2 = y; + code2 = region(x2, y2, w, h); + } + } + + line(buf, w, h, stride, x1, y1, x2, y2, color); +} + + +/** + * Low-level routine to draw a filled rectangle. + * + * The triangle is filled with the given color. + * + * The \a stride represents the width of the image buffer. + * The points \a p1 and \a p2 are two opposite corners of the + * rectangle. + */ +void fillRectangle(unsigned char *buf, unsigned long stride, + QPoint p1, QPoint p2, unsigned char color) +{ + QPoint ul; // upper-left corner + QPoint lr; // lower-right corner + + if (p2.x() > p1.x()) + { + ul.setX(p1.x()); + lr.setX(p2.x()); + } + else + { + ul.setX(p2.x()); + lr.setX(p1.x()); + } + + if (p2.y() > p1.y()) + { + ul.setY(p1.y()); + lr.setY(p2.y()); + } + else + { + ul.setY(p2.y()); + lr.setY(p1.y()); + } + + int width = lr.x() - ul.x(); + unsigned long offset = ul.x() + ul.y()*stride; + + for (int h = ul.y(); h < lr.y(); h++) + { + memset(buf+offset, color, width); + offset += stride; + } +} + +/** + * Low-level routines to draw a filled triangle. + * + * The triangle is filled with the given \a color. + * The \a stride represents the width of the image buffer (\a buf). + * + * The routine use fixed-point arithmetic. + */ +void fillTriangle(unsigned char* buf, unsigned long stride, + QPoint v1, QPoint v2, QPoint v3, unsigned char color) +{ + int altezza[3]; + + // Sort by vertical coordinate + if (v1.y() > v2.y()) + std::swap(v1, v2); + if (v1.y() > v3.y()) + std::swap(v1, v3); + if (v2.y() > v3.y()) + std::swap(v2, v3); + + altezza[0] = v3.y() - v1.y(); + if (!altezza[0]) + return; + + int sezioni = 2; + int sezione = 1; + + buf += v1.y() * stride; + + altezza[1] = v2.y() - v1.y(); + altezza[2] = v3.y() - v2.y(); + + int sinistra = v1.x(); + int destra = sinistra; + + if (v1.y() == v2.y()) + { + if (v1.x() < v2.x()) + destra = v2.x(); + else + sinistra = v2.x(); + } + + sinistra <<= 16; + destra <<= 16; + + int stmp1, stmp2, stmp3; + + stmp1 = (altezza[1] << 16) / altezza[0]; + int lunghezza = stmp1 * (v3.x() - v1.x()) + ((v1.x() - v2.x()) << 16); + + if (!lunghezza ) + return; + + int delta_sinistra[2]; + int delta_destra[2]; + + stmp1 = ((v3.x() - v1.x()) << 16) / altezza[0]; + + if (altezza[1]) + stmp2 = ((v2.x() - v1.x()) << 16) / altezza[1]; + if (altezza[2]) + stmp3 = ((v3.x() - v2.x()) << 16) / altezza[2]; + + if (lunghezza < 0) // Il secondo vertice ~J a destra + { + delta_sinistra[0] = stmp1; + delta_sinistra[1] = stmp1; + delta_destra[0] = stmp2; + delta_destra[1] = stmp3; + } + else // Il secondo vertice ~J a sinistra + { + delta_sinistra[0] = stmp2; + delta_sinistra[1] = stmp3; + delta_destra[0] = stmp1; + delta_destra[1] = stmp1; + } + + int len2 = lunghezza; + + do + { + while (altezza [sezione]) + { + unsigned char* curpos = buf + ((sinistra )>> 16); + lunghezza = ((destra ) >> 16) - ((sinistra ) >> 16); + assert(lunghezza >= 0); + if (lunghezza) + memset(curpos, color, lunghezza); + buf += stride; + destra += delta_destra[sezione - 1]; + sinistra += delta_sinistra[sezione - 1]; + altezza[sezione]--; + } + if (len2 < 0) + destra = v2.x() << 16; + else + sinistra = v2.x() << 16; + sezione++; + } while (--sezioni); +} diff --git a/2.5/bertos/gfx/font.h b/2.5/bertos/gfx/font.h new file mode 100644 index 00000000..cc1a3794 --- /dev/null +++ b/2.5/bertos/gfx/font.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief Font 8x6 IBM-PC 8bit + * + * \version $Id$ + * + * \author Stefano Fedrigo + * + */ + +#ifndef GFX_FONT_H +#define GFX_FONT_H + +#include /* uint8_t */ +#include /* PROGMEM */ + +typedef struct Font +{ + /** + * Pointer to glyph data. + * + * Data is an array of at most 256 glyphs packed together. + * Raster format must be the same of the bitmap. + */ + const pgm_uint8_t *glyph; + + uint8_t width; /**< Pixel width of character cell. */ + uint8_t height; /**< Pixel height of character cell. */ + + uint8_t first; /**< First encoded character in glyph array. */ + uint8_t last; /**< Last encoded character in glyph array (inclusive). */ + + /** Array of glyph offsets in bytes. NULL for fixed-width fonts. */ + const pgm_uint16_t *offset; + const pgm_uint8_t *widths; + +} Font; + + +/** Return true if glyph \a c is available in \a font. */ +#define FONT_HAS_GLYPH(font, c) ((c) >= (font)->first && (c) <= (font)->last) + + +/** The default font. */ +#define default_font font_luBS14 +extern const struct Font default_font; + +#endif /* GFX_FONT_H */ diff --git a/2.5/bertos/gfx/font_10x20.c b/2.5/bertos/gfx/font_10x20.c new file mode 100644 index 00000000..51911c12 --- /dev/null +++ b/2.5/bertos/gfx/font_10x20.c @@ -0,0 +1,5740 @@ +/* Generated by convbdf on Fri Feb 10 01:05:15 CET 2006. */ +#include "font.h" + +/* Font information: + + name: -Misc-Fixed-Medium-R-Normal--20-200-75-75-C-100-ISO8859-1 + pixel size: 20 + ascent: 16 + descent: 4 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_10x20_glyphs[] = { + +/* Character (0x00): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | *** *** | + | * * | + | * * | + | | + | | + | * * | + | * * | + | * * | + | | + | | + | * * | + | * * | + | *** *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0073, 0x0080, +0x0040, 0x0080, +0x0040, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0040, 0x0080, +0x0040, 0x0080, +0x0040, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0040, 0x0080, +0x0040, 0x0080, +0x0073, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x01): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | ** | + | **** | + | ****** | + | ******** | + | ******** | + | ****** | + | **** | + | ** | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x003f, 0x0000, +0x007f, 0x0080, +0x007f, 0x0080, +0x003f, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x02): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + +----------------+ */ +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, + +/* Character (0x03): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x007e, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0000, 0x0000, +0x001f, 0x0080, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x04): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ***** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ***** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x007c, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0078, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x000f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000f, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x05): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | **** | + | ** ** | + | ** | + | ** | + | ** ** | + | **** | + | | + | ***** | + | ** ** | + | ** ** | + | ***** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x003c, 0x0000, +0x0066, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0066, 0x0000, +0x003c, 0x0000, +0x0000, 0x0000, +0x001f, 0x0000, +0x0019, 0x0080, +0x0019, 0x0080, +0x001f, 0x0000, +0x001e, 0x0000, +0x001b, 0x0000, +0x0019, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x06): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ***** | + | | + | ***** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x003e, 0x0000, +0x0000, 0x0000, +0x000f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000f, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x07): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | **** | + | ** ** | + | ** ** | + | **** | + | ** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x08): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | ** | + | ** | + | ******** | + | ** | + | ** | + | | + | ******** | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x09): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** ** | + | *** ** | + | ****** | + | ****** | + | ** *** | + | ** ** | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ***** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0066, 0x0000, +0x0076, 0x0000, +0x007e, 0x0000, +0x007e, 0x0000, +0x006e, 0x0000, +0x0066, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | ** | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x003c, 0x0000, +0x003c, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0000, 0x0000, +0x001f, 0x0080, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |***** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00f8, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + |***** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00f8, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x0d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | ****** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000f, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x0e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | ****** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x000f, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |********** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00ff, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x10): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x11): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x12): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x13): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x14): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, + +/* Character (0x15): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | ****** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x000f, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x16): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |***** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00f8, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + 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*** | + | | + | | + |********* | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0003, 0x0080, +0x000e, 0x0000, +0x0038, 0x0000, +0x00e0, 0x0000, +0x0038, 0x0000, +0x000e, 0x0000, +0x0003, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x1b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + |*** | + | *** | + | *** | + | *** | + | *** | + | *** | + |*** | + | | + | | + |********* | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00e0, 0x0000, +0x0038, 0x0000, +0x000e, 0x0000, +0x0003, 0x0080, +0x000e, 0x0000, +0x0038, 0x0000, +0x00e0, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, 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| | + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | *** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x20): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 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| | + | | + | ** | + | ****** | + | ** ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ****** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x003f, 0x0000, +0x006d, 0x0080, +0x006c, 0x0000, +0x006c, 0x0000, +0x006c, 0x0000, +0x003f, 0x0000, +0x000d, 0x0080, +0x000d, 0x0080, +0x000d, 0x0080, +0x006d, 0x0080, +0x003f, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x25): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | *** ** | + | ** ** ** | + | ** **** | + | *** ** | + | ** | + | ** | + | ** | + | ** | + | ** *** | + | **** ** | + | ** ** ** | + | ** *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0039, 0x0080, +0x006d, 0x0080, +0x006f, 0x0000, +0x003b, 0x0000, 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bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | * | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | * | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0020, 0x0000, +0x0030, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0003, 0x0000, +0x0001, 0x0080, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0020, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0003, 0x0000, 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** ** | + | ** ** | + | ** ** | + | ******** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x007f, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x42): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ***** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007c, 0x0000, +0x0066, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0066, 0x0000, +0x007e, 0x0000, +0x0063, 0x0000, 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bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | ** ** | + | *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000f, 0x00c0, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, 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** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x50): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007e, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0063, 0x0000, +0x007e, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, 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width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | *** *** | + | *** *** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x0073, 0x0080, +0x0073, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x58): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | **** | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, 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*/ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x003f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 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bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | *** ** | + | ** *** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x001d, 0x0080, +0x0033, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x65): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ******** | + | ** | + | ** | + | ** ** | + | ***** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 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***** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0000, 0x0000, +0x0007, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0031, 0x0080, +0x0031, 0x0080, +0x0031, 0x0080, +0x001f, 0x0000, + +/* Character (0x6b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | ***** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0063, 0x0000, +0x0066, 0x0000, +0x006c, 0x0000, +0x0078, 0x0000, +0x007c, 0x0000, +0x0066, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | * ** ** | + | ******** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x005b, 0x0000, +0x007f, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x70): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | *** ** | + | ** *** | + | ** | + | ** | + | ** | + | ** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0073, 0x0000, +0x006e, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, + +/* Character (0x71): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | *** ** | + | ** *** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | ** | + | ** | + | ** | + | ** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001d, 0x0080, +0x0033, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, + +/* Character (0x72): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** **** | + | *** ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x006f, 0x0000, +0x0039, 0x0080, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x73): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ****** | + | ** ** | + | ** | + | ****** | + | ** | + | ** | + | ** ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0000, +0x0061, 0x0080, +0x0060, 0x0000, +0x003f, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0061, 0x0080, +0x003f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x74): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | ** | + | ** | + | ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x007e, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0019, 0x0080, +0x000f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x75): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x76): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x77): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ******** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x007f, 0x0080, +0x0033, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x78): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | **** | + | ** | + | ** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x79): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | ** | + | ** ** | + | ** ** | + | **** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0001, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, + +/* Character (0x7a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ******* | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******* | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x003f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0007, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0078, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0007, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0078, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0007, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0078, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | *** ** | + | ** ** ** | + | ** *** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0039, 0x0080, +0x006d, 0x0080, +0x0067, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +}; + +#warning TODO: Fill the structure with missing parameter (see font.h for more detail). +/* Exported structure definition. */ +#if 0 +Font font_10x20 = { + font_10x20_glyphs, + 10, + 20 +}; +#endif + diff --git a/2.5/bertos/gfx/gfx.h b/2.5/bertos/gfx/gfx.h new file mode 100644 index 00000000..971c1298 --- /dev/null +++ b/2.5/bertos/gfx/gfx.h @@ -0,0 +1,237 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Graphics private header. + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2006/05/27 17:17:34 bernie + *#* Optimize away divisions in RAST_ADDR/MASK macros. + *#* + *#* Revision 1.5 2006/05/25 23:35:40 bernie + *#* Cleanup. + *#* + *#* Revision 1.4 2006/03/22 09:50:37 bernie + *#* Use the same format for fonts and rasters. + *#* + *#* Revision 1.3 2006/02/15 09:10:15 bernie + *#* Implement prop fonts; Fix algo styles. + *#* + *#* Revision 1.2 2006/02/10 12:28:33 bernie + *#* Add font support in bitmaps; Make bitmap formats public. + *#* + *#* Revision 1.1 2006/01/26 00:32:49 bernie + *#* Graphics private header. + *#* + *#*/ + +#ifndef GFX_GFX_P_H +#define GFX_GFX_P_H + +#include + +#if CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB + + /* We use ucoord_t to let the compiler optimize away the division/modulo. */ + #define RAST_ADDR(raster, x, y, stride) \ + ((raster) + (ucoord_t)(y) * (ucoord_t)(stride) + (ucoord_t)(x) / 8) + #define RAST_MASK(raster, x, y) \ + (1 << (7 - (ucoord_t)(x) % 8)) + +#elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB + + /* We use ucoord_t to let the compiler optimize away the division/modulo. */ + #define RAST_ADDR(raster, x, y, stride) \ + ((raster) + ((ucoord_t)(y) / 8) * (ucoord_t)(stride) + (ucoord_t)(x)) + #define RAST_MASK(raster, x, y) \ + (1 << ((ucoord_t)(y) % 8)) + +#else + #error Unknown value of CONFIG_BITMAP_FMT +#endif /* CONFIG_BITMAP_FMT */ + +#define BM_ADDR(bm, x, y) RAST_ADDR((bm)->raster, (x), (y), (bm)->stride) +#define BM_MASK(bm, x, y) RAST_MASK((bm)->raster, (x), (y)) + +/** + * Plot a pixel in bitmap \a bm. + * + * \note bm is evaluated twice. + * \see BM_CLEAR BM_DRAWPIXEL + */ +#define BM_PLOT(bm, x, y) \ + ( *BM_ADDR(bm, x, y) |= BM_MASK(bm, x, y) ) + +/** + * Clear a pixel in bitmap \a bm. + * + * \note bm is evaluated twice. + * \see BM_PLOT BM_DRAWPIXEL + */ +#define BM_CLEAR(bm, x, y) \ + ( *BM_ADDR(bm, x, y) &= ~BM_MASK(bm, x, y) ) + +/** + * Set a pixel in bitmap \a bm to the specified color. + * + * \note bm is evaluated twice. + * \note This macro is somewhat slower than BM_PLOT and BM_CLEAR. + * \see BM_PLOT BM_CLEAR + */ +#define BM_DRAWPIXEL(bm, x, y, fg_pen) \ + do { \ + uint8_t *p = BM_ADDR(bm, x, y); \ + uint8_t mask = BM_MASK(bm, x, y); \ + *p = (*p & ~mask) | ((fg_pen) ? mask : 0); \ + } while (0) + +/** + * Get the value of the pixel in bitmap \a bm. + * + * \return The returned value is either 0 or 1. + * + * \note bm is evaluated twice. + * \see BM_DRAWPIXEL + */ +#define BM_READPIXEL(bm, x, y) \ + ( *BM_ADDR(bm, x, y) & BM_MASK(bm, x, y) ? 1 : 0 ) + +#define RAST_READPIXEL(raster, x, y, stride) \ + ( *RAST_ADDR(raster, x, y, stride) & RAST_MASK(raster, x, y) ? 1 : 0 ) + +#endif /* GFX_GFX_P_H */ diff --git a/2.5/bertos/gfx/line.c b/2.5/bertos/gfx/line.c new file mode 100644 index 00000000..4d756fe6 --- /dev/null +++ b/2.5/bertos/gfx/line.c @@ -0,0 +1,409 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Line drawing graphics routines + * \sa gfx.h + */ + +#include "gfx.h" +#include "gfx_p.h" + +#include "cfg/cfg_gfx.h" /* CONFIG_GFX_CLIPPING */ +#include /* ASSERT() */ +#include /* SWAP() */ + +/* Configuration sanity checks */ +#if !defined(CONFIG_GFX_CLIPPING) || (CONFIG_GFX_CLIPPING != 0 && CONFIG_GFX_CLIPPING != 1) + #error CONFIG_GFX_CLIPPING must be defined to either 0 or 1 +#endif +#if !defined(CONFIG_GFX_VCOORDS) || (CONFIG_GFX_VCOORDS != 0 && CONFIG_GFX_VCOORDS != 1) + #error CONFIG_GFX_VCOORDS must be defined to either 0 or 1 +#endif + +/** + * Draw a sloped line without performing clipping. + * + * Parameters are the same of gfx_line(). + * This routine is based on the Bresenham Line-Drawing Algorithm. + * + * \note Passing coordinates outside the bitmap boundaries will + * result in memory trashing. + * + * \todo Optimize for vertical and horiziontal lines. + * + * \sa gfx_line() + */ +static void gfx_lineUnclipped(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + int x, y, e, len, adx, ady, signx, signy; + + if (x2 > x1) + { + /* left to right */ + signx = +1; + adx = x2 - x1; + } + else + { + /* right to left */ + signx = -1; + adx = x1 - x2; + } + + if (y2 > y1) + { + /* top to bottom */ + signy = +1; + ady = y2 - y1; + } + else + { + /* bottom to top */ + signy = -1; + ady = y1 - y2; + } + + x = x1; + y = y1; + + if (adx > ady) + { + /* X-major line (octants 1/4/5/8) */ + + len = adx; + e = -adx; + while (len--) + { + /* Sanity check */ + ASSERT((x >= 0) && (x < bm->width) && (y >= 0) && (y < bm->height)); + BM_PLOT(bm, x, y); + x += signx; + e += ady; + if (e >= 0) + { + y += signy; + e -= adx; + } + } + } + else + { + /* Y-major line (octants 2/3/6/7) */ + + len = ady; + e = -ady; + while (len--) + { + /* Sanity check */ + ASSERT ((x >= 0) && (x < bm->width) && (y >= 0) && (y < bm->height)); + BM_PLOT(bm, x, y); + y += signy; + e += adx; + if (e >= 0) + { + x += signx; + e -= ady; + } + } + } +} + +#if CONFIG_GFX_CLIPPING + +/// Helper routine for gfx_line(). +static int gfx_findRegion(int x, int y, Rect *cr) +{ + int code = 0; + + if (y >= cr->ymax) + code |= 1; /* below */ + else if (y < cr->ymin) + code |= 2; /* above */ + + if (x >= cr->xmax) + code |= 4; /* right */ + else if (x < cr->xmin) + code |= 8; /* left */ + + return code; +} + +#endif /* CONFIG_CLIPPING */ + +/** + * Draw a sloped line segment. + * + * Draw a sloped line segment identified by the provided + * start and end coordinates on the bitmap \a bm. + * + * The line endpoints are clipped inside the current bitmap + * clipping rectangle using the Cohen-Sutherland algorithm, + * which is very fast. + * + * \note The point at coordinates \a x2 \a y2 is not drawn. + * + * \note This function does \b not update the current pen position. + * + * \todo Compute updated Bresenham error term. + */ +void gfx_line(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ +#if CONFIG_GFX_CLIPPING + int clip1 = gfx_findRegion(x1, y1, &bm->cr); + int clip2 = gfx_findRegion(x2, y2, &bm->cr); + + /* Loop while there is at least one point outside */ + while (clip1 | clip2) + { + /* Check for line totally outside */ + if (clip1 & clip2) + return; + + int c = clip1 ? clip1 : clip2; + int x, y; + + if (c & 1) /* Below */ + { + x = x1 + (x2 - x1) * (bm->cr.ymax - y1) / (y2 - y1); + y = bm->cr.ymax - 1; + } + else if (c & 2) /* Above */ + { + x = x1 + (x2 - x1) * (bm->cr.ymin - y1) / (y2 - y1); + y = bm->cr.ymin; + } + else if (c & 4) /* Right */ + { + y = y1 + (y2 - y1) * (bm->cr.xmax - x1) / (x2 - x1); + x = bm->cr.xmax - 1; + } + else /* Left */ + { + y = y1 + (y2 - y1) * (bm->cr.xmin - x1) / (x2 - x1); + x = bm->cr.xmin; + } + + if (c == clip1) /* First endpoint was clipped */ + { + // TODO: adjust Bresenham error term + //coord_t clipdx = ABS(x - x1); + //coord_t clipdy = ABS(y - y1); + //e += (clipdy * e2) + ((clipdx - clipdy) * e1); + + x1 = x; + y1 = y; + clip1 = gfx_findRegion(x1, y1, &bm->cr); + } + else /* Second endpoint was clipped */ + { + x2 = x; + y2 = y; + clip2 = gfx_findRegion(x2, y2, &bm->cr); + } + } +#endif /* CONFIG_GFX_CLIPPING */ + + gfx_lineUnclipped(bm, x1, y1, x2, y2); +} + +/** + * Move the current pen position to the specified coordinates. + * + * The pen position is used for drawing operations such as + * gfx_lineTo(), which can be used to draw polygons. + */ +void gfx_moveTo(Bitmap *bm, coord_t x, coord_t y) +{ + bm->penX = x; + bm->penY = y; +} + +/** + * Draw a line from the current pen position to the new coordinates. + * + * \note This function moves the current pen position to the + * new coordinates. + * + * \sa gfx_line() + */ +void gfx_lineTo(Bitmap *bm, coord_t x, coord_t y) +{ + gfx_line(bm, bm->penX, bm->penY, x, y); + gfx_moveTo(bm, x, y); +} + + +/** + * Draw the perimeter of an hollow rectangle. + * + * \note The bottom-right corner of the rectangle is drawn at (x2-1;y2-1). + * \note This function does \b not update the current pen position. + */ +void gfx_rectDraw(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + /* Sort coords (needed for correct bottom-right semantics) */ + if (x1 > x2) SWAP(x1, x2); + if (y1 > y2) SWAP(y1, y2); + + /* Draw rectangle */ + gfx_line(bm, x1, y1, x2-1, y1); + gfx_line(bm, x2-1, y1, x2-1, y2-1); + gfx_line(bm, x2-1, y2-1, x1, y2-1); + gfx_line(bm, x1, y2-1, x1, y1); +} + + +/** + * Fill a rectangular area with \a color. + * + * \note The bottom-right border of the rectangle is not drawn. + * + * \note This function does \b not update the current pen position. + */ +void gfx_rectFillC(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2, uint8_t color) +{ + coord_t x, y; + + /* Sort coords */ + if (x1 > x2) SWAP(x1, x2); + if (y1 > y2) SWAP(y1, y2); + +#if CONFIG_GFX_CLIPPING + /* Clip rect to bitmap clip region */ + if (x1 < bm->cr.xmin) x1 = bm->cr.xmin; + if (x2 < bm->cr.xmin) x2 = bm->cr.xmin; + if (x1 > bm->cr.xmax) x1 = bm->cr.xmax; + if (x2 > bm->cr.xmax) x2 = bm->cr.xmax; + if (y1 < bm->cr.ymin) y1 = bm->cr.ymin; + if (y2 < bm->cr.ymin) y2 = bm->cr.ymin; + if (y1 > bm->cr.ymax) y1 = bm->cr.ymax; + if (y2 > bm->cr.ymax) y2 = bm->cr.ymax; +#endif /* CONFIG_GFX_CLIPPING */ + + /* NOTE: Code paths are duplicated for efficiency */ + if (color) /* fill */ + { + for (x = x1; x < x2; x++) + for (y = y1; y < y2; y++) + BM_PLOT(bm, x, y); + } + else /* clear */ + { + for (x = x1; x < x2; x++) + for (y = y1; y < y2; y++) + BM_CLEAR(bm, x, y); + } +} + + +/** + * Draw a filled rectangle. + * + * \note The bottom-right border of the rectangle is not drawn. + * + * \note This function does \b not update the current pen position. + */ +void gfx_rectFill(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + gfx_rectFillC(bm, x1, y1, x2, y2, 0xFF); +} + + +/** + * Clear a rectangular area. + * + * \note The bottom-right border of the rectangle is not cleared. + * + * \note This function does \b not update the current pen position. + */ +void gfx_rectClear(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + gfx_rectFillC(bm, x1, y1, x2, y2, 0x00); +} + + +#if CONFIG_GFX_VCOORDS +/** + * Imposta gli estremi del sistema di coordinate cartesiane rispetto + * al rettangolo di clipping della bitmap. + */ +void gfx_setViewRect(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2) +{ + ASSERT(x1 != x2); + ASSERT(y1 != y2); + + bm->orgX = x1; + bm->orgY = y1; + bm->scaleX = (vcoord_t)(bm->cr.xmax - bm->cr.xmin - 1) / (vcoord_t)(x2 - x1); + bm->scaleY = (vcoord_t)(bm->cr.ymax - bm->cr.ymin - 1) / (vcoord_t)(y2 - y1); + +/* DB(kprintf("orgX = %f, orgY = %f, scaleX = %f, scaleY = %f\n", + bm->orgX, bm->orgY, bm->scaleX, bm->scaleY);) +*/ +} + + +/** + * Transform a coordinate from the current reference system to a + * pixel offset within the bitmap. + */ +coord_t gfx_transformX(Bitmap *bm, vcoord_t x) +{ + return bm->cr.xmin + (coord_t)((x - bm->orgX) * bm->scaleX); +} + +/** + * Transform a coordinate from the current reference system to a + * pixel offset within the bitmap. + */ +coord_t gfx_transformY(Bitmap *bm, vcoord_t y) +{ + return bm->cr.ymin + (coord_t)((y - bm->orgY) * bm->scaleY); +} + + +/** + * Draw a line from (x1;y1) to (x2;y2). + */ +void gfx_vline(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2) +{ + gfx_line(bm, + gfx_transformX(bm, x1), gfx_transformY(bm, y1), + gfx_transformY(bm, x2), gfx_transformY(bm, y2)); +} +#endif /* CONFIG_GFX_VCOORDS */ diff --git a/2.5/bertos/gfx/text.c b/2.5/bertos/gfx/text.c new file mode 100644 index 00000000..d827daa4 --- /dev/null +++ b/2.5/bertos/gfx/text.c @@ -0,0 +1,321 @@ +/** + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Text graphic routines + */ + +#include +#include +#include + +#include // FIXME: BM_DRAWPIXEL + +#include + + +/** + * ANSI escape sequences flag: true for ESC state on. + * + * \todo Move to Bitmap.flags. + */ +static bool ansi_mode = false; + +/** + * Move (imaginary) cursor to coordinates specified. + */ +void text_setCoord(struct Bitmap *bm, int x, int y) +{ + bm->penX = x; + bm->penY = y; +} + + +/** + * Move (imaginary) cursor to column and row specified. + * Next text write will start a that row and col. + */ +void text_moveTo(struct Bitmap *bm, int row, int col) +{ + ASSERT(col >= 0); + ASSERT(col < bm->width / bm->font->width); + ASSERT(row >= 0); + ASSERT(row < bm->height / bm->font->height); + + text_setCoord(bm, col * bm->font->width, row * bm->font->height); +} + + +/** + * Render char \a c on Bitmap \a bm. + */ +static int text_putglyph(char c, struct Bitmap *bm) +{ + const uint8_t * PROGMEM glyph; /* font is in progmem */ + uint8_t glyph_width, glyph_height, glyph_height_bytes; + unsigned char index = (unsigned char)c; + + /* Check for out of range char and replace with '?' or first char in font. */ + if (UNLIKELY(!FONT_HAS_GLYPH(bm->font, index))) + { + kprintf("Illegal char '%c' (0x%02x)\n", index, index); + if (FONT_HAS_GLYPH(bm->font, '?')) + index = '?'; + else + index = bm->font->first; + } + + /* Make character relative to font start */ + index -= bm->font->first; + + glyph_height = bm->font->height; + // FIXME: for vertical fonts only + glyph_height_bytes = (glyph_height + 7) / 8; + + if (bm->font->offset) + { + /* Proportional font */ + glyph_width = bm->font->widths[index]; /* TODO: optimize away */ + glyph = bm->font->glyph + bm->font->offset[index]; + } + else + { + /* + * Fixed-width font: compute the first column of pixels + * of the selected glyph using the character code to index + * the glyph array. + */ + glyph_width = bm->font->width; + + //For horizontal fonts + //glyph = bm->font->glyph + index * (((glyph_width + 7) / 8) * glyph_height); + glyph = bm->font->glyph + index * glyph_height_bytes * glyph_width; + } + + /* Slow path for styled glyphs */ + if (UNLIKELY(bm->styles)) + { + uint8_t styles = bm->styles; + uint8_t prev_dots = 0, italic_prev_dots = 0; + uint8_t dots; + uint8_t row, col, row_bit; + + /* + * To avoid repeating clipping and other expensive computations, + * we cluster calls to gfx_blitRaster() using a small buffer. + */ + #define CONFIG_TEXT_RENDER_OPTIMIZE 1 + #if CONFIG_TEXT_RENDER_OPTIMIZE + #define RENDER_BUF_WIDTH 12 + #define RENDER_BUF_HEIGHT 8 + uint8_t render_buf[RAST_SIZE(RENDER_BUF_WIDTH, RENDER_BUF_HEIGHT)]; + uint8_t render_xpos = 0; + #endif + + /* This style alone could be handled by the fast path too */ + if (bm->styles & STYLEF_CONDENSED) + --glyph_width; + + if (bm->styles & STYLEF_EXPANDED) + glyph_width *= 2; + + for (row = 0, row_bit = 0; row < glyph_height_bytes; ++row, row_bit += 8) + { + /* For each dot column in the glyph... */ + for (col = 0; col < glyph_width; ++col) + { + uint8_t src_col = col; + + /* Expanded style: advances only once every two columns. */ + if (styles & STYLEF_EXPANDED) + src_col /= 2; + + /* Fetch a column of dots from glyph. */ + dots = PGM_READ_CHAR(RAST_ADDR(glyph, src_col, row_bit, glyph_width)); + + /* Italic: get lower 4 dots from previous column */ + if (styles & STYLEF_ITALIC) + { + uint8_t new_dots = dots; + dots = (dots & 0xF0) | italic_prev_dots; + italic_prev_dots = new_dots & 0x0F; + } + + /* Bold: "or" pixels with the previous column */ + if (styles & STYLEF_BOLD) + { + uint8_t new_dots = dots; + dots |= prev_dots; + prev_dots = new_dots; + } + + /* Underlined: turn on base pixel */ + if ((styles & STYLEF_UNDERLINE) + && (row == glyph_height_bytes - 1)) + dots |= (1 << (glyph_height - row_bit - 1)); + + /* Inverted: invert pixels */ + if (styles & STYLEF_INVERT) + dots = ~dots; + + /* Output dots */ + #if CONFIG_TEXT_RENDER_OPTIMIZE + render_buf[render_xpos++] = dots; + if (render_xpos == RENDER_BUF_WIDTH) + { + gfx_blitRaster(bm, bm->penX + col - render_xpos + 1, bm->penY + row_bit, + render_buf, render_xpos, + MIN((uint8_t)RENDER_BUF_HEIGHT, (uint8_t)(glyph_height - row_bit)), + RENDER_BUF_WIDTH); + render_xpos = 0; + } + #else + gfx_blitRaster(bm, bm->penX + col, bm->penY + row_bit, + &dots, 1, MIN((uint8_t)8, glyph_height - row_bit), 1); + #endif + } + + #if CONFIG_TEXT_RENDER_OPTIMIZE + /* Flush out rest of render buffer */ + if (render_xpos != 0) + { + gfx_blitRaster(bm, bm->penX + col - render_xpos, bm->penY + row_bit, + render_buf, render_xpos, + MIN((uint8_t)RENDER_BUF_HEIGHT, (uint8_t)(glyph_height - row_bit)), + RENDER_BUF_WIDTH); + render_xpos = 0; + } + #endif + } + } + else + { + /* No style: fast vanilla copy of glyph to bitmap */ + gfx_blitRaster(bm, bm->penX, bm->penY, glyph, glyph_width, glyph_height, glyph_width); + } + + /* Update current pen position */ + bm->penX += glyph_width; + + return c; +} + + +/** + * Render char \c c, with (currently) limited ANSI escapes + * emulation support and '\n' for newline. + */ +int text_putchar(char c, struct Bitmap *bm) +{ + /* Handle ANSI escape sequences */ + if (UNLIKELY(ansi_mode)) + { + switch (c) + { + case ANSI_ESC_CLEARSCREEN: + gfx_bitmapClear(bm); + bm->penX = 0; + bm->penY = 0; + text_style(bm, 0, STYLEF_MASK); + break; + DB(default: + kprintf("Unknown ANSI esc code: %x\n", c);) + } + ansi_mode = false; + } + else if (c == '\033') /* Enter ANSI ESC mode */ + { + ansi_mode = true; + } + else if (c == '\n') /* Go one line down on a line-feed */ + { + if (bm->penY + bm->font->height < bm->height) + { + bm->penY += bm->font->height; + bm->penX = 0; + } + } + else + { + text_putglyph(c, bm); + } + return c; +} + + +/** + * Clear the screen and reset cursor position + */ +void text_clear(struct Bitmap *bmp) +{ + text_putchar('\x1b', bmp); + text_putchar('c', bmp); +} + + +void text_clearLine(struct Bitmap *bm, int line) +{ + gfx_rectClear(bm, 0, line * bm->font->height, bm->width, (line + 1) * bm->font->height); +} + + +/** + * Set/clear algorithmic font style bits. + * + * \param bm Pointer to Bitmap to affect. + * \param flags Style flags to set + * \param mask Mask of flags to modify + * \return Old style flags + * + * Examples: + * Turn on bold, leave other styles alone + * \code text_style(bm, STYLEF_BOLD, STYLEF_BOLD); \endcode + * + * Turn off bold and turn on italic, leave others as they are + * \code text_style(bm, STYLEF_ITALIC, STYLEF_BOLD | STYLEF_ITALIC); \endcode + * + * Query current style without chaning it + * \code style = text_style(bm, 0, 0); \endcode + * + * Reset all styles (plain text) + * \code text_style(bm, 0, STYLE_MASK); \endcode + */ +uint8_t text_style(struct Bitmap *bm, uint8_t flags, uint8_t mask) +{ + uint8_t old = bm->styles; + bm->styles = (bm->styles & ~mask) | flags; + return old; +} diff --git a/2.5/bertos/gfx/text.h b/2.5/bertos/gfx/text.h new file mode 100644 index 00000000..e7ac8c77 --- /dev/null +++ b/2.5/bertos/gfx/text.h @@ -0,0 +1,122 @@ +/** + * \file + * + * + * \brief Text graphic routines (interface) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "text" + * $WIZ$ module_depends = "bitmap", "line" + */ + +#ifndef GFX_TEXT_H +#define GFX_TEXT_H + +#include +#include /* BV() */ +#include /* CPU_HARVARD */ +#include /* coord_t */ + +#include + +/** + * \name Style flags + * \see text_style() + * \{ + */ +#define STYLEF_BOLD BV(0) +#define STYLEF_ITALIC BV(1) +#define STYLEF_UNDERLINE BV(2) +#define STYLEF_INVERT BV(3) +#define STYLEF_EXPANDED BV(4) +#define STYLEF_CONDENSED BV(5) +#define STYLEF_STRIKEOUT BV(6) /* +int text_puts_P(const char * PROGMEM str, struct Bitmap *bm); +int text_vprintf_P(struct Bitmap *bm, const char * PROGMEM fmt, va_list ap); +int text_printf_P(struct Bitmap *bm, const char * PROGMEM fmt, ...) FORMAT(__printf__, 2, 3); +int text_xyvprintf_P(struct Bitmap *bm, coord_t x, coord_t y, uint16_t mode, const char *fmt, va_list ap); +int text_xyprintf_P(struct Bitmap *bm, coord_t x, coord_t col, uint16_t mode, const char *fmt, ...) FORMAT(__printf__, 5, 6); +int text_xprintf_P(struct Bitmap *bm, uint8_t row, uint8_t col, uint16_t mode, const char * PROGMEM fmt, ...) FORMAT(__printf__, 5, 6); +int text_vwidthf_P(struct Bitmap *bm, const char * PROGMEM fmt, va_list ap); +int text_widthf_P(struct Bitmap *bm, const char * PROGMEM fmt, ...); +#endif /* CPU_HARVARD */ + +#endif /* GFX_TEXT_H */ diff --git a/2.5/bertos/gfx/text_format.c b/2.5/bertos/gfx/text_format.c new file mode 100644 index 00000000..445254c8 --- /dev/null +++ b/2.5/bertos/gfx/text_format.c @@ -0,0 +1,294 @@ +/** + * \file + * + * + * \version $Id$ + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief printf-family routines for text output + * + * $WIZ$ module_name = "text_format" + * $WIZ$ module_depends = "sprintf", "formatwr", "text" + * $WIZ$ module_harvard = "both" + */ + +#include "text.h" + +#include /* _formatted_write() */ +#include +#include + +#include /* vsprintf() */ +#include +#include /* strlen() */ + +/** + * Render string \a str in Bitmap \a bm at current cursor position + * + * \note Text formatting functions are also available with an _P suffix + * accepting the source string from program memory. This feature + * is only available (and useful) on Harvard microprocessors such + * as the AVR. + * + * \see text_putchar() + */ +int PGM_FUNC(text_puts)(const char * PGM_ATTR str, struct Bitmap *bm) +{ + char c; + + while ((c = PGM_READ_CHAR(str++))) + text_putchar(c, bm); + + return 0; +} + + +/** + * vprintf()-like formatter to render text in a Bitmap. + * + * Perform vprintf()-like formatting on the \a fmt format string using the + * variable-argument list \a ap. + * Render the resulting string in Bitmap \a bm starting at the current + * cursor position. + * + * \see text_puts() text_putchar() text_printf() + */ +int PGM_FUNC(text_vprintf)(struct Bitmap *bm, const char * PGM_ATTR fmt, va_list ap) +{ + return PGM_FUNC(_formatted_write)(fmt, (void (*)(char, void *))text_putchar, bm, ap); +} + +/** + * printf()-like formatter to render text in a Bitmap. + * + * Perform printf()-like formatting on the \a fmt format string. + * Render the resulting string in Bitmap \a bm starting at the + * current cursor position. + * + * \see text_puts() text_putchar() text_vprintf() + */ +int PGM_FUNC(text_printf)(struct Bitmap *bm, const char * PGM_ATTR fmt, ...) +{ + int len; + + va_list ap; + va_start(ap, fmt); + len = PGM_FUNC(text_vprintf)(bm, fmt, ap); + va_end(ap); + + return len; +} + +/** + * Render text with vprintf()-like formatting at a specified pixel position. + * + * \see text_xyprintf() + */ +int PGM_FUNC(text_xyvprintf)(struct Bitmap *bm, + coord_t x, coord_t y, uint16_t style, const char * PGM_ATTR fmt, va_list ap) +{ + int len; + uint8_t oldstyle = 0; + + text_setCoord(bm, x, y); + + if (style & STYLEF_MASK) + oldstyle = text_style(bm, style, STYLEF_MASK); + + if (style & (TEXT_CENTER | TEXT_RIGHT)) + { + uint8_t pad = bm->width - PGM_FUNC(text_vwidthf)(bm, fmt, ap); + + if (style & TEXT_CENTER) + pad /= 2; + + if (style & TEXT_FILL) + gfx_rectFillC(bm, 0, y, pad, y + bm->font->height, + (style & STYLEF_INVERT) ? 0xFF : 0x00); + + text_setCoord(bm, pad, y); + } + + len = PGM_FUNC(text_vprintf)(bm, fmt, ap); + + if (style & TEXT_FILL) + gfx_rectFillC(bm, bm->penX, y, bm->width, y + bm->font->height, + (style & STYLEF_INVERT) ? 0xFF : 0x00); + + /* Restore old style */ + if (style & STYLEF_MASK) + text_style(bm, oldstyle, STYLEF_MASK); + + return len; +} + + +/** + * Render text with printf()-like formatting at a specified pixel position. + * + * \param bm Bitmap where to render the text + * \param x [pixels] Initial X coordinate of text. + * \param y [pixels] Coordinate of top border of text. + * \param style Formatting style to use. In addition to any STYLEF_ + * flag, it can be TEXT_NORMAL, TEXT_FILL, TEXT_INVERT or + * TEXT_RIGHT, or a combination of these flags ORed together. + * \param fmt String possibly containing printf() formatting commands. + * + * \see text_puts() text_putchar() text_printf() text_vprintf() + * \see text_moveTo() text_style() + */ +int PGM_FUNC(text_xyprintf)(struct Bitmap *bm, + coord_t x, coord_t y, uint16_t style, const char * PGM_ATTR fmt, ...) +{ + int len; + va_list ap; + + va_start(ap, fmt); + len = PGM_FUNC(text_xyvprintf)(bm, x, y, style, fmt, ap); + va_end(ap); + + return len; +} + + +/** + * Render text with printf()-like formatting at a specified row/column position. + * + * \see text_xyprintf() + */ +int PGM_FUNC(text_xprintf)(struct Bitmap *bm, + uint8_t row, uint8_t col, uint16_t style, const char * PGM_ATTR fmt, ...) +{ + int len; + va_list ap; + + va_start(ap, fmt); + len = PGM_FUNC(text_xyvprintf)( + bm, col * bm->font->width, row * bm->font->height, + style, fmt, ap); + va_end(ap); + + return len; +} + + +struct TextWidthData +{ + Bitmap *bitmap; + coord_t width; +}; + +/** + * Compute width in pixels of a character. + * + * Compute the on screen width of a character, taking the + * current style and font into account. + * + * The width is accumulated in the WidthData structure + * passed as second argument. + * + * This is a formatted_write() callback used by text_vwidthf() + * to compute the length of a formatted string. + */ +static int text_charWidth(int c, struct TextWidthData *twd) +{ + unsigned char index = (unsigned char)c; + Bitmap *bm = twd->bitmap; + coord_t glyph_width; + + + if (UNLIKELY(!FONT_HAS_GLYPH(bm->font, index))) + { + if (!FONT_HAS_GLYPH(bm->font, '?')) + index = '?'; + else + index = bm->font->first; + } + + /* Make character relative to font start */ + index -= bm->font->first; + + if (bm->font->offset) + /* Proportional font */ + glyph_width = bm->font->widths[index]; /* TODO: optimize away */ + else + /* Fixed width font */ + glyph_width = bm->font->width; + + if (bm->styles & STYLEF_CONDENSED) + --glyph_width; + + if (bm->styles & STYLEF_EXPANDED) + glyph_width *= 2; + + twd->width += glyph_width; + + return c; +} + +/** + * Return the width in pixels of a vprintf()-formatted string. + */ +int PGM_FUNC(text_vwidthf)( + UNUSED_ARG(struct Bitmap *, bm), + const char * PGM_ATTR fmt, + va_list ap) +{ + /* Fixed font with no styles affecting the width? */ + if (!bm->font->offset && !(bm->styles & (STYLEF_CONDENSED | STYLEF_EXPANDED))) + return PGM_FUNC(vsprintf)(NULL, fmt, ap) * bm->font->width; + else + { + struct TextWidthData twd; + twd.bitmap = bm; + twd.width = 0; + _formatted_write(fmt, (void (*)(char, void *))text_charWidth, &twd, ap); + return twd.width; + } +} + + +/** + * Return the width in pixels of a printf()-formatted string. + */ +int PGM_FUNC(text_widthf)(struct Bitmap *bm, const char * PGM_ATTR fmt, ...) +{ + int width; + + va_list ap; + va_start(ap, fmt); + width = PGM_FUNC(text_vwidthf)(bm, fmt, ap); + va_end(ap); + + return width; +} diff --git a/2.5/bertos/gfx/win.c b/2.5/bertos/gfx/win.c new file mode 100644 index 00000000..dd1755a5 --- /dev/null +++ b/2.5/bertos/gfx/win.c @@ -0,0 +1,232 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Very simple hierarchical windowing system. + * + * All functions in this module are to be intended as methods + * of the Window class. Please see its documentation + * for a module-wise introduction. + * + * \see struct Window + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/08/01 17:26:04 batt + *#* Update docs. + *#* + *#* Revision 1.1 2006/08/01 15:43:01 batt + *#* Add in board_kd current edited channel visualization. + *#* + *#* Revision 1.4 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.3 2006/02/10 12:25:41 bernie + *#* Add missing header. + *#* + *#* Revision 1.2 2006/01/26 00:36:48 bernie + *#* Const correctness for some new functions. + *#* + *#* Revision 1.1 2006/01/23 23:14:29 bernie + *#* Implement simple, but impressive windowing system. + *#* + *#*/ + +#include "win.h" +#include + +/** + * Map the contents of all child-windows into the bitmap of \a w. + * + * \note Recursively drawing children into their parent + * effectively damages the parent buffer. + */ +void win_compose(Window *w) +{ + Window *child; + + /* + * Walk over all children, in back to front order and tell them + * to compose into us. + */ + REVERSE_FOREACH_NODE(child, &w->children) + { + /* Recursively compose child first. */ + win_compose(child); + + /* Draw child into our bitmap. */ + if (w->bitmap) + gfx_blit(w->bitmap, &child->geom, child->bitmap, 0, 0); + } +} + +/** + * Map window \a w into \a parent. + * + * The new window becomes the topmost window. + * + * \note Opening a window twice is illegal. + * + * \see win_close() + */ +void win_open(Window *w, Window *parent) +{ + ASSERT(!w->parent); + w->parent = parent; + ADDHEAD(&parent->children, &w->link); +} + +/** + * Detach window from its parent. + * + * Closing a window causes it to become orphan of its + * parent. Its content will no longer appear in its + * parent after the next refresh cycle. + * + * \note Closing a window that has not been previously + * opened is illegal. + * + * \see win_open() + */ +void win_close(Window *w) +{ + ASSERT(w->parent); + REMOVE(&w->link); + w->parent = NULL; +} + +/** + * Move window to the topmost position relative to its sibling. + * + * \see win_move(), win_resize(), win_setGeometry() + */ +void win_raise(Window *w) +{ + ASSERT(w->parent); + REMOVE(&w->link); + ADDHEAD(&w->parent->children, &w->link); +} + +/** + * Set window position and size at the same time. + * + * This function is equivalent to subsequent calls to win_move() + * and win_resize() using the coordinates provided by the + * \a new_geom rectangle. + * + * \note The xmax and ymax members of \a new_geom are non-inclusive, + * as usual for the Rect interface. + * + * \see win_move() + * \see win_resize() + */ +void win_setGeometry(Window *w, const Rect *new_geom) +{ + // requires C99? + // memcpy(&w->geom, new_geom, sizeof(w->geom)); + w->geom = *new_geom; +} + +/** + * Move window to specified position. + * + * Move the window top-left corner to the pixel coordinates + * \a left and \a top, which are relative to the parent window. + * + * \note A window can also be moved outside the borders + * of its parent, or at negative coordinates. + * + * \note It is allowed to move an orphan window. + */ +void win_move(Window *w, coord_t left, coord_t top) +{ + Rect r; + + r.xmin = left; + r.ymin = top; + r.xmax = r.xmin + RECT_WIDTH(&w->geom); + r.ymax = r.ymin + RECT_WIDTH(&w->geom); + + win_setGeometry(w, &r); +} + +/** + * Resize the rectangle of a window. + * + * The window shrinks or grows to the specified size. + * + * \note Growing a window beyond the size of its + * backing bitmap results in unspecified behavior. + * + * \note It is allowed to resize an orphan window. + */ +void win_resize(Window *w, coord_t width, coord_t height) +{ + Rect r; + + r.xmin = w->geom.xmin; + r.ymin = w->geom.ymin; + r.xmax = r.xmin + width; + r.ymax = r.ymin + height; + + win_setGeometry(w, &r); +} + +/** + * Initialize a new window structure. + * + * The new window initial position is set to (0,0). + * The size is set to the size of the installed bitmap, + * or (0,0) if there's no backing store. + * + * \arg bm The bitmap to install as backing store + * for drawing into the window, or NULL if + * the window is not drawable. + */ +void win_create(Window *w, Bitmap *bm) +{ + w->parent = NULL; + w->bitmap = bm; + w->geom.xmin = 0; + w->geom.ymin = 0; + if (bm) + { + w->geom.xmax = bm->width; + w->geom.ymax = bm->height; + } + LIST_INIT(&w->children); +} + diff --git a/2.5/bertos/gfx/win.h b/2.5/bertos/gfx/win.h new file mode 100644 index 00000000..853eda96 --- /dev/null +++ b/2.5/bertos/gfx/win.h @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Very simple hierarchical windowing system. + * + * All functions in this module are to be intended as methods + * of the Window class. Please see its documentation + * for a module-wise introduction. + * + * \see struct Window + */ + +/*#* + *#* $Log$ + *#* Revision 1.3 2006/07/19 12:56:27 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.2 2006/01/26 00:36:48 bernie + *#* Const correctness for some new functions. + *#* + *#* Revision 1.1 2006/01/23 23:14:29 bernie + *#* Implement simple, but impressive windowing system. + *#* + *#*/ + +#ifndef GFX_WIN_H +#define GFX_WIN_H + +#include /* Node, List */ +#include /* coord_t */ + + +EXTERN_C_BEGIN + +/** + * Window handle and context structure. + * + * A window is a small rectangular area on the + * screen backed by its own bitmap where you + * can draw. + * + * A window can contain any number of children + * sub-windows that can be depth arranged with + * respect to their siblings. + * + * At any time, a window and all its children + * can be drawn into another bitmap to display + * a complete screen, taking depth and + * overlapping into account. + * + * This rendering model is commonly referred to as + * screen composition, and is quite popular among + * modern windowing systems. + */ +typedef struct Window +{ + Node link; /**< Link us with other siblings into our parent. */ + struct Window *parent; /**< Our parent window. NULL for the root window. */ + + Bitmap *bitmap; /**< Pixel storage for window contents. */ + Rect geom; /**< [px] Window size and position relative to parent. */ + + /** + * List of child windows, arranged by depth (front to back). + * + * Child top/left coordinates are relative to us. + */ + List children; + +} Window; + +/* + * Public function prototypes + */ +void win_compose(Window *w); +void win_open(Window *w, Window *parent); +void win_close(Window *w); +void win_raise(Window *w); +void win_setGeometry(Window *w, const Rect *new_geom); +void win_move(Window *w, coord_t left, coord_t top); +void win_resize(Window *w, coord_t width, coord_t height); +void win_create(Window *w, Bitmap *bm); + +EXTERN_C_END + +#endif /* GFX_WIN_H */ + diff --git a/2.5/bertos/gui/levelbar.c b/2.5/bertos/gui/levelbar.c new file mode 100644 index 00000000..8b75d15b --- /dev/null +++ b/2.5/bertos/gui/levelbar.c @@ -0,0 +1,106 @@ +/** + * \file + * Copyright 2004, 2006 Develer S.r.l. (http://www.develer.com/) + * + * + * \brief Graphics user interface element to display a level bar. + * + * \version $Id$ + * \author Stefano Fedrigo + */ + +#include "levelbar.h" + + +/** + * Initialize the LevelBar widget with the bitmap associated, + * the value range and the coordinates in the bitmap. + * \note The levelbar should be at least 5 pixels wide and high + * for correct borders drawing. No check is done on this. + */ +void lbar_init(struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos, + coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + lb->bitmap = bmp; + lb->type = type; + lb->min = min; + lb->max = max; + lb->pos = pos; + lb->x1 = x1; + lb->y1 = y1; + lb->x2 = x2; + lb->y2 = y2; +} + + +/** + * Set the level. + */ +void lbar_setLevel(struct LevelBar *lb, int level) +{ + if (level < lb->min) + level = lb->min; + if (level > lb->max) + level = lb->max; + + lb->pos = level; +} + + +/** + * Get current level. + */ +int lbar_getLevel(struct LevelBar *lb) +{ + return lb->pos; +} + + +/** + * Change level with respect to previous value + * (delta can be negative). + */ +void lbar_changeLevel(struct LevelBar *lb, int delta) +{ + lbar_setLevel(lb, lb->pos + delta); +} + + +/** + * Change the top limit. + */ +void lbar_setMax(struct LevelBar *lb, int max) +{ + lb->max = max; +} + + +/** + * Render the LevelBar on the bitmap. + */ +void lbar_draw(struct LevelBar *lb) +{ +#define BORDERW 1 +#define BORDERH 1 + + /* Compute filled bar length in pixels */ + int totlen = (lb->type & LBAR_HORIZONTAL) ? lb->x2 - lb->x1 - BORDERW*4 : lb->y2 - lb->y1 - BORDERH*4; + int range = lb->max - lb->min; + int barlen = ((long)(lb->pos - lb->min) * (long)totlen + range - 1) / range; + + // Draw border + gfx_rectDraw(lb->bitmap, lb->x1, lb->y1, lb->x2, lb->y2); + + // Clear inside + gfx_rectClear(lb->bitmap, lb->x1 + BORDERW, lb->y1 + BORDERH, lb->x2 - BORDERW, lb->y2 - BORDERH); + + // Draw bar + if (lb->type & LBAR_HORIZONTAL) + gfx_rectFill(lb->bitmap, + lb->x1 + BORDERW*2, lb->y1 + BORDERH*2, + lb->x1 + BORDERW*2 + barlen, lb->y2 - BORDERH*2); + else + gfx_rectFill(lb->bitmap, + lb->x1 + BORDERW*2, lb->y2 - BORDERH*2 - barlen, + lb->x2 - BORDERW*2, lb->y2 - BORDERH*2); +} diff --git a/2.5/bertos/gui/levelbar.h b/2.5/bertos/gui/levelbar.h new file mode 100644 index 00000000..d1d36926 --- /dev/null +++ b/2.5/bertos/gui/levelbar.h @@ -0,0 +1,39 @@ +/** + * \file + * Copyright 2004, 2006 Develer S.r.l. (http://www.develer.com/) + * + * + * \author Stefano Fedrigo + * + * \brief Graphics level bar widget + */ + +#ifndef GUI_LEVELBAR_H +#define GUI_LEVELBAR_H + +#include + + +/** Type of levelbar */ +#define LBAR_HORIZONTAL 1 +#define LBAR_VERTICAL 2 + +typedef struct LevelBar +{ + struct Bitmap *bitmap; + int type; + int pos; ///< Current level + int min; ///< Minimum level + int max; ///< Maximum level + coord_t x1, y1, x2, y2; ///< Position of widget in the bitmap +} LevelBar; + +void lbar_init(struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos, + coord_t x1, coord_t y1, coord_t x2, coord_t y2); +void lbar_setLevel(struct LevelBar *lb, int level); +int lbar_getLevel(struct LevelBar *lb); +void lbar_changeLevel(struct LevelBar *lb, int delta); +void lbar_setMax(struct LevelBar *lb, int max); +void lbar_draw(struct LevelBar *lb); + +#endif /* GUI_LEVELBAR_H */ diff --git a/2.5/bertos/gui/leveledit.c b/2.5/bertos/gui/leveledit.c new file mode 100644 index 00000000..27a46683 --- /dev/null +++ b/2.5/bertos/gui/leveledit.c @@ -0,0 +1,321 @@ +/** + * \file + * + * + * \brief Generic editor for (volume/gain/contrast/...) setting. + * + * \author Stefano Fedrigo + */ + +#include "leveledit.h" + +#include "cfg/cfg_menu.h" +#include /* MAX() */ + +#include +#include + +#include + +#include + +#include +#include + +#if CONFIG_MENU_MENUBAR +#include +#endif + +#warning FIXME: Revise me! + +#define LBAR_HEIGHT 16 + +/** + * Allow user to change level. + */ +void level_edit(struct LevelEdit *lev) +{ +#if CONFIG_MENU_MENUBAR + /* Labels for menubars */ + enum LabelId ch_labels[] = { LABEL_C1PLUS2, LABEL_CH_1, LABEL_CH_2 }; + const_iptr_t labels[] = + { + (const_iptr_t)LABEL_BACK, + (const_iptr_t)LABEL_MINUS, + (const_iptr_t)LABEL_PLUS, + (const_iptr_t)LABEL_EMPTY + }; + struct MenuBar mb; +#endif /* CONFIG_MENU_MENUBAR */ + + struct LevelBar bar1, bar2; + keymask_t keys, old_rpt_mask; + int step, rep_step; + + rep_step = MAX(lev->step, ((lev->max - lev->min) / 200)); + step = lev->step; + + // Allow keys repetition. + old_rpt_mask = kbd_setRepeatMask(K_UP | K_DOWN); + + text_clear(lev->bitmap); + //text_style(STYLEF_UNDERLINE, STYLEF_UNDERLINE); + text_puts(lev->title, lev->bitmap); + //text_style(0, STYLEF_UNDERLINE); + + if (lev->type & LEVELEDIT_DOUBLE) + { + int chn = 0; /* edit both channels */ + + /* Levelbars init */ + lbar_init(&bar1, lev->bitmap, LBAR_HORIZONTAL, + lev->min, lev->max, *lev->ch1_val, 0, 16, lev->bitmap->width / 2 - 1, 23); + lbar_init(&bar2, lev->bitmap, LBAR_HORIZONTAL, + lev->min, lev->max, *lev->ch2_val, lev->bitmap->width / 2 + 1, 16, lev->bitmap->width, 23); + + #if CONFIG_MENU_MENUBAR + labels[3] = (const_iptr_t)ch_labels[chn]; + mbar_init(&mb, lev->bitmap, labels, countof(labels)); + mbar_draw(&mb); + #endif /* CONFIG_MENU_MENUBAR */ + + /* Input loop for double level setting */ + for (;;) + { + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + ticks_t idle_timeout = timer_clock(); + #endif + do + { + if (lev->display_hook) + lev->display_hook(lev); + else + { + text_xprintf(lev->bitmap, 1, 0, TEXT_CENTER | TEXT_FILL, lev->unit); + PGM_FUNC(text_xprintf)(lev->bitmap, 1, 3, 0, PGM_STR("%d"), *lev->ch1_val); + PGM_FUNC(text_xprintf)(lev->bitmap, 1, 14, 0, PGM_STR("%d"), *lev->ch2_val); + + lbar_setLevel(&bar1, *lev->ch1_val); + lbar_setLevel(&bar2, *lev->ch2_val); + lbar_draw(&bar1); + lbar_draw(&bar2); + } + + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + if (timer_clock() - idle_timeout > ms_to_ticks(CONFIG_LEVELEDIT_TIMEOUT)) + { + /* Accept input implicitly */ + keys = K_OK; + break; + } + #endif + } + while (!(keys = kbd_peek())); + + if (keys & K_CANCEL) + break; + + if (keys & K_OK) + { + chn = (chn + 1) % 3; + + #if CONFIG_MENU_MENUBAR + labels[3] = (const_iptr_t)ch_labels[chn]; + mbar_draw(&mb); + #endif /* CONFIG_MENU_MENUBAR */ + } + + /* Increment step to achieve greater accelerations on larger values */ + if (keys & K_REPEAT) + step = MIN(rep_step, step + 1); + else + step = lev->step; + + if (keys & (K_UP | K_DOWN)) + { + if (keys & K_UP) + { + /* If changing both channels (chn == 0), don't change + * level if one of two is at min or max */ + if (chn != 0 || + (*lev->ch1_val + step <= lev->max + && *lev->ch2_val + step <= lev->max)) + { + /* If chn == 0 change both channels */ + if (chn != 2) + { + *lev->ch1_val += step; + if (*lev->ch1_val > lev->max) + *lev->ch1_val = lev->max; + } + if (chn != 1) + { + *lev->ch2_val += step; + if (*lev->ch2_val > lev->max) + *lev->ch2_val = lev->max; + } + } + } + else + { + if (chn != 0 || + (*lev->ch1_val - step >= lev->min + && *lev->ch2_val - step >= lev->min)) + { + if (chn != 2) + { + *lev->ch1_val -= step; + if (*lev->ch1_val < lev->min) + *lev->ch1_val = lev->min; + } + if (chn != 1) + { + *lev->ch2_val -= step; + if (*lev->ch2_val < lev->min) + *lev->ch2_val = lev->min; + } + } + } + + if (lev->set_hook) + lev->set_hook(); + } + } // end for(;;) + } + else + { + const PGM_ATTR char *fmt = lev->unit ? PGM_STR("%d %s") : PGM_STR("%d"); + +/* + const int textw = MAX(PGM_FUNC(text_widthf)(lev->bitmap, fmt, lev->max, lev->unit), + PGM_FUNC(text_widthf)(lev->bitmap, fmt, lev->min, lev->unit)); + + const coord_t barlen = lev->bitmap->width - 6 - textw; +*/ + const coord_t barlen = lev->bitmap->width; + const coord_t barvtop = lev->bitmap->height / 2 - LBAR_HEIGHT/2 + lev->bitmap->font->height; + lbar_init(&bar1, lev->bitmap, LBAR_HORIZONTAL, + lev->min, lev->max, *lev->ch1_val, + 0, barvtop, barlen, barvtop + LBAR_HEIGHT); + + #if CONFIG_MENU_MENUBAR + mbar_init(&mb, lev->bitmap, labels, countof(labels)); + mbar_draw(&mb); + #endif /* CONFIG_MENU_MENUBAR */ + + /* Input loop for single level setting */ + for (;;) + { + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + ticks_t idle_timeout = timer_clock(); + #endif + do + { + if (lev->display_hook) + lev->display_hook(lev); + else + { + if (lev->type != LEVELEDIT_NOBAR) + { + lbar_setLevel(&bar1, *lev->ch1_val); + lbar_draw(&bar1); + } + PGM_FUNC(text_xyprintf)(lev->bitmap, 0, bar1.y1 - lev->bitmap->font->height, + TEXT_CENTER | TEXT_FILL, fmt, *lev->ch1_val, lev->unit); + } + + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + if (timer_clock() - idle_timeout > CONFIG_LEVELEDIT_TIMEOUT) + { + /* Accept input implicitly */ + keys = K_CANCEL; + break; + } + #endif + + } + while (!(keys = kbd_peek())); + + if (keys & K_CANCEL) + break; + + /* Increment step to achieve greater accelerations on larger values */ + if (keys & K_REPEAT) + step = MIN(rep_step, step + 1); + else + step = lev->step; + + if (keys & K_UP) + { + *lev->ch1_val += step; + if (*lev->ch1_val > lev->max) + *lev->ch1_val = lev->max; + } + + if (keys & K_DOWN) + { + *lev->ch1_val -= step; + if (*lev->ch1_val < lev->min) + *lev->ch1_val = lev->min; + } + + if (lev->set_hook) + lev->set_hook(); + } + } + + kbd_setRepeatMask(old_rpt_mask); +} + +/** + * LevelEdit structure initialization. + * Init data structure and init LevelEdit widgets. + */ +void level_init(struct LevelEdit *lev, + int type, + struct Bitmap *bmp, const char *title, const char *unit, + int min, int max, int step, + int *ch1_val, int *ch2_val, + level_set_callback *set_hook, display_callback *display_hook) +{ + lev->type = type; + lev->bitmap = bmp; + lev->title = title; + lev->unit = unit; + lev->min = min; + lev->max = max; + lev->step = step; + + lev->ch1_val = ch1_val; + lev->ch2_val = ch2_val; + lev->set_hook = set_hook; + lev->display_hook = display_hook; +} diff --git a/2.5/bertos/gui/leveledit.h b/2.5/bertos/gui/leveledit.h new file mode 100644 index 00000000..0158efbd --- /dev/null +++ b/2.5/bertos/gui/leveledit.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief Generic editor for (volume/gain/contrast/...) setting. + * + * \author Stefano Fedrigo + */ +#ifndef GUI_LEVELEDIT_H +#define GUI_LEVELEDIT_H + +//#include + +/* Type for level_init */ +#define LEVELEDIT_NOBAR 0 /**< Edit number only, without bar nor units */ +#define LEVELEDIT_SINGLE 1 /**< Single channel editing */ +#define LEVELEDIT_DOUBLE 2 /**< Double channel editing */ + + + +/* Fwd decl */ +struct Bitmap; +struct LevelEdit; + +/** Type for callback used to set meter levels */ +typedef void level_set_callback(void); + +/** Type for callback used to customize display of units */ +typedef void display_callback(struct LevelEdit *); + +/** + * State of a level meter + */ +typedef struct LevelEdit { + int type; /* + * + * --> + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief General pourpose menu handling functions + */ + +#include "menu.h" + +#include "cfg/cfg_menu.h" +#include "cfg/cfg_arch.h" + +#include +#include + +#include +#include +#include + +#include + +#include /* strcpy() */ + +#if CPU_HARVARD +#include /* strncpy_P() */ +#endif + +#if (CONFIG_MENU_TIMEOUT != 0) +#include +#endif + +#if CONFIG_MENU_MENUBAR +#include "menubar.h" +#endif + +#if defined(CONFIG_LOCALE) && (CONFIG_LOCALE == 1) +#include "msg.h" +#else +#define PTRMSG(x) ((const char *)x) +#endif + + +/* Temporary fake defines for ABORT stuff... */ +#define abort_top 0 +#define PUSH_ABORT false +#define POP_ABORT do {} while(0) +#define DO_ABORT do {} while(0) + + +/** + * Return the total number of items in in a menu. + */ +static int menu_count(const struct Menu *menu) +{ + int cnt = 0; + + for (cnt = 0; /*NOP*/; ++cnt) + { + const MenuItem *item = &menu->items[cnt]; +#if CPU_HARVARD + MenuItem ram_item; + if (menu->flags & MF_ROMITEMS) + { + memcpy_P(&ram_item, item, sizeof(ram_item)); + item = &ram_item; + } +#endif + if (!(item->label || item->hook)) + break; + } + + return cnt; +} + +#if CONFIG_MENU_MENUBAR + +/** + * Update the menu bar according to the selected item and redraw it. + */ +static void menu_update_menubar( + const struct Menu *menu, + struct MenuBar *mb, + int selected) +{ + int item_flags; +#if CPU_HARVARD + if (menu->flags & MF_ROMITEMS) + { + ASSERT(sizeof(menu->items[selected].flags) == sizeof(int)); + item_flags = pgm_read_int(&menu->items[selected].flags); + } + else +#endif + item_flags = menu->items[selected].flags; + + const_iptr_t newlabel = (const_iptr_t)LABEL_OK; + + if (item_flags & MIF_DISABLED) + newlabel = (const_iptr_t)LABEL_EMPTY; + else if (item_flags & MIF_TOGGLE) + newlabel = (const_iptr_t)LABEL_SEL; + else if (item_flags & MIF_CHECKIT) + { + newlabel = (item_flags & MIF_CHECKED) ? + (const_iptr_t)LABEL_EMPTY : (const_iptr_t)LABEL_SEL; + } + + mb->labels[3] = newlabel; + mbar_draw(mb); +} +#endif /* CONFIG_MENU_MENUBAR */ + + +static void menu_defaultRenderHook(struct Bitmap *bm, int ypos, bool selected, const struct MenuItem *item) +{ + if (item->flags & MIF_CHECKIT) + { + gfx_rectClear(bm, 0, ypos, + bm->font->height, ypos + bm->font->height); + + if (item->flags & MIF_TOGGLE) + gfx_rectDraw(bm, 2, ypos + 2, + bm->font->height - 2, ypos + bm->font->height - 2); + if (item->flags & MIF_CHECKED) + { + gfx_line(bm, + 3, ypos + 3, + bm->font->height - 3, ypos + bm->font->height - 3); + gfx_line(bm, + bm->font->height - 3, ypos + 3, + 3, ypos + bm->font->height - 3); + } + } + +#if CPU_HARVARD + ((item->flags & MIF_RAMLABEL) ? text_xyprintf : text_xyprintf_P) +#else + text_xyprintf +#endif + ( + bm, (item->flags & MIF_CHECKIT) ? bm->font->height : 0, ypos, + selected ? (STYLEF_INVERT | TEXT_FILL) : TEXT_FILL, + PTRMSG(item->label) + ); +} + +/** + * Show a menu on the display. + */ +static void menu_layout( + const struct Menu *menu, + int first_item, + int selected, + bool redraw) +{ + coord_t ypos; + int i; + const char * PROGMEM title = PTRMSG(menu->title); + Bitmap *bm = menu->bitmap; + + ypos = bm->cr.ymin; + + if (redraw) + { + /* Clear screen */ + text_clear(menu->bitmap); + } + + if (title) + { + if (redraw) + text_xyprintf(bm, 0, ypos, STYLEF_UNDERLINE | STYLEF_BOLD | TEXT_CENTER | TEXT_FILL, title); + ypos += bm->font->height; + } + +#if CONFIG_MENU_SMOOTH + static coord_t yoffset = 0; + static int old_first_item = 0; + static int speed; + coord_t old_ymin = bm->cr.ymin; + + /* Clip drawing inside menu items area */ + gfx_setClipRect(bm, + bm->cr.xmin, bm->cr.ymin + ypos, + bm->cr.xmax, bm->cr.ymax); + + if (old_first_item != first_item) + { + /* Speed proportional to distance */ + speed = ABS(old_first_item - first_item) * 3; + + if (old_first_item > first_item) + { + yoffset += speed; + if (yoffset > bm->font->height) + { + yoffset = 0; + --old_first_item; + } + } + else + { + yoffset -= speed; + if (yoffset < -bm->font->height) + { + yoffset = 0; + ++old_first_item; + } + } + first_item = MIN(old_first_item, menu_count(menu)); + + ypos += yoffset; + redraw = true; + } +#endif /* CONFIG_MENU_SMOOTH */ + + if (redraw) for (i = first_item; /**/; ++i) + { + const MenuItem *item = &menu->items[i]; +#if CPU_HARVARD + MenuItem ram_item; + if (menu->flags & MF_ROMITEMS) + { + memcpy_P(&ram_item, item, sizeof(ram_item)); + item = &ram_item; + } +#endif /* CPU_HARVARD */ + + /* Check for end of room */ + if (ypos > bm->cr.ymax) + break; + + /* Check for end of menu */ + if (!(item->label || item->hook)) + break; + + /* Only print visible items */ + if (!(item->flags & MIF_HIDDEN)) + { + /* Check if a special render function is supplied, otherwise use defaults */ + #if (ARCH & ARCH_NIGHTTEST) + #warning __FILTER_NEXT_WARNING__ + #endif + RenderHook renderhook = (item->flags & MIF_RENDERHOOK) ? (RenderHook)item->label : menu_defaultRenderHook; + + /* Render menuitem */ + renderhook(menu->bitmap, ypos++, (i == selected), item); + + ypos += bm->font->height; + } + } + +#if CONFIG_MENU_SMOOTH + if (redraw) + { + /* Clear rest of area */ + gfx_rectClear(bm, bm->cr.xmin, ypos, bm->cr.xmax, bm->cr.ymax); + + menu->lcd_blitBitmap(bm); + } + + /* Restore old cliprect */ + gfx_setClipRect(bm, + bm->cr.xmin, old_ymin, + bm->cr.xmax, bm->cr.ymax); + +#endif /* CONFIG_MENU_SMOOTH */ +} + + +/** + * Handle menu item selection + */ +static iptr_t menu_doselect(const struct Menu *menu, struct MenuItem *item) +{ + iptr_t result = 0; + + /* Exclude other items */ + int mask, i; + for (mask = item->flags & MIF_EXCLUDE_MASK, i = 0; mask; mask >>= 1, ++i) + { + if (mask & 1) + menu->items[i].flags &= ~MIF_CHECKED; + } + + if (item->flags & MIF_DISABLED) + return MENU_DISABLED; + + /* Handle checkable items */ + if (item->flags & MIF_TOGGLE) + item->flags ^= MIF_CHECKED; + else if (item->flags & MIF_CHECKIT) + item->flags |= MIF_CHECKED; + + /* Handle items with callback hooks */ + if (item->hook) + { + /* Push a jmp buffer to abort the operation with the STOP/CANCEL key */ + if (!PUSH_ABORT) + { + result = item->hook(item->userdata); + POP_ABORT; + } + } + else + result = item->userdata; + + return result; +} + + +/** + * Return the next visible item (rolls back to the first item) + */ +static int menu_next_visible_item(const struct Menu *menu, int index) +{ + int total = menu_count(menu); + int item_flags; + + do + { + if (++index >= total) + index = 0; + +#if CPU_HARVARD + if (menu->flags & MF_ROMITEMS) + { + ASSERT(sizeof(menu->items[index].flags) == sizeof(int)); + item_flags = pgm_read_int(&menu->items[index].flags); + } + else +#endif + item_flags = menu->items[index].flags; + } + while (item_flags & MIF_HIDDEN); + + return index; +} + + +/** + * Return the previous visible item (rolls back to the last item) + */ +static int menu_prev_visible_item(const struct Menu *menu, int index) +{ + int total = menu_count(menu); + int item_flags; + + do + { + if (--index < 0) + index = total - 1; + +#if CPU_HARVARD + if (menu->flags & MF_ROMITEMS) + { + ASSERT(sizeof(menu->items[index].flags) == sizeof(int)); + item_flags = pgm_read_int(&menu->items[index].flags); + } + else +#endif + item_flags = menu->items[index].flags; + } + while (item_flags & MIF_HIDDEN); + + return index; +} + + +/** + * Handle a menu and invoke hook functions for the selected menu items. + */ +iptr_t menu_handle(const struct Menu *menu) +{ + uint8_t items_per_page; + uint8_t first_item = 0; + uint8_t selected; + iptr_t result = 0; + bool redraw = true; + +#if (CONFIG_MENU_TIMEOUT != 0) + ticks_t now, menu_idle_time = timer_clock(); +#endif + +#if CONFIG_MENU_MENUBAR + struct MenuBar mb; + const_iptr_t labels[] = + { + (const_iptr_t)LABEL_BACK, + (const_iptr_t)LABEL_UPARROW, + (const_iptr_t)LABEL_DOWNARROW, + (const_iptr_t)0 + }; + + /* + * Initialize menu bar + */ + if (menu->flags & MF_TOPLEVEL) + labels[0] = (const_iptr_t)LABEL_EMPTY; + + mbar_init(&mb, menu->bitmap, labels, countof(labels)); +#endif /* CONFIG_MENU_MENUBAR */ + + + items_per_page = + (menu->bitmap->height / menu->bitmap->font->height - 1) +#if CONFIG_MENU_MENUBAR + - 1 /* menu bar labels */ +#endif + - (menu->title ? 1 : 0); + + /* Selected item should be a visible entry */ + //first_item = selected = menu_next_visible_item(menu, menu->selected - 1); + selected = menu->selected; + first_item = 0; + + for(;;) + { + keymask_t key; + + /* + * Keep selected item visible + */ + while (selected < first_item) + first_item = menu_prev_visible_item(menu, first_item); + while (selected >= first_item + items_per_page) + first_item = menu_next_visible_item(menu, first_item); + + menu_layout(menu, first_item, selected, redraw); + redraw = false; + + #if CONFIG_MENU_MENUBAR + menu_update_menubar(menu, &mb, selected); + #endif + + #if CONFIG_MENU_SMOOTH || (CONFIG_MENU_TIMEOUT != 0) + key = kbd_peek(); + #else + key = kbd_get(); + #endif + + #if (CONFIG_MENU_TIMEOUT != 0) + /* Reset idle timer on key press. */ + now = timer_clock(); + if (key) + menu_idle_time = now; + #endif + + if (key & K_OK) + { + struct MenuItem *item = &(menu->items[selected]); +#if CPU_HARVARD + MenuItem ram_item; + if (menu->flags & MF_ROMITEMS) + { + memcpy_P(&ram_item, item, sizeof(ram_item)); + item = &ram_item; + } +#endif + result = menu_doselect(menu, item); + redraw = true; + + /* Return immediately */ + if (!(menu->flags & MF_STICKY)) + break; + + #if (CONFIG_MENU_TIMEOUT != 0) + /* Chain timeout */ + if ((result == MENU_TIMEOUT) && !(menu->flags & MF_TOPLEVEL)) + break; + + /* Reset timeout */ + menu_idle_time = timer_clock(); + #endif + } + else if (key & K_UP) + { + selected = menu_prev_visible_item(menu, selected); + redraw = true; + } + else if (key & K_DOWN) + { + selected = menu_next_visible_item(menu, selected); + redraw = true; + } + else if (!(menu->flags & MF_TOPLEVEL)) + { + if (key & K_CANCEL) + { + result = MENU_CANCEL; + break; + } + + #if CONFIG_MENU_TIMEOUT != 0 + if (now - menu_idle_time > ms_to_ticks(CONFIG_MENU_TIMEOUT)) + { + result = MENU_TIMEOUT; + break; + } + #endif + } + } + + /* Store currently selected item before leaving. */ + if (menu->flags & MF_SAVESEL) + #if (ARCH & ARCH_NIGHTTEST) + #warning __FILTER_NEXT_WARNING__ + #endif + CONST_CAST(struct Menu *, menu)->selected = selected; + + return result; +} + + +/** + * Set flags on a menuitem. + * + * \param menu Menu owner of the item to change. + * \param idx Index of the menu item. + * \param flags Bit mask of the flags to set. + * + * \return Old flags. + */ +int menu_setFlags(struct Menu *menu, int idx, int flags) +{ + ASSERT(idx < menu_count(menu)); + ASSERT(!(menu->flags & MF_ROMITEMS)); + + int old = menu->items[idx].flags; + menu->items[idx].flags |= flags; + return old; +} + + +/** + * Clear flags on a menuitem. + * + * \param menu Menu owner of the item to change. + * \param idx Index of the menu item. + * \param flags Bit mask of the flags to clear. + * + * \return Old flags. + */ +int menu_clearFlags(struct Menu *menu, int idx, int flags) +{ + ASSERT(idx < menu_count(menu)); + ASSERT(!(menu->flags & MF_ROMITEMS)); + + int old = menu->items[idx].flags; + menu->items[idx].flags &= ~flags; + return old; +} diff --git a/2.5/bertos/gui/menu.h b/2.5/bertos/gui/menu.h new file mode 100644 index 00000000..b21b023f --- /dev/null +++ b/2.5/bertos/gui/menu.h @@ -0,0 +1,131 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Common menu handling API + * + * $WIZ$ module_name = "menu" + * $WIZ$ module_depends = "text", "gfx", "timer", "kbd" + */ + +#ifndef GUI_MENU_H +#define GUI_MENU_H + +#include + +#include + +/** Menu callback function */ +typedef iptr_t (*MenuHook)(iptr_t userdata); +typedef void (*BlitBitmap)(const Bitmap *bm); + +/** + * Menu item description. + */ +typedef struct MenuItem +{ + const_iptr_t label; /**< Item label (ID or ptr to string, 0 to disable) */ + int flags; /**< See MIF_#? definitions below */ + MenuHook hook; /**< Callback function (NULL to terminate item list) */ + iptr_t userdata; /**< User data to be passed back to the hook */ +} MenuItem; + +/** Render hook callback function prototype */ +typedef void (*RenderHook)(struct Bitmap *bitmap, int ypos, bool selected, const struct MenuItem *item); + +/** + * \name Flags for MenuItem.flags. + * \{ + */ +#define MIF_EXCLUDE_MASK 0x00FF /**< Mask for mutual exclusion map (shared with priority). */ +#define MIF_PRI_MASK 0x00FF /**< Mask for priority value (shared with mutual exclusion). */ +#define MIF_PRI(x) ((x) & MIF_PRI_MASK) /**< Set menu item priority. */ +#define MIF_EXCLUDE_0 BV(0) /**< Exclude item 0 when this item is checked */ +#define MIF_EXCLUDE_1 BV(1) /**< Exclude item 1 when this item is checked */ +#define MIF_EXCLUDE_2 BV(2) /**< Exclude item 2 when this item is checked */ +#define MIF_EXCLUDE_3 BV(3) /**< Exclude item 3 when this item is checked */ +#define MIF_EXCLUDE_4 BV(4) /**< Exclude item 4 when this item is checked */ +#define MIF_EXCLUDE_5 BV(5) /**< Exclude item 5 when this item is checked */ +#define MIF_EXCLUDE_6 BV(6) /**< Exclude item 6 when this item is checked */ +#define MIF_EXCLUDE_7 BV(7) /**< Exclude item 7 when this item is checked */ +#define MIF_CHECKED BV(8) /**< Item is currently checked */ +#define MIF_CHECKIT BV(9) /**< Automatically check this item when selected */ +#define MIF_TOGGLE BV(10) /**< Toggle MIF_CHECKED when item is selected */ +#define MIF_HIDDEN BV(11) /**< This menu item is not visible */ +#define MIF_DISABLED BV(12) /**< This menu item is not visible */ +#define MIF_RAMLABEL BV(13) /**< Item label is stored in RAM, not in program memory */ +#define MIF_RENDERHOOK BV(14) /**< Menu render function is passed in label field */ +/* \} */ + +/** + * Menu description. + */ +typedef struct Menu +{ + MenuItem *items; /**< Array of items (end with a NULL hook) */ + const_iptr_t title; /**< Menu title (ID or ptr to string, 0 to disable) */ + int flags; /**< See MF_#? definitions below */ + struct Bitmap *bitmap; /**< Bitmap where the menu is rendered */ + int selected; /**< Initial selection (written to if MF_SAVESEL is set). */ + BlitBitmap lcd_blitBitmap; /**< Callback to call to do smooth the display */ +} Menu; + +/** + * \name Flags for Menu.flags. + * \{ + */ +#define MF_STICKY BV(0) /**< Stay in the menu when the items called return */ +#define MF_TOPLEVEL BV(1) /**< Top-level menu (do not display "back" label) */ +#define MF_ROMITEMS BV(2) /**< Menu items are stored in ROM (default is RAM) */ +#define MF_SAVESEL BV(3) /**< Remember the selected item across invocations. */ +/* \} */ + +/** + * \name Special result codes for menu_handle(). + * \{ + */ +#define MENU_OK ((iptr_t)0) +#define MENU_CANCEL ((iptr_t)-1) +#define MENU_TIMEOUT ((iptr_t)-2) +#define MENU_ABORT ((iptr_t)-3) +#define MENU_DISABLED ((iptr_t)-4) +/* \} */ + +/* Function prototypes */ +iptr_t menu_handle(const struct Menu *menu); +int menu_setFlags(struct Menu *menu, int idx, int flags); +int menu_clearFlags(struct Menu *menu, int idx, int flags); + +#endif /* GUI_MENU_H */ diff --git a/2.5/bertos/gui/menubar.c b/2.5/bertos/gui/menubar.c new file mode 100644 index 00000000..81576bd8 --- /dev/null +++ b/2.5/bertos/gui/menubar.c @@ -0,0 +1,177 @@ +/** + * \file + * + * + * \brief Graphics Menu bar widget + * + * \author Stefano Fedrigo + * \author Francesco Sacchi + * + */ + +#include "menubar.h" + +#include +#include +#include +#include + +#warning FIXME:This module is obsolete, you must refactor it! + +#if 0 +#if CPU_AVR + #include /* strlen_P() */ +#else + #define strlen_P(s) strlen(s) + #define text_puts_P(s, b) text_puts(s, b) + #define pgm_read_uint16_t(addr) (*(addr)) +#endif + +#include /* strlen, memcpy */ + + +/** Predefined labels */ +static const pgm_char lab_1[] = ""; +static const pgm_char lab_2[] = "mute"; +static const pgm_char lab_3[] = "menu"; +static const pgm_char lab_4[] = "back"; +static const pgm_char lab_5[] = " ok "; +static const pgm_char lab_6[] = "Ch 1"; +static const pgm_char lab_7[] = "Ch 2"; +static const pgm_char lab_8[] = "C1+2"; +static const pgm_char lab_9[] = " "UP_ARROW" "; +static const pgm_char lab_10[] = " "DOWN_ARROW" "; +static const pgm_char lab_11[] = " - "; +static const pgm_char lab_12[] = " + "; +static const pgm_char lab_13[] = "sel "; +static const pgm_char lab_14[] = "lock"; +static const pgm_char lab_15[] = "unlock"; +static const pgm_char lab_16[] = "more"; +static const pgm_char lab_17[] = "edit"; +static const pgm_char lab_18[] = "fast"; +static const pgm_char lab_19[] = LEFT_ARROW" "; +static const pgm_char lab_20[] = " "RIGHT_ARROW; +static const pgm_char lab_21[] = "slow"; +static const pgm_char lab_22[] = "yes"; +static const pgm_char lab_23[] = "no"; + + +static const pgm_char * PROGMEM label_strings[LABEL_CNT] = { + lab_1, lab_2, lab_3, lab_4, lab_5, lab_6, lab_7, lab_8, lab_9, + lab_10, lab_11, lab_12, lab_13, lab_14, lab_15, lab_16, lab_17, + lab_18, lab_19, lab_20, lab_21, lab_22, lab_23 +}; + +/** + * Macro to access a label iptr_t: if a char pointer get the string pointed to + * in program memory, otherwise return the corrispondent predefined string + * (see label_strings in menubar.c) + */ +#define PTRLBL(x) ((unsigned int)(x) < 256 ? \ + (const pgm_char *)pgm_read_uint16_t(label_strings + (unsigned int)(x)) \ + : (const pgm_char *)(x)) + + +/** + * Initialize the MenuBar widget with the bitmap associated, + * the label names and the number of labels. + */ +void mbar_init( + struct MenuBar *mb, + struct Bitmap *bmp, + const_iptr_t labels[], + int num_labels) +{ + mb->bitmap = bmp; + mb->labels = labels; + mb->num_labels = num_labels; +} + + +/** + * Render the MenuBar on the bitmap. + */ +void mbar_draw(const struct MenuBar *mb) +{ + uint8_t oldstyle; + int i; + size_t maxlen = 0; /* Length of the longest label */ + coord_t x1, x2, y1, y2, label_padding; + + /* Maximum space available for a label */ + coord_t slot_width = mb->bitmap->width / mb->num_labels; + + /* Find longest label */ + for (i = 0; i < mb->num_labels; i++) + if (strlen_P(PTRLBL(mb->labels[i])) > maxlen) + maxlen = strlen_P(PTRLBL(mb->labels[i])); + + oldstyle = text_style(mb->bitmap, STYLEF_INVERT, STYLEF_MASK); + + /* y coords for menubar: bottom of the bitmap */ + y1 = mb->bitmap->height - FONT_HEIGHT; + y2 = mb->bitmap->height; + + /* Clear menubar area */ + gfx_rectClear(mb->bitmap, 0, y1, mb->bitmap->width, y2); + + for (i = 0; i < mb->num_labels; i++) + { + size_t lablen = strlen_P(PTRLBL(mb->labels[i])); + + /* Don't draw empty labels */ + if (mb->labels[i] == (const_iptr_t)LABEL_EMPTY) + continue; + + /* x coords: magic formula for equal distribution of the + * labels along bitmap + */ + label_padding = slot_width - (FONT_WIDTH * lablen + 2); + x1 = i * (slot_width + (label_padding / (mb->num_labels - 1))); + x2 = x1 + lablen * FONT_WIDTH + 1; + + /* Draw vertical line before. + * Uncomment +1 for "rounded" menubars */ + gfx_line(mb->bitmap, x1, y1 /* + 1 */, x1, y2); + + /* Draw text */ + text_setCoord(mb->bitmap, x1 + 1, y1); + text_puts_P(PTRLBL(mb->labels[i]), mb->bitmap); + + /* Draw vertical line after + * Uncomment +1 for "rounded" menubars */ + gfx_line(mb->bitmap, x2, y1 /* + 1 */, x2, y2); + } + + text_style(mb->bitmap, oldstyle, STYLEF_MASK); +} +#endif + diff --git a/2.5/bertos/gui/menubar.h b/2.5/bertos/gui/menubar.h new file mode 100644 index 00000000..a30dd46a --- /dev/null +++ b/2.5/bertos/gui/menubar.h @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief Graphic menu bar widget. + * + * \author Stefano Fedrigo + * + */ + +#ifndef GUI_MENUBAR_H +#define GUI_MENUBAR_H + +#include + +/** Predefined labels ids */ +enum LabelId +{ + LABEL_EMPTY, /* empty label */ + LABEL_MUTE, + LABEL_MENU, + LABEL_BACK, + LABEL_OK, + LABEL_CH_1, + LABEL_CH_2, + LABEL_C1PLUS2, + LABEL_UPARROW, + LABEL_DOWNARROW, + LABEL_MINUS, + LABEL_PLUS, + LABEL_SEL, + LABEL_LOCK, + LABEL_UNLOCK, + LABEL_MORE, + LABEL_EDIT, + LABEL_FAST, + LABEL_PREV, + LABEL_NEXT, + LABEL_SLOW, + LABEL_YES, + LABEL_NO, + + + LABEL_CNT +}; + +#define UP_ARROW "\x18" +#define DOWN_ARROW "\x19" +#define RIGHT_ARROW "\xC4\x1A" +#define LEFT_ARROW "\x10\xC4" + +/* Forward decl */ +struct Bitmap; + +typedef struct MenuBar +{ + struct Bitmap *bitmap; + const_iptr_t *labels; + int num_labels; +} MenuBar; + +void mbar_init( + struct MenuBar *mb, + struct Bitmap *bmp, + const_iptr_t *labels, + int num_labels); +void mbar_draw(const struct MenuBar *mb); + +#endif /* GUI_MENUBAR_H */ diff --git a/2.5/bertos/hw/hw_afsk.h b/2.5/bertos/hw/hw_afsk.h new file mode 100644 index 00000000..eae0ef73 --- /dev/null +++ b/2.5/bertos/hw/hw_afsk.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/bertos/hw/hw_blanker.h b/2.5/bertos/hw/hw_blanker.h new file mode 100644 index 00000000..442ce3f1 --- /dev/null +++ b/2.5/bertos/hw/hw_blanker.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_BALNCKER_H +#define HW_BALNCKER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BLK_LCDON /* power_LcdOn() Implement me! */ +#define BLK_LCDOFF /* power_LcdOff() Implement me! */ + + +#endif /* HW_BLANCKER_H */ + diff --git a/2.5/bertos/hw/hw_boot.h b/2.5/bertos/hw/hw_boot.h new file mode 100644 index 00000000..34238102 --- /dev/null +++ b/2.5/bertos/hw/hw_boot.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Bootloader hardware specific definition. + * + * \author Daniele Basile + */ + +#ifndef HW_BOOT_H +#define HW_BOOT_H + +/** + * Define bootloader flash size. + * + * Note: Remember that this size should be comply + * to size defined in linker script, otherwise you + * could not find the main program application. + */ +#define FLASH_BOOT_SIZE 0x8000 // 32kbyte + +#endif /* HW_BOOT_H */ diff --git a/2.5/bertos/hw/hw_buzzer.h b/2.5/bertos/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/2.5/bertos/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/bertos/hw/hw_buzzerled.h b/2.5/bertos/hw/hw_buzzerled.h new file mode 100644 index 00000000..afa01544 --- /dev/null +++ b/2.5/bertos/hw/hw_buzzerled.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Buzzerled hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_BUZZERLED_H +#define HW_BUZZERLED_H + +#warning TODO:This is an example implementation, you must implement it! + + +#endif /* HW_BUZZERLED_H */ diff --git a/2.5/bertos/hw/hw_cpufreq.h b/2.5/bertos/hw/hw_cpufreq.h new file mode 100644 index 00000000..41e3359d --- /dev/null +++ b/2.5/bertos/hw/hw_cpufreq.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_CPUFREQ_H +#define HW_CPUFREQ_H + +#ifndef CPU_FREQ + #warning CPU_FREQ is not defined, you should upgrade to the newer clock frequency defining method. + + /* + * This file is DEPRECATED, it will be removed in the next major release. + * We have set up a new cpu frequency definition method. + * The new macro CPU_FREQ should be defined as a compiler flag in the + * makefile instead of the old CLOCK_FREQ macro. With new projects you should only + * use the CPU_FREQ macro. + * + * With gcc you should add something like this: + * + * -D'CPU_FREQ=(12288000UL)' + * + * For backward compatibility the old method is still supported. + */ + #include "hw/hw_cpu.h" + + #define CPU_FREQ (CLOCK_FREQ) +#endif /* CPU_FREQ */ + +#endif /* HW_CPUFREQ_H */ diff --git a/2.5/bertos/hw/hw_dataflash.c b/2.5/bertos/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/bertos/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/bertos/hw/hw_dataflash.h b/2.5/bertos/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/bertos/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/bertos/hw/hw_dc_motor.h b/2.5/bertos/hw/hw_dc_motor.h new file mode 100644 index 00000000..f39388df --- /dev/null +++ b/2.5/bertos/hw/hw_dc_motor.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Define fuctions which read adc value from specific device + */ + #define HW_DC_MOTOR_READ_VALUE(dev, min, max) \ + ({ \ + /* Put here the fuction that read from ADC */ \ + (void)(dev); \ + (void)(min); \ + (void)(max); \ + (0); \ + }) + +// Macro that enable the select DC motor +#define DC_MOTOR_ENABLE(dev) /* Implement me! */ +// Macro that disable the select DC motor +#define DC_MOTOR_DISABLE(dev) /* Implement me! */ + +// Macro that left the DC motor rotor float +#define DC_MOTOR_STOP_FLOAT(dev) DC_MOTOR_DISABLE(dev) +// Macro that put in short circuit DC motor supply pins +#define DC_MOTOR_STOP_BRAKED(dev) do { /* Implement me! */ } while (0) + +// Macro that set motor direction +#define DC_MOTOR_SET_DIR(dev, dir) do { /* Implement me! */ } while (0) + +#define MOTOR_DC_INIT() do { /* Implement me! */ } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/bertos/hw/hw_ft245rl.h b/2.5/bertos/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/bertos/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/bertos/hw/hw_i2c_bitbang.h b/2.5/bertos/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/bertos/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/bertos/hw/hw_input.h b/2.5/bertos/hw/hw_input.h new file mode 100644 index 00000000..dbf3bc50 --- /dev/null +++ b/2.5/bertos/hw/hw_input.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Macro for HW_INPUT_H + * + * \author Andrea Grandi + */ + +#ifndef HW_INPUT_H +#define HW_INPUT_H + +#warning FIXME: This is an example implementation, you must implement it + +#define INPUT_INIT() do { /* implement me */} while(0) + +#endif /* HW_INPUT_H */ diff --git a/2.5/bertos/hw/hw_kbd.h b/2.5/bertos/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/2.5/bertos/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/bertos/hw/hw_lcd_32122a.h b/2.5/bertos/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/bertos/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/bertos/hw/hw_lcd_hd44.h b/2.5/bertos/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/bertos/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/bertos/hw/hw_led.h b/2.5/bertos/hw/hw_led.h new file mode 100644 index 00000000..615b071b --- /dev/null +++ b/2.5/bertos/hw/hw_led.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#warning FIXME: This is an example implementation, you must implement it + +#define LED_ON() do { /* implement me */} while(0) +#define LED_OFF() do { /* implement me */} while(0) + +#define LED_INIT() do { /* implement me */} while(0) + +#endif /* HW_LED_H */ diff --git a/2.5/bertos/hw/hw_lm75.h b/2.5/bertos/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/bertos/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/bertos/hw/hw_mcp41.c b/2.5/bertos/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/bertos/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/bertos/hw/hw_mcp41.h b/2.5/bertos/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/bertos/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/bertos/hw/hw_ntc.c b/2.5/bertos/hw/hw_ntc.c new file mode 100644 index 00000000..b8c56914 --- /dev/null +++ b/2.5/bertos/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id: hw_ntc.h 1359 2008-05-26 09:42:37Z asterix $ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/bertos/hw/hw_ntc.h b/2.5/bertos/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/bertos/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/bertos/hw/hw_phase.c b/2.5/bertos/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/bertos/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/bertos/hw/hw_phase.h b/2.5/bertos/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/bertos/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/bertos/hw/hw_rit128x96.h b/2.5/bertos/hw/hw_rit128x96.h new file mode 100644 index 00000000..c24d1a87 --- /dev/null +++ b/2.5/bertos/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/bertos/hw/hw_sd.h b/2.5/bertos/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/2.5/bertos/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/bertos/hw/hw_sensor.h b/2.5/bertos/hw/hw_sensor.h new file mode 100644 index 00000000..113e468f --- /dev/null +++ b/2.5/bertos/hw/hw_sensor.h @@ -0,0 +1,93 @@ +/** + * \file + * + * + * \brief Sensor hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SENSOR_H +#define HW_SENSOR_H + +#warning TODO:This is an example implementation, you must implement it! + +#define NUM_HOME_SENSORS 1 + + +INLINE bool hw_home_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +INLINE void hw_home_sensor_set_inverted(int sensor, bool inverted) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + (void)inverted; +} + +INLINE bool hw_level_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +INLINE void hw_level_sensor_set_inverted(int sensor, bool inverted) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + (void)inverted; +} + +INLINE bool bld_hw_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +#endif /* HW_SENSOR_H */ diff --git a/2.5/bertos/hw/hw_ser.h b/2.5/bertos/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/bertos/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/bertos/hw/hw_sipo.h b/2.5/bertos/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/2.5/bertos/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/bertos/hw/hw_spi.h b/2.5/bertos/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/bertos/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/bertos/hw/hw_spi_dma.h b/2.5/bertos/hw/hw_spi_dma.h new file mode 100644 index 00000000..e0714d43 --- /dev/null +++ b/2.5/bertos/hw/hw_spi_dma.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief SPI DMA driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_SPI_DMA_H +#define HW_SPI_DMA_H + +#define SPI_DMA_STROBE_INIT() do {/*PIOA_PER = BV(13); PIOA_OER = BV(13);*/} while(0) + +#define SPI_DMA_STROBE_ON() do {/*PIOA_CODR = BV(13);*/} while(0) +#define SPI_DMA_STROBE_OFF() do {/*PIOA_SODR = BV(13);*/} while(0) + +#endif /* HW_SPI_DMA_H */ diff --git a/2.5/bertos/hw/hw_stepper.h b/2.5/bertos/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/bertos/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/bertos/hw/hw_tas5706a.h b/2.5/bertos/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/bertos/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/bertos/hw/hw_tc520.h b/2.5/bertos/hw/hw_tc520.h new file mode 100644 index 00000000..3ff492d5 --- /dev/null +++ b/2.5/bertos/hw/hw_tc520.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * + * \brief TC520 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_TC520_H +#define HW_TC520_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define CE_PIN 0 +#define DV_PIN 0 +#define LOAD_PIN 0 +#define READ_PIN 0 + + +#define DV_HIGH() /* Implement me! */ +#define DV_LOW() /* Implement me! */ + +#define CE_HIGH() /* Implement me! */ +#define CE_LOW() /* Implement me! */ + +#define LOAD_HIGH() /* Implement me! */ +#define LOAD_LOW() /* Implement me! */ + +#define READ_HIGH() /* Implement me! */ +#define READ_LOW() /* Implement me! */ + +#define TC520_HW_INIT \ +do\ +{\ + /* Put here your code to init hardware */ \ +} while(0) + +#endif /* HW_TC520_H */ diff --git a/2.5/bertos/hw/hw_thermo.h b/2.5/bertos/hw/hw_thermo.h new file mode 100644 index 00000000..6f478068 --- /dev/null +++ b/2.5/bertos/hw/hw_thermo.h @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "hw/thermo_map.h" + +#include + +#include + + +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to read current temperature */ + return 0; +} + + +/** + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to turn off the thermo device */ +} + +/** + * Based on the current temperature \a cur_temp and the target temperature \a target, + * this function turns on and off specific thermo device. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + if (target - cur_temp > 0) + { + /* + * We are leveaving the target temperature, so + * turn on the thermo device! + */ + } + else + { + /* + * Ok, we are near the target temperature, so + * turn off the thermo device! + */ + } + +} + +#define THERMO_HW_INIT _thermo_hw_init() + +/** + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + /* Init your devices here! */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/bertos/hw/hw_timer.h b/2.5/bertos/hw/hw_timer.h new file mode 100644 index 00000000..ce1b985c --- /dev/null +++ b/2.5/bertos/hw/hw_timer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Timer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TIMER_H +#define HW_TIMER_H + +#include "cfg/cfg_timer.h" + +#if CONFIG_TIMER_STROBE + #warning TODO:This is an example implementation, you must implement it! + #define TIMER_STROBE_INIT do { /* implement me */ } while (0) + #define TIMER_STROBE_ON do { /* implement me */ } while (0) + #define TIMER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_TIMER_H */ diff --git a/2.5/bertos/hw/hw_tlv5618.h b/2.5/bertos/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/bertos/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/bertos/hw/hw_tmp123.h b/2.5/bertos/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/bertos/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/bertos/hw/kbd_map.h b/2.5/bertos/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/2.5/bertos/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/bertos/hw/mcp41_map.h b/2.5/bertos/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/bertos/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/bertos/hw/ntc_map.h b/2.5/bertos/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/bertos/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/bertos/hw/phase_map.h b/2.5/bertos/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/bertos/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/bertos/hw/pwm_map.h b/2.5/bertos/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/2.5/bertos/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/bertos/hw/thermo_map.h b/2.5/bertos/hw/thermo_map.h new file mode 100644 index 00000000..7dbe27bc --- /dev/null +++ b/2.5/bertos/hw/thermo_map.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/bertos/icons/Makefile b/2.5/bertos/icons/Makefile new file mode 100644 index 00000000..50469549 --- /dev/null +++ b/2.5/bertos/icons/Makefile @@ -0,0 +1,45 @@ +# +# $Id: Makefile 18234 2007-10-08 13:39:48Z rasky $ +# Copyright 2004, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Stefano Fedrigo +# +# $Log$ +# Revision 1.2 2006/09/20 14:18:01 marco +# Use only icons neede by demo. +# +# Revision 1.1 2006/09/19 17:48:00 bernie +# Add temporary logo. +# +# + +# Set to 1 for debug builds +DEBUG = 1 + +RASTERS = logo.raster + +FLIPIMAGE = flipimage +flipimage_SRC = flipimage.cpp +flipimage_OBJ = $(flipimage_SRC:%.cpp=%.o) + +.PHONY: all +all: $(RASTERS) + +# Link rule +$(FLIPIMAGE): $(flipimage_OBJ) + $(CXX) $^ $(flipimage_LIBS) $(LDFLAGS) -o $@ + +.PHONY: clean +clean: + rm -f $(TRG) $(flipimage_OBJ) + rm -f $(RASTERS) + +.PHONY: rasters +rasters: $(FLIPIMAGE) $(RASTERS) + +%.raster: %.png $(FLIPIMAGE) + convert $< txt:- | ./flipimage >$@ + +# Include dependencies +-include *.d diff --git a/2.5/bertos/icons/flipimage.cpp b/2.5/bertos/icons/flipimage.cpp new file mode 100644 index 00000000..3cf58197 --- /dev/null +++ b/2.5/bertos/icons/flipimage.cpp @@ -0,0 +1,125 @@ +/** + * \file + * + * + * \version $Id$ + * \author Stefano Fedrigo + * + * \brief Conversion tool from image TXT format to LCD bitmap + */ + +/* + * $Log$ + * Revision 1.1 2006/09/19 17:48:00 bernie + * Add temporary logo. + * + * Revision 1.3 2004/09/24 17:25:32 powersoft + * Fix for new version of ImageMagick. + * + * Revision 1.2 2004/03/13 22:52:54 aleph + * documentation fixes + * + * Revision 1.1 2004/01/26 15:31:17 aleph + * Add boot images and tools for importing them + * + */ + +#include +#include +#include + +extern "C" { +#include +#include +} + +#define RASTER_WIDTH 82 +#define RASTER_HEIGHT 64 + +// Minimum color level to consider a pixel on +#define COLOR_THRESHOLD 128 + + +using namespace std; + + +int main(void) +{ + char buf[64]; + int n; + unsigned char mask; + unsigned char line[RASTER_WIDTH]; + + for (int l = 0; l < RASTER_HEIGHT/8; l++) + { + mask = 1; + memset(line, 0, sizeof(line)); + + do + { + for (int x = 0; x < RASTER_WIDTH; x++) + { + if (!cin.getline(buf, sizeof(buf))) + goto print_line; + + istringstream ss(buf); + string s; + char c; + + ss + >> s // skip glob coord spec + >> c // skip open paren + >> n; // this is the red level + + //DEBUG + //cout << "s='" << s << "' n='" << n << "'" << endl; + + if (n < COLOR_THRESHOLD) + line[x] |= mask; + } + } + while (mask <<= 1); + +print_line: + cout << "\n\t"; + for (int x = 0; x < RASTER_WIDTH; x++) + { + printf("0x%02X", line[x]); + if (x % 8 == 7) + cout << ",\n\t"; + else + cout << ", "; + } + cout << endl; + } + + return 0; +} diff --git a/2.5/bertos/icons/logo.c b/2.5/bertos/icons/logo.c new file mode 100644 index 00000000..bdf14a3b --- /dev/null +++ b/2.5/bertos/icons/logo.c @@ -0,0 +1,115 @@ + +#include "logo.h" +#include +#include + +/** + * BeRTOS logo + */ +const PROGMEM uint8_t bertos_logo_raster[] = { + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + + 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, + 0x0E, 0x0E, 0xFE, 0xFE, 0xFE, 0xFC, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0x0E, 0x0E, 0x0E, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFC, 0x00, 0x1E, 0x1E, 0x1E, 0x1E, 0xFE, 0xFE, + 0xFE, 0xFE, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, 0xFC, + 0xFE, 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, 0x0E, 0x0E, + 0xFE, 0xFE, 0xFE, 0xFE, 0xFC, 0x00, 0xFC, 0xFE, + 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, 0x0E, 0xFE, 0xFE, + 0xFE, 0xFE, + + 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x78, 0x78, + 0x7C, 0xFC, 0xFF, 0xFF, 0xEF, 0xCF, 0x00, 0x00, + 0xFC, 0xFE, 0xFE, 0xFE, 0x1E, 0x1E, 0xFE, 0xFE, + 0xFE, 0xFE, 0xFC, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xF8, 0xF8, 0xF8, 0xFF, 0xFF, 0x7F, 0x3F, + 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, + 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x07, 0x0F, + 0x1F, 0x1F, 0x3F, 0x7E, 0xFC, 0xF8, 0xF1, 0xE1, + 0xC1, 0x81, + + 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xC0, + 0xC0, 0xC0, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0xC7, 0xC7, 0xF7, 0xF7, + 0xF7, 0xF7, 0xF3, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0x01, 0x0F, 0x3F, 0xFF, 0xFF, 0xFE, 0xF0, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, + 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xC0, 0xC0, 0xC0, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFE, 0xFE, + 0xFE, 0xFE, 0xFE, 0xC0, 0xC0, 0xC1, 0xFF, 0xFF, + 0xFF, 0xFF, + + 0x00, 0x00, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0xF1, 0x60, 0x80, + 0xF1, 0x43, 0xE3, 0x13, 0x13, 0xE3, 0x13, 0x13, + 0xF3, 0x13, 0x01, 0x00, 0xE3, 0x13, 0x13, 0xF3, + 0x43, 0xF0, 0x60, 0xC0, 0xF1, 0x03, 0xF3, 0x03, + 0x03, 0x30, 0xC0, 0x60, 0x10, 0x00, 0x03, 0xF3, + 0x43, 0xB3, 0x00, 0xF0, 0x50, 0x50, 0x00, 0xF1, + 0x53, 0xF3, 0x03, 0xF3, 0x63, 0xC3, 0xF3, 0x03, + 0xF3, 0x53, 0x53, 0x03, 0xF0, 0x00, 0x01, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, + 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, + 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, + 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, + 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, + 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x01, 0x00, + 0x01, 0x01, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +EXTERN_CONST struct Image bertos_logo = +{ + /* .raster = */ bertos_logo_raster, + /* .width = */ 82, + /* .height = */ 64, + /* .stride = */ 82 +}; + diff --git a/2.5/bertos/icons/logo.h b/2.5/bertos/icons/logo.h new file mode 100644 index 00000000..e0bbc636 --- /dev/null +++ b/2.5/bertos/icons/logo.h @@ -0,0 +1,3 @@ +#include + +extern const struct Image bertos_logo; diff --git a/2.5/bertos/icons/logo.png b/2.5/bertos/icons/logo.png new file mode 100755 index 0000000000000000000000000000000000000000..68fecaa8fe55dc774acb2e059ba61fd6d5f9fec5 GIT binary patch literal 343 zcmeAS@N?(olHy`uVBq!ia0vp^And@%3?w)I+2jGF7>k44ofy`glX(f`um$*pxB}__ z|Nk$&IsYz@#aZAHS<*&cu@Q1rlnk$;=$g^~h zA0HO;$=F#O{(QUh(3_a)8nptyFK^p^Yvaba_Xl$}o8Kw!vuHfJKd1WjUUM@JoqucJ jCm)Lo*L=EgW*Wnsd7oHHpT}$kdXd4?)z4*}Q$iB}c;kbD literal 0 HcmV?d00001 diff --git a/2.5/bertos/kern/coop.c b/2.5/bertos/kern/coop.c new file mode 100644 index 00000000..078724b4 --- /dev/null +++ b/2.5/bertos/kern/coop.c @@ -0,0 +1,32 @@ +/** + * \file + * + */ diff --git a/2.5/bertos/kern/irq.c b/2.5/bertos/kern/irq.c new file mode 100644 index 00000000..85608147 --- /dev/null +++ b/2.5/bertos/kern/irq.c @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Process scheduler (public interface). + * + * \version $Id$ + * \author Bernie Innocenti + * + * Still in development, disable nightly test for now + * notest: avr + * notest: arm + */ +#include "irq.h" + +#include +#include +#include + +#include "cfg/cfg_proc.h" + +#include // FIXME: move POSIX stuff to irq_posix.h + +MOD_DEFINE(irq) + +// FIXME +static void (*irq_handlers[100])(void); + +/* signal handler */ +void irq_entry(int signum) +{ + irq_handlers[signum](); +} + +void irq_register(int irq, void (*callback)(void)) +{ + irq_handlers[irq] = callback; +} + +void irq_init(void) +{ + struct sigaction act; + + act.sa_handler = irq_entry; + sigemptyset(&act.sa_mask); + //sigaddset(&act.sa_mask, irq); + act.sa_flags = SA_RESTART; // | SA_SIGINFO; + + sigaction(SIGUSR1, &act, NULL); + sigaction(SIGALRM, &act, NULL); + + MOD_INIT(irq); +} diff --git a/2.5/bertos/kern/irq.h b/2.5/bertos/kern/irq.h new file mode 100644 index 00000000..eb637021 --- /dev/null +++ b/2.5/bertos/kern/irq.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief Process scheduler (public interface). + * + * \version $Id$ + * \author Bernie Innocenti + */ +#ifndef KERN_IRQ_H +#define KERN_IRQ_H + +void irq_entry(int irq); +void irq_register(int irq, void (*handler)(void)); +void irq_init(void); + +#endif // KERN_IRQ_H diff --git a/2.5/bertos/kern/kfile.c b/2.5/bertos/kern/kfile.c new file mode 100644 index 00000000..d98f1548 --- /dev/null +++ b/2.5/bertos/kern/kfile.c @@ -0,0 +1,284 @@ +/** + * \file + * + * + * \brief Virtual KFile I/O interface. + * + * This module implements some generic I/O interfaces for kfile. + * + * \version $Id$ + * \author Francesco Sacchi + * \author Daniele Basile + */ + +#include "kfile.h" + +#include "cfg/cfg_kfile.h" +#include +#include + +#include +#include + +#include + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_KFILE_GETS) || ((CONFIG_KFILE_GETS != 0) && CONFIG_KFILE_GETS != 1) + #error CONFIG_KFILE_GETS must be set to either 0 or 1 in appconfig.h +#endif +#if !defined(CONFIG_PRINTF) + #error CONFIG_PRINTF missing in appconfig.h +#endif + + +/** + * Generic putc() implementation using \a fd->write. + */ +int kfile_putc(int _c, struct KFile *fd) +{ + unsigned char c = (unsigned char)_c; + + if (kfile_write(fd, &c, sizeof(c)) == sizeof(c)) + return (int)((unsigned char)_c); + else + return EOF; +} + +/** + * Generic getc() implementation using \a fd->read. + */ +int kfile_getc(struct KFile *fd) +{ + unsigned char c; + + if (kfile_read(fd, &c, sizeof(c)) == sizeof(c)) + return (int)((unsigned char)c); + else + return EOF; +} + +#if CONFIG_PRINTF +/** + * Formatted write. + */ +int kfile_printf(struct KFile *fd, const char *format, ...) +{ + va_list ap; + int len; + + va_start(ap, format); + len = _formatted_write(format, (void (*)(char, void *))kfile_putc, fd, ap); + va_end(ap); + + return len; +} +#endif /* CONFIG_PRINTF */ + +/** + * Write a string to kfile \a fd. + * \return 0 if OK, EOF in case of error. + */ +int kfile_print(struct KFile *fd, const char *s) +{ + while (*s) + { + if (kfile_putc(*s++, fd) == EOF) + return EOF; + } + return 0; +} + +#if CONFIG_KFILE_GETS +/** + * Read a line long at most as size and put it + * in buf. + * \return number of chars read or EOF in case + * of error. + */ +int kfile_gets(struct KFile *fd, char *buf, int size) +{ + return kfile_gets_echo(fd, buf, size, false); +} + + +/** + * Read a line long at most as size and put it + * in buf, with optional echo. + * + * \return number of chars read, or EOF in case + * of error. + */ +int kfile_gets_echo(struct KFile *fd, char *buf, int size, bool echo) +{ + int i = 0; + int c; + + for (;;) + { + if ((c = kfile_getc(fd)) == EOF) + { + buf[i] = '\0'; + return -1; + } + + /* FIXME */ + if (c == '\r' || c == '\n' || i >= size-1) + { + buf[i] = '\0'; + if (echo) + kfile_print(fd, "\r\n"); + break; + } + buf[i++] = c; + if (echo) + kfile_putc(c, fd); + } + + return i; +} +#endif /* !CONFIG_KFILE_GETS */ + + +/** + * Move \a fd file seek position of \a offset bytes from \a whence. + * + * This is a generic implementation of seek function, you can redefine + * it in your local module if needed. + */ +kfile_off_t kfile_genericSeek(struct KFile *fd, kfile_off_t offset, KSeekMode whence) +{ + kfile_off_t seek_pos; + + switch (whence) + { + + case KSM_SEEK_SET: + seek_pos = 0; + break; + case KSM_SEEK_END: + seek_pos = fd->size; + break; + case KSM_SEEK_CUR: + seek_pos = fd->seek_pos; + break; + default: + ASSERT(0); + return EOF; + break; + } + + #if LOG_LEVEL >= LOG_LVL_INFO + /* Bound check */ + if (seek_pos + offset > fd->size) + LOG_INFO("seek outside EOF\n"); + #endif + + fd->seek_pos = seek_pos + offset; + + return fd->seek_pos; +} + +/** + * Reopen file \a fd. + * This is a generic implementation that only flush file + * and reset seek_pos to 0. + */ +struct KFile * kfile_genericReopen(struct KFile *fd) +{ + kfile_flush(fd); + kfile_seek(fd, 0, KSM_SEEK_SET); + return fd; +} + +/** + * Close file \a fd. + * This is a generic implementation that only return 0. + */ +int kfile_genericClose(UNUSED_ARG(struct KFile *, fd)) +{ + return 0; +}; + + +/** + * Discard input to resynchronize with remote end. + * + * Discard incoming data until the kfile_getc stops receiving + * characters for at least \a delay milliseconds. + * + * \note If the timeout occur, we reset the error before to + * quit. + */ +void kfile_resync(KFile *fd, mtime_t delay) +{ + ticks_t start_time = timer_clock(); + for(;;) + { + if(kfile_getc(fd) != EOF) + start_time = timer_clock(); + + if ((timer_clock() - start_time) > ms_to_ticks(delay)) + { + kfile_clearerr(fd); + break; + } + + } +} + +/** + * Stub function that does nothing. + * This is a generic implementation that only return 0. + */ +static int kfile_generic(UNUSED_ARG(struct KFile *, fd)) +{ + return 0; +}; + + +/** + * Base class KFile constructor. + */ +void kfile_init(struct KFile *fd) +{ + ASSERT(fd); + memset(fd, 0, sizeof(*fd)); + fd->clearerr = (ClearErrFunc_t)kfile_generic; + fd->close = kfile_genericClose; + fd->error = kfile_generic; + fd->flush = kfile_generic; + fd->read = (ReadFunc_t)kfile_generic; + fd->reopen = kfile_genericReopen; + fd->seek = kfile_genericSeek; + fd->write = (WriteFunc_t)kfile_generic; +} + diff --git a/2.5/bertos/kern/kfile.h b/2.5/bertos/kern/kfile.h new file mode 100644 index 00000000..44c32b06 --- /dev/null +++ b/2.5/bertos/kern/kfile.h @@ -0,0 +1,289 @@ +/** + * \file + * + * + * \brief Virtual KFile I/O interface. + * + * KFile is a simple, generic interface for file I/O. It uses an + * object-oriented model to supply a device-neutral interface to + * communicate with drivers. + * + * This module contains only definitions, the instance structure + * and the common API. + * Each KFile subclass can override one or more methods of the interface, + * and can extend the base KFile structure with its own private data. + * For instance, a serial driver might implement the KFile interface by + * declaring a context structure like this: + * + * \code + * typedef struct Serial + * { + * // base class instance + * KFile fd; + * + * // private instance data + * FIFOBuffer txfifo, rxfifo; + * } Serial; + * \endcode + * + * You should also supply a macro for casting KFile to Serial: + * + * \code + * INLINE Serial * SERIAL_CAST(KFile *fd) + * { + * ASSERT(fd->_type == KFT_SERIAL); + * return (Serial *)fd; + * } + * \endcode + * + * Then you can implement as many interface functions as needed + * and leave the rest to NULL. + * + * Example implementation of the close KFile method for Serial: + * + * \code + * static int ser_kfile_close(struct KFile *fd) + * { + * Serial *fds = SERIAL_CAST(fd); + * // [driver specific code here] + * return 0; + * } + * \endcode + * + * The SERIAL_CAST() macro helps ensure that the passed object is + * really of type Serial. + * + * The KFile interface does not supply an open function: this is deliberate, + * because in embedded systems each device has its own init parameters. + * For the same reason, specific device settings like, for example, + * the baudrate, are not part of interface and should be handled by the + * driver-specific API. + * + * \version $Id$ + * \author Bernie Innocenti + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_kfile.h" + * $WIZ$ module_depends = "timer", "formatwr" + */ + +#ifndef KERN_KFILE_H +#define KERN_KFILE_H + +#include +#include +#include + +/* fwd decl */ +struct KFile; + +typedef int32_t kfile_off_t; ///< KFile offset type, used by kfile_seek(). + +/** + * Costants for repositioning read/write file offset. + * These are needed because on some embedded platforms + * ANSI I/O library may not be present. + */ +typedef enum KSeekMode +{ + KSM_SEEK_SET, ///< Seek from file beginning. + KSM_SEEK_CUR, ///< Seek from file current position. + KSM_SEEK_END, ///< Seek from file end. +} KSeekMode; + +/** + * Prototypes for KFile access functions. + * I/O file functions must be ANSI compliant. + * \note A KFile user can choose which function subset to implement, + * but has to set to NULL unimplemented features. + * \{ + */ + +/** + * Read from file. + * \return the number of bytes read. + */ +typedef size_t (*ReadFunc_t) (struct KFile *fd, void *buf, size_t size); + +/** + * Write to file. + * \return the number of bytes written. + */ +typedef size_t (*WriteFunc_t) (struct KFile *fd, const void *buf, size_t size); + +/** + * Seek into file (if seekable). + * \return the new file offset or EOF on errors. + */ +typedef kfile_off_t (*SeekFunc_t) (struct KFile *fd, kfile_off_t offset, KSeekMode whence); + +/** + * Close and reopen file \a fd. + * The reopening is done with the former file parameters and access modes. + */ +typedef struct KFile * (*ReOpenFunc_t) (struct KFile *fd); + +/** + * Close file. + * \return 0 on success, EOF on errors. + */ +typedef int (*CloseFunc_t) (struct KFile *fd); + +/** + * Flush file I/O. + * \return 0 on success, EOF on errors. + */ +typedef int (*FlushFunc_t) (struct KFile *fd); + +/** + * Get file error mask. + * \return 0 on success or file error code, device specific. + */ +typedef int (*ErrorFunc_t) (struct KFile *fd); + +/** + * Clear errors. + */ +typedef void (*ClearErrFunc_t) (struct KFile *fd); +/* \} */ + +/** + * Context data for callback functions which operate on + * pseudo files. + * + * \note Remember to add the corresponding accessor functions + * when extending this interface. + */ +typedef struct KFile +{ + ReadFunc_t read; + WriteFunc_t write; + ReOpenFunc_t reopen; + CloseFunc_t close; + SeekFunc_t seek; + FlushFunc_t flush; + ErrorFunc_t error; + ClearErrFunc_t clearerr; + DB(id_t _type); ///< Used to keep track, at runtime, of the class type. + + /* NOTE: these must _NOT_ be size_t on 16bit CPUs! */ + kfile_off_t seek_pos; + kfile_off_t size; +} KFile; + +/** + * Generic implementation of kfile_seek. + */ +kfile_off_t kfile_genericSeek(struct KFile *fd, kfile_off_t offset, KSeekMode whence); + +/** + * Generic implementation of kfile_reopen. + */ +struct KFile * kfile_genericReopen(struct KFile *fd); + +int kfile_genericClose(struct KFile *fd); + +int kfile_putc(int c, struct KFile *fd); ///< Generic putc implementation using kfile_write. +int kfile_getc(struct KFile *fd); ///< Generic getc implementation using kfile_read. +int kfile_printf(struct KFile *fd, const char *format, ...); +int kfile_print(struct KFile *fd, const char *s); +int kfile_gets(struct KFile *fd, char *buf, int size); +int kfile_gets_echo(struct KFile *fd, char *buf, int size, bool echo); +void kfile_resync(KFile *fd, mtime_t delay); +void kfile_init(struct KFile *fd); + +/** + * Interface functions for KFile access. + * \note Remember to change following functions if KFile interface changes. + * \{ + */ +INLINE size_t kfile_read(struct KFile *fd, void *buf, size_t size) +{ + ASSERT(fd->read); + return fd->read(fd, buf, size); +} + +INLINE size_t kfile_write(struct KFile *fd, const void *buf, size_t size) +{ + ASSERT(fd->write); + return fd->write(fd, buf, size); +} + +INLINE KFile * kfile_reopen(struct KFile *fd) +{ + ASSERT(fd->reopen); + return fd->reopen(fd); +} + +INLINE int kfile_close(struct KFile *fd) +{ + ASSERT(fd->close); + return fd->close(fd); +} + +INLINE kfile_off_t kfile_seek(struct KFile *fd, kfile_off_t offset, KSeekMode whence) +{ + ASSERT(fd->seek); + return fd->seek(fd, offset, whence); +} + +INLINE int kfile_flush(struct KFile *fd) +{ + ASSERT(fd->flush); + return fd->flush(fd); +} + +INLINE int kfile_error(struct KFile *fd) +{ + ASSERT(fd->error); + return fd->error(fd); +} + +INLINE void kfile_clearerr(struct KFile *fd) +{ + ASSERT(fd->clearerr); + fd->clearerr(fd); +} +/* \} */ + +/** + * Kfile test function. + */ +int kfile_testSetup(void); +int kfile_testRun(void); +int kfile_testRunGeneric(KFile *fd, uint8_t *test_buf, uint8_t *save_buf, size_t size); +int kfile_testTearDown(void); + + +#endif /* KERN_KFILE_H */ diff --git a/2.5/bertos/kern/kfile_test.c b/2.5/bertos/kern/kfile_test.c new file mode 100644 index 00000000..36fde490 --- /dev/null +++ b/2.5/bertos/kern/kfile_test.c @@ -0,0 +1,323 @@ +/** + * \file + * + * + * \brief Test suite for virtual KFile I/O interface. + * + * This module implements a test for some generic I/O interfaces for kfile. + * + * \version $Id$ + * \author Francesco Sacchi + * \author Daniele Basile + */ + + +#include "kfile.h" +#include + +#include "cfg/cfg_kfile.h" +#include +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL KFILE_LOG_LEVEL +#define LOG_FORMAT KFILE_LOG_FORMAT +#include + +#include + +#include + +MOD_DEFINE(kfile_test); + +// Size of the "virtual" disk that +// we want to test. +#define BUF_TEST_LEN 3209 + +// Buffer for test +uint8_t test_buf[BUF_TEST_LEN]; +uint8_t test_buf_save[BUF_TEST_LEN]; + +uint8_t test_disk[BUF_TEST_LEN]; +KFileMem mem; + +/* + * Help function to init disk and the buffers. + */ +static void init_testBuf(void) +{ + + kprintf("Init fake buffer..\n"); + for (int i = 0; i < BUF_TEST_LEN; i++) + { + test_disk[i] = i; + kprintf("%d ", test_disk[i]); + } + kprintf("\nend\n"); + + memset(test_buf, 0, sizeof(test_buf)); + memset(test_buf_save, 0, sizeof(test_buf_save)); +} + +/** + * KFile read/write subtest. + * Try to write/read in the same \a f file location \a size bytes. + * \return true if all is ok, false otherwise + * \note Restore file position at exit (if no error) + * \note Test buffer \a buf must be filled with + * the following statement: + * 
+ * buf[i] = i & 0xff
+ *
+ */ +static bool kfile_rwTest(KFile *f, uint8_t *buf, size_t size) +{ + /* + * Write test buffer + */ + if (kfile_write(f, buf, size) != size) + return false; + + kfile_seek(f, -(kfile_off_t)size, KSM_SEEK_CUR); + + /* + * Reset test buffer + */ + memset(buf, 0, size); + + /* + * Read file in test buffer + */ + if (kfile_read(f, buf, size) != size) + return false; + + kfile_seek(f, -(kfile_off_t)size, KSM_SEEK_CUR); + + /* + * Check test result + */ + for (size_t i = 0; i < size; i++) + if (buf[i] != (i & 0xff)) + return false; + + return true; +} + +/** + * KFile read/write test. + * This function write and read \a test_buf long \a size + * on \a fd handler. + * \a save_buf can be NULL or a buffer where to save previous file content. + */ +int kfile_testRunGeneric(KFile *fd, uint8_t *test_buf, uint8_t *save_buf, size_t size) +{ + + /* + * Part of test buf size that you would write. + * This var is used in test 3 to check kfile_write + * when writing beyond filesize limit. + */ + kfile_off_t len = size / 2; + + + /* Fill test buffer */ + for (size_t i = 0; i < size; i++) + test_buf[i] = (i & 0xff); + + /* + * If necessary, user can save content, + * for later restore. + */ + if (save_buf) + { + LOG_INFO("Saved content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + kfile_read(fd, save_buf, size); + } + + /* TEST 1 BEGIN. */ + LOG_INFO("Test 1: write from pos 0 to [%ld]\n", (long)size); + + /* + * Seek to addr 0. + */ + if (kfile_seek(fd, 0, KSM_SEEK_SET) != 0) + goto kfile_test_end; + + /* + * Test read/write to address 0..size + */ + if (!kfile_rwTest(fd, test_buf, size)) + goto kfile_test_end; + + LOG_INFO("Test 1: ok!\n"); + + /* + * Restore previous read content. + */ + if (save_buf) + { + kfile_seek(fd, 0, KSM_SEEK_SET); + + if (kfile_write(fd, save_buf, size) != size) + goto kfile_test_end; + + LOG_INFO("Restore content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + } + /* TEST 1 END. */ + + /* TEST 2 BEGIN. */ + LOG_INFO("Test 2: write from pos [%ld] to [%ld]\n", fd->size/2 , fd->size/2 + size); + + /* + * Go to half test size. + */ + kfile_seek(fd, (fd->size / 2), KSM_SEEK_SET); + + /* + * If necessary, user can save content + * for later restore. + */ + if (save_buf) + { + kfile_read(fd, save_buf, size); + kfile_seek(fd, -(kfile_off_t)size, KSM_SEEK_CUR); + LOG_INFO("Saved content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + } + + /* + * Test read/write to address filesize/2 ... filesize/2 + size + */ + if (!kfile_rwTest(fd, test_buf, size)) + goto kfile_test_end; + + LOG_INFO("Test 2: ok!\n"); + + /* + * Restore previous content. + */ + if (save_buf) + { + kfile_seek(fd, -(kfile_off_t)size, KSM_SEEK_CUR); + + if (kfile_write(fd, save_buf, size) != size) + goto kfile_test_end; + + LOG_INFO("Restore content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + } + + /* TEST 2 END. */ + + /* TEST 3 BEGIN. */ + LOG_INFO("Test 3: write outside of fd->size limit [%ld]\n", fd->size); + + /* + * Go to the Flash end + */ + kfile_seek(fd, -len, KSM_SEEK_END); + + /* + * If necessary, user can save content, + * for later restore. + */ + if (save_buf) + { + kfile_read(fd, save_buf, len); + kfile_seek(fd, -len, KSM_SEEK_CUR); + LOG_INFO("Saved content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + len); + } + + /* + * Test read/write to address (filesize - size) ... filesize + */ + if (kfile_rwTest(fd, test_buf, size)) + goto kfile_test_end; + + kprintf("Test 3: ok!\n"); + + /* + * Restore previous read content + */ + if (save_buf) + { + kfile_seek(fd, -len, KSM_SEEK_END); + + if ((kfile_off_t)kfile_write(fd, save_buf, len) != len) + goto kfile_test_end; + + LOG_INFO("Restore content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + len); + } + + /* TEST 3 END. */ + + kfile_close(fd); + return 0; + +kfile_test_end: + kfile_close(fd); + LOG_ERR("One kfile_test failed!\n"); + return EOF; +} + + + + +/** + * Setup all needed for kfile test + */ +int kfile_testSetup(void) +{ + MOD_INIT(kfile_test); + LOG_INFO("Mod init..ok\n"); + + // Init our backend and the buffers + kfilemem_init(&mem, test_disk, BUF_TEST_LEN); + init_testBuf(); + + return 0; +} + +int kfile_testRun(void) +{ + return kfile_testRunGeneric(&mem.fd, test_buf, test_buf_save, BUF_TEST_LEN); +} + +/** + * End a dataflash Test. + * (Unused) + */ +int kfile_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(kfile); + diff --git a/2.5/bertos/kern/monitor.c b/2.5/bertos/kern/monitor.c new file mode 100644 index 00000000..edcf7776 --- /dev/null +++ b/2.5/bertos/kern/monitor.c @@ -0,0 +1,167 @@ +/** + * \file + * + * + * \brief Monitor to check for stack overflows + * + * \version $Id$ + * \author Giovanni Bajo + */ + + +#include "monitor.h" + +#if CONFIG_KERN_MONITOR + +#include "proc_p.h" +#include +#include + +#include + +#include + +#include + +#include /* CPU_STACK_GROWS_UPWARD */ + +/* Access to this list must be protected against the scheduler */ +static List MonitorProcs; + +void monitor_init(void) +{ + LIST_INIT(&MonitorProcs); +} + + +void monitor_add(Process *proc, const char *name) +{ + proc->monitor.name = name; + + PROC_ATOMIC(ADDTAIL(&MonitorProcs, &proc->monitor.link)); +} + + +void monitor_remove(Process *proc) +{ + PROC_ATOMIC(REMOVE(&proc->monitor.link)); +} + +void monitor_rename(Process *proc, const char *name) +{ + proc->monitor.name = name; +} + +size_t monitor_checkStack(cpu_stack_t *stack_base, size_t stack_size) +{ + cpu_stack_t *beg; + cpu_stack_t *cur; + cpu_stack_t *end; + int inc; + size_t sp_free; + + + beg = stack_base; + end = stack_base + stack_size / sizeof(cpu_stack_t); + inc = +1; + + if (CPU_STACK_GROWS_UPWARD) + { + SWAP(beg, end); + inc = -1; + } + + cur = beg; + while (cur != end) + { + if (*cur != CONFIG_KERN_STACKFILLCODE) + break; + + cur += inc; + } + + sp_free = ABS(cur - beg) * sizeof(cpu_stack_t); + return sp_free; +} + + +void monitor_report(void) +{ + Node *node; + int i; + + proc_forbid(); + kprintf("%-9s%-9s%-9s%-9s%s\n", "TCB", "SPbase", "SPsize", "SPfree", "Name"); + for (i = 0; i < 56; i++) + kputchar('-'); + kputchar('\n'); + + FOREACH_NODE(node, &MonitorProcs) + { + Process *p = containerof(node, Process, monitor.link); + size_t free = monitor_checkStack(p->stack_base, p->stack_size); + kprintf("%-9p%-9p%-9zu%-9zu%s\n", + p, p->stack_base, p->stack_size, free, p->monitor.name); + } + proc_permit(); +} + + +static void NORETURN monitor(void) +{ + Node *node; + + for (;;) + { + proc_forbid(); + FOREACH_NODE(node, &MonitorProcs) + { + Process *p = containerof(node, Process, monitor.link); + size_t free = monitor_checkStack(p->stack_base, p->stack_size); + + if (p->stack_base && free < 0x20) + kprintf("MONITOR: Free stack of process '%s' is only %u chars\n", + p->monitor.name, (unsigned int)free); + } + proc_permit(); + + /* Give some rest to the system */ + timer_delay(500); + } +} + +void monitor_start(size_t stacksize, cpu_stack_t *stack) +{ + struct Process *p = proc_new(monitor, NULL, stacksize, stack); + proc_setPri(p, -10); +} + +#endif /* CONFIG_KERN_MONITOR */ diff --git a/2.5/bertos/kern/monitor.h b/2.5/bertos/kern/monitor.h new file mode 100644 index 00000000..e2a4742a --- /dev/null +++ b/2.5/bertos/kern/monitor.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief Monitor to check for stack overflows + * + * \version $Id$ + * + * \author Giovanni Bajo + * + * $WIZ$ module_name = "monitor" + * $WIZ$ module_depends = "kernel" + * $WIZ$ module_configuration = "bertos/cfg/cfg_monitor.h" + */ + +#ifndef KERN_MONITOR_H +#define KERN_MONITOR_H + +#include "cfg/cfg_monitor.h" + +#include + +/** + * Start the kernel monitor. It is a special process which checks every second the stacks of the + * running processes trying to detect stack overflows. + * + * \param stacksize Size of stack in chars + * \param stack Pointer to the stack that will be used by the monitor + * + * \note The stack is provided by the caller so that there is no wasted space if the monitor + * is not used. + */ +void monitor_start(size_t stacksize, cpu_stack_t *stack); + + +/** + * Manually check if a given stack has overflown. This is used to check for stacks + * of processes handled externally form the kernel, or for other stacks (for instance + * the interrupt supervisor stack). + * + * \note For this function to work, the stack must have been filled at startup with + * CONFIG_KERN_STACKFILLCODE. + */ +size_t monitor_checkStack(cpu_stack_t *stack_base, size_t stack_size); + + +/** Print a report of the stack status through kdebug */ +void monitor_report(void); + +#endif /* KERN_MONITOR_H */ diff --git a/2.5/bertos/kern/msg.h b/2.5/bertos/kern/msg.h new file mode 100644 index 00000000..f00f6060 --- /dev/null +++ b/2.5/bertos/kern/msg.h @@ -0,0 +1,298 @@ +/** + * \file + * + * + * + * This module implements a common system for executing + * a user defined action calling a hook function. + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Simple inter-process messaging system + * + * Handle queues of messages associated an action. + * + * A message port is an abstraction used to exchange information + * asynchronously between processes or other entities such as + * interrupts and call-back functions. + * + * This form of IPC is higher-level than bare signals and + * semaphores, because it sets a policy for exchanging + * structured data with well-defined synchronization and + * ownership semantics. + * + * Before using it, a message port must be initialized by + * calling msg_initPort(), which associates the port with + * an Event object, which can be setup to signal a process + * or invoke a call-back hook. + * + * A process or interrupt routine can deliver messages to any + * message port by calling msg_put(). By sending a message, + * the sender temporarly or permanently transfers ownership + * of its associated data to the receiver. + * + * Queuing a message to a port automatically triggers the + * associated Event to notify the receiver. When the + * receiver wakes up, it usually invokes msg_get() to pick + * the next message from the port. + * + * \note + * When you put a message into a port, such message becomes + * unavailable until you retrieve it using msg_get(), eg. + * you must not delete it or put it into another port. + * + * Message ports can hold any number of pending messages, + * and receivers usually process them in FIFO order. + * Other scheduling policies are possible, but not implemented + * in this API. + * + * After the receiver has done processing a message, it replies + * it back to the sender with msg_reply(), which transfer + * ownership back to the original sender. Replies are delivered + * to a reply port, which is nothing more than another MsgPort + * structure designated by the sender. + * + * Returning messages to senders is not mandatory, but it provides + * a convenient way to provide some kind of result and simplify + * the resource allocation scheme at the same time. + * + * When using signals to receive messages in a process, you + * call sig_wait() in an event-loop to wake up when messages + * are delivered to any of your ports. When your process + * wakes up with the port signal active, multiple messages + * may already have queued up at the message port, and the + * process must process them all before returning to sleep. + * Signals don't keep a nesting count. + * + * A simple message loop works like this: + * + * \code + * // Our message port. + * static MsgPort test_port; + * + * // A test message with two parameters and a result. + * typedef struct + * { + * Msg msg; + * + * int x, y; + * int result; + * } TestMsg; + * + * + * PROC_DEFINE_STACK(sender_stack, KERN_MINSTACKSIZE); + * + * // A process that sends two messages and waits for replies. + * static void sender_proc(void) + * { + * MsgPort test_reply_port; + * TestMsg msg1; + * TestMsg msg2; + * Msg *reply; + * + * msg_initPort(&test_reply_port, + * event_createSignal(proc_current(), SIG_SINGLE); + * + * // Fill-in first message and send it out. + * msg1.x = 3; + * msg1.y = 2; + * msg1.msg.replyPort = &test_reply_port; + * msg_put(&test_port, &msg1.msg); + * + * // Fill-in second message and send it out too. + * msg2.x = 5; + * msg2.y = 4; + * msg2.msg.replyPort = &test_reply_port; + * msg_put(&test_port, &msg2.msg); + * + * // Wait for a reply... + * sig_wait(SIG_SINGLE); + * + reply = containerof(msg_get(&test_reply_port), TestMsg, msg); + * ASSERT(reply != NULL); + * ASSERT(reply->result == 5); + * + * // Get reply to second message. + * while (!(reply = containerof(msg_get(&test_reply_port), TestMsg, msg))) + * { + * // Not yet, be patient and wait some more. + * sig_wait(SIG_SINGLE); + * } + * + * ASSERT(reply->result == 9); + * } + * + * + * // Receive messages and do something boring with them. + * static void receiver_proc(void) + * { + * msg_initPort(&test_port, + * event_createSignal(proc_current(), SIG_EXAMPLE); + * + * proc_new(sender_proc, NULL,sizeof(sender_stack), sender_stack); + * + * for (;;) + * { + * sigmask_t sigs = sig_wait(SIG_EXAMPLE | more_signals); + * + * if (sigs & SIG_EXAMPLE) + * { + * TestMsg *emsg; + * while((emsg = containerof(msg_get(&test_port), TestMsg, msg))) + * { + * // Do something with the message + * emsg->result = emsg->x + emsg->y; + * msg_reply(emsg->msg); + * } + * } + * } + * } + * \endcode + * + * $WIZ$ module_name = "msg" + * $WIZ$ module_depends = "event", "signal", "kernel" + */ + + +#ifndef KERN_MSG_H +#define KERN_MSG_H + +#include +#include +#include + +typedef struct MsgPort +{ + List queue; /**< Messages queued at this port. */ + Event event; /**< Event to trigger when a message arrives. */ +} MsgPort; + + +typedef struct Msg +{ + Node link; /**< Link into message port queue. */ + MsgPort *replyPort; /**< Port to which the msg is to be replied. */ + /* User data may follow */ +} Msg; + + +/** + * Lock a message port. + * + * This is required before reading or manipulating + * any field of the MsgPort structure. + * + * \note Ports may be locked multiple times and each + * call to msg_lockPort() must be paired with + * a corresponding call to msg_unlockPort(). + * + * \todo Add a configurable policy for locking against + * interrupts and locking with semaphorse. + * + * \see msg_unlockPort() + */ +INLINE void msg_lockPort(UNUSED_ARG(MsgPort *, port)) +{ + proc_forbid(); +} + +/** + * Unlock a message port. + * + * \see msg_lockPort() + */ +INLINE void msg_unlockPort(UNUSED_ARG(MsgPort *, port)) +{ + proc_permit(); +} + + +/** Initialize a message port */ +INLINE void msg_initPort(MsgPort *port, Event event) +{ + LIST_INIT(&port->queue); + port->event = event; +} + +/** Queue \a msg into \a port, triggering the associated event */ +INLINE void msg_put(MsgPort *port, Msg *msg) +{ + msg_lockPort(port); + ADDTAIL(&port->queue, &msg->link); + msg_unlockPort(port); + + event_do(&port->event); +} + +/** + * Get the first message from the queue of \a port. + * + * \return Pointer to the message or NULL if the port was empty. + */ +INLINE Msg *msg_get(MsgPort *port) +{ + Msg *msg; + + msg_lockPort(port); + msg = (Msg *)list_remHead(&port->queue); + msg_unlockPort(port); + + return msg; +} + +/** Peek the first message in the queue of \a port, or NULL if the port is empty. */ +INLINE Msg *msg_peek(MsgPort *port) +{ + Msg *msg; + + msg_lockPort(port); + msg = (Msg *)port->queue.head.succ; + if (LIST_EMPTY(&port->queue)) + msg = NULL; + msg_unlockPort(port); + + return msg; +} + +/** Send back (reply) \a msg to its sender. */ +INLINE void msg_reply(Msg *msg) +{ + msg_put(msg->replyPort, msg); +} + +int msg_testRun(void); +int msg_testSetup(void); +int msg_testTearDown(void); + +#endif /* KERN_MSG_H */ diff --git a/2.5/bertos/kern/msg_test.c b/2.5/bertos/kern/msg_test.c new file mode 100644 index 00000000..bcb20ea2 --- /dev/null +++ b/2.5/bertos/kern/msg_test.c @@ -0,0 +1,292 @@ +/** + * \file + * + * + * \brief Message test. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + */ + +#include "cfg/cfg_timer.h" +#include +#include +#include + +#include +#include +#include + +#include + +#include + +/* + * In the nightly build test, signals are disables, so this + * code won't compile. + * Since this code is used when we run "make check" it will be + * compiled and therefor tested there. + */ +#if CONFIG_KERN_SIGNALS + + +// Global settings for the test. +#define MAX_GLOBAL_COUNT 11040 +#define TEST_TIME_OUT_MS 5000 +#define DELAY 5 + +// Settings for the test message. +//Process 0 +#define INC_PROC_T0 1 +#define DELAY_PROC_T0 INC_PROC_T0*DELAY +//Process 1 +#define INC_PROC_T1 3 +#define DELAY_PROC_T1 INC_PROC_T1*DELAY +//Process 2 +#define INC_PROC_T2 5 +#define DELAY_PROC_T2 INC_PROC_T2*DELAY +//Process 3 +#define INC_PROC_T3 7 +#define DELAY_PROC_T3 INC_PROC_T3*DELAY +//Process 4 +#define INC_PROC_T4 11 +#define DELAY_PROC_T4 INC_PROC_T4*DELAY +//Process 5 +#define INC_PROC_T5 13 +#define DELAY_PROC_T5 INC_PROC_T5*DELAY + +/* + * These macros generate the code needed to create the test process functions. + */ +#define RECV_PROC(num, sig) \ +static NORETURN void receiver_proc##num(void) \ +{ \ + TestMsg *rec_msg; \ + for(;;) \ + { \ + sig_wait(sig); \ + kprintf("Proc[%d]..get message\n", num); \ + rec_msg = containerof(msg_get(&test_port##num), TestMsg, msg); \ + timer_delay(rec_msg->delay); \ + rec_msg->result += rec_msg->val; \ + kprintf("Proc[%d]..process message val[%d],delay[%d],res[%d]\n", num, rec_msg->val, rec_msg->delay, rec_msg->result); \ + msg_reply(&rec_msg->msg); \ + process_num++; \ + kprintf("Proc[%d] reply\n", num); \ + } \ +} + +#define SEND_MSG(num) \ + do { \ + kprintf("Main send message to proc[%d]\n", num); \ + msg##num.msg.replyPort = &test_portMain; \ + msg_put(&test_port##num, &msg##num.msg); \ + } while(0) + +#define RECV_STACK(num) PROC_DEFINE_STACK(receiver_stack##num, KERN_MINSTACKSIZE * 2) +#define RECV_INIT_PROC(num) proc_new(receiver_proc##num, NULL, sizeof(receiver_stack##num), receiver_stack##num) +#define RECV_INIT_MSG(num, proc, sig) msg_initPort(&test_port##num, event_createSignal(proc, sig)) + +// A test message with the parameters and a result. +typedef struct +{ + Msg msg; + + int val; + int delay; + int result; +} TestMsg; + +// Global count to check if the test is going ok. +static int count = 0; +static int process_num; + +// Our message port. +static MsgPort test_port0; +static MsgPort test_port1; +static MsgPort test_port2; +static MsgPort test_port3; +static MsgPort test_port4; +static MsgPort test_port5; + +/* + * Generate the process to test message. + */ +RECV_PROC(0, SIG_USER0) +RECV_PROC(1, SIG_USER1) +RECV_PROC(2, SIG_USER2) +RECV_PROC(3, SIG_USER3) +RECV_PROC(4, SIG_SYSTEM5) +RECV_PROC(5, SIG_SYSTEM6) +/* + * These signal are already use from + * main process and the sig_waitWithTimeout functions, so we don't + * use it. + * + * RECV_PROC(6, SIG_SINGLE) + * RECV_PROC(7, SIG_TIMEOUT) + */ + +RECV_STACK(0); +RECV_STACK(1); +RECV_STACK(2); +RECV_STACK(3); +RECV_STACK(4); +RECV_STACK(5); + +/* + * Help function to fill the message to send + */ +static void fill_msg(TestMsg *msg, int val, int delay, int res) +{ + msg->val = val; + msg->delay = delay; + msg->result = res; +} + +/** + * Run signal test + */ +int msg_testRun(void) +{ + MsgPort test_portMain; + TestMsg msg0; + TestMsg msg1; + TestMsg msg2; + TestMsg msg3; + TestMsg msg4; + TestMsg msg5; + TestMsg *reply; + + // Allocate and start the test process + struct Process *recv0 = RECV_INIT_PROC(0); + struct Process *recv1 = RECV_INIT_PROC(1); + struct Process *recv2 = RECV_INIT_PROC(2); + struct Process *recv3 = RECV_INIT_PROC(3); + struct Process *recv4 = RECV_INIT_PROC(4); + struct Process *recv5 = RECV_INIT_PROC(5); + + kprintf("Run Message test..\n"); + + // Init port and message + RECV_INIT_MSG(Main, proc_current(), SIG_SINGLE); + RECV_INIT_MSG(0, recv0, SIG_USER0); + RECV_INIT_MSG(1, recv1, SIG_USER1); + RECV_INIT_MSG(2, recv2, SIG_USER2); + RECV_INIT_MSG(3, recv3, SIG_USER3); + RECV_INIT_MSG(4, recv4, SIG_SYSTEM5); + RECV_INIT_MSG(5, recv5, SIG_SYSTEM6); + + // Fill-in first message and send it out. + fill_msg(&msg0, INC_PROC_T0, DELAY_PROC_T0, 0); + fill_msg(&msg1, INC_PROC_T1, DELAY_PROC_T1, 0); + fill_msg(&msg2, INC_PROC_T2, DELAY_PROC_T2, 0); + fill_msg(&msg3, INC_PROC_T3, DELAY_PROC_T3, 0); + fill_msg(&msg4, INC_PROC_T4, DELAY_PROC_T4, 0); + fill_msg(&msg5, INC_PROC_T5, DELAY_PROC_T5, 0); + + + // Send and wait the message + for (int i = 0; i < 23; ++i) + { + process_num = 0; + SEND_MSG(0); + SEND_MSG(1); + SEND_MSG(2); + SEND_MSG(3); + SEND_MSG(4); + SEND_MSG(5); + while(1) + { + sigmask_t sigs = sig_waitTimeout(SIG_SINGLE, ms_to_ticks(TEST_TIME_OUT_MS)); + if (sigs & SIG_SINGLE) + { + // Wait for a reply... + while ((reply = (TestMsg *)msg_get(&test_portMain))) + { + count += reply->result; + kprintf("Main recv[%d] count[%d]\n", reply->result, count); + } + } + + if (process_num == 6) + break; + + if (sigs & SIG_TIMEOUT) + { + kputs("Main: sig timeout\n"); + goto error; + } + } + } + + if(count == MAX_GLOBAL_COUNT) + { + kprintf("Message test finished..ok!\n"); + return 0; + } + +error: + kprintf("Message test finished..fail!\n"); + return -1; +} + +int msg_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + return 0; +} + +int msg_testTearDown(void) +{ + kputs("TearDown Message test.\n"); + return 0; +} + +TEST_MAIN(msg); + +#endif /* CONFIG_KERN_SIGNALS */ diff --git a/2.5/bertos/kern/preempt.c b/2.5/bertos/kern/preempt.c new file mode 100644 index 00000000..078724b4 --- /dev/null +++ b/2.5/bertos/kern/preempt.c @@ -0,0 +1,32 @@ +/** + * \file + * + */ diff --git a/2.5/bertos/kern/proc.c b/2.5/bertos/kern/proc.c new file mode 100644 index 00000000..781bd553 --- /dev/null +++ b/2.5/bertos/kern/proc.c @@ -0,0 +1,648 @@ +/** + * \file + * + * + * \brief Simple cooperative and preemptive multitasking scheduler. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Andrea Righi + */ + +#include "proc_p.h" +#include "proc.h" + +#include "cfg/cfg_proc.h" +#define LOG_LEVEL KERN_LOG_LEVEL +#define LOG_FORMAT KERN_LOG_FORMAT +#include + +#include "cfg/cfg_monitor.h" +#include // ROUND_UP2 +#include +#include // CONFIG_DEPEND() + +#include +#include +#include +#include + +#if CONFIG_KERN_HEAP + #include +#endif + +#include /* memset() */ + +#define PROC_SIZE_WORDS (ROUND_UP2(sizeof(Process), sizeof(cpu_stack_t)) / sizeof(cpu_stack_t)) + +/* + * The scheduer tracks ready processes by enqueuing them in the + * ready list. + * + * \note Access to the list must occur while interrupts are disabled. + */ +REGISTER List proc_ready_list; + +/* + * Holds a pointer to the TCB of the currently running process. + * + * \note User applications should use proc_current() to retrieve this value. + */ +REGISTER Process *current_process; + +/** The main process (the one that executes main()). */ +static struct Process main_process; + +#if CONFIG_KERN_HEAP + +/** + * Local heap dedicated to allocate the memory used by the processes. + */ +static HEAP_DEFINE_BUF(heap_buf, CONFIG_KERN_HEAP_SIZE); +static Heap proc_heap; + +/* + * Keep track of zombie processes (processes that are exiting and need to + * release some resources). + * + * \note Access to the list must occur while kernel preemption is disabled. + */ +static List zombie_list; + +#endif /* CONFIG_KERN_HEAP */ + +/* + * Check if the process context switch can be performed directly by the + * architecture-dependent asm_switch_context() or if it must be delayed + * because we're in the middle of an ISR. + * + * Return true if asm_switch_context() can be executed, false + * otherwise. + * + * NOTE: if an architecture does not implement IRQ_RUNNING() this function + * always returns true. + */ +#define CONTEXT_SWITCH_FROM_ISR() (!IRQ_RUNNING()) + +/* + * Save context of old process and switch to new process. + */ +static void proc_context_switch(Process *next, Process *prev) +{ + cpu_stack_t *dummy; + + if (UNLIKELY(next == prev)) + return; + /* + * If there is no old process, we save the old stack pointer into a + * dummy variable that we ignore. In fact, this happens only when the + * old process has just exited. + */ + asm_switch_context(&next->stack, prev ? &prev->stack : &dummy); +} + +static void proc_initStruct(Process *proc) +{ + /* Avoid warning for unused argument. */ + (void)proc; + +#if CONFIG_KERN_SIGNALS + proc->sig_recv = 0; + proc->sig_wait = 0; +#endif + +#if CONFIG_KERN_HEAP + proc->flags = 0; +#endif + +#if CONFIG_KERN_PRI + proc->link.pri = 0; +#endif +} + +MOD_DEFINE(proc); + +void proc_init(void) +{ + LIST_INIT(&proc_ready_list); + +#if CONFIG_KERN_HEAP + LIST_INIT(&zombie_list); + heap_init(&proc_heap, heap_buf, sizeof(heap_buf)); +#endif + /* + * We "promote" the current context into a real process. The only thing we have + * to do is create a PCB and make it current. We don't need to setup the stack + * pointer because it will be written the first time we switch to another process. + */ + proc_initStruct(&main_process); + current_process = &main_process; + +#if CONFIG_KERN_MONITOR + monitor_init(); + monitor_add(current_process, "main"); +#endif + MOD_INIT(proc); +} + + +#if CONFIG_KERN_HEAP + +/** + * Free all the resources of all zombie processes previously added to the zombie + * list. + */ +static void proc_freeZombies(void) +{ + Process *proc; + + while (1) + { + PROC_ATOMIC(proc = (Process *)list_remHead(&zombie_list)); + if (proc == NULL) + return; + + if (proc->flags & PF_FREESTACK) + { + PROC_ATOMIC(heap_freemem(&proc_heap, proc->stack_base, + proc->stack_size + PROC_SIZE_WORDS * sizeof(cpu_stack_t))); + } + } +} + +/** + * Enqueue a process in the zombie list. + */ +static void proc_addZombie(Process *proc) +{ + Node *node; +#if CONFIG_KERN_PREEMPT + ASSERT(!proc_preemptAllowed()); +#endif + +#if CONFIG_KERN_PRI + node = &(proc)->link.link; +#else + node = &(proc)->link; +#endif + LIST_ASSERT_VALID(&zombie_list); + ADDTAIL(&zombie_list, node); +} + +#endif /* CONFIG_KERN_HEAP */ + +/** + * Create a new process, starting at the provided entry point. + * + * + * \note The function + * \code + * proc_new(entry, data, stacksize, stack) + * \endcode + * is a more convenient way to create a process, as you don't have to specify + * the name. + * + * \return Process structure of new created process + * if successful, NULL otherwise. + */ +struct Process *proc_new_with_name(UNUSED_ARG(const char *, name), void (*entry)(void), iptr_t data, size_t stack_size, cpu_stack_t *stack_base) +{ + Process *proc; + LOG_INFO("name=%s", name); +#if CONFIG_KERN_HEAP + bool free_stack = false; + + /* + * Free up resources of a zombie process. + * + * We're implementing a kind of lazy garbage collector here for + * efficiency reasons: we can avoid to introduce overhead into another + * kernel task dedicated to free up resources (e.g., idle) and we're + * not introducing any overhead into the scheduler after a context + * switch (that would be *very* bad, because the scheduler runs with + * IRQ disabled). + * + * In this way we are able to release the memory of the zombie tasks + * without disabling IRQs and without introducing any significant + * overhead in any other kernel task. + */ + proc_freeZombies(); + + /* Did the caller provide a stack for us? */ + if (!stack_base) + { + /* Did the caller specify the desired stack size? */ + if (!stack_size) + stack_size = KERN_MINSTACKSIZE; + + /* Allocate stack dinamically */ + PROC_ATOMIC(stack_base = + (cpu_stack_t *)heap_allocmem(&proc_heap, stack_size)); + if (stack_base == NULL) + return NULL; + + free_stack = true; + } + +#else // CONFIG_KERN_HEAP + + /* Stack must have been provided by the user */ + ASSERT_VALID_PTR(stack_base); + ASSERT(stack_size); + +#endif // CONFIG_KERN_HEAP + +#if CONFIG_KERN_MONITOR + /* + * Fill-in the stack with a special marker to help debugging. + * On 64bit platforms, CONFIG_KERN_STACKFILLCODE is larger + * than an int, so the (int) cast is required to silence the + * warning for truncating its size. + */ + memset(stack_base, (int)CONFIG_KERN_STACKFILLCODE, stack_size); +#endif + + /* Initialize the process control block */ + if (CPU_STACK_GROWS_UPWARD) + { + proc = (Process *)stack_base; + proc->stack = stack_base + PROC_SIZE_WORDS; + // On some architecture stack should be aligned, so we do it. + proc->stack = (cpu_stack_t *)((uintptr_t)proc->stack + (sizeof(cpu_aligned_stack_t) - ((uintptr_t)proc->stack % sizeof(cpu_aligned_stack_t)))); + if (CPU_SP_ON_EMPTY_SLOT) + proc->stack++; + } + else + { + proc = (Process *)(stack_base + stack_size / sizeof(cpu_stack_t) - PROC_SIZE_WORDS); + // On some architecture stack should be aligned, so we do it. + proc->stack = (cpu_stack_t *)((uintptr_t)proc - ((uintptr_t)proc % sizeof(cpu_aligned_stack_t))); + if (CPU_SP_ON_EMPTY_SLOT) + proc->stack--; + } + /* Ensure stack is aligned */ + ASSERT((uintptr_t)proc->stack % sizeof(cpu_aligned_stack_t) == 0); + + stack_size -= PROC_SIZE_WORDS * sizeof(cpu_stack_t); + proc_initStruct(proc); + proc->user_data = data; + +#if CONFIG_KERN_HEAP | CONFIG_KERN_MONITOR + proc->stack_base = stack_base; + proc->stack_size = stack_size; + #if CONFIG_KERN_HEAP + if (free_stack) + proc->flags |= PF_FREESTACK; + #endif +#endif + proc->user_entry = entry; + CPU_CREATE_NEW_STACK(proc->stack); + +#if CONFIG_KERN_MONITOR + monitor_add(proc, name); +#endif + + /* Add to ready list */ + ATOMIC(SCHED_ENQUEUE(proc)); + + return proc; +} + +/** + * Return the name of the specified process. + * + * NULL is a legal argument and will return the name "". + */ +const char *proc_name(struct Process *proc) +{ +#if CONFIG_KERN_MONITOR + return proc ? proc->monitor.name : ""; +#else + (void)proc; + return "---"; +#endif +} + +/// Return the name of the currently running process +const char *proc_currentName(void) +{ + return proc_name(proc_current()); +} + +/// Rename a process +void proc_rename(struct Process *proc, const char *name) +{ +#if CONFIG_KERN_MONITOR + monitor_rename(proc, name); +#else + (void)proc; (void)name; +#endif +} + + +#if CONFIG_KERN_PRI +/** + * Change the scheduling priority of a process. + * + * Process piorities are signed ints, whereas a larger integer value means + * higher scheduling priority. The default priority for new processes is 0. + * The idle process runs with the lowest possible priority: INT_MIN. + * + * A process with a higher priority always preempts lower priority processes. + * Processes of equal priority share the CPU time according to a simple + * round-robin policy. + * + * As a general rule to maximize responsiveness, compute-bound processes + * should be assigned negative priorities and tight, interactive processes + * should be assigned positive priorities. + * + * To avoid interfering with system background activities such as input + * processing, application processes should remain within the range -10 + * and +10. + */ +void proc_setPri(struct Process *proc, int pri) +{ + if (proc->link.pri == pri) + return; + + proc->link.pri = pri; + + if (proc != current_process) + ATOMIC(sched_reenqueue(proc)); +} +#endif // CONFIG_KERN_PRI + +INLINE void proc_run(void) +{ + void (*entry)(void) = current_process->user_entry; + + LOG_INFO("New process starting at %p", entry); + entry(); +} + +/** + * Entry point for all the processes. + */ +void proc_entry(void) +{ + /* + * Return from a context switch assumes interrupts are disabled, so + * we need to explicitly re-enable them as soon as possible. + */ + IRQ_ENABLE; + /* Call the actual process's entry point */ + proc_run(); + proc_exit(); +} + +/** + * Terminate the current process + */ +void proc_exit(void) +{ + LOG_INFO("%p:%s", current_process, proc_currentName()); + +#if CONFIG_KERN_MONITOR + monitor_remove(current_process); +#endif + + proc_forbid(); +#if CONFIG_KERN_HEAP + /* + * Set the task as zombie, its resources will be freed in proc_new() in + * a lazy way, when another process will be created. + */ + proc_addZombie(current_process); +#endif + current_process = NULL; + proc_permit(); + + proc_switch(); + + /* never reached */ + ASSERT(0); +} + +/** + * Call the scheduler and eventually replace the current running process. + */ +static void proc_schedule(void) +{ + Process *old_process = current_process; + + IRQ_ASSERT_DISABLED(); + + /* Poll on the ready queue for the first ready process */ + LIST_ASSERT_VALID(&proc_ready_list); + while (!(current_process = (struct Process *)list_remHead(&proc_ready_list))) + { + /* + * Make sure we physically reenable interrupts here, no matter what + * the current task status is. This is important because if we + * are idle-spinning, we must allow interrupts, otherwise no + * process will ever wake up. + * + * During idle-spinning, an interrupt can occur and it may + * modify \p proc_ready_list. To ensure that compiler reload this + * variable every while cycle we call CPU_MEMORY_BARRIER. + * The memory barrier ensure that all variables used in this context + * are reloaded. + * \todo If there was a way to write sig_wait() so that it does not + * disable interrupts while waiting, there would not be any + * reason to do this. + */ + IRQ_ENABLE; + CPU_IDLE; + MEMORY_BARRIER; + IRQ_DISABLE; + } + if (CONTEXT_SWITCH_FROM_ISR()) + proc_context_switch(current_process, old_process); + /* This RET resumes the execution on the new process */ + LOG_INFO("resuming %p:%s\n", current_process, proc_currentName()); +} + +#if CONFIG_KERN_PREEMPT +/* Global preemption nesting counter */ +cpu_atomic_t preempt_count; + +/* + * The time sharing interval: when a process is scheduled on a CPU it gets an + * amount of CONFIG_KERN_QUANTUM clock ticks. When these ticks expires and + * preemption is enabled a new process is selected to run. + */ +int _proc_quantum; + +/** + * Check if we need to schedule another task + */ +bool proc_needPreempt(void) +{ + if (UNLIKELY(current_process == NULL)) + return false; + if (!proc_preemptAllowed()) + return false; + if (LIST_EMPTY(&proc_ready_list)) + return false; + return preempt_quantum() ? prio_next() > prio_curr() : + prio_next() >= prio_curr(); +} + +/** + * Preempt the current task. + */ +void proc_preempt(void) +{ + IRQ_ASSERT_DISABLED(); + ASSERT(current_process); + + /* Perform the kernel preemption */ + LOG_INFO("preempting %p:%s\n", current_process, proc_currentName()); + /* We are inside a IRQ context, so ATOMIC is not needed here */ + SCHED_ENQUEUE(current_process); + preempt_reset_quantum(); + proc_schedule(); +} +#endif /* CONFIG_KERN_PREEMPT */ + +/* Immediately switch to a particular process */ +static void proc_switchTo(Process *proc) +{ + Process *old_process = current_process; + + SCHED_ENQUEUE(current_process); + preempt_reset_quantum(); + current_process = proc; + proc_context_switch(current_process, old_process); +} + +/** + * Give the control of the CPU to another process. + * + * \note Assume the current process has been already added to a wait queue. + * + * \warning This should be considered an internal kernel function, even if it + * is allowed, usage from application code is strongly discouraged. + */ +void proc_switch(void) +{ + ASSERT(proc_preemptAllowed()); + ATOMIC( + preempt_reset_quantum(); + proc_schedule(); + ); +} + +/** + * Immediately wakeup a process, dispatching it to the CPU. + */ +void proc_wakeup(Process *proc) +{ + ASSERT(proc_preemptAllowed()); + ASSERT(current_process); + IRQ_ASSERT_DISABLED(); + + if (prio_proc(proc) >= prio_curr()) + proc_switchTo(proc); + else + SCHED_ENQUEUE_HEAD(proc); +} + +/** + * Voluntarily release the CPU. + */ +void proc_yield(void) +{ + Process *proc; + + /* + * Voluntary preemption while preemption is disabled is considered + * illegal, as not very useful in practice. + * + * ASSERT if it happens. + */ + ASSERT(proc_preemptAllowed()); + IRQ_ASSERT_ENABLED(); + + IRQ_DISABLE; + proc = (struct Process *)list_remHead(&proc_ready_list); + if (proc) + proc_switchTo(proc); + IRQ_ENABLE; +} diff --git a/2.5/bertos/kern/proc.h b/2.5/bertos/kern/proc.h new file mode 100644 index 00000000..e1181747 --- /dev/null +++ b/2.5/bertos/kern/proc.h @@ -0,0 +1,400 @@ +/** + * \file + * + * + * \brief BeRTOS Kernel core (Process scheduler). + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "kernel" + * $WIZ$ module_configuration = "bertos/cfg/cfg_proc.h" + * $WIZ$ module_depends = "switch_ctx" + * $WIZ$ module_supports = "not atmega103" + */ + +#ifndef KERN_PROC_H +#define KERN_PROC_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include "cfg/cfg_monitor.h" + +#include // Node, PriNode + +#include +#include // ASSERT() + +#include // cpu_stack_t +#include // CPU_SAVED_REGS_CNT + +/* + * WARNING: struct Process is considered private, so its definition can change any time + * without notice. DO NOT RELY on any field defined here, use only the interface + * functions below. + * + * You have been warned. + */ +typedef struct Process +{ +#if CONFIG_KERN_PRI + PriNode link; /**< Link Process into scheduler lists */ +#else + Node link; /**< Link Process into scheduler lists */ +#endif + cpu_stack_t *stack; /**< Per-process SP */ + iptr_t user_data; /**< Custom data passed to the process */ + +#if CONFIG_KERN_SIGNALS + sigmask_t sig_wait; /**< Signals the process is waiting for */ + sigmask_t sig_recv; /**< Received signals */ +#endif + +#if CONFIG_KERN_HEAP + uint16_t flags; /**< Flags */ +#endif + +#if CONFIG_KERN_HEAP | CONFIG_KERN_MONITOR + cpu_stack_t *stack_base; /**< Base of process stack */ + size_t stack_size; /**< Size of process stack */ +#endif + + /* The actual process entry point */ + void (*user_entry)(void); + +#if CONFIG_KERN_MONITOR + struct ProcMonitor + { + Node link; + const char *name; + } monitor; +#endif + +} Process; + +/** + * Initialize the process subsystem (kernel). + * It must be called before using any process related function. + */ +void proc_init(void); + +struct Process *proc_new_with_name(const char *name, void (*entry)(void), iptr_t data, size_t stacksize, cpu_stack_t *stack); + +#if !CONFIG_KERN_MONITOR + /** + * Create a new named process and schedules it for execution. + * + * When defining the stacksize take into account that you may want at least: + * \li save all the registers for each nested function call; + * \li have memory for the struct Process, which is positioned at the bottom + * of the stack; + * \li have some memory for temporary variables inside called functions. + * + * The value given by KERN_MINSTACKSIZE is rather safe to use in the first place. + * + * \param entry Function that the process will execute. + * \param data Pointer to user data. + * \param size Length of the stack. + * \param stack Pointer to the memory area to be used as a stack. + * + * \return Process structure of new created process + * if successful, NULL otherwise. + */ + #define proc_new(entry,data,size,stack) proc_new_with_name(NULL,(entry),(data),(size),(stack)) +#else + #define proc_new(entry,data,size,stack) proc_new_with_name(#entry,(entry),(data),(size),(stack)) +#endif + +/** + * Terminate the execution of the current process. + */ +void proc_exit(void); + +/** + * Public scheduling class methods. + */ +void proc_yield(void); + +#if CONFIG_KERN_PREEMPT +bool proc_needPreempt(void); +void proc_preempt(void); +#else +INLINE bool proc_needPreempt(void) +{ + return false; +} + +INLINE void proc_preempt(void) +{ +} +#endif + +void proc_rename(struct Process *proc, const char *name); +const char *proc_name(struct Process *proc); +const char *proc_currentName(void); + +/** + * Return a pointer to the user data of the current process. + * + * To obtain user data, just call this function inside the process. Remember to cast + * the returned pointer to the correct type. + * \return Pointer to the user data of the current process. + */ +INLINE iptr_t proc_currentUserData(void) +{ + extern struct Process *current_process; + return current_process->user_data; +} + +int proc_testSetup(void); +int proc_testRun(void); +int proc_testTearDown(void); + +/** + * Return the context structure of the currently running process. + * + * The details of the Process structure are private to the scheduler. + * The address returned by this function is an opaque pointer that can + * be passed as an argument to other process-related functions. + */ +INLINE struct Process *proc_current(void) +{ + extern struct Process *current_process; + return current_process; +} + +#if CONFIG_KERN_PRI + void proc_setPri(struct Process *proc, int pri); +#else + INLINE void proc_setPri(UNUSED_ARG(struct Process *,proc), UNUSED_ARG(int, pri)) + { + } +#endif + +#if CONFIG_KERN_PREEMPT + + /** + * Disable preemptive task switching. + * + * The scheduler maintains a global nesting counter. Task switching is + * effectively re-enabled only when the number of calls to proc_permit() + * matches the number of calls to proc_forbid(). + * + * \note Calling functions that could sleep while task switching is disabled + * is dangerous and unsupported. + * + * \note proc_permit() expands inline to 1-2 asm instructions, so it's a + * very efficient locking primitive in simple but performance-critical + * situations. In all other cases, semaphores offer a more flexible and + * fine-grained locking primitive. + * + * \sa proc_permit() + */ + INLINE void proc_forbid(void) + { + extern cpu_atomic_t preempt_count; + /* + * We don't need to protect the counter against other processes. + * The reason why is a bit subtle. + * + * If a process gets here, preempt_forbid_cnt can be either 0, + * or != 0. In the latter case, preemption is already disabled + * and no concurrency issues can occur. + * + * In the former case, we could be preempted just after reading the + * value 0 from memory, and a concurrent process might, in fact, + * bump the value of preempt_forbid_cnt under our nose! + * + * BUT: if this ever happens, then we won't get another chance to + * run until the other process calls proc_permit() to re-enable + * preemption. At this point, the value of preempt_forbid_cnt + * must be back to 0, and thus what we had originally read from + * memory happens to be valid. + * + * No matter how hard you think about it, and how complicated you + * make your scenario, the above holds true as long as + * "preempt_forbid_cnt != 0" means that no task switching is + * possible. + */ + ++preempt_count; + + /* + * Make sure preempt_count is flushed to memory so the preemption + * softirq will see the correct value from now on. + */ + MEMORY_BARRIER; + } + + /** + * Re-enable preemptive task switching. + * + * \sa proc_forbid() + */ + INLINE void proc_permit(void) + { + extern cpu_atomic_t preempt_count; + + /* + * This is to ensure any global state changed by the process gets + * flushed to memory before task switching is re-enabled. + */ + MEMORY_BARRIER; + /* No need to protect against interrupts here. */ + ASSERT(preempt_count > 0); + --preempt_count; + /* + * This ensures preempt_count is flushed to memory immediately so the + * preemption interrupt sees the correct value. + */ + MEMORY_BARRIER; + } + + /** + * \return true if preemptive task switching is allowed. + * \note This accessor is needed because preempt_count + * must be absoultely private. + */ + INLINE bool proc_preemptAllowed(void) + { + extern cpu_atomic_t preempt_count; + return (preempt_count == 0); + } +#else /* CONFIG_KERN_PREEMPT */ + #define proc_forbid() /* NOP */ + #define proc_permit() /* NOP */ + #define proc_preemptAllowed() (true) +#endif /* CONFIG_KERN_PREEMPT */ + +/** Deprecated, use the proc_preemptAllowed() macro. */ +#define proc_allowed() proc_preemptAllowed() + +/** + * Execute a block of \a CODE atomically with respect to task scheduling. + */ +#define PROC_ATOMIC(CODE) \ + do { \ + proc_forbid(); \ + CODE; \ + proc_permit(); \ + } while(0) + +/** + * Default stack size for each thread, in bytes. + * + * The goal here is to allow a minimal task to save all of its + * registers twice, plus push a maximum of 32 variables on the + * stack. We add also struct Process size since we save it into the process' + * stack. + * + * The actual size computed by the default formula greatly depends on what + * options are active and on the architecture. + * + * Note that on most 16bit architectures, interrupts will also + * run on the stack of the currently running process. Nested + * interrupts will greatly increases the amount of stack space + * required per process. Use irqmanager to minimize stack + * usage. + */ + +#if (ARCH & ARCH_EMUL) + /* We need a large stack because system libraries are bloated */ + #define KERN_MINSTACKSIZE 65536 +#else + #if CONFIG_KERN_PREEMPT + /* + * A preemptible kernel needs a larger stack compared to the + * cooperative case. A task can be interrupted anytime in each + * node of the call graph, at any level of depth. This may + * result in a higher stack consumption, to call the ISR, save + * the current user context and to execute the kernel + * preemption routines implemented as ISR prologue and + * epilogue. All these calls are nested into the process stack. + * + * So, to reduce the risk of stack overflow/underflow problems + * add a x2 to the portion stack reserved to the user process. + */ + #define KERN_MINSTACKSIZE \ + (sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \ + + 32 * sizeof(int) * 2) + #else + #define KERN_MINSTACKSIZE \ + (sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \ + + 32 * sizeof(int)) + #endif /* CONFIG_KERN_PREEMPT */ + +#endif + +#ifndef CONFIG_KERN_MINSTACKSIZE + /* For backward compatibility */ + #define CONFIG_KERN_MINSTACKSIZE KERN_MINSTACKSIZE +#else + #warning FIXME: This macro is deprecated, use KERN_MINSTACKSIZE instead +#endif + +/** + * Utility macro to allocate a stack of size \a size. + * + * This macro define a static stack for one process and do + * check if given stack size is enough to run process. + * \note If you plan to use kprintf() and similar functions, you will need + * at least KERN_MINSTACKSIZE * 2 bytes. + * + * \param name Variable name for the stack. + * \param size Stack size in bytes. It must be at least KERN_MINSTACKSIZE. + */ +#define PROC_DEFINE_STACK(name, size) \ + cpu_stack_t name[((size) + sizeof(cpu_stack_t) - 1) / sizeof(cpu_stack_t)]; \ + STATIC_ASSERT((size) >= KERN_MINSTACKSIZE); + +/* Memory fill codes to help debugging */ +#if CONFIG_KERN_MONITOR + #include + #if (SIZEOF_CPUSTACK_T == 1) + /* 8bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5 + #define CONFIG_KERN_MEMFILLCODE 0xDB + #elif (SIZEOF_CPUSTACK_T == 2) + /* 16bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5A5 + #define CONFIG_KERN_MEMFILLCODE 0xDBDB + #elif (SIZEOF_CPUSTACK_T == 4) + /* 32bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5A5A5A5UL + #define CONFIG_KERN_MEMFILLCODE 0xDBDBDBDBUL + #elif (SIZEOF_CPUSTACK_T == 8) + /* 64bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5A5A5A5A5A5A5A5ULL + #define CONFIG_KERN_MEMFILLCODE 0xDBDBDBDBDBDBDBDBULL + #else + #error No cpu_stack_t size supported! + #endif +#endif + +#endif /* KERN_PROC_H */ diff --git a/2.5/bertos/kern/proc_p.h b/2.5/bertos/kern/proc_p.h new file mode 100644 index 00000000..5469dfcd --- /dev/null +++ b/2.5/bertos/kern/proc_p.h @@ -0,0 +1,223 @@ +/** + * \file + * + * + * \brief Internal scheduler structures and definitions for processes. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef KERN_PROC_P_H +#define KERN_PROC_P_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_monitor.h" + +#include + +#include /* for cpu_stack_t */ +#include // IRQ_ASSERT_DISABLED() + +#include // struct Process + +#ifndef asm_switch_context +/** + * CPU dependent context switching routines. + * + * Saving and restoring the context on the stack is done by a CPU-dependent + * support routine which usually needs to be written in assembly. + */ +EXTERN_C void asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **save_sp); +#endif + +/** + * \name Flags for Process.flags. + * \{ + */ +#define PF_FREESTACK BV(0) /**< Free the stack when process dies */ +/*\}*/ + + +/** Track running processes. */ +extern REGISTER Process *current_process; + +/** + * Track ready processes. + * + * Access to this list must be performed with interrupts disabled + */ +extern REGISTER List proc_ready_list; + +#if CONFIG_KERN_PRI + #define prio_next() (LIST_EMPTY(&proc_ready_list) ? INT_MIN : \ + ((PriNode *)LIST_HEAD(&proc_ready_list))->pri) + #define prio_proc(proc) (proc->link.pri) + #define prio_curr() prio_proc(current_process) + + #define SCHED_ENQUEUE_INTERNAL(proc) \ + LIST_ENQUEUE(&proc_ready_list, &(proc)->link) + #define SCHED_ENQUEUE_HEAD_INTERNAL(proc) \ + LIST_ENQUEUE_HEAD(&proc_ready_list, &(proc)->link) +#else + #define prio_next() 0 + #define prio_proc(proc) 0 + #define prio_curr() 0 + + #define SCHED_ENQUEUE_INTERNAL(proc) ADDTAIL(&proc_ready_list, &(proc)->link) + #define SCHED_ENQUEUE_HEAD_INTERNAL(proc) ADDHEAD(&proc_ready_list, &(proc)->link) +#endif + +/** + * Enqueue a process in the ready list. + * + * Always use this macro to instert a process in the ready list, as its + * might vary to implement a different scheduling algorithms. + * + * \note Access to the scheduler ready list must be performed with + * interrupts disabled. + */ +#define SCHED_ENQUEUE(proc) do { \ + IRQ_ASSERT_DISABLED(); \ + LIST_ASSERT_VALID(&proc_ready_list); \ + SCHED_ENQUEUE_INTERNAL(proc); \ + } while (0) + +#define SCHED_ENQUEUE_HEAD(proc) do { \ + IRQ_ASSERT_DISABLED(); \ + LIST_ASSERT_VALID(&proc_ready_list); \ + SCHED_ENQUEUE_HEAD_INTERNAL(proc); \ + } while (0) + + +#if CONFIG_KERN_PRI +/** + * Changes the priority of an already enqueued process. + * + * Searches and removes the process from the ready list, then uses LIST_ENQUEUE(() + * to insert again to fix priority. + * + * No action is performed for processes that aren't in the ready list, eg. in semaphore queues. + * + * \note Performance could be improved with a different implementation of priority list. + */ +INLINE void sched_reenqueue(struct Process *proc) +{ + IRQ_ASSERT_DISABLED(); + LIST_ASSERT_VALID(&proc_ready_list); + Node *n; + PriNode *pos = NULL; + FOREACH_NODE(n, &proc_ready_list) + { + if (n == &proc->link.link) + { + pos = (PriNode *)n; + break; + } + } + + // only remove and enqueue again if process is already in the ready list + // otherwise leave it alone + if (pos) + { + REMOVE(&proc->link.link); + LIST_ENQUEUE(&proc_ready_list, &proc->link); + } +} +#endif //CONFIG_KERN_PRI + +/* Process trampoline */ +void proc_entry(void); + +/* Schedule another process *without* adding the current one to the ready list. */ +void proc_switch(void); + +/* Immediately schedule a particular process bypassing the scheduler. */ +void proc_wakeup(Process *proc); + +/* Initialize a scheduler class. */ +void proc_schedInit(void); + +#if CONFIG_KERN_MONITOR + /** Initialize the monitor */ + void monitor_init(void); + + /** Register a process into the monitor */ + void monitor_add(Process *proc, const char *name); + + /** Unregister a process from the monitor */ + void monitor_remove(Process *proc); + + /** Rename a process */ + void monitor_rename(Process *proc, const char *name); +#endif /* CONFIG_KERN_MONITOR */ + +/* + * Quantum related macros are used in the + * timer module and must be empty when + * kernel is disabled. + */ +#if (CONFIG_KERN && CONFIG_KERN_PREEMPT) +INLINE int preempt_quantum(void) +{ + extern int _proc_quantum; + return _proc_quantum; +} + +INLINE void proc_decQuantum(void) +{ + extern int _proc_quantum; + if (_proc_quantum > 0) + _proc_quantum--; +} + +INLINE void preempt_reset_quantum(void) +{ + extern int _proc_quantum; + _proc_quantum = CONFIG_KERN_QUANTUM; +} +#else /* !(CONFIG_KERN && CONFIG_KERN_PREEMPT) */ +INLINE int preempt_quantum(void) +{ + return 0; +} + +INLINE void proc_decQuantum(void) +{ +} + +INLINE void preempt_reset_quantum(void) +{ +} +#endif /* (CONFIG_KERN && CONFIG_KERN_PREEMPT) */ + +#endif /* KERN_PROC_P_H */ diff --git a/2.5/bertos/kern/proc_test.c b/2.5/bertos/kern/proc_test.c new file mode 100644 index 00000000..b2319faa --- /dev/null +++ b/2.5/bertos/kern/proc_test.c @@ -0,0 +1,406 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + */ + +#include // sprintf +#include // memset + +#include +#include +#include + +#include +#include +#include + +enum +{ + TEST_OK = 1, + TEST_FAIL = 2, +}; + +/* Number of tasks to spawn */ +#define TASKS 8 + +static char name[TASKS][32]; + +static unsigned int done[TASKS]; + +static cpu_atomic_t barrier[TASKS]; +static cpu_atomic_t main_barrier; + +/* Base time delay for processes using timer_delay() */ +#define DELAY 5 + +// Define process stacks for test. +#define WORKER_STACK_SIZE KERN_MINSTACKSIZE * 3 + +#if CONFIG_KERN_HEAP +#define WORKER_STACK(id) NULL +#else /* !CONFIG_KERN_HEAP */ +static cpu_stack_t worker_stack[TASKS][(WORKER_STACK_SIZE + + sizeof(cpu_stack_t) - 1) / sizeof(cpu_stack_t)]; +#define WORKER_STACK(id) (&worker_stack[id][0]) +#endif /* CONFIG_KERN_HEAP */ + +static int prime_numbers[] = +{ + 1, 3, 5, 7, 11, 13, 17, 19, + 23, 29, 31, 37, 41, 43, 47, 53, +}; +STATIC_ASSERT(TASKS <= countof(prime_numbers)); + +#if CONFIG_KERN_PREEMPT +/* Time to run each preemptible thread (in seconds) */ +#define TIME 10 + +static unsigned long preempt_counter[TASKS]; +static unsigned int preempt_done[TASKS]; +#endif + +static void cleanup(void) +{ +#if CONFIG_KERN_PREEMPT + // Clear shared data (this is needed when this testcase is embedded in + // the demo application). + memset(preempt_counter, 0, sizeof(preempt_counter)); + memset(preempt_done, 0, sizeof(preempt_done)); +#endif /* CONFIG_KERN_PREEMPT */ + memset(done, 0, sizeof(done)); + memset(barrier, 0, sizeof(barrier)); + main_barrier = 0; +} + +static void worker(void) +{ + ssize_t pid = (ssize_t)proc_currentUserData(); + long tot = prime_numbers[pid - 1]; + unsigned int my_count = 0; + int i; + + barrier[pid - 1] = 1; + /* Synchronize on the main barrier */ + while (!main_barrier) + proc_yield(); + for (i = 0; i < tot; i++) + { + my_count++; + PROC_ATOMIC(kprintf("> %s[%zd] running\n", __func__, pid)); + timer_delay(tot * DELAY); + } + done[pid - 1] = 1; + PROC_ATOMIC(kprintf("> %s[%zd] completed\n", __func__, pid)); +} + +static int worker_test(void) +{ + ssize_t i; + + // Init the test processes + cleanup(); + kputs("Run Proc test..\n"); + for (i = 0; i < TASKS; i++) + { + name[i][0] = '\0'; + snprintf(&name[i][0], sizeof(name[i]), "worker_%zd", i + 1); + name[i][sizeof(name[i]) - 1] = '\0'; + proc_new_with_name(name[i], worker, (iptr_t)(i + 1), + WORKER_STACK_SIZE, WORKER_STACK(i)); + } + /* Synchronize on start */ + while (1) + { + for (i = 0; i < TASKS; i++) + if (!barrier[i]) + break; + if (i == TASKS) + break; + proc_yield(); + } + main_barrier = 1; + MEMORY_BARRIER; + kputs("> Main: Processes started\n"); + while (1) + { + for (i = 0; i < TASKS; i++) + { + if (!done[i]) + break; + } + if (i == TASKS) + break; + monitor_report(); + timer_delay(93); + } + kputs("> Main: process test finished..ok!\n"); + return 0; +} + +#if CONFIG_KERN_PREEMPT +static void preempt_worker(void) +{ + ssize_t pid = (ssize_t)proc_currentUserData(); + unsigned long *my_count = &preempt_counter[pid - 1]; + ticks_t start, stop; + int i; + + barrier[pid - 1] = 1; + /* Synchronize on the main barrier */ + while (!main_barrier) + proc_yield(); + PROC_ATOMIC(kprintf("> %s[%zd] running\n", __func__, pid)); + start = timer_clock(); + stop = ms_to_ticks(TIME * 1000); + while (timer_clock() - start < stop) + { + IRQ_ASSERT_ENABLED(); + (*my_count)++; + /* be sure to wrap to a value different than 0 */ + if (UNLIKELY(*my_count == (unsigned int)~0)) + *my_count = 1; + } + PROC_ATOMIC(kprintf("> %s[%zd] completed: (counter = %lu)\n", + __func__, pid, *my_count)); + for (i = 0; i < TASKS; i++) + if (!preempt_counter[i]) + { + preempt_done[pid - 1] = TEST_FAIL; + return; + } + preempt_done[pid - 1] = TEST_OK; +} + +static int preempt_worker_test(void) +{ + unsigned long score = 0; + ssize_t i; + + // Init the test processes + cleanup(); + kputs("Run Preemption test..\n"); + for (i = 0; i < TASKS; i++) + { + name[i][0] = '\0'; + snprintf(&name[i][0], sizeof(name[i]), + "preempt_worker_%zd", i + 1); + name[i][sizeof(name[i]) - 1] = '\0'; + proc_new_with_name(name[i], preempt_worker, (iptr_t)(i + 1), + WORKER_STACK_SIZE, WORKER_STACK(i)); + } + kputs("> Main: Processes created\n"); + /* Synchronize on start */ + while (1) + { + for (i = 0; i < TASKS; i++) + if (!barrier[i]) + break; + if (i == TASKS) + break; + proc_yield(); + } + /* Now all threads have been created, start them all */ + main_barrier = 1; + MEMORY_BARRIER; + kputs("> Main: Processes started\n"); + while (1) + { + for (i = 0; i < TASKS; i++) + { + if (!preempt_done[i]) + break; + else if (preempt_done[i] == TEST_FAIL) + { + kputs("> Main: process test finished..fail!\n"); + return -1; + } + } + if (i == TASKS) + break; + monitor_report(); + timer_delay(1000); + } + for (i = 0; i < TASKS; i++) + score += preempt_counter[i]; + kputs("> Main: process test finished..ok!\n"); + kprintf("> Score: %lu\n", score); + return 0; +} +#endif /* CONFIG_KERN_PREEMPT */ + +#if CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI + +// Define params to test priority +#define PROC_PRI_TEST(num) static void proc_pri_test##num(void) \ +{ \ + struct Process *main_proc = (struct Process *) proc_currentUserData(); \ + kputs("> Process: " #num "\n"); \ + sig_send(main_proc, SIG_USER##num); \ +} + +// Default priority is 0 +#define PROC_PRI_TEST_INIT(num, proc) \ +do { \ + struct Process *p = proc_new(proc_pri_test##num, (proc), \ + WORKER_STACK_SIZE, \ + WORKER_STACK(num)); \ + proc_setPri(p, num + 1); \ +} while (0) + +PROC_PRI_TEST(0) +PROC_PRI_TEST(1) +PROC_PRI_TEST(2) + +static int prio_worker_test(void) +{ + struct Process *curr = proc_current(); + int orig_pri = curr->link.pri; + int ret = 0; + + // test process priority + // main process must have the higher priority to check signals received + proc_setPri(proc_current(), 10); + + kputs("Run Priority test..\n"); + // the order in which the processes are created is important! + PROC_PRI_TEST_INIT(0, curr); + PROC_PRI_TEST_INIT(1, curr); + PROC_PRI_TEST_INIT(2, curr); + + // signals must be: USER2, 1, 0 in order + sigmask_t signals = sig_wait(SIG_USER0 | SIG_USER1 | SIG_USER2); + if (!(signals & SIG_USER2)) + { + ret = -1; + goto out; + } + signals = sig_wait(SIG_USER0 | SIG_USER1 | SIG_USER2); + if (!(signals & SIG_USER1)) + { + ret = -1; + goto out; + } + signals = sig_wait(SIG_USER0 | SIG_USER1 | SIG_USER2); + if (!(signals & SIG_USER0)) + { + ret = -1; + goto out; + } + // All processes must have quit by now, but just in case... + signals = sig_waitTimeout(SIG_USER0 | SIG_USER1 | SIG_USER2, 200); + if (signals & (SIG_USER0 | SIG_USER1 | SIG_USER2)) + { + ret = -1; + goto out; + } + if (signals & SIG_TIMEOUT) + { + kputs("Priority test successfull.\n"); + } +out: + proc_setPri(proc_current(), orig_pri); + if (ret != 0) + kputs("Priority test failed.\n"); + return ret; +} +#endif /* CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI */ + +/** + * Process scheduling test + */ +int proc_testRun(void) +{ + /* Start tests */ + worker_test(); +#if CONFIG_KERN_PREEMPT + preempt_worker_test(); +#endif /* CONFIG_KERN_PREEMPT */ +#if CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI + prio_worker_test(); +#endif /* CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI */ + return 0; +} + +int proc_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + + return 0; +} + +int proc_testTearDown(void) +{ + kputs("TearDown Process test.\n"); + return 0; +} + +TEST_MAIN(proc); diff --git a/2.5/bertos/kern/proc_test/coop_heap_test.c b/2.5/bertos/kern/proc_test/coop_heap_test.c new file mode 100644 index 00000000..fe84f01d --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_heap_test.c @@ -0,0 +1,65 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + * + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/coop_msg_test.c b/2.5/bertos/kern/proc_test/coop_msg_test.c new file mode 100644 index 00000000..896f8fbd --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_msg_test.c @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Message test. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../msg_test.c" diff --git a/2.5/bertos/kern/proc_test/coop_pri_heap_test.c b/2.5/bertos/kern/proc_test/coop_pri_heap_test.c new file mode 100644 index 00000000..caf78fc7 --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_pri_heap_test.c @@ -0,0 +1,67 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + * + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/coop_pri_test.c b/2.5/bertos/kern/proc_test/coop_pri_test.c new file mode 100644 index 00000000..b2996ab0 --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_pri_test.c @@ -0,0 +1,63 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + * + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/coop_sem_test.c b/2.5/bertos/kern/proc_test/coop_sem_test.c new file mode 100644 index 00000000..eaf6bc99 --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_sem_test.c @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Semaphore test. + * + * \version $Id$ + * + * \author Daniele Basile + * \author Stefano Fedrigo + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_sem.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SEMAPHORES" >> $cfgdir/cfg_sem.h + * $test$: echo "#define CONFIG_KERN_SEMAPHORES 1" >> $cfgdir/cfg_sem.h + * + * notest:all + */ + +#include "../sem_test.c" diff --git a/2.5/bertos/kern/proc_test/coop_signal_test.c b/2.5/bertos/kern/proc_test/coop_signal_test.c new file mode 100644 index 00000000..f1ab4ca7 --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_signal_test.c @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Signals test. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../signal_test.c" diff --git a/2.5/bertos/kern/proc_test/coop_test.c b/2.5/bertos/kern/proc_test/coop_test.c new file mode 100644 index 00000000..c8ec86a9 --- /dev/null +++ b/2.5/bertos/kern/proc_test/coop_test.c @@ -0,0 +1,60 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_heap_test.c b/2.5/bertos/kern/proc_test/preempt_heap_test.c new file mode 100644 index 00000000..5040a56f --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_heap_test.c @@ -0,0 +1,66 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_msg_test.c b/2.5/bertos/kern/proc_test/preempt_msg_test.c new file mode 100644 index 00000000..88348d49 --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_msg_test.c @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Message test. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest:all + */ + +#include "../msg_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_pri_heap_test.c b/2.5/bertos/kern/proc_test/preempt_pri_heap_test.c new file mode 100644 index 00000000..17888709 --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_pri_heap_test.c @@ -0,0 +1,68 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_pri_test.c b/2.5/bertos/kern/proc_test/preempt_pri_test.c new file mode 100644 index 00000000..a75150be --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_pri_test.c @@ -0,0 +1,64 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_sem_test.c b/2.5/bertos/kern/proc_test/preempt_sem_test.c new file mode 100644 index 00000000..0738bfac --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_sem_test.c @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Semaphore test. + * + * \version $Id$ + * + * \author Daniele Basile + * \author Stefano Fedrigo + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_sem.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SEMAPHORES" >> $cfgdir/cfg_sem.h + * $test$: echo "#define CONFIG_KERN_SEMAPHORES 1" >> $cfgdir/cfg_sem.h + * + * notest:all + */ + +#include "../sem_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_signal_test.c b/2.5/bertos/kern/proc_test/preempt_signal_test.c new file mode 100644 index 00000000..cd02ae70 --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_signal_test.c @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Signals test. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../signal_test.c" diff --git a/2.5/bertos/kern/proc_test/preempt_test.c b/2.5/bertos/kern/proc_test/preempt_test.c new file mode 100644 index 00000000..b1c0e131 --- /dev/null +++ b/2.5/bertos/kern/proc_test/preempt_test.c @@ -0,0 +1,62 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/2.5/bertos/kern/sem.c b/2.5/bertos/kern/sem.c new file mode 100644 index 00000000..3c645e95 --- /dev/null +++ b/2.5/bertos/kern/sem.c @@ -0,0 +1,187 @@ +/** + * \file + * + * + * \brief Semaphore based synchronization services. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "sem.h" +#include + +#include // ASSERT_IRQ_DISABLED() + +#include +#include +#include + +INLINE void sem_verify(struct Semaphore *s) +{ + (void)s; + ASSERT(s); + LIST_ASSERT_VALID(&s->wait_queue); + ASSERT(s->nest_count >= 0); + ASSERT(s->nest_count < 128); // heuristic max +} + +/** + * \brief Initialize a Semaphore structure. + */ +void sem_init(struct Semaphore *s) +{ + LIST_INIT(&s->wait_queue); + s->owner = NULL; + s->nest_count = 0; +} + + +/** + * \brief Attempt to lock a semaphore without waiting. + * + * \return true in case of success, false if the semaphore + * was already locked by someone else. + * + * \note each call to sem_attempt() must be matched by a + * call to sem_release(). + * + * \see sem_obtain() sem_release() + */ +bool sem_attempt(struct Semaphore *s) +{ + bool result = false; + + proc_forbid(); + sem_verify(s); + if ((!s->owner) || (s->owner == current_process)) + { + s->owner = current_process; + s->nest_count++; + result = true; + } + proc_permit(); + + return result; +} + + +/** + * \brief Lock a semaphore. + * + * If the semaphore is already owned by another process, the caller + * process will be enqueued into the waiting list and sleep until + * the semaphore is available. + * + * \note Each call to sem_obtain() must be matched by a + * call to sem_release(). + * + * \note This routine is optimized for highest speed in + * the most common case: the semaphore is free or locked + * by the calling process itself. Rearranging this code + * is probably a bad idea. + * + * \sa sem_release() sem_attempt() + */ +void sem_obtain(struct Semaphore *s) +{ + proc_forbid(); + sem_verify(s); + + /* Is the semaphore already locked by another process? */ + if (UNLIKELY(s->owner && (s->owner != current_process))) + { + /* Append calling process to the wait queue */ + ADDTAIL(&s->wait_queue, (Node *)current_process); + + /* + * We will wake up only when the current owner calls + * sem_release(). Then, the semaphore will already + * be locked for us. + */ + proc_permit(); + proc_switch(); + } + else + { + ASSERT(LIST_EMPTY(&s->wait_queue)); + + /* The semaphore was free: lock it */ + s->owner = current_process; + s->nest_count++; + proc_permit(); + } +} + + +/** + * \brief Release a lock on a previously locked semaphore. + * + * If the nesting count of the semaphore reaches zero, + * the next process waiting for it will be awaken. + * + * \note This routine is optimized for highest speed in + * the most common case: the semaphore has been locked just + * once and nobody else was waiting for it. Rearranging + * this code is probably a bad idea. + * + * \sa sem_obtain() sem_attempt() + */ +void sem_release(struct Semaphore *s) +{ + Process *proc = NULL; + + proc_forbid(); + sem_verify(s); + + ASSERT(s->owner == current_process); + + /* + * Decrement nesting count and check if the semaphore + * has been fully unlocked. + */ + if (--s->nest_count == 0) + { + /* Disown semaphore */ + s->owner = NULL; + + /* Give semaphore to the first applicant, if any */ + if (UNLIKELY((proc = (Process *)list_remHead(&s->wait_queue)))) + { + s->nest_count = 1; + s->owner = proc; + } + } + proc_permit(); + + if (proc) + ATOMIC(proc_wakeup(proc)); +} diff --git a/2.5/bertos/kern/sem.h b/2.5/bertos/kern/sem.h new file mode 100644 index 00000000..1e3ef205 --- /dev/null +++ b/2.5/bertos/kern/sem.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief Mutually exclusive semaphores. + * Shared locking not supported in this implementation. + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "semaphores" + * $WIZ$ module_depends = "kernel" + * $WIZ$ module_configuration = "bertos/cfg/cfg_sem.h" + */ + + +#ifndef KERN_SEM_H +#define KERN_SEM_H + +#include +#include + +/* Fwd decl */ +struct Process; + + +typedef struct Semaphore +{ + struct Process *owner; + List wait_queue; + int nest_count; +} Semaphore; + +/** + * \name Process synchronization services + * \{ + */ +void sem_init(struct Semaphore *s); +bool sem_attempt(struct Semaphore *s); +void sem_obtain(struct Semaphore *s); +void sem_release(struct Semaphore *s); +/* \} */ + +int sem_testRun(void); +int sem_testSetup(void); +int sem_testTearDown(void); + +#endif /* KERN_SEM_H */ diff --git a/2.5/bertos/kern/sem_test.c b/2.5/bertos/kern/sem_test.c new file mode 100644 index 00000000..555f755d --- /dev/null +++ b/2.5/bertos/kern/sem_test.c @@ -0,0 +1,204 @@ +/** + * \file + * + * + * \brief Semaphore test. + * + * \version $Id$ + * + * \author Daniele Basile + * \author Stefano Fedrigo + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_sem.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SEMAPHORES" >> $cfgdir/cfg_sem.h + * $test$: echo "#define CONFIG_KERN_SEMAPHORES 1" >> $cfgdir/cfg_sem.h + */ + +#include +#include + +#include +#include +#include + +#include + +// Global settings for the test. +#define MAX_GLOBAL_COUNT 1024 +#define TEST_TIME_OUT_MS 6000 +#define DELAY 5 + +// Settings for the test process. +//Process 1 +#define INC_PROC_T1 1 +#define DELAY_PROC_T1 INC_PROC_T1*DELAY +//Process 2 +#define INC_PROC_T2 3 +#define DELAY_PROC_T2 INC_PROC_T2*DELAY +//Process 3 +#define INC_PROC_T3 5 +#define DELAY_PROC_T3 INC_PROC_T3*DELAY +//Process 4 +#define INC_PROC_T4 7 +#define DELAY_PROC_T4 INC_PROC_T4*DELAY +//Process 5 +#define INC_PROC_T5 11 +#define DELAY_PROC_T5 INC_PROC_T5*DELAY +//Process 6 +#define INC_PROC_T6 13 +#define DELAY_PROC_T6 INC_PROC_T6*DELAY +//Process 7 +#define INC_PROC_T7 17 +#define DELAY_PROC_T7 INC_PROC_T7*DELAY +//Process 8 +#define INC_PROC_T8 19 +#define DELAY_PROC_T8 INC_PROC_T8*DELAY + +Semaphore sem; +unsigned int global_count = 0; + +/* + * These macros generate the code needed to create the test process functions. + */ +#define PROC_TEST(num) static void proc_semTest##num(void) \ +{ \ + unsigned int local_count = 0; \ + \ + for (int i = 0; i < INC_PROC_T##num; ++i) \ + { \ + sem_obtain(&sem); \ + kprintf("> test%d: Obtain semaphore.\n", num); \ + local_count = global_count; \ + kprintf("> test%d: Read global count [%d]\n", num, local_count); \ + timer_delay(DELAY_PROC_T##num); \ + local_count += INC_PROC_T##num; \ + global_count = local_count; \ + kprintf("> test%d: Update count g[%d] l[%d]\n", num, global_count, local_count); \ + sem_release(&sem); \ + kprintf("> test%d: Relase semaphore.\n", num); \ + } \ +} \ + +#define PROC_TEST_STACK(num) PROC_DEFINE_STACK(proc_sem_test##num##_stack, KERN_MINSTACKSIZE * 2) +#define PROC_TEST_INIT(num) proc_new(proc_semTest##num, NULL, sizeof(proc_sem_test##num##_stack), proc_sem_test##num##_stack); + +// Define process +PROC_TEST(1) +PROC_TEST(2) +PROC_TEST(3) +PROC_TEST(4) +PROC_TEST(5) +PROC_TEST(6) +PROC_TEST(7) +PROC_TEST(8) + +// Define process stacks for test. +PROC_TEST_STACK(1) +PROC_TEST_STACK(2) +PROC_TEST_STACK(3) +PROC_TEST_STACK(4) +PROC_TEST_STACK(5) +PROC_TEST_STACK(6) +PROC_TEST_STACK(7) +PROC_TEST_STACK(8) + +/** + * Run semaphore test + */ +int sem_testRun(void) +{ + ticks_t start_time = timer_clock(); + + kprintf("Run semaphore test..\n"); + + //Init the process tests + PROC_TEST_INIT(1) + PROC_TEST_INIT(2) + PROC_TEST_INIT(3) + PROC_TEST_INIT(4) + PROC_TEST_INIT(5) + PROC_TEST_INIT(6) + PROC_TEST_INIT(7) + PROC_TEST_INIT(8) + kputs("> Main: Processes created\n"); + + /* + * Wait until all processes exit, if something goes wrong we return an + * error after timeout_ms. + */ + while((timer_clock() - start_time) < ms_to_ticks(TEST_TIME_OUT_MS)) + { + if (sem_attempt(&sem)) + { + kputs("> Main: Check if test has finished..\n"); + if(global_count == MAX_GLOBAL_COUNT) + { + kputs("> Main: Test Finished..Ok!\n"); + return 0; + } + sem_release(&sem); + kputs("> Main: Test is still running..\n"); + } + proc_yield(); + } + + kputs("Semaphore Test fail..\n"); + return -1; +} + +int sem_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Semaphore.."); + sem_init(&sem); + kprintf("Done.\n"); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + + return 0; +} + +int sem_testTearDown(void) +{ + kputs("TearDown Semaphore test.\n"); + return 0; +} + +TEST_MAIN(sem); diff --git a/2.5/bertos/kern/signal.c b/2.5/bertos/kern/signal.c new file mode 100644 index 00000000..139e69da --- /dev/null +++ b/2.5/bertos/kern/signal.c @@ -0,0 +1,303 @@ +/** + * \file + * + * + * \brief IPC signals implementation. + * + * Signals are a low-level IPC primitive. A process receives a signal + * when some external event has happened. Like interrupt requests, + * signals do not carry any additional information. If processing a + * specific event requires additional data, the process must obtain it + * through some other mechanism. + * + * Despite the name, one shouldn't confuse these signals with POSIX + * signals. POSIX signals are usually executed synchronously, like + * software interrupts. + * + * Signals are very low overhead. Using them exclusively to wait + * for multiple asynchronous events results in very simple dispatch + * logic with low processor and resource usage. + * + * The "event" module is a higher-level interface that can optionally + * deliver signals to processes. Messages provide even higher-level + * IPC services built on signals. Semaphore arbitration is also + * implemented using signals. + * + * In this implementation, each process has a limited set of signal + * bits (usually 32) and can wait for multiple signals at the same + * time using sig_wait(). Signals can also be polled using sig_check(), + * but a process spinning on its signals usually defeats their purpose + * of providing a multitasking-friendly infrastructure for event-driven + * applications. + * + * Signals are like flags: they are either active or inactive. After an + * external event has delivered a particular signal, it remains raised until + * the process acknowledges it using either sig_wait() or sig_check(). + * Counting signals is not a reliable way to count how many times a + * particular event has occurred, because the same signal may be + * delivered twice before the process can notice. + * + * Signals can be delivered synchronously via sig_send() or asynchronously via + * sig_post(). + * + * In the synchronous case the process is awakened if it was waiting for any + * signal and immediately dispatched for execution via a direct context switch, + * if its priority is greater than the running process. + * + * 
+ * - Synchronous-signal delivery:
+ *
+ *     [P1]____sig_send()____proc_wakeup()____[P2]
+ *
+ * + * In the asynchronous case, the process is scheduled for execution as a + * consequence of the delivery, but it will be dispatched by the scheduler as + * usual, according to the scheduling policy. + * + * 
+ * - Asynchronous-signal delivery:
+ *
+ *     [P1]____sig_post()____[P1]____proc_schedule()____[P2]
+ *
+ * + * In this way, any execution context, including an interrupt handler, can + * deliver a signal to a process. However, synchronous signal delivery from a + * non-sleepable context (like an interrupt handler) is forbidden in order to + * avoid potential deadlock conditions. Instead, sig_post() can be used from + * any context, expecially from interrupt context or when the preemption is + * disabled. + * + * Multiple independent signals may be delivered at once with a single + * invocation of sig_send() or sig_post(), although this is rarely useful. + * + * \section signal_allocation Signal Allocation + * + * There's no hardcoded mapping of specific events to signal bits. + * The meaning of a particular signal bit is defined by an agreement + * between the delivering entity and the receiving process. + * For instance, a terminal driver may be designed to deliver + * a signal bit called SIG_INT when it reads the CTRL-C sequence + * from the keyboard, and a process may react to it by quitting. + * + * \section sig_single SIG_SINGLE + * + * The SIG_SINGLE bit is reserved as a convenient shortcut in those + * simple scenarios where a process needs to wait on just one event + * synchronously. By using SIG_SINGLE, there's no need to allocate + * a specific signal from the free pool. The constraints for safely + * accessing SIG_SINGLE are: + * - The process MUST sig_wait() exclusively on SIG_SINGLE + * - SIG_SIGNAL MUST NOT be left pending after use (sig_wait() will reset + * it automatically) + * - Do not sleep between starting the asynchronous task that will fire + * SIG_SINGLE, and the call to sig_wait(). + * - Do not call system functions that may implicitly sleep, such as + * timer_delayTicks(). + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "signal.h" + +#include "cfg/cfg_timer.h" +#include +#include + +#include +#include +#include + + +#if CONFIG_KERN_SIGNALS + +// Check config dependencies +CONFIG_DEPEND(CONFIG_KERN_SIGNALS, CONFIG_KERN); + +/** + * Check if any of the signals in \a sigs has occurred and clear them. + * + * \return the signals that have occurred. + */ +sigmask_t sig_check(sigmask_t sigs) +{ + sigmask_t result; + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + result = current_process->sig_recv & sigs; + current_process->sig_recv &= ~sigs; + IRQ_RESTORE(flags); + + return result; +} + + +/** + * Sleep until any of the signals in \a sigs occurs. + * \return the signal(s) that have awoken the process. + */ +sigmask_t sig_wait(sigmask_t sigs) +{ + sigmask_t result; + + /* Sleeping with IRQs disabled or preemption forbidden is illegal */ + IRQ_ASSERT_ENABLED(); + ASSERT(proc_preemptAllowed()); + + /* + * This is subtle: there's a race condition where a concurrent process + * or an interrupt may call sig_send()/sig_post() to set a bit in + * Process.sig_recv just after we have checked for it, but before we've + * set Process.sig_wait to let them know we want to be awaken. + * + * In this case, we'd deadlock with the signal bit already set and the + * process never being reinserted into the ready list. + */ + IRQ_DISABLE; + + /* Loop until we get at least one of the signals */ + while (!(result = current_process->sig_recv & sigs)) + { + /* + * Tell "them" that we want to be awaken when any of these + * signals arrives. + */ + current_process->sig_wait = sigs; + + /* Go to sleep and proc_switch() to another process. */ + proc_switch(); + /* + * When we come back here, the wait mask must have been + * cleared by someone through sig_send()/sig_post(), and at + * least one of the signals we were expecting must have been + * delivered to us. + */ + ASSERT(!current_process->sig_wait); + ASSERT(current_process->sig_recv & sigs); + } + + /* Signals found: clear them and return */ + current_process->sig_recv &= ~sigs; + + IRQ_ENABLE; + return result; +} + +#if CONFIG_TIMER_EVENTS + +#include +/** + * Sleep until any of the signals in \a sigs or \a timeout ticks elapse. + * If the timeout elapse a SIG_TIMEOUT is added to the received signal(s). + * \return the signal(s) that have awoken the process. + * \note Caller must check return value to check which signal awoke the process. + */ +sigmask_t sig_waitTimeout(sigmask_t sigs, ticks_t timeout) +{ + Timer t; + sigmask_t res; + cpu_flags_t flags; + + ASSERT(!sig_check(SIG_TIMEOUT)); + ASSERT(!(sigs & SIG_TIMEOUT)); + /* IRQ are needed to run timer */ + ASSERT(IRQ_ENABLED()); + + timer_set_event_signal(&t, proc_current(), SIG_TIMEOUT); + timer_setDelay(&t, timeout); + timer_add(&t); + res = sig_wait(SIG_TIMEOUT | sigs); + + IRQ_SAVE_DISABLE(flags); + /* Remove timer if sigs occur before timer signal */ + if (!(res & SIG_TIMEOUT) && !sig_check(SIG_TIMEOUT)) + timer_abort(&t); + IRQ_RESTORE(flags); + return res; +} + +#endif // CONFIG_TIMER_EVENTS + +INLINE void __sig_signal(Process *proc, sigmask_t sigs, bool wakeup) +{ + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + /* Set the signals */ + proc->sig_recv |= sigs; + + /* Check if process needs to be awoken */ + if (proc->sig_recv & proc->sig_wait) + { + ASSERT(proc != current_process); + + proc->sig_wait = 0; + if (wakeup) + proc_wakeup(proc); + else + SCHED_ENQUEUE_HEAD(proc); + } + IRQ_RESTORE(flags); +} + +/** + * Send the signals \a sigs to the process \a proc and immeditaly dispatch it + * for execution. + * + * The process will be awoken if it was waiting for any of them and immediately + * dispatched for execution. + * + * \note This function can't be called from IRQ context, use sig_post() + * instead. + */ +void sig_send(Process *proc, sigmask_t sigs) +{ + ASSERT_USER_CONTEXT(); + IRQ_ASSERT_ENABLED(); + ASSERT(proc_preemptAllowed()); + + __sig_signal(proc, sigs, true); +} + +/** + * Send the signals \a sigs to the process \a proc. + * The process will be awoken if it was waiting for any of them. + * + * \note This call is interrupt safe. + */ +void sig_post(Process *proc, sigmask_t sigs) +{ + __sig_signal(proc, sigs, false); +} + +#endif /* CONFIG_KERN_SIGNALS */ diff --git a/2.5/bertos/kern/signal.h b/2.5/bertos/kern/signal.h new file mode 100644 index 00000000..bef44a9e --- /dev/null +++ b/2.5/bertos/kern/signal.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief Signal module for IPC. + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "signal" + * $WIZ$ module_depends = "kernel", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_signal.h" + */ + +#ifndef KERN_SIGNAL_H +#define KERN_SIGNAL_H + +#include +#include // BV() + +/* Fwd decl */ +struct Process; + +/* Inter-process Communication services */ +sigmask_t sig_check(sigmask_t sigs); +void sig_send(struct Process *proc, sigmask_t sig); +void sig_post(struct Process *proc, sigmask_t sig); +/* + * XXX: this is provided for backword compatibility, consider to make this + * deprecated for the future. + */ +INLINE void sig_signal(struct Process *proc, sigmask_t sig) +{ + sig_post(proc, sig); +} +sigmask_t sig_wait(sigmask_t sigs); +sigmask_t sig_waitTimeout(sigmask_t sigs, ticks_t timeout); + +int signal_testRun(void); +int signal_testSetup(void); +int signal_testTearDown(void); + +/** + * \name Signal definitions + * \{ + */ +#define SIG_USER0 BV(0) /**< Free for user usage */ +#define SIG_USER1 BV(1) /**< Free for user usage */ +#define SIG_USER2 BV(2) /**< Free for user usage */ +#define SIG_USER3 BV(3) /**< Free for user usage */ +#define SIG_TIMEOUT BV(4) /**< Reserved for timeout use */ +#define SIG_SYSTEM5 BV(5) /**< Reserved for system use */ +#define SIG_SYSTEM6 BV(6) /**< Reserved for system use */ +#define SIG_SINGLE BV(7) /**< Used to wait for a single event */ +/*\}*/ + +#endif /* KERN_SIGNAL_H */ diff --git a/2.5/bertos/kern/signal_test.c b/2.5/bertos/kern/signal_test.c new file mode 100644 index 00000000..3b5ff1cb --- /dev/null +++ b/2.5/bertos/kern/signal_test.c @@ -0,0 +1,190 @@ +/** + * \file + * + * + * \brief Signals test. + * + * \version $Id$ + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + */ + +#include "cfg/cfg_timer.h" +#include +#include + +#include +#include +#include + +#include + +// Set mask with all signal that we want to test. +int test_signal[] = { + SIG_USER0, + SIG_USER1, + SIG_USER2, + SIG_USER3, + SIG_TIMEOUT, + SIG_SYSTEM5, + SIG_SYSTEM6, + SIG_SINGLE +}; + +// Current signal to send +int count = 0; + +sigmask_t sig_to_master; +sigmask_t sig_to_slave; + +/* + * These macros generate the code needed to create the test process functions. + */ +#define PROC_TEST_SLAVE(index, signal) \ +static void proc_signalTest##index(void) \ +{ \ + kputs("> Slave [" #index "]: Wait signal [" #signal "]\n"); \ + sig_wait(signal); \ + kputs("> Slave [" #index "]: send signal [" #signal "]\n"); \ + sig_send(proc_currentUserData(), signal); \ +} + +#define MAIN_CHECK_SIGNAL(index, slave) \ + do { \ + kprintf("> Main: send signal [%d]\n", test_signal[index]); \ + sig_send(slave, test_signal[index]); \ + kprintf("> Main: wait signal [%d]\n", test_signal[index]); \ + sig_wait(test_signal[index]); \ + count++; \ + } while(0) \ + +#if CONFIG_KERN_HEAP + +#define PROC_TEST_SLAVE_INIT(index, master_process) proc_new(proc_signalTest##index, master_process, KERN_MINSTACKSIZE * 2, NULL) + +#else + +#define PROC_TEST_SLAVE_STACK(index) PROC_DEFINE_STACK(proc_signal_test##index##_stack, KERN_MINSTACKSIZE * 2); +#define PROC_TEST_SLAVE_INIT(index, master_process) proc_new(proc_signalTest##index, master_process, sizeof(proc_signal_test##index##_stack), proc_signal_test##index##_stack) + +PROC_TEST_SLAVE_STACK(0) +PROC_TEST_SLAVE_STACK(1) +PROC_TEST_SLAVE_STACK(2) +PROC_TEST_SLAVE_STACK(3) +PROC_TEST_SLAVE_STACK(4) +PROC_TEST_SLAVE_STACK(5) +PROC_TEST_SLAVE_STACK(6) +PROC_TEST_SLAVE_STACK(7) + +#endif + +// Generate the code for signal test. +PROC_TEST_SLAVE(0, SIG_USER0) +PROC_TEST_SLAVE(1, SIG_USER1) +PROC_TEST_SLAVE(2, SIG_USER2) +PROC_TEST_SLAVE(3, SIG_USER3) +PROC_TEST_SLAVE(4, SIG_TIMEOUT) +PROC_TEST_SLAVE(5, SIG_SYSTEM5) +PROC_TEST_SLAVE(6, SIG_SYSTEM6) +PROC_TEST_SLAVE(7, SIG_SINGLE) + +/** + * Run signal test + */ +int signal_testRun(void) +{ + struct Process *main_process = proc_current(); + struct Process *slave_0; + struct Process *slave_1; + struct Process *slave_2; + struct Process *slave_3; + struct Process *slave_4; + struct Process *slave_5; + struct Process *slave_6; + struct Process *slave_7; + + kprintf("Run Signal test..\n"); + slave_0 = PROC_TEST_SLAVE_INIT(0, main_process); + slave_1 = PROC_TEST_SLAVE_INIT(1, main_process); + slave_2 = PROC_TEST_SLAVE_INIT(2, main_process); + slave_3 = PROC_TEST_SLAVE_INIT(3, main_process); + slave_4 = PROC_TEST_SLAVE_INIT(4, main_process); + slave_5 = PROC_TEST_SLAVE_INIT(5, main_process); + slave_6 = PROC_TEST_SLAVE_INIT(6, main_process); + slave_7 = PROC_TEST_SLAVE_INIT(7, main_process); + + MAIN_CHECK_SIGNAL(0, slave_0); + MAIN_CHECK_SIGNAL(1, slave_1); + MAIN_CHECK_SIGNAL(2, slave_2); + MAIN_CHECK_SIGNAL(3, slave_3); + MAIN_CHECK_SIGNAL(4, slave_4); + MAIN_CHECK_SIGNAL(5, slave_5); + MAIN_CHECK_SIGNAL(6, slave_6); + MAIN_CHECK_SIGNAL(7, slave_7); + + if(count == countof(test_signal)) + { + kprintf("Signal test finished..ok!\n"); + return 0; + } + + kprintf("Signal test finished..fail!\n"); + return -1; +} + +int signal_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + return 0; +} + +int signal_testTearDown(void) +{ + kputs("TearDown Signal test.\n"); + return 0; +} + +TEST_MAIN(signal); diff --git a/2.5/bertos/mware/blanker.c b/2.5/bertos/mware/blanker.c new file mode 100644 index 00000000..4168504c --- /dev/null +++ b/2.5/bertos/mware/blanker.c @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Display Blanker (implementation). + * + * \version $Id$ + * + * \author Bernie Innocenti + */ + +#include "blanker.h" +#include "hw/hw_blanker.h" + +#include +#include + +/* Time without input events before starting blanker */ +#define BLK_BLANKTIMEOUT (15 * 1000) /* ms */ + + +#warning FIXME:Revise me! + +/** Keyboard event handler to listen for key presses in blanker. */ +static KbdHandler blk_KbdHandler; + +/** Time since last key event. */ +static ticks_t blk_lastevent; + +/** Display blanking function is enabled. */ +static bool blk_enabled; + +/** Display blanker is engaged right now. */ +static bool blk_active; + + +static bool blk_on(void) +{ + if (!blk_active) + { + blk_active = true; + BLK_LCDOFF; + } + return true; +} + + +static void blk_off(void) +{ + if (blk_active) + { + blk_active = false; + BLK_LCDON; + } +} + + +void blk_retrigger(void) +{ + blk_lastevent = timer_clock(); + blk_off(); +} + +#if 0 +/** + * Matrix-like screen saver effect + */ +static void blk_hack(void) +{ + static signed char blk_colstart[CONFIG_LCD_COLS]; + UBYTE row, col; + + + if (rand()%3 == 0) + { + /* Modify one column */ + col = rand() % CONFIG_LCD_COLS; + blk_colstart[col] += rand() % 12 - 5; + } + + for (col = 0; col < CONFIG_LCD_COLS; ++col) + { + if (blk_colstart[col] > 0) + { + --blk_colstart[col]; + + /* Scroll down */ + for(row = CONFIG_LCD_ROWS-1; row; --row) + { + lcd_SetAddr(blk_layer, LCD_POS(col,row)); + lcd_PutChar(blk_layer->Buf[LCD_POS(col,row-1)], blk_layer); + } + + /* Add new kanji */ + lcd_SetAddr(blk_layer, LCD_POS(col,0)); + lcd_PutChar((char)(rand() % 127 + 128), blk_layer); + } + else if (blk_colstart[col] < 0) + { + ++blk_colstart[col]; + + /* Clear tail */ + for(row = 0; row < CONFIG_LCD_ROWS; ++row) + { + if (blk_layer->Buf[LCD_POS(col,row)] != ' ') + { + lcd_SetAddr(blk_layer, LCD_POS(col,row)); + lcd_PutChar(' ', blk_layer); + break; + } + } + } + } +} +#endif + + +static keymask_t blk_handlerFunc(keymask_t key) +{ + /* key used to turn off blanker */ + static keymask_t offkey; + + ticks_t now = timer_clock(); + + /* If key pressed */ + if (key != 0) + { + blk_lastevent = now; + if (blk_active) + { + blk_off(); + + /* remember and eat key event */ + offkey = key; + key = 0; + } + else if (key == offkey) + { + /* keep eating the key until released */ + key = 0; + } + + /* pass key through */ + return key; + } + + /* reset off key */ + offkey = 0; + + /* Blank timeout reached? */ + if (now - blk_lastevent > ms_to_ticks(BLK_BLANKTIMEOUT)) + { + /* Enable blanker unless already done */ + if (!blk_active && !blk_on()) + return 0; + +#if 0 + /* Do some nice visual effect */ + blk_hack(); +#endif /* _DEBUG */ + } + + return 0; +} + + +void blk_enable(void) +{ + if (!blk_enabled) + { + blk_active = false; + blk_lastevent = timer_clock(); + + /* Add display blanker handler */ + blk_KbdHandler.hook = blk_handlerFunc; + blk_KbdHandler.pri = 100; /* high priority */ + blk_KbdHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&blk_KbdHandler); + + blk_enabled = true; + } +} + + +void blk_disable(void) +{ + if (blk_enabled) + { + kbd_remHandler(&blk_KbdHandler); + blk_off(); + blk_enabled = false; + } +} + diff --git a/2.5/bertos/mware/blanker.h b/2.5/bertos/mware/blanker.h new file mode 100644 index 00000000..9af09189 --- /dev/null +++ b/2.5/bertos/mware/blanker.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Display Blanker (implementation). + * + * \version $Id$ + * + * \author Bernie Innocenti + */ +#ifndef MWARE_BLANKER_H +#define MWARE_BLANKER_H + +extern void blk_enable(void); +extern void blk_disable(void); +extern void blk_retrigger(void); + +#endif /* MWARE_BLANKER_H */ diff --git a/2.5/bertos/mware/byteorder.h b/2.5/bertos/mware/byteorder.h new file mode 100644 index 00000000..2d5bede6 --- /dev/null +++ b/2.5/bertos/mware/byteorder.h @@ -0,0 +1,2 @@ +#warning This header is OBSOLETE +#include diff --git a/2.5/bertos/mware/cmd_hunk.h b/2.5/bertos/mware/cmd_hunk.h new file mode 100644 index 00000000..878e93bb --- /dev/null +++ b/2.5/bertos/mware/cmd_hunk.h @@ -0,0 +1,147 @@ +/** + * \file + * + * + * \brief Preprocessor magic to create hunks for the commands executed from the parser + * + * This module permits to create hunks for the functions that must be executed through + * RPC commands. For instance, given this code: + * + * \code + * ResultCode cmd_add(long a, long b, long* result); + * DECLARE_COMMAND_HUNK(add, (long)(long)(NIL), (long)(NIL)); + * // ^ parameters ^ return values + * \endcode + * + * The macro is expanded to: + * + * \code + * ResultCode cmd_add_hunk(params argv[], params results[]) + * { + * return cmd_add(argv[0].l, argv[1].l, &results[0].l); + * } + * + * const struct CmdTemplate cmd_add_template = + * { + * "add", "dd", "d", cmd_add_hunk + * }; + * \endcode + * + * which is all the boilerplate needed to make the function ready for the RPC. + * The implementation uses the Boost Preprocessor Library (part of the Boost + * library, available at http://www.boost.org). The version we developed the + * code with is 1.31. + * + * \version $Id$ + * + * \author Giovanni Bajo + * + */ + +#ifndef CMD_HUNK_H +#define CMD_HUNK_H + +#include "parser.h" + +// Bring in the Boost Preprocess Library +#include + +#define HUNK_INDEX_FOR_NIL 0 +#define HUNK_INDEX_FOR_string 1 +#define HUNK_INDEX_FOR_long 2 +#define HUNK_ARRAY_LETTERS (3, (NIL, s, l)) +#define HUNK_ARRAY_STRINGS (3, ("", "s", "d")) + +// Transform int->l, float->f, etc. +#define HUNK_TYPE_LETTER(s, _, type) \ + BOOST_PP_CAT(HUNK_INDEX_FOR_, type) \ + /**/ + +#define HUNK_TRANSFORMER(_, array, elem) \ + BOOST_PP_ARRAY_ELEM(elem, array) \ + /**/ + +#define HUNK_SEQ_TRANS_ARRAY(seq, array) \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TRANSFORMER, array, seq) \ + /**/ + +#define HUNK_PARAM(_, n, seq) \ + args_results[n+1]. BOOST_PP_SEQ_ELEM(n, seq) \ + /**/ + +#define HUNK_RESULT(_, n, seq) \ + &args_results[n]. BOOST_PP_SEQ_ELEM(n, seq) \ + /**/ + +#define HUNK_IDENTITY(_, dummy, x) x +#define CMD_HUNK_TEMPLATE(func) cmd_##func###_template + +#define DECLARE_CMD_HUNK_2(func, name, param_types, result_types, flags) \ + static ResultCode cmd_##name##_hunk(parms args_results[]) \ + { \ + return cmd_##func( \ + BOOST_PP_ENUM(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(param_types)), HUNK_PARAM, HUNK_SEQ_TRANS_ARRAY(param_types, HUNK_ARRAY_LETTERS)) \ + BOOST_PP_COMMA_IF(BOOST_PP_AND(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(param_types)), BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(result_types)))) \ + BOOST_PP_ENUM(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(result_types)), HUNK_RESULT, HUNK_SEQ_TRANS_ARRAY(result_types, HUNK_ARRAY_LETTERS)) \ + ); \ + } \ + const struct CmdTemplate CMD_HUNK_TEMPLATE(name) = { \ + #name, \ + BOOST_PP_SEQ_FOR_EACH(HUNK_IDENTITY, _, HUNK_SEQ_TRANS_ARRAY(param_types, HUNK_ARRAY_STRINGS)), \ + BOOST_PP_SEQ_FOR_EACH(HUNK_IDENTITY, _, HUNK_SEQ_TRANS_ARRAY(result_types, HUNK_ARRAY_STRINGS)), \ + cmd_##name##_hunk, \ + flags \ + } \ + /**/ + +#define DECLARE_CMD_HUNK(func, param_types, result_types) \ + DECLARE_CMD_HUNK_2(func, func, \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \ + 0) \ + /**/ + +#define DECLARE_CMD_HUNK_NAME(func, name, param_types, result_types) \ + DECLARE_CMD_HUNK_2(func, name, \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \ + 0) \ + /**/ + +#define DECLARE_CMD_HUNK_FLAGS(func, param_types, result_types, flags) \ + DECLARE_CMD_HUNK_2(func, func, \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \ + flags) \ + /**/ + +#endif diff --git a/2.5/bertos/mware/event.c b/2.5/bertos/mware/event.c new file mode 100644 index 00000000..c596e12f --- /dev/null +++ b/2.5/bertos/mware/event.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Events handling implementation + * + * \version $Id$ + * + * \author Giovanni Bajo + */ + + +#include "event.h" + +void event_hook_ignore(UNUSED_ARG(Event *, e)) +{ +} + +#if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS +void event_hook_signal(Event *e) +{ + sig_post((e)->Ev.Sig.sig_proc, (e)->Ev.Sig.sig_bit); +} +#endif + +void event_hook_softint(Event *e) +{ + e->Ev.Int.func(e->Ev.Int.user_data); +} diff --git a/2.5/bertos/mware/event.h b/2.5/bertos/mware/event.h new file mode 100644 index 00000000..74a46793 --- /dev/null +++ b/2.5/bertos/mware/event.h @@ -0,0 +1,137 @@ +/** + * \file + * + * + * \brief Events handling + * + * This module implements a common system for executing + * a user defined action calling a hook function. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef KERN_EVENT_H +#define KERN_EVENT_H + +#include +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" + +#if CONFIG_KERN + #if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + #include + #endif + + /* Forward decl */ + struct Process; +#endif + + +/// User defined callback type +typedef void (*Hook)(void *); + +typedef struct Event +{ + void (*action)(struct Event *); + union + { +#if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + struct + { + struct Process *sig_proc; /* Process to be signalled */ + sigbit_t sig_bit; /* Signal to send */ + } Sig; +#endif + struct + { + Hook func; /* Pointer to softint hook */ + void *user_data; /* Data to be passed back to user hook */ + } Int; + } Ev; +} Event; + +void event_hook_ignore(Event *event); +void event_hook_signal(Event *event); +void event_hook_softint(Event *event); + +/** Initialize the event \a e as a no-op */ +#define event_initNone(e) \ + ((e)->action = event_hook_ignore) + +/** Same as event_initNone(), but returns the initialized event */ +INLINE Event event_createNone(void); +INLINE Event event_createNone(void) +{ + Event e; + e.action = event_hook_ignore; + return e; +} + +/** Initialize the event \a e with a software interrupt (call function \a f, with parameter \a u) */ +#define event_initSoftint(e,f,u) \ + ((e)->action = event_hook_softint,(e)->Ev.Int.func = (f), (e)->Ev.Int.user_data = (u)) + +/** Same as event_initSoftint(), but returns the initialized event */ +INLINE Event event_createSoftint(Hook func, void *user_data) +{ + Event e; + e.action = event_hook_softint; + e.Ev.Int.func = func; + e.Ev.Int.user_data = user_data; + return e; +} + +#if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + +/** Initialize the event \a e with a signal (send signal \a s to process \a p) */ +#define event_initSignal(e,p,s) \ + ((e)->action = event_hook_signal,(e)->Ev.Sig.sig_proc = (p), (e)->Ev.Sig.sig_bit = (s)) + +/** Same as event_initSignal(), but returns the initialized event */ +INLINE Event event_createSignal(struct Process *proc, sigbit_t bit) +{ + Event e; + e.action = event_hook_signal; + e.Ev.Sig.sig_proc = proc; + e.Ev.Sig.sig_bit = bit; + return e; +} + +#endif + +/** Trigger an event */ +INLINE void event_do(struct Event *e) +{ + e->action(e); +} + +#endif /* KERN_EVENT_H */ diff --git a/2.5/bertos/mware/except.h b/2.5/bertos/mware/except.h new file mode 100644 index 00000000..c600828d --- /dev/null +++ b/2.5/bertos/mware/except.h @@ -0,0 +1,125 @@ +/** + * \file + * + * + * \brief C++-like structured exception handling for C programs + * + * \version $Id$ + * \author Bernie Innocenti + */ +#ifndef MWARE_EXCEPT_H +#define MWARE_EXCEPT_H + +#include + +#include + +#define EXCEPT_CONTEXTS 8 + +/** + * A stack of jump buffers used to record try sites + * so they can be reached from throw sites. + * + * The stack contains return points for each nested + * context. jmp_buf's are pushed into the stack at + * try points and popped out when the try block ends + * normally or when an exception is thrown. + */ +extern jmp_buf except_stack[EXCEPT_CONTEXTS]; +extern int except_top; + +#define PUSH_EXCEPT (ASSERT(except_top < EXCEPT_CONTEXTS), setjmp(except_stack[except_top++])) +#define POP_EXCEPT (ASSERT(except_top > 0), --except_top) +#define DO_EXCEPT (ASSERT(except_top > 0), longjmp(except_stack[--except_top], true)) + +/** + * Jump buffer to use when throwing an exception or aborting an operation + * + * User code can throw exceptions like this: + * + * \code + * void a_function_throwing_exceptions(void) + * { + * if (some_error_condition) + * THROW; + * } + * \endcode + * + * Catching exceptions (brackets are optional): + * + * \code + * EXCEPT_DEFINE; + * + * void a_function_catching_an_exception(void) + * { + * TRY + * { + * printf("Entered try block\n"); + * a_function_throwing_exceptions(); + * printf("Survived execution of critical code\n"); + * } + * CATCH + * { + * printf("Exception caught!\n"); + * } + * CATCH_END + * } + * \endcode + * + * Simple syntax when you don't need to do anything when catching an excaption: + * + * \code + * TRY + * printf("Entered try block\n"); + * a_function_throwing_exceptions(); + * printf("Survived execution of critical code\n"); + * TRY_END + * \endcode + * + * You also need to declare the exception stack once in + * your global declarations: + * \code + * EXCEPT_DEFINE; + * \endcode + */ +#define TRY if (PUSH_EXCEPT) { { +#define TRY_END } POP_EXCEPT; } +#define CATCH } POP_EXCEPT; } else { +#define CATCH_END } +#define THROW DO_EXCEPT + + +#define EXCEPT_DEFINE \ + jmp_buf except_stack[EXCEPT_CONTEXTS]; \ + int except_top; + +#endif /* MWARE_EXCEPT_H */ diff --git a/2.5/bertos/mware/formatwr.c b/2.5/bertos/mware/formatwr.c new file mode 100644 index 00000000..7293c4dc --- /dev/null +++ b/2.5/bertos/mware/formatwr.c @@ -0,0 +1,979 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Basic "printf", "sprintf" and "fprintf" formatter. + * + * This module is 100% reentrant and can be adapted to user-defined routines + * that needs formatters with special properties like different output + * channels or new format specifiers. + * + * To reduce size in applications not using real numbers or long integers + * the formatter may be compiled to exclude certain parts. This is + * controlled by giving a -D option a compilation time: + * + * \code + * -D CONFIG_PRINTF=PRINTF_FULL Full ANSI printf formatter, with some C99 extensions + * -D CONFIG_PRINTF=PRINTF_NOFLOAT Exclude support for floats + * -D CONFIG_PRINTF=PRINTF_REDUCED Simplified formatter (see below) + * -D CONFIG_PRINTF=PRINTF_NOMODIFIERS Exclude "l", "z" and "h" modifiers in reduced version + * -D CONFIG_PRINTF=PRINTF_DISABLED No formatter at all + * \endcode + * + * Code size on AVR4 with GCC 3.4.1 (-O2): + * \li PRINTF_FULL 2912byte (0xB60) + * \li PRINTF_NOFLOAT 1684byte (0x694) + * \li PRINTF_REDUCED 924byte (0x39C) + * \li PRINTF_NOMODIFIERS 416byte (0x1A0) + * + * Code/data size in words on DSP56K with CodeWarrior 6.0: + * \li PRINTF_FULL 1493/45 + * \li PRINTF_NOFLOAT 795/45 + * \li PRINTF_REDUCED 482/0 + * \li PRINTF_NOMODIFIERS 301/0 + * + * The reduced version of formatter is suitable when program size is critical + * rather than formatting power. This routine uses less than 20 bytes of + * stack space which makes it practical even in systems with less than 256 + * bytes of user RAM. + * + * The only formatting specifiers supported by the reduced formatter are: + * \code + * %% %c %s %d %o %x %X and %hd %ho %hx %hX %ld %lo %lx %lX + * \endcode + * + * It means that real variables are not supported as well as field + * width and precision arguments. + */ + + +#include "formatwr.h" + +#include "cfg/cfg_formatwr.h" /* CONFIG_ macros */ +#include /* ASSERT */ + +#include +#include + +#ifndef CONFIG_PRINTF_N_FORMATTER + /** Disable the arcane %n formatter. */ + #define CONFIG_PRINTF_N_FORMATTER 0 +#endif + +#ifndef CONFIG_PRINTF_OCTAL_FORMATTER + /** Disable the %o formatter. */ + #define CONFIG_PRINTF_OCTAL_FORMATTER 0 +#endif + +/* True if we must keep a count of the number of characters we print. */ +#define CONFIG_PRINTF_COUNT_CHARS (CONFIG_PRINTF_RETURN_COUNT || CONFIG_PRINTF_N_FORMATTER) + +#if CONFIG_PRINTF + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + #include + + /* Maximum precision for floating point values */ + typedef long double max_float_t; + + #if CONFIG_FRMWRI_BUFSIZE + #define FRMWRI_BUFSIZE CONFIG_FRMWRI_BUFSIZE + #else + /* Conservative estimate. Max float is 3.40282e+038, so %f (but not %e or %g) must have + * space for: sign + all 38 digits + '.' + 6 decimal digits (default) + * Use a high value to avoid unexpected buffer overflows. + */ + #define FRMWRI_BUFSIZE 134 + #endif +#else + #if CONFIG_FRMWRI_BUFSIZE + #define FRMWRI_BUFSIZE CONFIG_FRMWRI_BUFSIZE + #else + /* + * Conservative estimate. Should be (probably) 12 (which is the size necessary + * to represent (2^32-1) in octal plus the sign bit. + */ + #define FRMWRI_BUFSIZE 16 + #endif +#endif + +/* Probably useful for fancy microcontrollers such as the PIC, nobody knows. */ +#ifndef MEM_ATTRIBUTE +#define MEM_ATTRIBUTE +#endif + +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + #define IS_SHORT (h_modifier || (sizeof(int) == 2 && !l_modifier)) +#else + #define IS_SHORT (sizeof(int) == 2) +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + +static char *float_conversion(MEM_ATTRIBUTE max_float_t value, + MEM_ATTRIBUTE short nr_of_digits, + MEM_ATTRIBUTE char *buf, + MEM_ATTRIBUTE char format_flag, + MEM_ATTRIBUTE char g_flag, + MEM_ATTRIBUTE bool alternate_flag) +{ + MEM_ATTRIBUTE char *cp; + MEM_ATTRIBUTE char *buf_pointer; + MEM_ATTRIBUTE short n, i, dec_point_pos, integral_10_log; + + buf_pointer = buf; + integral_10_log = 0; + + if (value >= 1) + { + while (value >= 1e11) /* To speed up things a bit */ + { + value /= 1e10; + integral_10_log += 10; + } + while (value >= 10) + { + value /= 10; + integral_10_log++; + } + } + else if (value) /* Not just 0.0 */ + { + while (value <= 1e-10) /* To speed up things a bit */ + { + value *= 1e10; + integral_10_log -= 10; + } + while (value < 1) + { + value *= 10; + integral_10_log--; + } + } + if (g_flag) + { + if (integral_10_log < nr_of_digits && integral_10_log >= -4) + { + format_flag = 0; + nr_of_digits -= integral_10_log; + } + nr_of_digits--; + if (alternate_flag) + /* %#G - No removal of trailing zeros */ + g_flag = 0; + else + /* %G - Removal of trailing zeros */ + alternate_flag = true; + } + + /* %e or %E */ + if (format_flag) + { + dec_point_pos = 0; + } + else + { + /* Less than one... */ + if (integral_10_log < 0) + { + *buf_pointer++ = '0'; + if ((n = nr_of_digits) || alternate_flag) + *buf_pointer++ = '.'; + i = 0; + while (--i > integral_10_log && nr_of_digits) + { + *buf_pointer++ = '0'; + nr_of_digits--; + } + if (integral_10_log < (-n - 1)) + /* Nothing more to do */ + goto CLEAN_UP; + dec_point_pos = 1; + } + else + { + dec_point_pos = - integral_10_log; + } + } + + i = dec_point_pos; + while (i <= nr_of_digits ) + { + value -= (max_float_t)(n = (short)value); /* n=Digit value=Remainder */ + value *= 10; /* Prepare for next shot */ + *buf_pointer++ = n + '0'; + if ( ! i++ && (nr_of_digits || alternate_flag)) + *buf_pointer++ = '.'; + } + + /* Rounding possible */ + if (value >= 5) + { + n = 1; /* Carry */ + cp = buf_pointer - 1; + do + { + if (*cp != '.') + { + if ( (*cp += n) == ('9' + 1) ) + { + *cp = '0'; + n = 1; + } + else + n = 0; + } + } while (cp-- > buf); + if (n) + { + /* %e or %E */ + if (format_flag) + { + cp = buf_pointer; + while (cp > buf) + { + if (*(cp - 1) == '.') + { + *cp = *(cp - 2); + cp--; + } + else + *cp = *(cp - 1); + cp--; + } + integral_10_log++; + } + else + { + cp = ++buf_pointer; + while (cp > buf) + { + *cp = *(cp - 1); + cp--; + } + } + *buf = '1'; + } + } + +CLEAN_UP: + /* %G - Remove trailing zeros */ + if (g_flag) + { + while (*(buf_pointer - 1) == '0') + buf_pointer--; + if (*(buf_pointer - 1) == '.') + buf_pointer--; + } + + /* %e or %E */ + if (format_flag) + { + *buf_pointer++ = format_flag; + if (integral_10_log < 0) + { + *buf_pointer++ = '-'; + integral_10_log = -integral_10_log; + } + else + *buf_pointer++ = '+'; + n = 0; + buf_pointer +=10; + do + { + n++; + *buf_pointer++ = (integral_10_log % 10) + '0'; + integral_10_log /= 10; + } while ( integral_10_log || n < 2 ); + for ( i = n ; n > 0 ; n-- ) + *(buf_pointer - 11 - i + n) = *(buf_pointer - n); + buf_pointer -= 10; + } + return (buf_pointer); +} + +#endif /* CONFIG_PRINTF > PRINTF_NOFLOAT */ + +/** + * This routine forms the core and entry of the formatter. + * + * The conversion performed conforms to the ANSI specification for "printf". + */ +int +PGM_FUNC(_formatted_write)(const char * PGM_ATTR format, + void put_one_char(char, void *), + void *secret_pointer, + va_list ap) +{ +#if CONFIG_PRINTF > PRINTF_REDUCED + MEM_ATTRIBUTE static char bad_conversion[] = "???"; + MEM_ATTRIBUTE static char null_pointer[] = ""; + + MEM_ATTRIBUTE int precision; + MEM_ATTRIBUTE int n; +#if CONFIG_PRINTF_COUNT_CHARS + MEM_ATTRIBUTE int nr_of_chars; +#endif + MEM_ATTRIBUTE int field_width; + MEM_ATTRIBUTE char format_flag; + enum PLUS_SPACE_FLAGS { + PSF_NONE, PSF_PLUS, PSF_MINUS + }; + enum DIV_FACTOR { + DIV_DEC, DIV_HEX, +#if CONFIG_PRINTF_OCTAL_FORMATTER + DIV_OCT, +#endif + }; + MEM_ATTRIBUTE struct { + enum PLUS_SPACE_FLAGS plus_space_flag : 2; +#if CONFIG_PRINTF_OCTAL_FORMATTER + enum DIV_FACTOR div_factor : 2; +#else + enum DIV_FACTOR div_factor : 1; +#endif + bool left_adjust : 1; + bool l_L_modifier : 1; + bool h_modifier : 1; + bool alternate_flag : 1; + bool nonzero_value : 1; + bool zeropad : 1; +#if CPU_HARVARD + bool progmem : 1; +#endif + } flags; + MEM_ATTRIBUTE unsigned long ulong; + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + MEM_ATTRIBUTE max_float_t fvalue; +#endif + + MEM_ATTRIBUTE char *buf_pointer; + MEM_ATTRIBUTE char *ptr; + MEM_ATTRIBUTE const char *hex; + MEM_ATTRIBUTE char buf[FRMWRI_BUFSIZE]; + +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars = 0; +#endif + for (;;) /* Until full format string read */ + { + while ((format_flag = PGM_READ_CHAR(format++)) != '%') /* Until '%' or '\0' */ + { + if (!format_flag) +#if CONFIG_PRINTF_RETURN_COUNT + return (nr_of_chars); +#else + return 0; +#endif + put_one_char(format_flag, secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + if (PGM_READ_CHAR(format) == '%') /* %% prints as % */ + { + format++; + put_one_char('%', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + continue; + } + + flags.left_adjust = false; + flags.alternate_flag = false; + flags.plus_space_flag = PSF_NONE; + flags.zeropad = false; +#if CPU_HARVARD + flags.progmem = false; +#endif + ptr = buf_pointer = &buf[0]; + hex = HEX_tab; + + /* check for leading '-', '+', ' ','#' or '0' flags */ + for (;;) + { + switch (PGM_READ_CHAR(format)) + { + case ' ': + if (flags.plus_space_flag) + goto NEXT_FLAG; + case '+': + flags.plus_space_flag = PSF_PLUS; + goto NEXT_FLAG; + case '-': + flags.left_adjust = true; + goto NEXT_FLAG; + case '#': + flags.alternate_flag = true; + goto NEXT_FLAG; + case '0': + flags.zeropad = true; + goto NEXT_FLAG; + } + break; +NEXT_FLAG: + format++; + } + + /* Optional field width (may be '*') */ + if (PGM_READ_CHAR(format) == '*') + { + field_width = va_arg(ap, int); + if (field_width < 0) + { + field_width = -field_width; + flags.left_adjust = true; + } + format++; + } + else + { + field_width = 0; + while (PGM_READ_CHAR(format) >= '0' && PGM_READ_CHAR(format) <= '9') + field_width = field_width * 10 + (PGM_READ_CHAR(format++) - '0'); + } + + if (flags.left_adjust) + flags.zeropad = false; + + /* Optional precision (or '*') */ + if (PGM_READ_CHAR(format) == '.') + { + if (PGM_READ_CHAR(++format) == '*') + { + precision = va_arg(ap, int); + format++; + } + else + { + precision = 0; + while (PGM_READ_CHAR(format) >= '0' && PGM_READ_CHAR(format) <= '9') + precision = precision * 10 + (PGM_READ_CHAR(format++) - '0'); + } + } + else + precision = -1; + + /* At this point, "left_adjust" is nonzero if there was + * a sign, "zeropad" is 1 if there was a leading zero + * and 0 otherwise, "field_width" and "precision" + * contain numbers corresponding to the digit strings + * before and after the decimal point, respectively, + * and "plus_space_flag" is either 0 (no flag) or + * contains a plus or space character. If there was no + * decimal point, "precision" will be -1. + */ + + flags.l_L_modifier = false; + flags.h_modifier = false; + + /* Optional 'l','L','z' or 'h' modifier? */ + switch (PGM_READ_CHAR(format)) + { + case 'l': + case 'L': + #if SIZEOF_SIZE_T == SIZEOF_LONG + case 'z': + flags.l_L_modifier = true; + #elif SIZEOF_SIZE_T == SIZEOF_INT + flags.l_L_modifier = true; + case 'z': + #endif + format++; + break; + + case 'h': + flags.h_modifier = true; + format++; + break; + + } + + /* + * At exit from the following switch, we will emit + * the characters starting at "buf_pointer" and + * ending at "ptr"-1 + */ + switch (format_flag = PGM_READ_CHAR(format++)) + { +#if CONFIG_PRINTF_N_FORMATTER + case 'n': + if (sizeof(short) != sizeof(int)) + { + if (sizeof(int) != sizeof(long)) + { + if (h_modifier) + *va_arg(ap, short *) = nr_of_chars; + else if (flags.l_L_modifier) + *va_arg(ap, long *) = nr_of_chars; + else + *va_arg(ap, int *) = nr_of_chars; + } + else + { + if (h_modifier) + *va_arg(ap, short *) = nr_of_chars; + else + *va_arg(ap, int *) = nr_of_chars; + } + } + else + { + if (flags.l_L_modifier) + *va_arg(ap, long *) = nr_of_chars; + else + *va_arg(ap, int *) = nr_of_chars; + } + continue; +#endif + case 'c': + buf[0] = va_arg(ap, int); + ptr++; + break; + + /* Custom formatter for strings in program memory. */ + case 'S': +#if CPU_HARVARD + flags.progmem = true; +#endif + /* Fall trough */ + + case 's': + if ( !(buf_pointer = va_arg(ap, char *)) ) + buf_pointer = null_pointer; + if (precision < 0) + precision = 10000; + + /* + * Move `ptr' to the last character of the + * string that will be actually printed. + */ + ptr = buf_pointer; +#if CPU_HARVARD + if (flags.progmem) + { + for (n=0; pgm_read_char(ptr) && n < precision; n++) + ++ptr; + } + else +#endif + for (n=0; *ptr && n < precision; n++) + ++ptr; + break; + +#if CONFIG_PRINTF_OCTAL_FORMATTER + case 'o': + if (flags.alternate_flag && !precision) + precision++; +#endif + case 'x': + hex = hex_tab; + case 'u': + case 'p': + case 'X': + if (format_flag == 'p') +#if defined(__AVR__) || defined(__I196__) /* 16bit pointers */ + ulong = (unsigned long)(unsigned short)va_arg(ap, char *); +#else /* 32bit pointers */ + ulong = (unsigned long)va_arg(ap, char *); +#endif /* 32bit pointers */ + else if (flags.l_L_modifier) + ulong = va_arg(ap, unsigned long); + else if (flags.h_modifier) + ulong = (unsigned long)(unsigned short)va_arg(ap, unsigned int); + else + ulong = va_arg(ap, unsigned int); + + flags.div_factor = +#if CONFIG_PRINTF_OCTAL_FORMATTER + (format_flag == 'o') ? DIV_OCT : +#endif + (format_flag == 'u') ? DIV_DEC : DIV_HEX; + flags.plus_space_flag = PSF_NONE; + goto INTEGRAL_CONVERSION; + + case 'd': + case 'i': + if (flags.l_L_modifier) + ulong = (unsigned long)(long)va_arg(ap, long); + else + ulong = (unsigned long)(long)va_arg(ap, int); + + /* Extract sign */ + if ((signed long)ulong < 0) + { + flags.plus_space_flag = PSF_MINUS; + ulong = (unsigned long)(-((signed long)ulong)); + } + + flags.div_factor = DIV_DEC; + + /* Now convert to digits */ +INTEGRAL_CONVERSION: + ptr = buf_pointer = &buf[FRMWRI_BUFSIZE - 1]; + flags.nonzero_value = (ulong != 0); + + /* No char if zero and zero precision */ + if (precision != 0 || flags.nonzero_value) + { + switch (flags.div_factor) + { + case DIV_DEC: + do + *--buf_pointer = hex[ulong % 10]; + while (ulong /= 10); + break; + + case DIV_HEX: + do + *--buf_pointer = hex[ulong % 16]; + while (ulong /= 16); + break; +#if CONFIG_PRINTF_OCTAL_FORMATTER + case DIV_OCT: + do + *--buf_pointer = hex[ulong % 8]; + while (ulong /= 8); + break; +#endif + } + } + + /* "precision" takes precedence */ + if (precision < 0) + if (flags.zeropad) + precision = field_width - (flags.plus_space_flag != PSF_NONE); + while (precision > (int)(ptr - buf_pointer)) + *--buf_pointer = '0'; + + if (flags.alternate_flag && flags.nonzero_value) + { + if (format_flag == 'x' || format_flag == 'X') + { + *--buf_pointer = format_flag; + *--buf_pointer = '0'; + } +#if CONFIG_PRINTF_OCTAL_FORMATTER + else if ((format_flag == 'o') && (*buf_pointer != '0')) + { + *--buf_pointer = '0'; + } +#endif + } + ASSERT(buf_pointer >= buf); + break; + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + case 'g': + case 'G': + n = 1; + format_flag -= 2; + if (! precision) + { + precision = 1; + } + goto FLOATING_CONVERSION; + case 'f': + format_flag = 0; + case 'e': + case 'E': + n = 0; +FLOATING_CONVERSION: + if (precision < 0) + { + precision = 6; + } + + if (sizeof(double) != sizeof(max_float_t)) + { + fvalue = flags.l_L_modifier ? + va_arg(ap,max_float_t) : va_arg(ap,double); + } + else + fvalue = va_arg(ap,max_float_t); + + if (fvalue < 0) + { + flags.plus_space_flag = PSF_MINUS; + fvalue = -fvalue; + } + ptr = float_conversion (fvalue, + (short)precision, + buf_pointer += field_width, + format_flag, + (char)n, + flags.alternate_flag); + if (flags.zeropad) + { + precision = field_width - (flags.plus_space_flag != PSF_NONE); + while (precision > ptr - buf_pointer) + *--buf_pointer = '0'; + } + break; + +#endif /* CONFIG_PRINTF <= PRINTF_NOFLOAT */ + + case '\0': /* Really bad place to find NUL in */ + format--; + + default: + /* Undefined conversion! */ + ptr = buf_pointer = bad_conversion; + ptr += sizeof(bad_conversion) - 1; + break; + + } + + /* + * This part emittes the formatted string to "put_one_char". + */ + + /* If field_width == 0 then nothing should be written. */ + precision = ptr - buf_pointer; + + if ( precision > field_width) + { + n = 0; + } + else + { + n = field_width - precision - (flags.plus_space_flag != PSF_NONE); + } + + /* emit any leading pad characters */ + if (!flags.left_adjust) + while (--n >= 0) + { + put_one_char(' ', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + + /* emit flag characters (if any) */ + if (flags.plus_space_flag) + { + put_one_char(flags.plus_space_flag == PSF_PLUS ? '+' : '-', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + +#if CPU_HARVARD + if (flags.progmem) + { + while (--precision >= 0) + { + put_one_char(pgm_read_char(buf_pointer++), secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + } + else +#endif /* CPU_HARVARD */ + { + /* emit the string itself */ + while (--precision >= 0) + { + put_one_char(*buf_pointer++, secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + } + + /* emit trailing space characters */ + if (flags.left_adjust) + while (--n >= 0) + { + put_one_char(' ', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + } + +#else /* PRINTF_REDUCED starts here */ + +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + bool l_modifier, h_modifier; + unsigned long u_val, div_val; +#else + unsigned int u_val, div_val; +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + + char format_flag; + unsigned int nr_of_chars, base; + char outChar; + char *ptr; + + nr_of_chars = 0; + for (;;) /* Until full format string read */ + { + while ((format_flag = PGM_READ_CHAR(format++)) != '%') /* Until '%' or '\0' */ + { + if (!format_flag) + return (nr_of_chars); + put_one_char(format_flag, secret_pointer); + nr_of_chars++; + } + +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + /* + * Optional 'l', 'z' or 'h' modifiers? + */ + l_modifier = h_modifier = false; + switch (PGM_READ_CHAR(format)) + { + case 'l': + #if SIZEOF_SIZE_T == SIZEOF_LONG + case 'z': + l_modifier = true; + #elif SIZEOF_SIZE_T == SIZEOF_INT + l_modifier = true; + case 'z': + #endif + format++; + break; + + case 'h': + h_modifier = true; + format++; + break; + } +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + + switch (format_flag = PGM_READ_CHAR(format++)) + { + case 'c': + format_flag = va_arg(ap, int); + default: + put_one_char(format_flag, secret_pointer); + nr_of_chars++; + continue; + + case 's': + ptr = va_arg(ap, char *); + while ((format_flag = *ptr++)) + { + put_one_char(format_flag, secret_pointer); + nr_of_chars++; + } + continue; + + case 'o': + base = 8; + if (IS_SHORT) + div_val = 0x8000; + else + div_val = 0x40000000; + goto CONVERSION_LOOP; + + case 'd': + base = 10; + if (IS_SHORT) + div_val = 10000; + else + div_val = 1000000000; + goto CONVERSION_LOOP; + + case 'X': + case 'x': + base = 16; + if (IS_SHORT) + div_val = 0x1000; + else + div_val = 0x10000000; + +CONVERSION_LOOP: +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + if (h_modifier) + { + if (format_flag == 'd') + u_val = (short)va_arg(ap, int); + else + u_val = (unsigned short)va_arg(ap, int); + } + else if (l_modifier) + u_val = va_arg(ap, long); + else + { + if (format_flag == 'd') + u_val = va_arg(ap, int); + else + u_val = va_arg(ap, unsigned int); + } + +#else /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + u_val = va_arg(ap,int); +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + if (format_flag == 'd') + { + if (((int)u_val) < 0) + { + u_val = - u_val; + put_one_char('-', secret_pointer); + nr_of_chars++; + } + } + while (div_val > 1 && div_val > u_val) + { + div_val /= base; + } + do + { + outChar = (u_val / div_val) + '0'; + if (outChar > '9') + { + if (format_flag == 'x') + outChar += 'a'-'9'-1; + else + outChar += 'A'-'9'-1; + } + put_one_char(outChar, secret_pointer); + nr_of_chars++; + u_val %= div_val; + div_val /= base; + } + while (div_val); + + } /* end switch(format_flag...) */ + } +#endif /* CONFIG_PRINTF > PRINTF_REDUCED */ +} + +#endif /* CONFIG_PRINTF */ diff --git a/2.5/bertos/mware/formatwr.h b/2.5/bertos/mware/formatwr.h new file mode 100644 index 00000000..8ede6f24 --- /dev/null +++ b/2.5/bertos/mware/formatwr.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \version $Id$ + * + * \brief Basic "printf", "sprintf" and "fprintf" formatter. + * + * $WIZ$ module_name = "formatwr" + * $WIZ$ module_configuration = "bertos/cfg/cfg_formatwr.h" + * $WIZ$ module_depends = "hex" + * $WIZ$ module_harvard = "both" + */ + +#ifndef MWARE_FORMATWR_H +#define MWARE_FORMATWR_H + +#include "cfg/cfg_formatwr.h" + +#include /* CPU_HARVARD */ + +#include /* va_list */ + +/** + * \name _formatted_write() configuration + * $WIZ$ printf_list = "PRINTF_DISABLED", "PRINTF_NOMODIFIERS", "PRINTF_REDUCED", "PRINTF_NOFLOAT", "PRINTF_FULL" + * \{ + */ +#define PRINTF_DISABLED 0 +#define PRINTF_NOMODIFIERS 1 +#define PRINTF_REDUCED 2 +#define PRINTF_NOFLOAT 3 +#define PRINTF_FULL 4 +/* \} */ + +#ifndef CONFIG_PRINTF_RETURN_COUNT + /** Enable/disable _formatted_write return value */ + #define CONFIG_PRINTF_RETURN_COUNT 1 +#endif + +int +_formatted_write( + const char *format, + void put_char_func(char c, void *user_data), + void *user_data, + va_list ap); + +#if CPU_HARVARD + #include + int _formatted_write_P( + const char * PROGMEM format, + void put_char_func(char c, void *user_data), + void *user_data, + va_list ap); +#endif /* CPU_HARVARD */ + +int sprintf_testSetup(void); +int sprintf_testRun(void); +int sprintf_testTearDown(void); + +#endif /* MWARE_FORMATWR_H */ + diff --git a/2.5/bertos/mware/hex.c b/2.5/bertos/mware/hex.c new file mode 100644 index 00000000..4b22f1ef --- /dev/null +++ b/2.5/bertos/mware/hex.c @@ -0,0 +1,42 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + */ + + +#include "hex.h" + +const char hex_tab[16] = { '0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f' }; +const char HEX_tab[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' }; diff --git a/2.5/bertos/mware/hex.h b/2.5/bertos/mware/hex.h new file mode 100644 index 00000000..5e036dfe --- /dev/null +++ b/2.5/bertos/mware/hex.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \version $Id$ + * + * \author Bernie Innocenti + */ + +#ifndef MWARE_HEX_H +#define MWARE_HEX_H + +extern const char hex_tab[16]; +extern const char HEX_tab[16]; + +#endif /* MWARE_HEX_H */ diff --git a/2.5/bertos/mware/ini_reader.c b/2.5/bertos/mware/ini_reader.c new file mode 100644 index 00000000..d48f9ead --- /dev/null +++ b/2.5/bertos/mware/ini_reader.c @@ -0,0 +1,162 @@ +/** + * \file + * + * + * \brief Ini file reader module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#include "ini_reader.h" +#include "cfg/cfg_ini_reader.h" +#include +#include +#include + +/* + * Returns when the line containing the section is found. + * The file pointer is positioned at the start of the next line. + * Returns EOF if no section was found, 0 otherwise. + */ +static int findSection(KFile *fd, const char *section, size_t section_len, char *line, size_t size) +{ + while (kfile_gets(fd, line, size) != EOF) + { + char *ptr = line; + unsigned i; + /* accept only sections that begin at first char */ + if (*ptr++ != '[') + continue; + + /* find the end-of-section character */ + for (i = 0; i < size && *ptr != ']'; ++i, ++ptr) + ; + + /* The found section could be long that our section key */ + if (section_len != i) + continue; + + /* did we find the correct section? */ + if(strncmp(&line[1], section, section_len)) + continue; + else + return 0; + } + return EOF; +} + +/* + * Fills the argument with the key found in line + */ +static char *getKey(const char *line, char *key, size_t size) +{ + /* null-terminated string */ + while (isspace(*line)) + ++line; + int i = 0; + while (*line != '=' && !isspace(*line) && size) + { + key[i++] = *line; + ++line; + --size; + } + size ? (key[i] = '\0') : (key[i-1] = '\0'); + return key; +} + +/* + * Fills the argument with the value found in line. + */ +static char *getValue(const char *line, char *value, size_t size) +{ + while (*line++ != '=') + ; + while (isspace(*line)) + ++line; + int i = 0; + while (*line && size) + { + value[i++] = *line++; + --size; + } + size ? (value[i] = '\0') : (value[i-1] = '\0'); + return value; +} + +/** + * Look for key inside a section. + * + * The function reads lines from input file. It fills the line parameter to allow splitting + * the key-value couple. It returns with error if a new section begins and no key was found. + * \return 0 if key was found, EOF on errors. + */ +static int findKey(KFile *fd, const char *key, char *line, size_t size) +{ + int err; + do + { + err = kfile_gets(fd, line, size); + char curr_key[30]; + getKey(line, curr_key, 30); + /* check key */ + if (!strcmp(curr_key, key)) + return 0; + } + while (err != EOF && *line != '['); + return EOF; +} + +/* + * On errors, the function returns EOF and fills the buffer with the default value. + */ +int ini_getString(KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size) +{ + char line[CONFIG_INI_MAX_LINE_LEN]; + + if (kfile_seek(fd, 0, KSM_SEEK_SET) == EOF) + goto error; + + if (findSection(fd, section, strlen(section), line, CONFIG_INI_MAX_LINE_LEN) == EOF) + goto error; + + if (findKey(fd, key, line, CONFIG_INI_MAX_LINE_LEN) == EOF) + goto error; + else + getValue(line, buf, size); + return 0; + +error: + strncpy(buf, default_value, size); + if (size > 0) + buf[size - 1] = '\0'; + return EOF; +} diff --git a/2.5/bertos/mware/ini_reader.h b/2.5/bertos/mware/ini_reader.h new file mode 100644 index 00000000..ef5d9489 --- /dev/null +++ b/2.5/bertos/mware/ini_reader.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief Ini file reader module. + * + * The format accepted is: + * - Sections must begin at beginning of line. [ Long name ] will be found only if " Long name " is specified as section name. + * - key can contain any spaces at the beginning and before '=' but not in the middle. Eg. "long key name" is not valid. + * - values will be stripped of spaces at the beginning and will run until end-of-line. Eg. "= long value" will be treated as "long value". + * - no nested sections are allowed. + * - no comments are allowed inside a line with key=value pair. + * - every line that doesn't contain a '=' or doesn't start with '[' will be ignored. + * + * \author Luca Ottaviano + * + * $WIZ$ module_name = "ini_reader" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ini_reader.h" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef INI_READER_H +#define INI_READER_H + +#include + +/** + * \brief Returns the value for the given string in char* format. + * Reads the whole input file looking for section and key and fills the provided buffer with + * the corresponding value. + * On errors, the function fills the provided buffer with the default value and returns EOF. + * \param fd An initialized KFile structure. + * \param section The section to be looked for. + * \param key The key to search for. + * \param default_value The default value. + * \param buf The buffer to be filled. + * \param size The size of the provided buffer. + * \return 0 if section and key were found, EOF on errors. + */ +int ini_getString(KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size); + +int ini_reader_testSetup(void); +int ini_reader_testRun(void); +int ini_reader_testTearDown(void); +#endif /* INI_READER_H */ diff --git a/2.5/bertos/mware/ini_reader_test.c b/2.5/bertos/mware/ini_reader_test.c new file mode 100644 index 00000000..8237d970 --- /dev/null +++ b/2.5/bertos/mware/ini_reader_test.c @@ -0,0 +1,101 @@ +/** + * \file + * + * + * \brief Test function for ini_reader module. + * + * $test$: cp bertos/cfg/cfg_kfile.h $cfgdir/ + * $test$: echo "#undef CONFIG_KFILE_GETS" >> $cfgdir/cfg_kfile.h + * $test$: echo "#define CONFIG_KFILE_GETS 1" >> $cfgdir/cfg_kfile.h + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#include +#include + +#include // strcmp + +#include "ini_reader.h" + +const char ini_file[] = "./test/ini_reader_file.ini"; +static KFilePosix kf; + +int ini_reader_testSetup(void) +{ + kdbg_init(); + if (!kfile_posix_init(&kf, ini_file, "r")) + { + kprintf("No test file found\n"); + return -1; + } + return 0; +} + +int ini_reader_testRun(void) +{ + char buf[30]; + memset(buf, 0, 30); + + ASSERT(ini_getString(&kf.fd, "First", "String", "default", buf, 30) != EOF); + ASSERT(strcmp(buf, "noot") == 0); + + ASSERT(ini_getString(&kf.fd, "Second", "Val", "default", buf, 30) != EOF); + ASSERT(strcmp(buf, "2") == 0); + + ASSERT(ini_getString(&kf.fd, "First", "Empty", "default", buf, 30) != EOF); + ASSERT(strcmp(buf, "") == 0); + + ASSERT(ini_getString(&kf.fd, "Second", "Bar", "default", buf, 30) == EOF); + ASSERT(strcmp(buf, "default") == 0); + + ASSERT(ini_getString(&kf.fd, "Foo", "Bar", "default", buf, 30) == EOF); + ASSERT(strcmp(buf, "default") == 0); + + ASSERT(ini_getString(&kf.fd, "Second", "Long key", "", buf, 30) == EOF); + + ASSERT(ini_getString(&kf.fd, "Second", "comment", "", buf, 30) != EOF); + ASSERT(strcmp(buf, "line with #comment") == 0); + + ASSERT(ini_getString(&kf.fd, "Long section with spaces", "value", "", buf, 30) != EOF); + ASSERT(strcmp(buf, "long value") == 0); + + ASSERT(ini_getString(&kf.fd, "Long section with spaces", "no_new_line", "", buf, 30) != EOF); + ASSERT(strcmp(buf, "value") == 0); + return 0; +} + +int ini_reader_testTearDown(void) +{ + return kfile_close(&kf.fd); +} + +TEST_MAIN(ini_reader); diff --git a/2.5/bertos/mware/messages.c b/2.5/bertos/mware/messages.c new file mode 100644 index 00000000..52c720c4 --- /dev/null +++ b/2.5/bertos/mware/messages.c @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Messages for LCD. + * + * \version $Id$ + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "messages.h" + +/** + * Array of pointers to localized strings. Should be filled + * by localization stuff, but not for now. + */ +const char *msg_strings[MSG_COUNT] = { + 0, + // TODO: add your strings here +}; + +/* Buffer for catalog file */ +/* char msg_buf[MSG_BUFSIZE]; */ + + +/* The following does not work (move string tables into the DMSG/CMSG segments) + * #pragma memory=dataseg(DMSG) + * #pragma memory=constseg(CMSG) + */ + + +/** + * Untranslated constant strings used more than once are + * grouped here to save ROM space. + */ +const char str_empty[] = ""; + diff --git a/2.5/bertos/mware/messages.h b/2.5/bertos/mware/messages.h new file mode 100644 index 00000000..0eaff8fd --- /dev/null +++ b/2.5/bertos/mware/messages.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Definitions of constant string messages. + * + * \version $Id$ + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#ifndef MWARE_MESSAGES_H +#define MWARE_MESSAGES_H + +enum +{ + MSG_NULL, + + // TODO: add your labels here. + + MSG_COUNT +}; + +#warning FIXME:Revise me! + +#define MSG_BUFSIZE 6144 /* FIXME: how much? */ + +/* String tables */ +/* extern const char *msg_strings const [MSG_COUNT]; */ +/* extern char msg_buf[MSG_BUFSIZE]; */ + + +/* Macros to access translated messages */ +#define MSG(x) msg_strings[x] +#define PTRMSG(x) ((x) < (const_iptr_t)256 ? msg_strings[(unsigned int)(x)] : (const char *)(x)) + + +#endif /* MWARE_MESSAGES_H */ + diff --git a/2.5/bertos/mware/observer.c b/2.5/bertos/mware/observer.c new file mode 100644 index 00000000..2a9358a5 --- /dev/null +++ b/2.5/bertos/mware/observer.c @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \brief Simple notifier for the observer/subject pattern (implementation) + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "observer.h" +#include // IRQ_DISABLE/IRQ_ENABLE + + +void observer_SetEvent(Observer *observer, void (*event)(int event_id, void *param)) +{ + observer->event = event; +} + +void observer_InitSubject(Subject *subject) +{ + LIST_INIT(&subject->observers); +} + +void observer_Subscribe(Subject *subject, Observer *observer) +{ + ATOMIC(ADDHEAD(&subject->observers, &observer->link)); +} + +void observer_Unsubscribe(UNUSED_ARG(Subject *,subject), Observer *observer) +{ + ATOMIC(REMOVE(&observer->link)); +} + +void observer_notify(Subject *subject, int event_id, void *param) +{ + Observer *observer; + cpu_flags_t irqstate; + IRQ_SAVE_DISABLE(irqstate); + + /* + * Run over list with protection against other + * threads, but re-enable irqs in callbacks. + */ + FOREACH_NODE(observer, &subject->observers) + { + IRQ_RESTORE(irqstate); + observer->event(event_id, param); + IRQ_SAVE_DISABLE(irqstate); + } + + IRQ_RESTORE(irqstate); +} diff --git a/2.5/bertos/mware/observer.h b/2.5/bertos/mware/observer.h new file mode 100644 index 00000000..e970c7d6 --- /dev/null +++ b/2.5/bertos/mware/observer.h @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \brief Simple notifier for the subject/observer pattern (interface) + * + * \version $Id$ + * \author Bernie Innocenti + */ +#ifndef MWARE_OBSERVER_H +#define MWARE_OBSERVER_H + +#include + +/** + * + * Here's a simple example: + * + * \code + * Subject kbd_driver; + * + * Observer kbd_observer; + * + * void key_pressed(int event, void *_param) + * { + * char *param = (char *)_param; + * + * if (event == EVENT_KBD_PRESSED) + * printf("You pressed %c\n", *param); + * } + * + * void register_kbd_listener(void) + * { + * observer_SetEvent(&kbd_observer, key_pressed); + * observer_Subscribe(&kbd_driver, &kbd_observer); + * } + * \endcode + */ +typedef struct Observer +{ + Node link; + void (*event)(int event_id, void *param); +} Observer; + +typedef struct Subject +{ + /// Subscribed observers. + List observers; + +} Subject; + +void observer_SetEvent(Observer *observer, void (*event)(int event_id, void *param)); + +#define OBSERVER_INITIALIZER(callback) { { NULL, NULL }, callback } + +void observer_InitSubject(Subject *subject); + +/// Aggiunge un Observer all'insieme +void observer_Subscribe(Subject *subject, Observer *observer); + +/// Rimuove un Observer dall'insieme +void observer_Unsubscribe(Subject *subject, Observer *observer); + +/// per tutti gli elementi nel set notifica l'evento, chiamando la relativa +/// funzione event +void observer_notify(Subject *subject, int event_id, void *param); + +#endif /* MWARE_OBSERVER_H */ diff --git a/2.5/bertos/mware/parser.c b/2.5/bertos/mware/parser.c new file mode 100644 index 00000000..b06013c8 --- /dev/null +++ b/2.5/bertos/mware/parser.c @@ -0,0 +1,396 @@ +/** + * \file + * + * + * \brief Channel protocol parser and commands. + * + * This file contains the channel protocol parser and + * the definition of the protocol commands. Commands are defined + * in a "CmdTemplate" type array, containing: + * - the name of the command, + * - the arguments it expects to receive, + * - the output values, + * - the name of the function implementing the command. + * + * The arguments and results are passed to command function + * using an union: the element of the union to use for each + * argument is determined by format strings present in the + * CmdTemplate table. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Giovanni Bajo + * + * + */ + + +#include "parser.h" + +#include "cfg/cfg_parser.h" + +#include +#include + +#include // atol(), NULL +#include // strchr(), strcmp() + +//TODO: +#define CONFIG_INTERNAL_COMMANDS 0 + +#define ARG_SEP_S " " +#define ARG_SEP_C ' ' + +#define MAX_COMMANDS_NUMBER 128 // 64 + +/// Hashtable hook to extract the key from a command +static const void* get_key_from_command(const void* cmd, uint8_t* length); + +/// Hashtable that handles the commands that can be executed +DECLARE_HASHTABLE_STATIC(commands, MAX_COMMANDS_NUMBER, get_key_from_command); + + +/** + * \brief Tokenize one word at a time from a text. + * + * This function is similar to strtok, but does not use any implicit + * context, nor it does modify the input buffer in any form. + * The word is returned as a STL-like [begin,end) range. + * + * To extract the first word, make both begin and end point at the + * start of the text, and call the function. Then, subsequent + * calls will return the following words (assuming the begin/end + * variable are not modified between calls). + * + * \param begin Will contain the index of the first character of the word + * \param end Will contain the index of the character after the last + * character of the word + * + * \return True if a word was extracted, false if we got to the end + * of the string without extracting any word. + */ +static bool get_word(const char **begin, const char **end) +{ + const char *cur = *end; + + while ((*cur == ' ' || *cur == '\t') && *cur) + ++cur; + + *begin = cur; + + while ((*cur != ' ' && *cur != '\t') && *cur) + ++cur; + + *end = cur; + + return (*end != *begin); +} + + +/** + * \brief Command arguments parser. + * + * Using the format pointed by the argument fmt + * parses the input string filling the array argv + * with input parameters of the correct type. + * + * \param fmt Parameters format string. + * \param input Input string. + * \param argv Array filled with parameters. + * + * \return False in case of errors, otherwise true. + */ +static bool parseArgs(const char *fmt, const char *input, parms argv[]) +{ + const char *begin = input, *end = input; + + while (*fmt) + { + // Extract the argument + if (!get_word(&begin, &end)) + return false; + + switch (*fmt) + { + case 'd': + (*argv++).l = atol(begin); + break; + + case 's': + (*argv++).s = begin; + break; + + default: + ASSERT2(0, "Unknown format for argument"); + return false; + } + + ++fmt; + } + + /* check if there are remaining args */ + if (get_word(&begin, &end)) + return false; + + return true; +} + + +#ifdef UNUSED_CODE +/** + * \brief Command result formatting and printing. + * + * Prints out on device fd the values contained + * in the array result, using the format specified + * in fmt. + * + * \param ch Channel handle. + * \param fmt Values format string. + * \param result Array containing result to be printed. + * + * \return -1 in case of errors, otherwise 0. + */ +static int printResult(KFile *ch, const char *fmt, parms result[]) +{ + long n; + char repeat_cnt = 0; + + while (*fmt) + { + if (*fmt >= '0' && *fmt <= '9') + { + /* Collect repeat count digit (left to right order) */ + repeat_cnt = (repeat_cnt * 10) + (*fmt - '0'); + } + else + { + /* Set default repeat cnt of 1 when not specified */ + if (repeat_cnt == 0) + repeat_cnt = 1; + + /* Loop repeat_cnt times */ + do + { + switch (*fmt) + { + case 'd': + kfile_printf(ch, ARG_SEP_S "%ld", (*result).l); + result++; + break; + case 'c': + kfile_print(ch, ARG_SEP_S); + kfile_print(ch, (*result).s); + result++; + break; + case 's': + kfile_printf(ch, ARG_SEP_S "%s", (*result).s); + result++; + break; + case 'n': + n = (*result++).l; + kfile_printf(ch, ARG_SEP_S "%ld", n); + while (n--) { + kfile_printf(ch, ARG_SEP_S "%ld", (*result).l); + result++; + } + break; + default: + break; + } + } + while (--repeat_cnt); + } + + /* Skip to next format char */ + ++fmt; + + } /* while (*fmt) */ + + + kfile_print(ch, "\r\n"); + return 0; +} +#endif /* UNUSED_CODE */ + +/// Hook provided by the parser for matching of command names (TAB completion) for readline +const char* parser_rl_match(UNUSED_ARG(void *,dummy), const char *word, int word_len) +{ + HashIterator cur; + HashIterator end = ht_iter_end(&commands); + const char *found = NULL; + + for (cur = ht_iter_begin(&commands); + !ht_iter_cmp(cur, end); + cur = ht_iter_next(cur)) + { + const struct CmdTemplate* cmdp = (const struct CmdTemplate*)ht_iter_get(cur); + if (strncmp(cmdp->name, word, word_len) == 0) + { + // If there was another matching word, it means that we have a multiple + // match: then return NULL. + if (found) + return NULL; + + found = cmdp->name; + } + } + + return found; +} + +bool parser_get_cmd_id(const char* line, unsigned long* ID) +{ + const char *begin = line, *end = line; + char *end2; + + // The first word is the ID + if (!get_word(&begin, &end)) + return false; + + *ID = strtoul(begin, &end2, 10); + if (end2 != end) + return false; + + return true; +} + +const struct CmdTemplate* parser_get_cmd_template(const char *input) +{ +// const struct CmdTemplate *cmdp; +// int cmdlen; + const char *begin = input, *end = input; + + // Skip the ID, and get the command + if (!get_word(&begin, &end)) + return NULL; + if (!get_word(&begin, &end)) + return NULL; + + return (const struct CmdTemplate*)ht_find(&commands, begin, end-begin); +} + +static const char *skip_to_params(const char *input, const struct CmdTemplate *cmdp) +{ + const char *begin = input, *end = input; + + // Skip the ID, and get the command + if (!get_word(&begin, &end)) + return NULL; + if (!get_word(&begin, &end)) + return NULL; + + ASSERT2(strlen(cmdp->name) == (size_t)(end-begin), "Invalid command template specified"); + ASSERT2(!strncmp(begin, cmdp->name, end-begin), "Invalid command template specified"); + + return end; +} + +bool parser_get_cmd_arguments(const char* input, const struct CmdTemplate* cmdp, parms args[PARSER_MAX_ARGS]) +{ + input = skip_to_params(input, cmdp); + if (!input) + return false; + + args[0].s = cmdp->name; + if (!parseArgs(cmdp->arg_fmt, input, args + 1)) + return false; + + return true; +} + +static const void* get_key_from_command(const void* cmd, uint8_t* length) +{ + const struct CmdTemplate* c = cmd; + *length = strlen(c->name); + return c->name; +} + +bool parser_process_line(const char* input) +{ + const struct CmdTemplate *cmdp; + parms args[PARSER_MAX_ARGS]; + + cmdp = parser_get_cmd_template(input); + if (!cmdp) + return false; + + if (!parser_get_cmd_arguments(input, cmdp, args)) + return false; + + if (!parser_execute_cmd(cmdp, args)) + return false; + + return true; +} + +void parser_register_cmd(const struct CmdTemplate* cmd) +{ + ht_insert(&commands, cmd); +} + +#if CONFIG_INTERNAL_COMMANDS +#warning FIXME:This code use boost lib, if you compile with internal command you must fix it. +static ResultCode cmd_help(void) +{ +#ifdef _DEBUG + + // FIXME: There is no way at the moment to access the serial port. Dump + // this through JTAG for now + for (HashIterator iter = ht_iter_begin(&commands); + !ht_iter_cmp(iter, ht_iter_end(&commands)); + iter = ht_iter_next(iter)) + { + struct CmdTemplate* cmd = (struct CmdTemplate*)ht_iter_get(iter); + kprintf("%-20s", cmd->name); + for (unsigned j = 0; cmd->arg_fmt[j]; ++j) + kprintf("%c ", 'a' + j); + kprintf("\r\n"); + } +#endif + + return RC_OK; +} + +#include "cmd_hunk.h" +DECLARE_CMD_HUNK(help, (NIL), (NIL)); + +#endif // CONFIG_INTERNAL_COMMANDS + + +void parser_init(void) +{ + // Initialize the hashtable used to store the command description + ht_init(&commands); + +#if CONFIG_INTERNAL_COMMANDS + parser_register_cmd(&CMD_HUNK_TEMPLATE(help)); +#endif +} diff --git a/2.5/bertos/mware/parser.h b/2.5/bertos/mware/parser.h new file mode 100644 index 00000000..16fa4534 --- /dev/null +++ b/2.5/bertos/mware/parser.h @@ -0,0 +1,187 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Giovanni Bajo + * + * \brief Channel protocol parser and commands. + * + * $WIZ$ module_name = "parser" + * $WIZ$ module_configuration = "bertos/cfg/cfg_parser.h" + * $WIZ$ module_depends = "kfile", "hashtable" + */ + + +#ifndef MWARE_PARSER_H +#define MWARE_PARSER_H + +#include + +/** Max number of arguments and results for each command */ +#define PARSER_MAX_ARGS 8 + +/** + * Error generated by the commands through the return code. + */ +typedef enum +{ + RC_ERROR = -1, ///< Reply with error. + RC_OK = 0, ///< No reply (ignore reply arguments). + RC_REPLY = 1, ///< Reply command arguments. + RC_SKIP = 2 ///< Skip following commands +} ResultCode; + +/** union that contains parameters passed to and from commands */ +typedef union { long l; const char *s; } parms; +/** pointer to commands */ +typedef ResultCode (*CmdFuncPtr)(parms args_results[]); + +/** + * Define a command that can be tokenized by the parser. + * + * The format strings are sequences of characters, one for each + * parameter/result. Valid characters are: + * + * d - a long integer, in decimal format + * s - a var string (in RAM) + * + * \note To create and fill an instance for this function, it is strongly + * advised to use \c DECLARE_CMD_HUNK (cmd_hunk.h). + */ +struct CmdTemplate +{ + const char *name; ///< Name of command + const char *arg_fmt; ///< Format string for the input + const char *result_fmt; ///< Format string for the output + CmdFuncPtr func; ///< Pointer to the handler function + uint16_t flags; ///< Currently unused. +}; + +/** + * Initialize the parser module + * + * \note This function must be called before any other function in this module + */ +void parser_init(void); + + +/** + * Register a new command into the parser + * + * \param cmd Command template describing the command + * + */ +void parser_register_cmd(const struct CmdTemplate* cmd); + + +/** + * Hook for readline to provide completion support for the commands + * registered in the parser. + * + * \note This is meant to be used with mware/readline.c. See the + * documentation there for a description of this hook. + */ +const char* parser_rl_match(void* dummy, const char* word, int word_len); + + +/** + * \brief Command input handler. + * + * Process the input, calling the requested command + * (if found) and calling printResult() to give out + * the result (on device specified with parameter fd). + * + * \param line Text line to be processed (ASCIIZ) + * + * \return true if everything is OK, false in case of errors + */ +bool parser_process_line(const char* line); + + +/** + * Execute a command with its arguments, and fetch its results. + * + * \param templ Template of the command to be executed + * \param args Arguments for the command, and will contain the results + * + * \return False if the command returned an error, true otherwise + */ +INLINE bool parser_execute_cmd(const struct CmdTemplate* templ, parms args[PARSER_MAX_ARGS]) +{ + return (templ->func(args) == 0); +} + + +/** + * Find the template for the command contained in the text line. + * The template can be used to tokenize the command and interpret + * it. + * + * This function can be used to find out which command is contained + * in a given text line without parsing all the parameters and + * executing it. + * + * \param line Text line to be processed (ASCIIZ) + * + * \return The command template associated with the command contained + * in the line, or NULL if the command is invalid. + */ +const struct CmdTemplate* parser_get_cmd_template(const char* line); + + +/** + * Extract the arguments for the command contained in the text line. + * + * \param line Text line to be processed (ASCIIZ) + * \param templ Command template for this line + * \param args Will contain the extracted parameters + * + * \return True if everything OK, false in case of parsing error. + */ +bool parser_get_cmd_arguments(const char* line, const struct CmdTemplate* templ, parms args[PARSER_MAX_ARGS]); + + +/** + * Extract the ID from the command text line. + * + * \param line Text line to be processed (ASCIIZ) + * \param ID Will contain the ID extracted. + * + * \return True if everything ok, false if there is no ID + * + */ +bool parser_get_cmd_id(const char* line, unsigned long* ID); + + +#endif /* MWARE_PARSER_H */ + diff --git a/2.5/bertos/mware/pgm.h b/2.5/bertos/mware/pgm.h new file mode 100644 index 00000000..8f6ce491 --- /dev/null +++ b/2.5/bertos/mware/pgm.h @@ -0,0 +1,2 @@ +#warning This header is OBSOLETE +#include diff --git a/2.5/bertos/mware/readline.c b/2.5/bertos/mware/readline.c new file mode 100644 index 00000000..dcad52b4 --- /dev/null +++ b/2.5/bertos/mware/readline.c @@ -0,0 +1,497 @@ +/** + * \file + * + * + * \brief Line editing support with history + * + * Rationale for basic implementation choices: + * + * \li The history is implemented storing consecutive ASCIIZ strings within an array of memory. When + * the history is full, the first (oldest) line is cancelled and the whole buffer is memmoved to + * overwrite it and make room. while this is is obviously not the fastest algorithm (which would + * require the use of a circular buffer) it is surely good enough for this module, which does not + * aim at fast performances (line editing does not require to be blazingly fast). + * + * \li The first character in the history is always \c \\0, and it is used as a guard. By 'wasting' it + * in this way, the code actually gets much simpler in that we remove many checks when moving + * backward (\c i>0 and similar). + * + * \li While editing, the current index points to the position of the buffer which contains the + * last character typed in (exactly like a stack pointer). This also allows to simplify calculations + * and to make easier using the last byte of history. + * + * \li While editing, the current line is always kept null-terminated. This is important because + * if the user press ENTER, we must have room to add a \c \\0 to terminate the line. If the line + * is as long as the whole history buffer, there would not be space for it. By always keeping the + * \c \\0 at the end, we properly ensure this without making index checks harder. + * + * \li When removing a line from the history (see \c pop_history()), instead of updating all the + * indices we have around, we move backward the pointer to the history we use. This way, we don't + * have to update anything. This means that we keep two pointers to the history: \c real_history + * always points to the physical start, while \c history is the adjusted pointer (that is + * dereference to read/write to it). + * + * \todo Use up/down to move through history The history line will be copied to the current line, + * making sure there is room for it. + * + * \author Giovanni Bajo + */ + + +#include "readline.h" + +#include +#include + +#include + +/// Enable compilation of the unit test code +#define DEBUG_UNIT_TEST 0 + +/// Enable dump of the history after each line +#define DEBUG_DUMP_HISTORY 0 + + +/** Special keys (escape sequences converted to a single code) */ +enum RL_KEYS { + SPECIAL_KEYS = 0x1000, + + /* + * Three byte keys: + * ################# + * UpArrow: 0x1B 0x5B 0X41 + * DownArrow: 0x1B 0x5B 0X42 + * RightArrow: 0x1B 0x5B 0x43 + * LeftArrow: 0x1b 0x5B 0x44 + * Beak(Pause): 0x1b 0x5B 0x50 + */ + KEY_UP_ARROW, + KEY_DOWN_ARROW, + KEY_LEFT_ARROW, + KEY_RIGHT_ARROW, + KEY_PAUSE, + + /* + * Four byte keys: + * ################ + * F1: 0x1b 0x5B 0x5B 0x41 + * F2: 0x1b 0x5B 0x5B 0x42 + * F3: 0x1b 0x5B 0x5B 0x43 + * F4: 0x1b 0x5B 0x5B 0x44 + * F5: 0x1b 0x5B 0x5B 0x45 + * Ins: 0x1b 0x5B 0x32 0x7E + * Home: 0x1b 0x5B 0x31 0x7E + * PgUp: 0x1b 0x5B 0x35 0x7E + * Del: 0x1b 0x5B 0x33 0x7E + * End: 0x1b 0x5B 0x34 0x7E + * PgDn: 0x1b 0x5B 0x36 0x7E + */ + KEY_F1, KEY_F2, KEY_F3, KEY_F4, KEY_F5, + KEY_INS, KEY_HOME, KEY_PGUP, KEY_DEL, KEY_END, KEY_PGDN, + + /* + * Five byte keys: + * ################ + * F6: 0x1b 0x5B 0x31 0x37 0x7E + * F7: 0x1b 0x5B 0x31 0x38 0x7E + * F8: 0x1b 0x5B 0x31 0x39 0x7E + * F9: 0x1b 0x5B 0x32 0x30 0x7E + * F10: 0x1b 0x5B 0x32 0x31 0x7E + * F11: 0x1b 0x5B 0x32 0x33 0x7E + * F12: 0x1b 0x5B 0x32 0x34 0x7E + */ + KEY_F6, KEY_F7, KEY_F8, KEY_F9, + KEY_F10, KEY_F11, KEY_F12, +}; + +/** Check if \a c is a separator between words. + * \note Parameter \a c is evaluated multiple times + */ +#define IS_WORD_SEPARATOR(c) ((c) == ' ' || (c) == '\0') + +/// Write the string \a txt to the IO output (without any kind of termination) +INLINE void rl_puts(const struct RLContext* ctx, const char* txt) +{ + if (!ctx->put) + return; + + while (*txt) + ctx->put(*txt++, ctx->put_param); +} + +/// Write character \a ch to the IO output. +INLINE void rl_putc(const struct RLContext* ctx, char ch) +{ + if (ctx->put) + ctx->put(ch, ctx->put_param); +} + +/** Read a character from the IO into \a ch. This function also takes + * care of converting the ANSI escape sequences into one of the codes + * defined in \c RL_KEYS. + */ +static bool rl_getc(const struct RLContext* ctx, int* ch) +{ + int c = ctx->get(ctx->get_param); + + if (c == EOF) + { + if (ctx->clear) + ctx->clear(ctx->clear_param); + + return false; + } + + if (c == 0x1B) + { + // Unknown ESC sequence. Ignore it and read + // return next character. + if (ctx->get(ctx->get_param) != 0x5B) + return rl_getc(ctx, ch); + + /* To be added: + * Home: 0x1b 0x5B 0x31 0x7E + * F6: 0x1b 0x5B 0x31 0x37 0x7E + * F7: 0x1b 0x5B 0x31 0x38 0x7E + * F8: 0x1b 0x5B 0x31 0x39 0x7E + * Ins: 0x1b 0x5B 0x32 0x7E + * F9: 0x1b 0x5B 0x32 0x30 0x7E + * F10: 0x1b 0x5B 0x32 0x31 0x7E + * F11: 0x1b 0x5B 0x32 0x33 0x7E + * F12: 0x1b 0x5B 0x32 0x34 0x7E + * Del: 0x1b 0x5B 0x33 0x7E + * End: 0x1b 0x5B 0x34 0x7E + * PgUp: 0x1b 0x5B 0x35 0x7E + * PgDn: 0x1b 0x5B 0x36 0x7E + */ + + c = ctx->get(ctx->get_param); + switch (c) + { + case 0x41: c = KEY_UP_ARROW; break; + case 0x42: c = KEY_DOWN_ARROW; break; + case 0x43: c = KEY_RIGHT_ARROW; break; + case 0x44: c = KEY_LEFT_ARROW; break; + case 0x50: c = KEY_PAUSE; break; + case 0x5B: + c = ctx->get(ctx->get_param); + switch (c) + { + case 0x41: c = KEY_F1; break; + case 0x42: c = KEY_F2; break; + case 0x43: c = KEY_F3; break; + case 0x44: c = KEY_F4; break; + case 0x45: c = KEY_F5; break; + default: return rl_getc(ctx, ch); + } + break; + default: return rl_getc(ctx, ch); + } + } + + *ch = c; + return true; +} + +INLINE void beep(struct RLContext* ctx) +{ + rl_putc(ctx, '\a'); +} + +static bool pop_history(struct RLContext* ctx, int total_len) +{ + // Compute the length of the first command (including terminator). + int len = strlen(ctx->real_history+1)+1; + + // (the first byte of the history should always be 0) + ASSERT(ctx->real_history[0] == '\0'); + + // If it is the only one in the history, do nothing + if (len == total_len) + return false; + + // Overwrite the first command with the second one + memmove(ctx->real_history, ctx->real_history+len, HISTORY_SIZE-len); + + // Move back the ctx->buffer pointer so that all the indices are still valid + ctx->history -= len; + + return true; +} + +/// Check if index \a i points to the begin of the history. +INLINE bool is_history_begin(struct RLContext* ctx, int i) +{ return ctx->history + i == ctx->real_history; } + +/// Check if index \a i points to the (exclusive) end of history +INLINE bool is_history_end(struct RLContext* ctx, int i) +{ return ctx->history + i == ctx->real_history + HISTORY_SIZE; } + +/// Check if index \a i points to the (exclusive) end of history, or somewhere past the end. +INLINE bool is_history_past_end(struct RLContext* ctx, int i) +{ return ctx->history + i >= ctx->real_history + HISTORY_SIZE; } + +/** Insert \a num_chars characters from \a ch into the history buffer at the + * position indicated by \a curpos. If needed, remove old history to make room. + * Returns true if everything was successful, false if there was no room to + * add the characters. + * \note \a num_chars can be 0, in which case we just make sure the line is + * correctly zero-terminated (ASCIIZ format). + */ +static bool insert_chars(struct RLContext* ctx, size_t *curpos, const char* ch, int num_chars) +{ + ASSERT(!is_history_past_end(ctx, *curpos)); + + while (is_history_past_end(ctx, *curpos+num_chars+1)) + { + if (!pop_history(ctx, *curpos)) + return false; + } + + while (num_chars--) + ctx->history[++(*curpos)] = *ch++; + + ASSERT(!is_history_past_end(ctx, *curpos + 1)); + ctx->history[*curpos+1] = '\0'; + return true; +} + +/// Insert a single character \a ch into the buffer (with the same semantic of \c insert_chars()) +static bool insert_char(struct RLContext* ctx, size_t *curpos, char ch) +{ + return insert_chars(ctx, curpos, &ch, 1); +} + +#if DEBUG_DUMP_HISTORY +/// Dump the internal history of a context (used only for debug purposes) +static void dump_history(struct RLContext* ctx) +{ + int k; + char buf[8]; + ASSERT(ctx->real_history[0] == '\0'); + rl_puts(ctx, "History dump:"); + rl_puts(ctx, "\r\n"); + for (k = 1; + ctx->real_history + k != ctx->history + ctx->history_pos + 1; + k += strlen(&ctx->real_history[k]) + 1) + { + rl_puts(ctx, &ctx->real_history[k]); + rl_puts(ctx, "\r\n"); + } + + sprintf(buf, "%d\r\n", ctx->history_pos + (ctx->history - ctx->real_history)); + rl_puts(ctx, buf); +} +#endif /* DEBUG_DUMP_HISTORY */ + +/// Complete the current word. Return false if no unambiguous completion was found +static bool complete_word(struct RLContext *ctx, size_t *curpos) +{ + const char* completed_word; + size_t wstart; + + // If the current character is a separator, + // there is nothing to complete + wstart = *curpos; + if (IS_WORD_SEPARATOR(ctx->history[wstart])) + { + beep(ctx); + return false; + } + + // Find the separator before the current word + do + --wstart; + while (!IS_WORD_SEPARATOR(ctx->history[wstart])); + + // Complete the word through the hook + completed_word = ctx->match(ctx->match_param, ctx->history + wstart + 1, *curpos - wstart); + if (!completed_word) + return false; + + // Move back the terminal cursor to the separator + while (*curpos != wstart) + { + rl_putc(ctx, '\b'); + --*curpos; + } + + // Insert the completed command + insert_chars(ctx, curpos, completed_word, strlen(completed_word)); + rl_puts(ctx, completed_word); + insert_char(ctx, curpos, ' '); + rl_putc(ctx, ' '); + + return true; +} + +void rl_refresh(struct RLContext* ctx) +{ + rl_puts(ctx, "\r\n"); + if (ctx->prompt) + rl_puts(ctx, ctx->prompt); + rl_puts(ctx, ctx->history + ctx->history_pos + 1); +} + +const char* rl_readline(struct RLContext* ctx) +{ + while (1) + { + char ch; + int c; + + ASSERT(ctx->history - ctx->real_history + ctx->line_pos < HISTORY_SIZE); + + if (!rl_getc(ctx, &c)) + return NULL; + + // Just ignore special keys for now + if (c > SPECIAL_KEYS) + continue; + + if (c == '\t') + { + // Ask the match hook if available + if (!ctx->match) + return NULL; + + complete_word(ctx, &ctx->line_pos); + continue; + } + + // Backspace cancels a character, or it is ignored if at + // the start of the line + if (c == '\b') + { + if (ctx->history[ctx->line_pos] != '\0') + { + --ctx->line_pos; + rl_puts(ctx, "\b \b"); + } + continue; + } + + if (c == '\r' || c == '\n') + { + rl_puts(ctx, "\r\n"); + break; + } + + + // Add a character to the buffer, if possible + ch = (char)c; + ASSERT2(ch == c, "a special key was not properly handled"); + if (insert_chars(ctx, &ctx->line_pos, &ch, 1)) + rl_putc(ctx, ch); + else + beep(ctx); + } + + ctx->history_pos = ctx->line_pos + 1; + while (ctx->history[ctx->line_pos] != '\0') + --ctx->line_pos; + + // Do not store empty lines in the history + if (ctx->line_pos == ctx->history_pos - 1) + ctx->history_pos -= 1; + +#if DEBUG_DUMP_HISTORY + dump_history(ctx); +#endif + + const char *buf = &ctx->history[ctx->line_pos + 1]; + + ctx->line_pos = ctx->history_pos; + + if (ctx->prompt) + rl_puts(ctx, ctx->prompt); + + insert_chars(ctx, &ctx->line_pos, NULL, 0); + + // Since the current pointer now points to the separator, we need + // to return the first character + return buf; +} + + +#if DEBUG_UNIT_TEST + +/** Perform the unit test for the readline library */ +void rl_test(void); + +#if HISTORY_SIZE != 32 + #error This test needs HISTORY_SIZE to be set at 32 +#endif + +static struct RLContext test_ctx; + +static char* test_getc_ptr; +static int test_getc(void* data) +{ + return *test_getc_ptr++; +} + +/** Perform a readline test. The function pipes the characters from \a input_buffer + * through the I/O to \c rl_readline(). After the whole string is sent, \c do_test() + * checks if the current history within the context match \a expected_history. + */ +static bool do_test(char* input_buffer, char* expected_history) +{ + rl_init_ctx(&test_ctx); + rl_sethook_get(&test_ctx, test_getc, NULL); + + test_getc_ptr = input_buffer; + while (*test_getc_ptr) + rl_readline(&test_ctx); + + if (memcmp(test_ctx.real_history, expected_history, HISTORY_SIZE) != 0) + { + ASSERT2(0, "history compare failed"); + return false; + } + + return true; +} + +void rl_test(void) +{ + char* test1_in = "a\nb\nc\nd\ne\nf\ng\nh\ni\nj\nk\nl\nm\nn\no\np\nq\nr\ns\nt\nu\nv\nw\nx\ny\nz\n"; + char test1_hist[HISTORY_SIZE] = "\0l\0m\0n\0o\0p\0q\0r\0s\0t\0u\0v\0w\0x\0y\0z"; + + if (!do_test(test1_in, test1_hist)) + return; + + kprintf("rl_test successful\n"); +} + +#endif /* DEBUG_UNIT_TEST */ + diff --git a/2.5/bertos/mware/readline.h b/2.5/bertos/mware/readline.h new file mode 100644 index 00000000..5f420f96 --- /dev/null +++ b/2.5/bertos/mware/readline.h @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief Line editing support with history + * + * This file implements a kernel for line editing through a terminal, with history of the typed lines. + * Basic feature of this module: + * + * \li Abstracted from I/O. The user must provide hooks for getc and putc functions. + * \li Basic support for ANSI escape sequences for input of special codes. + * \li Support for command name completion (through a hook). + * + * \version $Id$ + * + * \author Giovanni Bajo + * + * $WIZ$ module_name = "readline" + * $WIZ$ module_depends = "sprintf" + */ + + +#ifndef MWARE_READLINE_H +#define MWARE_READLINE_H + +#include + +#include + +#define HISTORY_SIZE 32 + +typedef int (*getc_hook)(void* user_data); +typedef void (*putc_hook)(char ch, void* user_data); +typedef const char* (*match_hook)(void* user_data, const char* word, int word_len); +typedef void (*clear_hook)(void* user_data); + +struct RLContext +{ + getc_hook get; + void* get_param; + + putc_hook put; + void* put_param; + + match_hook match; + void* match_param; + + clear_hook clear; + void* clear_param; + + const char* prompt; + + char real_history[HISTORY_SIZE]; + char* history; + size_t history_pos; + size_t line_pos; +}; + +INLINE void rl_init_ctx(struct RLContext *ctx) +{ + memset(ctx, 0, sizeof(*ctx)); + ctx->history = ctx->real_history; +} + +INLINE void rl_clear_history(struct RLContext *ctx) +{ + memset(ctx->real_history, 0, sizeof(ctx->real_history)); + ctx->history_pos = 0; + ctx->line_pos = ctx->history_pos; + ctx->history = ctx->real_history; +} + +INLINE void rl_sethook_get(struct RLContext* ctx, getc_hook get, void* get_param) +{ ctx->get = get; ctx->get_param = get_param; } + +INLINE void rl_sethook_put(struct RLContext* ctx, putc_hook put, void* put_param) +{ ctx->put = put; ctx->put_param = put_param; } + +INLINE void rl_sethook_match(struct RLContext* ctx, match_hook match, void* match_param) +{ ctx->match = match; ctx->match_param = match_param; } + +INLINE void rl_sethook_clear(struct RLContext* ctx, clear_hook clear, void* clear_param) +{ ctx->clear = clear; ctx->clear_param = clear_param; } + +INLINE void rl_setprompt(struct RLContext* ctx, const char* prompt) +{ ctx->prompt = prompt; } + +const char* rl_readline(struct RLContext* ctx); + +void rl_refresh(struct RLContext* ctx); + +#endif /* MWARE_READLINE_H */ diff --git a/2.5/bertos/mware/resource.c b/2.5/bertos/mware/resource.c new file mode 100644 index 00000000..c723bd64 --- /dev/null +++ b/2.5/bertos/mware/resource.c @@ -0,0 +1,113 @@ + +#include "resource.h" +#include + +/** + * Internal structure for building a priority queue + * of processes waiting for the resource to become free. + */ +typedef struct ResourceWaiter +{ + PriNode link; + struct Observer *owner; + +} ResourceWaiter; + + +bool ResMan_Alloc(Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest) +{ + bool success = false; + + ASSERT(releaseRequest); + + sem_obtain(&res->lock); + + if (res->owner == releaseRequest) + { + // Already ours + res->pri = pri; + success = true; + } + else if (!res->owner) + { + // Trivial acquire: nobody was owning the resource + res->pri = pri; + res->owner = releaseRequest; + success = true; + } + else + { + ResourceWaiter waiter; + + // Setup waiter structure and enqueue it to resource + waiter.owner = releaseRequest; + waiter.link.pri = pri; + LIST_ENQUEUE(&res->queue, &waiter.link); + + // Resource busy: are we eligible for preemption? + if ((res->pri < pri) && res->owner->event) + res->owner->event(EVENT_RELEASE, res); + + // Wait in the queue until the timeout occurs. + do + { + sem_release(&res->lock); + // TODO: use a semaphore here instead + ResMan_sleep(); + sem_obtain(&res->lock); + + // Check for ownership + if (res->owner == releaseRequest) + { + success = true; + break; + } + } + while (timeout--); + + // Remove pending waiter + if (!success) + REMOVE(&waiter.link.link); + } + + sem_release(&res->lock); + return success; +} + +void ResMan_Free(Resource *res) +{ + ResourceWaiter *waiter; + + sem_obtain(&res->lock); + + + ASSERT(res->owner); + //TODO: check for real owner calling free + + // Check for new owner candidates. + if ((waiter = (ResourceWaiter *)list_remHead(&res->queue))) + { + // Transfer ownership of the resource + res->owner = waiter->owner; + res->pri = waiter->link.pri; + //ResMan_wakeup(waiter); + } + else + { + // Nobody waiting, free the resource + res->owner = NULL; + res->pri = -1; + } + + sem_release(&res->lock); +} + +void ResMan_Init(Resource *res) +{ + res->owner = NULL; + res->pri = -1; + + sem_init(&res->lock); + LIST_INIT(&res->queue); +} + diff --git a/2.5/bertos/mware/resource.h b/2.5/bertos/mware/resource.h new file mode 100644 index 00000000..15736a75 --- /dev/null +++ b/2.5/bertos/mware/resource.h @@ -0,0 +1,106 @@ +/** + * \file + * + * + * \brief TODO: + * + * \version $Id$ + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#ifndef MWARE_RESOURCE_H +#define MWARE_RESOURCE_H + +#include // time_t +#include + +#warning FIXME:Revise me! + +/* + * Abstract locking primitives used by host OS. + */ +typedef Semaphore ResourceLock; +#define ResMan_sleep() timer_delay(1) +#define ResMan_time_t mtime_t + + + +// Forward decl +struct Observer; + +/** + * Hold context information for a resource such as an audio channel. + * + * Each driver registers one or more Resource instances with the + * ResMan using ResMan_Register(). + * + * Clients can then allocate the resource through ResMan_Alloc() + * providing a desired priority and an Observer for asynchronous + * notification. + * + * Allocated resources can be stolen by other clients asking for a + * higher priority. ResMan notifies a preemption request by invoking + * the Observer of the current owner. + * + * The Observer callback must take whatever action is needed to + * release the resource as soon as possible to avoid blocking the + * new owner. + */ +typedef struct Resource +{ +//Private + /// Control access to fields below. + Semaphore lock; + + /// Pointer to current owner's observer. NULL if resource is free. + struct Observer *owner; + + /// Priority of current owner (higher values mean higher priority). + int pri; + + /// Queue of processes waiting to obtain the resource. + List queue; +} Resource; + +/// Event sent by ResMan to owners when to request resource release. +enum { EVENT_RELEASE = 1 }; + +/// Try to allocate a resource \a res with priority \a pri for at most \a timeout ticks. +bool ResMan_Alloc(Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest); + +/// Free resource \a res. Will eventually wake-up other queued owners. +void ResMan_Free(Resource *res); + +void ResMan_Init(Resource *res); + +#endif /* MWARE_RESOURCE_H */ diff --git a/2.5/bertos/mware/rle.h b/2.5/bertos/mware/rle.h new file mode 100644 index 00000000..0ca9a28d --- /dev/null +++ b/2.5/bertos/mware/rle.h @@ -0,0 +1,2 @@ +#warning This header is OBSOLETE +#include diff --git a/2.5/bertos/mware/sprintf.c b/2.5/bertos/mware/sprintf.c new file mode 100644 index 00000000..158012fd --- /dev/null +++ b/2.5/bertos/mware/sprintf.c @@ -0,0 +1,158 @@ +/** + * \file + * + * + * \brief sprintf() implementation based on _formatted_write() + * + * \version $Id$ + * \author Bernie Innocenti + * + * $WIZ$ module_name = "sprintf" + * $WIZ$ module_depends = "formatwr" + * $WIZ$ module_harvard = "both" + */ + +#include +#include +#include + +#include + + +static void __str_put_char(char c, void *ptr) +{ + /* + * This Does not work on Code Warrior. Hmm... + * *(*((char **)ptr))++ = c; + */ + + **((char **)ptr) = c; + (*((char **)ptr))++; +} + +static void __null_put_char(UNUSED_ARG(char, c), UNUSED_ARG(void *, ptr)) +{ + /* nop */ +} + + +int PGM_FUNC(vsprintf)(char *str, const char * PGM_ATTR fmt, va_list ap) +{ + int result; + + if (str) + { + result = PGM_FUNC(_formatted_write)(fmt, __str_put_char, &str, ap); + + /* Terminate string */ + *str = '\0'; + } + else + result = PGM_FUNC(_formatted_write)(fmt, __null_put_char, 0, ap); + + + return result; +} + + +int PGM_FUNC(sprintf)(char *str, const char * fmt, ...) +{ + int result; + va_list ap; + + va_start(ap, fmt); + result = PGM_FUNC(vsprintf)(str, fmt, ap); + va_end(ap); + + return result; +} + +/** + * State information for __sn_put_char() + */ +struct __sn_state +{ + char *str; + size_t len; +}; + +/** + * formatted_write() callback used [v]snprintf(). + */ +static void __sn_put_char(char c, void *ptr) +{ + struct __sn_state *state = (struct __sn_state *)ptr; + + if (state->len) + { + --state->len; + *state->str++ = c; + } +} + + +int PGM_FUNC(vsnprintf)(char *str, size_t size, const char * PGM_ATTR fmt, va_list ap) +{ + int result = 0; + + /* Make room for traling '\0'. */ + if (size--) + { + if (str) + { + struct __sn_state state; + state.str = str; + state.len = size; + + result = PGM_FUNC(_formatted_write)(fmt, __sn_put_char, &state, ap); + + /* Terminate string. */ + *state.str = '\0'; + } + else + result = PGM_FUNC(_formatted_write)(fmt, __null_put_char, 0, ap); + } + + return result; +} + + +int PGM_FUNC(snprintf)(char *str, size_t size, const char * fmt, ...) +{ + int result; + va_list ap; + + va_start(ap, fmt); + result = PGM_FUNC(vsnprintf)(str, size, fmt, ap); + va_end(ap); + + return result; +} diff --git a/2.5/bertos/mware/sprintf_test.c b/2.5/bertos/mware/sprintf_test.c new file mode 100644 index 00000000..eba0da66 --- /dev/null +++ b/2.5/bertos/mware/sprintf_test.c @@ -0,0 +1,115 @@ +/** + * \file + * + * + * notest: avr + * notest: arm + * \brief sprintf() implementation based on _formatted_write() + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "formatwr.h" +#include +#include +#include + +#include + +#include + +#include /* strcmp() */ + + +int sprintf_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int sprintf_testRun(void) +{ + char buf[256]; + static const char test_string[] = "Hello, world!\n"; + static const pgm_char test_string_pgm[] = "Hello, world!\n"; + + snprintf(buf, sizeof buf, "%s", test_string); + if (strcmp(buf, test_string) != 0) + return 1; + + snprintf(buf, sizeof buf, "%S", (const wchar_t *)test_string_pgm); + if (strcmp(buf, test_string_pgm) != 0) + return 2; + + #define TEST(FMT, VALUE, EXPECT) do { \ + snprintf(buf, sizeof buf, FMT, VALUE); \ + if (strcmp(buf, EXPECT) != 0) \ + return -1; \ + } while (0) + + TEST("%d", 12345, "12345"); + TEST("%ld", 123456789L, "123456789"); + TEST("%ld", -12345678L, "-12345678"); + TEST("%lu", 4294967295UL, "4294967295"); + TEST("%hd", -12345, "-12345"); + TEST("%hu", 65535U, "65535"); + + TEST("%8d", 123, " 123"); + TEST("%8d", -123, " -123"); + TEST("%-8d", -123, "-123 "); + TEST("%08d", -123, "-0000123"); + + TEST("%8.2f", -123.456, " -123.46"); + TEST("%-8.2f", -123.456, "-123.46 "); + TEST("%8.0f", -123.456, " -123"); + + + /* + * Stress tests. + */ + snprintf(buf, sizeof buf, "%s", (char *)(NULL)); + if (strcmp(buf, "") != 0) + return 3; + snprintf(buf, sizeof buf, "%k"); + if (strcmp(buf, "???") != 0) + return 4; + sprintf(NULL, test_string); /* must not crash */ + + return 0; +} + +int sprintf_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(sprintf); diff --git a/2.5/bertos/mware/strtol10.c b/2.5/bertos/mware/strtol10.c new file mode 100644 index 00000000..3fac2e2c --- /dev/null +++ b/2.5/bertos/mware/strtol10.c @@ -0,0 +1,100 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "strtol10.h" + +/** + * Convert a formatted base-10 ASCII number to unsigned long binary representation. + * + * Unlike the standard strtoul(), this function has an interface + * that makes it better suited for protocol parsers. It's also + * much simpler and smaller than a full featured strtoul(). + * + * \param first Pointer to first byte of input range (STL-style). + * \param last Pointer to end of input range (STL-style). + * Pass NULL to parse up to the first \\0. + * \param val Pointer to converted value. + * + * \return true for success, false for failure. + * + * \see strtol10() + */ +bool strtoul10(const char *first, const char *last, unsigned long *val) +{ + // Check for no input + if (*first == '\0') + return false; + + *val = 0; + for(/*nop*/; first != last && *first != '\0'; ++first) + { + if ((*first < '0') || (*first > '9')) + return false; + + *val = (*val * 10L) + (*first - '0'); + } + + return true; +} + + +/** + * Convert a formatted base-10 ASCII number to signed long binary representation. + * + * \see strtoul10() + */ +bool strtol10(const char *first, const char *last, long *val) +{ + bool negative = false; + + if (*first == '+') + ++first; /* skip unary plus sign */ + else if (*first == '-') + { + negative = true; + ++first; + } + + bool result = strtoul10(first, last, (unsigned long *)val); + + if (negative) + *val = - *val; + + return result; +} + diff --git a/2.5/bertos/mware/strtol10.h b/2.5/bertos/mware/strtol10.h new file mode 100644 index 00000000..8c191cf9 --- /dev/null +++ b/2.5/bertos/mware/strtol10.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \version $Id$ + * \author Bernie Innocenti + */ + + +#ifndef MWARE_STRTOL10_H +#define MWARE_STRTOL10_H + +#include /* bool */ + +bool strtoul10(const char *first, const char *last, unsigned long *val); +bool strtol10(const char *first, const char *last, long *val); + +/** + * Replacement for standard library function atol(). + */ +INLINE long atol(const char *str) +{ + long val; + strtol10(str, NULL, &val); + return val; +} + +/** + * Replacement for standard library function atoi(). + */ +INLINE int atoi(const char *str) +{ + return (int)atol(str); +} + +#endif /* MWARE_STRTOL10_H */ diff --git a/2.5/bertos/net/afsk.c b/2.5/bertos/net/afsk.c new file mode 100644 index 00000000..0db7956a --- /dev/null +++ b/2.5/bertos/net/afsk.c @@ -0,0 +1,571 @@ +/** + * \file + * + * + * \brief AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#include "afsk.h" +#include + +#include "cfg/cfg_afsk.h" +#include "hw/hw_afsk.h" + +#include + +#include + +#define LOG_LEVEL AFSK_LOG_LEVEL +#define LOG_FORMAT AFSK_LOG_FORMAT +#include + +#include +#include +#include + +#include /* memset */ + +#define PHASE_BIT 8 +#define PHASE_INC 1 + +#define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT) +#define PHASE_THRES (PHASE_MAX / 2) // - PHASE_BIT / 2) + +// Modulator constants +#define MARK_FREQ 1200 +#define MARK_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)MARK_FREQ, CONFIG_AFSK_DAC_SAMPLERATE)) + +#define SPACE_FREQ 2200 +#define SPACE_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)SPACE_FREQ, CONFIG_AFSK_DAC_SAMPLERATE)) + +//Ensure sample rate is a multiple of bit rate +STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE)); + +#define DAC_SAMPLEPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE) + +/** + * Sine table for the first quarter of wave. + * The rest of the wave is computed from this first quarter. + * This table is used to generate the modulated data. + */ +static const uint8_t PROGMEM sin_table[] = +{ + 128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151, + 152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175, + 176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197, + 198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, + 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, + 234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245, + 245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252, + 253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, +}; + +#define SIN_LEN 512 ///< Full wave length + +STATIC_ASSERT(sizeof(sin_table) == SIN_LEN / 4); + + +/** + * Given the index, this function computes the correct sine sample + * based only on the first quarter of wave. + */ +INLINE uint8_t sin_sample(uint16_t idx) +{ + ASSERT(idx < SIN_LEN); + uint16_t new_idx = idx % (SIN_LEN / 2); + new_idx = (new_idx >= (SIN_LEN / 4)) ? (SIN_LEN / 2 - new_idx - 1) : new_idx; + + #if CPU_HARVARD + uint8_t data = pgm_read_char(&sin_table[new_idx]); + #else + uint8_t data = sin_table[new_idx]; + #endif + + return (idx >= (SIN_LEN / 2)) ? (255 - data) : data; +} + + +#define BIT_DIFFER(bitline1, bitline2) (((bitline1) ^ (bitline2)) & 0x01) +#define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1) + +/** + * High-Level Data Link Control parsing function. + * Parse bitstream in order to find characters. + * + * \param hdlc HDLC context. + * \param bit current bit to be parsed. + * \param fifo FIFO buffer used to push characters. + * + * \return true if all is ok, false if the fifo is full. + */ +static bool hdlc_parse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) +{ + bool ret = true; + + hdlc->demod_bits <<= 1; + hdlc->demod_bits |= bit ? 1 : 0; + + /* HDLC Flag */ + if (hdlc->demod_bits == HDLC_FLAG) + { + if (!fifo_isfull(fifo)) + { + fifo_push(fifo, HDLC_FLAG); + hdlc->rxstart = true; + } + else + { + ret = false; + hdlc->rxstart = false; + } + + hdlc->currchar = 0; + hdlc->bit_idx = 0; + return ret; + } + + /* Reset */ + if ((hdlc->demod_bits & HDLC_RESET) == HDLC_RESET) + { + hdlc->rxstart = false; + return ret; + } + + if (!hdlc->rxstart) + return ret; + + /* Stuffed bit */ + if ((hdlc->demod_bits & 0x3f) == 0x3e) + return ret; + + if (hdlc->demod_bits & 0x01) + hdlc->currchar |= 0x80; + + if (++hdlc->bit_idx >= 8) + { + if ((hdlc->currchar == HDLC_FLAG + || hdlc->currchar == HDLC_RESET + || hdlc->currchar == AX25_ESC)) + { + if (!fifo_isfull(fifo)) + fifo_push(fifo, AX25_ESC); + else + { + hdlc->rxstart = false; + ret = false; + } + } + + if (!fifo_isfull(fifo)) + fifo_push(fifo, hdlc->currchar); + else + { + hdlc->rxstart = false; + ret = false; + } + + hdlc->currchar = 0; + hdlc->bit_idx = 0; + } + else + hdlc->currchar >>= 1; + + return ret; +} + + +/** + * ADC ISR callback. + * This function has to be called by the ADC ISR when a sample of the configured + * channel is available. + * \param af Afsk context to operate on. + * \param curr_sample current sample from the ADC. + */ +void afsk_adc_isr(Afsk *af, int8_t curr_sample) +{ + AFSK_STROBE_ON(); + + /* + * Frequency discriminator and LP IIR filter. + * This filter is designed to work + * at the given sample rate and bit rate. + */ + STATIC_ASSERT(SAMPLERATE == 9600); + STATIC_ASSERT(BITRATE == 1200); + + /* + * Frequency discrimination is achieved by simply multiplying + * the sample with a delayed sample of (samples per bit) / 2. + * Then the signal is lowpass filtered with a first order, + * 600 Hz filter. The filter implementation is selectable + * through the CONFIG_AFSK_FILTER config variable. + */ + + af->iir_x[0] = af->iir_x[1]; + + #if (CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH) + af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2; + //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 6.027339492; + #elif (CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV) + af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2; + //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 3.558147322; + #else + #error Filter type not found! + #endif + + af->iir_y[0] = af->iir_y[1]; + + #if CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH + /* + * This strange sum + shift is an optimization for af->iir_y[0] * 0.668. + * iir * 0.668 ~= (iir * 21) / 32 = + * = (iir * 16) / 32 + (iir * 4) / 32 + iir / 32 = + * = iir / 2 + iir / 8 + iir / 32 = + * = iir >> 1 + iir >> 3 + iir >> 5 + */ + af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1) + (af->iir_y[0] >> 3) + (af->iir_y[0] >> 5); + //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.6681786379; + #elif CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV + /* + * This should be (af->iir_y[0] * 0.438) but + * (af->iir_y[0] >> 1) is a faster approximation :-) + */ + af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1); + //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.4379097269; + #endif + + /* Save this sampled bit in a delay line */ + af->sampled_bits <<= 1; + af->sampled_bits |= (af->iir_y[1] > 0) ? 1 : 0; + + /* Store current ADC sample in the af->delay_fifo */ + fifo_push(&af->delay_fifo, curr_sample); + + /* If there is an edge, adjust phase sampling */ + if (EDGE_FOUND(af->sampled_bits)) + { + if (af->curr_phase < PHASE_THRES) + af->curr_phase += PHASE_INC; + else + af->curr_phase -= PHASE_INC; + } + af->curr_phase += PHASE_BIT; + + /* sample the bit */ + if (af->curr_phase >= PHASE_MAX) + { + af->curr_phase %= PHASE_MAX; + + /* Shift 1 position in the shift register of the found bits */ + af->found_bits <<= 1; + + /* + * Determine bit value by reading the last 3 sampled bits. + * If the number of ones is two or greater, the bit value is a 1, + * otherwise is a 0. + * This algorithm presumes that there are 8 samples per bit. + */ + STATIC_ASSERT(SAMPLEPERBIT == 8); + uint8_t bits = af->sampled_bits & 0x07; + if (bits == 0x07 // 111, 3 bits set to 1 + || bits == 0x06 // 110, 2 bits + || bits == 0x05 // 101, 2 bits + || bits == 0x03 // 011, 2 bits + ) + af->found_bits |= 1; + + /* + * NRZI coding: if 2 consecutive bits have the same value + * a 1 is received, otherwise it's a 0. + */ + if (!hdlc_parse(&af->hdlc, !EDGE_FOUND(af->found_bits), &af->rx_fifo)) + af->status |= AFSK_RXFIFO_OVERRUN; + } + + + AFSK_STROBE_OFF(); +} + +static void afsk_txStart(Afsk *af) +{ + if (!af->sending) + { + af->phase_inc = MARK_INC; + af->phase_acc = 0; + af->stuff_cnt = 0; + af->sending = true; + af->preamble_len = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000); + AFSK_DAC_IRQ_START(af->dac_ch); + } + ATOMIC(af->trailer_len = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000)); +} + +#define BIT_STUFF_LEN 5 + +#define SWITCH_TONE(inc) (((inc) == MARK_INC) ? SPACE_INC : MARK_INC) + +/** + * DAC ISR callback. + * This function has to be called by the DAC ISR when a sample of the configured + * channel has been converted out. + * + * \param af Afsk context to operate on. + * + * \return The next DAC output sample. + */ +uint8_t afsk_dac_isr(Afsk *af) +{ + AFSK_STROBE_ON(); + + /* Check if we are at a start of a sample cycle */ + if (af->sample_count == 0) + { + if (af->tx_bit == 0) + { + /* We have just finished transimitting a char, get a new one. */ + if (fifo_isempty(&af->tx_fifo) && af->trailer_len == 0) + { + AFSK_DAC_IRQ_STOP(af->dac_ch); + af->sending = false; + AFSK_STROBE_OFF(); + return 0; + } + else + { + /* + * If we have just finished sending an unstuffed byte, + * reset bitstuff counter. + */ + if (!af->bit_stuff) + af->stuff_cnt = 0; + + af->bit_stuff = true; + + /* + * Handle preamble and trailer + */ + if (af->preamble_len == 0) + { + if (fifo_isempty(&af->tx_fifo)) + { + af->trailer_len--; + af->curr_out = HDLC_FLAG; + } + else + af->curr_out = fifo_pop(&af->tx_fifo); + } + else + { + af->preamble_len--; + af->curr_out = HDLC_FLAG; + } + + /* Handle char escape */ + if (af->curr_out == AX25_ESC) + { + if (fifo_isempty(&af->tx_fifo)) + { + AFSK_DAC_IRQ_STOP(af->dac_ch); + af->sending = false; + AFSK_STROBE_OFF(); + return 0; + } + else + af->curr_out = fifo_pop(&af->tx_fifo); + } + else if (af->curr_out == HDLC_FLAG || af->curr_out == HDLC_RESET) + /* If these chars are not escaped disable bit stuffing */ + af->bit_stuff = false; + } + /* Start with LSB mask */ + af->tx_bit = 0x01; + } + + /* check for bit stuffing */ + if (af->bit_stuff && af->stuff_cnt >= BIT_STUFF_LEN) + { + /* If there are more than 5 ones in a row insert a 0 */ + af->stuff_cnt = 0; + /* switch tone */ + af->phase_inc = SWITCH_TONE(af->phase_inc); + } + else + { + /* + * NRZI: if we want to transmit a 1 the modulated frequency will stay + * unchanged; with a 0, there will be a change in the tone. + */ + if (af->curr_out & af->tx_bit) + { + /* + * Transmit a 1: + * - Stay on the previous tone + * - Increase bit stuff counter + */ + af->stuff_cnt++; + } + else + { + /* + * Transmit a 0: + * - Reset bit stuff counter + * - Switch tone + */ + af->stuff_cnt = 0; + af->phase_inc = SWITCH_TONE(af->phase_inc); + } + + /* Go to the next bit */ + af->tx_bit <<= 1; + } + af->sample_count = DAC_SAMPLEPERBIT; + } + + /* Get new sample and put it out on the DAC */ + af->phase_acc += af->phase_inc; + af->phase_acc %= SIN_LEN; + + af->sample_count--; + AFSK_STROBE_OFF(); + return sin_sample(af->phase_acc); +} + + +static size_t afsk_read(KFile *fd, void *_buf, size_t size) +{ + Afsk *af = AFSK_CAST(fd); + uint8_t *buf = (uint8_t *)_buf; + + #if CONFIG_AFSK_RXTIMEOUT == 0 + while (size-- && !fifo_isempty_locked(&af->rx_fifo)) + #else + while (size--) + #endif + { + #if CONFIG_AFSK_RXTIMEOUT != -1 + ticks_t start = timer_clock(); + #endif + + while (fifo_isempty_locked(&af->rx_fifo)) + { + cpu_relax(); + #if CONFIG_AFSK_RXTIMEOUT != -1 + if (timer_clock() - start > ms_to_ticks(CONFIG_AFSK_RXTIMEOUT)) + return buf - (uint8_t *)_buf; + #endif + } + + *buf++ = fifo_pop_locked(&af->rx_fifo); + } + + return buf - (uint8_t *)_buf; +} + +static size_t afsk_write(KFile *fd, const void *_buf, size_t size) +{ + Afsk *af = AFSK_CAST(fd); + const uint8_t *buf = (const uint8_t *)_buf; + + while (size--) + { + while (fifo_isfull_locked(&af->tx_fifo)) + cpu_relax(); + + fifo_push_locked(&af->tx_fifo, *buf++); + afsk_txStart(af); + } + + return buf - (const uint8_t *)_buf; +} + +static int afsk_flush(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + while (af->sending) + cpu_relax(); + return 0; +} + +static int afsk_error(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + int err; + + ATOMIC(err = af->status); + return err; +} + +static void afsk_clearerr(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + ATOMIC(af->status = 0); +} + + +/** + * Initialize an AFSK1200 modem. + * \param af Afsk context to operate on. + * \param adc_ch ADC channel used by the demodulator. + * \param dac_ch DAC channel used by the modulator. + */ +void afsk_init(Afsk *af, int adc_ch, int dac_ch) +{ + #if CONFIG_AFSK_RXTIMEOUT != -1 + MOD_CHECK(timer); + #endif + memset(af, 0, sizeof(*af)); + af->adc_ch = adc_ch; + af->dac_ch = dac_ch; + + fifo_init(&af->delay_fifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf)); + fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf)); + + /* Fill sample FIFO with 0 */ + for (int i = 0; i < SAMPLEPERBIT / 2; i++) + fifo_push(&af->delay_fifo, 0); + + fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf)); + + AFSK_ADC_INIT(adc_ch, af); + AFSK_DAC_INIT(dac_ch, af); + AFSK_STROBE_INIT(); + LOG_INFO("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC); + + DB(af->fd._type = KFT_AFSK); + af->fd.write = afsk_write; + af->fd.read = afsk_read; + af->fd.flush = afsk_flush; + af->fd.error = afsk_error; + af->fd.clearerr = afsk_clearerr; + af->phase_inc = MARK_INC; +} diff --git a/2.5/bertos/net/afsk.h b/2.5/bertos/net/afsk.h new file mode 100644 index 00000000..57d3da8e --- /dev/null +++ b/2.5/bertos/net/afsk.h @@ -0,0 +1,224 @@ +/** + * \file + * + * + * \brief AFSK1200 modem. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "afsk" + * $WIZ$ module_configuration = "bertos/cfg/cfg_afsk.h" + * $WIZ$ module_depends = "timer", "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_afsk.h" + */ + +#ifndef NET_AFSK_H +#define NET_AFSK_H + +#include "cfg/cfg_afsk.h" +#include "hw/hw_afsk.h" + +#include +#include +#include + + + +/** + * ADC sample rate. + * The demodulator filters are designed to work at this frequency. + * If you need to change this remember to update afsk_adc_isr(). + */ +#define SAMPLERATE 9600 + +/** + * Bitrate of the received/transmitted data. + * The demodulator filters and decoderes are designed to work at this frequency. + * If you need to change this remember to update afsk_adc_isr(). + */ +#define BITRATE 1200 + +#define SAMPLEPERBIT (SAMPLERATE / BITRATE) + +/** + * HDLC (High-Level Data Link Control) context. + * Maybe to be moved in a separate HDLC module one day. + */ +typedef struct Hdlc +{ + uint8_t demod_bits; ///< Bitstream from the demodulator. + uint8_t bit_idx; ///< Current received bit. + uint8_t currchar; ///< Current received character. + bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream. +} Hdlc; + +/** + * RX FIFO buffer full error. + */ +#define AFSK_RXFIFO_OVERRUN BV(0) + +/** + * AFSK1200 modem context. + */ +typedef struct Afsk +{ + /** Base "class" */ + KFile fd; + + /** ADC channel to be used by the demodulator */ + int adc_ch; + + /** DAC channel to be used by the modulator */ + int dac_ch; + + /** Current sample of bit for output data. */ + uint8_t sample_count; + + /** Current character to be modulated */ + uint8_t curr_out; + + /** Mask of current modulated bit */ + uint8_t tx_bit; + + /** True if bit stuff is allowed, false otherwise */ + bool bit_stuff; + + /** Counter for bit stuffing */ + uint8_t stuff_cnt; + /** + * DDS phase accumulator for generating modulated data. + */ + uint16_t phase_acc; + + /** Current phase increment for current modulated bit */ + uint16_t phase_inc; + + /** Delay line used to delay samples by (SAMPLEPERBIT / 2) */ + FIFOBuffer delay_fifo; + + /** + * Buffer for delay FIFO. + * The 1 is added because the FIFO macros need + * 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long. + */ + int8_t delay_buf[SAMPLEPERBIT / 2 + 1]; + + /** FIFO for received data */ + FIFOBuffer rx_fifo; + + /** FIFO rx buffer */ + uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN]; + + /** FIFO for transmitted data */ + FIFOBuffer tx_fifo; + + /** FIFO tx buffer */ + uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN]; + + /** IIR filter X cells, used to filter sampled data by the demodulator */ + int16_t iir_x[2]; + + /** IIR filter Y cells, used to filter sampled data by the demodulator */ + int16_t iir_y[2]; + + /** + * Bits sampled by the demodulator are here. + * Since ADC samplerate is higher than the bitrate, the bits here are + * SAMPLEPERBIT times the bitrate. + */ + uint8_t sampled_bits; + + /** + * Current phase, needed to know when the bitstream at ADC speed + * should be sampled. + */ + int8_t curr_phase; + + /** Bits found by the demodulator at the correct bitrate speed. */ + uint8_t found_bits; + + /** True while modem sends data */ + volatile bool sending; + + /** + * AFSK modem status. + * If 0 all is ok, otherwise errors are present. + */ + volatile int status; + + /** Hdlc context */ + Hdlc hdlc; + + /** + * Preamble length. + * When the AFSK modem wants to send data, before sending the actual data, + * shifts out preamble_len HDLC_FLAG characters. + * This helps to synchronize the demodulator filters on the receiver side. + */ + uint16_t preamble_len; + + /** + * Trailer length. + * After sending the actual data, the AFSK shifts out + * trailer_len HDLC_FLAG characters. + * This helps to synchronize the demodulator filters on the receiver side. + */ + uint16_t trailer_len; +} Afsk; + +#define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K') + +INLINE Afsk *AFSK_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_AFSK); + return (Afsk *)fd; +} + + +void afsk_adc_isr(Afsk *af, int8_t sample); +uint8_t afsk_dac_isr(Afsk *af); +void afsk_init(Afsk *af, int adc_ch, int dac_ch); + + +/** + * \name Afsk filter types. + * $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV" + * \{ + */ +#define AFSK_BUTTERWORTH 0 +#define AFSK_CHEBYSHEV 1 +/* \} */ + +int afsk_testSetup(void); +int afsk_testRun(void); +int afsk_testTearDown(void); + +#endif /* NET_AFSK_H */ diff --git a/2.5/bertos/net/afsk_test.c b/2.5/bertos/net/afsk_test.c new file mode 100644 index 00000000..cd434084 --- /dev/null +++ b/2.5/bertos/net/afsk_test.c @@ -0,0 +1,223 @@ +/** + * \file + * + * + * \brief AFSK demodulator test. + * + * \version $Id$ + * \author Francesco Sacchi + * $test$: cp bertos/cfg/cfg_ax25.h $cfgdir/ + * $test$: echo "#undef AX25_LOG_LEVEL" >> $cfgdir/cfg_ax25.h + * $test$: echo "#define AX25_LOG_LEVEL LOG_LVL_INFO" >> $cfgdir/cfg_ax25.h + * $test$: cp bertos/cfg/cfg_afsk.h $cfgdir/ + * $test$: echo "#undef CONFIG_AFSK_TX_BUFLEN" >> $cfgdir/cfg_afsk.h + * $test$: echo "#define CONFIG_AFSK_TX_BUFLEN 512" >> $cfgdir/cfg_afsk.h + */ + + +#include "afsk.h" +#include "cfg/cfg_afsk.h" + +#include +#include + +#include +#include +#include + +#include + +#include +#include + +FILE *fp_adc; +FILE *fp_dac; +uint32_t data_size; +uint32_t data_written; +Afsk afsk_fd; +AX25Ctx ax25; +KFileDebug dbg; + +int msg_cnt; +static void message_hook(struct AX25Msg *msg) +{ + msg_cnt++; + ax25_print(&dbg.fd, msg); +} + +static FILE *afsk_fileOpen(const char *name) +{ + FILE *fp = 0; + #if CPU_AVR + (void)name; + #warning TODO: open the file? + #else + fp = fopen(name, "rb"); + #endif + ASSERT(fp); + + char snd[5]; + ASSERT(fread(snd, 1, 4, fp) == 4); + snd[4] = 0; + ASSERT(strcmp(snd, ".snd") == 0); + + uint32_t offset; + ASSERT(fread(&offset, 1, sizeof(offset), fp) == sizeof(offset)); + offset = be32_to_cpu(offset); + kprintf("AU file offset: %ld\n", (long)offset); + ASSERT(offset >= 24); + + ASSERT(fread(&data_size, 1, sizeof(data_size), fp) == sizeof(data_size)); + data_size = be32_to_cpu(data_size); + kprintf("AU file data_size: %ld\n", (long)data_size); + ASSERT(data_size); + + uint32_t encoding; + ASSERT(fread(&encoding, 1, sizeof(encoding), fp) == sizeof(encoding)); + encoding = be32_to_cpu(encoding); + kprintf("AU file encoding: %ld\n", (long)encoding); + ASSERT(encoding == 2); // 8 bit linear PCM + + uint32_t sample_rate; + ASSERT(fread(&sample_rate, 1, sizeof(sample_rate), fp) == sizeof(sample_rate)); + sample_rate = be32_to_cpu(sample_rate); + kprintf("AU file sample_rate: %ld\n", (long)sample_rate); + ASSERT(sample_rate == 9600); + + uint32_t channels; + ASSERT(fread(&channels, 1, sizeof(channels), fp) == sizeof(channels)); + channels = be32_to_cpu(channels); + kprintf("AU file channels: %ld\n", (long)channels); + ASSERT(channels == 1); + + #if CPU_AVR + #warning TODO: fseek? + #else + ASSERT(fseek(fp, offset, SEEK_SET) == 0); + #endif + return fp; +} + +int afsk_testSetup(void) +{ + kdbg_init(); + kfiledebug_init(&dbg); + fp_adc = afsk_fileOpen("test/afsk_test.au"); + #if CPU_AVR + #warning TODO: open the file? + #else + fp_dac = fopen("test/afsk_test_out.au", "w+b"); + #endif + ASSERT(fp_dac); + #define FS_HH (((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) >> 24) + #define FS_HL ((((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) >> 16) & 0xff) + #define FS_LH ((((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) >> 8) & 0xff) + #define FS_LL (((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) & 0xff) + + uint8_t snd_header[] = { '.','s','n','d', 0,0,0,24, 0,0,0,0, 0,0,0,2, FS_HH,FS_HL,FS_LH,FS_LL, 0,0,0,1}; + + ASSERT(fwrite(snd_header, 1, sizeof(snd_header), fp_dac) == sizeof(snd_header)); + + timer_init(); + afsk_init(&afsk_fd, 0 ,0); + ax25_init(&ax25, &afsk_fd.fd, message_hook); + return 0; +} + + +static void messageout_hook(struct AX25Msg *msg) +{ + ASSERT(strncmp(msg->dst.call, "ABCDEF", 6) == 0); + ASSERT(strncmp(msg->src.call, "123456", 6) == 0); + ASSERT(msg->src.ssid == 1); + ASSERT(msg->dst.ssid == 0); + ASSERT(msg->ctrl == AX25_CTRL_UI); + ASSERT(msg->pid == AX25_PID_NOLAYER3); + ASSERT(msg->len == 256); + for (int i = 0; i < 256; i++) + ASSERT(msg->info[i] == i); +} + +int afsk_testRun(void) +{ + int c; + while ((c = fgetc(fp_adc)) != EOF) + { + afsk_adc_isr(&afsk_fd, (int8_t)c); + + ax25_poll(&ax25); + } + kprintf("Messages correctly received: %d\n", msg_cnt); + ASSERT(msg_cnt >= 15); + + char buf[256]; + for (unsigned i = 0; i < sizeof(buf); i++) + buf[i] = i; + + ax25_send(&ax25, AX25_CALL("abcdef", 0), AX25_CALL("123456", 1), buf, sizeof(buf)); + + do + { + int8_t val = afsk_dac_isr(&afsk_fd) - 128; + ASSERT(fwrite(&val, 1, sizeof(val), fp_dac) == sizeof(val)); + data_written++; + } + while (afsk_fd.sending); + + #define SND_DATASIZE_OFF 8 + #if CPU_AVR + #warning TODO: fseek? + #else + ASSERT(fseek(fp_dac, SND_DATASIZE_OFF, SEEK_SET) == 0); + #endif + data_written = cpu_to_be32(data_written); + ASSERT(fwrite(&data_written, 1, sizeof(data_written), fp_dac) == sizeof(data_written)); + ASSERT(fclose(fp_adc) + fclose(fp_dac) == 0); + + fp_adc = afsk_fileOpen("test/afsk_test_out.au"); + ax25_init(&ax25, &afsk_fd.fd, messageout_hook); + + while ((c = fgetc(fp_adc)) != EOF) + { + afsk_adc_isr(&afsk_fd, (int8_t)c); + + ax25_poll(&ax25); + } + + return 0; +} + +int afsk_testTearDown(void) +{ + return fclose(fp_adc); +} + +TEST_MAIN(afsk); diff --git a/2.5/bertos/net/ax25.c b/2.5/bertos/net/ax25.c new file mode 100644 index 00000000..3d5ac343 --- /dev/null +++ b/2.5/bertos/net/ax25.c @@ -0,0 +1,308 @@ +/** + * \file + * + * \brief Simple AX25 data link layer implementation. + * + * For now, only UI frames without any Layer 3 protocol are handled. + * This however is enough to send/receive APRS packets. + * + * \author Francesco Sacchi + * + */ + +#include "ax25.h" +#include "cfg/cfg_ax25.h" + +#include + +#define LOG_LEVEL AX25_LOG_LEVEL +#define LOG_FORMAT AX25_LOG_FORMAT +#include + +#include //memset, memcmp +#include //isalnum, toupper + +#define DECODE_CALL(buf, addr) \ + for (unsigned i = 0; i < sizeof((addr)); i++) \ + { \ + char c = (*(buf)++ >> 1); \ + (addr)[i] = (c == ' ') ? '\x0' : c; \ + } + +static void ax25_decode(AX25Ctx *ctx) +{ + AX25Msg msg; + uint8_t *buf = ctx->buf; + + DECODE_CALL(buf, msg.dst.call); + msg.dst.ssid = (*buf++ >> 1) & 0x0F; + + DECODE_CALL(buf, msg.src.call); + msg.src.ssid = (*buf >> 1) & 0x0F; + + LOG_INFO("SRC[%.6s-%d], DST[%.6s-%d]\n", msg.src.call, msg.src.ssid, msg.dst.call, msg.dst.ssid); + + /* Repeater addresses */ + #if CONFIG_AX25_RPT_LST + for (msg.rpt_cnt = 0; !(*buf++ & 0x01) && (msg.rpt_cnt < countof(msg.rpt_lst)); msg.rpt_cnt++) + { + DECODE_CALL(buf, msg.rpt_lst[msg.rpt_cnt].call); + msg.rpt_lst[msg.rpt_cnt].ssid = (*buf >> 1) & 0x0F; + LOG_INFO("RPT%d[%.6s-%d]\n", msg.rpt_cnt, msg.rpt_lst[msg.rpt_cnt].call, msg.rpt_lst[msg.rpt_cnt].ssid); + } + #else + while (!(*buf++ & 0x01)) + { + char rpt[6]; + uint8_t ssid; + DECODE_CALL(buf, rpt); + ssid = (*buf >> 1) & 0x0F; + LOG_INFO("RPT[%.6s-%d]\n", rpt, ssid); + } + #endif + + msg.ctrl = *buf++; + if (msg.ctrl != AX25_CTRL_UI) + { + LOG_WARN("Only UI frames are handled, got [%02X]\n", msg.ctrl); + return; + } + + msg.pid = *buf++; + if (msg.pid != AX25_PID_NOLAYER3) + { + LOG_WARN("Only frames without layer3 protocol are handled, got [%02X]\n", msg.pid); + return; + } + + msg.len = ctx->frm_len - 2 - (buf - ctx->buf); + msg.info = buf; + LOG_INFO("DATA: %.*s\n", msg.len, msg.info); + + if (ctx->hook) + ctx->hook(&msg); +} + + +/** + * Check if there are any AX25 messages to be processed. + * This function read available characters from the medium and search for + * any AX25 messages. + * If a message is found it is decoded and the linked callback executed. + * This function may be blocking if there are no available chars and the KFile + * used in \a ctx to access the medium is configured in blocking mode. + * + * \param ctx AX25 context to operate on. + */ +void ax25_poll(AX25Ctx *ctx) +{ + int c; + + while ((c = kfile_getc(ctx->ch)) != EOF) + { + if (!ctx->escape && c == HDLC_FLAG) + { + if (ctx->frm_len >= AX25_MIN_FRAME_LEN) + { + if (ctx->crc_in == AX25_CRC_CORRECT) + { + LOG_INFO("Frame found!\n"); + ax25_decode(ctx); + } + else + { + LOG_INFO("CRC error, computed [%04X]\n", ctx->crc_in); + } + } + ctx->sync = true; + ctx->crc_in = CRC_CCITT_INIT_VAL; + ctx->frm_len = 0; + continue; + } + + if (!ctx->escape && c == HDLC_RESET) + { + LOG_INFO("HDLC reset\n"); + ctx->sync = false; + continue; + } + + if (!ctx->escape && c == AX25_ESC) + { + ctx->escape = true; + continue; + } + + if (ctx->sync) + { + if (ctx->frm_len < CONFIG_AX25_FRAME_BUF_LEN) + { + ctx->buf[ctx->frm_len++] = c; + ctx->crc_in = updcrc_ccitt(c, ctx->crc_in); + } + else + { + LOG_INFO("Buffer overrun"); + ctx->sync = false; + } + } + ctx->escape = false; + } + + if (kfile_error(ctx->ch)) + { + LOG_ERR("Channel error [%04x]\n", kfile_error(ctx->ch)); + kfile_clearerr(ctx->ch); + } +} + +static void ax25_putchar(AX25Ctx *ctx, uint8_t c) +{ + if (c == HDLC_FLAG || c == HDLC_RESET + || c == AX25_ESC) + kfile_putc(AX25_ESC, ctx->ch); + ctx->crc_out = updcrc_ccitt(c, ctx->crc_out); + kfile_putc(c, ctx->ch); +} + +static void ax25_sendCall(AX25Ctx *ctx, const AX25Call *addr, bool last) +{ + unsigned len = MIN(sizeof(addr->call), strlen(addr->call)); + + for (unsigned i = 0; i < len; i++) + { + uint8_t c = addr->call[i]; + ASSERT(isalnum(c) || c == ' '); + c = toupper(c); + ax25_putchar(ctx, c << 1); + } + + /* Fill with spaces the rest of the CALL if it's shorter */ + if (len < sizeof(addr->call)) + for (unsigned i = 0; i < sizeof(addr->call) - len; i++) + ax25_putchar(ctx, ' ' << 1); + + /* The bit0 of last call SSID should be set to 1 */ + uint8_t ssid = addr->ssid << 1 | (last ? 0x01 : 0); + ax25_putchar(ctx, ssid); +} + +/** + * Send an AX25 frame on the channel through a specific path. + * \param ctx AX25 context to operate on. + * \param path An array of callsigns used as path, \see AX25_PATH for + * an handy way to create a path. + * \param path_len callsigns path lenght. + * \param _buf payload buffer. + * \param len length of the payload. + */ +void ax25_sendVia(AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len) +{ + const uint8_t *buf = (const uint8_t *)_buf; + ASSERT(path); + ASSERT(path_len >= 2); + + ctx->crc_out = CRC_CCITT_INIT_VAL; + kfile_putc(HDLC_FLAG, ctx->ch); + + + /* Send call */ + for (size_t i = 0; i < path_len; i++) + ax25_sendCall(ctx, &path[i], (i == path_len - 1)); + + ax25_putchar(ctx, AX25_CTRL_UI); + ax25_putchar(ctx, AX25_PID_NOLAYER3); + + while (len--) + ax25_putchar(ctx, *buf++); + + /* + * According to AX25 protocol, + * CRC is sent in reverse order! + */ + uint8_t crcl = (ctx->crc_out & 0xff) ^ 0xff; + uint8_t crch = (ctx->crc_out >> 8) ^ 0xff; + ax25_putchar(ctx, crcl); + ax25_putchar(ctx, crch); + + ASSERT(ctx->crc_out == AX25_CRC_CORRECT); + + kfile_putc(HDLC_FLAG, ctx->ch); +} + +static void print_call(KFile *ch, const AX25Call *call) +{ + kfile_printf(ch, "%.6s", call->call); + if (call->ssid) + kfile_printf(ch, "-%d", call->ssid); +} + +/** + * Print a AX25 message in TNC-2 packet monitor format. + * \param ch a kfile channel where the message will be printed. + * \param msg the message to be printed. + */ +void ax25_print(KFile *ch, const AX25Msg *msg) +{ + print_call(ch, &msg->src); + kfile_putc('>', ch); + print_call(ch, &msg->dst); + + #if CONFIG_AX25_RPT_LST + for (int i = 0; i < msg->rpt_cnt; i++) + { + kfile_putc(',', ch); + print_call(ch, &msg->rpt_lst[i]); + // TODO: add * to the trasmitting digi + } + #endif + + kfile_printf(ch, ":%.*s\n", msg->len, msg->info); +} + + +/** + * Init the AX25 protocol decoder. + * + * \param ctx AX25 context to init. + * \param channel Used to gain access to the physical medium + * \param hook Callback function called when a message is received + */ +void ax25_init(AX25Ctx *ctx, KFile *channel, ax25_callback_t hook) +{ + ASSERT(ctx); + ASSERT(channel); + + memset(ctx, 0, sizeof(*ctx)); + ctx->ch = channel; + ctx->hook = hook; + ctx->crc_in = ctx->crc_out = CRC_CCITT_INIT_VAL; +} diff --git a/2.5/bertos/net/ax25.h b/2.5/bertos/net/ax25.h new file mode 100644 index 00000000..0e609136 --- /dev/null +++ b/2.5/bertos/net/ax25.h @@ -0,0 +1,188 @@ +/** + * \file + * + * \brief Simple AX25 data link layer implementation. + * + * For now, only UI frames without any Layer 3 protocol are handled. + * This however is enough to send/receive APRS packets. + * + * \version $Id$ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "ax25" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ax25.h" + * $WIZ$ module_depends = "kfile", "crc-ccitt" + */ + + +#ifndef NET_AX25_H +#define NET_AX25_H + +#include "cfg/cfg_ax25.h" + +#include +#include + +/** + * Maximum size of a AX25 frame. + */ +#define AX25_MIN_FRAME_LEN 18 + +/** + * CRC computation on correct AX25 packets should + * give this result (don't ask why). + */ +#define AX25_CRC_CORRECT 0xF0B8 + +struct AX25Msg; // fwd declaration + +/** + * Type for AX25 messages callback. + */ +typedef void (*ax25_callback_t)(struct AX25Msg *msg); + + +/** + * AX25 Protocol context. + */ +typedef struct AX25Ctx +{ + uint8_t buf[CONFIG_AX25_FRAME_BUF_LEN]; ///< buffer for received chars + KFile *ch; ///< KFile used to access the physical medium + size_t frm_len; ///< received frame length. + uint16_t crc_in; ///< CRC for current received frame + uint16_t crc_out; ///< CRC of current sent frame + ax25_callback_t hook; ///< Hook function to be called when a message is received + bool sync; ///< True if we have received a HDLC flag. + bool escape; ///< True when we have to escape the following char. +} AX25Ctx; + + +/** + * AX25 Call sign. + */ +typedef struct AX25Call +{ + char call[6]; ///< Call string, max 6 character + uint8_t ssid; ///< SSID (secondary station ID) for the call +} AX25Call; + +/** + * Create an AX25Call structure on the fly. + * \param str callsign, can be 6 characters or shorter. + * \param id ssid associated with the callsign. + */ +#define AX25_CALL(str, id) {.call = (str), .ssid = (id) } + +/** + * Maximum number of Repeaters in a AX25 message. + */ +#define AX25_MAX_RPT 8 + + +/** + * AX25 Message. + * Used to handle AX25 sent/received messages. + */ +typedef struct AX25Msg +{ + AX25Call src; ///< Source adress + AX25Call dst; ///< Destination address + #if CONFIG_AX25_RPT_LST + AX25Call rpt_lst[AX25_MAX_RPT]; ///< List of repeaters + uint8_t rpt_cnt; ///< Number of repeaters in this message + #endif + uint16_t ctrl; ///< AX25 control field + uint8_t pid; ///< AX25 PID field + const uint8_t *info; ///< Pointer to the info field (payload) of the message + size_t len; ///< Payload length +} AX25Msg; + +#define AX25_CTRL_UI 0x03 +#define AX25_PID_NOLAYER3 0xF0 + +/** + * \name HDLC flags. + * These should be moved in + * a separated HDLC related file one day... + * \{ + */ +#define HDLC_FLAG 0x7E +#define HDLC_RESET 0x7F +#define AX25_ESC 0x1B +/* \} */ + + +/** + * Declare an AX25 path. + * \param dst the destination callsign for the path, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * \param src the source callsign for the path, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * + * Additional optional callsigns can be specified at the end of this macro + * in order to add repeater callsigns or specific unproto paths. + * + * This macro can be used to simply path array declaration. + * Should be used in this way: + * \code + * AX25Call path[] = AX25_PATH(AX25_CALL("abcdef", 0), AX25_CALL("ghjklm", 0), AX25_CALL("wide1", 1), AX25_CALL("wide2", 2)); + * \endcode + * + * The declared path can then be passed to ax25_sendVia(). + */ +#define AX25_PATH(dst, src, ...) { dst, src, ## __VA_ARGS__ } + +void ax25_poll(AX25Ctx *ctx); +void ax25_sendVia(AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len); + +/** + * Send an AX25 frame on the channel. + * \param ctx AX25 context to operate on. + * \param dst the destination callsign for the frame, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * \param src the source callsign for the frame, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * \param buf payload buffer. + * \param len length of the payload. + * + * \see ax25_sendVia() if you want to send a frame with a specific path. + */ +#define ax25_send(ctx, dst, src, buf, len) ax25_sendVia(ctx, ({static AX25Call __path[]={dst, src}; __path;}), 2, buf, len) +void ax25_init(AX25Ctx *ctx, KFile *channel, ax25_callback_t hook); + +void ax25_print(KFile *ch, const AX25Msg *msg); + +int ax25_testSetup(void); +int ax25_testTearDown(void); +int ax25_testRun(void); + +#endif /* NET_AX25_H */ diff --git a/2.5/bertos/net/ax25_test.c b/2.5/bertos/net/ax25_test.c new file mode 100644 index 00000000..fc3736cc --- /dev/null +++ b/2.5/bertos/net/ax25_test.c @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief AX25 test. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "ax25.h" + +#include + +#include +#include +#include + +#include //strncmp + +static AX25Ctx ax25; +static KFileMem mem; +static KFileDebug dbg; + +#define APRS_MSG \ + 0x3D, 0x34, 0x36, 0x30, 0x33, 0x2E, 0x36, 0x33, \ + 0x4E, 0x2F, 0x30, 0x31, 0x34, 0x33, 0x31, 0x2E, \ + 0x32, 0x36, 0x45, 0x2D, 0x4F, 0x70, 0x2E, 0x20, \ + 0x41, 0x6E, 0x64, 0x72, 0x65, 0x6A + +uint8_t aprs_packet[] = +{ + HDLC_FLAG, + 0x82, 0xA0, 0xA4, 0xA6, 0x40, 0x40, 0xE0, /* dst */ + 0xA6, 0x6A, 0x6E, 0x98, 0x9C, 0x40, 0x61, /* src */ + 0x03, /* ctrl */ + 0xF0, /* pid */ + APRS_MSG, /* payload */ + 0x40, 0x65, /* CRC */ + HDLC_FLAG, +}; + +uint8_t buf[] = { APRS_MSG }; +KFileMem mem1; +uint8_t aprs_packet_check[256]; + + +static void msg_callback(AX25Msg *msg) +{ + ax25_print(&dbg.fd, msg); + ASSERT(strncmp(msg->dst.call, "APRS\x0\x0", 6) == 0); + ASSERT(strncmp(msg->src.call, "S57LN\x0", 6) == 0); + ASSERT(msg->src.ssid == 0); + ASSERT(msg->dst.ssid == 0); + ASSERT(msg->ctrl == AX25_CTRL_UI); + ASSERT(msg->pid == AX25_PID_NOLAYER3); + ASSERT(msg->len == 30); + ASSERT(strncmp((const char *)msg->info, "=4603.63N/01431.26E-Op. Andrej", 30) == 0); +} + +int ax25_testSetup(void) +{ + kdbg_init(); + kfiledebug_init(&dbg); + kfilemem_init(&mem, aprs_packet, sizeof(aprs_packet)); + kfilemem_init(&mem1, aprs_packet_check, sizeof(aprs_packet_check)); + ax25_init(&ax25, &mem.fd, msg_callback); + return 0; +} + +int ax25_testTearDown(void) +{ + return 0; +} + +int ax25_testRun(void) +{ + ax25_poll(&ax25); + ax25_init(&ax25, &mem1.fd, NULL); + ax25_send(&ax25, AX25_CALL("aprs", 0x70), AX25_CALL("s57ln", 0x30), buf, sizeof(buf)); + ASSERT(memcmp(aprs_packet, aprs_packet_check, sizeof(aprs_packet)) == 0); + return 0; +} + +TEST_MAIN(ax25); diff --git a/2.5/bertos/net/keytag.c b/2.5/bertos/net/keytag.c new file mode 100644 index 00000000..32473ceb --- /dev/null +++ b/2.5/bertos/net/keytag.c @@ -0,0 +1,164 @@ +/** + * \file + * + * + * \author Andrea Grandi + * \author Daniele Basile + * + * \brief KeyTAG parser. + * + * This module parse TAG message that come from comunication channel, + * and convert the tag value into string. + * + * TAG protocol is decribed in this way: + * 
+ * ---------------------------------------------------
+ * |STX (0x02)|data...(10 HEX chars)|CR|LF|ETX (0x03)|
+ * ---------------------------------------------------
+ *
+ */ + +#include "keytag.h" + +#include +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_KEYTAG_LOG_LEVEL +#define LOG_FORMAT CONFIG_KEYTAG_LOG_FORMAT +#include +#include + +#include + +#include +/** + * Starting communication char (STX). + */ +#define TAG_STX 0x02 + +/** + * Ending communication char (ETX). + */ +#define TAG_ETX 0x03 + +static void keytag_clearPkt(struct TagPacket *pkt) +{ + pkt->sync = false; + pkt->len = 0; +} + +/** + * DEPRECATED FUCNTIONS + * To read the tag string from device you shoul use the keytag_recv + * fuction, that return the string if we had received it. + */ +void keytag_poll(struct TagPacket *pkt) +{ + #warning __FILTER_NEXT_WARNING__ + #warning keytag_poll function is depreca use keytag_recv instead + uint8_t buf[CONFIG_TAG_MAX_LEN]; + int len; + if ((len = keytag_recv(pkt, buf, sizeof(buf))) != EOF) + kfile_write(pkt->host, buf, len); +} + +/** + * Receive the tag message from channel, and if + * the tag is good put the converted string into given buffer. + * The fuction return the len of found tag string, otherwise EOF. + */ +int keytag_recv(struct TagPacket *pkt, uint8_t *tag, size_t len) +{ + int c; + + /* Get all chars from buffer */ + while ((c = kfile_getc(pkt->tag)) != EOF) + { + /* Search for STX char in received chars */ + if (c == TAG_STX) + { + /* When STX is found a new packet begins */ + if (pkt->sync) + LOG_WARN("TAG double sync!\n"); + keytag_clearPkt(pkt); + pkt->sync = true; + } + else if (pkt->sync) + { + /* Check for end of packet */ + if (c == TAG_ETX) + { + /* Terminate the tag string */ + size_t tag_len = MIN(len, pkt->len); + + /* Save read tag */ + memcpy(tag, pkt->buf, tag_len); + pkt->sync = false; + return tag_len; + } + else + { + /* Check for buffer overflow */ + if (pkt->len >= CONFIG_TAG_MAX_LEN) + { + LOG_ERR("TAG buffer overflow\n"); + pkt->sync = false; + } + else + { + /* Add every char after STX to tag reading buffer */ + if (pkt->sync) + { + pkt->buf[pkt->len] = c; + pkt->len++; + } + } + } + } + } + if (kfile_error(pkt->tag) != 0) + { + LOG_ERR("Error %04x\n", kfile_error(pkt->tag)); + kfile_clearerr(pkt->tag); + } + + return EOF; +} + +/** + * Init the keytag module. + */ +void keytag_init(struct TagPacket *pkt, struct KFile *comm, struct KFile *tag) +{ + keytag_clearPkt(pkt); + pkt->tag = tag; + pkt->host = comm; +} + diff --git a/2.5/bertos/net/keytag.h b/2.5/bertos/net/keytag.h new file mode 100644 index 00000000..f086bc34 --- /dev/null +++ b/2.5/bertos/net/keytag.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \author Andrea Grandi + * + * \brief Tag protocol. (interface). + * + * $WIZ$ module_name = "keytag" + * $WIZ$ module_configuration = "bertos/cfg/cfg_keytag.h" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_hw = "" + */ + +#ifndef NET_KEYTAG_H +#define NET_KEYTAG_H + +#include + +#include + + +/** + * Structure of a Tag packet + */ +typedef struct TagPacket +{ + KFile *tag; ///< Tag communication channel + KFile *host; ///< Host communication channel + bool sync; ///< Status flag: true if we find an STX + size_t len; ///< Packet lenght + uint8_t buf[CONFIG_TAG_MAX_LEN]; ///< Reception buffer +} TagPacket; + +void keytag_init(struct TagPacket *pkt, struct KFile *comm, struct KFile *tag); +int keytag_recv(struct TagPacket *pkt, uint8_t *tag, size_t len); + +void keytag_poll(struct TagPacket *pkt); + +#endif /* NET_TAG_H */ diff --git a/2.5/bertos/net/nmea.c b/2.5/bertos/net/nmea.c new file mode 100644 index 00000000..d232c73a --- /dev/null +++ b/2.5/bertos/net/nmea.c @@ -0,0 +1,474 @@ +/** + * \file + * + * + * \brief NMEA parser implementation. + * + * NMEA 0183 is acronym of National Marine Electronics Association that + * combined electrical and data specification for communication between marine + * electronic devices such as echo sounder, sonars, anemometer (wind speed and direction), + * gyrocompass, autopilot, GPS receivers and many other types of instruments. + * It has been defined by, and is controlled by, the U.S.-based National Marine + * Electronics Association. + * The NMEA 0183 standard uses a simple ASCII, serial communications protocol + * that defines how data is transmitted in a "sentence" from one "talker" + * to multiple "listeners" at a time. + * At the application layer, the standard also defines the contents of each sentence + * (message) type so that all listeners can parse messages accurately. + * + * + * \author Daniele Basile + * + * notest:avr + */ + +#include "nmea.h" + +#include "cfg/cfg_nmea.h" + +#include + +#define LOG_LEVEL NMEA_LOG_LEVEL +#define LOG_FORMAT NMEA_LOG_FORMAT +#include + +#include + +#include +#include +#include +#include + +/* + * Make conversion from one string to int. + * + * You can specify the precision if the string is a float + * number. The result is an int multiplied to 10^precision. + */ +static uint32_t tokenToInt(const char *s, int precision) +{ + uint32_t num = 0; + bool sep_found = false; + int i; + + if (!s) + return 0; + + for(i = 0; i < NMEAP_MAX_SENTENCE_LENGTH; i++) + { + char c = *s++; + + if (c == '.') + { + sep_found = true; + continue; + } + + if (c == '\0' || !isdigit(c) || (precision == 0 && sep_found)) + break; + + if (sep_found) + precision--; + + num *= 10; + num += c - '0'; + } + + while (precision--) + num *= 10; + + return num; +} + +/* + * Convert a string to micro degree. + */ +static udegree_t convertToDegree(const char *str) +{ + uint32_t dec; + uint32_t deg; + uint32_t min; + + if (*str == 0) + return 0; + + dec = tokenToInt(str, 4); + deg = dec / 1000000; + min = dec - deg * 1000000; + dec = deg * 1000000 + ((min * 5) + 1) / 3; + + return dec; +} + +/* + * Retun latitude in micro degree from a string. + */ +static udegree_t nmea_latitude(const char *plat, const char *phem) +{ + int ns; + + if (*phem == 0) + return 0; + + /* north lat is +, south lat is - */ + ns = (*phem == 'N') ? 1 : -1; + + + return ns * convertToDegree(plat); +} + +/* + * Retun longitude in micro degree from a string. + */ +static udegree_t nmea_longitude(const char *plot, const char *phem) +{ + int ew; + + if (*phem == 0) + return 0; + + /* west long is negative, east long is positive */ + ew = (*phem == 'E') ? 1 : -1; + + return ew * convertToDegree(plot); +} + +/* + * Return altitude in meter from a string. + * + */ +static int32_t nmea_altitude(const char *palt, const char *punits) +{ + int32_t alt; + + if (*palt == 0) + return 0; + + alt = atoi(palt); + + if (*punits == 'F') + { + /* convert to feet */ + /* alt = alt * 3.2808399 */ + alt = alt * 3 + /* 3.0 */ + (alt >> 2) + /* 0.25 */ + (alt >> 6) + /* 0.015625 */ + (alt >> 7) + /* 0.0078125 */ + (alt >> 8); /* 0,00390625 */ + + } + + return alt; +} + +/* + * Convert time and date stamp string to unix time. + */ +static time_t timestampToSec(uint32_t time_stamp, uint32_t date_stamp) +{ + struct tm t; + uint16_t msec; + uint16_t tmr[3]; + uint16_t date[3]; + + memset(&t, 0, sizeof(t)); + memset(&tmr, 0, sizeof(tmr)); + memset(&date, 0, sizeof(date)); + + LOG_INFO("time_s[%lu],date[%lu]\n", (long)time_stamp, (long)date_stamp); + uint32_t res = time_stamp / 1000; + uint32_t all = time_stamp; + msec = all - res * 1000; + + for (int i = 0; i < 3; i++) + { + all = res; + res = all / 100; + tmr[i] = all - res * 100; + LOG_INFO("t[%d]%d\n", tmr[i],i); + } + + t.tm_sec = tmr[0] + (ROUND_UP(msec, 1000) / 1000); + t.tm_min = tmr[1]; + t.tm_hour = tmr[2]; + //If we do not have refence data, we set 1/1/1970 as default + t.tm_mday = 1; + t.tm_mon = 0; + t.tm_year = 70; + + if (date_stamp) + { + res = all = date_stamp; + for (int i = 0; i < 3; i++) + { + all = res; + res = all / 100; + date[i] = all - res * 100; + LOG_INFO("d[%d]%d\n", date[i],i); + } + t.tm_mday = date[2]; + t.tm_mon = date[1] - 1; // time struct count month from 0 to 11; + // we should specify the number of years from 1900, but the year field + // is only two digits, so we add 100 (2000 - 1900).. + t.tm_year = date[0] + 100; + } + LOG_INFO("times=%d,%d,%d,%d,%d,%d\n",t.tm_sec, t.tm_min, t.tm_hour, t.tm_year, t.tm_mon, t.tm_mday); + + return mktime(&t); +} + +/** + * Callout example for GGA data + */ +void gpgga_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaGga *gga = (NmeaGga *)data; + LOG_INFO("Found GPGGA message %ld %ld %d %lu %d %d %d %d\n", + (long)gga->latitude, + (long)gga->longitude, + gga->altitude, + gga->time, + gga->satellites, + gga->quality, + gga->hdop, + gga->geoid); + ); +} + +/** + * Callout example for RMC + */ +void gprmc_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaRmc *rmc = (NmeaRmc *)data; + + LOG_INFO("Found GPRMC message %lu %c %ld %ld %d %d %d\n", + rmc->time, + rmc->warn, + (long)rmc->latitude, + (long)rmc->longitude, + rmc->speed, + rmc->course, + rmc->mag_var); + ); +} + +/** + * Callout example for GSV data + */ +void gpgsv_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaGsv *gsv = (NmeaGsv *)data; + + LOG_INFO("Found GPGSV message %d %d %d\n", gsv->tot_message, gsv->message_num, gsv->tot_svv); + + for (int i = 0; i < 4; i++) + LOG_INFO("%d %d %d %d\n", gsv->info[i].sv_prn, gsv->info[i].elevation, gsv->info[i].azimut, gsv->info[i].snr); + ); +} + +/** + * Callout example for VTG data + */ +void gpvtg_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaVtg *vtg = (NmeaVtg *)data; + LOG_INFO("Found GPVTG message %d %d %d\n", vtg->track_good, vtg->knot_speed, vtg->km_speed); + ); +} + + + +/** + * standard GPGGA sentence parser + */ +int nmea_gpgga(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + /* + * get pointer to sentence data + */ + NmeaGga *gga = (NmeaGga *)sentence->data; + + ASSERT(gga); + ASSERT(context->tokens >= 12); + + gga->latitude = nmea_latitude(context->token[2],context->token[3]); + gga->longitude = nmea_longitude(context->token[4],context->token[5]); + gga->altitude = nmea_altitude(context->token[9],context->token[10]); + gga->time = timestampToSec(tokenToInt(context->token[1], 3), 0); + gga->satellites = atoi(context->token[7]); + gga->quality = atoi(context->token[6]); + gga->hdop = tokenToInt(context->token[8], 1); + gga->geoid = nmea_altitude(context->token[11],context->token[12]); + + /* + * if the sentence has a callout, call it + */ + + if (sentence->callout != 0) + (*sentence->callout)(context, gga, context->user_data); + + return NMEA_GPGGA; +} + +/** + * standard GPRMCntence parser + */ +int nmea_gprmc(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + + /* + * get pointer to sentence data + */ + NmeaRmc *rmc = (NmeaRmc *)sentence->data; + + ASSERT(rmc); + ASSERT(context->tokens >= 10); + + /* + * extract data from the tokens + */ + rmc->time = timestampToSec(tokenToInt(context->token[1], 3), tokenToInt(context->token[9], 0)); + rmc->warn = *context->token[2]; + rmc->latitude = nmea_latitude(context->token[3],context->token[4]); + rmc->longitude = nmea_longitude(context->token[5],context->token[6]); + rmc->speed = atoi(context->token[7]); + rmc->course = atoi(context->token[8]); + rmc->mag_var = atoi(context->token[10]); + + if (sentence->callout != 0) + (*sentence->callout)(context, rmc, context->user_data); + + return NMEA_GPRMC; +} + + +/** + * standard GPVTG sentence parser + */ +int nmea_gpvtg(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + + /* + * get pointer to sentence data + */ + NmeaVtg *vtg = (NmeaVtg *)sentence->data; + + ASSERT(vtg); + ASSERT(context->tokens >= 7); + + /* + * extract data from the tokens + */ + vtg->track_good = atoi(context->token[1]); + vtg->knot_speed = atoi(context->token[5]); + vtg->km_speed = atoi(context->token[7]); + + /* + * if the sentence has a callout, call it + */ + if (sentence->callout != 0) + (*sentence->callout)(context, vtg, context->user_data); + + return NMEA_GPVTG; +} + +/** + * standard GPGDSV sentence parser + */ +int nmea_gpgsv(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + /* + * get pointer to sentence data + */ + NmeaGsv *gsv = (NmeaGsv *)sentence->data; + + + /* + * extract data from the tokens + */ + gsv->tot_message = atoi(context->token[1]); + gsv->message_num = atoi(context->token[2]); + gsv->tot_svv = atoi(context->token[3]); + + // Fill remaning member until we have token + int j = 0; + for (int i = 4; i < context->tokens - 3; i += 4, j++) + { + + gsv->info[j].sv_prn = atoi(context->token[i]); + gsv->info[j].elevation = atoi(context->token[i + 1]); + gsv->info[j].azimut = atoi(context->token[i + 2]); + gsv->info[j].snr = atoi(context->token[i + 3]); + } + + /* + * if the sentence has a callout, call it + */ + if (sentence->callout != 0) + (*sentence->callout)(context, gsv, context->user_data); + + return NMEA_GPGSV; +} + + +/** + * Parse NMEA sentence from a channel. + */ +void nmea_poll(nmeap_context_t *context, KFile *channel) +{ + int c, e; + while ((c = kfile_getc(channel)) != EOF) + nmeap_parse(context, c); + + if ((e = kfile_error(channel))) + { + LOG_ERR("ch error [%0X]\n", e); + kfile_clearerr(channel); + } +} + diff --git a/2.5/bertos/net/nmea.h b/2.5/bertos/net/nmea.h new file mode 100644 index 00000000..f0a8b3de --- /dev/null +++ b/2.5/bertos/net/nmea.h @@ -0,0 +1,151 @@ +/** + * \file + * + * \brief NMEA Parser. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "nmea" + * $WIZ$ module_configuration = "bertos/cfg/cfg_nmea.h" + * $WIZ$ module_depends = "kfile", "nmeap01" + */ + +#ifndef NET_NMEA_H +#define NET_NMEA_H + +#include "cfg/cfg_nmea.h" + +#include + +#include + +#include + +/* + * Implemented NMEA parser strings. + */ +#define NMEA_GPGGA 1 // GGA MESSAGE ID +#define NMEA_GPRMC 2 // RMC MESSAGE ID +#define NMEA_GPVTG 3 // VTG MESSAGE ID +#define NMEA_GPGSV 4 // GSV MESSAGE ID + +// Standart type to rappresent fiels. +typedef int32_t udegree_t; // Micro degrees +typedef int32_t mdegree_t; // Milli degrees +typedef int16_t degree_t; // Degrees + + +/** + * Global Positioning System Fix Data. + * Extracted data from a GGA message + * + * Note: time member contains the seconds elapsed from 00:00:00 1/1/1970, + * because from nmea sentence we read only the time of UTC position, we + * have not any reference of date (day, month and year) so time is referred to + * the start of unix time. + */ +typedef struct NmeaGga +{ + udegree_t latitude; /* Latitude (micro degree) */ + udegree_t longitude; /* Longitude (micro degree) */ + int32_t altitude; /* Altitude (Meter) */ + time_t time; /* UTC of position (Unix time) */ + uint16_t satellites; /* Satellites are in view */ + uint16_t quality; /* Fix Quality: 0 = Invalid; 1 = GPS fix; 2 = DGPS fix; */ + uint16_t hdop; /* Relative accuracy of horizontal position (hdop * 10) */ + int16_t geoid; /* Height of geoid above WGS84 ellipsoid (Meter) */ +} NmeaGga; + +/** + * Recommended minimum specific GPS/Transit data. + * Extracted data from an RMC message + * + * Note: RMC sentences contain also date stamp so, time contains real seconds elapsed + * from 0:00:00 1/1/1970. + */ +typedef struct NmeaRmc +{ + time_t time; /* UTC of position (Unix time) */ + char warn; /* Navigation receiver warning A = OK, V = warning */ + udegree_t latitude; /* Latitude (micro degree) */ + udegree_t longitude; /* Longitude (micro degree) */ + uint16_t speed; /* Speed over ground (knots) */ + degree_t course; /* Track made good in degrees True (degree) */ + degree_t mag_var; /* Magnetic variation degrees (degree) */ +} NmeaRmc; + +/** + * Extracted data from an vtg message + */ +typedef struct NmeaVtg +{ + degree_t track_good; /* True track made good (degree) */ + uint16_t knot_speed; /* Speed over ground (knots) */ + uint16_t km_speed; /* Speed over ground in kilometers/hour */ +} NmeaVtg; + +/** + * Extracted data from an gsv message + */ +struct SvInfo +{ + uint16_t sv_prn; /* SV PRN number */ + degree_t elevation; /* Elevation in degrees, 90 maximum */ + degree_t azimut; /* Azimuth, degrees from true north, 000 to 359 */ + uint16_t snr; /* SNR, 00-99 dB (null when not tracking) */ +}; + +typedef struct NmeaGsv +{ + uint16_t tot_message; /* Total number of messages of this type in this cycle */ + uint16_t message_num; /* Message number */ + uint16_t tot_svv; /* Total number of SVs in view */ + struct SvInfo info[4]; /* Stanrd gsv nmea report up to 4 sv info */ +} NmeaGsv; + +void nmea_poll(nmeap_context_t *context, KFile *channel); + +int nmea_gpgsv(nmeap_context_t *context, nmeap_sentence_t *sentence); +int nmea_gpvtg(nmeap_context_t *context, nmeap_sentence_t *sentence); +int nmea_gprmc(nmeap_context_t *context, nmeap_sentence_t *sentence); +int nmea_gpgga(nmeap_context_t *context, nmeap_sentence_t *sentence); + +// Example of callout +void gpgga_callout(nmeap_context_t *context, void *data, void *user_data); +void gprmc_callout(nmeap_context_t *context, void *data, void *user_data); +void gpgsv_callout(nmeap_context_t *context, void *data, void *user_data); +void gpvtg_callout(nmeap_context_t *context, void *data, void *user_data); + +int nmea_testSetup(void); +int nmea_testTearDown(void); +int nmea_testRun(void); + +#endif /* NET_NMEA_H */ diff --git a/2.5/bertos/net/nmea_test.c b/2.5/bertos/net/nmea_test.c new file mode 100644 index 00000000..62927746 --- /dev/null +++ b/2.5/bertos/net/nmea_test.c @@ -0,0 +1,1034 @@ +/** + * \file + * + * + * \brief NMEA parser test. + * + * \author Daniele Basile + * + * notest:avr + */ + +#include "nmea.h" + +#include + +#include +#define LOG_LEVEL 3 +#define LOG_FORMAT NMEA_LOG_FORMAT +#include + +#include + +#include //strncmp + +static nmeap_context_t nmea; /* parser context */ +static NmeaRmc rmc; +static NmeaGga gga; +static NmeaGsv gsv; +static NmeaVtg vtg; + +static KFileMem mem; + +static uint8_t nmea_test[] = +{ +/* For these first sentences, we have a test_vector */ +"$GPRMC,170525.949,A,4351.0843,N,01108.8687,E,0.00,237.67,051009,,,A*61\r\n" /* acquired */ +"$GPVTG,237.67,T,,,0.00,N,0.00,K,A*77\r\n" /* acquired */ +"$GPGSV,3,1,09,3,78,302,37,6,87,031,,7,05,292,37,14,05,135,*48\r\n" /* acquired */ +"$GPGGA,170527.949,4351.0842,N,01108.8685,E,1,05,02.6,57.4,M,45.2,M,,*5C\r\n" /* acquired */ +"$GPGGA,170527.949,4351.0842,N,01108.8685,E,1,05,02.6,-57.4,M,45.2,M,,*71\r\n" /* acquired */ +"$GPGGA,170527.949,4351.0842,S,01108.8685,W,1,05,02.6,-57.4,M,-45.2,M,,*53\r\n" + +"$GPGGA,100019.604,4351.1480,N,01108.8750,E,1,03,16.8,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100019.604,A,4351.1480,N,01108.8750,E,2.03,134.29,131009,,,A*6F\r\n" +"$GPVTG,134.29,T,,,2.03,N,3.75,K,A*7D\r\n" +"$GPGGA,100020.604,4351.1491,N,01108.8751,E,1,03,16.8,0.0,M,45.2,M,,*6F\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,68,313,*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100020.604,A,4351.1491,N,01108.8751,E,2.11,134.29,131009,,,A*67\r\n" +"$GPVTG,134.29,T,,,2.11,N,3.91,K,A*74\r\n" +"$GPGGA,100021.603,4351.1486,N,01108.8751,E,1,03,16.8,0.0,M,45.2,M,,*6F\r\n" +"$GPRMC,100021.603,A,4351.1486,N,01108.8751,E,2.18,134.29,131009,,,A*6E\r\n" +"$GPVTG,134.29,T,,,2.18,N,4.05,K,A*77\r\n" +"$GPGGA,100022.603,4351.1470,N,01108.8750,E,1,03,16.8,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100022.603,A,4351.1470,N,01108.8750,E,2.17,134.29,131009,,,A*6A\r\n" +"$GPVTG,134.29,T,,,2.17,N,4.01,K,A*7C\r\n" +"$GPGGA,100023.603,4351.1453,N,01108.8747,E,1,03,16.8,0.0,M,45.2,M,,*62\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,33,29,42,214,36,30,68,313,*77\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100023.603,A,4351.1453,N,01108.8747,E,2.28,134.29,131009,,,A*60\r\n" +"$GPVTG,134.29,T,,,2.28,N,4.22,K,A*71\r\n" +"$GPGGA,100024.603,4351.1450,N,01108.8746,E,1,03,16.8,0.0,M,45.2,M,,*67\r\n" +"$GPRMC,100024.603,A,4351.1450,N,01108.8746,E,2.28,134.29,131009,,,A*65\r\n" +"$GPVTG,134.29,T,,,2.28,N,4.22,K,A*71\r\n$GPGG25.603,4351.1442,N,01108.8745,E,1,03,16.8,0.0,M,45.2,M,,*66\n" +"$GPRMC,100025.603,A,4351.1442,N,01108.8745,E,2.40,134.29,131009,,,A*6A\r\n" +"$GPVTG,134.29,T,,,2.40,N,4.45,K,A*7E\r\n" +"$GPGGA,100026.602,4351.1433,N,01108.8744,E,1,03,16.8,0.0,M,45.2,M,,*63\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,33,29,42,214,36,30,68,313,*77\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100026.602,A,4351.1433,N,01108.8744,E,2.48,187.14,131009,,,A*61\r\n" +"$GPVTG,187.14,T,,,2.48,N,4.59,K,A*7D\r\n" +"$GPGGA,100027.602,4351.1425,N,01108.8743,E,1,03,16.8,0.0,M,45.2,M,,*62\r\n" +"$GPRMC,100027.602,A,4351.1425,N,01108.8743,E,2.39,185.89,131009,,,A*60\r\n" +"$GPVTG,185.89,T,,,2.39,N,4.42,K,A*77\r\n" +"$GPGGA,100028.602,4351.1424,N,01108.8743,E,1,03,16.8,0.0,M,45.2,M,,*6C\r\n" +"$GPRMC,100028.602,A,4351.1424,N,01108.8743,E,2.18,187.33,131009,,,A*6E\r\n" +"$GPVTG,187.33,T,,,2.18,N,4.04,K,A*75\r\n" +"$GPGGA,100029.602,4351.1399,N,01108.8739,E,1,03,16.8,0.0,M,45.2,M,,*61\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,68,313,*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100029.602,A,4351.1399,N,01108.8739,E,1.98,188.78,131009,,,A*68\r\n" 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+"$GPGGA,100220.578,4351.1264,N,01108.8712,E,1,03,17.4,-0.0,M,45.2,M,,*4E\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100220.578,A,4351.1264,N,01108.8712,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100221.577,4351.1265,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100221.577,A,4351.1265,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100222.577,4351.1266,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100222.577,A,4351.1266,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100223.577,4351.1267,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*47\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,36*72\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100223.577,A,4351.1267,N,01108.8714,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100224.577,4351.1271,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100224.577,A,4351.1271,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100225.577,4351.1273,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100225.577,A,4351.1273,N,01108.8714,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100226.576,4351.1274,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*41\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,35*71\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100226.576,A,4351.1274,N,01108.8714,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100227.576,4351.1274,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100227.576,A,4351.1274,N,01108.8714,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100228.576,4351.1276,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100228.576,A,4351.1276,N,01108.8715,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100229.576,4351.1280,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100229.576,A,4351.1280,N,01108.8715,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100230.576,4351.1282,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100230.576,A,4351.1282,N,01108.8715,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100231.575,4351.1294,N,01108.8718,E,1,03,17.4,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100231.575,A,4351.1294,N,01108.8718,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100232.575,4351.1295,N,01108.8718,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100232.575,A,4351.1295,N,01108.8718,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100233.575,4351.1297,N,01108.8718,E,1,03,17.4,0.0,M,45.2,M,,*6A\r\n" +"$GPRMC,100233.575,A,4351.1297,N,01108.8718,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100234.575,4351.1301,N,01108.8719,E,1,03,17.4,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100234.575,A,4351.1301,N,01108.8719,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100235.574,4351.1305,N,01108.8719,E,1,03,17.4,-0.0,M,45.2,M,,*4B\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100235.574,A,4351.1305,N,01108.8719,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100236.574,4351.1308,N,01108.8720,E,1,03,17.4,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100236.574,A,4351.1308,N,01108.8720,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100237.574,4351.1311,N,01108.8720,E,1,03,17.4,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100237.574,A,4351.1311,N,01108.8720,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100238.574,4351.1314,N,01108.8721,E,1,03,17.4,-0.0,M,45.2,M,,*4D\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GP351.1314,N,01108.8721,E,0.00,187.49,131009,,,A*69\r" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100239.574,4351.1316,N,01108.8722,E,1,03,17.4,-0.0,M,45.2,M,,*4D\r\n" +}; + +static NmeaGga gga_test1 = +{ + .latitude = 43851403, + .longitude = 11147808, + .altitude = 57, + .time = 57928, + .satellites = 5, + .quality = 1, + .hdop = 26, + .geoid = 45, +}; + +static NmeaGga gga_test2 = +{ + .latitude = 43851403, + .longitude = 11147808, + .altitude = -57, + .time = 57928, + .satellites = 5, + .quality = 1, + .hdop = 26, + .geoid = 45, +}; + +static NmeaGga gga_test3 = +{ + .latitude = -43851403, + .longitude = -11147808, + .altitude = -57, + .time = 57928, + .satellites = 5, + .quality = 1, + .hdop = 26, + .geoid = -45, +}; + +static NmeaRmc rmc_test = +{ + .time = 1254758726, + .warn = 'A', + .latitude = 43851405, + .longitude = 11147812, + .speed = 0, + .course = 237, + .mag_var = 0 +}; + + +static NmeaVtg vtg_test = +{ + .track_good = 237, + .knot_speed = 0, + .km_speed = 0 +}; + +static NmeaGsv gsv_test = +{ + .tot_message = 3, + .message_num = 1, + .tot_svv = 9, + .info = + { + { 3, 78, 302, 37 }, + { 6, 87, 31, 0 }, + { 7, 5, 292, 37 }, + { 14, 5, 135, 0 } + + } +}; + +typedef struct NmeaTest +{ + int test_num; + void *val; +} NmeaTest; + +NmeaTest test_vector[] = +{ + {1, &rmc_test}, + {2, &vtg_test}, + {3, &gsv_test}, + {4, &gga_test1}, + {5, &gga_test2}, + {6, &gga_test3}, +}; + + +static void *find_test(int n) +{ + for (unsigned i=0; i < countof(test_vector); i++) + if (n == test_vector[i].test_num) + return test_vector[i].val; + + return NULL; +} + +#define TOT_GOOD_SENTENCE_NUM 665 +#define TOT_SENTENCE_NUM 731 + +static int tot_sentence_parsed = 0; + +/** + * do something with the GGA data + */ +static void gpgga_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaGga *gga = (NmeaGga *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, gga, sizeof(*gga)) == 0); + + LOG_INFO("[%d]found GPGGA message %ld %ld %ld %lu %d %d %d %d\n",tot_sentence_parsed, + (long)gga->latitude, + (long)gga->longitude, + (long)gga->altitude, + gga->time, + gga->satellites, + gga->quality, + gga->hdop, + gga->geoid); +} + +/** + * do something with the RMC data + */ +static void gprmc_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaRmc *rmc = (NmeaRmc *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, rmc, sizeof(*rmc)) == 0); + + LOG_INFO("[%d]found GPRMC Message %lu %c %ld %ld %d %d %d\n",tot_sentence_parsed, + rmc->time, + rmc->warn, + (long)rmc->latitude, + (long)rmc->longitude, + rmc->speed, + rmc->course, + rmc->mag_var); +} + +/** + * do something with the GSV data + */ +static void gpgsv_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaGsv *gsv = (NmeaGsv *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, gsv, sizeof(*gsv)) == 0); + + LOG_INFO("[%d]Found GPGSV message %d %d %d\n",tot_sentence_parsed, + gsv->tot_message, + gsv->message_num, + gsv->tot_svv); + + for (int i = 0; i < 4; i++) + LOG_INFO("\t[%d]%d %d %d %d\n", i, gsv->info[i].sv_prn, gsv->info[i].elevation, gsv->info[i].azimut, gsv->info[i].snr); +} + +/** + * do something with the VTG data + */ +static void gpvtg_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaVtg *vtg = (NmeaVtg *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, vtg, sizeof(*vtg)) == 0); + + LOG_INFO("[%d]Found GPVTG message %d %d %d\n",tot_sentence_parsed, + vtg->track_good, + vtg->knot_speed, + vtg->km_speed); +} + +int nmea_testSetup(void) +{ + kdbg_init(); + + kfilemem_init(&mem, nmea_test, sizeof(nmea_test)); + LOG_INFO("Init test buffer..done.\n"); + + nmeap_init(&nmea, NULL); + nmeap_addParser(&nmea, "GPGGA", nmea_gpgga, gpgga_callout_test, &gga); + nmeap_addParser(&nmea, "GPRMC", nmea_gprmc, gprmc_callout_test, &rmc); + nmeap_addParser(&nmea, "GPGSV", nmea_gpgsv, gpgsv_callout_test, &gsv); + nmeap_addParser(&nmea, "GPVTG", nmea_gpvtg, gpvtg_callout_test, &vtg); + + return 0; +} + +int nmea_testTearDown(void) +{ + return 0; +} + +int nmea_testRun(void) +{ + for (int i = 0; i < TOT_SENTENCE_NUM; i++) + nmea_poll(&nmea, &mem.fd); + + kprintf("tot sentence %d\n", tot_sentence_parsed); + + if (tot_sentence_parsed != TOT_GOOD_SENTENCE_NUM) + { + LOG_ERR("Incorrect number of parsed sentence.\n"); + return -1; + } + + + return 0; +} + +TEST_MAIN(nmea); + diff --git a/2.5/bertos/net/nmeap/COPYING b/2.5/bertos/net/nmeap/COPYING new file mode 100644 index 00000000..9c542461 --- /dev/null +++ b/2.5/bertos/net/nmeap/COPYING @@ -0,0 +1,31 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License: + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the distribution. + * Neither the name of the copyright holders nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + diff --git a/2.5/bertos/net/nmeap/Doxyfile b/2.5/bertos/net/nmeap/Doxyfile new file mode 100644 index 00000000..aae008ec --- /dev/null +++ b/2.5/bertos/net/nmeap/Doxyfile @@ -0,0 +1,1153 @@ +# Doxyfile 1.3.8 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project +# +# All text after a hash (#) is considered a comment and will be ignored +# The format is: +# TAG = value [value, ...] +# For lists items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (" ") + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded +# by quotes) that should identify the project. + +PROJECT_NAME = NMEAP + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. +# This could be handy for archiving the generated documentation or +# if some version control system is used. + +PROJECT_NUMBER = 0.1 + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = doc + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create +# 4096 sub-directories (in 2 levels) under the output directory of each output +# format and will distribute the generated files over these directories. +# Enabling this option can be useful when feeding doxygen a huge amount of source +# files, where putting all generated files in the same directory would otherwise +# cause performance problems for the file system. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# The default language is English, other supported languages are: +# Brazilian, Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, +# Dutch, Finnish, French, German, Greek, Hungarian, Italian, Japanese, +# Japanese-en (Japanese with English messages), Korean, Korean-en, Norwegian, +# Polish, Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, +# Swedish, and Ukrainian. + +OUTPUT_LANGUAGE = English + +# This tag can be used to specify the encoding used in the generated output. +# The encoding is not always determined by the language that is chosen, +# but also whether or not the output is meant for Windows or non-Windows users. +# In case there is a difference, setting the USE_WINDOWS_ENCODING tag to YES +# forces the Windows encoding (this is the default for the Windows binary), +# whereas setting the tag to NO uses a Unix-style encoding (the default for +# all platforms other than Windows). + +USE_WINDOWS_ENCODING = NO + +# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will +# include brief member descriptions after the members that are listed in +# the file and class documentation (similar to JavaDoc). +# Set to NO to disable this. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend +# the brief description of a member or function before the detailed description. +# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator +# that is used to form the text in various listings. Each string +# in this list, if found as the leading text of the brief description, will be +# stripped from the text and the result after processing the whole list, is used +# as the annotated text. Otherwise, the brief description is used as-is. If left +# blank, the following values are used ("$name" is automatically replaced with the +# name of the entity): "The $name class" "The $name widget" "The $name file" +# "is" "provides" "specifies" "contains" "represents" "a" "an" "the" + +ABBREVIATE_BRIEF = + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# Doxygen will generate a detailed section even if there is only a brief +# description. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited +# members of a class in the documentation of that class as if those members were +# ordinary class members. Constructors, destructors and assignment operators of +# the base classes will not be shown. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full +# path before files name in the file list and in the header files. If set +# to NO the shortest path that makes the file name unique will be used. + +FULL_PATH_NAMES = NO + +# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag +# can be used to strip a user-defined part of the path. Stripping is +# only done if one of the specified strings matches the left-hand part of +# the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the +# path to strip. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of +# the path mentioned in the documentation of a class, which tells +# the reader which header file to include in order to use a class. +# If left blank only the name of the header file containing the class +# definition is used. Otherwise one should specify the include paths that +# are normally passed to the compiler using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter +# (but less readable) file names. This can be useful is your file systems +# doesn't support long names like on DOS, Mac, or CD-ROM. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen +# will interpret the first line (until the first dot) of a JavaDoc-style +# comment as the brief description. If set to NO, the JavaDoc +# comments will behave just like the Qt-style comments (thus requiring an +# explicit @brief command for a brief description. + +JAVADOC_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen +# treat a multi-line C++ special comment block (i.e. a block of //! or /// +# comments) as a brief description. This used to be the default behaviour. +# The new default is to treat a multi-line C++ comment block as a detailed +# description. Set this tag to YES if you prefer the old behaviour instead. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the DETAILS_AT_TOP tag is set to YES then Doxygen +# will output the detailed description near the top, like JavaDoc. +# If set to NO, the detailed description appears after the member +# documentation. + +DETAILS_AT_TOP = NO + +# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented +# member inherits the documentation from any documented member that it +# re-implements. + +INHERIT_DOCS = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. + +DISTRIBUTE_GROUP_DOC = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. +# Doxygen uses this value to replace tabs by spaces in code fragments. + +TAB_SIZE = 8 + +# This tag can be used to specify a number of aliases that acts +# as commands in the documentation. An alias has the form "name=value". +# For example adding "sideeffect=\par Side Effects:\n" will allow you to +# put the command \sideeffect (or @sideeffect) in the documentation, which +# will result in a user-defined paragraph with heading "Side Effects:". +# You can put \n's in the value part of an alias to insert newlines. + +ALIASES = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. +# For instance, some of the names that are used will be different. The list +# of all members will be omitted, etc. + +OPTIMIZE_OUTPUT_FOR_C = YES + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java sources +# only. Doxygen will then generate output that is more tailored for Java. +# For instance, namespaces will be presented as packages, qualified scopes +# will look different, etc. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the SUBGROUPING tag to YES (the default) to allow class member groups of +# the same type (for instance a group of public functions) to be put as a +# subgroup of that type (e.g. under the Public Functions section). Set it to +# NO to prevent subgrouping. Alternatively, this can be done per class using +# the \nosubgrouping command. + +SUBGROUPING = YES + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. +# Private class members and static file members will be hidden unless +# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES + +EXTRACT_ALL = YES + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class +# will be included in the documentation. + +EXTRACT_PRIVATE = YES + +# If the EXTRACT_STATIC tag is set to YES all static members of a file +# will be included in the documentation. + +EXTRACT_STATIC = YES + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) +# defined locally in source files will be included in the documentation. +# If set to NO only classes defined in header files are included. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local +# methods, which are defined in the implementation section but not in +# the interface are included in the documentation. +# If set to NO (the default) only methods in the interface are included. + +EXTRACT_LOCAL_METHODS = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all +# undocumented members of documented classes, files or namespaces. +# If set to NO (the default) these members will be included in the +# various overviews, but no documentation section is generated. +# This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. +# If set to NO (the default) these classes will be included in the various +# overviews. This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all +# friend (class|struct|union) declarations. +# If set to NO (the default) these declarations will be included in the +# documentation. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any +# documentation blocks found inside the body of a function. +# If set to NO (the default) these blocks will be appended to the +# function's detailed documentation block. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation +# that is typed after a \internal command is included. If the tag is set +# to NO (the default) then the documentation will be excluded. +# Set it to YES to include the internal documentation. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate +# file names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# and Mac users are advised to set this option to NO. + +CASE_SENSE_NAMES = NO + +# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen +# will show members with their full class and namespace scopes in the +# documentation. If set to YES the scope will be hidden. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen +# will put a list of the files that are included by a file in the documentation +# of that file. + +SHOW_INCLUDE_FILES = YES + +# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] +# is inserted in the documentation for inline members. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen +# will sort the (detailed) documentation of file and class members +# alphabetically by member name. If set to NO the members will appear in +# declaration order. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the +# brief documentation of file, namespace and class members alphabetically +# by member name. If set to NO (the default) the members will appear in +# declaration order. + +SORT_BRIEF_DOCS = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be +# sorted by fully-qualified names, including namespaces. If set to +# NO (the default), the class list will be sorted only by class name, +# not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the +# alphabetical list. + +SORT_BY_SCOPE_NAME = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or +# disable (NO) the todo list. This list is created by putting \todo +# commands in the documentation. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or +# disable (NO) the test list. This list is created by putting \test +# commands in the documentation. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or +# disable (NO) the bug list. This list is created by putting \bug +# commands in the documentation. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or +# disable (NO) the deprecated list. This list is created by putting +# \deprecated commands in the documentation. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional +# documentation sections, marked by \if sectionname ... \endif. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines +# the initial value of a variable or define consists of for it to appear in +# the documentation. If the initializer consists of more lines than specified +# here it will be hidden. Use a value of 0 to hide initializers completely. +# The appearance of the initializer of individual variables and defines in the +# documentation can be controlled using \showinitializer or \hideinitializer +# command in the documentation regardless of this setting. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated +# at the bottom of the documentation of classes and structs. If set to YES the +# list will mention the files that were used to generate the documentation. + +SHOW_USED_FILES = YES + +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated +# by doxygen. Possible values are YES and NO. If left blank NO is used. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated by doxygen. Possible values are YES and NO. If left blank +# NO is used. + +WARNINGS = YES + +# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings +# for undocumented members. If EXTRACT_ALL is set to YES then this flag will +# automatically be disabled. + +WARN_IF_UNDOCUMENTED = YES + +# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some +# parameters in a documented function, or documenting parameters that +# don't exist or using markup commands wrongly. + +WARN_IF_DOC_ERROR = YES + +# The WARN_FORMAT tag determines the format of the warning messages that +# doxygen can produce. The string should contain the $file, $line, and $text +# tags, which will be replaced by the file and line number from which the +# warning originated and the warning text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning +# and error messages should be written. If left blank the output is written +# to stderr. + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT = inc/nmeap.h + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank the following patterns are tested: +# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp +# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm + +FILE_PATTERNS = *.h + +# The RECURSIVE tag can be used to turn specify whether or not subdirectories +# should be searched for input files as well. Possible values are YES and NO. +# If left blank NO is used. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories +# that are symbolic links (a Unix filesystem feature) are excluded from the input. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. + +EXCLUDE_PATTERNS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or +# directories that contain example code fragments that are included (see +# the \include command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank all files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude +# commands irrespective of the value of the RECURSIVE tag. +# Possible values are YES and NO. If left blank NO is used. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or +# directories that contain image that are included in the documentation (see +# the \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command , where +# is the value of the INPUT_FILTER tag, and is the name of an +# input file. Doxygen will then use the output that the filter program writes +# to standard output. If FILTER_PATTERNS is specified, this tag will be +# ignored. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: +# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further +# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER +# is applied to all files. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will be used to filter the input files when producing source +# files to browse (i.e. when SOURCE_BROWSER is set to YES). + +FILTER_SOURCE_FILES = NO + +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will +# be generated. Documented entities will be cross-referenced with these sources. +# Note: To get rid of all source code in the generated output, make sure also +# VERBATIM_HEADERS is set to NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body +# of functions and classes directly in the documentation. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct +# doxygen to hide any special comment blocks from generated source code +# fragments. Normal C and C++ comments will always remain visible. + +STRIP_CODE_COMMENTS = NO + +# If the REFERENCED_BY_RELATION tag is set to YES (the default) +# then for each documented function all documented +# functions referencing it will be listed. + +REFERENCED_BY_RELATION = YES + +# If the REFERENCES_RELATION tag is set to YES (the default) +# then for each documented function all documented entities +# called/used by that function will be listed. + +REFERENCES_RELATION = YES + +# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen +# will generate a verbatim copy of the header file for each class for +# which an include is specified. Set to NO to disable this. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index +# of all compounds will be generated. Enable this if the project +# contains a lot of classes, structs, unions or interfaces. + +ALPHABETICAL_INDEX = NO + +# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then +# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns +# in which this list will be split (can be a number in the range [1..20]) + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all +# classes will be put under the same header in the alphabetical index. +# The IGNORE_PREFIX tag can be used to specify one or more prefixes that +# should be ignored while generating the index headers. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES (the default) Doxygen will +# generate HTML output. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `html' will be used as the default path. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for +# each generated HTML page (for example: .htm,.php,.asp). If it is left blank +# doxygen will generate files with .html extension. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a personal HTML footer for +# each generated HTML page. If it is left blank doxygen will generate a +# standard footer. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading +# style sheet that is used by each HTML page. It can be used to +# fine-tune the look of the HTML output. If the tag is left blank doxygen +# will generate a default style sheet. Note that doxygen will try to copy +# the style sheet file to the HTML output directory, so don't put your own +# stylesheet in the HTML output directory as well, or it will be erased! + +HTML_STYLESHEET = + +# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, +# files or namespaces will be aligned in HTML using tables. If set to +# NO a bullet list will be used. + +HTML_ALIGN_MEMBERS = YES + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = + +# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can +# be used to specify the location (absolute path including file name) of +# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run +# the HTML help compiler on the generated index.hhp. + +HHC_LOCATION = + +# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag +# controls if a separate .chi index file is generated (YES) or that +# it should be included in the master .chm file (NO). + +GENERATE_CHI = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag +# controls whether a binary table of contents is generated (YES) or a +# normal table of contents (NO) in the .chm file. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members +# to the contents of the HTML help documentation and to the tree view. + +TOC_EXPAND = NO + +# The DISABLE_INDEX tag can be used to turn on/off the condensed index at +# top of each HTML page. The value NO (the default) enables the index and +# the value YES disables it. + +DISABLE_INDEX = NO + +# This tag can be used to set the number of enum values (range [1..20]) +# that doxygen will group on one line in the generated HTML documentation. + +ENUM_VALUES_PER_LINE = 4 + +# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be +# generated containing a tree-like index structure (just like the one that +# is generated for HTML Help). For this to work a browser that supports +# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, +# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are +# probably better off using the HTML help feature. + +GENERATE_TREEVIEW = NO + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be +# used to set the initial width (in pixels) of the frame in which the tree +# is shown. + +TREEVIEW_WIDTH = 250 + +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- + +# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will +# generate Latex output. + +GENERATE_LATEX = NO + +# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `latex' will be used as the default path. + +LATEX_OUTPUT = latex + +# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be +# invoked. If left blank `latex' will be used as the default command name. + +LATEX_CMD_NAME = latex + +# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to +# generate index for LaTeX. If left blank `makeindex' will be used as the +# default command name. + +MAKEINDEX_CMD_NAME = makeindex + +# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact +# LaTeX documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_LATEX = NO + +# The PAPER_TYPE tag can be used to set the paper type that is used +# by the printer. Possible values are: a4, a4wide, letter, legal and +# executive. If left blank a4wide will be used. + +PAPER_TYPE = a4wide + +# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX +# packages that should be included in the LaTeX output. + +EXTRA_PACKAGES = + +# The LATEX_HEADER tag can be used to specify a personal LaTeX header for +# the generated latex document. The header should contain everything until +# the first chapter. If it is left blank doxygen will generate a +# standard header. Notice: only use this tag if you know what you are doing! + +LATEX_HEADER = + +# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated +# is prepared for conversion to pdf (using ps2pdf). The pdf file will +# contain links (just like the HTML output) instead of page references +# This makes the output suitable for online browsing using a pdf viewer. + +PDF_HYPERLINKS = NO + +# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of +# plain latex in the generated Makefile. Set this option to YES to get a +# higher quality PDF documentation. + +USE_PDFLATEX = NO + +# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. +# command to the generated LaTeX files. This will instruct LaTeX to keep +# running if errors occur, instead of asking the user for help. +# This option is also used when generating formulas in HTML. + +LATEX_BATCHMODE = NO + +# If LATEX_HIDE_INDICES is set to YES then doxygen will not +# include the index chapters (such as File Index, Compound Index, etc.) +# in the output. + +LATEX_HIDE_INDICES = NO + +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- + +# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output +# The RTF output is optimized for Word 97 and may not look very pretty with +# other RTF readers or editors. + +GENERATE_RTF = NO + +# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `rtf' will be used as the default path. + +RTF_OUTPUT = rtf + +# If the COMPACT_RTF tag is set to YES Doxygen generates more compact +# RTF documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_RTF = NO + +# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated +# will contain hyperlink fields. The RTF file will +# contain links (just like the HTML output) instead of page references. +# This makes the output suitable for online browsing using WORD or other +# programs which support those fields. +# Note: wordpad (write) and others do not support links. + +RTF_HYPERLINKS = NO + +# Load stylesheet definitions from file. Syntax is similar to doxygen's +# config file, i.e. a series of assignments. You only have to provide +# replacements, missing definitions are set to their default value. + +RTF_STYLESHEET_FILE = + +# Set optional variables used in the generation of an rtf document. +# Syntax is similar to doxygen's config file. + +RTF_EXTENSIONS_FILE = + +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- + +# If the GENERATE_MAN tag is set to YES (the default) Doxygen will +# generate man pages + +GENERATE_MAN = NO + +# The MAN_OUTPUT tag is used to specify where the man pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `man' will be used as the default path. + +MAN_OUTPUT = man + +# The MAN_EXTENSION tag determines the extension that is added to +# the generated man pages (default is the subroutine's section .3) + +MAN_EXTENSION = .3 + +# If the MAN_LINKS tag is set to YES and Doxygen generates man output, +# then it will generate one additional man file for each entity +# documented in the real man page(s). These additional files +# only source the real man page, but without them the man command +# would be unable to find the correct page. The default is NO. + +MAN_LINKS = NO + +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- + +# If the GENERATE_XML tag is set to YES Doxygen will +# generate an XML file that captures the structure of +# the code including all documentation. + +GENERATE_XML = NO + +# The XML_OUTPUT tag is used to specify where the XML pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `xml' will be used as the default path. + +XML_OUTPUT = xml + +# The XML_SCHEMA tag can be used to specify an XML schema, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_SCHEMA = + +# The XML_DTD tag can be used to specify an XML DTD, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_DTD = + +# If the XML_PROGRAMLISTING tag is set to YES Doxygen will +# dump the program listings (including syntax highlighting +# and cross-referencing information) to the XML output. Note that +# enabling this will significantly increase the size of the XML output. + +XML_PROGRAMLISTING = YES + +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- + +# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will +# generate an AutoGen Definitions (see autogen.sf.net) file +# that captures the structure of the code including all +# documentation. Note that this feature is still experimental +# and incomplete at the moment. + +GENERATE_AUTOGEN_DEF = NO + +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- + +# If the GENERATE_PERLMOD tag is set to YES Doxygen will +# generate a Perl module file that captures the structure of +# the code including all documentation. Note that this +# feature is still experimental and incomplete at the +# moment. + +GENERATE_PERLMOD = NO + +# If the PERLMOD_LATEX tag is set to YES Doxygen will generate +# the necessary Makefile rules, Perl scripts and LaTeX code to be able +# to generate PDF and DVI output from the Perl module output. + +PERLMOD_LATEX = NO + +# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be +# nicely formatted so it can be parsed by a human reader. This is useful +# if you want to understand what is going on. On the other hand, if this +# tag is set to NO the size of the Perl module output will be much smaller +# and Perl will parse it just the same. + +PERLMOD_PRETTY = YES + +# The names of the make variables in the generated doxyrules.make file +# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. +# This is useful so different doxyrules.make files included by the same +# Makefile don't overwrite each other's variables. + +PERLMOD_MAKEVAR_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will +# evaluate all C-preprocessor directives found in the sources and include +# files. + +ENABLE_PREPROCESSING = YES + +# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro +# names in the source code. If set to NO (the default) only conditional +# compilation will be performed. Macro expansion can be done in a controlled +# way by setting EXPAND_ONLY_PREDEF to YES. + +MACRO_EXPANSION = NO + +# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES +# then the macro expansion is limited to the macros specified with the +# PREDEFINED and EXPAND_AS_PREDEFINED tags. + +EXPAND_ONLY_PREDEF = NO + +# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files +# in the INCLUDE_PATH (see below) will be search if a #include is found. + +SEARCH_INCLUDES = YES + +# The INCLUDE_PATH tag can be used to specify one or more directories that +# contain include files that are not input files but should be processed by +# the preprocessor. + +INCLUDE_PATH = + +# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard +# patterns (like *.h and *.hpp) to filter out the header-files in the +# directories. If left blank, the patterns specified with FILE_PATTERNS will +# be used. + +INCLUDE_FILE_PATTERNS = + +# The PREDEFINED tag can be used to specify one or more macro names that +# are defined before the preprocessor is started (similar to the -D option of +# gcc). The argument of the tag is a list of macros of the form: name +# or name=definition (no spaces). If the definition and the = are +# omitted =1 is assumed. + +PREDEFINED = + +# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then +# this tag can be used to specify a list of macro names that should be expanded. +# The macro definition that is found in the sources will be used. +# Use the PREDEFINED tag if you want to use a different macro definition. + +EXPAND_AS_DEFINED = + +# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then +# doxygen's preprocessor will remove all function-like macros that are alone +# on a line, have an all uppercase name, and do not end with a semicolon. Such +# function macros are typically used for boiler-plate code, and will confuse the +# parser if not removed. + +SKIP_FUNCTION_MACROS = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- + +# The TAGFILES option can be used to specify one or more tagfiles. +# Optionally an initial location of the external documentation +# can be added for each tagfile. The format of a tag file without +# this location is as follows: +# TAGFILES = file1 file2 ... +# Adding location for the tag files is done as follows: +# TAGFILES = file1=loc1 "file2 = loc2" ... +# where "loc1" and "loc2" can be relative or absolute paths or +# URLs. If a location is present for each tag, the installdox tool +# does not have to be run to correct the links. +# Note that each tag file must have a unique name +# (where the name does NOT include the path) +# If a tag file is not located in the directory in which doxygen +# is run, you must also specify the path to the tagfile here. + +TAGFILES = + +# When a file name is specified after GENERATE_TAGFILE, doxygen will create +# a tag file that is based on the input files it reads. + +GENERATE_TAGFILE = + +# If the ALLEXTERNALS tag is set to YES all external classes will be listed +# in the class index. If set to NO only the inherited external classes +# will be listed. + +ALLEXTERNALS = NO + +# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed +# in the modules index. If set to NO, only the current project's groups will +# be listed. + +EXTERNAL_GROUPS = YES + +# The PERL_PATH should be the absolute path and name of the perl script +# interpreter (i.e. the result of `which perl'). + +PERL_PATH = /usr/bin/perl + +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- + +# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will +# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or +# super classes. Setting the tag to NO turns the diagrams off. Note that this +# option is superseded by the HAVE_DOT option below. This is only a fallback. It is +# recommended to install and use dot, since it yields more powerful graphs. + +CLASS_DIAGRAMS = YES + +# If set to YES, the inheritance and collaboration graphs will hide +# inheritance and usage relations if the target is undocumented +# or is not a class. + +HIDE_UNDOC_RELATIONS = YES + +# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is +# available from the path. This tool is part of Graphviz, a graph visualization +# toolkit from AT&T and Lucent Bell Labs. The other options in this section +# have no effect if this option is set to NO (the default) + +HAVE_DOT = NO + +# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect inheritance relations. Setting this tag to YES will force the +# the CLASS_DIAGRAMS tag to NO. + +CLASS_GRAPH = YES + +# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect implementation dependencies (inheritance, containment, and +# class references variables) of the class with other documented classes. + +COLLABORATION_GRAPH = YES + +# If the UML_LOOK tag is set to YES doxygen will generate inheritance and +# collaboration diagrams in a style similar to the OMG's Unified Modeling +# Language. + +UML_LOOK = NO + +# If set to YES, the inheritance and collaboration graphs will show the +# relations between templates and their instances. + +TEMPLATE_RELATIONS = NO + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT +# tags are set to YES then doxygen will generate a graph for each documented +# file showing the direct and indirect include dependencies of the file with +# other documented files. + +INCLUDE_GRAPH = YES + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and +# HAVE_DOT tags are set to YES then doxygen will generate a graph for each +# documented header file showing the documented files that directly or +# indirectly include this file. + +INCLUDED_BY_GRAPH = YES + +# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will +# generate a call dependency graph for every global function or class method. +# Note that enabling this option will significantly increase the time of a run. +# So in most cases it will be better to enable call graphs for selected +# functions only using the \callgraph command. + +CALL_GRAPH = NO + +# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen +# will graphical hierarchy of all classes instead of a textual one. + +GRAPHICAL_HIERARCHY = YES + +# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images +# generated by dot. Possible values are png, jpg, or gif +# If left blank png will be used. + +DOT_IMAGE_FORMAT = png + +# The tag DOT_PATH can be used to specify the path where the dot tool can be +# found. If left blank, it is assumed the dot tool can be found on the path. + +DOT_PATH = + +# The DOTFILE_DIRS tag can be used to specify one or more directories that +# contain dot files that are included in the documentation (see the +# \dotfile command). + +DOTFILE_DIRS = + +# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width +# (in pixels) of the graphs generated by dot. If a graph becomes larger than +# this value, doxygen will try to truncate the graph, so that it fits within +# the specified constraint. Beware that most browsers cannot cope with very +# large images. + +MAX_DOT_GRAPH_WIDTH = 1024 + +# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height +# (in pixels) of the graphs generated by dot. If a graph becomes larger than +# this value, doxygen will try to truncate the graph, so that it fits within +# the specified constraint. Beware that most browsers cannot cope with very +# large images. + +MAX_DOT_GRAPH_HEIGHT = 1024 + +# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the +# graphs generated by dot. A depth value of 3 means that only nodes reachable +# from the root by following a path via at most 3 edges will be shown. Nodes that +# lay further from the root node will be omitted. Note that setting this option to +# 1 or 2 may greatly reduce the computation time needed for large code bases. Also +# note that a graph may be further truncated if the graph's image dimensions are +# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). +# If 0 is used for the depth value (the default), the graph is not depth-constrained. + +MAX_DOT_GRAPH_DEPTH = 0 + +# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will +# generate a legend page explaining the meaning of the various boxes and +# arrows in the dot generated graphs. + +GENERATE_LEGEND = YES + +# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will +# remove the intermediate dot files that are used to generate +# the various graphs. + +DOT_CLEANUP = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- + +# The SEARCHENGINE tag specifies whether or not a search engine should be +# used. If set to NO the values of all tags below this one will be ignored. + +SEARCHENGINE = NO diff --git a/2.5/bertos/net/nmeap/Makefile b/2.5/bertos/net/nmeap/Makefile new file mode 100644 index 00000000..425079a3 --- /dev/null +++ b/2.5/bertos/net/nmeap/Makefile @@ -0,0 +1,23 @@ +# rules +export CC=gcc +export CDEFS = -DNDEBUG + +# directories +BASE :=$(shell pwd) +export SRC=$(BASE)/src +export TST=$(BASE)/tst +export INC=$(BASE)/inc +export LIB=$(BASE)/lib + +all : + cd $(SRC) && $(MAKE) all + cd $(TST) && $(MAKE) all + + +clean : + cd $(SRC) && $(MAKE) clean + cd $(TST) && $(MAKE) clean + +doc : + doxygen + diff --git a/2.5/bertos/net/nmeap/README b/2.5/bertos/net/nmeap/README new file mode 100644 index 00000000..bc2a6a08 --- /dev/null +++ b/2.5/bertos/net/nmeap/README @@ -0,0 +1,24 @@ +NMEAP is licensed under the BSD Open Source License. See the file COPYING for terms of the license + +VERSION 0.2 - bug fixes and tutorial + a. fixed a bug in test3.c + b. added a tutorial in doc/tutorial.html + +Installation: + +Unpack the tarball or zip file into the desired working directory. + +Building: + +Under Linux, execute 'make' from the top level directory. + +Under Win32, execute 'nmake -f win32.mak' from the top level directory + +Using: + +This library is statically linked to the application. Just include it in +your linker command line. See the file 'nmeap.h' and the examples in the +'tst' directory for usage instructions. + + + diff --git a/2.5/bertos/net/nmeap/doc/tutorial.html b/2.5/bertos/net/nmeap/doc/tutorial.html new file mode 100644 index 00000000..539a05ac --- /dev/null +++ b/2.5/bertos/net/nmeap/doc/tutorial.html @@ -0,0 +1,151 @@ + + +

NMEAP TUTORIAL AND REFERENCE

+
+
+copyright (c) 2005 David M. Howard
+This work is licensed under the Creative Commons Attribution License.
+To view a copy of this license, visit
+http://creativecommons.org/licenses/by/2.0/ or send a letter to
+Creative Commons, 559 Nathan Abbott Way, Stanford, California 94305,USA
+You are free:
+    * to copy, distribute, display, and perform the work
+    * to make derivative works
+    * to make commercial use of the work
+Under the following conditions:
+Attribution. You must give the original author credit.
+    * For any reuse or distribution, you must make clear to others the
+      license terms of this work.
+    * Any of these conditions can be waived if you get permission from
+      the author.
+
+
+

Table Of Contents

+
    +
  1. Installing the Source Code
    2. +
  2. Building the Library
    3. +
  3. Description and Examples
    4. +
  4. API Documentation
    5. +
+  +

1. Installing the source code

+Get the source code from NMEAP at sourceforge.net +
+
+Linux:
+	expand the tarball to a directory of your choice.
+	>tar --gzip -xf [tarball name]
+	>cd [nmeap...]
+	
+Windows:
+	use Winzip to unzip the zipfile to a directory of your choice
+	
+
+ +  +

2. Building the library

+
+
+Linux:
+	>cd [working directory]
+	>make
+	This builds a static library named libnmeap.a in the 'lib' directory. there is no option for a dynamic library. 
+	This thing is so small that it isn't worth the trouble. It also builds the test/examples programs in
+	'tst'.
+	
+Windows:
+	>cd [working directory]
+	>nmake -f win32.mak
+	Again, this builds a static library names libnmeap.lib in the 'lib' direcotry, plus the test programs in 'tst'
+
+  +

3. Description and Examples

+

The NMEA-0183 standard specifies how the output is formatted for GPS data output, usually on a serial port. The data +consists of 'sentences' delimited by CR/LF end of line markers. A lot has been written about the format, so this document +won't cover the specifics. A good place to start is the NMEA FAQ +maintained by Peter Bennett.

+

NMEAP is an extensible C language parser library that takes NMEA sentences as input and spits out the decoded data as output. You link +NMEAP in to your application, set it up, initialize it and feed it bytes. It signals you when it has found a complete valid sentence and +provides the parsed out data to you. Parsing NMEA-0183 is pretty easy but it has a few tricky bits. The value of NMEAP is not that it is +rocket science to write an NMEA parser, but that it provides a relatively efficient implementation that works, along with an +extension framework to add more sentence parsers without hacking the base source code.

+

An NMEA 'sentence' has the following format:

+
+	$name,data1,data2,...,dataN*XX[CR/LF]
+	OR
+	$name,data1,data2,...,dataN[CR/LF]
+	
+where
+	header       := a 5 digit sentence identifier. all ASCII upper case. e.g. GPGGA
+	data1..dataN := some number of data elements, all ASCII numbers or letters, in all kinds of weird formats.
+                    fields can be empty, in which case 2 commas will be side by side.
+                    normally data fields are identified by their position in the sentence. 
+	*XX          := a '*' plus two ASCII hex digits of checksum. this field is optional.
+	[CR/LF]      := end of line is terminated by a carriage return/linefeed pair.
+	
+example from the NMEA FAQ:
+ 	$GPGGA,123519,4807.038,N,01131.324,E,1,08,0.9,545.4,M,46.9,M,,*42
+
+

The NMEAP parser works as follows: +

    +
  1. the application sets up the parser and specifies which sentences are to be parsed + and what is to be done with the output data from the parser.
    2. +
  2. the application reads raw bytes from its IO device and passes the bytes to the parser, + either byte by byte or as a buffer/length pair.
    3. +
  3. nmeap: +
      +
    • runs the input bytes through a lexical scanner that recognizes complete and valid sentences
      • +
    • when a sentence is recognized, a second lexical scanner divides the sentence into discrete tokens.
      • +
    • the name field is matched internally to a sentence parser for that name
      • +
    • the sentence parser picks out the data strings and decodes them into an nmeap or user + defined data structure with normal data types such as integer, float, double etc.
      • +
    • notifies the client application that a sentence was found and decoded, either thru a callout + to an event handler (ala Expat) or via a return code and a shared data structure, or both.
      • +
    +
    4. +
+

Sentence Parsers

+

Most of the work in NMEAP is done by the sentence parsers. Each type of NMEA sentence string has an associated parser. NMEAP provides +standard ones, and the user can add more in a systematic way. +The sentence parser is responsible for knowing the token position of the data elements and whatever format they +are in. There are functions in nmeap to decode standard data element formats. If something is nonstandard, +the sentence parser decodes it. Each sentence parser has a 'struct' type associated with it +that the decoded data gets poked into an instance of that data structure, which is provided by the client application when nmeap is set +up.

+

Memory Allocation

+

All memory allocation is done by the application. Several data items are required. The application can declare them statically or use +malloc or whatever. NMEAP doesn't do any memory allocation on its own. This is an important requirement for portability and especially in +embedded systems where memory allocation needs to be tightly defined and controlled. +

+

Threads

+

NMEAP as implemented is not meant to be called from multiple threads. It expects to execute within the context of a single thread. The sentence callouts execute +in the context of the thread of the nmeap client thread. Given how nmeap works, it doesn't really make sense to make nmeap thread-safe +because the usage pattern is intrinsically single thread. If one wanted to, one could add some mutex locking within the nmeap function +calls to make it thread safe. In a multithreaded environment, a more likely approach to thread-safety is to put synchronization in the client side of the application, +within the sentence parser callouts or inline handling of sentence data. +

+

IO

+

NMEAP is IO agnostic. That is a pompous way of saying that NMEAP doesn't do the IO, the client application does it. There are way too +many IO schemes to handle to keep it portable, especially in the embedded world. That said, the example programs contain a Linux and a Win32 specific +program that includes serial IO for those two platforms. +

+ +

Examples

+Look at the code for the following example programs to see the usage patterns. The are all located in the +'tst' directory. There are big, obvious comments delineating the steps to setting up and using NMEAP. +The IO is simulated in the samples. Follow the comments in the code +to see the sequence of operations to setup and run the parser. When you are ready just plug in your own IO. +
    +
  1. tst/test1.c Setup for standard GGA and RMC sentences with byte by byte IO (easiest to code up)
    2. +
  2. tst/test2.c Setup for standard GGA and RMC sentences with block IO (more efficient from a system call standpoint)
    3. +
  3. tst/test3.c Adding a custom parser
    4. +
  4. tst/wingps.c A console program that reads a serial port and writes the decoded data to standard out for WIN32 applications
    5. +
+  +

API Documentation

+The documentation for the actual API is in Doxygen HTML format and is contained in the 'doc' directory of +the source distribution. Or, all the external data structures, constants and functions are defined in 'inc/nmeap.h'. + +

END

+ + diff --git a/2.5/bertos/net/nmeap/inc/nmeap.h b/2.5/bertos/net/nmeap/inc/nmeap.h new file mode 100644 index 00000000..f9bcc0fb --- /dev/null +++ b/2.5/bertos/net/nmeap/inc/nmeap.h @@ -0,0 +1,227 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NMEAP_H__ +#define __NMEAP_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "cfg/cfg_nmea.h" + +/* +============================================ +COMPILE TIME CONFIGURATION CONSTANTS +============================================ +*/ + +/* these constants affect the size of the context object. tweak them as desired but know what you are doing */ + +/** maximum number of sentence parsers supported */ +#define NMEAP_MAX_SENTENCES CONFIG_NMEAP_MAX_SENTENCES +/** length of sentence name. leave this at 5 unless you really know what you are doing */ +#define NMEAP_MAX_SENTENCE_NAME_LENGTH 5 +/** max length of a complete sentence. the standard says 82 bytes, but its probably better to go at least 128 since + * some units don't adhere to the 82 bytes especially for proprietary sentences */ +#define NMEAP_MAX_SENTENCE_LENGTH CONFIG_NMEAP_MAX_SENTENCE_LENGTH +/** max tokens in one sentence. 24 is enough for any standard sentence */ +#define NMEAP_MAX_TOKENS CONFIG_NMEAP_MAX_TOKENS + +/* predefined message ID's */ + +/* GGA MESSAGE ID */ +#define NMEAP_GPGGA 1 +/* RMC MESSAGE ID */ +#define NMEAP_GPRMC 2 + +/** user defined parsers should make ID numbers using NMEAP_USER as the base value, plus some increment */ +#define NMEAP_USER 100 + +/* forward references */ +struct nmeap_context; +struct nmeap_sentence; + +/* +============================================ +CALLOUTS +============================================ +*/ + +/** + * sentence callout function type + * a callout is fired for each registered sentence type + * the callout gets the object context and a pointer to sentence specific data. + * the callout must cast the 'sentence_data' to the appropriate type for that callout + * @param context nmea object context + * @param sentence_data sentence specific data +*/ +typedef void (*nmeap_callout_t)(struct nmeap_context *context,void *sentence_data,void *user_data); + +/** + * sentence parser function type + * stored in the object context and called internally when the sentence name matches + * the specified value + * the callout gets the object context and a pointer to sentence specific data. + * the callout must cast the 'sentence_data' to the appropriate type for that callout + * @param context nmea object context + * @param sentence_data sentence specific data + * @return id of sentence (each sentence parser knows its own ID) +*/ +typedef int (*nmeap_sentence_parser_t)(struct nmeap_context *context,struct nmeap_sentence *sentence); + + +/* ==== opaque types === */ +#include "nmeap_def.h" + + +/* +============================================ +STANDARD SENTENCE DATA STRUCTURES +============================================ +*/ + +/** extracted data from a GGA message */ +struct nmeap_gga { + double latitude; + double longitude; + double altitude; + unsigned long time; + int satellites; + int quality; + double hdop; + double geoid; +}; +typedef struct nmeap_gga nmeap_gga_t; + +/** extracted data from an RMC message */ +struct nmeap_rmc { + unsigned long time; + char warn; + double latitude; + double longitude; + double speed; + double course; + unsigned long date; + double magvar; +}; + +typedef struct nmeap_rmc nmeap_rmc_t; + +/* +============================================ +METHODS +============================================ +*/ + +/** + * initialize an NMEA parser. call this function to initialize a user allocated context object + * @param context nmea object context. allocated by user statically or dynamically. + * @param user_data pointer to user defined data + * @return 0 if ok, -1 if initialization failed + */ +int nmeap_init(nmeap_context_t *context,void *user_data); + +/** + * register an NMEA sentence parser + * @param context nmea object context + * @param sentence_name string matching the sentence name for this parser. e.g. "GPGGA". not including the '$' + * @param sentence_parser parser function for this sentence + * @param sentence_callout callout triggered when this sentence is received and parsed. + * if null, no callout is triggered for this sentence + * @param sentence_data user allocated sentence specific data defined by the application. the parser uses + this data item to store the extracted data. This data object needs to persist over the life + of the parser, so be careful if allocated on the stack. + * @return 0 if registered ok, -1 if registration failed + */ +int nmeap_addParser(nmeap_context_t *context, + const char *sentence_name, + nmeap_sentence_parser_t sentence_parser, + nmeap_callout_t sentence_callout, + void *sentence_data + ); + +/** + * parse a buffer of nmea data. + * @param context nmea object context + * @param buffer buffer of input characters + * @param length [in,out] pointer to length of buffer. on return, contains number of characters not used for + * the current sentence + * @return -1 if error, 0 if the data did not complete a sentence, sentence code if a sentence was found in the stream + */ +int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length); + +/** + * parse one character of nmea data. + * @param context nmea object context + * @param ch input character + * @return -1 if error, 0 if the data did not complete a sentence, sentence code if a sentence was found in the stream + */ +int nmeap_parse(nmeap_context_t *context,char ch); + + +/** + * built-in parser for GGA sentences. + * @param context nmea object context + * @param sentence sentence object for this parser + */ +int nmeap_gpgga(nmeap_context_t *context,nmeap_sentence_t *sentence); + +/** + * built-in parser for RMC sentences. + * @param context nmea object context + * @param sentence sentence object for this parser + */ +int nmeap_gprmc(nmeap_context_t *context,nmeap_sentence_t *sentence); + +/** + * extract latitude from 2 tokens in ddmm.mmmm,h format. + * @param plat pointer to token with numerical latitude + * @param phem pointer to token with hemisphere + * @return latitude in degrees and fractional degrees + */ +double nmeap_latitude(const char *plat,const char *phem); + + +/** + * extract longitude from 2 tokens in ddmm.mmmm,h format. + * @param plat pointer to token with numerical longitude + * @param phem pointer to token with hemisphere + * @return longitude in degrees and fractional degrees + */ +double nmeap_longitude(const char *plat,const char *phem); + + +/** + * extract altitude from 2 tokens in xx.x format. + * @param palt pointer to token with numerical altitude + * @param punits pointer to token with measure unint + * @return altitude in meter or feet + */ +double nmeap_altitude(const char *palt,const char *punits); + +#ifdef __cplusplus +} // extern C +#endif + + +#endif + diff --git a/2.5/bertos/net/nmeap/inc/nmeap_def.h b/2.5/bertos/net/nmeap/inc/nmeap_def.h new file mode 100644 index 00000000..e8c44e32 --- /dev/null +++ b/2.5/bertos/net/nmeap/inc/nmeap_def.h @@ -0,0 +1,72 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NMEAP_DEF_H__ +#define __NMEAP_DEF_H__ + +/** + * context for a single sentence + */ +typedef struct nmeap_sentence { + char name[NMEAP_MAX_SENTENCE_NAME_LENGTH + 1]; + int id; + nmeap_sentence_parser_t parser; + nmeap_callout_t callout; + void *data; +} nmeap_sentence_t; + +/** + * parser context + */ +struct nmeap_context { + /** support up to 8 sentences */ + nmeap_sentence_t sentence[NMEAP_MAX_SENTENCES]; /* sentence descriptors */ + int sentence_count; /* number of initialized descriptors */ + + /** sentence input buffer */ + char input[NMEAP_MAX_SENTENCE_LENGTH + 1]; /* input line buffer */ + int input_count; /* index into 'input */ + int input_state; /* current lexical scanner state */ + char input_name[6]; /* sentence name */ + char icks; /* input checksum */ + char ccks; /* computed checksum */ + + /* tokenization */ + char *token[NMEAP_MAX_TOKENS]; /* list of delimited tokens */ + int tokens; /* list of tokens */ + + /** errors and debug. optimize these as desired */ + unsigned long msgs; /* count of good messages */ + unsigned long err_hdr; /* header error */ + unsigned long err_ovr; /* overrun error */ + unsigned long err_unk; /* unknown error */ + unsigned long err_id; /* bad character in id */ + unsigned long err_cks; /* bad checksum */ + unsigned long err_crl; /* expecting cr or lf, got something else */ + char debug_input[NMEAP_MAX_SENTENCE_LENGTH + 1]; /* input line buffer for debug */ + + /** opaque user data */ + void *user_data; +}; + +typedef struct nmeap_context nmeap_context_t; + +#endif /* __NMEAP_DEF_H__ */ diff --git a/2.5/bertos/net/nmeap/src/Makefile b/2.5/bertos/net/nmeap/src/Makefile new file mode 100644 index 00000000..5e94960c --- /dev/null +++ b/2.5/bertos/net/nmeap/src/Makefile @@ -0,0 +1,31 @@ +# specify compiler flags +CFLAGS = -I $(INC) $(CDEFS) -g -O0 -Werror -Wall + +# set library name +LIBNAME = libnmeap.a + +COBJ = nmeap01.o + +INCLUDES= $(INC)/nmeap.h $(INC)/nmeap_def.h + +# build everything +all : $(LIB)/$(LIBNAME) + +# build the library +$(LIB)/$(LIBNAME) : $(COBJ) + -$(RM) $(LIB)/$(LIBNAME) + $(AR) -q $(LIB)/$(LIBNAME) $(COBJ) + +# build all c files into .o files +$(COBJ): %.o: %.c + $(CC) -c $(CFLAGS) $(SRC)/$< -o $@ + +# erase all intermediate and output files +clean : + -$(RM) *.o + -$(RM) *~ + -$(RM) $(LIB)/$(LIBNAME) + +# include file dependencies +$(COBJ) : $(INCLUDES) + diff --git a/2.5/bertos/net/nmeap/src/nmeap.mak b/2.5/bertos/net/nmeap/src/nmeap.mak new file mode 100644 index 00000000..703ffc9d --- /dev/null +++ b/2.5/bertos/net/nmeap/src/nmeap.mak @@ -0,0 +1,20 @@ +INCLUDES= ..\inc\nmeap.h ..\inc\nmeap_def.h +CSRC = nmeap01.c +LIBNAME = ..\lib\libnmeap.lib + +# build everything +all : $(LIBNAME) + +$(LIBNAME) : nmeap01.obj + -erase $(LIBNAME) + lib /OUT:$(LIBNAME) nmeap01.obj + +nmeap01.obj : nmeap01.c $(INCLUDES) + cl /DNDEBUG /c /I..\inc nmeap01.c + +# erase all intermediate and output files +clean : + -erase *.obj + -erase $(LIBNAME) + + diff --git a/2.5/bertos/net/nmeap/src/nmeap01.c b/2.5/bertos/net/nmeap/src/nmeap01.c new file mode 100644 index 00000000..c3912428 --- /dev/null +++ b/2.5/bertos/net/nmeap/src/nmeap01.c @@ -0,0 +1,634 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/** + * nmeap01.c + * nmeap gps data parser + * + * see the file COPYING for terms of the licnese +*/ + +#include +#include +#include +#include + +#include "../inc/nmeap.h" + +#include + +#define assert(x) ASSERT(x) + +#include "cfg/cfg_nmea.h" + +#define LOG_LEVEL NMEA_LOG_LEVEL +#define LOG_FORMAT NMEA_LOG_FORMAT +#include + +#ifdef _DEBUG + #undef NDEBUG + #define printf(str,...) LOG_INFO(str, ## __VA_ARGS__) +#endif + +/* this only works if you are sure you have an upper case hex digit */ +#define HEXTOBIN(ch) ((ch <= '9') ? ch - '0' : ch - ('A' - 10)) + +/* forward references */ +int nmeap_init(nmeap_context_t *context,void *user_data); +int nmeap_addParser(nmeap_context_t *context, + const char *sentence_name, + nmeap_sentence_parser_t sentence_parser, + nmeap_callout_t sentence_callout, + void *sentence_data + ); +int nmeap_tokenize(nmeap_context_t *context); +int nmeap_process(nmeap_context_t *context); +int nmeap_parse(nmeap_context_t *context,char ch); +int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length); + +/** + * get a latitude out of a pair of nmea tokens + */ +double nmeap_latitude(const char *plat,const char *phem) +{ + double lat; + int deg; + double min; + int ns; + + assert(plat != 0); + assert(phem != 0); + + if (*plat == 0) { + return 0.0; + } + if (*phem == 0) { + return 0.0; + } + + /* north lat is +, south lat is - */ + if (*phem == 'N') { + ns = 1; + } + else { + ns = -1; + } + + /* latitude is degrees, minutes, fractional minutes */ + /* no validation is performed on the token. it better be good.*/ + /* if it comes back 0.0 then probably the token was bad */ + lat = atof(plat); + + /* extract the degree part */ + deg = (int)(lat / 100.0); + + /* mask out the degrees */ + min = lat - (deg * 100.0); + + /* compute the actual latitude in degrees.decimal-degrees */ + lat = (deg + (min / 60.0)) * ns; + + return lat; +} + +/** + * get a longitude out of a pair of nmea tokens + */ +double nmeap_longitude(const char *plon,const char *phem) +{ + double lon; + int deg; + double min; + int ew; + + assert(plon != 0); + assert(phem != 0); + + if (*plon == 0) { + return 0.0; + } + if (*phem == 0) { + return 0.0; + } + + /* west long is negative, east long is positive */ + if (*phem == 'E') { + ew = 1; + } + else { + ew = -1; + } + + /* longitude is degrees, minutes, fractional minutes */ + /* no validation is performed on the token. it better be good.*/ + /* if it comes back 0.0 then probably the token was bad */ + lon = atof(plon); + + /* extract the degree part */ + deg = (int)(lon / 100.0); + + /* mask out the degrees */ + min = lon - (deg * 100.0); + + /* compute the actual lonitude in degrees.decimal-degrees */ + lon = (deg + (min / 60.0)) * ew; + + + return lon; +} + +/** + * get an altitude longitude out of a pair of nmea tokens + * ALTITUDE is returned in METERS + */ +double nmeap_altitude(const char *palt,const char *punits) +{ + double alt; + + if (*palt == 0) { + return 0.0; + } + + /* convert with no error checking */ + alt = atof(palt); + + if (*punits == 'M') { + /* already in meters */ + } + else if (*punits == 'F') { + /* convert to feet */ + alt = alt * 3.2808399; + } + + return alt; +} + +/** + * initialize an NMEA parser + */ +int nmeap_init(nmeap_context_t *context,void *user_data) +{ + assert(context != 0); + + memset(context,0,sizeof(*context)); + + context->user_data = user_data; + + return 0; +} + +/** + * register an NMEA sentence parser + */ +int nmeap_addParser(nmeap_context_t *context, + const char *sentence_name, + nmeap_sentence_parser_t sentence_parser, + nmeap_callout_t sentence_callout, + void *sentence_data + ) +{ + nmeap_sentence_t *s = 0; + + /* runtime error */ + assert(context != 0); + + /* sentence capacity overflow */ + if (context->sentence_count >= NMEAP_MAX_SENTENCES) { + return -1; + } + + /* point at next empty sentence buffer */ + s = &context->sentence[context->sentence_count]; + + /* advance sentence data count */ + context->sentence_count++; + + /* clear the sentence data */ + memset(s,0,sizeof(*s)); + + /* name */ + strncpy(s->name,sentence_name,NMEAP_MAX_SENTENCE_NAME_LENGTH); + + /* parser */ + s->parser = sentence_parser; + + /* callout */ + s->callout = sentence_callout; + + /* data */ + s->data = sentence_data; + + return 0; +} + +/** + * tokenize a buffer + */ +int nmeap_tokenize(nmeap_context_t *context) +{ + char *s; + int tokens; + int state; + + /* first token is header. assume it is there */ + tokens = 0; + s = context->input; + context->token[tokens] = s; + + /* get rest of tokens */ + tokens = 1; + state = 0; + while((*s != 0)&&(tokens < NMEAP_MAX_TOKENS)) { + switch(state) { + case 0: + /* looking for end of a token */ + if (*s == ',') { + /* delimit at the comma */ + *s = 0; + /* new token */ + state = 1; + } + break; + case 1: + /* start of next token, might be another comma */ + context->token[tokens++] = s; + if (*s == ',') { + /* delimit at the comma */ + *s = 0; + } + else { + /* not a comma */ + state = 0; + } + break; + default: + state = 0; + break; + } + + // next character + s++; + } + return tokens; +} + +/** + * process a sentence + */ +int nmeap_process(nmeap_context_t *context) +{ + int id; + int i; + nmeap_sentence_t *s; + + /* copy the input to a debug buffer */ + /* remove debug_input when everything is working. */ + strncpy(context->debug_input,context->input,sizeof(context->debug_input)); + + /* tokenize the input */ + context->tokens = nmeap_tokenize(context); + + /* try to find a matching sentence parser */ + /* this search is O(n). it has a lot of potential for optimization, at the expense of complexity, if you have a lot of sentences */ + /* binary search instead of linear (have to keep sentences in sorted order) O(NlogN) */ + /* OR, when sentences are added, create a TRIE structure to find the names with a constant time search O(5) */ + for(i=0;isentence_count;i++) { + s = &context->sentence[i]; + assert(s != 0); + if (strncmp(context->input_name,s->name,5) == 0) { + /* found a match, call its parser */ + id = (*context->sentence[i].parser)(context,s); + if (id > 0) { + break; + } + } + } + + return id; +} + +/** + +-5-+ +---+ + v | v | + +------+ +------+ +------+ +------+ +------+ + | 0 |--$--> |1-hdr |--alnum--> |2-data|----\r-->| 6-LF |---\n--->| done |--> 0 + +------+ +------+ +------+ +------+ +------+ + | ^ + * +--------\r-------+ + V | + +------+ +------+ +------+ + |3-cks |--xdigit-->|4-cks |-xdigit->| 5-CR | + +------+ +------+ +------+ + +return to start conditions: +1. buffer overflow +2. invalid character for state + +checksum calculation +two hex digits represent the XOR of all characters between, but not +including, the "$" and "*". A checksum is required on some +sentences. + +*/ +int nmeap_parse(nmeap_context_t *context,char ch) +{ + int status = 0; + + /* check for input buffer overrun first to avoid duplicating code in the + individual states + */ + if ((size_t)context->input_count >= (sizeof(context->input)-1)) { + /* input buffer overrun, restart state machine */ + context->input_state = 0; + /* reset input count */ + context->input_count = 0; + } + + /* store the byte */ + context->input[context->input_count] = ch; + + /* next buffer position */ + context->input_count++; + + /* run it through the lexical scanner */ + switch(context->input_state) { + /* LOOKING FOR $ */ + case 0: + if (ch == '$') { + /*look for id */ + context->input_state = 1; + context->ccks = 0; + context->icks = 0; + } + else { + /* header error, start over */ + context->err_hdr++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR 5 CHARACTER SENTENCE ID */ + case 1: + /* allow numbers even though it isn't usually done */ + /* a proprietary id might have a numeral */ + if (isalnum(ch)) { + /* store name separately */ + context->input_name[context->input_count - 2] = ch; + /* checksum */ + context->ccks ^= ch; + /* end of header? */ + if (context->input_count >= 6) { + /* yes, get body */ + context->input_state = 2; + } + } + else { + /* bad character, start over */ + context->err_id++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR CR OR CHECKSUM INDICATOR */ + case 2: + if (ch == '*') { + /* this sentence has a checksum */ + context->input_state = 3; + } + else if (ch == '\r') { + /* carriage return, no checksum, force a match */ + context->icks = 0; + context->ccks = 0; + context->input_state = 6; + } + else { + /* continue accumulating data */ + /* checksum */ + context->ccks ^= ch; + } + break; + /* LOOKING FOR FIRST CHECKSUM CHARACTER */ + case 3: + /* must be upper case hex digit */ + if (isxdigit(ch) && (ch <= 'F')) { + /* got first checksum byte */ + context->input_state = 4; + context->icks = HEXTOBIN(ch) << 4; + } + else { + /* input error, restart */ + context->err_cks++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR SECOND CHECKSUM CHARACTER */ + case 4: + /* must be upper case hex digit */ + if (isxdigit(ch) && (ch <= 'F')) { + /* got second checksum byte */ + context->input_state = 5; + context->icks += HEXTOBIN(ch); + } + else { + /* input error, restart */ + context->err_cks++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR CR */ + case 5: + if (ch == '\r') { + /* carriage return */ + context->input_state = 6; + } + else { + /* input error, restart */ + context->err_crl++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR LINE FEED */ + case 6: + if (ch == '\n') { + /* linefeed, line complete */ + + /* delimit buffer */ + context->input[context->input_count] = 0; + + /* if the checksums match, process the sentence */ + if (context->ccks == context->icks) { + /* process */ + status = nmeap_process(context); + + /* count good messages */ + context->msgs++; + } + else { + /* count checksum errors */ + context->err_cks++; + } + + /* restart next time */ + context->input_state = 0; + context->input_count = 0; + } + else { + /* input error, restart */ + context->err_crl++; + context->input_state = 0; + context->input_count = 0; + } + break; + default: + context->err_unk++; + context->input_state = 0; + break; + } + + return status; +} + +/** + * parse a buffer of nmea data + */ +int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length) +{ + int i; + int status; + int rem; + int tlen; + + tlen = *length; + rem = *length; + status = 0; + /* for each byte in the buffer */ + for(i=0;idata; + + /* if there is a data element, extract data from the tokens */ + if (gga != 0) { + gga->latitude = nmeap_latitude(context->token[2],context->token[3]); + gga->longitude = nmeap_longitude(context->token[4],context->token[5]); + gga->altitude = nmeap_altitude(context->token[9],context->token[10]); + gga->time = atoi(context->token[1]); + gga->satellites = atoi(context->token[7]); + gga->quality = atoi(context->token[6]); + gga->hdop = atof(context->token[8]); + gga->geoid = nmeap_altitude(context->token[11],context->token[12]); + } + +#ifndef NDEBUG + /* print raw input string */ + printf("%s",context->debug_input); + + /* print some validation data */ + printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks); + + /* print the tokens */ + for(i=0;itokens;i++) { + printf("%d:%s\n",i,context->token[i]); + } +#endif + + /* if the sentence has a callout, call it */ + if (sentence->callout != 0) { + (*sentence->callout)(context,gga,context->user_data); + } + + return NMEAP_GPGGA; +} + +/** + * standard GPRMCntence parser + */ +int nmeap_gprmc(nmeap_context_t *context,nmeap_sentence_t *sentence) +{ +#ifndef NDEBUG + int i; +#endif + + /* get pointer to sentence data */ + nmeap_rmc_t *rmc = (nmeap_rmc_t *)sentence->data; + + /* if there is a data element, use it */ + if (rmc != 0) { + /* extract data from the tokens */ + rmc->time = atoi(context->token[1]); + rmc->warn = *context->token[2]; + rmc->latitude = nmeap_latitude(context->token[3],context->token[4]); + rmc->longitude = nmeap_longitude(context->token[5],context->token[6]); + rmc->speed = atof(context->token[7]); + rmc->course = atof(context->token[8]); + rmc->date = atoi(context->token[9]); + rmc->magvar = atof(context->token[10]); + } + +#ifndef NDEBUG + /* print raw input string */ + printf("%s",context->debug_input); + + /* print some validation data */ + printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks); + + /* print the tokens */ + for(i=0;itokens;i++) { + printf("%d:%s\n",i,context->token[i]); + } +#endif + + /* if the sentence has a callout, call it */ + if (sentence->callout != 0) { + (*sentence->callout)(context,rmc,context->user_data); + } + + return NMEAP_GPRMC; +} + + diff --git a/2.5/bertos/net/nmeap/tst/Makefile b/2.5/bertos/net/nmeap/tst/Makefile new file mode 100644 index 00000000..e8407529 --- /dev/null +++ b/2.5/bertos/net/nmeap/tst/Makefile @@ -0,0 +1,17 @@ +all : test1 test2 test3 + +test1 : $(LIB)/libnmeap.a $(TST)/test1.c + gcc -g -O0 -I $(INC) $(CDEFS) -Wall -Werror -o test1 $(TST)/test1.c $(LIB)/libnmeap.a + +test2 : $(LIB)/libnmeap.a $(TST)/test2.c + gcc -g -O0 -I $(INC) $(CDEFS) -Wall -Werror -o test2 $(TST)/test2.c $(LIB)/libnmeap.a + +test3 : $(LIB)/libnmeap.a $(TST)/test3.c + gcc -g -O0 -I $(INC) $(CDEFS) -Wall -Werror -o test3 $(TST)/test3.c $(LIB)/libnmeap.a + +clean: + -$(RM) test1 + -$(RM) test2 + -$(RM) test3 + + diff --git a/2.5/bertos/net/nmeap/tst/test1.c b/2.5/bertos/net/nmeap/tst/test1.c new file mode 100644 index 00000000..3c5e18b5 --- /dev/null +++ b/2.5/bertos/net/nmeap/tst/test1.c @@ -0,0 +1,193 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH CHARACTER BY CHARACTER IO +======================================================================================================= +*/ + + +#include +#include +#include +#include "nmeap.h" + +nmeap_gga_t g_gga; + +char test_vector[] = { +"$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" /* good */ +"$xyz,1234,asdfadfasdfasdfljsadfkjasdfk\r\n" /* junk */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n" /* good */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*48\r\n" /* checksum error */ +}; + +char *pvec = test_vector; + +/** simulate character by character IO */ +int readchar() +{ + int ch; + if (*pvec == 0) { + ch = -1; + } + else { + ch = *pvec++; + } + return ch; +} + +/** do something with the GGA data */ +static void print_gga(nmeap_gga_t *gga) +{ + printf("found GPGGA message %.6f %.6f %.0f %lu %d %d %f %f\n", + gga->latitude , + gga->longitude, + gga->altitude , + gga->time , + gga->satellites, + gga->quality , + gga->hdop , + gga->geoid + ); +} + +/** called when a gpgga message is received and parsed */ +static void gpgga_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_gga_t *gga = (nmeap_gga_t *)data; + + printf("-------------callout\n"); + print_gga(gga); +} + + +/** do something with the RMC data */ +static void print_rmc(nmeap_rmc_t *rmc) +{ + printf("found GPRMC Message %lu %c %.6f %.6f %f %f %lu %f\n", + rmc->time, + rmc->warn, + rmc->latitude, + rmc->longitude, + rmc->speed, + rmc->course, + rmc->date, + rmc->magvar + ); +} + +/** called when a gprmc message is received and parsed */ +static void gprmc_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_rmc_t *rmc = (nmeap_rmc_t *)data; + + printf("-------------callout\n"); + print_rmc(rmc); +} + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 1 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + char ch; + + /* ---------------------------------------*/ + /*STEP 2 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 3 : add standard GPGGA parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,gpgga_callout,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 4 : add standard GPRMC parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,gprmc_callout,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 5 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 6 : get a byte at a time */ + /* -------------------------------------- */ + ch = readchar(); + if (ch <= 0) { + break; + } + + /* --------------------------------------- */ + /*STEP 7 : pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parse(&nmea,ch); + + /* ---------------------------------------*/ + /*STEP 8 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + /* GOT A GPGGA MESSAGE */ + printf("-------------switch\n"); + print_gga(&gga); + printf("-------------\n"); + break; + case NMEAP_GPRMC: + /* GOT A GPRMC MESSAGE */ + printf("-------------switch\n"); + print_rmc(&rmc); + printf("-------------\n"); + break; + default: + break; + } + } + + return 0; +} + diff --git a/2.5/bertos/net/nmeap/tst/test2.c b/2.5/bertos/net/nmeap/tst/test2.c new file mode 100644 index 00000000..39a700f3 --- /dev/null +++ b/2.5/bertos/net/nmeap/tst/test2.c @@ -0,0 +1,208 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH CHARACTER BY CHARACTER IO +======================================================================================================= +*/ + + +#include +#include +#include +#include "nmeap.h" + +nmeap_gga_t g_gga; + +char test_vector[] = { +"$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" /* good */ +"$xyz,1234,asdfadfasdfasdfljsadfkjasdfk\r\n" /* junk */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n" /* good */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*48\r\n" /* checksum error */ +}; + +char *pvec = test_vector; + +/** simulate block IO */ +int readbuffer(char *buffer,int len) +{ + int i; + + if (*pvec == 0) { + // end of file + return -1; + } + + for(i=0;ilatitude , + gga->longitude, + gga->altitude , + gga->time , + gga->satellites, + gga->quality , + gga->hdop , + gga->geoid + ); +} + +/** called when a gpgga message is received and parsed */ +static void gpgga_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_gga_t *gga = (nmeap_gga_t *)data; + + printf("-------------callout\n"); + print_gga(gga); +} + + +/** do something with the RMC data */ +static void print_rmc(nmeap_rmc_t *rmc) +{ + printf("found GPRMC Message %lu %c %.6f %.6f %f %f %lu %f\n", + rmc->time, + rmc->warn, + rmc->latitude, + rmc->longitude, + rmc->speed, + rmc->course, + rmc->date, + rmc->magvar + ); +} + +/** called when a gprmc message is received and parsed */ +static void gprmc_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_rmc_t *rmc = (nmeap_rmc_t *)data; + + printf("-------------callout\n"); + print_rmc(rmc); +} + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 1 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + int rem; + int offset; + int len; + char buffer[32]; + + /* ---------------------------------------*/ + /*STEP 2 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 3 : add standard GPGGA parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,gpgga_callout,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 4 : add standard GPRMC parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,gprmc_callout,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 5 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 6 : get a buffer of input */ + /* -------------------------------------- */ + len = rem = readbuffer(buffer,sizeof(buffer)); + if (len <= 0) { + break; + } + + /* ----------------------------------------------*/ + /*STEP 7 : process input until buffer is used up */ + /* --------------------------------------------- */ + offset = 0; + while(rem > 0) { + /* --------------------------------------- */ + /*STEP 8 : pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parseBuffer(&nmea,&buffer[offset],&rem); + offset += (len - rem); + + /* ---------------------------------------*/ + /*STEP 9 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + printf("-------------switch\n"); + print_gga(&gga); + printf("-------------\n"); + break; + case NMEAP_GPRMC: + printf("-------------switch\n"); + print_rmc(&rmc); + printf("-------------\n"); + break; + default: + break; + } + } + } + + return 0; +} + diff --git a/2.5/bertos/net/nmeap/tst/test3.c b/2.5/bertos/net/nmeap/tst/test3.c new file mode 100644 index 00000000..250f53c4 --- /dev/null +++ b/2.5/bertos/net/nmeap/tst/test3.c @@ -0,0 +1,306 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES + A CUSTOM SENTENCE PARSER WITH CHARACTER BY CHARACTER IO +======================================================================================================= +*/ + + +/* +$PGRMF + +GARMIN PROPRIETARY GPS Position Fix Data + +$PGRMF,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15*HH +1 = GPS week number +2 = GPS seconds in current week +3 = UTC date, ddmmyy format +4 = UTC time, hhmmss format +5 = GPS leap second count +6 = Latitude, dddmm.mmmm format +7 = Latitude hemisphere, N or S +8 = Longitude, dddmm.mmmm format +9 = Longitude hemisphere, E or W +10 = Mode (M=Manual, A=Automatic) +11 = Fix type (0=No fix, 1=2D fix, 2=3D fix) +12 = Speed over ground, kilometres / hour +13 = Course over ground, degrees true +14 = PDOP (Position dilution of precision), rounded to nearest integer +15 = TDOP (Time dilution of precision), rounded to nearest integer +HH = Checksum +*/ + + + +#include +#include +#include +#include +#include "nmeap.h" + +nmeap_gga_t g_gga; + +char test_vector[] = { +"$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n" +"$PGRMF,1,100,191105,123519,13,3929.946667,N,12311.12,W,A,2,100.1,181.2,3,8*35\r\n" +}; + +char *pvec = test_vector; + +/** simulate character by character IO */ +int readchar() +{ + int ch; + if (*pvec == 0) { + ch = -1; + } + else { + ch = *pvec++; + } + return ch; +} +/* --------------------------------------------------------------*/ +/*STEP 1a : define a data structure to contain the sentence data */ +/* ------------------------------------------------------------- */ +struct garmin_rmf { + /* field position in sentence */ + int week; /* 1 = GPS week number */ + int seconds_of_week; /* 2 = GPS seconds in current week */ + unsigned long date; /* 3 = UTC date, ddmmyy format */ + unsigned long time; /* 4 = UTC time, hhmmss format */ + int leap; /* 5 = GPS leap second count */ + double lat; /* 6,7 = Latitude, dddmm.mmmm format (north positive) */ + double lon; /* 8,9 = Longitude, dddmm.mmmm format (east positive) */ + int mode; /* 10 = Mode (M=Manual, A=Automatic) */ + int fix; /* 11 = Fix type (0=No fix, 1=2D fix, 2=3D fix) */ + double speed; /* 12 = Speed over ground, kilometres / hour */ + double course; /* 13 = Course over ground, degrees true */ + int pdop; /* 14 = PDOP (Position dilution of precision), rounded to nearest integer */ + int tdop; /* 15 = TDOP (Time dilution of precision), rounded to nearest integer */ +}; +typedef struct garmin_rmf garmin_rmf_t; + +/* --------------------------------------------------------------*/ +/*STEP 1b : define an id value for the message */ +/* ------------------------------------------------------------- */ +#define GARMIN_PGRMF (NMEAP_USER + 0) + + +/* --------------------------------------------------------------*/ +/* STEP 1c : write the sentence parser */ +/* ------------------------------------------------------------- */ +int custom_pgrmf(nmeap_context_t *context,nmeap_sentence_t *sentence) +{ +#ifndef NDEBUG + int i; +#endif + + /* get pointer to sentence data */ + garmin_rmf_t *rmf = (garmin_rmf_t *)sentence->data; + + if (rmf != 0) { + /* if the sentence has a data storage element, use it */ + + + /* extract data from the tokens */ + rmf->week = atoi(context->token[1]); + rmf->seconds_of_week = atoi(context->token[2]); + rmf->date = (unsigned long)atol(context->token[3]); + rmf->time = (unsigned long)atol(context->token[4]); + rmf->leap = atoi(context->token[5]); + rmf->lat = nmeap_latitude(context->token[6],context->token[7]); + rmf->lon = nmeap_longitude(context->token[8],context->token[9]); + rmf->mode = atoi(context->token[10]); + rmf->fix = atoi(context->token[11]); + rmf->speed = atof(context->token[12]); + rmf->course = atof(context->token[13]); + rmf->pdop = atoi(context->token[14]); + rmf->tdop = atoi(context->token[15]); + } + /* else there was no data element to store into */ + +#ifndef NDEBUG + /* print raw input string */ + printf("%s",context->debug_input); + + /* print some validation data */ + printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks); + + /* print the tokens */ + for(i=0;itokens;i++) { + printf("%d:%s\n",i,context->token[i]); + } +#endif + + /* if the sentence has a callout, call it */ + if (sentence->callout != 0) { + (*sentence->callout)(context,rmf,context->user_data); + } + + return GARMIN_PGRMF; +} + + +/* -------------------------------------------------------------*/ +/*STEP 2 : write a function to do something with the data */ +/* ------------------------------------------------------------ */ +static void print_pgrmf(garmin_rmf_t *rmf) +{ + assert(rmf != 0); + + printf(" w sec date time lp lat lon m f spd crs p t\n"); + printf("found PGRMF message %d %d %lu %lu %d %.6f %.6f %d %d %.2f %.2f %d %d\n", + rmf->week, + rmf->seconds_of_week, + rmf->date, + rmf->time, + rmf->leap, + rmf->lat, + rmf->lon, + rmf->mode, + rmf->fix, + rmf->speed, + rmf->course, + rmf->pdop, + rmf->tdop + ); +} + +/* -------------------------------------------------------------*/ +/*STEP 3 : if using the callout method, write the callout */ +/* ------------------------------------------------------------ */ +static void pgrmf_callout(nmeap_context_t *context,void *data,void *user_data) +{ + garmin_rmf_t *rmf = (garmin_rmf_t *)data; + + printf("-------------callout\n"); + print_pgrmf(rmf); +} + + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 4 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static garmin_rmf_t rmf; /* this is where the data from RMF messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + char ch; + + /* ---------------------------------------*/ + /*STEP 5 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 6 : add standard GPGGA parser */ + /* (no callout this time) */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,0,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 7 : add standard GPRMC parser */ + /* (no callout this time) */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,0,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 8 : ADD THE CUSTOM PARSER */ + /* with callout ) */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"PGRMF",custom_pgrmf,pgrmf_callout,&rmf); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + /* ---------------------------------------*/ + /*STEP 9 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 10: get a byte at a time */ + /* -------------------------------------- */ + ch = readchar(); + if (ch <= 0) { + break; + } + + /* --------------------------------------- */ + /*STEP 11: pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parse(&nmea,ch); + + /* ---------------------------------------*/ + /*STEP 12 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + /* GOT A GPGGA MESSAGE */ + printf("-------------switch\n"); + printf("GPGGA\n"); + printf("-------------\n"); + break; + case NMEAP_GPRMC: + /* GOT A GPRMC MESSAGE */ + printf("-------------switch\n"); + printf("GPRMC\n"); + printf("-------------\n"); + break; + case GARMIN_PGRMF: + /* GOT A PGRMF MESSAGE */ + printf("-------------switch\n"); + print_pgrmf(&rmf); + printf("-------------\n"); + break; + default: + break; + } + } + + return 0; +} + diff --git a/2.5/bertos/net/nmeap/tst/tst.mak b/2.5/bertos/net/nmeap/tst/tst.mak new file mode 100644 index 00000000..df5f3493 --- /dev/null +++ b/2.5/bertos/net/nmeap/tst/tst.mak @@ -0,0 +1,29 @@ +INCLUDES= ..\inc\nmeap.h ..\inc\nmeap_def.h +CSRC = nmeap01.c +LIBNAME = ..\lib\libnmeap.lib + +# build everything +all : test1.exe test2.exe test3.exe wingps.exe + +test1.exe : test1.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc test1.c + link /OUT:test1.exe test1.obj $(LIBNAME) + +test2.exe : test2.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc test2.c + link /OUT:test2.exe test2.obj $(LIBNAME) + +test3.exe : test3.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc test3.c + link /OUT:test3.exe test3.obj $(LIBNAME) + +wingps.exe : wingps.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc wingps.c + link /OUT:wingps.exe wingps.obj $(LIBNAME) + +# erase all intermediate and output files +clean : + -erase *.obj + -erase *.exe + + diff --git a/2.5/bertos/net/nmeap/tst/wingps.c b/2.5/bertos/net/nmeap/tst/wingps.c new file mode 100644 index 00000000..7e6b093a --- /dev/null +++ b/2.5/bertos/net/nmeap/tst/wingps.c @@ -0,0 +1,244 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH SERIAL IO FOR WIN32 +======================================================================================================= +*/ +#define WIN32_LEAN_AND_MEAN +#include +#include +#include +#include +#include "nmeap.h" + +/** open a serial port */ +static HANDLE openPort(const char *port,int baud) +{ + HANDLE h; + DCB dcb; + COMMTIMEOUTS tmo; + int status; + + /* open the port */ + h = CreateFile( port, + GENERIC_READ | GENERIC_WRITE, + 0, + 0, + OPEN_EXISTING, + 0, + 0); + if (h == INVALID_HANDLE_VALUE) { + /* quit on error */ + return h; + } + + + /* read current configuration */ + status = GetCommState(h,&dcb); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + /* set the baud rate and other parameters */ + dcb.BaudRate = baud; + dcb.ByteSize = 8; + dcb.Parity = NOPARITY; + dcb.StopBits = ONESTOPBIT; + + /* set configuration */ + status = SetCommState(h, &dcb); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + /* read timeout configuration */ + status = GetCommTimeouts(h,&tmo); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + /* set to indefinite blocking */ + tmo.ReadIntervalTimeout = 0; + tmo.ReadTotalTimeoutConstant = 0; + tmo.ReadTotalTimeoutMultiplier = 0; + status = SetCommTimeouts(h,&tmo); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + return h; +} + +/** read a byte (blocking) */ +static int readPort(HANDLE h) +{ + BOOL status; + char ch; + DWORD count; + status = ReadFile(h,&ch,1,&count,0); + if (status == 0) { + return -1; + } + + return (int)ch; +} + + +static void closePort(HANDLE h) +{ + CloseHandle(h); +} + + +/** print current data */ +static void printGps(nmeap_gga_t *gga,nmeap_rmc_t *rmc) +{ + printf("%lu %lu %.6f %.6f %.0f %f %f %d %d\n", + gga->time, + rmc->date, + gga->latitude , + gga->longitude, + gga->altitude , + rmc->course, + rmc->speed, + gga->satellites, + gga->quality + ); +} + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 1 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + char ch; + const char *port; + int baud; + HANDLE h; + + /* require both arguments */ + if (argc != 3) { + printf("%s \n",argv[0]); + return 1; + } + + /* serial port argument */ + port = argv[1]; + + /* baud rate argument */ + status = sscanf(argv[2],"%d",&baud); + if (status != 1) { + printf("%s \n",argv[0]); + printf("invalid : %s\n",argv[2]); + return 1; + } + + /** open the serial port */ + h = openPort(port,baud); + if (h == INVALID_HANDLE_VALUE) { + printf("can't open port : %s\n",port); + return 1; + } + + /* ---------------------------------------*/ + /*STEP 2 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 3 : add standard GPGGA parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,0,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 4 : add standard GPRMC parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,0,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 5 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 6 : get a byte at a time */ + /* -------------------------------------- */ + ch = readPort(h); + if (ch <= 0) { + break; + } + + /* --------------------------------------- */ + /*STEP 7 : pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parse(&nmea,ch); + + /* ---------------------------------------*/ + /*STEP 8 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + /* GOT A GPGGA MESSAGE */ + printGps(&gga,&rmc); + break; + case NMEAP_GPRMC: + /* GOT A GPRMC MESSAGE */ + printGps(&gga,&rmc); + break; + default: + break; + } + } + + /* close and quit */ + closePort(h); + + return 0; +} diff --git a/2.5/bertos/net/nmeap/win32.mak b/2.5/bertos/net/nmeap/win32.mak new file mode 100644 index 00000000..5c79366f --- /dev/null +++ b/2.5/bertos/net/nmeap/win32.mak @@ -0,0 +1,22 @@ +# directories +SRC=src +TST=tst + +all : + cd $(SRC) + $(MAKE) -f nmeap.mak all + cd ..\$(TST) + $(MAKE) -f tst.mak all + cd .. + + +clean : + cd $(SRC) + $(MAKE) -f nmeap.mak clean + cd ..\$(TST) + $(MAKE) -f tst.mak clean + cd .. + +doc : + doxygen + diff --git a/2.5/bertos/net/pocketbus.c b/2.5/bertos/net/pocketbus.c new file mode 100644 index 00000000..117e40d0 --- /dev/null +++ b/2.5/bertos/net/pocketbus.c @@ -0,0 +1,291 @@ +/** + * \file + * + * + * \brief pocketBus protocol implementation. + * + * pocketBus protocol is a simple strictly master-slave protocol, usable + * in embedded systems. + * pocketBus frame is as follows: + * 
+ * +----------------------------------------+
+ * | STX | VER | ADDR | PAYLOAD | CKS | ETX |
+ * +----------------------------------------+
+ * |     |     |      |         |     |     |
+ * + 1B  + 1B  +  2B  + N Byte  + 2B  + 1B  +
+ *
+ * + * - STX, 1 byte (0x02), packet start + * - VER, 1 byte, packet version + * - ADDR, 2 byte, slave address + * - PAYLOAD, N byte, data field + * - CKS, 2 byte, checksum + * - ETX, 1 byte, (0x03) packet end + * + * Protocol parsing start on STX reception. When the receiving routine + * finds an STX char, it starts to read characters from the bus + * until an ETX is received. Once a packet is received, + * the parser checks packet correctness and checksum. If all is OK + * the payload is returned. + * + * STX (0x02), ETX(0x03) and ESC(0x1B) are special characters and cannot be + * transmitted inside payload without escaping them. + * To escape a character you must precede it by the ESC char. + * E.G. STX -> ESC + STX + * ETX -> ESC + ETX + * ESC -> ESC + ESC + * + * In the ADDR field is always specified the slave address. + * In the case of master trasmitting, ADDR contains the slave destination + * address. + * In case of slave replying, ADDR contains the slave address itself. + * Thus, the master device does not have an address. Packet must be routed to + * master by hardware bus design. + * + * The checksum algorithm used is rotating hash algortihm, quite simple but more + * reliable than simple checksum. + * The checksum in computed on all fields excluding STX, ETX and CHK fields itself. + * Checksum is computed on the packet *before* escaping. + * Escape sequence counts for 1 character only (the escaped one). + */ + +#include "pocketbus.h" + +#include "cfg/cfg_pocketbus.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL POCKETBUS_LOG_LEVEL +#define LOG_VERBOSITY POCKETBUS_LOG_FORMAT +#include +#include +#include + +#include + +#include + +#include + +/** + * Send a character over pocketBus channel stream, handling escape mode. + */ +void pocketbus_putchar(struct PocketBusCtx *ctx, uint8_t c) +{ + /* Update checksum */ + rotating_update1(c, &ctx->out_cks); + + /* Escape characters with special meaning */ + if (c == POCKETBUS_ESC || c == POCKETBUS_STX || c == POCKETBUS_ETX) + kfile_putc(POCKETBUS_ESC, ctx->fd); + + kfile_putc(c, ctx->fd); +} + +/** + * Send pocketBus packet header. + */ +void pocketbus_begin(struct PocketBusCtx *ctx, pocketbus_addr_t addr) +{ + PocketBusHdr hdr; + + hdr.ver = POCKETBUS_VER; + hdr.addr = cpu_to_be16(addr); + rotating_init(&ctx->out_cks); + + /* Send STX */ + kfile_putc(POCKETBUS_STX, ctx->fd); + + /* Send header */ + pocketbus_write(ctx, &hdr, sizeof(hdr)); +} + +/** + * Send buffer \a _data over bus, handling escape. + */ +void pocketbus_write(struct PocketBusCtx *ctx, const void *_data, size_t len) +{ + const uint8_t *data = (const uint8_t *)_data; + + while (len--) + pocketbus_putchar(ctx, *data++); +} + +/** + * Send pocketBus packet tail. + */ +void pocketbus_end(struct PocketBusCtx *ctx) +{ + /* Send checksum */ + rotating_t cks = cpu_to_be16(ctx->out_cks); + pocketbus_write(ctx, &cks, sizeof(cks)); + + /* Send ETX */ + kfile_putc(POCKETBUS_ETX, ctx->fd); +} + +/** + * Send buffer of \a data to address \a addr with a pocketBus packet over channel stream. + */ +void pocketbus_send(struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len) +{ + pocketbus_begin(ctx, addr); + + /* Send data */ + pocketbus_write(ctx, data, len); + + pocketbus_end(ctx); +} + + +/** + * Try to read a packet from the pocketBus. + * \return true if a packet is received, false otherwise. + */ +bool pocketbus_recv(struct PocketBusCtx *ctx, struct PocketMsg *msg) +{ + int c; + + /* Process incoming characters until buffer is not empty */ + while ((c = kfile_getc(ctx->fd)) != EOF) + { + /* Look for STX char */ + if (c == POCKETBUS_STX && !ctx->escape) + { + /* When an STX is found, inconditionally start a new packet */ + if (ctx->sync) + kprintf("pocketBus double sync!\n"); + + ctx->sync = true; + ctx->len = 0; + rotating_init(&ctx->in_cks); + continue; + } + + if (ctx->sync) + { + /* Handle escape mode */ + if (c == POCKETBUS_ESC && !ctx->escape) + { + ctx->escape = true; + continue; + } + + /* Handle message end */ + if (c == POCKETBUS_ETX && !ctx->escape) + { + ctx->sync = false; + + /* Check minimum size */ + if (ctx->len < sizeof(PocketBusHdr) + sizeof(rotating_t)) + { + kprintf("pocketBus short pkt!\n"); + continue; + } + + /* Remove checksum bytes from packet len */ + ctx->len -= sizeof(rotating_t); + + /* Compute checksum */ + rotating_update(ctx->buf, ctx->len, &ctx->in_cks); + uint8_t cks_h = *(ctx->buf + ctx->len); + uint8_t cks_l = *(ctx->buf + ctx->len + 1); + + rotating_t recv_cks = (cks_h << 8) | cks_l; + + /* Checksum check */ + if (recv_cks == ctx->in_cks) + { + PocketBusHdr *hdr = (PocketBusHdr *)ctx; + + /* Check packet version */ + if (hdr->ver == POCKETBUS_VER) + { + /* Packet received, set msg fields */ + msg->payload = ctx->buf + sizeof(PocketBusHdr); + msg->addr = be16_to_cpu(hdr->addr); + msg->len = ctx->len - sizeof(PocketBusHdr); + msg->ctx = ctx; + return true; + } + else + { + kprintf("pocketBus version mismatch, here[%d], there[%d]\n", POCKETBUS_VER, hdr->ver); + continue; + } + } + else + { + kprintf("pocketBus cks error, here[%04X], there[%04X]\n", ctx->in_cks, recv_cks); + continue; + } + + } + + ctx->escape = false; + + /* Check buffer overflow: simply ignore + received data and go to unsynced state. */ + if (ctx->len >= CONFIG_POCKETBUS_BUFLEN) + { + kprintf("pocketBus buffer overflow\n"); + ctx->sync = false; + continue; + } + + /* Put received data in the buffer */ + ctx->buf[ctx->len] = c; + ctx->len++; + } + } + + /* + * Check stream status. + */ + if (kfile_error(ctx->fd)) + { + LOG_ERR("fd status[%04X]\n", kfile_error(ctx->fd)); + kfile_clearerr(ctx->fd); + } + + return false; +} + + +/** + * Initialize pocketBus protocol handler. + */ +void pocketbus_init(struct PocketBusCtx *ctx, struct KFile *fd) +{ + ASSERT(ctx); + ASSERT(fd); + + memset(ctx, 0, sizeof(*ctx)); + ctx->fd = fd; +} diff --git a/2.5/bertos/net/pocketbus.h b/2.5/bertos/net/pocketbus.h new file mode 100644 index 00000000..e67f2634 --- /dev/null +++ b/2.5/bertos/net/pocketbus.h @@ -0,0 +1,130 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Francesco Sacchi + * + * \brief Basical functions to use pocketBus protocol. + * + * $WIZ$ module_name = "pocketbus" + * $WIZ$ module_depends = "rotating_hash", "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_pocketbus.h" + */ + +#ifndef NET_POCKETBUS_H +#define NET_POCKETBUS_H + +#include "cfg/cfg_pocketbus.h" /* for CONFIG_POCKETBUS_BUFLEN */ +#include + +#include + +#include + +/** + * pocketBus special characters definitions. + * \{ + */ +#define POCKETBUS_STX 0x02 //ASCII STX +#define POCKETBUS_ETX 0x03 //ASCII ETX +#define POCKETBUS_ESC 0x1B //ASCII ESC +#define POCKETBUS_ACK 0x06 //ASCII ACK +#define POCKETBUS_NAK 0x15 //ASCII NAK +/*\}*/ + +#define POCKETBUS_BROADCAST_ADDR 0xFFFF ///< pocketBus broadcast address + +/** + * Type for pocketBus length. + */ +typedef uint16_t pocketbus_len_t; + +/** + * Type for pocketBus addresses. + */ +typedef uint16_t pocketbus_addr_t; + +/** + * Header of pocketBus messages. + */ +typedef struct PocketBusHdr +{ + #define POCKETBUS_VER 1 + uint8_t ver; ///< packet version + pocketbus_addr_t addr; ///< slave address +} PocketBusHdr; + +/** + * pocketBus context structure. + */ +typedef struct PocketBusCtx +{ + uint8_t buf[CONFIG_POCKETBUS_BUFLEN]; ///< receiving Buffer + struct KFile *fd; ///< File descriptor + bool sync; ///< Status flag: true if we have received an STX, false otherwise + bool escape; ///< Status flag: true if we are in escape mode, false otherwise + rotating_t in_cks; ///< Checksum computation for received data. + rotating_t out_cks; ///< Checksum computation for transmitted data. + pocketbus_len_t len; ///< Received length +} PocketBusCtx; + +STATIC_ASSERT(offsetof(PocketBusCtx, buf) == 0); +/** + * Structure holding pocketBus message parameters. + */ +typedef struct PocketMsg +{ + struct PocketBusCtx *ctx; ///< pocketBus message context + pocketbus_addr_t addr; ///< address for received packet + pocketbus_len_t len; ///< payload length + const uint8_t *payload; ///< payload data +} PocketMsg; + +/** + * This ensure that endianess convertion functions work on + * the right data size. + * \{ + */ +STATIC_ASSERT(sizeof(pocketbus_addr_t) == sizeof(uint16_t)); +STATIC_ASSERT(sizeof(rotating_t) == sizeof(uint16_t)); +/*\}*/ + +void pocketbus_putchar(struct PocketBusCtx *ctx, uint8_t c); +void pocketbus_begin(struct PocketBusCtx *ctx, pocketbus_addr_t addr); +void pocketbus_write(struct PocketBusCtx *ctx, const void *_data, size_t len); +void pocketbus_end(struct PocketBusCtx *ctx); + +void pocketbus_send(struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len); +bool pocketbus_recv(struct PocketBusCtx *ctx, struct PocketMsg *msg); +void pocketbus_init(struct PocketBusCtx *ctx, struct KFile *fd); + +#endif /* NET_POCKETBUS_H */ diff --git a/2.5/bertos/net/pocketcmd.c b/2.5/bertos/net/pocketcmd.c new file mode 100644 index 00000000..14bdc020 --- /dev/null +++ b/2.5/bertos/net/pocketcmd.c @@ -0,0 +1,229 @@ +/** + * \file + * + * + * \brief pocketBus protocol Command layer implementation. + * + * This module implements command layer over pocketBus + * protocol. + * Payload packets received by pocketBus are first checked for + * address matching. + * If a packet is addressed to us we look for a suitable + * callback function to call. + * + * The received payload format is as follows: + * 
+ * +----------------------------------------+
+ * |  CMD |            DATA                 |
+ * +----------------------------------------+
+ * |      |                                 |
+ * +  2B  +           0..N Byte             +
+ *
+ * + * The CMD ID used is the same supplied by the master when + * the command was sent. + * + * \author Francesco Sacchi + */ + +#include "pocketcmd.h" +#include "pocketbus.h" + +#include "cfg/cfg_pocketbus.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL POCKETBUS_LOG_LEVEL +#define LOG_VERBOSITY POCKETBUS_LOG_FORMAT +#include +#include +#include +#include + +#include + +#include +#include + +#include + +/** + * pocketBus Command poll function. + * Call it to read and process pocketBus commands. + */ +void pocketcmd_poll(struct PocketCmdCtx *ctx) +{ + PocketCmdMsg msg; + while (pocketcmd_recv(ctx, &msg)) + { + /* Check for command callback */ + pocketcmd_hook_t callback = ctx->search(msg.cmd); + + /* Call it if exists */ + if (callback) + callback(&msg); + } +} + + + +/** + * pocketBus Command recv function. + * Call it to read and process pocketBus commands. + */ +bool pocketcmd_recv(struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg) +{ + PocketMsg msg; + + /* Try to read a packet from pocketBus */ + while (pocketbus_recv(ctx->bus_ctx, &msg)) + { + /* Check address */ + if (msg.addr == ctx->addr || + msg.addr == POCKETBUS_BROADCAST_ADDR) + { + + #if CPU_AVR + const PocketCmdHdr *hdr = (const PocketCmdHdr *)msg.payload; + #else + #if !CPU_ARM + #warning Fix alignment problem.. + /* + * The code below make one memcopy, this the only way to + * solve alignment problem on ARM. If you are use other + * architecture you should find other way to optimize + * this code. + */ + #endif + PocketCmdHdr hd; + memcpy(&hd, msg.payload, sizeof(PocketCmdHdr)); + const PocketCmdHdr *hdr = &hd; + #endif + + pocketcmd_t cmd = be16_to_cpu(hdr->cmd); + + /* We're no longer waiting for a reply (in case we were) */ + if (cmd == ctx->waiting) + ctx->waiting = PKTCMD_NULL; + + recv_msg->cmd_ctx = ctx; + recv_msg->cmd = cmd; + recv_msg->len = msg.len - sizeof(PocketCmdHdr); + recv_msg->buf = msg.payload + sizeof(PocketCmdHdr); + + return true; + } + } + + return false; +} + + +/** + * Send command \a cmd to/from slave adding \a len arguments in \a buf. + * Address used is contained in \a ctx->addr . + * If we are master and the message has a reply, you must set \a wait_reply to true. + * \return true if all is ok, false if we are already waiting a replay from another slave. + */ +bool pocketcmd_send(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool wait_reply) +{ + /* Check if we are waiting a reply from someone */ + if (ctx->waiting != PKTCMD_NULL) + { + /* Check is reply timeout is elapsed */ + if (timer_clock() - ctx->reply_timer < ms_to_ticks(CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT)) + { + LOG_ERR("Pkt discard! waiting cmd[%04X]\n", ctx->waiting); + return false; + } + else + { + LOG_INFO("Timeout waiting cmd[%04X]\n", ctx->waiting); + ctx->waiting = PKTCMD_NULL; + } + } + + /* Endianess! */ + cmd = cpu_to_be16(cmd); + + /* Send packet */ + pocketbus_begin(ctx->bus_ctx, ctx->addr); + pocketbus_write(ctx->bus_ctx, &cmd, sizeof(cmd)); + pocketbus_write(ctx->bus_ctx, buf, len); + pocketbus_end(ctx->bus_ctx); + + if (wait_reply) + { + ctx->waiting = be16_to_cpu(cmd); + ctx->reply_timer = timer_clock(); + } + + return true; +} + +/** + * Init pocketBus command layer. + * \a ctx is pocketBus command layer context. + * \a bus_ctx is pocketBus context. + * \a addr is slave address (see pocketcmd_setAddr for details.) + * \a search is the lookup function used to search command ID callbacks. + */ +void pocketcmd_init(struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search) +{ + ASSERT(ctx); + ASSERT(bus_ctx); + ASSERT(search); + MOD_CHECK(timer); + + memset(ctx, 0, sizeof(*ctx)); + ctx->bus_ctx = bus_ctx; + ctx->search = search; + pocketcmd_setAddr(ctx, addr); +} + +/** + * Helper function used to reply to master with an ACK. + */ +void pocketcmd_replyAck(struct PocketCmdMsg *msg) +{ + uint8_t ack[] = { POCKETBUS_ACK }; + + pocketcmd_slaveReply(msg->cmd_ctx, msg->cmd, ack, sizeof(ack)); +} + +/** + * Helper function used to reply to master with a NAK. + */ +void pocketcmd_replyNak(struct PocketCmdMsg *msg) +{ + uint8_t nak[] = { POCKETBUS_NAK }; + + pocketcmd_slaveReply(msg->cmd_ctx, msg->cmd, nak, sizeof(nak)); +} + diff --git a/2.5/bertos/net/pocketcmd.h b/2.5/bertos/net/pocketcmd.h new file mode 100644 index 00000000..8bfd5e09 --- /dev/null +++ b/2.5/bertos/net/pocketcmd.h @@ -0,0 +1,149 @@ +/** + * \file + * + * + * \brief PocketBus command abstraction layer. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "pocketcmd" + * $WIZ$ module_depends = "timer", "pocketbus" + */ + +#ifndef NET_POCKETCMD_H +#define NET_POCKETCMD_H + +#include "pocketbus.h" +#include + +#define PKTCMD_NULL 0 ///< pocketBus Null command + +typedef uint16_t pocketcmd_t; ///< Type for Command IDs + +/** + * Header for transmitted pocketBus Commands. + */ +typedef struct PocketCmdHdr +{ + pocketcmd_t cmd; ///< command ID +} PocketCmdHdr; + +/** + * This ensure that endianess convertion functions work on + * the right data size. + * \{ + */ +STATIC_ASSERT(sizeof(pocketcmd_t) == sizeof(uint16_t)); +/*\}*/ + +/* fwd declaration */ +struct PocketCmdCtx; + +/** + * pocketBus command message structure. + */ +typedef struct PocketCmdMsg +{ + struct PocketCmdCtx *cmd_ctx; ///< command context + pocketcmd_t cmd; ///< command id + pocketbus_len_t len; ///< optional arg length + const uint8_t *buf; ///< optional arguments +} PocketCmdMsg; + +/** + * Type for command hooks. + */ +typedef void (*pocketcmd_hook_t)(struct PocketCmdMsg *cmd_msg); + +/** + * Type for lookup function hooks. + */ +typedef pocketcmd_hook_t (*pocketcmd_lookup_t)(pocketcmd_t cmd); + +/** + * pocketBus context for command layer communications. + */ +typedef struct PocketCmdCtx +{ + struct PocketBusCtx *bus_ctx; ///< pocketBus context + pocketbus_addr_t addr; ///< Our address + pocketcmd_lookup_t search; ///< Lookup function used to search for command callbacks + pocketcmd_t waiting; ///< The command ID we are waiting for or PKTCMD_NULL. + ticks_t reply_timer; ///< For waiting_reply +} PocketCmdCtx; + +/** + * Set slave address \a addr for pocketBus command layer. + * If we are a slave this is *our* address. + * If we are the master this is the slave address to send messages to. + */ +INLINE void pocketcmd_setAddr(struct PocketCmdCtx *ctx, pocketbus_addr_t addr) +{ + ctx->addr = addr; +} + +void pocketcmd_init(struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search); +void pocketcmd_poll(struct PocketCmdCtx *ctx); +bool pocketcmd_send(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool has_replay); +bool pocketcmd_recv(struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg); +void pocketcmd_replyNak(struct PocketCmdMsg *msg); +void pocketcmd_replyAck(struct PocketCmdMsg *msg); + +/** + * Helper function used by master to send a command to slave \a addr. + */ +INLINE bool pocketcmd_masterSend(struct PocketCmdCtx *ctx, pocketbus_addr_t addr, pocketcmd_t cmd, const void *buf, size_t len) +{ + pocketcmd_setAddr(ctx, addr); + return pocketcmd_send(ctx, cmd, buf, len, true); +} + +/** + * Helper function used by slave to reply to a master command. + */ +INLINE bool pocketcmd_slaveReply(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len) +{ + return pocketcmd_send(ctx, cmd, buf, len, false); +} + +/** + * Return true if message contain NAK. + */ +INLINE bool pocketcmd_checkNak(struct PocketCmdMsg *msg) +{ + if (msg->buf[0] == POCKETBUS_NAK) + return true; + + return false; +} + + + +#endif /* NET_POCKETCMD_H */ diff --git a/2.5/bertos/net/xmodem.c b/2.5/bertos/net/xmodem.c new file mode 100644 index 00000000..ce8d038e --- /dev/null +++ b/2.5/bertos/net/xmodem.c @@ -0,0 +1,436 @@ +/** + * \file + * + * + * \brief X-Modem serial transmission protocol (implementation) + * + * Supports the CRC-16 and 1K-blocks variants of the standard. + * \see ymodem.txt for the protocol description. + * + * \todo Break xmodem_send() and xmodem_recv() in smaller functions. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + + +#include "xmodem.h" + +#include "cfg/cfg_xmodem.h" + +#include +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_XMODEM_LOG_LEVEL +#define LOG_FORMAT CONFIG_XMODEM_LOG_FORMAT +#include + + +#include + +#include /* for memset() */ + +/** + * \name Protocol control codes + * \{ + */ +#define XM_SOH 0x01 /**< Start Of Header (128-byte block) */ +#define XM_STX 0x02 /**< Start Of Header (1024-byte block) */ +#define XM_EOT 0x04 /**< End Of Transmission */ +#define XM_ACK 0x06 /**< Acknowledge block */ +#define XM_NAK 0x15 /**< Negative Acknowledge */ +#define XM_C 0x43 /**< Request CRC-16 transmission */ +#define XM_CAN 0x18 /**< CANcel transmission */ +/*\}*/ + +#if CONFIG_XMODEM_1KCRC == 1 + #define XM_BUFSIZE 1024 /**< 1024 bytes of block buffer */ +#else + #define XM_BUFSIZE 128 /**< 128 bytes of block buffer */ +#endif + + +#if CONFIG_XMODEM_RECV +/** + * \brief Receive a file using the XModem protocol. + * + * \param ch Channel to use for transfer + * \param fd Destination file + * + * \note This function allocates a large amount of stack (\see XM_BUFSIZE). + */ +bool xmodem_recv(KFile *ch, KFile *fd) +{ + char block_buffer[XM_BUFSIZE]; /* Buffer to hold a block of data */ + int c, i, blocksize; + int blocknr = 0, last_block_done = 0, retries = 0; + char *buf; + uint8_t checksum; + uint16_t crc; + bool purge = false; + bool usecrc = true; + + + LOG_INFO("Starting Transfer...\n"); + purge = true; + kfile_clearerr(ch); + + /* Send initial NAK to start transmission */ + for(;;) + { + if (XMODEM_CHECK_ABORT) + { + kfile_putc(XM_CAN, ch); + kfile_putc(XM_CAN, ch); + LOG_INFO("Transfer aborted\n"); + return false; + } + + /* + * Discard incoming input until a timeout occurs, then send + * a NAK to the transmitter. + */ + if (purge) + { + purge = false; + + if (kfile_error(ch)) + { + LOG_ERR("Retries %d\n", retries); + } + + kfile_resync(ch, 200); + retries++; + + if (retries >= CONFIG_XMODEM_MAXRETRIES) + { + kfile_putc(XM_CAN, ch); + kfile_putc(XM_CAN, ch); + LOG_INFO("Transfer aborted\n"); + return false; + } + + /* Transmission start? */ + if (blocknr == 0) + { + if (retries < CONFIG_XMODEM_MAXCRCRETRIES) + { + LOG_INFO("Request Tx (CRC)\n"); + kfile_putc(XM_C, ch); + } + else + { + /* Give up with CRC and fall back to checksum */ + usecrc = false; + LOG_INFO("Request Tx (BCC)\n"); + kfile_putc(XM_NAK, ch); + } + } + else + kfile_putc(XM_NAK, ch); + } + + switch (kfile_getc(ch)) + { + #if XM_BUFSIZE >= 1024 + case XM_STX: /* Start of header (1024-byte block) */ + blocksize = 1024; + goto getblock; + #endif + + case XM_SOH: /* Start of header (128-byte block) */ + blocksize = 128; + /* Needed to avoid warning if XM_BUFSIZE < 1024 */ + + getblock: + /* Get block number */ + c = kfile_getc(ch); + + /* Check complemented block number */ + if ((~c & 0xff) != kfile_getc(ch)) + { + LOG_WARN("Bad blk (%d)\n", c); + purge = true; + break; + } + + /* Determine which block is being sent */ + if (c == (blocknr & 0xff)) + { + /* Last block repeated */ + LOG_INFO("Repeat blk %d\n", blocknr); + } + else if (c == ((blocknr + 1) & 0xff)) + { + /* Next block */ + LOG_INFO("Recv blk %d\n", ++blocknr); + } + else + { + /* Sync lost */ + LOG_WARN("Sync lost (%d/%d)\n", c, blocknr); + purge = true; + break; + } + + buf = block_buffer; /* Reset pointer to start of buffer */ + checksum = 0; + crc = 0; + for (i = 0; i < blocksize; i++) + { + if ((c = kfile_getc(ch)) == EOF) + { + purge = true; + break; + } + + /* Store in buffer */ + *buf++ = (char)c; + + /* Calculate block checksum or CRC */ + if (usecrc) + crc = UPDCRC16(c, crc); + else + checksum += (char)c; + } + + if (purge) + break; + + /* Get the checksum byte or the CRC-16 MSB */ + if ((c = kfile_getc(ch)) == EOF) + { + purge = true; + break; + } + + if (usecrc) + { + crc = UPDCRC16(c, crc); + + /* Get CRC-16 LSB */ + if ((c = kfile_getc(ch)) == EOF) + { + purge = true; + break; + } + + crc = UPDCRC16(c, crc); + + if (crc) + { + LOG_ERR("Bad CRC: %04x\n", crc); + purge = true; + break; + } + } + /* Compare the checksum */ + else if (c != checksum) + { + LOG_ERR("Bad sum: %04x/%04x\n", checksum, c); + purge = true; + break; + } + + /* + * Avoid flushing the same block twice. + * This could happen when the sender does not receive our + * acknowledge and resends the same block. + */ + if (last_block_done < blocknr) + { + /* Call user function to flush the buffer */ + if (kfile_write(fd, block_buffer, blocksize)) + { + /* Acknowledge block and clear error counter */ + kfile_putc(XM_ACK, ch); + retries = 0; + last_block_done = blocknr; + } + else + { + /* User callback failed: abort transfer immediately */ + retries = CONFIG_XMODEM_MAXRETRIES; + purge = true; + } + } + break; + + case XM_EOT: /* End of transmission */ + kfile_putc(XM_ACK, ch); + LOG_INFO("Transfer completed\n"); + return true; + + case EOF: /* Timeout or serial error */ + purge = true; + break; + + default: + LOG_INFO("Skipping garbage\n"); + purge = true; + break; + } + } /* End forever */ +} +#endif + + +#if CONFIG_XMODEM_SEND +/** + * \brief Transmit some data using the XModem protocol. + * + * \param ch Channel to use for transfer + * \param fd Source file + * + * \note This function allocates a large amount of stack for + * the XModem transfer buffer (\see XM_BUFSIZE). + */ +bool xmodem_send(KFile *ch, KFile *fd) +{ + char block_buffer[XM_BUFSIZE]; /* Buffer to hold a block of data */ + size_t size = -1; + int blocknr = 1, retries = 0, c, i; + bool proceed, usecrc = false; + uint16_t crc; + uint8_t sum; + + /* + * Reading a block can be very slow, so we read the first block early + * to avoid receiving double XM_C char. + * This could happen if we check for XM_C and then read the block, giving + * the receiving device time to send another XM_C char misinterpretating + * the blocks sent. + */ + size = kfile_read(fd, block_buffer, XM_BUFSIZE); + + kfile_clearerr(ch); + LOG_INFO("Wait remote host\n"); + + for(;;) + { + proceed = false; + do + { + if (XMODEM_CHECK_ABORT) + return false; + + switch (c = kfile_getc(ch)) + { + case XM_NAK: + LOG_INFO("Resend blk %d\n", blocknr); + proceed = true; + break; + + case XM_C: + if (c == XM_C) + { + LOG_INFO("Tx start (CRC)\n"); + usecrc = true; + } + else + { + LOG_INFO("Tx start (BCC)\n"); + } + + proceed = true; + break; + + case XM_ACK: + /* End of transfer? */ + if (!size) + return true; + + /* Call user function to read in one block */ + size = kfile_read(fd, block_buffer, XM_BUFSIZE); + LOG_INFO("Send blk %d\n", blocknr); + blocknr++; + retries = 0; + proceed = true; + break; + + case EOF: + kfile_clearerr(ch); + retries++; + LOG_INFO("Retries %d\n", retries); + if (retries <= CONFIG_XMODEM_MAXRETRIES) + break; + /* falling through! */ + + case XM_CAN: + LOG_INFO("Transfer aborted\n"); + return false; + + default: + LOG_INFO("Skipping garbage\n"); + break; + } + } + while (!proceed); + + if (!size) + { + kfile_putc(XM_EOT, ch); + continue; + } + + /* Pad block with 0xFF if it's partially full */ + memset(block_buffer + size, 0xFF, XM_BUFSIZE - size); + + /* Send block header (STX, blocknr, ~blocknr) */ + #if XM_BUFSIZE == 128 + kfile_putc(XM_SOH, ch); + #else + kfile_putc(XM_STX, ch); + #endif + kfile_putc(blocknr & 0xFF, ch); + kfile_putc(~blocknr & 0xFF, ch); + + /* Send block and compute its CRC/checksum */ + sum = 0; + crc = 0; + for (i = 0; i < XM_BUFSIZE; i++) + { + kfile_putc(block_buffer[i], ch); + crc = UPDCRC16(block_buffer[i], crc); + sum += block_buffer[i]; + } + + /* Send CRC/Checksum */ + if (usecrc) + { + kfile_putc(crc >> 8, ch); + kfile_putc(crc & 0xFF, ch); + } + else + kfile_putc(sum, ch); + } +} +#endif diff --git a/2.5/bertos/net/xmodem.h b/2.5/bertos/net/xmodem.h new file mode 100644 index 00000000..db27cf41 --- /dev/null +++ b/2.5/bertos/net/xmodem.h @@ -0,0 +1,63 @@ +/** + * \file + * + * \brief X-Modem serial transmission protocol. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * + * $WIZ$ module_name = "xmodem" + * $WIZ$ module_depends = "kfile", "crc16" + * $WIZ$ module_configuration = "bertos/cfg/cfg_xmodem.h" + */ + + +#ifndef NET_XMODEM_H +#define NET_XMODEM_H + +#include +#include + +/** + * Called to know if we want to abort data tranfer. + * Redefine to whatever you need. + * \{ + */ +#ifndef XMODEM_CHECK_ABORT +#define XMODEM_CHECK_ABORT (false) +#endif +/*\}*/ + +bool xmodem_recv(KFile *ch, KFile *fd); +bool xmodem_send(KFile *ch, KFile *fd); + +#endif /* NET_XMODEM_H */ diff --git a/2.5/bertos/os/hptime.c b/2.5/bertos/os/hptime.c new file mode 100644 index 00000000..23807580 --- /dev/null +++ b/2.5/bertos/os/hptime.c @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Portable abstraction for high-resolution time handling (implementation) + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#include "hptime.h" + +#if defined(_WIN32) + +#include + +hptime_t hptime_get(void) +{ + FILETIME ft; + + /* + * La precisione dei FileTime sarebbe 100ns, ma il + * valore viene ottenuto convertendo una struttura + * SYSTEMTIME, che ha precisione di 1ms. Il numero + * che otteniamo e' quindi sempre un multiplo di + * 100000. + */ + GetSystemTimeAsFileTime(&ft); + + /* Copy the upper/lower into a quadword. */ + return (((hptime_t)ft.dwHighDateTime) << 32) + (hptime_t)ft.dwLowDateTime; +} + +#elif defined(__unix__) || (defined(__APPLE__) && defined(__MACH__)) + +#include /* for gettimeofday() */ +#include /* for NULL */ + +hptime_t hptime_get(void) +{ + struct timeval tv; + + gettimeofday(&tv, NULL); + return (hptime_t)tv.tv_sec * HPTIME_TICKS_PER_SECOND + + (hptime_t)tv.tv_usec; +} + +#else /* !__unix__ */ + #error OS dependent support code missing for this OS +#endif /* !__unix__ */ + diff --git a/2.5/bertos/os/hptime.h b/2.5/bertos/os/hptime.h new file mode 100644 index 00000000..d7699d0e --- /dev/null +++ b/2.5/bertos/os/hptime.h @@ -0,0 +1,86 @@ +/** + * \file + * + * + * \brief Portable abstraction for high-resolution time handling (interface) + * + * \author Bernie Innocenti + */ +#ifndef HPTIME_H +#define HPTIME_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#ifdef _WIN32 + + /** our type for "high precision absolute time" */ + typedef __int64 hptime_t; + #define SIZEOF_HPTIME_T 8 + + #define HPTIME_TICKS_PER_SECOND (10000000I64) + #define HPTIME_TICKS_PER_MILLISEC (10000I64) + #define HPTIME_TICKS_PER_MICRO (10I64) + +#elif defined(__unix__) || (defined(__APPLE__) && defined(__MACH__)) + + #include /* int64_t */ + + #ifndef DEVLIB_MTIME_DEFINED + #define DEVLIB_MTIME_DEFINED 1 /* Resolve conflict with */ + typedef int32_t mtime_t; + #define SIZEOF_MTIME_T (32 / CPU_BITS_PER_CHAR) + #define MTIME_INFINITE 0x7FFFFFFFL + #endif + + /** Type for "high precision absolute time". */ + typedef int64_t hptime_t; + #define SIZEOF_HPTIME_T 8 + + #define HPTIME_TICKS_PER_SECOND (1000000LL) + #define HPTIME_TICKS_PER_MILLISEC (1000LL) + #define HPTIME_TICKS_PER_MICRO (1LL) + +#else /* !__unix__ */ + #error OS dependent support code missing for this OS +#endif /* !__unix__ */ + +/** + * Return the current time with the maximum precision made available from the hosting OS + */ +extern hptime_t hptime_get(void); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* HPTIME_H */ diff --git a/2.5/bertos/remote_merge b/2.5/bertos/remote_merge new file mode 100755 index 00000000..5afde9b2 --- /dev/null +++ b/2.5/bertos/remote_merge @@ -0,0 +1,48 @@ +#!/bin/bash +#set -x + +if [ $# -lt 2 ] ; then + printf "\nMerge remote url commits into local BeRTOS svn repository.\n" + printf "Usage: $0 []\n" + printf "If remote end revision is not supplied HEAD will be used.\n" + exit 1 +fi + + +MERGE_URL="$1" +START_REV="$2" +if [ z"$3" = z ] ; then + END_REV=HEAD +else + END_REV="$3" +fi + +#Check for local uncommitted modifications +STATUS=`svn status -q` +if [[ z"$STATUS" != z && "${STATUS:0:1}" != $'\n' ]] ; then + printf "Project has local modifications, it must be clean\n" + exit 1 +fi + +#Get list of revisions to merge. +REV_LIST=`svn log $MERGE_URL -r$START_REV:$END_REV --quiet 2>&1| perl -ne 'if(m/^r([0-9]+)/) {print $1, "\n";}'` + +printf "Merged from external project:\n" > header +for rev in $REV_LIST +do + #Get commit log message only + #svn pg --revprop -r$rev svn:log $MERGE_URL > tmp_msg + + #Get revision commit log with date and author + svn log -r$rev $MERGE_URL > tmp_msg + #Replace leading and trailing banners "---------------------..." + sed -i 's/^-\+/\*\*\*\*\*\*\*\*\*\*/' tmp_msg + #Indent all message + sed -i 's/\(^.*\)/\t\1/' tmp_msg + cat header tmp_msg > commit_msg + #Try to merge ... + svn merge $MERGE_URL -c$rev || exit 1 + #and commit! + svn ci -Fcommit_msg +done +rm -rf header tmp_msg commit_msg diff --git a/2.5/bertos/rules.mk b/2.5/bertos/rules.mk new file mode 100644 index 00000000..8ec098ae --- /dev/null +++ b/2.5/bertos/rules.mk @@ -0,0 +1,408 @@ +# +# $Id$ +# Copyright 2002,2003,2004,2005,2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Based on: +# GCC-AVR standard Makefile part 2 +# Volker Oth 1/2000 +# +# Author: Bernie Innocenti +# + +# Remove all default pattern rules +.SUFFIXES: + +# Verbosity +ifeq ($(V),1) +# Verbose build +Q := +L := @echo >/dev/null +else +# Quiet build +Q := @ +L := @echo +endif + +# Select Bourne Again SHell as default make shell +SHELL := bash + +# Checker build +ifeq ($(C),1) +CC = $(CHECKER) +CFLAGS += -Wundef -D__x86_64__=1 -D__unix__=1 -D__linux__=1 -D__STDC_VERSION__=199901L +endif + +# Initialize $(top_srcdir) with current directory, unless it was already initialized +top_srcdir ?= $(shell pwd) + +# Virtual Product: based on target products may be different. +# e.g. Embedded target = hex, s19, bin +# Hosted = exe +# Library = lib.a +TRG_TGT = $(TRG:%=$(OUTDIR)/%.tgt) + +RECURSIVE_TARGETS = all-recursive install-recursive clean-recursive + +# The default target +.PHONY: all +all:: all-recursive $(TRG_TGT) + +# Generate project documentation +.PHONY: docs +docs: + $L "Building documentation" + $Q $(DOXYGEN) + +# Generate ctags +.PHONY: tags +tags: + $L "Rebuilding C tags database" + $Q ctags -R --exclude=doc + +# Run testsuite +.PHONY: check +check: + $L "Running testsuite" + $Q test/run_tests.sh + +define build_target + +ifeq ($$($(1)_HOSTED),1) + #On Darwin architecture the assembly doesn't link correctly if these flags are set. + ifeq ($(shell uname | grep -c "Darwin"),1) + LIST_FLAGS := "" + MAP_FLAGS := "" + LDFLAGS := "" + endif + #use hosted specific map flags + $(1)_MAP_FLAGS = $$(MAP_FLAGS_HOST) + + #Handle library creation + ifeq ($$($(1)_MAKELIB),1) + $$(OUTDIR)/$(1).tgt : $$(OUTDIR)/$(1).a + else + #Otherwise in hosted application we need only executable file. + $$(OUTDIR)/$(1).tgt : $$(OUTDIR)/$(1) + endif +else + #use embedded specific map flags + $(1)_MAP_FLAGS = $$(MAP_FLAGS_EMB) + #In embedded we need s19, hex and bin + $$(OUTDIR)/$(1).tgt : $$(OUTDIR)/$(1).s19 $$(OUTDIR)/$(1).hex $$(OUTDIR)/$(1).bin +endif + +$(1)_LDFLAGS += $$($(1)_MAP_FLAGS) + +# In embedded systems the target CPU is needed, +# but there are different options on how to pass +# it to the compiler. +ifneq ($$(strip $$($(1)_MCU)),) + $(1)_MCPU = -mmcu=$$($(1)_MCU) +endif +ifneq ($$(strip $$($(1)_CPU)),) + $(1)_MCPU = -mcpu=$$($(1)_CPU) +endif + +# If a CPU is specified add to +# project specific flags. +ifneq ($$($(1)_MCPU),) + $(1)_CFLAGS += $$($(1)_MCPU) + $(1)_CXXFLAGS += $$($(1)_MCPU) + $(1)_ASFLAGS += $$($(1)_MCPU) + $(1)_CPPAFLAGS += $$($(1)_MCPU) + $(1)_LDFLAGS += $$($(1)_MCPU) +endif + +ifneq ($$(strip $$($(1)_LDSCRIPT)),) + $(1)_LDFLAGS += -Wl,-T$$($(1)_LDSCRIPT) +endif + +ifneq ($$($(1)_CROSS),) + #deprecated: use PREFIX, SUFFIX and HOSTED mechanism instead + $(1)_PREFIX = $$($(1)_CROSS) + $(1)_SUFFIX = +endif + +$(1)_CC ?= $$($(1)_PREFIX)$$(CC)$$($(1)_SUFFIX) +$(1)_CXX ?= $$($(1)_PREFIX)$$(CXX)$$($(1)_SUFFIX) +$(1)_AS ?= $$($(1)_PREFIX)$$(AS)$$($(1)_SUFFIX) +$(1)_AR ?= $$($(1)_PREFIX)$$(AR)$$($(1)_SUFFIX) +$(1)_OBJCOPY ?= $$($(1)_PREFIX)$$(OBJCOPY)$$($(1)_SUFFIX) +$(1)_STRIP ?= $$($(1)_PREFIX)$$(STRIP)$$($(1)_SUFFIX) +ifneq ($$(strip $$($(1)_CXXSRC)),) + $(1)_LD = $$($(1)_PREFIX)$$(LDXX)$$($(1)_SUFFIX) +else + $(1)_LD = $$($(1)_PREFIX)$$(LD)$$($(1)_SUFFIX) +endif + +# Debug stuff +ifeq ($$($(1)_DEBUG),1) + # AVR is an harvard processor + # and needs debug module + # to be compiled in program memory + ifeq ($$(findstring avr, $$($(1)_PREFIX)),avr) + $(1)_DEBUGSRC = $(1)_PCSRC + else + $(1)_DEBUGSRC = $(1)_CSRC + endif + + $$($(1)_DEBUGSRC) += bertos/drv/kdebug.c + + # Also add formatwr.c (printf) if not already present + ifneq ($$(findstring formatwr.c, $$($$($(1)_DEBUGSRC))),formatwr.c) + $$($(1)_DEBUGSRC) += bertos/mware/formatwr.c + endif + + # Also add hex.c (for printf) if not already present + ifneq ($$(findstring hex.c, $$($$($(1)_CSRC))),hex.c) + $$($(1)_CSRC) += bertos/mware/hex.c + endif + + $(1)_CFLAGS += -D_DEBUG + $(1)_CXXFLAGS += -D_DEBUG +else + $(1)_CFLAGS += -fomit-frame-pointer + $(1)_CXXFLAGS += -fomit-frame-pointer +endif + +$(1)_COBJ = $$(foreach file,$$($(1)_CSRC:%.c=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_CXXOBJ = $$(foreach file,$$($(1)_CXXSRC:%.cpp=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_PCOBJ = $$(foreach file,$$($(1)_PCSRC:%.c=%_P.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_AOBJ = $$(foreach file,$$($(1)_ASRC:%.s=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_CPPAOBJ = $$(foreach file,$$($(1)_CPPASRC:%.S=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_OBJ := $$($(1)_COBJ) $$($(1)_CXXOBJ) $$($(1)_PCOBJ) $$($(1)_AOBJ) $$($(1)_CPPAOBJ) +$(1)_SRC := $$($(1)_CSRC) $$($(1)_CXXSRC) $$($(1)_PCSRC) $$($(1)_ASRC) $$($(1)_CPPASRC) +OBJ += $$($(1)_OBJ) + +# Sometimes $(CC) is actually set to a C++ compiler in disguise, and it +# would whine if we passed it C-only flags. Checking for the presence of +# "++" in the name is a kludge that seems to work mostly. +ifeq (++,$$(findstring ++,$$($(1)_CC))) + $(1)_REAL_CFLAGS = $$(CXXFLAGS) +else + $(1)_REAL_CFLAGS = $$(CFLAGS) +endif + +# Compile: instructions to create assembler and/or object files from C source +$$($(1)_COBJ) : $$(OBJDIR)/$(1)/%.o : %.c + $L "$(1): Compiling $$< (C)" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -c $$($(1)_REAL_CFLAGS) $$($(1)_CFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CFLAGS) $$< -o $$@ + +# Compile: instructions to create assembler and/or object files from C++ source +$$($(1)_CXXOBJ) : $$(OBJDIR)/$(1)/%.o : %.cpp + $L "$(1): Compiling $$< (C++)" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CXX) -c $$(CXXFLAGS) $$($(1)_CXXFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CXXFLAGS) $$< -o $$@ + +# Generate assembly sources from C files (debug) +$$(OBJDIR)/$(1)/%.s : %.c + $L "$(1): Generating asm source $$<" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -S $$(CFLAGS) $$($(1)_CFLAGS) $$($(1)_CPPFLAGS) $$($$(*F)_CFLAGS) $$< -o $$@ + +# Generate special progmem variant of a source file +$$($(1)_PCOBJ) : $$(OBJDIR)/$(1)/%_P.o : %.c + $L "$(1): Compiling $$< (PROGMEM)" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -c -D_PROGMEM $$(CFLAGS) $$($(1)_CFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CFLAGS) $$< -o $$@ + +# Assemble: instructions to create object file from assembler files +$$($(1)_AOBJ): $$(OBJDIR)/$(1)/%.o : %.s + $L "$(1): Assembling $$<" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_AS) -c $$(ASFLAGS) $$($(1)_ASFLAGS) $$($$(*F)_ASFLAGS) $$< -o $$@ + +$$($(1)_CPPAOBJ): $$(OBJDIR)/$(1)/%.o : %.S + $L "$(1): Assembling with CPP $$<" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -c $$(CPPAFLAGS) $$($(1)_CPPAFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CPPAFLAGS) $$< -o $$@ + + +# Link: instructions to create elf output file from object files +$$(OUTDIR)/$(1).elf $$(OUTDIR)/$(1)_nostrip: bumprev $$($(1)_OBJ) $$($(1)_LDSCRIPT) + $L "$(1): Linking $$@" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_LD) $$($(1)_OBJ) $$(LIB) $$(LDFLAGS) $$($(1)_LDFLAGS) -o $$@ + + +# Instructions to create a static library from object files +$$(OUTDIR)/$(1).a: bumprev $$($(1)_OBJ) + $L "$(1): Creating static library $$@" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_AR) $$(ARFLAGS) $$($(1)_ARFLAGS) $$@ $$($(1)_OBJ) + +# Strip debug info +$$(OUTDIR)/$(1): $$(OUTDIR)/$(1)_nostrip + $L "$(1): Generating stripped executable $$@" + $Q $$($(1)_STRIP) -o $$@ $$^ + +# Compile and link (program-at-a-time) +$$(OUTDIR)/$(1)_whole.elf: bumprev $$($(1)_SRC) $$($(1)_LDSCRIPT) + $L "$(1): Compiling and Linking whole program $$@" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) $$($(1)_SRC) $$(CFLAGS) $$($(1)_CFLAGS) $$(LIB) $$(LDFLAGS) $$($(1)_LDFLAGS) -o $$@ + +# Flash target +.PHONY: flash_$(1) +flash_$(1): $(OUTDIR)/$(1).hex flash_$(1)_local + $L "$(1): Flashing target" + $Q if [ ! -f $$($(1)_FLASH_SCRIPT) ] ; then \ + printf "CLDLG: No flash script found.\n" ; \ + exit 1 ; \ + fi + $Q if [ ! "$$($(1)_PROGRAMMER_TYPE)" == "none" ] ; then \ + PROGRAMMER_CPU=$$($(1)_PROGRAMMER_CPU) PROGRAMMER_TYPE=$$($(1)_PROGRAMMER_TYPE) \ + PROGRAMMER_PORT=$$($(1)_PROGRAMMER_PORT) IMAGE_FILE=$$< \ + $$($(1)_FLASH_SCRIPT) ; \ + else \ + printf "CLDLG: No programmer interface configured, see http://dev.bertos.org/wiki/ProgrammerInterface\n" ; \ + exit 1 ; \ + fi + +.PHONY: flash_$(1)_local +flash_$(1)_local: + +.PHONY: stopflash_$(1) +stopflash_$(1): + $L "$(1): Stopping target flashing" + $Q if [ ! -f $$($(1)_STOPFLASH_SCRIPT) ] ; then \ + printf "CLDLG: No stopflash script found.\n" ; \ + exit 1 ; \ + fi + $Q $$($(1)_STOPFLASH_SCRIPT) ; + + +# Debug target +.PHONY: debug_$(1) +debug_$(1): $(OUTDIR)/$(1).elf + $L "$(1): Debugging target" + $Q if [ ! -f $$($(1)_DEBUG_SCRIPT) ] ; then \ + printf "CLDLG: No debug script found.\n" ; \ + exit 1 ; \ + fi + $Q if [ ! "$$($(1)_PROGRAMMER_TYPE)" == "none" ] ; then \ + PROGRAMMER_CPU=$$($(1)_PROGRAMMER_CPU) PROGRAMMER_TYPE=$$($(1)_PROGRAMMER_TYPE) \ + PROGRAMMER_PORT=$$($(1)_PROGRAMMER_PORT) GDB_PORT=3333 \ + ELF_FILE=$$< \ + $$($(1)_DEBUG_SCRIPT) ; \ + else \ + printf "CLDLG: No programmer interface configured, see http://dev.bertos.org/wiki/ProgrammerInterface\n" ; \ + exit 1 ; \ + fi + +.PHONY: stopdebug_$(1) +stopdebug_$(1): + $L "$(1): Stopping debugger" + $Q if [ ! -f $$($(1)_STOPDEBUG_SCRIPT) ] ; then \ + printf "CLDLG: No stopdebug script found.\n" ; \ + exit 1 ; \ + fi + $Q $$($(1)_STOPDEBUG_SCRIPT) ; + +.PHONY: fuses_$(!) +fuses_$(1): + if [ ! -z "$$($(1)_efuse)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U efuse:w:$$($(1)_efuse):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U efuse:w:$$($(1)_efuse):m ; \ + fi \ + fi + if [ ! -z "$$($(1)_hfuse)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U hfuse:w:$$($(1)_hfuse):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U hfuse:w:$$($(1)_hfuse):m ; \ + fi \ + fi + if [ ! -z "$$($(1)_lfuse)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lfuse:w:$$($(1)_lfuse):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lfuse:w:$$($(1)_lfuse):m ; \ + fi \ + fi + if [ ! -z "$$($(1)_lock)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lock:w:$$($(1)_lock):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lock:w:$$($(1)_lock):m ; \ + fi \ + fi + +$$(OUTDIR)/$(1).hex: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O ihex $$< $$@ + +$$(OUTDIR)/$(1).s19: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O srec $$< $$@ + +$$(OUTDIR)/$(1).bin: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O binary $$< $$@ + +$$(OUTDIR)/$(1).obj: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O avrobj $$< $$@ + +$$(OUTDIR)/$(1).rom: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O $$(FORMAT) $$< $$@ +# $$($(1)_OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" -O $$(FORMAT) $$< $$(@:.rom=.eep) + +endef + +# Generate build rules for all targets +$(foreach t,$(TRG),$(eval $(call build_target,$(t)))) + +# Generate Qt's moc files from headers +# NOTE: moc totally sucks and can generate empty files for some error conditions, +# leading to puzzling linker errors. Kill 'em and abort build. +%_moc.cpp: %.h + $(QT_MOC) -o $@ $< + if [ ! -s $< ]; then \ + rm -f $@; \ + exit 1; \ + fi + + +%.cof: %.elf + $(COFFCONVERT) -O coff-ext-avr $< $@ +# $(COFFCONVERT) -O coff-avr $< $@ # For use with AVRstudio 3 + +#make instruction to delete created files +cleanall: clean +clean: clean-recursive + -$(RM_R) $(OBJDIR) + -$(RM_R) $(OUTDIR) + +$(RECURSIVE_TARGETS): + @target=`echo $@ | sed s/-recursive//`; \ + for dir in $(SUBDIRS); do \ + if [ -e $$dir/configure.in ] || [ -e $$dir/configure.ac ] && [ ! -x $$dir/configure ]; then \ + echo "Running autogen.sh in $$dir..."; \ + ( cd $$dir && chmod a+x autogen.sh && ./autogen.sh && rm -f Makefile || exit 1 ); \ + fi; \ + if [ ! -e $$dir/Makefile ]; then \ + if [ -e "$$dir/build-$(ARCH)" ]; then \ + echo "Running build script in $$dir..."; \ + ( cd $$dir && chmod a+x build && ./build || exit 1 ); \ + else \ + echo "Running configure in $$dir..."; \ + ( cd $$dir && ./configure --prefix=$(PREFIX) || exit 1 ); \ + fi; \ + fi; \ + $(MAKE) -C $$dir $$target || exit 1; \ + done + +BUILDREV_H = buildrev.h + +.PHONY: bumprev +bumprev: + @if [ -e bertos/verstag.c ]; then \ + buildnr=0; \ + if [ -f $(BUILDREV_H) ]; then \ + buildnr=`sed <"$(BUILDREV_H)" -n -e 's/#define VERS_BUILD \([0-9][0-9]*\)/\1/p'`; \ + fi; \ + buildnr=`expr $$buildnr + 1`; \ + buildhost=`hostname | sed -n -e '1h;2,$$H;$${g;s/\n//g;p;}'`; \ + echo "#define VERS_BUILD $$buildnr" >"$(BUILDREV_H)"; \ + echo "#define VERS_HOST \"$$buildhost\"" >>"$(BUILDREV_H)"; \ + echo "Building revision $$buildnr"; \ + fi; \ + # + +# Include dependencies +ifneq ($(strip $(OBJ)),) +-include $(OBJ:%.o=%.d) +endif diff --git a/2.5/bertos/struct/fifobuf.h b/2.5/bertos/struct/fifobuf.h new file mode 100644 index 00000000..a749d89f --- /dev/null +++ b/2.5/bertos/struct/fifobuf.h @@ -0,0 +1,358 @@ +/** + * \file + * + * + * \brief General pourpose FIFO buffer implemented with a ring buffer + * + * \li \c begin points to the first buffer element; + * \li \c end points to the last buffer element (unlike the STL convention); + * \li \c head points to the element to be extracted next; + * \li \c tail points to the location following the last insertion; + * \li when any of the pointers advances beyond \c end, it is reset + * back to \c begin. + * + * \code + * + * +-----------------------------------+ + * | empty | valid data | empty | + * +-----------------------------------+ + * ^ ^ ^ ^ + * begin head tail end + * + * \endcode + * + * The buffer is EMPTY when \c head and \c tail point to the same location: + * \code head == tail \endcode + * + * The buffer is FULL when \c tail points to the location immediately + * after \c head: + * \code tail == head - 1 \endcode + * + * The buffer is also FULL when \c tail points to the last buffer + * location and head points to the first one: + * \code head == begin && tail == end \endcode + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef STRUCT_FIFO_H +#define STRUCT_FIFO_H + +#include +#include +#include + +typedef struct FIFOBuffer +{ + unsigned char * volatile head; + unsigned char * volatile tail; + unsigned char *begin; + unsigned char *end; +} FIFOBuffer; + + +#define ASSERT_VALID_FIFO(fifo) \ + ATOMIC( \ + ASSERT((fifo)->head >= (fifo)->begin); \ + ASSERT((fifo)->head <= (fifo)->end); \ + ASSERT((fifo)->tail >= (fifo)->begin); \ + ASSERT((fifo)->tail <= (fifo)->end); \ + ) + + +/** + * Check whether the fifo is empty + * + * \note Calling fifo_isempty() is safe while a concurrent + * execution context is calling fifo_push() or fifo_pop() + * only if the CPU can atomically update a pointer + * (which the AVR and other 8-bit processors can't do). + * + * \sa fifo_isempty_locked + */ +INLINE bool fifo_isempty(const FIFOBuffer *fb) +{ + //ASSERT_VALID_FIFO(fb); + return fb->head == fb->tail; +} + + +/** + * Check whether the fifo is full + * + * \note Calling fifo_isfull() is safe while a concurrent + * execution context is calling fifo_pop() and the + * CPU can update a pointer atomically. + * It is NOT safe when the other context calls + * fifo_push(). + * This limitation is not usually problematic in a + * consumer/producer scenario because the + * fifo_isfull() and fifo_push() are usually called + * in the producer context. + */ +INLINE bool fifo_isfull(const FIFOBuffer *fb) +{ + //ASSERT_VALID_FIFO(fb); + return + ((fb->head == fb->begin) && (fb->tail == fb->end)) + || (fb->tail == fb->head - 1); +} + + +/** + * Push a character on the fifo buffer. + * + * \note Calling \c fifo_push() on a full buffer is undefined. + * The caller must make sure the buffer has at least + * one free slot before calling this function. + * + * \note It is safe to call fifo_pop() and fifo_push() from + * concurrent contexts, unless the CPU can't update + * a pointer atomically (which the AVR and other 8-bit + * processors can't do). + * + * \sa fifo_push_locked + */ +INLINE void fifo_push(FIFOBuffer *fb, unsigned char c) +{ +#ifdef __MWERKS__ +#pragma interrupt called +#endif + //ASSERT_VALID_FIFO(fb); + + /* Write at tail position */ + *(fb->tail) = c; + + if (UNLIKELY(fb->tail == fb->end)) + /* wrap tail around */ + fb->tail = fb->begin; + else + /* Move tail forward */ + fb->tail++; +} + + +/** + * Pop a character from the fifo buffer. + * + * \note Calling \c fifo_pop() on an empty buffer is undefined. + * The caller must make sure the buffer contains at least + * one character before calling this function. + * + * \note It is safe to call fifo_pop() and fifo_push() from + * concurrent contexts. + */ +INLINE unsigned char fifo_pop(FIFOBuffer *fb) +{ +#ifdef __MWERKS__ +#pragma interrupt called +#endif + //ASSERT_VALID_FIFO(fb); + + if (UNLIKELY(fb->head == fb->end)) + { + /* wrap head around */ + fb->head = fb->begin; + return *(fb->end); + } + else + /* move head forward */ + return *(fb->head++); +} + + +/** + * Make the fifo empty, discarding all its current contents. + */ +INLINE void fifo_flush(FIFOBuffer *fb) +{ + //ASSERT_VALID_FIFO(fb); + fb->head = fb->tail; +} + + +#if CPU_REG_BITS >= CPU_BITS_PER_PTR + + /* + * 16/32bit CPUs that can update a pointer with a single write + * operation, no need to disable interrupts. + */ + #define fifo_isempty_locked(fb) fifo_isempty((fb)) + #define fifo_push_locked(fb, c) fifo_push((fb), (c)) + #define fifo_pop_locked(fb) fifo_pop((fb)) + #define fifo_flush_locked(fb) fifo_flush((fb)) + +#else /* CPU_REG_BITS < CPU_BITS_PER_PTR */ + + /** + * Similar to fifo_isempty(), but with stronger guarantees for + * concurrent access between user and interrupt code. + * + * \note This is actually only needed for 8-bit processors. + * + * \sa fifo_isempty() + */ + INLINE bool fifo_isempty_locked(const FIFOBuffer *fb) + { + bool result; + ATOMIC(result = fifo_isempty(fb)); + return result; + } + + + /** + * Similar to fifo_push(), but with stronger guarantees for + * concurrent access between user and interrupt code. + * + * \note This is actually only needed for 8-bit processors. + * + * \sa fifo_push() + */ + INLINE void fifo_push_locked(FIFOBuffer *fb, unsigned char c) + { + ATOMIC(fifo_push(fb, c)); + } + + /* Probably not really needed, but hard to prove. */ + INLINE unsigned char fifo_pop_locked(FIFOBuffer *fb) + { + unsigned char c; + ATOMIC(c = fifo_pop(fb)); + return c; + } + + /** + * Similar to fifo_flush(), but with stronger guarantees for + * concurrent access between user and interrupt code. + * + * \note This is actually only needed for 8-bit processors. + * + * \sa fifo_flush() + */ + INLINE void fifo_flush_locked(FIFOBuffer *fb) + { + ATOMIC(fifo_flush(fb)); + } + +#endif /* CPU_REG_BITS < BITS_PER_PTR */ + + +/** + * Thread safe version of fifo_isfull() + */ +INLINE bool fifo_isfull_locked(const FIFOBuffer *_fb) +{ + bool result; + ATOMIC(result = fifo_isfull(_fb)); + return result; +} + + +/** + * FIFO Initialization. + */ +INLINE void fifo_init(FIFOBuffer *fb, unsigned char *buf, size_t size) +{ + /* FIFO buffers have a known bug with 1-byte buffers. */ + ASSERT(size > 1); + + fb->head = fb->tail = fb->begin = buf; + fb->end = buf + size - 1; +} + +/** + * \return Lenght of the FIFOBuffer \a fb. + */ +INLINE size_t fifo_len(FIFOBuffer *fb) +{ + return fb->end - fb->begin; +} + + +#if 0 + +/* + * UNTESTED: if uncommented, to be moved in fifobuf.c + */ +void fifo_pushblock(FIFOBuffer *fb, unsigned char *block, size_t len) +{ + size_t freelen; + + /* Se c'e' spazio da tail alla fine del buffer */ + if (fb->tail >= fb->head) + { + freelen = fb->end - fb->tail + 1; + + /* C'e' abbastanza spazio per scrivere tutto il blocco? */ + if (freelen < len) + { + /* Scrivi quello che entra fino alla fine del buffer */ + memcpy(fb->tail, block, freelen); + block += freelen; + len -= freelen; + fb->tail = fb->begin; + } + else + { + /* Scrivi tutto il blocco */ + memcpy(fb->tail, block, len); + fb->tail += len; + return; + } + } + + for(;;) + { + while (!(freelen = fb->head - fb->tail - 1)) + Delay(FIFO_POLLDELAY); + + /* C'e' abbastanza spazio per scrivere tutto il blocco? */ + if (freelen < len) + { + /* Scrivi quello che entra fino alla fine del buffer */ + memcpy(fb->tail, block, freelen); + block += freelen; + len -= freelen; + fb->tail += freelen; + } + else + { + /* Scrivi tutto il blocco */ + memcpy(fb->tail, block, len); + fb->tail += len; + return; + } + } +} +#endif + +#endif /* STRUCT_FIFO_H */ diff --git a/2.5/bertos/struct/hashtable.c b/2.5/bertos/struct/hashtable.c new file mode 100644 index 00000000..d895fe75 --- /dev/null +++ b/2.5/bertos/struct/hashtable.c @@ -0,0 +1,287 @@ +/** + * \file + * + * + * \brief Portable hash table implementation + * + * Some rationales of our choices in implementation: + * + * \li For embedded systems, it is vital to allocate the table in static memory. To do + * so, it is necessary to expose the \c HashNode and \c HashTable structures in the header file. + * Nevertheless, they should be used as opaque types (that is, the users should not + * access the structure fields directly). + * + * \li To statically allocate the structures, a macro is provided. With this macro, we + * are hiding completely \c HashNode to the user (who only manipulates \c HashTable). Without + * the macro, the user would have had to define both the \c HashNode and the \c HashTable + * manually, and pass both of them to \c ht_init() (which would have created the link between + * the two). Instead, the link is created with a literal initialization. + * + * \li The hash table is created as power of two to remove the divisions from the code. + * Of course, hash functions work at their best when the table size is a prime number. + * When calculating the modulus to convert the hash value to an index, the actual operation + * becomes a bitwise AND: this is fast, but truncates the value losing bits. Thus, the higher + * bits are first "merged" with the lower bits through some XOR operations (see the last line of + * \c calc_hash()). + * + * \li To minimize the memory occupation, there is no flag to set for the empty node. An + * empty node is recognized by its data pointer set to NULL. It is then invalid to store + * NULL as data pointer in the table. + * + * \li The visiting interface through iterators is implemented with pass-by-value semantic. + * While this is overkill for medium-to-stupid compilers, it is the best designed from an + * user point of view. Moreover, being totally inlined (defined completely in the header), + * even a stupid compiler should be able to perform basic optimizations on it. + * We thought about using a pass-by-pointer semantic but it was much more awful to use, and + * the compiler is then forced to spill everything to the stack (unless it is *very* smart). + * + * \li The current implementation allows to either store the key internally (that is, copy + * the key within the hash table) or keep it external (that is, a hook is used to extract + * the key from the data in the node). The former is more memory-hungry of course, as it + * allocated static space to store the key copies. The overhead to keep both methods at + * the same time is minimal: + *
    + *
  • There is a run-time check in node_get_key which is execute per each node visited.
    • + *
  • Theoretically, there is no memory overhead. In practice, there were no + * flags in \c struct HashTable till now, so we had to add a first bit flag, but the + * overhead will disappear if a second flag is added for a different reason later.
    • + *
  • There is a little interface overhead, since we have two different versions of + * \c ht_insert(), one with the key passed as parameter and one without, but in + * the common case (external keys) both can be used.
    • + *
+ * + * \author Giovanni Bajo + */ + +#include "hashtable.h" + +#include "cfg/cfg_hashtable.h" +#include +#include +#include //ROTL(), ROTR(); + +#include + + +typedef const void** HashNodePtr; +#define NODE_EMPTY(node) (!*(node)) +#define HT_HAS_INTERNAL_KEY(ht) (CONFIG_HT_OPTIONAL_INTERNAL_KEY && ht->flags.key_internal) + +/** For hash tables with internal keys, compute the pointer to the internal key for a given \a node. */ +INLINE uint8_t *key_internal_get_ptr(struct HashTable *ht, HashNodePtr node) +{ + uint8_t* key_buf = ht->key_data.mem; + size_t index; + + // Compute the index of the node and use it to move within the whole key buffer + index = node - &ht->mem[0]; + ASSERT(index < (size_t)(1 << ht->max_elts_log2)); + key_buf += index * (INTERNAL_KEY_MAX_LENGTH + 1); + + return key_buf; +} + + +INLINE void node_get_key(struct HashTable* ht, HashNodePtr node, const void** key, uint8_t* key_length) +{ + if (HT_HAS_INTERNAL_KEY(ht)) + { + uint8_t* k = key_internal_get_ptr(ht, node); + + // Key has its length stored in the first byte + *key_length = *k++; + *key = k; + } + else + *key = ht->key_data.hook(*node, key_length); +} + + +INLINE bool node_key_match(struct HashTable* ht, HashNodePtr node, const void* key, uint8_t key_length) +{ + const void* key2; + uint8_t key2_length; + + node_get_key(ht, node, &key2, &key2_length); + + return (key_length == key2_length && memcmp(key, key2, key_length) == 0); +} + + +static uint16_t calc_hash(const void* _key, uint8_t key_length) +{ + const char* key = (const char*)_key; + uint16_t hash = key_length; + int i; + int len = (int)key_length; + + for (i = 0; i < len; ++i) + hash = ROTL(hash, 4) ^ key[i]; + + return hash ^ (hash >> 6) ^ (hash >> 13); +} + + +static HashNodePtr perform_lookup(struct HashTable* ht, + const void* key, uint8_t key_length) +{ + uint16_t hash = calc_hash(key, key_length); + uint16_t mask = ((1 << ht->max_elts_log2) - 1); + uint16_t index = hash & mask; + uint16_t first_index = index; + uint16_t step; + HashNodePtr node; + + // Fast-path optimization: we check immediately if the current node + // is the one we were looking for, so we save the computation of the + // increment step in the common case. + node = &ht->mem[index]; + if (NODE_EMPTY(node) + || node_key_match(ht, node, key, key_length)) + return node; + + // Increment while going through the hash table in case of collision. + // This implements the double-hash technique: we use the higher part + // of the hash as a step increment instead of just going to the next + // element, to minimize the collisions. + // Notice that the number must be odd to be sure that the whole table + // is traversed. Actually MCD(table_size, step) must be 1, but + // table_size is always a power of 2, so we just ensure that step is + // never a multiple of 2. + step = (ROTR(hash, ht->max_elts_log2) & mask) | 1; + + do + { + index += step; + index &= mask; + + node = &ht->mem[index]; + if (NODE_EMPTY(node) + || node_key_match(ht, node, key, key_length)) + return node; + + // The check is done after the key compare. This actually causes + // one more compare in the case the table is full (since the first + // element was compared at the very start, and then at the end), + // but it makes faster the common path where we enter this loop + // for the first time, and index will not match first_index for + // sure. + } while (index != first_index); + + return NULL; +} + + +void ht_init(struct HashTable* ht) +{ + memset(ht->mem, 0, sizeof(ht->mem[0]) * (1 << ht->max_elts_log2)); +} + + +static bool insert(struct HashTable* ht, const void* key, uint8_t key_length, const void* data) +{ + HashNodePtr node; + + if (!data) + return false; + + if (HT_HAS_INTERNAL_KEY(ht)) + key_length = MIN(key_length, (uint8_t)INTERNAL_KEY_MAX_LENGTH); + + node = perform_lookup(ht, key, key_length); + if (!node) + return false; + + if (HT_HAS_INTERNAL_KEY(ht)) + { + uint8_t* k = key_internal_get_ptr(ht, node); + *k++ = key_length; + memcpy(k, key, key_length); + } + + *node = data; + return true; +} + + +bool ht_insert_with_key(struct HashTable* ht, const void* key, uint8_t key_length, const void* data) +{ +#ifdef _DEBUG + if (!HT_HAS_INTERNAL_KEY(ht)) + { + // Construct a fake node and use it to match the key + HashNodePtr node = &data; + if (!node_key_match(ht, node, key, key_length)) + { + ASSERT2(0, "parameter key is different from the external key"); + return false; + } + } +#endif + + return insert(ht, key, key_length, data); +} + + +bool ht_insert(struct HashTable* ht, const void* data) +{ + const void* key; + uint8_t key_length; + +#ifdef _DEBUG + if (HT_HAS_INTERNAL_KEY(ht)) + { + ASSERT("parameter cannot be a hash table with internal keys - use ht_insert_with_key()" + && 0); + return false; + } +#endif + + key = ht->key_data.hook(data, &key_length); + + return insert(ht, key, key_length, data); +} + + +const void* ht_find(struct HashTable* ht, const void* key, uint8_t key_length) +{ + HashNodePtr node; + + if (HT_HAS_INTERNAL_KEY(ht)) + key_length = MIN(key_length, (uint8_t)INTERNAL_KEY_MAX_LENGTH); + + node = perform_lookup(ht, key, key_length); + + if (!node || NODE_EMPTY(node)) + return NULL; + + return *node; +} diff --git a/2.5/bertos/struct/hashtable.h b/2.5/bertos/struct/hashtable.h new file mode 100644 index 00000000..0b6f4c8f --- /dev/null +++ b/2.5/bertos/struct/hashtable.h @@ -0,0 +1,292 @@ +/** + * \file + * + * + * \author Giovanni Bajo + * + * \brief Portable hash table + * + * This file implements a portable hash table, with the following features: + * + * \li Open double-hashing. The maximum number of elements is fixed. The double hashing + * function improves recovery in case of collisions. + * \li Configurable size (which is clamped to a power of two) + * \li Visiting interface through iterator (returns the element in random order). + * \li The key is stored within the data and a hook is used to extract it. Optionally, it + * is possible to store a copy of the key within the hash table. + * + * Since the hashing is open, there is no way to remove elements from the table. Instead, a + * function is provided to clear the table completely. + * + * The data stored within the table must be a pointer. The NULL pointer is used as + * a marker for a free node, so it is invalid to store a NULL pointer in the table + * with \c ht_insert(). + * + * $WIZ$ module_name = "hashtable" + * $WIZ$ module_configuration = "bertos/cfg/cfg_hashtable.h" + */ + +#ifndef STRUCT_HASHTABLE_H +#define STRUCT_HASHTABLE_H + +#include "cfg/cfg_hashtable.h" + +#include +#include +#include + +/// Maximum length of the internal key (use (2^n)-1 for slight speedup) +#define INTERNAL_KEY_MAX_LENGTH 15 + +/** + * Hook to get the key from \a data, which is an element of the hash table. The + * key must be returned together with \a key_length (in words). + */ +typedef const void *(*hook_get_key)(const void *data, uint8_t *key_length); + + +/** + * Hash table description + * + * \note This structures MUST NOT be accessed directly. Its definition is + * provided in the header file only for optimization purposes (see the rationale + * in hashtable.c). + * + * \note If new elements must be added to this list, please double check + * \c DECLARE_HASHTABLE, which requires the existing elements to be at the top. + */ +struct HashTable +{ + const void **mem; ///< Buckets of data + uint16_t max_elts_log2; ///< Log2 of the size of the table + struct { + bool key_internal : 1; ///< true if the key is copied internally + } flags; + union { + hook_get_key hook; ///< Hook to get the key + uint8_t *mem; ///< Pointer to the key memory + } key_data; +}; + + +/// Iterator to walk the hash table +typedef struct +{ + const void** pos; + const void** end; +} HashIterator; + + +/** + * Declare a hash table in the current scope + * + * \param name Variable name + * \param size Number of elements + * \param hook_gk Hook to be used to extract the key from the node + * + * \note The number of elements will be rounded down to the nearest + * power of two. + * + */ +#define DECLARE_HASHTABLE(name, size, hook_gk) \ + static const void* name##_nodes[1 << UINT32_LOG2(size)]; \ + struct HashTable name = \ + { \ + .mem = name##_nodes, \ + .max_elts_log2 = UINT32_LOG2(size), \ + .flags = { .key_internal = false }, \ + .key_data.hook = hook_gk \ + } + + +/** Exactly like \c DECLARE_HASHTABLE, but the variable will be declared as static. */ +#define DECLARE_HASHTABLE_STATIC(name, size, hook_gk) \ + static const void* name##_nodes[1 << UINT32_LOG2(size)]; \ + static struct HashTable name = \ + { \ + .mem = name##_nodes, \ + .max_elts_log2 = UINT32_LOG2(size), \ + .flags = { .key_internal = false }, \ + .key_data.hook = hook_gk \ + } + +#if CONFIG_HT_OPTIONAL_INTERNAL_KEY + /** Declare a hash table with internal copies of the keys. This version does not + * require a hook, nor it requires the user to allocate static memory for the keys. + * It is mostly suggested for tables whose keys are computed on the fly and need + * to be stored somewhere. + */ + #define DECLARE_HASHTABLE_INTERNALKEY(name, size) \ + static uint8_t name##_keys[(1 << UINT32_LOG2(size)) * (INTERNAL_KEY_MAX_LENGTH + 1)]; \ + static const void* name##_nodes[1 << UINT32_LOG2(size)]; \ + struct HashTable name = { name##_nodes, UINT32_LOG2(size), { true }, name##_keys } + + /** Exactly like \c DECLARE_HASHTABLE_INTERNALKEY, but the variable will be declared as static. */ + #define DECLARE_HASHTABLE_INTERNALKEY_STATIC(name, size) \ + static uint8_t name##_keys[(1 << UINT32_LOG2(size)) * (INTERNAL_KEY_MAX_LENGTH + 1)]; \ + static const void* name##_nodes[1 << UINT32_LOG2(size)]; \ + static struct HashTable name = \ + { \ + .mem = name##_nodes, \ + .max_elts_log2 = UINT32_LOG2(size), \ + .flags = { .key_internal = true }, \ + .key_data.mem = name##_keys \ + } +#endif + +/** + * Initialize (and clear) a hash table in a memory buffer. + * + * \param ht Hash table declared with \c DECLARE_HASHTABLE + * + * \note This function must be called before using the hash table. Optionally, + * it can be called later in the program to clear the hash table, + * removing all its elements. + */ +void ht_init(struct HashTable* ht); + +/** + * Insert an element into the hash table + * + * \param ht Handle of the hash table + * \param data Data to be inserted into the table + * \return true if insertion was successful, false otherwise (table is full) + * + * \note The key for the element to insert is extract from the data with + * the hook. This means that this function cannot be called for hashtables + * with internal keys. + * + * \note If an element with the same key already exists in the table, + * it will be overwritten. + * + * \note It is not allowed to store NULL in the table. If you pass NULL as data, + * the function call will fail. + */ +bool ht_insert(struct HashTable* ht, const void* data); + +/** + * Insert an element into the hash table + * + * \param ht Handle of the hash table + * \param key Key of the element + * \param key_length Length of the key in characters + * \param data Data to be inserted into the table + * \return true if insertion was successful, false otherwise (table is full) + * + * \note If this function is called for hash table with external keys, + * the key provided must be match the key that would be extracted with the + * hook, otherwise the function will fail. + * + * \note If an element with the same key already exists in the table, + * it will be overwritten. + * + * \note It is not allowed to store NULL in the table. If you pass NULL as data, + * the function call will fail. + */ +bool ht_insert_with_key(struct HashTable* ht, const void* key, uint8_t key_length, const void* data); + +/** + * Find an element in the hash table + * + * \param ht Handle of the hash table + * \param key Key of the element + * \param key_length Length of the key in characters + * \return Data of the element, or NULL if no element was found for the given key. + */ +const void* ht_find(struct HashTable* ht, const void* key, uint8_t key_length); + +/** Similar to \c ht_insert_with_key() but \a key is an ASCIIZ string */ +#define ht_insert_str(ht, key, data) ht_insert_with_key(ht, key, strlen(key), data) + +/** Similar to \c ht_find() but \a key is an ASCIIZ string */ +#define ht_find_str(ht, key) ht_find(ht, key, strlen(key)) + +/// Get an iterator to the begin of the hash table \a ht +INLINE HashIterator ht_iter_begin(struct HashTable* ht) +{ + HashIterator h; + + h.pos = &ht->mem[0]; + h.end = &ht->mem[1 << ht->max_elts_log2]; + + while (h.pos != h.end && !*h.pos) + ++h.pos; + + return h; +} + +/** + * Get an iterator to the (exclusive) end of the hash table \a ht + * + * \note Like in STL, the end iterator is not a valid iterator (you + * cannot call \c ht_iter_get() on it), and it must be used only to + * detect if we reached the end of the iteration (through \c ht_iter_cmp()). + */ +INLINE HashIterator ht_iter_end(struct HashTable* ht) +{ + HashIterator h; + + h.pos = h.end = &ht->mem[1 << ht->max_elts_log2]; + + return h; +} + +/// Compare \a it1 and \a it2 for equality +INLINE bool ht_iter_cmp(HashIterator it1, HashIterator it2) +{ + ASSERT(it1.end == it2.end); + return it1.pos == it2.pos; +} + +/// Get the element within the hash table \a ht pointed by the iterator \a iter +INLINE const void* ht_iter_get(HashIterator iter) +{ return *iter.pos; } + +/** Return an iterator pointing to the element following \a h + * + * \note The order of the elements visited during the iteration is casual, + * and depends on the implementation. + * + */ +INLINE HashIterator ht_iter_next(HashIterator h) +{ + ++h.pos; + while (h.pos != h.end && !(*h.pos)) + ++h.pos; + + return h; +} + +int hashtable_testSetup(void); +int hashtable_testRun(void); +int hashtable_testTearDown(void); + +#endif /* STRUCT_HASHTABLE_H */ diff --git a/2.5/bertos/struct/hashtable_test.c b/2.5/bertos/struct/hashtable_test.c new file mode 100644 index 00000000..4e5492bd --- /dev/null +++ b/2.5/bertos/struct/hashtable_test.c @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief Test hashtable module. + * + * Test the hashtable module (insertion and find). + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_hashtable.h $cfgdir/ + */ + +#include +#include +#include /* strlen() */ +#include "struct/hashtable.h" + +static const void *test_get_key(const void *ptr, uint8_t *length) +{ + const char *s = ptr; + + *length = strlen(s); + return s; +} + +#define NUM_ELEMENTS 256 +DECLARE_HASHTABLE_STATIC(hash1, NUM_ELEMENTS, test_get_key); +DECLARE_HASHTABLE_INTERNALKEY_STATIC(hash2, NUM_ELEMENTS); + +static char data[NUM_ELEMENTS][10]; +static char keydomain[] = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"; + +static bool single_test(void) +{ + int i; + + ht_init(&hash1); + ht_init(&hash2); + + for (i = 0; i < NUM_ELEMENTS; i++) + { + int k, klen; + + klen = (i % 8) + 1; + for (k = 0; k < klen; k++) + data[i][k] = keydomain[i % (sizeof(keydomain) - 1)]; + data[i][k] = 0; + + ASSERT(ht_insert(&hash1, data[i])); + ASSERT(ht_insert_str(&hash2, data[i], data[i])); + } + for (i = 0; i < NUM_ELEMENTS; i++) + { + const char *found1, *found2; + + found1 = ht_find_str(&hash1, data[i]); + if (strcmp(found1, data[i])) + return false; + kprintf("hash1: found data[%d] = %s\n", i, found1); + + found2 = ht_find_str(&hash2, data[i]); + if (strcmp(found2, data[i])) + return false; + kprintf("hash2: found data[%d] = %s\n", i, found2); + } + return true; +} + +int hashtable_testRun(void) +{ + if (!single_test()) + { + kprintf("hashtable_test failed\n"); + return -1; + } + kprintf("hashtable_test successful\n"); + return 0; +} + +int hashtable_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int hashtable_testTearDown(void) +{ + kputs("TearDown hashtable test.\n"); + return 0; +} + +TEST_MAIN(hashtable); diff --git a/2.5/bertos/struct/heap.c b/2.5/bertos/struct/heap.c new file mode 100644 index 00000000..4800f1b2 --- /dev/null +++ b/2.5/bertos/struct/heap.c @@ -0,0 +1,252 @@ +/** + * \file + * + * + * \brief Heap subsystem (public interface). + * + * \author Bernie Innocenti + */ + +#include "heap.h" + +#include // ASSERT() +#include // memset() + +#define FREE_FILL_CODE 0xDEAD +#define ALLOC_FILL_CODE 0xBEEF + + +/* + * This function prototype is deprecated, will change in: + * void heap_init(struct Heap* h, heap_buf_t* memory, size_t size) + * in the next BeRTOS release. + */ +void heap_init(struct Heap* h, void* memory, size_t size) +{ + #ifdef _DEBUG + memset(memory, FREE_FILL_CODE, size); + #endif + + ASSERT2(((size_t)memory % alignof(heap_buf_t)) == 0, + "memory buffer is unaligned, please use the HEAP_DEFINE_BUF() macro to declare heap buffers!\n"); + + /* Initialize heap with a single big chunk */ + h->FreeList = (MemChunk *)memory; + h->FreeList->next = NULL; + h->FreeList->size = size; +} + + +void *heap_allocmem(struct Heap* h, size_t size) +{ + MemChunk *chunk, *prev; + + /* Round size up to the allocation granularity */ + size = ROUND_UP2(size, sizeof(MemChunk)); + + /* Handle allocations of 0 bytes */ + if (!size) + size = sizeof(MemChunk); + + /* Walk on the free list looking for any chunk big enough to + * fit the requested block size. + */ + for (prev = (MemChunk *)&h->FreeList, chunk = h->FreeList; + chunk; + prev = chunk, chunk = chunk->next) + { + if (chunk->size >= size) + { + if (chunk->size == size) + { + /* Just remove this chunk from the free list */ + prev->next = chunk->next; + #ifdef _DEBUG + memset(chunk, ALLOC_FILL_CODE, size); + #endif + return (void *)chunk; + } + else + { + /* Allocate from the END of an existing chunk */ + chunk->size -= size; + #ifdef _DEBUG + memset((uint8_t *)chunk + chunk->size, ALLOC_FILL_CODE, size); + #endif + return (void *)((uint8_t *)chunk + chunk->size); + } + } + } + + return NULL; /* fail */ +} + + +void heap_freemem(struct Heap* h, void *mem, size_t size) +{ + MemChunk *prev; + ASSERT(mem); + +#ifdef _DEBUG + memset(mem, FREE_FILL_CODE, size); +#endif + + /* Round size up to the allocation granularity */ + size = ROUND_UP2(size, sizeof(MemChunk)); + + /* Handle allocations of 0 bytes */ + if (!size) + size = sizeof(MemChunk); + + /* Special cases: first chunk in the free list or memory completely full */ + ASSERT((uint8_t*)mem != (uint8_t*)h->FreeList); + if (((uint8_t *)mem) < ((uint8_t *)h->FreeList) || !h->FreeList) + { + /* Insert memory block before the current free list head */ + prev = (MemChunk *)mem; + prev->next = h->FreeList; + prev->size = size; + h->FreeList = prev; + } + else /* Normal case: not the first chunk in the free list */ + { + /* + * Walk on the free list. Stop at the insertion point (when mem + * is between prev and prev->next) + */ + prev = h->FreeList; + while (prev->next < (MemChunk *)mem && prev->next) + prev = prev->next; + + /* Make sure mem is not *within* prev */ + ASSERT((uint8_t*)mem >= (uint8_t*)prev + prev->size); + + /* Should it be merged with previous block? */ + if (((uint8_t *)prev) + prev->size == ((uint8_t *)mem)) + { + /* Yes */ + prev->size += size; + } + else /* not merged with previous chunk */ + { + MemChunk *curr = (MemChunk*)mem; + + /* insert it after the previous node + * and move the 'prev' pointer forward + * for the following operations + */ + curr->next = prev->next; + curr->size = size; + prev->next = curr; + + /* Adjust for the following test */ + prev = curr; + } + } + + /* Also merge with next chunk? */ + if (((uint8_t *)prev) + prev->size == ((uint8_t *)prev->next)) + { + prev->size += prev->next->size; + prev->next = prev->next->next; + + /* There should be only one merge opportunity, becuase we always merge on free */ + ASSERT((uint8_t*)prev + prev->size != (uint8_t*)prev->next); + } +} + +/** + * Returns the number of free bytes in a heap. + * \param h the heap to check. + * + * \note The returned value is the sum of all free memory regions + * in the heap. + * Those regions are likely to be *not* contiguous, + * so a successive allocation may fail even if the + * requested amount of memory is lower than the current free space. + */ +size_t heap_freeSpace(struct Heap *h) +{ + size_t free_mem = 0; + for (MemChunk *chunk = h->FreeList; chunk; chunk = chunk->next) + free_mem += chunk->size; + + return free_mem; +} + +#if CONFIG_HEAP_MALLOC + +void *heap_malloc(struct Heap* h, size_t size) +{ + size_t *mem; + + size += sizeof(size_t); + if ((mem = (size_t*)heap_allocmem(h, size))) + *mem++ = size; + + return mem; +} + +void *heap_calloc(struct Heap* h, size_t size) +{ + void *mem; + + if ((mem = heap_malloc(h, size))) + memset(mem, 0, size); + + return mem; +} + +/** + * Free a block of memory, determining its size automatically. + * + * \param h Heap from which the block was allocated. + * \param mem Pointer to a block of memory previously allocated with + * either heap_malloc() or heap_calloc(). + * + * \note If \a mem is a NULL pointer, no operation is performed. + * + * \note Freeing the same memory block twice has undefined behavior. + * + * \note This function works like the ANSI C free(). + */ +void heap_free(struct Heap *h, void *mem) +{ + size_t *_mem = (size_t *)mem; + + if (_mem) + { + --_mem; + heap_freemem(h, _mem, *_mem); + } +} + +#endif /* CONFIG_HEAP_MALLOC */ diff --git a/2.5/bertos/struct/heap.h b/2.5/bertos/struct/heap.h new file mode 100644 index 00000000..efd02c28 --- /dev/null +++ b/2.5/bertos/struct/heap.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Heap subsystem (public interface). + * + * \todo Heap memory could be defined as an array of MemChunk, and used + * in this form also within the implementation. This would probably remove + * memory alignment problems, and also some aliasing issues. + * + * \version $Id$ + * \author Bernie Innocenti + * + * $WIZ$ module_name = "heap" + * $WIZ$ module_configuration = "bertos/cfg/cfg_heap.h" + */ + +#ifndef STRUCT_HEAP_H +#define STRUCT_HEAP_H + +#include "cfg/cfg_heap.h" +#include +#include // IS_POW2() + +/* NOTE: struct size must be a 2's power! */ +typedef struct _MemChunk +{ + struct _MemChunk *next; + size_t size; +} MemChunk; + +STATIC_ASSERT(IS_POW2(sizeof(MemChunk))); + +typedef MemChunk heap_buf_t; + +/// A heap +typedef struct Heap +{ + struct _MemChunk *FreeList; ///< Head of the free list +} Heap; + +/** + * Utility macro to allocate a heap of size \a size. + * + * \param name Variable name for the heap. + * \param size Heap size in bytes. + */ +#define HEAP_DEFINE_BUF(name, size) \ + heap_buf_t name[((size) + sizeof(heap_buf_t) - 1) / sizeof(heap_buf_t)] + +/// Initialize \a heap within the buffer pointed by \a memory which is of \a size bytes +void heap_init(struct Heap* heap, void* memory, size_t size); + +/// Allocate a chunk of memory of \a size bytes from the heap +void *heap_allocmem(struct Heap* heap, size_t size); + +/// Free a chunk of memory of \a size bytes from the heap +void heap_freemem(struct Heap* heap, void *mem, size_t size); + +size_t heap_freeSpace(struct Heap *h); + +#define HNEW(heap, type) \ + (type*)heap_allocmem(heap, sizeof(type)) + +#define HNEWVEC(heap, type, nelem) \ + (type*)heap_allocmem(heap, sizeof(type) * (nelem)) + +#define HDELETE(heap, type, mem) \ + heap_freemem(heap, mem, sizeof(type)) + +#define HDELETEVEC(heap, type, nelem, mem) \ + heap_freemem(heap, mem, sizeof(type) * (nelem)) + + +#if CONFIG_HEAP_MALLOC + +void *heap_malloc(struct Heap* heap, size_t size); +void *heap_calloc(struct Heap* heap, size_t size); +void heap_free(struct Heap* heap, void * mem); + +#endif + +int heap_testSetup(void); +int heap_testRun(void); +int heap_testTearDown(void); + +#endif /* STRUCT_HEAP_H */ diff --git a/2.5/bertos/struct/heap_test.c b/2.5/bertos/struct/heap_test.c new file mode 100644 index 00000000..2ce28cfc --- /dev/null +++ b/2.5/bertos/struct/heap_test.c @@ -0,0 +1,123 @@ +/** + * \file + * + * + * \brief Heap test. + * + * \author Francesco Sacchi + */ + + +#include +#include + +#include +#include +#include + +#define TEST_LEN 31 +#define ALLOC_SIZE 113 + +#define TEST_LEN2 32 +#define ALLOC_SIZE2 128 + +#define HEAP_SIZE 4096 + +HEAP_DEFINE_BUF(heap_buf, HEAP_SIZE); +STATIC_ASSERT(sizeof(heap_buf) % sizeof(heap_buf_t) == 0); + +Heap h; + +int heap_testSetup(void) +{ + kdbg_init(); + heap_init(&h, heap_buf, sizeof(heap_buf)); + return 0; +} + +static void alloc_test(size_t size, size_t test_len) +{ + //Simple test + uint8_t *a[test_len]; + + for (size_t i = 0; i < test_len; i++) + { + a[i] = heap_allocmem(&h, size); + ASSERT(a[i]); + for (size_t j = 0; j < size; j++) + a[i][j] = i; + } + + ASSERT(heap_freeSpace(&h) == HEAP_SIZE - test_len * ROUND_UP2(size, sizeof(MemChunk))); + + for (size_t i = 0; i < test_len; i++) + { + for (size_t j = 0; j < size; j++) + { + kprintf("a[%d][%d] = %d\n", i, j, a[i][j]); + ASSERT(a[i][j] == i); + } + heap_freemem(&h, a[i], size); + } + ASSERT(heap_freeSpace(&h) == HEAP_SIZE); +} + +int heap_testRun(void) +{ + alloc_test(ALLOC_SIZE, TEST_LEN); + alloc_test(ALLOC_SIZE2, TEST_LEN2); + /* Try to allocate the whole heap */ + uint8_t *b = heap_allocmem(&h, HEAP_SIZE); + ASSERT(b); + ASSERT(heap_freeSpace(&h) == 0); + + ASSERT(!heap_allocmem(&h, HEAP_SIZE)); + + for (int j = 0; j < HEAP_SIZE; j++) + b[j] = j; + + for (int j = 0; j < HEAP_SIZE; j++) + { + kprintf("b[%d] = %d\n", j, j); + ASSERT(b[j] == (j & 0xff)); + } + heap_freemem(&h, b, HEAP_SIZE); + ASSERT(heap_freeSpace(&h) == HEAP_SIZE); + + return 0; +} + +int heap_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(heap); diff --git a/2.5/bertos/struct/kfile_fifo.c b/2.5/bertos/struct/kfile_fifo.c new file mode 100644 index 00000000..9ebc59df --- /dev/null +++ b/2.5/bertos/struct/kfile_fifo.c @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief KFile interface over a FIFO buffer. + * + * \version $Id: cfg_adc.h 2348 2009-02-16 13:43:44Z duplo $ + * \author Francesco Sacchi + */ + +#include "kfile_fifo.h" +#include "fifobuf.h" + +#include + +#include + +static size_t kfilefifo_read(struct KFile *_fd, void *_buf, size_t size) +{ + KFileFifo *fd = KFILEFIFO_CAST(_fd); + uint8_t *buf = (uint8_t *)_buf; + + while (size-- && !fifo_isempty_locked(fd->fifo)) + *buf++ = fifo_pop_locked(fd->fifo); + + return buf - (uint8_t *)_buf; +} + +static size_t kfilefifo_write(struct KFile *_fd, const void *_buf, size_t size) +{ + KFileFifo *fd = KFILEFIFO_CAST(_fd); + const uint8_t *buf = (const uint8_t *)_buf; + + while (size-- && !fifo_isfull_locked(fd->fifo)) + fifo_push_locked(fd->fifo, *buf++); + + return buf - (const uint8_t *)_buf; +} + +void kfilefifo_init(KFileFifo *kf, FIFOBuffer *fifo) +{ + memset(kf, 0, sizeof(*kf)); + + kf->fifo = fifo; + kf->fd.read = kfilefifo_read; + kf->fd.write = kfilefifo_write; + DB(kf->fd._type = KFT_KFILEFIFO); +} diff --git a/2.5/bertos/struct/kfile_fifo.h b/2.5/bertos/struct/kfile_fifo.h new file mode 100644 index 00000000..78c1f46d --- /dev/null +++ b/2.5/bertos/struct/kfile_fifo.h @@ -0,0 +1,100 @@ +/** + * \file + * + * + * \brief KFile interface over a FIFO buffer. + * + * Convenient way to push data into a FIFO using the KFile interface. + * For example, it's possible to read from a serial port and put the characters + * into a fifo: + * \code + * // serial reader process + * { + * // other stuff here... + * kfile_read(&ser_port.fd, buffer, sizeof(buffer)); + * kfile_write(&kfifo.fd, buffer, sizeof(buffer)); + * // ... + * } + * + * // controller process + * { + * //... + * kfile_read(&kfifo.fd, buffer2, sizeof(buffer2)); + * // use read data + * } + * \endcode + * + * + * \version $Id: cfg_adc.h 2348 2009-02-16 13:43:44Z duplo $ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfilefifo" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef STRUCT_KFILE_FIFO +#define STRUCT_KFILE_FIFO + +#include "fifobuf.h" +#include + +typedef struct KFileFifo +{ + KFile fd; + FIFOBuffer *fifo; +} KFileFifo; + +/** + * ID for KFile FIFO. + */ +#define KFT_KFILEFIFO MAKE_ID('F', 'I', 'F', '0') + +/** + * Convert + ASSERT from generic KFile to KFileFifo. + */ +INLINE KFileFifo * KFILEFIFO_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEFIFO); + return (KFileFifo *)fd; +} + +/** + * Initialize KFileFifo struct. + * + * \param kf Interface to initialize. + * \param fifo Fifo buffer to operate on. + */ +void kfilefifo_init(KFileFifo *kf, FIFOBuffer *fifo); + +int kfilefifo_testSetup(void); +int kfilefifo_testRun(void); +int kfilefifo_testTearDown(void); +#endif /* STRUCT_KFILE_FIFO */ diff --git a/2.5/bertos/struct/kfile_fifo_test.c b/2.5/bertos/struct/kfile_fifo_test.c new file mode 100644 index 00000000..8c2d04a3 --- /dev/null +++ b/2.5/bertos/struct/kfile_fifo_test.c @@ -0,0 +1,148 @@ +/** + * \file + * + * + * \brief FIFO and KFileFifo test. + * + * \version $Id: kfilefifo_test.c 1962 2008-12-02 15:37:17Z batt $ + * \author Bernie Innocenti + */ + + +#include +#include + +#include +#include +#include + + +int kfilefifo_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int kfilefifo_testRun(void) +{ + #define FIFOBUF_LEN 256 + + uint8_t buf[FIFOBUF_LEN]; + + FIFOBuffer fifo; + fifo_init(&fifo, buf, sizeof(buf)); + + ASSERT(fifo_isempty(&fifo)); + ASSERT(!fifo_isfull(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isfull(&fifo)); + fifo_push(&fifo, i); + } + + ASSERT(fifo_isfull(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isempty(&fifo)); + ASSERT(fifo_pop(&fifo) == i); + } + + ASSERT(fifo_isempty(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isfull(&fifo)); + fifo_push(&fifo, i); + } + ASSERT(fifo_isfull(&fifo)); + fifo_flush(&fifo); + ASSERT(!fifo_isfull(&fifo)); + ASSERT(fifo_isempty(&fifo)); + + KFileFifo kfifo; + kfilefifo_init(&kfifo, &fifo); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isfull(&fifo)); + fifo_push(&fifo, i); + } + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + ASSERT(kfile_getc(&kfifo.fd) == i); + + ASSERT(kfile_getc(&kfifo.fd) == EOF); + ASSERT(fifo_isempty(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + ASSERT(kfile_putc(i, &kfifo.fd) == i); + + ASSERT(fifo_isfull(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isempty(&fifo)); + ASSERT(fifo_pop(&fifo) == i); + } + + ASSERT(fifo_isempty(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + ASSERT(kfile_putc(i, &kfifo.fd) == i); + + ASSERT(fifo_isfull(&fifo)); + ASSERT(kfile_putc('a', &kfifo.fd) == EOF); + + fifo_flush(&fifo); + ASSERT(!fifo_isfull(&fifo)); + ASSERT(fifo_isempty(&fifo)); + ASSERT(kfile_getc(&kfifo.fd) == EOF); + + ASSERT(kfile_write(&kfifo.fd, "hello world", 11) == 11); + ASSERT(kfile_write(&kfifo.fd, "hello world", FIFOBUF_LEN) == FIFOBUF_LEN - 1 - 11); + + uint8_t test_buf[FIFOBUF_LEN]; + ASSERT(kfile_read(&kfifo.fd, test_buf, FIFOBUF_LEN + 20) == FIFOBUF_LEN - 1); + + ASSERT(!fifo_isfull(&fifo)); + ASSERT(fifo_isempty(&fifo)); + ASSERT(kfile_getc(&kfifo.fd) == EOF); + return 0; +} + +int kfilefifo_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(kfilefifo); diff --git a/2.5/bertos/struct/kfile_mem.c b/2.5/bertos/struct/kfile_mem.c new file mode 100644 index 00000000..5560fdc6 --- /dev/null +++ b/2.5/bertos/struct/kfile_mem.c @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief KFile interface over a memory buffer. + * + * \version $Id: cfg_adc.h 2348 2009-02-16 13:43:44Z duplo $ + * \author Francesco Sacchi + */ + +#include "kfile_mem.h" + +#include + +#include + +static size_t kfilemem_read(struct KFile *_fd, void *buf, size_t size) +{ + KFileMem *fd = KFILEMEM_CAST(_fd); + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + uint8_t *mem = (uint8_t *)fd->mem; + memcpy(buf, mem + fd->fd.seek_pos, size); + fd->fd.seek_pos += size; + + return size; +} + +static size_t kfilemem_write(struct KFile *_fd, const void *buf, size_t size) +{ + KFileMem *fd = KFILEMEM_CAST(_fd); + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + uint8_t *mem = (uint8_t *)fd->mem; + memcpy(mem + fd->fd.seek_pos, buf, size); + fd->fd.seek_pos += size; + + return size; +} + +void kfilemem_init(KFileMem *km, void *mem, size_t len) +{ + ASSERT(km); + ASSERT(mem); + ASSERT(len); + + memset(km, 0, sizeof(*km)); + + km->mem = mem; + kfile_init(&km->fd); + km->fd.read = kfilemem_read; + km->fd.write = kfilemem_write; + km->fd.size = len; + DB(km->fd._type = KFT_KFILEMEM); +} diff --git a/2.5/bertos/struct/kfile_mem.h b/2.5/bertos/struct/kfile_mem.h new file mode 100644 index 00000000..c723de2f --- /dev/null +++ b/2.5/bertos/struct/kfile_mem.h @@ -0,0 +1,82 @@ +/** + * \file + * + * + * \brief KFile interface over a memory buffer. + * + * Convenient way to access a memory region using the KFile interface. + * + * + * \version $Id: cfg_adc.h 2348 2009-02-16 13:43:44Z duplo $ + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfilemem" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef STRUCT_KFILE_MEM +#define STRUCT_KFILE_MEM + +#include + +/** + * Context for KFile over memory buffer. + */ +typedef struct KFileMem +{ + KFile fd; ///< KFile base class + void *mem; ///< Pointer to the memory buffer used. +} KFileMem; + +/** + * ID for KFile Mem. + */ +#define KFT_KFILEMEM MAKE_ID('M', 'E', 'M', '0') + +/** + * Convert + ASSERT from generic KFile to KFileMem. + */ +INLINE KFileMem * KFILEMEM_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEMEM); + return (KFileMem *)fd; +} + +/** + * Initialize KFileMem struct. + * + * \param km Interface to initialize. + * \param mem Pointer to the memory buffer to operate on. + * \param len Size of the buffer + */ +void kfilemem_init(KFileMem *km, void *mem, size_t len); + +#endif /* STRUCT_KFILE_MEM */ diff --git a/2.5/bertos/struct/list.h b/2.5/bertos/struct/list.h new file mode 100644 index 00000000..b970b7cf --- /dev/null +++ b/2.5/bertos/struct/list.h @@ -0,0 +1,353 @@ +/** + * \file + * + * + * \brief General pourpose double-linked lists + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef STRUCT_LIST_H +#define STRUCT_LIST_H + +#include /* INLINE */ +#include /* ASSERT_VALID_PTR() */ + +/** + * This structure represents a node for bidirectional lists. + * + * Data is usually appended to nodes by making them the first + * field of another struture, as a poor-man's form of inheritance. + */ +typedef struct _Node +{ + struct _Node *succ; + struct _Node *pred; +} Node; + +/** + * Head of a doubly-linked list of \c Node structs. + * + * Lists must be initialized with LIST_INIT() prior to use. + * + * Nodes can be added and removed from either end of the list + * with O(1) performance. Iterating over these lists can be + * tricky: use the FOREACH_NODE() macro instead. + */ +typedef struct _List +{ + Node head; + Node tail; +} List; + +/** + * Extended node for priority queues. + */ +typedef struct _PriNode +{ + Node link; + int pri; +} PriNode; + + +/** + * Template for a naked node in a list of \a T structures. + * + * To be used as data member in other structures: + * + * \code + * struct Foo + * { + * DECLARE_NODE_ANON(struct Foo) + * int a; + * float b; + * } + * + * DECLARE_LIST_TYPE(Foo); + * + * void foo(void) + * { + * static LIST_TYPE(Foo) foo_list; + * static Foo foo1, foo2; + * Foo *fp; + * + * LIST_INIT(&foo_list); + * ADDHEAD(&foo_list, &foo1); + * INSERT_BEFORE(&foo_list, &foo2); + * FOREACH_NODE(fp, &foo_list) + * fp->a = 10; + * } + * + * \endcode + */ +#define DECLARE_NODE_ANON(T) \ + T *succ; T *pred; + +/** Declare a typesafe node for structures of type \a T. */ +#define DECLARE_NODE_TYPE(T) \ + typedef struct T##Node { T *succ; T *pred; } T##Node + +/** Template for a list of \a T structures. */ +#define DECLARE_LIST_TYPE(T) \ + DECLARE_NODE_TYPE(T); \ + typedef struct T##List { \ + T##Node head; \ + T##Node tail; \ + } T##List + +#define NODE_TYPE(T) T##Node +#define LIST_TYPE(T) T##List + +/** + * Get a pointer to the first node in a list. + * + * If \a l is empty, result points to l->tail. + */ +#define LIST_HEAD(l) ((l)->head.succ) + +/** + * Get a pointer to the last node in a list. + * + * If \a l is empty, result points to l->head. + */ +#define LIST_TAIL(l) ((l)->tail.pred) + +// TODO: move in compiler.h +#if COMPILER_TYPEOF + #define TYPEOF_OR_VOIDPTR(type) typeof(type) +#else + #define TYPEOF_OR_VOIDPTR(type) void * +#endif + +/** + * Iterate over all nodes in a list. + * + * This macro generates a "for" statement using the following parameters: + * \param n Node pointer to be used in each iteration. + * \param l Pointer to list. + */ +#define FOREACH_NODE(n, l) \ + for( \ + (n) = (TYPEOF_OR_VOIDPTR(n))LIST_HEAD(l); \ + ((Node *)(n))->succ; \ + (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->succ) \ + ) + +/** + * Iterate backwards over all nodes in a list. + * + * This macro generates a "for" statement using the following parameters: + * \param n Node pointer to be used in each iteration. + * \param l Pointer to list. + */ +#define REVERSE_FOREACH_NODE(n, l) \ + for( \ + (n) = (TYPEOF_OR_VOIDPTR(n))LIST_TAIL(l); \ + ((Node *)(n))->pred; \ + (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->pred) \ + ) + +/** Initialize a list. */ +#define LIST_INIT(l) \ + do { \ + (l)->head.succ = (TYPEOF_OR_VOIDPTR((l)->head.succ)) &(l)->tail; \ + (l)->head.pred = NULL; \ + (l)->tail.succ = NULL; \ + (l)->tail.pred = (TYPEOF_OR_VOIDPTR((l)->tail.pred)) &(l)->head; \ + } while (0) + +#ifdef _DEBUG + /** Make sure that a list is valid (it was initialized and is not corrupted). */ + #define LIST_ASSERT_VALID(l) \ + do { \ + Node *n, *pred; \ + ASSERT((l)->head.succ != NULL); \ + ASSERT((l)->head.pred == NULL); \ + ASSERT((l)->tail.succ == NULL); \ + ASSERT((l)->tail.pred != NULL); \ + pred = &(l)->head; \ + FOREACH_NODE(n, l) \ + { \ + ASSERT(n->pred == pred); \ + pred = n; \ + } \ + ASSERT(n == &(l)->tail); \ + } while (0) + + /// Checks that a node isn't part of a given list + #define LIST_ASSERT_NOT_CONTAINS(list,node) \ + do { \ + Node *ln; \ + ASSERT_VALID_PTR(list); \ + ASSERT_VALID_PTR(node); \ + FOREACH_NODE(ln, list) \ + ASSERT(ln != (Node *)(node)); \ + } while (0) + + #define INVALIDATE_NODE(n) ((n)->succ = (n)->pred = NULL) +#else + #define LIST_ASSERT_VALID(l) do {} while (0) + #define LIST_ASSERT_NOT_CONTAINS(list,node) do {} while (0) + #define INVALIDATE_NODE(n) do {} while (0) +#endif + +/** Tell whether a list is empty. */ +#define LIST_EMPTY(l) ( (void *)((l)->head.succ) == (void *)(&(l)->tail) ) + +/** Add node to list head. */ +#define ADDHEAD(l,n) \ + do { \ + LIST_ASSERT_NOT_CONTAINS((l),(n)); \ + (n)->succ = (l)->head.succ; \ + (n)->pred = (l)->head.succ->pred; \ + (n)->succ->pred = (n); \ + (n)->pred->succ = (n); \ + } while (0) + +/** Add node to list tail. */ +#define ADDTAIL(l,n) \ + do { \ + LIST_ASSERT_NOT_CONTAINS((l),(n)); \ + (n)->succ = &(l)->tail; \ + (n)->pred = (l)->tail.pred; \ + (n)->pred->succ = (n); \ + (l)->tail.pred = (n); \ + } while (0) + +/** + * Insert node \a n before node \a ln. + * + * \note You can't pass in a list header as \a ln, but + * it is safe to pass list-\>head of an empty list. + */ +#define INSERT_BEFORE(n,ln) \ + do { \ + ASSERT_VALID_PTR(n); \ + ASSERT_VALID_PTR(ln); \ + (n)->succ = (ln); \ + (n)->pred = (ln)->pred; \ + (ln)->pred->succ = (n); \ + (ln)->pred = (n); \ + } while (0) + +/** + * Remove \a n from whatever list it is in. + * + * \note Removing a node that has not previously been + * inserted into a list invokes undefined behavior. + */ +#define REMOVE(n) \ + do { \ + ASSERT_VALID_PTR(n); \ + (n)->pred->succ = (n)->succ; \ + (n)->succ->pred = (n)->pred; \ + INVALIDATE_NODE(n); \ + } while (0) + +/** + * Insert a priority node in a priority queue. + * + * The new node is inserted immediately before the first node with the same + * priority or appended to the tail if no such node exists. + */ +#define LIST_ENQUEUE_HEAD(list, node) \ + do { \ + PriNode *ln; \ + LIST_ASSERT_NOT_CONTAINS((list),(node)); \ + FOREACH_NODE(ln, (list)) \ + if (ln->pri <= (node)->pri) \ + break; \ + INSERT_BEFORE(&(node)->link, &ln->link); \ + } while (0) + +/** + * Insert a priority node in a priority queue. + * + * The new node is inserted immediately before the first node with lower + * priority or appended to the tail if no such node exists. + */ +#define LIST_ENQUEUE(list, node) \ + do { \ + PriNode *ln; \ + LIST_ASSERT_NOT_CONTAINS((list),(node)); \ + FOREACH_NODE(ln, (list)) \ + if (ln->pri < (node)->pri) \ + break; \ + INSERT_BEFORE(&(node)->link, &ln->link); \ + } while (0) + + +/** + * Unlink a node from the head of the list \a l. + * + * \return Pointer to node, or NULL if the list was empty. + */ +INLINE Node *list_remHead(List *l) +{ + Node *n; + + ASSERT_VALID_PTR(l); + + if (LIST_EMPTY(l)) + return (Node *)0; + + n = l->head.succ; /* Get first node. */ + l->head.succ = n->succ; /* Link list head to second node. */ + n->succ->pred = &l->head; /* Link second node to list head. */ + + INVALIDATE_NODE(n); + return n; +} + +/** + * Unlink a node from the tail of the list \a l. + * + * \return Pointer to node, or NULL if the list was empty. + */ +INLINE Node *list_remTail(List *l) +{ + Node *n; + + ASSERT_VALID_PTR(l); + + if (LIST_EMPTY(l)) + return NULL; + + n = l->tail.pred; /* Get last node. */ + l->tail.pred = n->pred; /* Link list tail to second last node. */ + n->pred->succ = &l->tail; /* Link second last node to list tail. */ + + INVALIDATE_NODE(n); + return n; +} + +#endif /* STRUCT_LIST_H */ diff --git a/2.5/bertos/struct/pool.h b/2.5/bertos/struct/pool.h new file mode 100644 index 00000000..37938c26 --- /dev/null +++ b/2.5/bertos/struct/pool.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Pool macros. + * + * \version $Id$ + * \author Giovanni Bajo + */ + +#ifndef STRUCT_POOL_H +#define STRUCT_POOL_H + +#include +#include + +#define EXTERN_POOL(name) \ + extern List name + +#define DECLARE_POOL_WITH_STORAGE(name, type, num, storage) \ + static type name##_items[num]; \ + storage name; \ + INLINE void name##_init(void (*init_func)(type*)) \ + { \ + int i; \ + LIST_INIT(&name); \ + for (i=0;i + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Define application version strings + */ +#include + +/* + * "buildrev.h" is auto-generated by the build infrastructure, + * incrementing VERS_BUILD each time the project is rebuilt. + */ +#include "buildrev.h" + +const char vers_tag[] = VERS_TAG; +const char vers_build_str[] = _STRINGIZE(VERS_BUILD); +const char vers_host[] = VERS_HOST; +const int vers_build_nr = VERS_BUILD; + diff --git a/2.5/bertos/verstag.h b/2.5/bertos/verstag.h new file mode 100644 index 00000000..057a6318 --- /dev/null +++ b/2.5/bertos/verstag.h @@ -0,0 +1,106 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Declare application version strings + */ + + +#ifndef BERTOS_VERSTAG_H +#define BERTOS_VERSTAG_H + +#ifndef CFG_ARCH_CONFIG_H + #include "cfg/cfg_arch.h" +#endif + +#define APP_NAME "Appname" +#define APP_DESCRIPTION "Long application name description" +#define APP_AUTHOR "Develer" +#define APP_COPYRIGHT "Copyright 2009 Develer (http://www.develer.com/)" + + +#if ARCH & ARCH_DEFAULT + #define VERS_MAJOR 0 + #define VERS_MINOR 1 + #define VERS_REV 0 + #define VERS_LETTER "" +#elif ARCH & ARCH_NIGHTTEST + #define VERS_MAJOR 0 + #define VERS_MINOR 1 + #define VERS_REV 0 + #define VERS_LETTER "" +#else + #error unknown architecture +#endif + +/** + * If _SNAPSHOT is defined, \c VERS_TAG contains the build date + * date instead of a numeric version string. + */ +#define _SNAPSHOT + +#ifdef _DEBUG + #define VERS_DBG "D" +#else + #define VERS_DBG "" +#endif + +#define __STRINGIZE(x) #x +#define _STRINGIZE(x) __STRINGIZE(x) + +/** Build application version string (i.e.: "1.7.0") */ +#define MAKE_VERS(maj,min,rev) _STRINGIZE(maj) "." _STRINGIZE(min) "." _STRINGIZE(rev) VERS_LETTER VERS_DBG +#ifdef _SNAPSHOT + #define VERS_TAG "snapshot" " " __DATE__ " " __TIME__ " " VERS_LETTER " " VERS_DBG +#else + #define VERS_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV) +#endif + +/** Build application version string suitable for MS windows resource files (i.e.: "1, 7, 0, 1") */ +#define MAKE_RCVERS(maj,min,rev,bld) _STRINGIZE(maj) ", " _STRINGIZE(min) ", " _STRINGIZE(rev) ", " _STRINGIZE(bld) +#define RCVERSION_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV) + +/** The revision string (contains VERS_TAG) */ +extern const char vers_tag[]; + +/** Sequential build number (contains VERS_BUILD) */ +extern const int vers_build_nr; +//extern const char vers_build_str[]; + +/** Hostname of the machine used to build this binary (contains VERS_HOST) */ +extern const char vers_host[]; + +#endif /* BERTOS_VERSTAG_H */ diff --git a/2.5/boards/.spec b/2.5/boards/.spec new file mode 100644 index 00000000..e69de29b diff --git a/2.5/boards/arduino/.image.png b/2.5/boards/arduino/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..dbd0b87ec59dc213e44c1ffa91c925ad03a296b2 GIT binary patch literal 54482 zcmV)IK)k<+P)z2}o8$#p0Ao_mPYS-MMfRkfBgJ(wN|L4v@7+$C-I zgxT8e*?zcBcV>qXG`s)f&hB{2J&IcbxC60E5(EJnNk|Sbg8>GZnV#-xU0toax^z|Q z%uw#{-3O0|jLfX&ZlI@-8R_Bj=f5ZXxd*PStRNyY0{|idfcb1LbBBNt;zZ1BZkk_- z2oX&V@#C00Nd0`$Y=<5P1OUY3K0{nK0)n~2%-F9CGb5ld_mg@GA=1xjTl&pGU}p0J zGVoxUp(5`2fzrJG>Vyp5T=*l8CTlv*@4J*EMUL%xQL|w znSnFeAR_}aGEkDC5Mp=~fFaF1X<^(hVn{MGy&V?~KtwPIlA)f={%V;AMj@3Zin|P$ z(>uv`W*X`vQV23*+-Zd7?_B(hPdkh%RC;LO#h^V35bkC9^PM z#Q--3C}hSC05PU~=nDhr!!&zWAY^bqG$`4>LxKVkhZ~&zV9?Ky2&k-7Vi17YYLUS> z_wPJw0Mai^#6%_mWx6c>5MwSCI>=RH2>nyh=3pv zkpUUf@k@I=tyo$FA_5{C5h9Q?V-pVwpa6_JiUAO)-*i9#B*rY7`_=4A#taQWENll^ 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+ + + + + + + + + + + + + + + + + + + +
CPUAVR ATmega328P
Clock16MHz
Memory32kB Flash, 2kB SRAM
Peripheralstimers, ADC, UART, SPI, I²C, PWM
+

+ + +''' diff --git a/2.5/boards/arduino/benchmark/.spec b/2.5/boards/arduino/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/arduino/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/arduino/benchmark/context_switch/.spec b/2.5/boards/arduino/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_menu.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ef228257 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/arduino/benchmark/context_switch/context_switch.mk b/2.5/boards/arduino/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..207a3eab --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/context_switch.mk @@ -0,0 +1,89 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "avr-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/arduino/benchmark/context_switch + +context_switch_HW_PATH = boards/arduino + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/benchmark/context_switch.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/mware/event.c \ + bertos/drv/timer.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/kern/proc.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(16000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_MCU = atmega328p +context_switch_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +context_switch_PROGRAMMER_CPU = atmega328p +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +context_switch_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/arduino/benchmark/context_switch/context_switch_user.mk b/2.5/boards/arduino/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..4bc28c58 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -O2 \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/arduino/benchmark/context_switch/main.c b/2.5/boards/arduino/benchmark/context_switch/main.c new file mode 100644 index 00000000..ef29fb02 --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/main.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/arduino/benchmark/context_switch/project.bertos b/2.5/boards/arduino/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..b7ccc0bd --- /dev/null +++ b/2.5/boards/arduino/benchmark/context_switch/project.bertos @@ -0,0 +1,63 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V16000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vpath +p10 +V/opt/avr-4.3.2/bin/avr-gcc +p11 +ssS'ENABLED_MODULES' +p12 +(lp13 +S'ser' +p14 +aS'kernel' +p15 +aS'formatwr' +p16 +aS'kfile' +p17 +aS'context_switch' +p18 +aS'heap' +p19 +aS'signal' +p20 +aS'timer' +p21 +asS'CPU_NAME' +p22 +VATmega328P +p23 +sS'PROJECT_HW_PATH' +p24 +S'../..' +p25 +sS'PROJECT_SRC_PATH' +p26 +S'.' +p27 +sS'PRESET' +p28 +I01 +sS'OUTPUT' +p29 +(lp30 +S'codelite' +p31 +as. \ No newline at end of file diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/.spec b/2.5/boards/arduino/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/arduino/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..884abd34 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,88 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "avr-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/arduino/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/arduino + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/kern/sem.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/benchmark/kernel_footprint.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(16000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_MCU = atmega328p +kernel_footprint_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +kernel_footprint_PROGRAMMER_CPU = atmega328p +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/arduino/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..9e2bc5f6 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -Os \ + # diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/main.c b/2.5/boards/arduino/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..a3f11e50 --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/main.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/arduino/benchmark/kernel_footprint/project.bertos b/2.5/boards/arduino/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..969186fa --- /dev/null +++ b/2.5/boards/arduino/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V16000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Vavr +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V../configure --prefix=/usr/local/avr-4.3.2/ --target=avr --enable-languages=c,c++ --disable-nls --disable-libssp --with-dwarf2 +p15 +sVversion +p16 +V4.3.2 +p17 +sVbuild +p18 +VGCC +p19 +sVpath +p20 +V/opt/avr-4.3.2/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'semaphores' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'msg' +p28 +aS'kernel_footprint' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VATmega328P +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +s. \ No newline at end of file diff --git a/2.5/boards/arduino/examples/.spec b/2.5/boards/arduino/examples/.spec new file mode 100644 index 00000000..d244bbf6 --- /dev/null +++ b/2.5/boards/arduino/examples/.spec @@ -0,0 +1,3 @@ +name="Examples" +ord=1 +description="Full working example projects." diff --git a/2.5/boards/arduino/examples/aprs/.spec b/2.5/boards/arduino/examples/aprs/.spec new file mode 100644 index 00000000..345ff098 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/.spec @@ -0,0 +1,21 @@ +name = 'APRS Radio demo' +description=""" +

APRS

+ +

Overview

+

+The purpose of this project is to implement an APRS tracker using an Arduino +Duemilanove. +

+ +

+This device can be used to periodically send a message through a radio AFSK +channel and log the received messages to a serial port (UART). +

+ +

+For schematics and up to date information on this project, +check the Arduino APRS +page on the BeRTOS site. +

+""" diff --git a/2.5/boards/arduino/examples/aprs/aprs.mk b/2.5/boards/arduino/examples/aprs/aprs.mk new file mode 100644 index 00000000..850dd90b --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/aprs.mk @@ -0,0 +1,89 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the aprs_user.mk file instead. +# + +# Constants automatically defined by the selected modules +aprs_DEBUG = 1 + +# Our target application +TRG += aprs + +aprs_PREFIX = "avr-" + +aprs_SUFFIX = "" + +aprs_SRC_PATH = boards/arduino/examples/aprs + +aprs_HW_PATH = boards/arduino + +# Files automatically generated by the wizard. DO NOT EDIT, USE aprs_USER_CSRC INSTEAD! +aprs_WIZARD_CSRC = \ + aprs/hw/hw_afsk.c \ + bertos/kern/kfile.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/net/afsk.c \ + bertos/net/ax25.c \ + bertos/mware/formatwr.c \ + bertos/algo/crc_ccitt.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE aprs_USER_PCSRC INSTEAD! +aprs_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE aprs_USER_CPPASRC INSTEAD! +aprs_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE aprs_USER_CXXSRC INSTEAD! +aprs_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE aprs_USER_ASRC INSTEAD! +aprs_WIZARD_ASRC = \ + \ + # + +aprs_CPPFLAGS = -D'CPU_FREQ=(16000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(aprs_HW_PATH) -I$(aprs_SRC_PATH) $(aprs_CPU_CPPFLAGS) $(aprs_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_LDFLAGS = $(aprs_CPU_LDFLAGS) $(aprs_WIZARD_LDFLAGS) $(aprs_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_CPPAFLAGS = $(aprs_CPU_CPPAFLAGS) $(aprs_WIZARD_CPPAFLAGS) $(aprs_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_CSRC = $(aprs_CPU_CSRC) $(aprs_WIZARD_CSRC) $(aprs_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_PCSRC = $(aprs_CPU_PCSRC) $(aprs_WIZARD_PCSRC) $(aprs_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_CPPASRC = $(aprs_CPU_CPPASRC) $(aprs_WIZARD_CPPASRC) $(aprs_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_CXXSRC = $(aprs_CPU_CXXSRC) $(aprs_WIZARD_CXXSRC) $(aprs_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_ASRC = $(aprs_CPU_ASRC) $(aprs_WIZARD_ASRC) $(aprs_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +aprs_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +aprs_PROGRAMMER_CPU = atmega328p +aprs_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +aprs_MCU = atmega328p +aprs_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh +aprs_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +aprs_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ + +include $(aprs_SRC_PATH)/aprs_user.mk diff --git a/2.5/boards/arduino/examples/aprs/aprs_user.mk b/2.5/boards/arduino/examples/aprs/aprs_user.mk new file mode 100644 index 00000000..5fb75d29 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/aprs_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +aprs_PROGRAMMER_TYPE = none +aprs_PROGRAMMER_PORT = none + +# Files included by the user. +aprs_USER_CSRC = \ + $(aprs_SRC_PATH)/main.c \ + $(aprs_SRC_PATH)/hw/hw_afsk.c \ + # + +# Files included by the user. +aprs_USER_PCSRC = \ + # + +# Files included by the user. +aprs_USER_CPPASRC = \ + # + +# Files included by the user. +aprs_USER_CXXSRC = \ + # + +# Files included by the user. +aprs_USER_ASRC = \ + # + +# Flags included by the user. +aprs_USER_LDFLAGS = \ + # + +# Flags included by the user. +aprs_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +aprs_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_adc.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_afsk.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_afsk.h new file mode 100644 index 00000000..c2ca2e32 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 64 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 64 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_ax25.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_battfs.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_context_switch.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_dataflash.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_dc_motor.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_debug.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_fat.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_flash25.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_formatwr.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_gfx.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_hashtable.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_hashtable.h new file mode 100644 index 00000000..7560617d --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_hashtable.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of + * the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_heap.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_i2c.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_i2s.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_ini_reader.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_kbd.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_keytag.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_kfile.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_lcd_32122a.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_lcd_hd44.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_lm75.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_md2.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_menu.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_monitor.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_nmea.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_parser.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_phase.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_pocketbus.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_proc.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_proc.h new file mode 100644 index 00000000..3c9439fb --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_pwm.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_ramp.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_randpool.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_sem.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_ser.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_signal.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_spi_bitbang.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_stepper.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_tas5706a.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_thermo.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_timer.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_wdt.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/arduino/examples/aprs/cfg/cfg_xmodem.h b/2.5/boards/arduino/examples/aprs/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/arduino/examples/aprs/main.c b/2.5/boards/arduino/examples/aprs/main.c new file mode 100644 index 00000000..a834597c --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/main.c @@ -0,0 +1,130 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * \author Luca Ottaviano + * \author Daniele Basile + * + * \brief Arduino APRS radio demo. + * + * This example shows how to read and decode APRS radio packets. + * It uses the following modules: + * afsk + * ax25 + * ser + * + * You will see how to use a serial port to output messages, init the afsk demodulator and + * how to parse input messages using ax25 module. + */ + +#include +#include + +#include +#include + +#include +#include + +#include +#include + +static Afsk afsk; +static AX25Ctx ax25; +static Serial ser; + +#define ADC_CH 0 + +/* + * Print on console the message that we have received. + */ +static void message_callback(struct AX25Msg *msg) +{ + kfile_printf(&ser.fd, "\n\nSRC[%.6s-%d], DST[%.6s-%d]\r\n", msg->src.call, msg->src.ssid, msg->dst.call, msg->dst.ssid); + + for (int i = 0; i < msg->rpt_cnt; i++) + kfile_printf(&ser.fd, "via: [%.6s-%d]\r\n", msg->rpt_lst[i].call, msg->rpt_lst[i].ssid); + + kfile_printf(&ser.fd, "DATA: %.*s\r\n", msg->len, msg->info); +} + +static void init(void) +{ + IRQ_ENABLE; + kdbg_init(); + timer_init(); + + /* + * Init afsk demodulator. We need to implement the macros defined in hw_afsk.h, which + * is the hardware abstraction layer. + * We do not need transmission for now, so we set transmission DAC channel to 0. + */ + afsk_init(&afsk, ADC_CH, 0); + /* + * Here we initialize AX25 context, the channel (KFile) we are going to read messages + * from and the callback that will be called on incoming messages. + */ + ax25_init(&ax25, &afsk.fd, message_callback); + + /* Initialize serial port, we are going to use it to show APRS messages*/ + ser_init(&ser, SER_UART0); + ser_setbaudrate(&ser, 115200L); +} + +static AX25Call path[] = AX25_PATH(AX25_CALL("apzbrt", 0), AX25_CALL("nocall", 0), AX25_CALL("wide1", 1), AX25_CALL("wide2", 2)); + +#define APRS_MSG ">Test BeRTOS APRS http://www.bertos.org" + +int main(void) +{ + init(); + ticks_t start = timer_clock(); + + while (1) + { + /* + * This function will look for new messages from the AFSK channel. + * It will call the message_callback() function when a new message is received. + * If there's nothing to do, this function will call cpu_relax() + */ + ax25_poll(&ax25); + + + /* Send out message every 15sec */ + if (timer_clock() - start > ms_to_ticks(15000L)) + { + start = timer_clock(); + ax25_sendVia(&ax25, path, countof(path), APRS_MSG, sizeof(APRS_MSG)); + } + } + return 0; +} diff --git a/2.5/boards/arduino/examples/aprs/project.bertos b/2.5/boards/arduino/examples/aprs/project.bertos new file mode 100644 index 00000000..da73894b --- /dev/null +++ b/2.5/boards/arduino/examples/aprs/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V16000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vaprs +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Vavr +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V../configure --prefix=/usr/local/avr-4.1.2 --target=avr --enable-languages=c --disable-nls --disable-libssp --with-dwarf2 +p15 +sVversion +p16 +V4.1.2 +p17 +sVbuild +p18 +VDeveler s.r.l. 20070824 +p19 +sVpath +p20 +V/localhome/toolchain/avr/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'ax25' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'afsk' +p28 +aS'crc-ccitt' +p29 +aS'timer' +p30 +aS'debug' +p31 +asS'CPU_NAME' +p32 +VATmega328P +p33 +sS'PROJECT_HW_PATH' +p34 +S'../..' +p35 +sS'PROJECT_SRC_PATH' +p36 +S'.' +p37 +sS'PRESET' +p38 +I01 +sS'OUTPUT' +p39 +(lp40 +S'codelite' +p41 +as. \ No newline at end of file diff --git a/2.5/boards/arduino/hw/hw_afsk.c b/2.5/boards/arduino/hw/hw_afsk.c new file mode 100644 index 00000000..892b2a37 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_afsk.c @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + +#include +#include + +#include +#include + + +/* + * Here we are using only one modem. If you need to receive + * from multiple modems, you need to define an array of contexts. + */ +static Afsk *ctx; + +void hw_afsk_adcInit(int ch, Afsk *_ctx) +{ + ctx = _ctx; + ASSERT(ch <= 5); + + AFSK_STROBE_INIT(); + AFSK_STROBE_OFF(); + /* Set prescaler to clk/8 (2 MHz), CTC, top = ICR1 */ + TCCR1A = 0; + TCCR1B = BV(CS11) | BV(WGM13) | BV(WGM12); + /* Set max value to obtain a 9600Hz freq */ + ICR1 = ((CPU_FREQ / 8) / 9600) - 1; + + /* Set reference to AVCC (5V), select CH */ + ADMUX = BV(REFS0) | ch; + + DDRC &= ~BV(ch); + PORTC &= ~BV(ch); + DIDR0 |= BV(ch); + + /* Set autotrigger on Timer1 Input capture flag */ + ADCSRB = BV(ADTS2) | BV(ADTS1) | BV(ADTS0); + /* Enable ADC, autotrigger, 1MHz, IRQ enabled */ + /* We are using the ADC a bit out of specifications otherwise it's not fast enough for our + * purposes */ + ADCSRA = BV(ADEN) | BV(ADSC) | BV(ADATE) | BV(ADIE) | BV(ADPS2); +} + + +bool hw_afsk_dac_isr; + +/* + * This is how you declare an ISR. + */ +DECLARE_ISR(ADC_vect) +{ + TIFR1 = BV(ICF1); + afsk_adc_isr(ctx, ((int16_t)((ADC) >> 2) - 128)); + if (hw_afsk_dac_isr) + PORTD = afsk_dac_isr(ctx) & 0xF0; + else + PORTD = 128; +} diff --git a/2.5/boards/arduino/hw/hw_afsk.h b/2.5/boards/arduino/hw/hw_afsk.h new file mode 100644 index 00000000..a2e075a4 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_afsk.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#include + +struct Afsk; +void hw_afsk_adcInit(int ch, struct Afsk *_ctx); +void hw_afsk_dacInit(int ch, struct Afsk *_ctx); + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ + +/* + * This macro will be called for AFSK initialization. We could implement everything here as a macro, + * but since initialization is rather complicated we decided to split its own function. Such function + * is defined in hw_afsk.c. + * Remember: since this .c file is not created by the wizard, you must add it to your_project_name.mk. + * If you create the file using BeRTOS SDK, it will be added for you. + */ +#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx) + +/* + * Activate strobe pin. We use it for debugging purposes. If you don't use it, simply + * leave empty the following macros + */ +#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0) + +/* + * Set the pin high. This macro is called at the beginning of the interrupt routine + */ +#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0) + +/* + * Set the pin low. This macro is called at the end of the interrupt routine + */ +#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; DDRD |= 0xF0; DDRB |= BV(3); } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB |= BV(3); hw_afsk_dac_isr = true; } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB &= ~BV(3); hw_afsk_dac_isr = false; } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/arduino/hw/hw_buzzer.h b/2.5/boards/arduino/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/2.5/boards/arduino/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/boards/arduino/hw/hw_dataflash.c b/2.5/boards/arduino/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/arduino/hw/hw_dataflash.h b/2.5/boards/arduino/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/boards/arduino/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/arduino/hw/hw_dc_motor.h b/2.5/boards/arduino/hw/hw_dc_motor.h new file mode 100644 index 00000000..8b8dd4b4 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_dc_motor.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +typedef enum MotorDCMap +{ + + /* Put here motor dc declaration */ + MOTOR_DC_CNT + +} MotorDCMap; + +/* + * Init all pin and device to manage dc motor. + */ +#define MOTOR_DC_INIT() \ + do { \ + /* Implement me! */ \ + } while (0) + + +/* + * Enable DC motor. + */ +#define DC_MOTOR_ENABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Disable DC motor. + */ +#define DC_MOTOR_DISABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Set direction for DC motor. + */ +#define DC_MOTOR_SET_DIR(dev, dir) \ + do { \ + /* Implement me! */ \ + } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/arduino/hw/hw_ft245rl.h b/2.5/boards/arduino/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/arduino/hw/hw_i2c_bitbang.h b/2.5/boards/arduino/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/boards/arduino/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/arduino/hw/hw_kbd.h b/2.5/boards/arduino/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/2.5/boards/arduino/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/arduino/hw/hw_lcd_32122a.h b/2.5/boards/arduino/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/arduino/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/arduino/hw/hw_lcd_hd44.h b/2.5/boards/arduino/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/arduino/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/arduino/hw/hw_led.h b/2.5/boards/arduino/hw/hw_led.h new file mode 100644 index 00000000..2bd46ee5 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_led.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include + +#define LED_ON() PORTB |= BV(5) +#define LED_OFF() PORTB &= ~BV(5) +#define LED_INIT() DDRB |= BV(5) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/arduino/hw/hw_lm75.h b/2.5/boards/arduino/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/arduino/hw/hw_mcp41.c b/2.5/boards/arduino/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/boards/arduino/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/arduino/hw/hw_mcp41.h b/2.5/boards/arduino/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/boards/arduino/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/arduino/hw/hw_ntc.c b/2.5/boards/arduino/hw/hw_ntc.c new file mode 100644 index 00000000..3048725c --- /dev/null +++ b/2.5/boards/arduino/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/arduino/hw/hw_ntc.h b/2.5/boards/arduino/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/arduino/hw/hw_phase.c b/2.5/boards/arduino/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/arduino/hw/hw_phase.h b/2.5/boards/arduino/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/arduino/hw/hw_rit128x96.h b/2.5/boards/arduino/hw/hw_rit128x96.h new file mode 100644 index 00000000..c24d1a87 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/arduino/hw/hw_sd.h b/2.5/boards/arduino/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/arduino/hw/hw_ser.h b/2.5/boards/arduino/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/arduino/hw/hw_sipo.h b/2.5/boards/arduino/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/arduino/hw/hw_spi.h b/2.5/boards/arduino/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/boards/arduino/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/arduino/hw/hw_stepper.h b/2.5/boards/arduino/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/arduino/hw/hw_tas5706a.h b/2.5/boards/arduino/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/arduino/hw/hw_thermo.h b/2.5/boards/arduino/hw/hw_thermo.h new file mode 100644 index 00000000..bbfc9dde --- /dev/null +++ b/2.5/boards/arduino/hw/hw_thermo.h @@ -0,0 +1,182 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \version $Id$ + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "thermo_map.h" +#include "ntc_map.h" + +#include +#include + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* Put here convertion function to temperature size */ + break; + + /* Put here your thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + +/*! + * This function should return the timeout for reaching the + * target temperature. + */ +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* return ms_to_ticks(60000); */ + break; + + /* Put here a time out for select thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + + +/*! + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + return ntc_read(dev); +} + + +/*! + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + phase_setPower(TRIAC_TEST, 0); + break; + + /* Put here a thermo device to turn off */ + + default: + ASSERT(0); + } + +} + + +/*! + * Based on the current temperature \a cur_temp and the target temperature \a target, this function turns on and off specific + * triac channel and handles the freezer alarm. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + deg_t dist = target - cur_temp; + //kprintf("dev[%d], dist[%d]\n", dev, dist); + + switch(dev) + { + case THERMO_TEST: + if (dist > 0) + { + /* phase_setPower(TRIAC_TEST, dist * PID_TEST_K); */ + } + else + { + /* phase_setPower(TRIAC_TEST, 0); */ + } + break; + + /* Put here an other thermo device */ + + default: + ASSERT(0); + } +} + + +#define THERMO_HW_INIT _thermo_hw_init() + +/*! + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + ASSERT(phase_initialized); + ASSERT(ntc_initialized); + + phase_setPower(TRIAC_TEST, 0); + + /* Add here the other thermo device */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/arduino/hw/hw_tlv5618.h b/2.5/boards/arduino/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/arduino/hw/hw_tmp123.h b/2.5/boards/arduino/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/boards/arduino/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/arduino/hw/kbd_map.h b/2.5/boards/arduino/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/2.5/boards/arduino/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/arduino/hw/mcp41_map.h b/2.5/boards/arduino/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/boards/arduino/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/arduino/hw/ntc_map.h b/2.5/boards/arduino/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/boards/arduino/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/arduino/hw/phase_map.h b/2.5/boards/arduino/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/boards/arduino/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/arduino/hw/pwm_map.h b/2.5/boards/arduino/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/2.5/boards/arduino/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/arduino/hw/thermo_map.h b/2.5/boards/arduino/hw/thermo_map.h new file mode 100644 index 00000000..4376076a --- /dev/null +++ b/2.5/boards/arduino/hw/thermo_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +typedef uint8_t thermostatus_t; + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT, +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/arduino/templates/.spec b/2.5/boards/arduino/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/arduino/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/arduino/templates/empty/.spec b/2.5/boards/arduino/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_adc.h b/2.5/boards/arduino/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_afsk.h b/2.5/boards/arduino/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_ax25.h b/2.5/boards/arduino/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_battfs.h b/2.5/boards/arduino/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/arduino/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/arduino/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/arduino/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_debug.h b/2.5/boards/arduino/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_fat.h b/2.5/boards/arduino/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_flash25.h b/2.5/boards/arduino/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/arduino/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_gfx.h b/2.5/boards/arduino/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/arduino/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_heap.h b/2.5/boards/arduino/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_i2c.h b/2.5/boards/arduino/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_i2s.h b/2.5/boards/arduino/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/arduino/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_kbd.h b/2.5/boards/arduino/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_keytag.h b/2.5/boards/arduino/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_kfile.h b/2.5/boards/arduino/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/arduino/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/arduino/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_lm75.h b/2.5/boards/arduino/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_md2.h b/2.5/boards/arduino/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_monitor.h b/2.5/boards/arduino/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_nmea.h b/2.5/boards/arduino/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_parser.h b/2.5/boards/arduino/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_phase.h b/2.5/boards/arduino/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/arduino/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_proc.h b/2.5/boards/arduino/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..52b4e414 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_pwm.h b/2.5/boards/arduino/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_ramp.h b/2.5/boards/arduino/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_randpool.h b/2.5/boards/arduino/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_sem.h b/2.5/boards/arduino/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_ser.h b/2.5/boards/arduino/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_signal.h b/2.5/boards/arduino/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/arduino/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_stepper.h b/2.5/boards/arduino/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/arduino/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_thermo.h b/2.5/boards/arduino/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_timer.h b/2.5/boards/arduino/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_wdt.h b/2.5/boards/arduino/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/arduino/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/arduino/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/arduino/templates/empty/empty.mk b/2.5/boards/arduino/templates/empty/empty.mk new file mode 100644 index 00000000..986e3f6c --- /dev/null +++ b/2.5/boards/arduino/templates/empty/empty.mk @@ -0,0 +1,89 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += empty + +empty_PREFIX = "avr-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/arduino/templates/empty + +empty_HW_PATH = boards/arduino + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/benchmark/context_switch.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/mware/event.c \ + bertos/drv/timer.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/kern/proc.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(16000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_MCU = atmega328p +empty_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +empty_PROGRAMMER_CPU = atmega328p +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/arduino/templates/empty/empty_user.mk b/2.5/boards/arduino/templates/empty/empty_user.mk new file mode 100644 index 00000000..4c8ed7ef --- /dev/null +++ b/2.5/boards/arduino/templates/empty/empty_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/arduino/templates/empty/main.c b/2.5/boards/arduino/templates/empty/main.c new file mode 100644 index 00000000..407efe20 --- /dev/null +++ b/2.5/boards/arduino/templates/empty/main.c @@ -0,0 +1,89 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + + /* + * XXX: Arduino has a single UART port that was previously + * initialized for debugging purpose. + * In order to activate the serial driver you should disable + * the debugging module. + */ +#if 0 + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); +#else + (void)out; +#endif + /* Initialize LED driver */ + LED_INIT(); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/arduino/templates/empty/project.bertos b/2.5/boards/arduino/templates/empty/project.bertos new file mode 100644 index 00000000..3612dd1a --- /dev/null +++ b/2.5/boards/arduino/templates/empty/project.bertos @@ -0,0 +1,77 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V16000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Vavr +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V../configure --prefix=/usr/local/avr-4.3.2/ --target=avr --enable-languages=c,c++ --disable-nls --disable-libssp --with-dwarf2 +p15 +sS'version' +p16 +V4.3.2 +p17 +sS'build' +p18 +VGCC +p19 +sS'path' +p20 +V/opt/avr-4.3.2/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'formatwr' +p25 +aS'debug' +p26 +aS'kfile' +p27 +aS'heap' +p28 +aS'timer' +p29 +asS'CPU_NAME' +p30 +VATmega328P +p31 +sS'PROJECT_HW_PATH' +p32 +S'../..' +p33 +sS'PROJECT_SRC_PATH' +p34 +S'.' +p35 +sS'PRESET' +p36 +I01 +sS'OUTPUT' +p37 +(lp38 +s. \ No newline at end of file diff --git a/2.5/boards/arduino/templates/kernel/.spec b/2.5/boards/arduino/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_adc.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_debug.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_fat.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_heap.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_md2.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_parser.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_phase.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_proc.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..e779ebe4 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 1024L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_sem.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_ser.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_signal.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_timer.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/arduino/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/arduino/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/arduino/templates/kernel/kernel.mk b/2.5/boards/arduino/templates/kernel/kernel.mk new file mode 100644 index 00000000..487247c1 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/kernel.mk @@ -0,0 +1,90 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "avr-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/arduino/templates/kernel + +kernel_HW_PATH = boards/arduino + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/kern/kfile.c \ + bertos/kern/signal.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/kern/sem.c \ + bertos/mware/formatwr.c \ + bertos/struct/heap.c \ + bertos/kern/monitor.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(16000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_MCU = atmega328p +kernel_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +kernel_PROGRAMMER_CPU = atmega328p +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/arduino/templates/kernel/kernel_user.mk b/2.5/boards/arduino/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..6dfb4d8c --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/kernel_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/arduino/templates/kernel/main.c b/2.5/boards/arduino/templates/kernel/main.c new file mode 100644 index 00000000..663386f4 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/main.c @@ -0,0 +1,122 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* + * XXX: Arduino has a single UART port that was previously + * initialized for debugging purpose. + * In order to activate the serial driver you should disable + * the debugging module. + */ +#if 0 + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); +#else + (void)out; +#endif + /* Initialize LED driver */ + LED_INIT(); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + LED_ON(); + else + LED_OFF(); + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/arduino/templates/kernel/project.bertos b/2.5/boards/arduino/templates/kernel/project.bertos new file mode 100644 index 00000000..a35e4d70 --- /dev/null +++ b/2.5/boards/arduino/templates/kernel/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V16000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Vavr +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V../configure --prefix=/usr/local/avr-4.3.2/ --target=avr --enable-languages=c,c++ --disable-nls --disable-libssp --with-dwarf2 +p15 +sS'version' +p16 +V4.3.2 +p17 +sS'build' +p18 +VGCC +p19 +sS'path' +p20 +V/opt/avr-4.3.2/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'semaphores' +p26 +aS'monitor' +p27 +aS'formatwr' +p28 +aS'debug' +p29 +aS'kfile' +p30 +aS'heap' +p31 +aS'signal' +p32 +aS'timer' +p33 +asS'CPU_NAME' +p34 +VATmega328P +p35 +sS'PROJECT_HW_PATH' +p36 +S'../..' +p37 +sS'PROJECT_SRC_PATH' +p38 +S'.' +p39 +sS'PRESET' +p40 +I01 +sS'OUTPUT' +p41 +(lp42 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7s-ek/.image.png b/2.5/boards/at91sam7s-ek/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..53586efac7b67b31a1b35b08b6d3f345bc17e5f7 GIT binary patch literal 59017 zcmV)XmV?vfODhMXb6IWPw>00u{Qqwm-6KI%U6j&Oa5 zh|H|l*e&a$UR7pfg!|9kf9~O#4?p|tGXOwDkgx3BSG^E{h=>r8)F+_dsTZk_fdEjC zM?^%Fe)&}w5&H1#cme<-M9j^K2oZ>YlZ*s03e5z2NPz8 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+ + + + + + + + + + + + + + + + + + + +
CPUAtmel AT91SAM7S256
Clock48.023MHz
Memory256kB Flash, 64kB SRAM
Peripheralstimers, ADC, UART, SPI, I²C, PWM, USB, DMA, SSC
+

+

+AT91SAM7S-EK® is based on Atmel AT91SAM7S256 ARM7-TDMI CPU. Visit the AT91SAM7S-EK page for more information. +

+ +''' + diff --git a/2.5/boards/at91sam7s-ek/benchmark/.spec b/2.5/boards/at91sam7s-ek/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/.spec b/2.5/boards/at91sam7s-ek/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/context_switch.mk b/2.5/boards/at91sam7s-ek/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..4579bded --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/context_switch.mk @@ -0,0 +1,96 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "arm-none-eabi-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/at91sam7s-ek/benchmark/context_switch + +context_switch_HW_PATH = boards/at91sam7s-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/benchmark/context_switch.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +context_switch_CPU_CPPAFLAGS = -g -gdwarf-2 +context_switch_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7S256__ +context_switch_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +context_switch_PROGRAMMER_CPU = at91sam7 +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_CPU = arm7tdmi +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +context_switch_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +context_switch_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/context_switch_user.mk b/2.5/boards/at91sam7s-ek/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..932e591b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -O2 \ + # diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/main.c b/2.5/boards/at91sam7s-ek/benchmark/context_switch/main.c new file mode 100644 index 00000000..ef29fb02 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/main.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/at91sam7s-ek/benchmark/context_switch/project.bertos b/2.5/boards/at91sam7s-ek/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..47211f85 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/context_switch/project.bertos @@ -0,0 +1,81 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'context_switch' +p28 +aS'heap' +p29 +aS'timer' +p30 +aS'signal' +p31 +asS'CPU_NAME' +p32 +VAT91SAM7S256 +p33 +sS'PROJECT_HW_PATH' +p34 +S'../..' +p35 +sS'PROJECT_SRC_PATH' +p36 +S'.' +p37 +sS'PRESET' +p38 +I01 +sS'OUTPUT' +p39 +(lp40 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/.spec b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..22b52340 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,97 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "arm-none-eabi-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/at91sam7s-ek/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/at91sam7s-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/kern/sem.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + bertos/benchmark/kernel_footprint.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +kernel_footprint_CPU_CPPAFLAGS = -g -gdwarf-2 +kernel_footprint_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7S256__ +kernel_footprint_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +kernel_footprint_PROGRAMMER_CPU = at91sam7 +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_CPU = arm7tdmi +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_footprint_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..9e2bc5f6 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -Os \ + # diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/main.c b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..a3f11e50 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/main.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/project.bertos b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..78af9c81 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'semaphores' +p26 +aS'formatwr' +p27 +aS'kfile' +p28 +aS'msg' +p29 +aS'kernel_footprint' +p30 +aS'heap' +p31 +aS'timer' +p32 +aS'signal' +p33 +asS'CPU_NAME' +p34 +VAT91SAM7S256 +p35 +sS'PROJECT_HW_PATH' +p36 +S'../..' +p37 +sS'PROJECT_SRC_PATH' +p38 +S'.' +p39 +sS'PRESET' +p40 +I01 +sS'OUTPUT' +p41 +(lp42 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7s-ek/hw/hw_afsk.c b/2.5/boards/at91sam7s-ek/hw/hw_afsk.c new file mode 100644 index 00000000..e2c19c2d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_afsk.c @@ -0,0 +1,128 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + + +#include +#include + +#include +#include +#include +#include + + +#define CONFIG_ADC_CLOCK 4800000UL +#define CONFIG_ADC_STARTUP_TIME 20 +#define CONFIG_ADC_SHTIME 834 + +#define ADC_COMPUTED_PRESCALER ((CPU_FREQ/(2 * CONFIG_ADC_CLOCK)) - 1) +#define ADC_COMPUTED_STARTUPTIME (((CONFIG_ADC_STARTUP_TIME * CONFIG_ADC_CLOCK)/ 8000000UL) - 1) +#define ADC_COMPUTED_SHTIME (((CONFIG_ADC_SHTIME * CONFIG_ADC_CLOCK)/1000000000UL) - 1) + +static Afsk *afsk_ctx; +bool hw_afsk_dac_isr; + + +static void __attribute__((interrupt)) hw_afsk_adc_isr(void) +{ + afsk_adc_isr(afsk_ctx, ADC_LCDR - 128); + + /* Enable block writing */ + PIOA_OWER = DAC_PIN_MASK; + + if (hw_afsk_dac_isr) + PIOA_ODSR = (afsk_dac_isr(afsk_ctx) << 15) & DAC_PIN_MASK; + else + /* Vdac/2 = 128 */ + PIOA_ODSR = 0x4000000; + + PIOA_OWDR = DAC_PIN_MASK; + + AIC_EOICR = 0; +} + +void hw_afsk_adc_init(int ch, struct Afsk * ctx) +{ + afsk_ctx = ctx; + afsk_ctx->adc_ch = ch; + ADC_MR = 0; + ADC_MR |= BV(ADC_LOWRES); + + //Apply computed prescaler value + ADC_MR &= ~ADC_PRESCALER_MASK; + ADC_MR |= ((ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); + + //Apply computed start up time + ADC_MR &= ~ADC_STARTUP_MASK; + ADC_MR |= ((ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + + //Apply computed sample and hold time + ADC_MR &= ~ADC_SHTIME_MASK; + ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK); + + // Disable all interrupt + ADC_IDR = 0xFFFFFFFF; + + //Register interrupt vector + AIC_SVR(ADC_ID) = hw_afsk_adc_isr; + AIC_SMR(ADC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + AIC_IECR = BV(ADC_ID); + + //Enable data ready irq + ADC_IER = BV(ADC_DRDY); + + /////// + PMC_PCER = BV(TC0_ID); + TC_BMR = TC_NONEXC0; + TC0_CCR = BV(TC_SWTRG) | BV(TC_CLKEN); + + TC0_CMR = BV(TC_WAVE); + TC0_CMR |= (TC_WAVSEL_UP_RC_TRG | TC_ACPC_CLEAR_OUTPUT | TC_ACPA_SET_OUTPUT); + TC0_RC = (CPU_FREQ / 2) / 9600; + TC0_RA = TC0_RC / 2; + /////// + + // Auto trigger enabled on TIOA channel 0 + ADC_MR |= BV(ADC_TRGEN); + + //Disable all channels + ADC_CHDR = ADC_CH_MASK; + //Enable channel + ADC_CHER = BV(ch); +} diff --git a/2.5/boards/at91sam7s-ek/hw/hw_afsk.h b/2.5/boards/at91sam7s-ek/hw/hw_afsk.h new file mode 100644 index 00000000..b8402b23 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_afsk.h @@ -0,0 +1,122 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include +struct Afsk; + +void hw_afsk_adc_init(int ch, struct Afsk * ctx); +void hw_afsk_dac_init(int ch, struct Afsk * ctx); +void hw_afsk_radioCtrl(int ch, bool en); + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adc_init(ch, ctx) + +#define AFSK_STROBE_INIT() do { PIOA_PER = BV(0); PIOA_OER = BV(0); PIOA_CODR = BV(0); } while (0) +#define AFSK_STROBE_ON() do { PIOA_SODR = BV(0); } while (0) +#define AFSK_STROBE_OFF() do { PIOA_CODR = BV(0); } while (0) + +#define RADIO_PIN 15 +#define DAC_PIN_MASK (BV(19) | BV(20) | BV(21) | BV(22)) +#define PTT_PIN 14 +#define TX_LED_PIN 1 + + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) \ + do { \ + (void)ch, (void)ctx; \ + /* Disable pullups */ \ + PIOA_PUDR = DAC_PIN_MASK | BV(PTT_PIN) | BV(TX_LED_PIN); \ + /* Set PIO to pin */ \ + PIOA_PER = DAC_PIN_MASK | BV(PTT_PIN) | BV(TX_LED_PIN); \ + /* Disable multidrive on pin */ \ + PIOA_MDDR = DAC_PIN_MASK | BV(PTT_PIN) | BV(TX_LED_PIN); \ + /* Enanble as autput */ \ + PIOA_OER = DAC_PIN_MASK | BV(PTT_PIN) | BV(TX_LED_PIN); \ + PIOA_CODR = BV(PTT_PIN); \ + PIOA_SODR = BV(TX_LED_PIN); \ + } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) \ + do { \ + (void)ch; \ + extern bool hw_afsk_dac_isr; \ + PIOA_SODR = BV(PTT_PIN); \ + PIOA_CODR = BV(TX_LED_PIN); \ + hw_afsk_dac_isr = true; \ + } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) \ + do { \ + (void)ch; \ + extern bool hw_afsk_dac_isr; \ + PIOA_CODR = BV(PTT_PIN); \ + PIOA_SODR = BV(TX_LED_PIN); \ + hw_afsk_dac_isr = false; \ + } while (0) + + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_buzzer.h b/2.5/boards/at91sam7s-ek/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_dataflash.c b/2.5/boards/at91sam7s-ek/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_dataflash.h b/2.5/boards/at91sam7s-ek/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_dc_motor.h b/2.5/boards/at91sam7s-ek/hw/hw_dc_motor.h new file mode 100644 index 00000000..8b8dd4b4 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_dc_motor.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +typedef enum MotorDCMap +{ + + /* Put here motor dc declaration */ + MOTOR_DC_CNT + +} MotorDCMap; + +/* + * Init all pin and device to manage dc motor. + */ +#define MOTOR_DC_INIT() \ + do { \ + /* Implement me! */ \ + } while (0) + + +/* + * Enable DC motor. + */ +#define DC_MOTOR_ENABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Disable DC motor. + */ +#define DC_MOTOR_DISABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Set direction for DC motor. + */ +#define DC_MOTOR_SET_DIR(dev, dir) \ + do { \ + /* Implement me! */ \ + } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_ft245rl.h b/2.5/boards/at91sam7s-ek/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_i2c_bitbang.h b/2.5/boards/at91sam7s-ek/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_kbd.h b/2.5/boards/at91sam7s-ek/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_lcd.h b/2.5/boards/at91sam7s-ek/hw/hw_lcd.h new file mode 100644 index 00000000..3a206a0f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_lcd.h @@ -0,0 +1,156 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \version $Id$ + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_H +#define HW_LCD_H + +#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ +#include /* BV() */ +#include + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +INLINE void lcd_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_lcd_32122a.h b/2.5/boards/at91sam7s-ek/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_lcd_hd44.h b/2.5/boards/at91sam7s-ek/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_led.h b/2.5/boards/at91sam7s-ek/hw/hw_led.h new file mode 100644 index 00000000..360a8251 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_led.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * \brief Led on/off macros for AT91SAM7S. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include +#include + +#define LED_PIN BV(0) + +#define LED_ON() PIOA_SODR = LED_PIN; +#define LED_OFF() PIOA_CODR = LED_PIN; + +#define LED_INIT() \ + do { \ + PIOA_PER = LED_PIN; \ + /* Disable pullups */ \ + PIOA_PUDR = LED_PIN; \ + /* Set PIO stepper power supply as output */ \ + PIOA_OER = LED_PIN; \ + /* Disable multidrive on all pins */ \ + PIOA_MDDR = LED_PIN; \ + } while(0) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_lm75.h b/2.5/boards/at91sam7s-ek/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_mcp41.c b/2.5/boards/at91sam7s-ek/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_mcp41.h b/2.5/boards/at91sam7s-ek/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_ntc.c b/2.5/boards/at91sam7s-ek/hw/hw_ntc.c new file mode 100644 index 00000000..3048725c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/at91sam7s-ek/hw/hw_ntc.h b/2.5/boards/at91sam7s-ek/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_phase.c b/2.5/boards/at91sam7s-ek/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_phase.h b/2.5/boards/at91sam7s-ek/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_rit128x96.h b/2.5/boards/at91sam7s-ek/hw/hw_rit128x96.h new file mode 100644 index 00000000..c24d1a87 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_sd.h b/2.5/boards/at91sam7s-ek/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_ser.h b/2.5/boards/at91sam7s-ek/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_sipo.h b/2.5/boards/at91sam7s-ek/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_spi.h b/2.5/boards/at91sam7s-ek/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_stepper.h b/2.5/boards/at91sam7s-ek/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_tas5706a.h b/2.5/boards/at91sam7s-ek/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_thermo.h b/2.5/boards/at91sam7s-ek/hw/hw_thermo.h new file mode 100644 index 00000000..bbfc9dde --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_thermo.h @@ -0,0 +1,182 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \version $Id$ + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "thermo_map.h" +#include "ntc_map.h" + +#include +#include + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* Put here convertion function to temperature size */ + break; + + /* Put here your thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + +/*! + * This function should return the timeout for reaching the + * target temperature. + */ +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* return ms_to_ticks(60000); */ + break; + + /* Put here a time out for select thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + + +/*! + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + return ntc_read(dev); +} + + +/*! + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + phase_setPower(TRIAC_TEST, 0); + break; + + /* Put here a thermo device to turn off */ + + default: + ASSERT(0); + } + +} + + +/*! + * Based on the current temperature \a cur_temp and the target temperature \a target, this function turns on and off specific + * triac channel and handles the freezer alarm. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + deg_t dist = target - cur_temp; + //kprintf("dev[%d], dist[%d]\n", dev, dist); + + switch(dev) + { + case THERMO_TEST: + if (dist > 0) + { + /* phase_setPower(TRIAC_TEST, dist * PID_TEST_K); */ + } + else + { + /* phase_setPower(TRIAC_TEST, 0); */ + } + break; + + /* Put here an other thermo device */ + + default: + ASSERT(0); + } +} + + +#define THERMO_HW_INIT _thermo_hw_init() + +/*! + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + ASSERT(phase_initialized); + ASSERT(ntc_initialized); + + phase_setPower(TRIAC_TEST, 0); + + /* Add here the other thermo device */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/hw_tlv5618.h b/2.5/boards/at91sam7s-ek/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/at91sam7s-ek/hw/hw_tmp123.h b/2.5/boards/at91sam7s-ek/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/at91sam7s-ek/hw/kbd_map.h b/2.5/boards/at91sam7s-ek/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/mcp41_map.h b/2.5/boards/at91sam7s-ek/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/ntc_map.h b/2.5/boards/at91sam7s-ek/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/phase_map.h b/2.5/boards/at91sam7s-ek/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/pwm_map.h b/2.5/boards/at91sam7s-ek/hw/pwm_map.h new file mode 100644 index 00000000..64fa5c2b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/pwm_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/at91sam7s-ek/hw/thermo_map.h b/2.5/boards/at91sam7s-ek/hw/thermo_map.h new file mode 100644 index 00000000..4376076a --- /dev/null +++ b/2.5/boards/at91sam7s-ek/hw/thermo_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +typedef uint8_t thermostatus_t; + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT, +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/.spec b/2.5/boards/at91sam7s-ek/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/at91sam7s-ek/templates/empty/.spec b/2.5/boards/at91sam7s-ek/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_adc.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_afsk.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ax25.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_battfs.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_debug.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_fat.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_flash25.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_gfx.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_heap.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_i2c.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_i2s.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_kbd.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_keytag.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_kfile.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lm75.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_md2.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_monitor.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_nmea.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_parser.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_phase.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_proc.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..b2c3a965 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_pwm.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ramp.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_randpool.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_sem.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ser.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_signal.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_stepper.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_thermo.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_timer.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_wdt.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/empty/empty.mk b/2.5/boards/at91sam7s-ek/templates/empty/empty.mk new file mode 100644 index 00000000..690ba166 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/empty.mk @@ -0,0 +1,96 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules +empty_DEBUG = 1 + +# Our target application +TRG += empty + +empty_PREFIX = "arm-none-eabi-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/at91sam7s-ek/templates/empty + +empty_HW_PATH = boards/at91sam7s-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/kern/sem.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +empty_CPU_CPPAFLAGS = -g -gdwarf-2 +empty_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7S256__ +empty_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +empty_PROGRAMMER_CPU = at91sam7 +empty_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_CPU = arm7tdmi +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/at91sam7s-ek/templates/empty/empty_user.mk b/2.5/boards/at91sam7s-ek/templates/empty/empty_user.mk new file mode 100644 index 00000000..4c8ed7ef --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/empty_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/at91sam7s-ek/templates/empty/main.c b/2.5/boards/at91sam7s-ek/templates/empty/main.c new file mode 100644 index 00000000..516bfad0 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/main.c @@ -0,0 +1,77 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/at91sam7s-ek/templates/empty/project.bertos b/2.5/boards/at91sam7s-ek/templates/empty/project.bertos new file mode 100644 index 00000000..3effa2de --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/empty/project.bertos @@ -0,0 +1,77 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'formatwr' +p25 +aS'kfile' +p26 +aS'heap' +p27 +aS'timer' +p28 +aS'debug' +p29 +asS'CPU_NAME' +p30 +VAT91SAM7S256 +p31 +sS'PROJECT_HW_PATH' +p32 +S'../..' +p33 +sS'PROJECT_SRC_PATH' +p34 +S'.' +p35 +sS'PRESET' +p36 +I01 +sS'OUTPUT' +p37 +(lp38 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/.spec b/2.5/boards/at91sam7s-ek/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_adc.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_debug.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_fat.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_heap.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_md2.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_parser.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_phase.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_proc.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..7e64c498 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_sem.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ser.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_signal.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_timer.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/kernel.mk b/2.5/boards/at91sam7s-ek/templates/kernel/kernel.mk new file mode 100644 index 00000000..f6246c00 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/kernel.mk @@ -0,0 +1,97 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "arm-none-eabi-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/at91sam7s-ek/templates/kernel + +kernel_HW_PATH = boards/at91sam7s-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/kern/sem.c \ + bertos/kern/monitor.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +kernel_CPU_CPPAFLAGS = -g -gdwarf-2 +kernel_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7S256__ +kernel_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +kernel_PROGRAMMER_CPU = at91sam7 +kernel_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_CPU = arm7tdmi +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/kernel_user.mk b/2.5/boards/at91sam7s-ek/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..6dfb4d8c --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/kernel_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/main.c b/2.5/boards/at91sam7s-ek/templates/kernel/main.c new file mode 100644 index 00000000..28035ddd --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/main.c @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + { + LED_ON(); + } + else + { + LED_OFF(); + } + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/at91sam7s-ek/templates/kernel/project.bertos b/2.5/boards/at91sam7s-ek/templates/kernel/project.bertos new file mode 100644 index 00000000..28acf459 --- /dev/null +++ b/2.5/boards/at91sam7s-ek/templates/kernel/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'semaphores' +p26 +aS'monitor' +p27 +aS'formatwr' +p28 +aS'debug' +p29 +aS'kfile' +p30 +aS'heap' +p31 +aS'signal' +p32 +aS'timer' +p33 +asS'CPU_NAME' +p34 +VAT91SAM7S256 +p35 +sS'PROJECT_HW_PATH' +p36 +S'../..' +p37 +sS'PROJECT_SRC_PATH' +p38 +S'.' +p39 +sS'PRESET' +p40 +I01 +sS'OUTPUT' +p41 +(lp42 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7x-ek/.image.png b/2.5/boards/at91sam7x-ek/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..27a4f29060f2134db09b87fe8f5215f6217282bc GIT binary patch literal 59067 zcmV)dK&QWnP)VJjtNcp!7&jI`@tq9Qj|0!$&x5hfCP%WD1rb90t6bp zp|`5;+PAE%-0pggAMU-GH?y+38z4Bg52DbScRA~~{=e^>6mPuoh7m&Wt`rksumKQ4 zV2mMOw=o7Il7A(ld(U7H2n=v!PXu6w-_q&(N4=Z%1(8-_`tS7(!3=L?a4c`9yleCO znB`%8edrwjgp1Z1A+q)8UGJ{XkdnVXNK3=UXojqBQilfQ(Dw)1$bXmb-r^aAP(vFv zX^(|SiP)qaNj_ps_Pjw4OjNfXLzlU-YuP&zQugY9FaKP3oJTO3NqcDo7?Gba5Ml_U z_w^yY_ORK>z4MbP*=*(ssdp_a|FxMT8+UIF^30J4tfQFVsJi+}x?Y;(&!lx^f4w@h zwvKLRkU0`T{w@}S>NO;Ko#@JTk$hHCW?#V=WHulKa-iegPG_7XM0b@FCKD-x^@u#X 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z;5REwP)=}{3NW{vw5U|@r}Qz)t3;Obs%C`Up@A3sYKgcM(D{2FsmJTvib(07*qoM6N<$f?)_*8UO$Q literal 0 HcmV?d00001 diff --git a/2.5/boards/at91sam7x-ek/.spec b/2.5/boards/at91sam7x-ek/.spec new file mode 100644 index 00000000..41c05732 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/.spec @@ -0,0 +1,31 @@ +name = "Atmel AT91SAM7X-EK" +description = ''' +

Atmel AT91SAM7X-EK

+ +

+ + + + + + + + + + + + + + + + + + + +
CPUAtmel AT91SAM7X256
Clock48.023MHz
Memory256kB Flash, 64kB SRAM
Peripheralstimers, ADC, UART, SPI, I²C, PWM, CAN, USB, DMA, SSC, ethernet, SD card connector
+

+

+AT91SAM7X-EK® is based on Atmel AT91SAM7X256 ARM7-TDMI CPU. Visit the AT91SAM7X-EK page for more information. +

+ +''' diff --git a/2.5/boards/at91sam7x-ek/benchmark/.spec b/2.5/boards/at91sam7x-ek/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/.spec b/2.5/boards/at91sam7x-ek/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_menu.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/context_switch.mk b/2.5/boards/at91sam7x-ek/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..99447836 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/context_switch.mk @@ -0,0 +1,96 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "arm-none-eabi-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/at91sam7x-ek/benchmark/context_switch + +context_switch_HW_PATH = boards/at91sam7x-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/benchmark/context_switch.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +context_switch_CPU_CPPAFLAGS = -g -gdwarf-2 +context_switch_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7X256__ +context_switch_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +context_switch_PROGRAMMER_CPU = at91sam7 +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_CPU = arm7tdmi +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +context_switch_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +context_switch_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/context_switch_user.mk b/2.5/boards/at91sam7x-ek/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..932e591b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -O2 \ + # diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/main.c b/2.5/boards/at91sam7x-ek/benchmark/context_switch/main.c new file mode 100644 index 00000000..ef29fb02 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/main.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/at91sam7x-ek/benchmark/context_switch/project.bertos b/2.5/boards/at91sam7x-ek/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..75fb2885 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/context_switch/project.bertos @@ -0,0 +1,81 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'context_switch' +p28 +aS'heap' +p29 +aS'signal' +p30 +aS'timer' +p31 +asS'CPU_NAME' +p32 +VAT91SAM7X256 +p33 +sS'PROJECT_HW_PATH' +p34 +S'../..' +p35 +sS'PROJECT_SRC_PATH' +p36 +S'.' +p37 +sS'PRESET' +p38 +I01 +sS'OUTPUT' +p39 +(lp40 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/.spec b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_menu.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..4aa72137 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,94 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "arm-none-eabi-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/at91sam7x-ek/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/at91sam7x-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/kern/signal.c \ + bertos/mware/event.c \ + bertos/kern/sem.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/drv/timer.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/benchmark/kernel_footprint.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +kernel_footprint_CPU_CPPAFLAGS = -g -gdwarf-2 +kernel_footprint_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7X256__ +kernel_footprint_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +kernel_footprint_PROGRAMMER_CPU = at91sam7 +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_CPU = arm7tdmi +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_footprint_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..9e2bc5f6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -Os \ + # diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/main.c b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..a3f11e50 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/main.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/project.bertos b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..9336ef95 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'formatwr' +p25 +aS'kfile' +p26 +aS'semaphores' +p27 +aS'msg' +p28 +aS'kernel_footprint' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VAT91SAM7X256 +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +S'codelite' +p42 +as. \ No newline at end of file diff --git a/2.5/boards/at91sam7x-ek/examples/.spec b/2.5/boards/at91sam7x-ek/examples/.spec new file mode 100644 index 00000000..d244bbf6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/.spec @@ -0,0 +1,3 @@ +name="Examples" +ord=1 +description="Full working example projects." diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/.spec b/2.5/boards/at91sam7x-ek/examples/sd_fat/.spec new file mode 100644 index 00000000..138e7b36 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/.spec @@ -0,0 +1,28 @@ +name = 'SD card datalogger' +description=""" +

SD card datalogger

+ +

Overview

+

+The purpose of this project is to create a temperature and pressure logger. +<\p> + +

+The logger measures and stores temperature and pressure readings on a SD card +using the FAT filesystem, so the user can easily download the stored data by +plugging the SD card straight into a PC. Data can then be graphed, printed or +exported to any other application. +<\p> + +

+The user can also easily setup different parameters (like the logging rate, the +filename that represents the log, etc.) without reporgramming the device, +using the "BeRTOS ini reader" module. +<\p> + +

+For schematics and up to date information on this project, +check the SD card datalogger +page on the BeRTOS site. +

+""" diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_adc.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_afsk.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ax25.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_battfs.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_context_switch.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_dataflash.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_debug.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_fat.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_flash25.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_formatwr.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_gfx.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_heap.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_i2c.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_i2s.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_kbd.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_kfile.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_kfile.h new file mode 100644 index 00000000..1b1989c9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_kfile.h @@ -0,0 +1,62 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 1 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lm75.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_md2.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_menu.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_monitor.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_nmea.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_phase.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_proc.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_proc.h new file mode 100644 index 00000000..4a1deb29 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_proc.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_pwm.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ramp.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_randpool.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_sem.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ser.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_signal.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_stepper.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_thermo.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_timer.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_wdt.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_xmodem.h b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_xmodem.h new file mode 100644 index 00000000..2d8f04cd --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_xmodem.h @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/main.c b/2.5/boards/at91sam7x-ek/examples/sd_fat/main.c new file mode 100644 index 00000000..892a6004 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/main.c @@ -0,0 +1,413 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Simple application that implement a log device, running on the AT91SAM7X-EK board. + * + * The main scope of this application is to show you how use the SD memory card and read and write + * settings and logs. Thanks the ini parser module we can read settings, stored on memory card, + * and change the application behaviour. + * Generally the application work in this way: + * - Try to access to SD memory card, if it is present we read the inifile + * - If we have read correctly from SD, we compute the value that we want log + * (temperature, pressure and supplay voltage) + * - If we have enable (from ini file) to log on the file we write the log on it. + * - If we have enable (from ini file) to log on the serial we write the log on it. + * - wait the sample_time (from ini file) + * - contine from beginning. + * + * Here we put the ini file that this example uses. To use it copy + * the folling configutation line into the file called sd_fat.ini (or see INI_FILE_NAME + * define if you want chande the name). + * \code + * + * # Bertos SD fat project example + * # + * # Basic configurarion + * # + * + * [log] + * # Name of log file + * name = test.log + * # Enable the logging on serial device (enable = 1, disable = 0) + * log_on_serial = 1 + * # Enable logging on sd file (enable = 1, disable = 0) + * log_on_file = 1 + * # Period between two log in millisecond + * sample_time = 1000 + * + * [serial_log] + * # Select serial port where log + * port = 0 + * # Serial port baudrate + * baud = 115200 + * + * [log_format] + * # Default text to insert on each log line + * line_header = BeRTOS Log: + * # Use this char to separate each log field + * field_sep = ; + * + * [temperature] + * unit_label = C + * + * [pressure] + * unit_label = hPa + * + * [voltage] + * unit_label = V + * + * \endcode + */ + +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL 3 +#define LOG_VERBOSITY 0 +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include + +#include +#include + +#include +#include +#include + +/* + * Setting structure define + */ +typedef struct INISetting +{ + // INI Log section + char name[80]; ///< Name of log file + bool log_on_serial; ///< Enable the logging on serial device + bool log_on_file; ///< Enable logging on sd file + mtime_t sample_time; ///< Period between two log (millisecond) + + //INI serial log section + int port; ///< Select serial port where log + int baud; ///< Serial port baudrate + + // INI log format section + char line_header[80]; ///< Default text to insert on each log line + char field_sep[10]; ///< Use this char to separate each log field + + // INI temperature section + char temp_unit_label[10]; ///< Default label for measure unit + + // INI pressure section + char press_unit_label[10]; ///< Default label for measure unit + + // INI voltage section + char voltage_unit_label[10]; ///< Default label for measure unit + + +} INISetting; + +/* + * Setting and various defines. + */ +#define INI_FILE_NAME "sd_fat.ini" ///< Default ini file name on SD card. + +// INI Log section +#define LOG_SECTION "log" ///< Log section +#define LOG_NAME_KEY "name" ///< Name of log file +#define LOG_ON_SERIAL "log_on_serial" ///< Enable the logging on serial device +#define LOG_ON_FILE "log_on_file" ///< Enable logging on sd file +#define LOG_SAMPLE_TIME "sample_time" ///< Period between two log + +//INI serial log section +#define SERIAL_LOG "serial_log" ///< Serial log section +#define SERIAL_PORT "port" ///< Select serial port where log +#define SERIAL_BAUD "baud" ///< Serial port baudrate + +// INI log format section +#define LOG_FORMAT_SEC "log_format" ///< log format section +#define FORMAT_LINE_HEADER "line_header" ///< Default text to insert on each log line +#define FORMAT_FIELD_SEP "field_sep" ///< Use this char to separate each log field + +// INI temperature section +#define TEMPERATURE "temperature" ///< temperarute section +#define TEMP_UNIT_LABEL "unit_label" ///< Default label for measure unit + +// INI pressure section +#define PRESSURE "pressure" ///< pressure section +#define PRESS_UNIT_LABEL "unit_label" ///< Default label for measure unit + +// INI voltsge section +#define VOLTAGE "voltage" ///< voltage section +#define VOLTAGE_UNIT_LABEL "unit_label" ///< Default label for measure unit + +/** + * Voltage reference in volts for ADC. + * \note This value should be complied to jumper J13 on AT91SAM7X-EK board, and + * the supply voltade for sensor. + * See schamatics for more info. + */ +#define ADC_VOLTAGE_REF 3300 +/** + * Channel where the sensor we connect it (AD6) + * See schamatics for more info. + */ +#define PRESSURE_SENSOR_CH 6 + +/** + * ADC channle to read voltage supplay + * \note we connect board power supplay (+3.3V) to AD3 port with wire. + */ +#define SUPPLAY_VOLTAGE_CH 3 +#define ADC_SUPPLAY_VOLTAGE 3300 + +/* + * Static definition for application devices. + */ +static SpiDmaAt91 spi_dma; +static Serial temp_sensor_bus; +static Serial log_port; + +static void init(void) +{ + IRQ_ENABLE; + kdbg_init(); + + timer_init(); + LOG_INFO("TIMER init..ok\n"); + + /* + * Init temperature sensor device. + * - init the temperature driver + * - init the spi communication channel + */ + tmp123_init(); + // Init SPI connected to sensor temperature + spimaster_init(&temp_sensor_bus, SER_SPI1); + ser_setbaudrate(&temp_sensor_bus, 1000000L); + LOG_INFO("TMP123 sensor init..ok\n"); + + // Init SPI bus to communicate to SD card + spi_dma_init(&spi_dma); + spi_dma_setclock(20000000L); + LOG_INFO("SD SPI init..ok\n"); + + adc_init(); + LOG_INFO("ADC init..ok\n"); + +} + +int main(void) +{ + // SD fat filesystem context + FATFS fs; + + // Context files that we would manage + FatFile ini_file; + FatFile log_file; + + init(); + + LOG_INFO("SD fat example project %s: %d times\n", VERS_HOST, VERS_BUILD); + + while (1) + { + bool sd_ok = true; + FRESULT result; + + // Setting info + INISetting ini_set; + memset(&ini_set, 0, sizeof(ini_set)); + + sd_ok = sd_init(&spi_dma.fd); + + if (sd_ok) + { + LOG_INFO("Mount FAT filesystem.\n"); + if ((result = f_mount(0, &fs)) != FR_OK) + { + LOG_ERR("Mounting FAT volumes error[%d]\n", result); + sd_ok = false; + } + + LOG_INFO("Read setting from ini file: %s\n", INI_FILE_NAME); + if (sd_ok && ((result = fatfile_open(&ini_file, INI_FILE_NAME, FA_READ)) != FR_OK)) + { + LOG_ERR("Could not open ini file: %s error[%d,]\n", INI_FILE_NAME, result); + sd_ok = false; + } + + if (sd_ok) + { + /* + * If sd is ok, we read all setting from INI file. + * NOTE: if one ini key or section was not found into INI + * file, the iniparser return the defaul value. + */ + ini_getString(&ini_file.fd, LOG_SECTION, LOG_NAME_KEY, "default.log", ini_set.name, sizeof(ini_set.name)); + LOG_INFO("Log file name [%s]\n", ini_set.name); + + char tmp[25]; + ini_getString(&ini_file.fd, LOG_SECTION, LOG_ON_SERIAL, "1", tmp, sizeof(tmp)); + ini_set.log_on_serial = atoi(tmp); + LOG_INFO("Log serial [%d]\n", ini_set.log_on_serial); + ini_getString(&ini_file.fd, LOG_SECTION, LOG_ON_FILE, "1", tmp, sizeof(tmp)); + ini_set.log_on_file = atoi(tmp); + LOG_INFO("Log sd [%d]\n", ini_set.log_on_file); + ini_getString(&ini_file.fd, LOG_SECTION, LOG_SAMPLE_TIME, "500", tmp, sizeof(tmp)); + ini_set.sample_time = atoi(tmp); + LOG_INFO("Sample time [%ld]\n", ini_set.sample_time); + + ini_getString(&ini_file.fd, SERIAL_LOG, SERIAL_PORT, "0", tmp, sizeof(tmp)); + ini_set.port = atoi(tmp); + LOG_INFO("Serial port [%d]\n", ini_set.port); + ini_getString(&ini_file.fd, SERIAL_LOG, SERIAL_BAUD, "115200", tmp, sizeof(tmp)); + ini_set.baud = atoi(tmp); + LOG_INFO("Serial buad [%d]\n", ini_set.baud); + + ini_getString(&ini_file.fd, LOG_FORMAT_SEC, FORMAT_LINE_HEADER, "BeRTOS: ", ini_set.line_header, sizeof(ini_set.line_header)); + LOG_INFO("Serial line header[%s]\n", ini_set.line_header); + + ini_getString(&ini_file.fd, LOG_FORMAT_SEC, FORMAT_FIELD_SEP, ",", ini_set.field_sep, sizeof(ini_set.field_sep)); + LOG_INFO("Serial char sep[%s]\n", ini_set.field_sep); + + ini_getString(&ini_file.fd, TEMPERATURE, TEMP_UNIT_LABEL, "C", ini_set.temp_unit_label, sizeof(ini_set.temp_unit_label)); + LOG_INFO("Temp unit label[%s]\n", ini_set.temp_unit_label); + + ini_getString(&ini_file.fd, PRESSURE, PRESS_UNIT_LABEL, "hPa", ini_set.press_unit_label, sizeof(ini_set.press_unit_label)); + LOG_INFO("Press unit label[%s]\n", ini_set.press_unit_label); + + ini_getString(&ini_file.fd, VOLTAGE, VOLTAGE_UNIT_LABEL, "V", ini_set.voltage_unit_label, sizeof(ini_set.voltage_unit_label)); + LOG_INFO("Press unit label[%s]\n", ini_set.voltage_unit_label); + + } + } + + if (ini_set.log_on_serial) + { + // Init serial log port + ser_init(&log_port, ini_set.port); + ser_setbaudrate(&log_port, ini_set.baud); + LOG_INFO("SERIAL init..port[%d] buad[%d]\n", ini_set.port, ini_set.baud); + } + + char log_string[160]; + memset(log_string, 0, sizeof(log_string)); + + // Supplay voltage + uint16_t vdd = ADC_RANGECONV(adc_read(SUPPLAY_VOLTAGE_CH), 0, ADC_SUPPLAY_VOLTAGE); + + // Read temperature + int16_t tmp = tmp123_read(&temp_sensor_bus.fd); + + // Read pressure + uint16_t vout = ADC_RANGECONV(adc_read(PRESSURE_SENSOR_CH), 0, vdd); + int16_t press = mpxx6115a_press(vout, vdd); + + /* + * Format string whit read data + * line_header + temp + temp_unit_label + field_sep + press + press_unit_label + field_sep + vdd + voltage_unit_label + */ + int wr_len = sprintf(log_string, "%s%d.%01d%s%s%d%s%s%d.%d%s\r\n", ini_set.line_header, + tmp / 10, ABS(tmp % 10), + ini_set.temp_unit_label, + ini_set.field_sep, + press, + ini_set.press_unit_label, + ini_set.field_sep, + vdd / 1000, ABS(vdd % 1000), + ini_set.voltage_unit_label); + + + /* + * if SD is ok, try to open log file and write our data and, only + * if by configuration we have enable the log on file + */ + if (sd_ok && ini_set.log_on_file) + { + // Open log file and do not overwrite the previous log file + result = fatfile_open(&log_file, ini_set.name, FA_OPEN_EXISTING | FA_WRITE); + + // If the log file there isn't we create the new one + if (result == FR_NO_FILE) + { + result = fatfile_open(&log_file, ini_set.name, FA_CREATE_NEW | FA_WRITE); + LOG_INFO("Create the log file: %s\n", ini_set.name); + } + + if ( result == FR_OK) + { + LOG_INFO("Opened log file '%s' size %ld\n", ini_set.name, log_file.fat_file.fsize); + + // To append data we should go to end of file before to start to write + kfile_seek(&log_file.fd, 0, KSM_SEEK_END); + + int len = kfile_write(&log_file.fd, log_string, wr_len); + + // Flush data and close the files. + kfile_flush(&log_file.fd); + kfile_close(&log_file.fd); + + // Unmount always to prevent accidental sd remove. + f_mount(0, NULL); + LOG_INFO("Wrote [%d]\n", len); + } + else + { + LOG_ERR("Unable to open file: '%s' error[%d]\n", ini_set.name, result); + } + } + + // If by configuration we have enable the log on serial, we log it + if (ini_set.log_on_serial) + kfile_write(&log_port.fd, log_string, wr_len); + + timer_delay(ini_set.sample_time); + } + + return 0; +} + diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/project.bertos b/2.5/boards/at91sam7x-ek/examples/sd_fat/project.bertos new file mode 100644 index 00000000..4834b572 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/project.bertos @@ -0,0 +1,91 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vsd_fat +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/lite-respin/eabi/src/gcc-4.3/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --with-gnu-as --with-gnu-ld --enable-languages=c,c++ --disable-shared --with-newlib --with-pkgversion='Sourcery G++ Lite 2008q3-66' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/lite-respin/eabi/install/arm-none-eabi --with-gmp=/scratch/julian/lite-respin/eabi/obj/host-libs-2008q3-66-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/lite-respin/eabi/obj/host-libs-2008q3-66-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/lite-respin/eabi/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/lite-respin/eabi/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.3.2 +p17 +sVbuild +p18 +VSourcery G++ Lite 2008q3-66 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'tmp123' +p25 +aS'formatwr' +p26 +aS'sd' +p27 +aS'adc' +p28 +aS'sprintf' +p29 +aS'kfile' +p30 +aS'fat' +p31 +aS'timer' +p32 +aS'kfilefifo' +p33 +aS'ini_reader' +p34 +aS'debug' +p35 +asS'CPU_NAME' +p36 +VAT91SAM7X256 +p37 +sS'PROJECT_HW_PATH' +p38 +S'../..' +p39 +sS'PROJECT_SRC_PATH' +p40 +S'.' +p41 +sS'PRESET' +p42 +I01 +sS'OUTPUT' +p43 +(lp44 +S'codelite' +p45 +as. \ No newline at end of file diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/sd_fat.mk b/2.5/boards/at91sam7x-ek/examples/sd_fat/sd_fat.mk new file mode 100644 index 00000000..6a0cf557 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/sd_fat.mk @@ -0,0 +1,102 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the sd_fat_user.mk file instead. +# + +# Constants automatically defined by the selected modules +sd_fat_DEBUG = 1 + +# Our target application +TRG += sd_fat + +sd_fat_PREFIX = "arm-none-eabi-" + +sd_fat_SUFFIX = "" + +sd_fat_SRC_PATH = boards/at91sam7x-ek/examples/sd_fat + +sd_fat_HW_PATH = boards/at91sam7x-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_CSRC INSTEAD! +sd_fat_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/struct/kfile_fifo.c \ + bertos/fs/fat.c \ + bertos/kern/kfile.c \ + bertos/drv/tmp123.c \ + bertos/mware/ini_reader.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/cpu/arm/drv/adc_arm.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/adc.c \ + bertos/mware/sprintf.c \ + bertos/drv/timer.c \ + bertos/fs/fatfs/ff.c \ + bertos/mware/event.c \ + bertos/cpu/arm/drv/adc_at91.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + bertos/drv/sd.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_PCSRC INSTEAD! +sd_fat_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_CPPASRC INSTEAD! +sd_fat_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_CXXSRC INSTEAD! +sd_fat_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE sd_fat_USER_ASRC INSTEAD! +sd_fat_WIZARD_ASRC = \ + \ + # + +sd_fat_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(sd_fat_HW_PATH) -I$(sd_fat_SRC_PATH) $(sd_fat_CPU_CPPFLAGS) $(sd_fat_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_LDFLAGS = $(sd_fat_CPU_LDFLAGS) $(sd_fat_WIZARD_LDFLAGS) $(sd_fat_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_CPPAFLAGS = $(sd_fat_CPU_CPPAFLAGS) $(sd_fat_WIZARD_CPPAFLAGS) $(sd_fat_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_CSRC = $(sd_fat_CPU_CSRC) $(sd_fat_WIZARD_CSRC) $(sd_fat_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_PCSRC = $(sd_fat_CPU_PCSRC) $(sd_fat_WIZARD_PCSRC) $(sd_fat_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_CPPASRC = $(sd_fat_CPU_CPPASRC) $(sd_fat_WIZARD_CPPASRC) $(sd_fat_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_CXXSRC = $(sd_fat_CPU_CXXSRC) $(sd_fat_WIZARD_CXXSRC) $(sd_fat_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_ASRC = $(sd_fat_CPU_ASRC) $(sd_fat_WIZARD_ASRC) $(sd_fat_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +sd_fat_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +sd_fat_CPU_CPPAFLAGS = -g -gdwarf-2 +sd_fat_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7X256__ +sd_fat_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +sd_fat_PROGRAMMER_CPU = at91sam7 +sd_fat_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +sd_fat_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +sd_fat_CPU = arm7tdmi +sd_fat_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +sd_fat_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +sd_fat_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(sd_fat_SRC_PATH)/sd_fat_user.mk diff --git a/2.5/boards/at91sam7x-ek/examples/sd_fat/sd_fat_user.mk b/2.5/boards/at91sam7x-ek/examples/sd_fat/sd_fat_user.mk new file mode 100644 index 00000000..a007e43e --- /dev/null +++ b/2.5/boards/at91sam7x-ek/examples/sd_fat/sd_fat_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +sd_fat_PROGRAMMER_TYPE = none +sd_fat_PROGRAMMER_PORT = none + +# Files included by the user. +sd_fat_USER_CSRC = \ + $(sd_fat_SRC_PATH)/main.c \ + bertos/cpu/arm/drv/spi_dma_at91.c \ + # + +# Files included by the user. +sd_fat_USER_PCSRC = \ + # + +# Files included by the user. +sd_fat_USER_CPPASRC = \ + # + +# Files included by the user. +sd_fat_USER_CXXSRC = \ + # + +# Files included by the user. +sd_fat_USER_ASRC = \ + # + +# Flags included by the user. +sd_fat_USER_LDFLAGS = \ + # + +# Flags included by the user. +sd_fat_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +sd_fat_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/at91sam7x-ek/hw/hw_afsk.c b/2.5/boards/at91sam7x-ek/hw/hw_afsk.c new file mode 100644 index 00000000..8adb432d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_afsk.c @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_afsk.h b/2.5/boards/at91sam7x-ek/hw/hw_afsk.h new file mode 100644 index 00000000..ec9b8be2 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_afsk.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_buzzer.h b/2.5/boards/at91sam7x-ek/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_dataflash.c b/2.5/boards/at91sam7x-ek/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_dataflash.h b/2.5/boards/at91sam7x-ek/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_dc_motor.h b/2.5/boards/at91sam7x-ek/hw/hw_dc_motor.h new file mode 100644 index 00000000..f39388df --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_dc_motor.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Define fuctions which read adc value from specific device + */ + #define HW_DC_MOTOR_READ_VALUE(dev, min, max) \ + ({ \ + /* Put here the fuction that read from ADC */ \ + (void)(dev); \ + (void)(min); \ + (void)(max); \ + (0); \ + }) + +// Macro that enable the select DC motor +#define DC_MOTOR_ENABLE(dev) /* Implement me! */ +// Macro that disable the select DC motor +#define DC_MOTOR_DISABLE(dev) /* Implement me! */ + +// Macro that left the DC motor rotor float +#define DC_MOTOR_STOP_FLOAT(dev) DC_MOTOR_DISABLE(dev) +// Macro that put in short circuit DC motor supply pins +#define DC_MOTOR_STOP_BRAKED(dev) do { /* Implement me! */ } while (0) + +// Macro that set motor direction +#define DC_MOTOR_SET_DIR(dev, dir) do { /* Implement me! */ } while (0) + +#define MOTOR_DC_INIT() do { /* Implement me! */ } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_ft245rl.h b/2.5/boards/at91sam7x-ek/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_i2c_bitbang.h b/2.5/boards/at91sam7x-ek/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_kbd.h b/2.5/boards/at91sam7x-ek/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_lcd_32122a.h b/2.5/boards/at91sam7x-ek/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_lcd_hd44.h b/2.5/boards/at91sam7x-ek/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_led.h b/2.5/boards/at91sam7x-ek/hw/hw_led.h new file mode 100644 index 00000000..a28f7404 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_led.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include + +#define LED_ON() PIOB_SODR = BV(22) +#define LED_OFF() PIOB_CODR = BV(22) + +#define LED_INIT() \ + do { \ + PIOB_PER = BV(22);\ + /* Disable pullups */ \ + PIOB_PUDR = BV(22); \ + /* Set PIO stepper power supply as output */ \ + PIOB_OER = BV(22); \ + /* Disable multidrive on all pins */ \ + PIOB_MDDR = BV(22); \ + } while(0) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_lm75.h b/2.5/boards/at91sam7x-ek/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_mcp41.c b/2.5/boards/at91sam7x-ek/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_mcp41.h b/2.5/boards/at91sam7x-ek/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_ntc.c b/2.5/boards/at91sam7x-ek/hw/hw_ntc.c new file mode 100644 index 00000000..3048725c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/at91sam7x-ek/hw/hw_ntc.h b/2.5/boards/at91sam7x-ek/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_phase.c b/2.5/boards/at91sam7x-ek/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_phase.h b/2.5/boards/at91sam7x-ek/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_rit128x96.h b/2.5/boards/at91sam7x-ek/hw/hw_rit128x96.h new file mode 100644 index 00000000..c24d1a87 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_sd.h b/2.5/boards/at91sam7x-ek/hw/hw_sd.h new file mode 100644 index 00000000..51d5c0f6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_sd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \author Luca Ottaviano + * \author Daniele Basile + */ + +#ifndef HW_SD_H +#define HW_SD_H + +/* + * Spi CS connected to PA13 + * (See AT91SAM7X-EK schematic) + */ +#define SD_CS_INIT() \ + do { \ + PIOA_PER = BV(13); \ + PIOA_OER = BV(13); \ + }while(0) + +#define SD_CS_ON() do { PIOA_CODR = BV(13); } while(0) +#define SD_CS_OFF() do { PIOA_SODR = BV(13); } while(0) + +#define SD_PIN_INIT() do { /* not presetn on card socket connector */ } while(0) +#define SD_CARD_PRESENT() /* not presetn on card socket connector */ +#define SD_WRITE_PROTECT() /* not presetn on card socket connector */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_ser.h b/2.5/boards/at91sam7x-ek/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_sipo.h b/2.5/boards/at91sam7x-ek/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_spi.h b/2.5/boards/at91sam7x-ek/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_stepper.h b/2.5/boards/at91sam7x-ek/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_tas5706a.h b/2.5/boards/at91sam7x-ek/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_thermo.h b/2.5/boards/at91sam7x-ek/hw/hw_thermo.h new file mode 100644 index 00000000..6f478068 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_thermo.h @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "hw/thermo_map.h" + +#include + +#include + + +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to read current temperature */ + return 0; +} + + +/** + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to turn off the thermo device */ +} + +/** + * Based on the current temperature \a cur_temp and the target temperature \a target, + * this function turns on and off specific thermo device. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + if (target - cur_temp > 0) + { + /* + * We are leveaving the target temperature, so + * turn on the thermo device! + */ + } + else + { + /* + * Ok, we are near the target temperature, so + * turn off the thermo device! + */ + } + +} + +#define THERMO_HW_INIT _thermo_hw_init() + +/** + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + /* Init your devices here! */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/hw_tlv5618.h b/2.5/boards/at91sam7x-ek/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/at91sam7x-ek/hw/hw_tmp123.h b/2.5/boards/at91sam7x-ek/hw/hw_tmp123.h new file mode 100644 index 00000000..2abe0ce0 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/hw_tmp123.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H +#include + +#define TMP123_HW_CS_EN() PIOA_CODR = BV(21); +#define TMP123_HW_CS_DIS() PIOA_SODR = BV(21); + +#define TMP123_HW_INIT() \ + do { \ + PIOA_PER = BV(21); \ + PIOA_OER = BV(21); \ + PIOA_SODR = BV(21); \ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/at91sam7x-ek/hw/kbd_map.h b/2.5/boards/at91sam7x-ek/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/mcp41_map.h b/2.5/boards/at91sam7x-ek/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/ntc_map.h b/2.5/boards/at91sam7x-ek/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/phase_map.h b/2.5/boards/at91sam7x-ek/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/pwm_map.h b/2.5/boards/at91sam7x-ek/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/at91sam7x-ek/hw/thermo_map.h b/2.5/boards/at91sam7x-ek/hw/thermo_map.h new file mode 100644 index 00000000..7dbe27bc --- /dev/null +++ b/2.5/boards/at91sam7x-ek/hw/thermo_map.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/.spec b/2.5/boards/at91sam7x-ek/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/at91sam7x-ek/templates/empty/.spec b/2.5/boards/at91sam7x-ek/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_adc.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_afsk.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ax25.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_battfs.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_debug.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_fat.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_flash25.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_gfx.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_heap.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_i2c.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_i2s.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_kbd.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_keytag.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_kfile.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lm75.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_md2.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_monitor.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_nmea.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_parser.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_phase.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_proc.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..b2c3a965 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_pwm.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ramp.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_randpool.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_sem.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ser.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_signal.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_stepper.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_thermo.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_timer.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_wdt.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/empty/empty.mk b/2.5/boards/at91sam7x-ek/templates/empty/empty.mk new file mode 100644 index 00000000..db387a92 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/empty.mk @@ -0,0 +1,95 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules +empty_DEBUG = 1 + +# Our target application +TRG += empty + +empty_PREFIX = "arm-none-eabi-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/at91sam7x-ek/templates/empty + +empty_HW_PATH = boards/at91sam7x-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +empty_CPU_CPPAFLAGS = -g -gdwarf-2 +empty_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7X256__ +empty_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +empty_PROGRAMMER_CPU = at91sam7 +empty_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_CPU = arm7tdmi +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/at91sam7x-ek/templates/empty/empty_user.mk b/2.5/boards/at91sam7x-ek/templates/empty/empty_user.mk new file mode 100644 index 00000000..4c8ed7ef --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/empty_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/at91sam7x-ek/templates/empty/main.c b/2.5/boards/at91sam7x-ek/templates/empty/main.c new file mode 100644 index 00000000..1b6b79a6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/main.c @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/at91sam7x-ek/templates/empty/project.bertos b/2.5/boards/at91sam7x-ek/templates/empty/project.bertos new file mode 100644 index 00000000..15fbc7ff --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/empty/project.bertos @@ -0,0 +1,77 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'formatwr' +p25 +aS'debug' +p26 +aS'kfile' +p27 +aS'heap' +p28 +aS'timer' +p29 +asS'CPU_NAME' +p30 +VAT91SAM7X256 +p31 +sS'PROJECT_HW_PATH' +p32 +S'../..' +p33 +sS'PROJECT_SRC_PATH' +p34 +S'.' +p35 +sS'PRESET' +p36 +I01 +sS'OUTPUT' +p37 +(lp38 +s. \ No newline at end of file diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/.spec b/2.5/boards/at91sam7x-ek/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_adc.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_debug.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_fat.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_heap.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_md2.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_parser.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_phase.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_proc.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..7e64c498 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_sem.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ser.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_signal.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_timer.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/kernel.mk b/2.5/boards/at91sam7x-ek/templates/kernel/kernel.mk new file mode 100644 index 00000000..5828c8a1 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/kernel.mk @@ -0,0 +1,97 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "arm-none-eabi-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/at91sam7x-ek/templates/kernel + +kernel_HW_PATH = boards/at91sam7x-ek + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/cpu/arm/drv/timer_at91.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/kern/sem.c \ + bertos/kern/monitor.c \ + bertos/cpu/arm/drv/sysirq_at91.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/cpu/arm/drv/ser_at91.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_at91.S +kernel_CPU_CPPAFLAGS = -g -gdwarf-2 +kernel_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7X256__ +kernel_CPU_CSRC = bertos/cpu/arm/hw/init_at91.c +kernel_PROGRAMMER_CPU = at91sam7 +kernel_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_CPU = arm7tdmi +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/kernel_user.mk b/2.5/boards/at91sam7x-ek/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..6dfb4d8c --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/kernel_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/main.c b/2.5/boards/at91sam7x-ek/templates/kernel/main.c new file mode 100644 index 00000000..ff8b2f12 --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/main.c @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + LED_ON(); + else + LED_OFF(); + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/at91sam7x-ek/templates/kernel/project.bertos b/2.5/boards/at91sam7x-ek/templates/kernel/project.bertos new file mode 100644 index 00000000..859cc5ad --- /dev/null +++ b/2.5/boards/at91sam7x-ek/templates/kernel/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V48023000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'semaphores' +p26 +aS'monitor' +p27 +aS'formatwr' +p28 +aS'debug' +p29 +aS'kfile' +p30 +aS'heap' +p31 +aS'signal' +p32 +aS'timer' +p33 +asS'CPU_NAME' +p34 +VAT91SAM7X256 +p35 +sS'PROJECT_HW_PATH' +p36 +S'../..' +p37 +sS'PROJECT_SRC_PATH' +p38 +S'.' +p39 +sS'PRESET' +p40 +I01 +sS'OUTPUT' +p41 +(lp42 +s. \ No newline at end of file diff --git a/2.5/boards/ek-lm3s1968/.image.png b/2.5/boards/ek-lm3s1968/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..c0f185a737556df6fa9ba95c7821dcd84aae5bcc GIT binary patch literal 53490 zcmV)yK$5?SP)gb;?0c*Nu4ZzuNa)MhjKtSP4I3d$S&oLGU z(C`sMXq@N*OhDKOct#ow00}9N)Pr$pjNW1L-jQ}gZF62r2A51%?%oCCpX;xbQ(?DS}v!(GWunkpT5lN8*NQj#P1wt~iO~YOURpH3MjCVirhfi?xYc2ppz@v0H?J&8_?8PG9BGFIo; zLK$Gpe1IjuKjEPeF`RgIDbe>xKuL>t+N425!lALJz{*j=*+~F#u(CH(&iyE}dt<GbdC` zBZe-VAd^H!p-d>0P68Q$nU0=0RPz%p8cl-WCtfFQ;-l5!*o|-k38z6N{yePz)~#D( zUrc-piMBkVWf+<~8Ws8oAWk+EMs;MUbc061Bm$o7JR%V>APU%04247|rSyH0p67kz z2jBkT`#-i@2J;XJKw(N=U0z=L_h0(Ti%&kMGL7M=e-vqm;h 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zv=7esg{Yb#Lg9Vbv$D&A5bOpMwL31uq0k7I~7!Ii#0FaZGqc`GNFdpQ% zhmF7FuoQYbt)YXB@60So$5bN5WPnaoiD)cAa2^yrbbQ1hz5VyLFxCE7sz<3U@G#n5^>~)PxYwg$}R{PA0U-ghnF<(cyb5Uiu2P zKVq%*5rrp8$%vB#Vp~7Ri`j6gYc?TaursKyh^UI$!FT^3<11&9kTCu~00000NkvXX Hu0mjfnEEmY literal 0 HcmV?d00001 diff --git a/2.5/boards/ek-lm3s1968/.spec b/2.5/boards/ek-lm3s1968/.spec new file mode 100644 index 00000000..f04760ac --- /dev/null +++ b/2.5/boards/ek-lm3s1968/.spec @@ -0,0 +1,32 @@ +name = "Luminary EK-LM3S1968" +description = ''' +

Luminary LM3S1968 Evaluation Board

+ +

+ + + + + + + + + + + + + + + + + + + +
CPULuminary Stellaris LM3S1968
Clock50MHz
Memory256kB Flash, 64kB SRAM
Peripheralstimers, ADC, UART, SSI, I²C, DMA, PWM, quadrature encoder input, OLED display, magnetic speaker
+

+

+LM3S1968 Evaluation Board® is based on Luminary LM3S1968 Cortex-M3 CPU. Visit the LM3S1968 Evaluation Kits page for more information. +

+ +''' + diff --git a/2.5/boards/ek-lm3s1968/benchmark/.spec b/2.5/boards/ek-lm3s1968/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/.spec b/2.5/boards/ek-lm3s1968/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_menu.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ef228257 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/context_switch.mk b/2.5/boards/ek-lm3s1968/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..b77876c6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/context_switch.mk @@ -0,0 +1,93 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "arm-none-eabi-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/ek-lm3s1968/benchmarck/context_switch + +context_switch_HW_PATH = boards/ek-lm3s1968 + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/benchmark/context_switch.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/kern/kfile.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/drv/timer.c \ + bertos/mware/formatwr.c \ + bertos/cpu/cortex-m3/drv/ser_lm3s.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(50000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +context_switch_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +context_switch_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_LM3S1968__ +context_switch_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_lm3s.c bertos/cpu/cortex-m3/drv/clock_lm3s.c +context_switch_PROGRAMMER_CPU = lm3s +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_CPU = cortex-m3 +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +context_switch_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld +context_switch_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-lm3s.sh + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/context_switch_user.mk b/2.5/boards/ek-lm3s1968/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..932e591b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -O2 \ + # diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/main.c b/2.5/boards/ek-lm3s1968/benchmark/context_switch/main.c new file mode 100644 index 00000000..ef29fb02 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/main.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/ek-lm3s1968/benchmark/context_switch/project.bertos b/2.5/boards/ek-lm3s1968/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..74604fa1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/context_switch/project.bertos @@ -0,0 +1,79 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V50000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'context_switch' +p28 +aS'signal' +p29 +aS'timer' +p30 +asS'CPU_NAME' +p31 +VLM3S1968 +p32 +sS'PROJECT_HW_PATH' +p33 +S'../..' +p34 +sS'PROJECT_SRC_PATH' +p35 +S'.' +p36 +sS'PRESET' +p37 +I01 +sS'OUTPUT' +p38 +(lp39 +s. \ No newline at end of file diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/.spec b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_menu.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..ac890acc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,93 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "arm-none-eabi-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/ek-lm3s1968/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/ek-lm3s1968 + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/mware/event.c \ + bertos/kern/sem.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/drv/timer.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/benchmark/kernel_footprint.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(50000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +kernel_footprint_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +kernel_footprint_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_LM3S1968__ +kernel_footprint_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_lm3s.c bertos/cpu/cortex-m3/drv/clock_lm3s.c +kernel_footprint_PROGRAMMER_CPU = lm3s +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_CPU = cortex-m3 +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_footprint_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-lm3s.sh + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..9e2bc5f6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -Os \ + # diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/main.c b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..a3f11e50 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/main.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/project.bertos b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..ae53f959 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V50000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/localhome/toolchain/arm/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'formatwr' +p25 +aS'kfile' +p26 +aS'semaphores' +p27 +aS'msg' +p28 +aS'kernel_footprint' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VLM3S1968 +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +s. \ No newline at end of file diff --git a/2.5/boards/ek-lm3s1968/examples/.spec b/2.5/boards/ek-lm3s1968/examples/.spec new file mode 100644 index 00000000..d244bbf6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/.spec @@ -0,0 +1,3 @@ +name="Examples" +ord=1 +description="Full working example projects." diff --git a/2.5/boards/ek-lm3s1968/examples/gps/.spec b/2.5/boards/ek-lm3s1968/examples/gps/.spec new file mode 100644 index 00000000..7ad25731 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/.spec @@ -0,0 +1,19 @@ +name = 'DevelGPS' +description=""" + + +

Overview

+ +

The purpose of this project is to implement a portable GPS locator / geocaching +finder with the Cortex-M3 based Luminary Micro LM3S1968 evaluation board.

+ +

The device proposes a user interface to configure the GPS coordinates of a +target location and shows on the OLED display the direction and distance to +reach the target.

+ +

+For schematics and up to date information on this project, +check the DevelGPS page +on the BeRTOS site. +

+""" diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_adc.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_afsk.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ax25.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_battfs.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_context_switch.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_dataflash.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_dc_motor.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..409badda --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_dc_motor.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_debug.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_fat.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_flash25.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_formatwr.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_formatwr.h new file mode 100644 index 00000000..10d41b48 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_formatwr.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_gfx.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_hashtable.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_heap.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_i2c.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_i2s.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ini_reader.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_kbd.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_keytag.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_kfile.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_kfile.h new file mode 100644 index 00000000..1b1989c9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_kfile.h @@ -0,0 +1,62 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 1 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lm75.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_md2.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_menu.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_monitor.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_nmea.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_parser.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_phase.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pid.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pid.h new file mode 100644 index 00000000..5a8375bb --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pid.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PID_H +#define CFG_PID_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PID_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PID_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PID_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pocketbus.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..687e535d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pocketbus.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_proc.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_proc.h new file mode 100644 index 00000000..eddd615c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_proc.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 8192L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pwm.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ramp.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_randpool.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_sem.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ser.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ser.h new file mode 100644 index 00000000..d14b821e --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 128 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_signal.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_spi_bitbang.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_spi_dma.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_spi_dma.h new file mode 100644 index 00000000..0a69f757 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_spi_dma.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for spi dma module. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef CFG_SPI_DMA_H +#define CFG_SPI_DMA_H + +/** + * Size of the outbound FIFO buffer for SPI DMA [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_SPI_DMA_TXBUFSIZE 512 + + +/** + * Max size received for each DMA transfer [bytes]. + * Longer buffers will be split in two or more transfers of this size. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SPI_DMA_MAX_RX 512 + + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SPI_DMA_TX_TIMEOUT -1 + + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_stepper.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_tas5706a.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_thermo.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_thermo.h new file mode 100644 index 00000000..e68c6371 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_thermo.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_timer.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_wdt.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_xmodem.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_xmodem.h new file mode 100644 index 00000000..eb8897f4 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/cfg_xmodem.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/ek-lm3s1968/examples/gps/cfg/log.h b/2.5/boards/ek-lm3s1968/examples/gps/cfg/log.h new file mode 100644 index 00000000..b6649620 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/cfg/log.h @@ -0,0 +1,170 @@ +/** + * \file + * + * + * \brief Logging system module. + * + * This module implement a simple interface to use the multi level logging system. + * The log message have the priority order, like this: + * + * - error message (highest) + * - warning message + * - info message (lowest) + * + * With this priority system we can log only the message that have egual or major + * priority than log level that you has been configurate. Further you can have a + * differ log level for each module that you want. To do this you just need to + * define LOG_LEVEL in cfg of select module. + * When you set a log level, the system logs only the message that have priority + * egual or major that you have define, but the other logs function are not include + * at compile time, so all used logs function are linked, but the other no. + * + * To use logging system you should include this module in your drive and use + * a LOG_ERROR, LOG_WARNING and LOG_INFO macros to set the level log of the message. + * Then you should define a LOG_LEVEL and LOG_VERBOSE costant in your + * \c cfg/cfg_\.h using the follow policy: + * + * - in your file \c cfg/cfg_\.h, you define the logging + * level and verbosity mode for your specific module: + * + * \code + * /// Module logging level. + * #define _LOG_LEVEL LOG_LVL_INFO + * + * /// Module logging format. + * #define _LOG_FORMAT LOG_FMT_VERBOSE + * \endcode + * + * - then, in the module that you use a logging macros you should define + * a LOG_LEVEL and LOG_FORMAT using the previous value that you have define + * in cfg_.h header. After this you should include the cfg/log.h + * module: + * + * \code + * // Define log settings for cfg/log.h. + * #define LOG_LEVEL _LOG_LEVEL + * #define LOG_FORMAT _LOG_FORMAT + * #include + * \endcode + * + * if you include a log.h module without define the LOG_LEVEL and LOG_VERBOSE + * macros, the module use the default setting (see below). + * + * WARNING: when use the log.h module, and you want to set a your log level + * make sure to include this module after a \c cfg_.h, because the + * LOG_LEVEL and LOG_VERBOSE macros must be defined before to include log module, + * otherwise the log module use a default settings. + * + * \version $Id$ + * \author Daniele Basile + * + * $WIZ$ + */ + +#ifndef CFG_LOG_H +#define CFG_LOG_H + +#include + + +// Use a default setting if nobody defined a log level +#ifndef LOG_LEVEL +#define LOG_LEVEL LOG_LVL_WARN +#endif + +// Use a default setting if nobody defined a log format +#ifndef LOG_FORMAT +#define LOG_FORMAT LOG_FMT_TERSE +#endif + +/** + * \name Logging level definition + * + * When you choose a log level messages you choose + * also which print function are linked. + * If you choose a low level of log you link all log function (error, warning and info), + * but if choose a hight level you link only that have the priority egual or hight. + * The priority level go from error (highest) to info (lowest) (see cfg/debug.h + * for more detail). + * + * $WIZ$ log_level = "LOG_LVL_NONE", "LOG_LVL_ERR", "LOG_LVL_WARN", "LOG_LVL_INFO" + * } + */ +#define LOG_LVL_NONE 0 +#define LOG_LVL_ERR 1 +#define LOG_LVL_WARN 2 +#define LOG_LVL_INFO 3 + +/** + * \name Logging format + * + * There are two logging format: terse and verbose. The latter prepends + * function names and line number information to each log entry. + * + * $WIZ$ log_format = "LOG_FMT_VERBOSE", "LOG_FMT_TERSE" + */ +#define LOG_FMT_VERBOSE 1 +#define LOG_FMT_TERSE 0 + +#if LOG_FORMAT == LOG_FMT_VERBOSE + #define LOG_PRINT(str_level, str,...) kprintf("%s():%d:%s: " str, __func__, __LINE__, str_level, ## __VA_ARGS__) +#elif LOG_FORMAT == LOG_FMT_TERSE + #define LOG_PRINT(str_level, str,...) kprintf("%s: " str, str_level, ## __VA_ARGS__) +#else + #error No LOG_FORMAT defined +#endif + +#if LOG_LEVEL >= LOG_LVL_ERR + #define LOG_ERR(str,...) LOG_PRINT("ERR", str, ## __VA_ARGS__) + #define LOG_ERRB(x) x +#else + INLINE void LOG_ERR(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_ERRB(x) /* Nothing */ +#endif + +#if LOG_LEVEL >= LOG_LVL_WARN + #define LOG_WARN(str,...) LOG_PRINT("WARN", str, ## __VA_ARGS__) + #define LOG_WARNB(x) x +#else + INLINE void LOG_WARN(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_WARNB(x) /* Nothing */ +#endif + +#if LOG_LEVEL >= LOG_LVL_INFO + #define LOG_INFO(str,...) LOG_PRINT("INFO", str, ## __VA_ARGS__) + #define LOG_INFOB(x) x +#else + INLINE void LOG_INFO(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_INFOB(x) /* Nothing */ +#endif + + +#endif /* CFG_LOG_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/compass.c b/2.5/boards/ek-lm3s1968/examples/gps/compass.c new file mode 100644 index 00000000..7b3adefe --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/compass.c @@ -0,0 +1,62 @@ +#include +#include +#include +#include "compass.h" + +static const char *_compass_heading[] = +{ + "N", "NNE", "NE", "ENE", + "E", "ESE", "SE", "SSE", + "S", "SSW", "SW", "WSW", + "W", "WNW", "NW", "NNW", +}; + +/** + * Use the Haversine formula to calculate great-circle distances between the + * two points. + * + * The Haversine formula remains particularly well-conditioned for numerical + * computation even at small distances, unlike calculations based on the + * spherical law of cosines. + */ +float distance(float lat1, float lon1, float lat2, float lon2) +{ + const float PLANET_RADIUS = 6371000; + float d_lat = deg2rad(lat2 - lat1); + float d_lon = deg2rad(lon2 - lon1); + + float a = sin(d_lat / 2) * sin(d_lat / 2) + + cos(deg2rad(lat1)) * cos(deg2rad(lat2)) * + sin(d_lon / 2) * sin(d_lon / 2); + float c = 2 * atan2(sqrt(a), sqrt(1 - a)); + + return PLANET_RADIUS * c; +} + +/** + * Evaluate the bearing (also known as forward azimuth) using spherical law + * coordinates. + * + * The bearing is a straight line along a great-circle arc from the start point + * to the destination point. + */ +int bearing(float lat1, float lon1, float lat2, float lon2) +{ + float res; + + res = rad2deg(atan2(sin(deg2rad(lon2 - lon1)) * + cos(deg2rad(lat2)), cos(deg2rad(lat1)) * + sin(deg2rad(lat2)) - sin(deg2rad(lat1)) * + cos(deg2rad(lat2)) * cos(deg2rad(lon2) - + deg2rad(lon1)))); + return ((int)res + 360) % 360; +} + +const char *compass_heading(int bearing) +{ + ASSERT(bearing >= 0 && bearing < 360); + /* + * bearing / 22.5 + */ + return _compass_heading[(bearing << 4) / 360]; +} diff --git a/2.5/boards/ek-lm3s1968/examples/gps/compass.h b/2.5/boards/ek-lm3s1968/examples/gps/compass.h new file mode 100644 index 00000000..f1f4c5f6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/compass.h @@ -0,0 +1,20 @@ +#ifndef COMPASS_H +#define COMPASS_H + +#define PI 3.14159265358979323846 + +INLINE float deg2rad(float deg) +{ + return deg * PI / 180; +} + +INLINE float rad2deg(float rad) +{ + return rad * 180 / PI; +} + +float distance(float lat1, float lon1, float lat2, float lon2); +int bearing(float lat1, float lon1, float lat2, float lon2); +const char *compass_heading(int bearing); + +#endif /* COMPASS_H */ diff --git a/2.5/boards/ek-lm3s1968/examples/gps/gps.mk b/2.5/boards/ek-lm3s1968/examples/gps/gps.mk new file mode 100644 index 00000000..99c68f36 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/gps.mk @@ -0,0 +1,103 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the gps_user.mk file instead. +# + +# Constants automatically defined by the selected modules +gps_DEBUG = 1 + +# Our target application +TRG += gps + +gps_PREFIX = "arm-none-eabi-" + +gps_SUFFIX = "" + +gps_SRC_PATH = boards/ek-lm3s1968/examples/gps + +gps_HW_PATH = boards/ek-lm3s1968 + +# Files automatically generated by the wizard. DO NOT EDIT, USE gps_USER_CSRC INSTEAD! +gps_WIZARD_CSRC = \ + bertos/kern/sem.c \ + bertos/mware/formatwr.c \ + bertos/net/nmea.c \ + bertos/drv/kbd.c \ + bertos/gfx/line.c \ + bertos/drv/lcd_rit128x96.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/kern/kfile.c \ + bertos/gfx/text_format.c \ + bertos/struct/heap.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + bertos/net/nmeap/src/nmeap01.c \ + bertos/gfx/text.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/drv/timer.c \ + bertos/kern/signal.c \ + bertos/kern/proc.c \ + bertos/mware/event.c \ + bertos/gfx/bitmap.c \ + bertos/cpu/cortex-m3/drv/ser_lm3s.c \ + bertos/mware/sprintf.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE gps_USER_PCSRC INSTEAD! +gps_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE gps_USER_CPPASRC INSTEAD! +gps_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE gps_USER_CXXSRC INSTEAD! +gps_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE gps_USER_ASRC INSTEAD! +gps_WIZARD_ASRC = \ + \ + # + +gps_CPPFLAGS = -D'CPU_FREQ=(50000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(gps_HW_PATH) -I$(gps_SRC_PATH) $(gps_CPU_CPPFLAGS) $(gps_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_LDFLAGS = $(gps_CPU_LDFLAGS) $(gps_WIZARD_LDFLAGS) $(gps_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_CPPAFLAGS = $(gps_CPU_CPPAFLAGS) $(gps_WIZARD_CPPAFLAGS) $(gps_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_CSRC = $(gps_CPU_CSRC) $(gps_WIZARD_CSRC) $(gps_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_PCSRC = $(gps_CPU_PCSRC) $(gps_WIZARD_PCSRC) $(gps_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_CPPASRC = $(gps_CPU_CPPASRC) $(gps_WIZARD_CPPASRC) $(gps_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_CXXSRC = $(gps_CPU_CXXSRC) $(gps_WIZARD_CXXSRC) $(gps_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_ASRC = $(gps_CPU_ASRC) $(gps_WIZARD_ASRC) $(gps_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +gps_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +gps_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +gps_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_LM3S1968__ +gps_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_lm3s.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_lm3s.c bertos/cpu/cortex-m3/drv/clock_lm3s.c +gps_PROGRAMMER_CPU = lm3s +gps_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +gps_CPU = cortex-m3 +gps_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +gps_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +gps_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld +gps_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-cortex.sh + +include $(gps_SRC_PATH)/gps_user.mk diff --git a/2.5/boards/ek-lm3s1968/examples/gps/gps_user.mk b/2.5/boards/ek-lm3s1968/examples/gps/gps_user.mk new file mode 100644 index 00000000..e605afb6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/gps_user.mk @@ -0,0 +1,55 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile template for BeRTOS wizard. +# +# Author: Lorenzo Berni +# +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +gps_PROGRAMMER_TYPE = none +gps_PROGRAMMER_PORT = none + +# Files included by the user. +gps_USER_CSRC = \ + bertos/cpu/cortex-m3/drv/flash_lm3s.c \ + bertos/cpu/cortex-m3/drv/ssi_lm3s.c \ + bertos/fonts/gohu.c \ + bertos/fonts/luBS14.c \ + bertos/gui/menu.c \ + $(gps_SRC_PATH)/compass.c \ + $(gps_SRC_PATH)/main.c \ + # + +# Files included by the user. +gps_USER_PCSRC = \ + # + +# Files included by the user. +gps_USER_CPPASRC = \ + # + +# Files included by the user. +gps_USER_CXXSRC = \ + # + +# Files included by the user. +gps_USER_ASRC = \ + # + +# Flags included by the user. +gps_USER_LDFLAGS = \ + # + +# Flags included by the user. +gps_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +gps_USER_CPPFLAGS = \ + -O2 -fomit-frame-pointer \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/ek-lm3s1968/examples/gps/logo.c b/2.5/boards/ek-lm3s1968/examples/gps/logo.c new file mode 100644 index 00000000..594ec471 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/logo.c @@ -0,0 +1,547 @@ +#define BITMAP_HEADER_SIZE 0x76 +#define BITMAP_WIDTH_OFFSET 0x12 +#define BITMAP_HEIGHT_OFFSET 0x16 + +/* BeRTOS logo */ +static const unsigned char logo[] = { + 0x42, 0x4d, 0xde, 0x10, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x76, 0x00, 0x00, 0x00, 0x28, 0x00, + 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x46, 0x00, + 0x00, 0x00, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x68, 0x10, 0x00, 0x00, 0x13, 0x0b, + 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x26, 0x26, + 0x26, 0x00, 0x32, 0x32, 0x32, 0x00, 0x3e, 0x3e, + 0x3e, 0x00, 0x4e, 0x4e, 0x4e, 0x00, 0x5c, 0x5c, + 0x5c, 0x00, 0x68, 0x68, 0x68, 0x00, 0x7d, 0x7d, + 0x7d, 0x00, 0x82, 0x82, 0x82, 0x00, 0x93, 0x93, + 0x93, 0x00, 0xa3, 0xa3, 0xa3, 0x00, 0xb3, 0xb3, + 0xb3, 0x00, 0xbf, 0xbf, 0xbf, 0x00, 0xce, 0xce, + 0xce, 0x00, 0xdd, 0xdd, 0xdd, 0x00, 0xeb, 0xeb, + 0xeb, 0x00, 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xeb, 0x98, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x89, + 0xbe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x98, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x82, 0x41, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x89, 0xcf, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xed, 0xcb, 0x98, 0x98, 0x88, 0x26, 0x77, 0x18, + 0x88, 0x88, 0x99, 0xab, 0xde, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x16, 0x68, 0x81, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x45, 0x45, 0x84, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xf5, 0x15, 0x67, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xf6, 0x45, 0x97, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x15, 0x16, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x61, 0x31, 0x1a, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xf1, 0x1c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x17, 0x64, 0xcf, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x91, 0x15, 0x55, + 0x52, 0x10, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x17, 0x60, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x67, 0x77, 0x1e, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x01, 0x25, 0x55, 0x55, 0x55, 0x54, 0x10, 0x9f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf5, + 0x78, 0x62, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x17, 0x77, 0x71, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xf6, 0x11, 0x55, 0x66, 0x55, 0x55, + 0x55, 0x55, 0x55, 0x21, 0x3f, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xe1, 0x69, 0x71, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xf1, 0x66, 0x74, 0xcf, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xe5, 0x13, 0x55, + 0x66, 0x66, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, + 0x31, 0x08, 0xff, 0xff, 0xff, 0xff, 0xff, 0x26, + 0x87, 0x57, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xfa, 0x37, 0x77, 0x1f, 0xff, 0xff, 0xff, 0xff, + 0x71, 0x14, 0x56, 0x66, 0x66, 0x66, 0x66, 0x55, + 0x55, 0x55, 0x55, 0x55, 0x55, 0x52, 0x12, 0xff, + 0xff, 0xff, 0xff, 0x07, 0x97, 0x1f, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x17, 0x67, 0x0f, + 0xff, 0xff, 0xfe, 0x40, 0x35, 0x56, 0x77, 0x77, + 0x77, 0x66, 0x66, 0x66, 0x66, 0x66, 0x55, 0x55, + 0x55, 0x55, 0x53, 0x10, 0xcf, 0xff, 0xff, 0x26, + 0x96, 0x2f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x17, 0x67, 0x1f, 0xff, 0xe1, 0x11, 0x22, + 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, + 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, + 0x21, 0x11, 0xff, 0x36, 0x96, 0x8f, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x17, 0x77, 0x14, + 0x55, 0x61, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, + 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, + 0x77, 0x77, 0x77, 0x77, 0x77, 0x73, 0xff, 0x27, + 0x86, 0x2f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xfc, 0x18, 0x77, 0x11, 0x11, 0x11, 0x99, 0x99, + 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, + 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, + 0x99, 0x94, 0xfe, 0x07, 0x67, 0x1e, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xd1, 0x68, 0x75, 0x31, + 0x11, 0x11, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa5, 0x11, 0x16, + 0x78, 0x71, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe4, + 0x27, 0x96, 0x60, 0xfa, 0x11, 0x11, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x83, 0x11, 0xe1, 0x76, 0x77, 0x01, 0x34, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xe1, 0x36, 0x79, 0x67, 0x29, 0xff, + 0x11, 0x11, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x82, 0x1a, 0xf4, + 0x77, 0x67, 0x77, 0x77, 0x2f, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x46, 0x89, + 0x86, 0x67, 0x5f, 0xff, 0xf1, 0x11, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x63, 0x68, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x21, 0x11, + 0x78, 0x80, 0x4f, 0xff, 0x17, 0x77, 0x67, 0x77, + 0x1f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x16, 0x66, 0x61, 0x1e, 0xff, 0xff, + 0xff, 0xf1, 0x88, 0x88, 0x88, 0x86, 0xbf, 0xff, + 0xff, 0xb1, 0x88, 0x88, 0x88, 0x88, 0xaa, 0xaa, + 0x88, 0x1f, 0xff, 0xdc, 0xfe, 0x11, 0xff, 0xff, + 0xfd, 0x11, 0x66, 0x63, 0x1f, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x32, + 0x8e, 0xff, 0xff, 0xff, 0xff, 0xf1, 0x88, 0x88, + 0x88, 0x59, 0xfb, 0x67, 0x77, 0x6d, 0x58, 0x88, + 0x88, 0x8a, 0xaa, 0xaa, 0x83, 0xff, 0x67, 0x77, + 0x76, 0xf1, 0xff, 0xff, 0xff, 0xff, 0x86, 0x8d, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xf0, 0x88, 0x88, 0x88, 0x6f, 0x77, 0x76, + 0x88, 0x76, 0x78, 0x88, 0x88, 0x9a, 0xaa, 0xaa, + 0x1f, 0xf6, 0x66, 0x89, 0x97, 0x71, 0x77, 0x77, + 0x77, 0x6f, 0xf6, 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+#include "logo.c" +#define KEY_MASK (K_UP | K_DOWN | K_LEFT | K_RIGHT | K_OK) +extern Font font_gohu; +static uint8_t raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]; +static Bitmap lcd_bitmap; + +#define SCRSVR_TIME 60000 +static ticks_t scrsvr_timestamp; +static bool is_lcd_off; + +/* Serial and NMEA stuff */ +static Serial ser_port; +static nmeap_context_t nmea; +static NmeaGga gga; +static NmeaRmc rmc; +static NmeaVtg vtg; +static bool nmea_update; + +static long prev_b; +static long lat, lon; +static long target_lat, target_lon; + +/* Storage stuff */ +#define GPS_POS_MAGIC 0xdeadbeef +static Flash flash; + +static void flash_load_target(void) +{ + uint32_t magic; + + kfile_seek(&flash.fd, -FLASH_PAGE_SIZE_BYTES, KSM_SEEK_END); + kfile_read(&flash.fd, &magic, sizeof(magic)); + if (magic == GPS_POS_MAGIC) + { + kfile_read(&flash.fd, &target_lat, sizeof(target_lat)); + kfile_read(&flash.fd, &target_lon, sizeof(target_lon)); + } +} + +static void flash_save_target(void) +{ + const uint32_t magic = GPS_POS_MAGIC; + + kfile_seek(&flash.fd, -FLASH_PAGE_SIZE_BYTES, KSM_SEEK_END); + kfile_write(&flash.fd, &magic, sizeof(magic)); + kfile_write(&flash.fd, &target_lat, sizeof(target_lat)); + kfile_write(&flash.fd, &target_lon, sizeof(target_lon)); + kfile_flush(&flash.fd); +} + + +/* Display management */ +INLINE void video_off(void) +{ + unsigned long delta = + (long)ticks_to_ms(timer_clock_unlocked()) - + (long)scrsvr_timestamp; + + if (!is_lcd_off && delta > SCRSVR_TIME) + { + rit128x96_off(); + is_lcd_off = true; + } +} + +INLINE void video_on(void) +{ + if (is_lcd_off) + { + rit128x96_on(); + is_lcd_off = false; + } + scrsvr_timestamp = ticks_to_ms(timer_clock_unlocked()); +} + +INLINE void repaint(Bitmap *bm) +{ + rit128x96_blitBitmap(bm); +} + +INLINE keymask_t keypad_peek(void) +{ + keymask_t key = kbd_peek(); + + if (key & KEY_MASK) + { + if (is_lcd_off) + key = 0; + video_on(); + } + return key; +} + +/* Status LED thread */ +static void NORETURN led_process(void) +{ + while (1) + { + video_off(); + if (!nmea_update) + { + timer_delay(1000); + continue; + } + LED_ON(); + timer_delay(100); + LED_OFF(); + nmea_update = false; + } +} + +/* NMEA parser */ +static void nmea_callback(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)data; + (void)user_data; + + lat = (long)gga.latitude; + lon = (long)gga.longitude; + + nmea_update = true; +} + +static void NORETURN ser_process(void) +{ + while (1) + { + nmea_poll(&nmea, &ser_port.fd); + kfile_clearerr(&ser_port.fd); + } +} + +/* Target position screen */ +static void target(Bitmap *bm) +{ + const long STEP = 10000000, + MAX_LAT = 90000000, MIN_LAT = -90000000, + MAX_LON = 180000000, MIN_LON = -180000000; + long step = STEP, target; + int row = 0, pos = 1; + keymask_t key; + + gfx_bitmapClear(bm); + video_on(); + text_xprintf(bm, 0, 0, + STYLEF_UNDERLINE | TEXT_CENTER | TEXT_FILL, + "Target position"); + while (1) + { + if (!is_lcd_off) + { + text_xprintf(bm, 3, 0, TEXT_FILL, + "Lat: %02ld.%06ld %c %s", + ABS(target_lat) / 1000000L, + ABS(target_lat) % 1000000, + target_lat >= 0 ? 'N' : 'S', + row == 0 ? "<-" : ""); + text_xprintf(bm, row ? 4 : 6, 0, + TEXT_FILL | TEXT_CENTER, " "); + text_xprintf(bm, row ? 6 : 4, 0, + TEXT_FILL, "%*c", + (step < 1000000L) ? + pos + 7 : pos + 6, '^'); + text_xprintf(bm, 5, 0, TEXT_FILL, + "Lon: %03ld.%06ld %c %s", + ABS(target_lon) / 1000000L, + ABS(target_lon) % 1000000L, + target_lon >= 0 ? 'E' : 'W', + row == 1 ? "<-" : ""); + repaint(bm); + } + key = keypad_peek(); + if (key & K_UP) + { + if (row == 0) + { + target = target_lat + step; + if (target <= MAX_LAT) + { + if (target_lat < 0 && target > 0) + target_lat = ABS(target_lat) + + step; + else + target_lat = target; + } + } + else + { + target = target_lon + step; + if (target <= MAX_LON) + { + if (target_lon < 0 && target > 0) + target_lon = ABS(target_lon) + + step; + else + target_lon = target; + } + } + } + else if (key & K_DOWN) + { + if (row == 0) + { + target = target_lat - step; + if (target >= MIN_LAT) + { + if (target_lat > 0 && target < 0) + target_lat = -ABS(target_lat) - + step; + else + target_lat = target; + } + } + else + { + target = target_lon - step; + if (target >= MIN_LON) + { + if (target_lon > 0 && target < 0) + target_lon = -ABS(target_lon) - + step; + else + target_lon = target; + } + } + } + else if (key & K_LEFT) + { + if (step < STEP) + { + step *= 10; + pos--; + } + } + else if (key & K_RIGHT) + { + if (step >= 10) + { + step /= 10; + pos++; + } + } + else if (key & K_OK) + { + if (row++ == 1) + break; + /* Move to longigude */ + } + cpu_relax(); + } + flash_save_target(); +} + +/* Compass management */ +static void draw_compass(Bitmap *bm) +{ + const int R = LCD_HEIGHT / 3, R_SMALL = 10; + long x, y, x1, y1, x2, y2, d; + int i; + + d = distance(lat / 1E6, lon / 1E6, target_lat / 1E6, target_lon / 1E6); + + x = (long)((float)R * (1 + sin(deg2rad((float)prev_b)))); + y = (long)((float)R * (1 - cos(deg2rad((float)prev_b)))); + + x1 = R - R_SMALL + (long)((float)R_SMALL * + (1 + sin(deg2rad((float)prev_b - 120.0)))); + y1 = R - R_SMALL + (long)((float)R_SMALL * + (1 - cos(deg2rad((float)prev_b - 120.0)))); + x2 = R - R_SMALL + (long)((float)R_SMALL * + (1 + sin(deg2rad((float)prev_b + 120.0)))); + y2 = R - R_SMALL + (long)((float)R_SMALL * + (1 - cos(deg2rad((float)prev_b + 120.0)))); + + gfx_bitmapClear(bm); + /* Print direction heading and degrees */ + text_xprintf(bm, 0, 5, 0, "%s", "N"); + text_xprintf(bm, 0, 0, TEXT_RIGHT, "%s", compass_heading(prev_b)); + text_xprintf(bm, 1, 0, TEXT_RIGHT, "%ld deg.", prev_b); + /* Print distance */ + text_xprintf(bm, 2, 0, TEXT_RIGHT, "%ld %s", + d >= 1000 ? d / 1000 : d, + d >= 1000 ? "Km" : "m"); + /* Print current and target position */ + text_xprintf(bm, 6, 0, TEXT_FILL, "%02ld.%06ld%c%03ld.%06ld%c", + ABS(lat) / 1000000L, + ABS(lat) % 1000000, + lat >= 0 ? 'N' : 'S', + ABS(lon) / 1000000L, + ABS(lon) % 1000000L, + lon >= 0 ? 'E' : 'W'); + text_xprintf(bm, 7, 0, TEXT_FILL, "%02ld.%06ld%c%03ld.%06ld%c", + ABS(target_lat) / 1000000L, + ABS(target_lat) % 1000000, + target_lat >= 0 ? 'N' : 'S', + ABS(target_lon) / 1000000L, + ABS(target_lon) % 1000000L, + target_lon >= 0 ? 'E' : 'W'); + /* Draw the circle */ + for (i = 0; i < 360; i++) + BM_PLOT(bm, + (long)((float)R * (1 + sin(deg2rad((float)i)))), + (long)((float)R * (1 - cos(deg2rad((float)i))))); + /* Draw the needle */ + gfx_rectFill(bm, R - 2, R - 2, R + 2, R + 2); + gfx_line(bm, R, R, x1, y1); + gfx_line(bm, R, R, x2, y2); + gfx_line(bm, x1, y1, x, y); + gfx_line(bm, x2, y2, x, y); + + repaint(bm); +} + +static void compass(Bitmap *bm) +{ + long b, inc; + + video_on(); + while (1) + { + if (!is_lcd_off) + { + b = bearing(lat / 1E6, lon / 1E6, + target_lat / 1E6, target_lon / 1E6); + inc = ABS(b - prev_b) < 360 - ABS(b - prev_b) ? 1 : -1; + /* Compass animation */ + if (b < prev_b) + inc = -inc; + while (prev_b != b) + { + prev_b = (prev_b + inc) % 360; + if (prev_b < 0) + prev_b = 359; + if (!(prev_b % 5)) + draw_compass(bm); + if (keypad_peek() & KEY_MASK) + return; + } + draw_compass(bm); + } + cpu_relax(); + if (keypad_peek() & KEY_MASK) + return; + } +} + +/* GPS receiver status */ +static const char *gps_fix[] = +{ + "invalid", + "GPS", + "DGPS", + "PPS", + "RTK", + "float-RTK", + "estimated", + "manual", + "simulation", +}; + +static void gps_data(Bitmap *bm) +{ + struct tm tm; + char buf[32]; + + video_on(); + gfx_bitmapClear(bm); + while (1) + { + if (!is_lcd_off) + { + if (!rmc.time) + { + text_xprintf(bm, 3, 0, + TEXT_CENTER | TEXT_FILL, "No GPS data"); + } + else + { + gmtime_r(&rmc.time, &tm); + + text_xprintf(bm, 0, 0, TEXT_FILL, + "Lat. %ld.%06ld%c", + ABS(lat) / 1000000L, + ABS(lat) % 1000000, + lat >= 0 ? 'N' : 'S'); + text_xprintf(bm, 1, 0, TEXT_FILL, + "Lon. %ld.%06ld%c", + ABS(lon) / 1000000L, + ABS(lon) % 1000000L, + lon >= 0 ? 'E' : 'W'); + text_xprintf(bm, 2, 0, TEXT_FILL, + "Alt. %d", gga.altitude); + text_xprintf(bm, 3, 0, TEXT_FILL, + "Speed: %d", vtg.km_speed); + if (gga.quality < countof(gps_fix)) + text_xprintf(bm, 4, 0, TEXT_FILL, + "Fix: %s", + gps_fix[gga.quality]); + else + text_xprintf(bm, 4, 0, TEXT_FILL, + "Fix: %d", gga.quality); + text_xprintf(bm, 5, 0, TEXT_FILL, + "Satellites: %d", + gga.satellites); + strftime(buf, sizeof(buf), + "Date: %Y-%m-%d %a", &tm); + text_xprintf(bm, 6, 0, TEXT_FILL, "%s", buf); + strftime(buf, sizeof(buf), + "Time: %H:%M:%S (UTC)", &tm); + text_xprintf(bm, 7, 0, TEXT_FILL, "%s", buf); + } + repaint(bm); + } + if (keypad_peek() & KEY_MASK) + break; + cpu_relax(); + } +} + +/* BeRTOS screen */ +static void about(Bitmap *bm) +{ + gfx_bitmapClear(bm); + video_on(); + text_xprintf(bm, 7, 0, + STYLEF_UNDERLINE | TEXT_CENTER | TEXT_FILL, + "http://www.bertos.org"); + repaint(bm); + if (!is_lcd_off) + { + const uint8_t *p = &logo[BITMAP_HEADER_SIZE]; + uint8_t h = logo[BITMAP_HEIGHT_OFFSET]; + uint8_t w = logo[BITMAP_WIDTH_OFFSET]; + uint8_t r; + + for (r = 0; r < h; r++) + { + rit128x96_blitRaw(p, + (128 - w) / 2, 70 - r, w, 1); + p += w / 2; + } + } + while (!(keypad_peek() & KEY_MASK)) + cpu_relax(); +} + +static struct MenuItem main_items[] = +{ + {(const_iptr_t)"Target", 0, (MenuHook)target, (iptr_t)&lcd_bitmap}, + {(const_iptr_t)"Compass", 0, (MenuHook)compass, (iptr_t)&lcd_bitmap}, + {(const_iptr_t)"GPS data", 0, (MenuHook)gps_data, (iptr_t)&lcd_bitmap}, + {(const_iptr_t)"About...", 0, (MenuHook)about, (iptr_t)&lcd_bitmap}, + {(const_iptr_t)0, 0, NULL, (iptr_t)NULL} +}; + +static struct Menu main_menu = +{ + main_items, "DevelGPS v0.1", MF_STICKY | MF_SAVESEL, &lcd_bitmap, 0, rit128x96_blitBitmap +}; + +static void init(void) +{ + IRQ_ENABLE; + + kdbg_init(); + timer_init(); + proc_init(); + + scrsvr_timestamp = ticks_to_ms(timer_clock_unlocked()); + LED_INIT(); + + flash_init(&flash); + flash_load_target(); + + ser_init(&ser_port, SER_UART1); + ser_setbaudrate(&ser_port, 38400); + + nmeap_init(&nmea, NULL); + nmeap_addParser(&nmea, "GPGGA", nmea_gpgga, nmea_callback, &gga); + nmeap_addParser(&nmea, "GPRMC", nmea_gprmc, nmea_callback, &rmc); + nmeap_addParser(&nmea, "GPVTG", nmea_gpvtg, nmea_callback, &vtg); + + rit128x96_init(); + gfx_bitmapInit(&lcd_bitmap, raster, LCD_WIDTH, LCD_HEIGHT); + gfx_setFont(&lcd_bitmap, &font_gohu); + repaint(&lcd_bitmap); + + kbd_init(); +} + +int main(void) +{ + init(); + + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + proc_new(ser_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + while (1) + { + iptr_t res = menu_handle(&main_menu); + if (res != MENU_TIMEOUT) + video_on(); + cpu_relax(); + } +} diff --git a/2.5/boards/ek-lm3s1968/examples/gps/project.bertos b/2.5/boards/ek-lm3s1968/examples/gps/project.bertos new file mode 100644 index 00000000..4e4b40a1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/examples/gps/project.bertos @@ -0,0 +1,94 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V50000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vgps +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/sandra/lite/src/gcc-4.2/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libgomp --disable-libstdcxx-pch --with-gnu-as --with-gnu-ld --enable-languages=c,c++ --disable-shared --with-newlib --with-pkgversion=Sourcery G++ Lite 2008q1-126 --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/sandra/lite/eabi/install/arm-none-eabi --enable-poison-system-directories --with-build-time-tools=/scratch/sandra/lite/eabi/install/arm-none-eabi/bin --with-build-time-tools=/scratch/sandra/lite/eabi/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.2.3 +p17 +sVbuild +p18 +VSourcery G++ Lite 2008q1-126 +p19 +sVpath +p20 +V/usr/local/arm-2008q1/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'ser' +p25 +aS'text' +p26 +aS'kbd' +p27 +aS'formatwr' +p28 +aS'text_format' +p29 +aS'sprintf' +p30 +aS'semaphores' +p31 +aS'kfile' +p32 +aS'lcd_rit128x96' +p33 +aS'heap' +p34 +aS'timer' +p35 +aS'debug' +p36 +aS'nmea' +p37 +aS'signal' +p38 +asS'CPU_NAME' +p39 +VLM3S1968 +p40 +sS'PROJECT_HW_PATH' +p41 +S'../..' +p42 +sS'PROJECT_SRC_PATH' +p43 +S'.' +p44 +sS'PRESET' +p45 +NsS'OUTPUT' +p46 +(lp47 +s. \ No newline at end of file diff --git a/2.5/boards/ek-lm3s1968/hw/hw_afsk.c b/2.5/boards/ek-lm3s1968/hw/hw_afsk.c new file mode 100644 index 00000000..8adb432d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_afsk.c @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_afsk.h b/2.5/boards/ek-lm3s1968/hw/hw_afsk.h new file mode 100644 index 00000000..ec9b8be2 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_afsk.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_buzzer.h b/2.5/boards/ek-lm3s1968/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_dataflash.c b/2.5/boards/ek-lm3s1968/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_dataflash.h b/2.5/boards/ek-lm3s1968/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_dc_motor.h b/2.5/boards/ek-lm3s1968/hw/hw_dc_motor.h new file mode 100644 index 00000000..8b8dd4b4 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_dc_motor.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +typedef enum MotorDCMap +{ + + /* Put here motor dc declaration */ + MOTOR_DC_CNT + +} MotorDCMap; + +/* + * Init all pin and device to manage dc motor. + */ +#define MOTOR_DC_INIT() \ + do { \ + /* Implement me! */ \ + } while (0) + + +/* + * Enable DC motor. + */ +#define DC_MOTOR_ENABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Disable DC motor. + */ +#define DC_MOTOR_DISABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Set direction for DC motor. + */ +#define DC_MOTOR_SET_DIR(dev, dir) \ + do { \ + /* Implement me! */ \ + } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_ft245rl.h b/2.5/boards/ek-lm3s1968/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_i2c_bitbang.h b/2.5/boards/ek-lm3s1968/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_kbd.h b/2.5/boards/ek-lm3s1968/hw/hw_kbd.h new file mode 100644 index 00000000..10562f79 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_kbd.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief LM3S1968 keypad: hardware-specific definitions + * + * \author Andrea Righi + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include /* BV() */ +#include /* GPIO_PORTG_BASE */ +#include /* lm3s_gpioPinConfig() / lm3s_gpioPinRead() */ +#include "hw/kbd_map.h" + +#define K_RPT_MASK (K_UP | K_DOWN | K_LEFT | K_RIGHT | K_OK) + +#define KBD_HW_INIT \ + do { \ + lm3s_gpioPinConfig(GPIO_PORTG_BASE, \ + K_RPT_MASK, \ + GPIO_DIR_MODE_IN, \ + GPIO_STRENGTH_2MA, \ + GPIO_PIN_TYPE_STD_WPU); \ + } while (0) + +/** + * Read the keyboard ports and return the mask of depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + return ~lm3s_gpioPinRead(GPIO_PORTG_BASE, + K_UP | K_DOWN | K_LEFT | K_RIGHT | K_OK); +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_lcd_32122a.h b/2.5/boards/ek-lm3s1968/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_lcd_hd44.h b/2.5/boards/ek-lm3s1968/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_led.h b/2.5/boards/ek-lm3s1968/hw/hw_led.h new file mode 100644 index 00000000..f203119a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_led.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include + +#include + +#define LED_ON() GPIO_PORTG_DATA_R |= BV(2) +#define LED_OFF() GPIO_PORTG_DATA_R &= ~BV(2) + +#define LED_INIT() \ + do { \ + SYSCTL_RCGC2_R = SYSCTL_RCGC2_GPIOG; \ + (void)SYSCTL_RCGC2_R; \ + GPIO_PORTG_DIR_R = BV(2); \ + GPIO_PORTG_DEN_R = BV(2); \ + } while(0) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_lm75.h b/2.5/boards/ek-lm3s1968/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_mcp41.c b/2.5/boards/ek-lm3s1968/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_mcp41.h b/2.5/boards/ek-lm3s1968/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_ntc.c b/2.5/boards/ek-lm3s1968/hw/hw_ntc.c new file mode 100644 index 00000000..3048725c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/ek-lm3s1968/hw/hw_ntc.h b/2.5/boards/ek-lm3s1968/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_phase.c b/2.5/boards/ek-lm3s1968/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_phase.h b/2.5/boards/ek-lm3s1968/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_rit128x96.h b/2.5/boards/ek-lm3s1968/hw/hw_rit128x96.h new file mode 100644 index 00000000..a7cfcd01 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_rit128x96.h @@ -0,0 +1,127 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN BV(2) + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN BV(3) +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() \ + lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN, 0) + +/* Enter data mode */ +#define LCD_SET_DATA() \ + lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN, GPIO_OLEDDC_PIN) + +/* Send data to the display */ +#define LCD_WRITE(x) \ + { \ + uint32_t _x; \ + while (!lm3s_ssiWriteFrameNonBlocking(SSI0_BASE, x)); \ + /* Dummy read to drain the FIFO */ \ + while (!lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &_x)); \ + } +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + uint32_t dummy; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= SYSCTL_RCGC1_SSI0; + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA; + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOH; + lm3s_busyWait(512); + + /* Configure the SSI0CLK and SSIOTX pins for SSI operation. */ + lm3s_gpioPinConfig(GPIO_PORTA_BASE, BV(2) | BV(3) | BV(5), + GPIO_DIR_MODE_HW, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU); + /* + * Configure the GPIO port pin used as a D/C# signal (data/command + * control) for OLED device, and the port pin used to enable power to + * the OLED panel. + */ + lm3s_gpioPinConfig(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN, + GPIO_DIR_MODE_OUT, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD); + lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN, + GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN); + + /* Configure the SSI0 port for master mode */ + lm3s_ssiOpen(SSI0_BASE, SSI_FRF_MOTO_MODE_2, + SSI_MODE_MASTER, CPU_FREQ / 2, 8); + /* + * Configure the GPIO port pin used as a D/Cn signal for OLED device, + * and the port pin used to enable power to the OLED panel. + */ + lm3s_gpioPinConfig(GPIO_PORTA_BASE, GPIO_OLEDEN_PIN, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU); + + /* Drain the SSI RX FIFO */ + while (lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &dummy)); +} + +/* + * XXX: menu stuff requires lcd_blitBimap() function to be defined. + * Find a better way to do this. + */ + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_sd.h b/2.5/boards/ek-lm3s1968/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_ser.h b/2.5/boards/ek-lm3s1968/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_sipo.h b/2.5/boards/ek-lm3s1968/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_spi.h b/2.5/boards/ek-lm3s1968/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_stepper.h b/2.5/boards/ek-lm3s1968/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_tas5706a.h b/2.5/boards/ek-lm3s1968/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_thermo.h b/2.5/boards/ek-lm3s1968/hw/hw_thermo.h new file mode 100644 index 00000000..bbfc9dde --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_thermo.h @@ -0,0 +1,182 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \version $Id$ + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "thermo_map.h" +#include "ntc_map.h" + +#include +#include + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* Put here convertion function to temperature size */ + break; + + /* Put here your thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + +/*! + * This function should return the timeout for reaching the + * target temperature. + */ +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* return ms_to_ticks(60000); */ + break; + + /* Put here a time out for select thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + + +/*! + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + return ntc_read(dev); +} + + +/*! + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + phase_setPower(TRIAC_TEST, 0); + break; + + /* Put here a thermo device to turn off */ + + default: + ASSERT(0); + } + +} + + +/*! + * Based on the current temperature \a cur_temp and the target temperature \a target, this function turns on and off specific + * triac channel and handles the freezer alarm. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + deg_t dist = target - cur_temp; + //kprintf("dev[%d], dist[%d]\n", dev, dist); + + switch(dev) + { + case THERMO_TEST: + if (dist > 0) + { + /* phase_setPower(TRIAC_TEST, dist * PID_TEST_K); */ + } + else + { + /* phase_setPower(TRIAC_TEST, 0); */ + } + break; + + /* Put here an other thermo device */ + + default: + ASSERT(0); + } +} + + +#define THERMO_HW_INIT _thermo_hw_init() + +/*! + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + ASSERT(phase_initialized); + ASSERT(ntc_initialized); + + phase_setPower(TRIAC_TEST, 0); + + /* Add here the other thermo device */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/hw_tlv5618.h b/2.5/boards/ek-lm3s1968/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/ek-lm3s1968/hw/hw_tmp123.h b/2.5/boards/ek-lm3s1968/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/ek-lm3s1968/hw/kbd_map.h b/2.5/boards/ek-lm3s1968/hw/kbd_map.h new file mode 100644 index 00000000..20b95ea0 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/kbd_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(3) +#define K_DOWN BV(4) +#define K_LEFT BV(5) +#define K_RIGHT BV(6) +#define K_OK BV(7) +#define K_CANCEL BV(8) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/mcp41_map.h b/2.5/boards/ek-lm3s1968/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/ntc_map.h b/2.5/boards/ek-lm3s1968/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/phase_map.h b/2.5/boards/ek-lm3s1968/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/pwm_map.h b/2.5/boards/ek-lm3s1968/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/ek-lm3s1968/hw/thermo_map.h b/2.5/boards/ek-lm3s1968/hw/thermo_map.h new file mode 100644 index 00000000..4376076a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/hw/thermo_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +typedef uint8_t thermostatus_t; + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT, +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/.spec b/2.5/boards/ek-lm3s1968/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/ek-lm3s1968/templates/empty/.spec b/2.5/boards/ek-lm3s1968/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_adc.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_afsk.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ax25.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_battfs.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_debug.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_fat.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_flash25.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_gfx.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_heap.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_i2c.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_i2s.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_kbd.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_keytag.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_kfile.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lm75.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_md2.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_monitor.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_nmea.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_parser.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_phase.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_proc.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..b2c3a965 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_pwm.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ramp.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_randpool.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_sem.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ser.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_signal.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_stepper.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_thermo.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_timer.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_wdt.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/empty/empty.mk b/2.5/boards/ek-lm3s1968/templates/empty/empty.mk new file mode 100644 index 00000000..a1f5fca4 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/empty.mk @@ -0,0 +1,100 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules +empty_DEBUG = 1 + +# Our target application +TRG += empty + +empty_PREFIX = "arm-none-eabi-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/ek-lm3s1968/templates/empty + +empty_HW_PATH = boards/ek-lm3s1968 + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/drv/kbd.c \ + bertos/struct/heap.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/mware/event.c \ + bertos/gfx/bitmap.c \ + bertos/kern/sem.c \ + bertos/drv/lcd_rit128x96.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/drv/timer.c \ + bertos/cpu/cortex-m3/drv/ssi_lm3s.c \ + bertos/mware/formatwr.c \ + bertos/gfx/line.c \ + bertos/cpu/cortex-m3/drv/ser_lm3s.c \ + bertos/fonts/luBS14.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(50000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +empty_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +empty_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_LM3S1968__ +empty_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_lm3s.c bertos/cpu/cortex-m3/drv/clock_lm3s.c +empty_PROGRAMMER_CPU = lm3s +empty_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_CPU = cortex-m3 +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-lm3s.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/ek-lm3s1968/templates/empty/empty_user.mk b/2.5/boards/ek-lm3s1968/templates/empty/empty_user.mk new file mode 100644 index 00000000..e068232f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/empty_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + bertos/cpu/cortex-m3/drv/ssi_lm3s.c \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/ek-lm3s1968/templates/empty/main.c b/2.5/boards/ek-lm3s1968/templates/empty/main.c new file mode 100644 index 00000000..224e9335 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/main.c @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include + +#include +#include +#include +#include +#include + +/* Bitmap to display on the OLED display */ +static Bitmap lcd_bitmap; +/* Raster associated to the Bitmap image */ +static uint8_t raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]; +/* Internal flash memory descriptor */ +static Flash flash; +/* UART port descriptor */ +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART1 */ + ser_init(&out, SER_UART1); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); + /* Initialize the OLED display (RIT128x96) */ + rit128x96_init(); + /* Draw an empty Bitmap on the screen */ + gfx_bitmapInit(&lcd_bitmap, raster, LCD_WIDTH, LCD_HEIGHT); + /* Refresh the display */ + rit128x96_blitBitmap(&lcd_bitmap); + /* Initialize the keypad driver */ + kbd_init(); + /* Initialize the internal flash memory */ + flash_init(&flash); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/ek-lm3s1968/templates/empty/project.bertos b/2.5/boards/ek-lm3s1968/templates/empty/project.bertos new file mode 100644 index 00000000..e3b90efb --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/empty/project.bertos @@ -0,0 +1,87 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V50000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'gfx' +p24 +aS'ser' +p25 +aS'kbd' +p26 +aS'formatwr' +p27 +aS'flash' +p28 +aS'kfile' +p29 +aS'lcd_rit128x96' +p30 +aS'heap' +p31 +aS'timer' +p32 +aS'debug' +p33 +aS'lm3s_ssi' +p34 +asS'CPU_NAME' +p35 +VLM3S1968 +p36 +sS'PROJECT_HW_PATH' +p37 +S'../..' +p38 +sS'PROJECT_SRC_PATH' +p39 +S'.' +p40 +sS'PRESET' +p41 +I01 +sS'OUTPUT' +p42 +(lp43 +s. \ No newline at end of file diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/.spec b/2.5/boards/ek-lm3s1968/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_adc.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_debug.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_fat.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_heap.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_md2.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_parser.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_phase.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_proc.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..7e64c498 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_sem.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ser.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_signal.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_timer.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/kernel.mk b/2.5/boards/ek-lm3s1968/templates/kernel/kernel.mk new file mode 100644 index 00000000..48ec5351 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/kernel.mk @@ -0,0 +1,101 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "arm-none-eabi-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/ek-lm3s1968/templates/kernel + +kernel_HW_PATH = boards/ek-lm3s1968 + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/drv/kbd.c \ + bertos/struct/heap.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/mware/event.c \ + bertos/gfx/bitmap.c \ + bertos/kern/sem.c \ + bertos/drv/lcd_rit128x96.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/drv/timer.c \ + bertos/cpu/cortex-m3/drv/ssi_lm3s.c \ + bertos/kern/monitor.c \ + bertos/gfx/line.c \ + bertos/cpu/cortex-m3/drv/ser_lm3s.c \ + bertos/fonts/luBS14.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(50000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +kernel_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +kernel_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_LM3S1968__ +kernel_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_lm3s.c bertos/cpu/cortex-m3/drv/clock_lm3s.c +kernel_PROGRAMMER_CPU = lm3s +kernel_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_CPU = cortex-m3 +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-lm3s.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/kernel_user.mk b/2.5/boards/ek-lm3s1968/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..0bf6c0bc --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/kernel_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + bertos/cpu/cortex-m3/drv/ssi_lm3s.c \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/main.c b/2.5/boards/ek-lm3s1968/templates/kernel/main.c new file mode 100644 index 00000000..34ad1c65 --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/main.c @@ -0,0 +1,131 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include + +/* Bitmap to display on the OLED display */ +static Bitmap lcd_bitmap; +/* Raster associated to the Bitmap image */ +static uint8_t raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]; +/* Internal flash memory descriptor */ +static Flash flash; +/* UART port descriptor */ +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART1 */ + ser_init(&out, SER_UART1); + /* Configure UART1 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); + /* Initialize the OLED display (RIT128x96) */ + rit128x96_init(); + /* Draw an empty Bitmap on the screen */ + gfx_bitmapInit(&lcd_bitmap, raster, LCD_WIDTH, LCD_HEIGHT); + /* Refresh the display */ + rit128x96_blitBitmap(&lcd_bitmap); + /* Initialize the keypad driver */ + kbd_init(); + /* Initialize the internal flash memory */ + flash_init(&flash); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + LED_ON(); + else + LED_OFF(); + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/ek-lm3s1968/templates/kernel/project.bertos b/2.5/boards/ek-lm3s1968/templates/kernel/project.bertos new file mode 100644 index 00000000..b4e22a3f --- /dev/null +++ b/2.5/boards/ek-lm3s1968/templates/kernel/project.bertos @@ -0,0 +1,95 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V50000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'gfx' +p24 +aS'ser' +p25 +aS'kernel' +p26 +aS'kbd' +p27 +aS'monitor' +p28 +aS'formatwr' +p29 +aS'flash' +p30 +aS'semaphores' +p31 +aS'kfile' +p32 +aS'lcd_rit128x96' +p33 +aS'heap' +p34 +aS'signal' +p35 +aS'timer' +p36 +aS'debug' +p37 +aS'lm3s_ssi' +p38 +asS'CPU_NAME' +p39 +VLM3S1968 +p40 +sS'PROJECT_HW_PATH' +p41 +S'../..' +p42 +sS'PROJECT_SRC_PATH' +p43 +S'.' +p44 +sS'PRESET' +p45 +I01 +sS'OUTPUT' +p46 +(lp47 +s. \ No newline at end of file diff --git a/2.5/boards/lpc-p2378/.image.png b/2.5/boards/lpc-p2378/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..4a931f59647842c80fe4344a7a0c7a17577e6b69 GIT binary patch literal 51899 zcmV)RK(oJzP)c7BI0_J-j%OcubzKxUUzeP>~gqTaY=EP z#L7eadjUZhBS8AG*dKzRKl&v=&_4k*GhFtNOD;tYh8)feyT|u*Py6TJD{s@=n|Xa0 z{m81Utjw(H-oWdud*g;Van2X#oH!BpHrm|W1OOofLI`Fhgpd$o{B~xs(bHl1QI%2k z@rzM;Aq2*Fcrjg`b3RSLL<_^~@#>?thZ!^J93Ss=*B6a?I)`(92}35R8g+URw}<%? z?E37)Pf$3s*~`;}fG(^e#E`oJ0MOa(h!PGjgIEQIwN7MPE@)N?CC^><` zi9t@ZFswT<>}e2R-s3dEGlw>6XC$y`BFBL;kw1|+A+U=`8qTqC@J&p@@nKFhH7=&< z#wQ9-4|bdt;xwIA98OSi`fv0Xjh=%*02l!}!5AJ%Yn-NWZqB52rVhJg(#&MgMYj`$ zrwN46fzI$^*x(RSrzHglf#94OnxJFic49D>hzDSD5{w>ATY<6L8N(hQ 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+ +

+ + + + + + + + + + + + + + + + + + + +
CPUNXP LPC2378
Clock72MHz
Memory512kB Flash, 48kB SRAM
Peripheralstimers, ADC, UART, SPI, I²C, I²S, CAN, PWM, USB, DMA, SSP, ethernet, SD card connector
+

+

+LPC-P2378® is based on NXP LPC2378 ARM7-TDMI CPU. Visit the LPC-P2378 page for more information. +

+ +''' + diff --git a/2.5/boards/lpc-p2378/benchmark/.spec b/2.5/boards/lpc-p2378/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/.spec b/2.5/boards/lpc-p2378/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_menu.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/context_switch.mk b/2.5/boards/lpc-p2378/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..1d974e95 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/context_switch.mk @@ -0,0 +1,95 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "arm-none-eabi-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/ek-lpc-p2378/benchmark/context_switch + +context_switch_HW_PATH = boards/ek-lpc-p2378 + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/benchmark/context_switch.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/cpu/arm/drv/timer_lpc2.c \ + bertos/mware/formatwr.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/cpu/arm/drv/ser_lpc2.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_lpc2.S +context_switch_CPU_CPPAFLAGS = -g -gdwarf-2 +context_switch_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_LPC2378__ +context_switch_CPU_CSRC = bertos/cpu/arm/hw/init_lpc2.c bertos/cpu/arm/drv/vic_lpc2.c +context_switch_PROGRAMMER_CPU = lpc2378 +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_CPU = arm7tdmi +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +context_switch_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/lpc2378.ld +context_switch_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/context_switch_user.mk b/2.5/boards/lpc-p2378/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..4bc28c58 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -O2 \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/main.c b/2.5/boards/lpc-p2378/benchmark/context_switch/main.c new file mode 100644 index 00000000..ef29fb02 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/main.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/lpc-p2378/benchmark/context_switch/project.bertos b/2.5/boards/lpc-p2378/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..ca5301e5 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/context_switch/project.bertos @@ -0,0 +1,81 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'context_switch' +p28 +aS'heap' +p29 +aS'signal' +p30 +aS'timer' +p31 +asS'CPU_NAME' +p32 +VLPC2378 +p33 +sS'PROJECT_HW_PATH' +p34 +S'../..' +p35 +sS'PROJECT_SRC_PATH' +p36 +S'.' +p37 +sS'PRESET' +p38 +I01 +sS'OUTPUT' +p39 +(lp40 +s. \ No newline at end of file diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/.spec b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_menu.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..ee65537a --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,92 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "arm-none-eabi-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/ek-lpc-p2378/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/ek-lpc-p2378 + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/kern/signal.c \ + bertos/cpu/arm/drv/timer_lpc2.c \ + bertos/kern/sem.c \ + bertos/drv/timer.c \ + bertos/mware/formatwr.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/kern/kfile.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/benchmark/kernel_footprint.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_lpc2.S +kernel_footprint_CPU_CPPAFLAGS = -g -gdwarf-2 +kernel_footprint_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_LPC2378__ +kernel_footprint_CPU_CSRC = bertos/cpu/arm/hw/init_lpc2.c bertos/cpu/arm/drv/vic_lpc2.c +kernel_footprint_PROGRAMMER_CPU = lpc2378 +kernel_footprint_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/lpc2378.ld +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_CPU = arm7tdmi +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..ef355827 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -Os \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/main.c b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..a3f11e50 --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/main.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/lpc-p2378/benchmark/kernel_footprint/project.bertos b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..3959bcaa --- /dev/null +++ b/2.5/boards/lpc-p2378/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2009q3-respin-eabi-lite/src/gcc-4.4/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2009q3-68' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2009q3-respin-eabi-lite/obj/host-libs-2009q3-68-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2009q3-respin-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2009q3-68 +p19 +sVpath +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'formatwr' +p25 +aS'msg' +p26 +aS'semaphores' +p27 +aS'kfile' +p28 +aS'kernel_footprint' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VLPC2378 +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +s. \ No newline at end of file diff --git a/2.5/boards/lpc-p2378/hw/hw_afsk.c b/2.5/boards/lpc-p2378/hw/hw_afsk.c new file mode 100644 index 00000000..8adb432d --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_afsk.c @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + diff --git a/2.5/boards/lpc-p2378/hw/hw_afsk.h b/2.5/boards/lpc-p2378/hw/hw_afsk.h new file mode 100644 index 00000000..a0a348d9 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_afsk.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \version $Id: hw_afsk.h 3072 2009-10-10 13:01:56Z batt $ + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_buzzer.h b/2.5/boards/lpc-p2378/hw/hw_buzzer.h new file mode 100644 index 00000000..01683c85 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id: hw_buzzer.h 2506 2009-04-15 08:29:07Z duplo $ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_dataflash.c b/2.5/boards/lpc-p2378/hw/hw_dataflash.c new file mode 100644 index 00000000..b3944b37 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id: hw_dataflash.c 1398 2008-05-27 16:36:05Z asterix $ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/lpc-p2378/hw/hw_dataflash.h b/2.5/boards/lpc-p2378/hw/hw_dataflash.h new file mode 100644 index 00000000..8c2f0b89 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id: hw_dataflash.h 1312 2008-05-20 16:54:52Z asterix $ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_dc_motor.h b/2.5/boards/lpc-p2378/hw/hw_dc_motor.h new file mode 100644 index 00000000..913ead7d --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_dc_motor.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \version $Id: hw_dc_motor.h 2859 2009-09-02 09:30:18Z asterix $ + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +typedef enum MotorDCMap +{ + + /* Put here motor dc declaration */ + MOTOR_DC_CNT + +} MotorDCMap; + +/* + * Init all pin and device to manage dc motor. + */ +#define MOTOR_DC_INIT() \ + do { \ + /* Implement me! */ \ + } while (0) + + +/* + * Enable DC motor. + */ +#define DC_MOTOR_ENABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Disable DC motor. + */ +#define DC_MOTOR_DISABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Set direction for DC motor. + */ +#define DC_MOTOR_SET_DIR(dev, dir) \ + do { \ + /* Implement me! */ \ + } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_ft245rl.h b/2.5/boards/lpc-p2378/hw/hw_ft245rl.h new file mode 100644 index 00000000..34b157f6 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id: hw_ft245rl.h 1777 2008-09-04 15:19:48Z batt $ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/lpc-p2378/hw/hw_i2c_bitbang.h b/2.5/boards/lpc-p2378/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..743e28b7 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id: hw_i2c_bitbang.h 2506 2009-04-15 08:29:07Z duplo $ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_kbd.h b/2.5/boards/lpc-p2378/hw/hw_kbd.h new file mode 100644 index 00000000..2c59dd58 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id: hw_kbd.h 2649 2009-04-23 12:51:28Z duplo $ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_lcd_32122a.h b/2.5/boards/lpc-p2378/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/lpc-p2378/hw/hw_lcd_hd44.h b/2.5/boards/lpc-p2378/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_led.h b/2.5/boards/lpc-p2378/hw/hw_led.h new file mode 100644 index 00000000..e8c055b3 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_led.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief LED on/off macros for LPC-P2378. + * + * \author Andrea Righi + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include + +#define STATUS_LED (1 << 19) + +#define LED_ON() do { IOCLR1 = STATUS_LED; } while (0) +#define LED_OFF() do { IOSET1 = STATUS_LED; } while (0) + +#define LED_INIT() do { IODIR1 |= STATUS_LED; } while (0) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_lm75.h b/2.5/boards/lpc-p2378/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/lpc-p2378/hw/hw_mcp41.c b/2.5/boards/lpc-p2378/hw/hw_mcp41.c new file mode 100644 index 00000000..2a8415df --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id: hw_mcp41.c 2506 2009-04-15 08:29:07Z duplo $ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/lpc-p2378/hw/hw_mcp41.h b/2.5/boards/lpc-p2378/hw/hw_mcp41.h new file mode 100644 index 00000000..b1b5cd03 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id: hw_mcp41.h 2544 2009-04-17 14:21:09Z batt $ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_ntc.c b/2.5/boards/lpc-p2378/hw/hw_ntc.c new file mode 100644 index 00000000..b8c56914 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id: hw_ntc.h 1359 2008-05-26 09:42:37Z asterix $ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/lpc-p2378/hw/hw_ntc.h b/2.5/boards/lpc-p2378/hw/hw_ntc.h new file mode 100644 index 00000000..d3976b02 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id: hw_ntc.h 1359 2008-05-26 09:42:37Z asterix $ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_phase.c b/2.5/boards/lpc-p2378/hw/hw_phase.c new file mode 100644 index 00000000..f58fe9a2 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id: hw_phase.c 1398 2008-05-27 16:36:05Z asterix $ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_phase.h b/2.5/boards/lpc-p2378/hw/hw_phase.h new file mode 100644 index 00000000..bb7d3c69 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id: hw_phase.h 2564 2009-04-20 09:51:04Z batt $ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_rit128x96.h b/2.5/boards/lpc-p2378/hw/hw_rit128x96.h new file mode 100644 index 00000000..ae930b97 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_rit128x96.h @@ -0,0 +1,128 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN BV(2) + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN BV(3) +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() \ + lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN, 0) + +/* Enter data mode */ +#define LCD_SET_DATA() \ + lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN, GPIO_OLEDDC_PIN) + +/* Send data to the display */ +#define LCD_WRITE(x) \ + { \ + uint32_t _x; \ + while (!lm3s_ssiWriteFrameNonBlocking(SSI0_BASE, x)); \ + /* Dummy read to drain the FIFO */ \ + while (!lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &_x)); \ + } +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + uint32_t dummy; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= SYSCTL_RCGC1_SSI0; + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA; + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOH; + lm3s_busyWait(512); + + /* Configure the SSI0CLK and SSIOTX pins for SSI operation. */ + lm3s_gpioPinConfig(GPIO_PORTA_BASE, BV(2) | BV(3) | BV(5), + GPIO_DIR_MODE_HW, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU); + /* + * Configure the GPIO port pin used as a D/C# signal (data/command + * control) for OLED device, and the port pin used to enable power to + * the OLED panel. + */ + lm3s_gpioPinConfig(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN, + GPIO_DIR_MODE_OUT, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD); + lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN, + GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN); + + /* Configure the SSI0 port for master mode */ + lm3s_ssiOpen(SSI0_BASE, SSI_FRF_MOTO_MODE_2, + SSI_MODE_MASTER, CPU_FREQ / 2, 8); + /* + * Configure the GPIO port pin used as a D/Cn signal for OLED device, + * and the port pin used to enable power to the OLED panel. + */ + lm3s_gpioPinConfig(GPIO_PORTA_BASE, GPIO_OLEDEN_PIN, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU); + + /* Drain the SSI RX FIFO */ + while (lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &dummy)); +} + +/* + * XXX: menu stuff requires lcd_blitBimap() function to be defined. + * Find a better way to do this. + */ +#define rit128x96_blitBitmap lcd_blitBitmap + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_sd.h b/2.5/boards/lpc-p2378/hw/hw_sd.h new file mode 100644 index 00000000..79759ae9 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id: hw_sd.h 2834 2009-08-31 18:11:02Z batt $ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_ser.h b/2.5/boards/lpc-p2378/hw/hw_ser.h new file mode 100644 index 00000000..634c44bc --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id: hw_ser.h 2883 2009-09-04 19:46:02Z batt $ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_sipo.h b/2.5/boards/lpc-p2378/hw/hw_sipo.h new file mode 100644 index 00000000..b4fba473 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id: hw_sipo.h 2882 2009-09-04 19:17:37Z batt $ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_spi.h b/2.5/boards/lpc-p2378/hw/hw_spi.h new file mode 100644 index 00000000..b9436620 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id: hw_spi.h 1357 2008-05-26 09:30:19Z asterix $ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/lpc-p2378/hw/hw_stepper.h b/2.5/boards/lpc-p2378/hw/hw_stepper.h new file mode 100644 index 00000000..563a9aa1 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id: hw_stepper.h 2488 2009-04-10 17:52:12Z batt $ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/lpc-p2378/hw/hw_tas5706a.h b/2.5/boards/lpc-p2378/hw/hw_tas5706a.h new file mode 100644 index 00000000..f8cbf353 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id: hw_tas5706a.h 2849 2009-09-01 15:46:14Z lottaviano $ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_thermo.h b/2.5/boards/lpc-p2378/hw/hw_thermo.h new file mode 100644 index 00000000..de5edcc7 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_thermo.h @@ -0,0 +1,182 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \version $Id: hw_thermo.h 1440 2008-06-10 17:59:13Z asterix $ + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "thermo_map.h" +#include "ntc_map.h" + +#include +#include + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* Put here convertion function to temperature size */ + break; + + /* Put here your thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + +/*! + * This function should return the timeout for reaching the + * target temperature. + */ +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* return ms_to_ticks(60000); */ + break; + + /* Put here a time out for select thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + + +/*! + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + return ntc_read(dev); +} + + +/*! + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + phase_setPower(TRIAC_TEST, 0); + break; + + /* Put here a thermo device to turn off */ + + default: + ASSERT(0); + } + +} + + +/*! + * Based on the current temperature \a cur_temp and the target temperature \a target, this function turns on and off specific + * triac channel and handles the freezer alarm. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + deg_t dist = target - cur_temp; + //kprintf("dev[%d], dist[%d]\n", dev, dist); + + switch(dev) + { + case THERMO_TEST: + if (dist > 0) + { + /* phase_setPower(TRIAC_TEST, dist * PID_TEST_K); */ + } + else + { + /* phase_setPower(TRIAC_TEST, 0); */ + } + break; + + /* Put here an other thermo device */ + + default: + ASSERT(0); + } +} + + +#define THERMO_HW_INIT _thermo_hw_init() + +/*! + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + ASSERT(phase_initialized); + ASSERT(ntc_initialized); + + phase_setPower(TRIAC_TEST, 0); + + /* Add here the other thermo device */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/lpc-p2378/hw/hw_tlv5618.h b/2.5/boards/lpc-p2378/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/lpc-p2378/hw/hw_tmp123.h b/2.5/boards/lpc-p2378/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/lpc-p2378/hw/kbd_map.h b/2.5/boards/lpc-p2378/hw/kbd_map.h new file mode 100644 index 00000000..07515c0a --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id: kbd_map.h 2848 2009-09-01 15:23:57Z lottaviano $ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/lpc-p2378/hw/mcp41_map.h b/2.5/boards/lpc-p2378/hw/mcp41_map.h new file mode 100644 index 00000000..544f5673 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id: mcp41_map.h 2506 2009-04-15 08:29:07Z duplo $ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/lpc-p2378/hw/ntc_map.h b/2.5/boards/lpc-p2378/hw/ntc_map.h new file mode 100644 index 00000000..00997ce6 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id: ntc_map.h 1312 2008-05-20 16:54:52Z asterix $ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/lpc-p2378/hw/phase_map.h b/2.5/boards/lpc-p2378/hw/phase_map.h new file mode 100644 index 00000000..2f338cdb --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id: phase_map.h 1357 2008-05-26 09:30:19Z asterix $ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/lpc-p2378/hw/pwm_map.h b/2.5/boards/lpc-p2378/hw/pwm_map.h new file mode 100644 index 00000000..8f9f8b65 --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id: pwm_map.h 1357 2008-05-26 09:30:19Z asterix $ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/lpc-p2378/hw/thermo_map.h b/2.5/boards/lpc-p2378/hw/thermo_map.h new file mode 100644 index 00000000..5973612b --- /dev/null +++ b/2.5/boards/lpc-p2378/hw/thermo_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \version $Id: thermo_map.h 1312 2008-05-20 16:54:52Z asterix $ + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +typedef uint8_t thermostatus_t; + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT, +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/lpc-p2378/templates/.spec b/2.5/boards/lpc-p2378/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/lpc-p2378/templates/empty/.spec b/2.5/boards/lpc-p2378/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_adc.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_afsk.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ax25.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_battfs.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_debug.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_fat.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_flash25.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_gfx.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_heap.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_i2c.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_i2s.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_kbd.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_keytag.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_kfile.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lm75.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_md2.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_monitor.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_nmea.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_parser.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_phase.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_proc.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..b2c3a965 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_pwm.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ramp.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_randpool.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_sem.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ser.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_signal.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_stepper.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_thermo.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_timer.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_wdt.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/lpc-p2378/templates/empty/empty.mk b/2.5/boards/lpc-p2378/templates/empty/empty.mk new file mode 100644 index 00000000..8ba73a20 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/empty.mk @@ -0,0 +1,95 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules +empty_DEBUG = 1 + +# Our target application +TRG += empty + +empty_PREFIX = "arm-none-eabi-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/lpc-p2378/templates/empty + +empty_HW_PATH = boards/lpc-p2378 + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/cpu/arm/drv/timer_lpc2.c \ + bertos/kern/sem.c \ + bertos/mware/formatwr.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/cpu/arm/drv/ser_lpc2.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_lpc2.S +empty_CPU_CPPAFLAGS = -g -gdwarf-2 +empty_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_LPC2378__ +empty_CPU_CSRC = bertos/cpu/arm/hw/init_lpc2.c bertos/cpu/arm/drv/vic_lpc2.c +empty_PROGRAMMER_CPU = lpc2378 +empty_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/lpc2378.ld +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_CPU = arm7tdmi +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/lpc-p2378/templates/empty/empty_user.mk b/2.5/boards/lpc-p2378/templates/empty/empty_user.mk new file mode 100644 index 00000000..4c8ed7ef --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/empty_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/lpc-p2378/templates/empty/main.c b/2.5/boards/lpc-p2378/templates/empty/main.c new file mode 100644 index 00000000..9ed920e7 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/main.c @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART1 */ + ser_init(&out, SER_UART1); + /* Configure UART1 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/lpc-p2378/templates/empty/project.bertos b/2.5/boards/lpc-p2378/templates/empty/project.bertos new file mode 100644 index 00000000..beb71ade --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/empty/project.bertos @@ -0,0 +1,77 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'formatwr' +p25 +aS'debug' +p26 +aS'kfile' +p27 +aS'heap' +p28 +aS'timer' +p29 +asS'CPU_NAME' +p30 +VLPC2378 +p31 +sS'PROJECT_HW_PATH' +p32 +S'../..' +p33 +sS'PROJECT_SRC_PATH' +p34 +S'.' +p35 +sS'PRESET' +p36 +I01 +sS'OUTPUT' +p37 +(lp38 +s. \ No newline at end of file diff --git a/2.5/boards/lpc-p2378/templates/kernel/.spec b/2.5/boards/lpc-p2378/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_adc.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_debug.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_fat.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_heap.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_md2.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_parser.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_phase.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_proc.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..7e64c498 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_sem.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ser.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_signal.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_timer.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/lpc-p2378/templates/kernel/kernel.mk b/2.5/boards/lpc-p2378/templates/kernel/kernel.mk new file mode 100644 index 00000000..0d12f9b1 --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/kernel.mk @@ -0,0 +1,96 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "arm-none-eabi-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/lpc-p2378/templates/kernel + +kernel_HW_PATH = boards/lpc-p2378 + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/cpu/arm/drv/timer_lpc2.c \ + bertos/kern/sem.c \ + bertos/kern/monitor.c \ + bertos/mware/formatwr.c \ + bertos/struct/heap.c \ + bertos/cpu/arm/drv/ser_arm.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/cpu/arm/drv/ser_lpc2.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPU_CPPASRC = bertos/cpu/arm/hw/crt_arm7tdmi.S bertos/cpu/arm/hw/vectors_lpc2.S +kernel_CPU_CPPAFLAGS = -g -gdwarf-2 +kernel_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_LPC2378__ +kernel_CPU_CSRC = bertos/cpu/arm/hw/init_lpc2.c bertos/cpu/arm/drv/vic_lpc2.c +kernel_PROGRAMMER_CPU = lpc2378 +kernel_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/lpc2378.ld +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_CPU = arm7tdmi +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/lpc-p2378/templates/kernel/kernel_user.mk b/2.5/boards/lpc-p2378/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..6dfb4d8c --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/kernel_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/lpc-p2378/templates/kernel/main.c b/2.5/boards/lpc-p2378/templates/kernel/main.c new file mode 100644 index 00000000..ad5c7ada --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/main.c @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART1 */ + ser_init(&out, SER_UART1); + /* Configure UART1 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + LED_ON(); + else + LED_OFF(); + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/lpc-p2378/templates/kernel/project.bertos b/2.5/boards/lpc-p2378/templates/kernel/project.bertos new file mode 100644 index 00000000..ba48643b --- /dev/null +++ b/2.5/boards/lpc-p2378/templates/kernel/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'semaphores' +p26 +aS'monitor' +p27 +aS'formatwr' +p28 +aS'debug' +p29 +aS'kfile' +p30 +aS'heap' +p31 +aS'signal' +p32 +aS'timer' +p33 +asS'CPU_NAME' +p34 +VLPC2378 +p35 +sS'PROJECT_HW_PATH' +p36 +S'../..' +p37 +sS'PROJECT_SRC_PATH' +p38 +S'.' +p39 +sS'PRESET' +p40 +I01 +sS'OUTPUT' +p41 +(lp42 +s. \ No newline at end of file diff --git a/2.5/boards/stm32-p103/.image.png b/2.5/boards/stm32-p103/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..c642ada5b5b5efa09d34adec351cd1db58d5a7ed GIT binary patch literal 55020 zcmV)kK%l>gP)tMEEU=nNdWs-X!na^V?_cWgII|q9N|I13E+SL#!t_*@AAItdGD^jnYkaH zsryXTj4~#wZ{+4wrV5;pg*+ zFX*cMs!h`)>;3Aa8R+oh;m)IUPJ8GTW2`-y_OH4B6duXF-Wa)tq`o%oJ zvXLCTprP}pb2851oHGOl2+)U|0P2>34o6CwF$B;-)qoV8k{j;rg7scddWsDWhyb+z z`(QQ>^X-C}bf5qXMv-^s(5C4?(6L^C-XQ0x4FiM#^S!|kp!P_^^Bb1IfLe@{&3XFW zdrK)Dm|~B>X+DPqc~*mfu`{i65?`RW=gG;*rh!4*+&a(F^!G`7-3-jcNqMnpcYNIl0WP=PJCIAPr&Kau>E!-pNq3YrVj|A3-&nv$tW*8zwvN!8ybQ z(;lA50B8G`Lm4CIb#n0#j8TWFV~kM%h7bc_0PF(Z4jbkH;@%oD#^*@^0003)eX{R+ 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+ + + + + + + + + + + + + + + + + + +
CPUST Microelectronics STM32F103RB
Clock72MHz
Memory128kB Flash, 20kB SRAM
Peripheralstimers, ADC, UART, SPI, I²C, CAN, PWM, USB, DMA, SD card connector
+

+

+STM32-P103® is based on ST Microelectronics STM32F103RB Cortex-M3 CPU. Visit the STM32-P103 page for more information. +

+ +''' + + diff --git a/2.5/boards/stm32-p103/benchmark/.spec b/2.5/boards/stm32-p103/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/.spec b/2.5/boards/stm32-p103/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..2607d50c --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 0 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_menu.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/context_switch.mk b/2.5/boards/stm32-p103/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..02d93cc4 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/context_switch.mk @@ -0,0 +1,92 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "arm-none-eabi-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/stm32-p103/benchmark/context_switch + +context_switch_HW_PATH = boards/stm32-p103 + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/benchmark/context_switch.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/kern/kfile.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/cpu/arm/drv/timer_arm.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +context_switch_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +context_switch_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_STM32P103__ +context_switch_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_stm32.c bertos/cpu/cortex-m3/drv/clock_stm32.c +context_switch_PROGRAMMER_CPU = stm32 +context_switch_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/stm32p103_rom.ld +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_CPU = cortex-m3 +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +context_switch_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-stm32.sh + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/context_switch_user.mk b/2.5/boards/stm32-p103/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..4bc28c58 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -O2 \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/main.c b/2.5/boards/stm32-p103/benchmark/context_switch/main.c new file mode 100644 index 00000000..f190567f --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/main.c @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} diff --git a/2.5/boards/stm32-p103/benchmark/context_switch/project.bertos b/2.5/boards/stm32-p103/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..16feb574 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/context_switch/project.bertos @@ -0,0 +1,79 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sVpath +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'formatwr' +p25 +aS'kfile' +p26 +aS'context_switch' +p27 +aS'heap' +p28 +aS'signal' +p29 +aS'timer' +p30 +asS'CPU_NAME' +p31 +VSTM32F103RB +p32 +sS'PROJECT_HW_PATH' +p33 +S'../..' +p34 +sS'PROJECT_SRC_PATH' +p35 +S'.' +p36 +sS'PRESET' +p37 +I01 +sS'OUTPUT' +p38 +(lp39 +s. diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/.spec b/2.5/boards/stm32-p103/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_menu.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/stm32-p103/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..ec8fc92d --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,93 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "arm-none-eabi-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/stm32-p103/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/stm32-p103 + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/mware/event.c \ + bertos/kern/sem.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/drv/timer.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/benchmark/kernel_footprint.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +kernel_footprint_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +kernel_footprint_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_STM32P103__ +kernel_footprint_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_stm32.c bertos/cpu/cortex-m3/drv/clock_stm32.c +kernel_footprint_PROGRAMMER_CPU = stm32 +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_CPU = cortex-m3 +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_footprint_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/stm32p103_rom.ld +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-stm32.sh + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/stm32-p103/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..af8c4d6c --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/main.c b/2.5/boards/stm32-p103/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..78920ff5 --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/main.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} diff --git a/2.5/boards/stm32-p103/benchmark/kernel_footprint/project.bertos b/2.5/boards/stm32-p103/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..d7ba866a --- /dev/null +++ b/2.5/boards/stm32-p103/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Varm-none-eabi +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sVversion +p16 +V4.4.1 +p17 +sVbuild +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sVpath +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'semaphores' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'msg' +p28 +aS'kernel_footprint' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VSTM32F103RB +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +s. diff --git a/2.5/boards/stm32-p103/hw/hw_afsk.c b/2.5/boards/stm32-p103/hw/hw_afsk.c new file mode 100644 index 00000000..8adb432d --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_afsk.c @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + diff --git a/2.5/boards/stm32-p103/hw/hw_afsk.h b/2.5/boards/stm32-p103/hw/hw_afsk.h new file mode 100644 index 00000000..eae0ef73 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_afsk.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_blanker.h b/2.5/boards/stm32-p103/hw/hw_blanker.h new file mode 100644 index 00000000..442ce3f1 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_blanker.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_BALNCKER_H +#define HW_BALNCKER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BLK_LCDON /* power_LcdOn() Implement me! */ +#define BLK_LCDOFF /* power_LcdOff() Implement me! */ + + +#endif /* HW_BLANCKER_H */ + diff --git a/2.5/boards/stm32-p103/hw/hw_boot.h b/2.5/boards/stm32-p103/hw/hw_boot.h new file mode 100644 index 00000000..34238102 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_boot.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Bootloader hardware specific definition. + * + * \author Daniele Basile + */ + +#ifndef HW_BOOT_H +#define HW_BOOT_H + +/** + * Define bootloader flash size. + * + * Note: Remember that this size should be comply + * to size defined in linker script, otherwise you + * could not find the main program application. + */ +#define FLASH_BOOT_SIZE 0x8000 // 32kbyte + +#endif /* HW_BOOT_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_buzzer.h b/2.5/boards/stm32-p103/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_buzzerled.h b/2.5/boards/stm32-p103/hw/hw_buzzerled.h new file mode 100644 index 00000000..afa01544 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_buzzerled.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Buzzerled hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_BUZZERLED_H +#define HW_BUZZERLED_H + +#warning TODO:This is an example implementation, you must implement it! + + +#endif /* HW_BUZZERLED_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_cpufreq.h b/2.5/boards/stm32-p103/hw/hw_cpufreq.h new file mode 100644 index 00000000..41e3359d --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_cpufreq.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_CPUFREQ_H +#define HW_CPUFREQ_H + +#ifndef CPU_FREQ + #warning CPU_FREQ is not defined, you should upgrade to the newer clock frequency defining method. + + /* + * This file is DEPRECATED, it will be removed in the next major release. + * We have set up a new cpu frequency definition method. + * The new macro CPU_FREQ should be defined as a compiler flag in the + * makefile instead of the old CLOCK_FREQ macro. With new projects you should only + * use the CPU_FREQ macro. + * + * With gcc you should add something like this: + * + * -D'CPU_FREQ=(12288000UL)' + * + * For backward compatibility the old method is still supported. + */ + #include "hw/hw_cpu.h" + + #define CPU_FREQ (CLOCK_FREQ) +#endif /* CPU_FREQ */ + +#endif /* HW_CPUFREQ_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_dataflash.c b/2.5/boards/stm32-p103/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/stm32-p103/hw/hw_dataflash.h b/2.5/boards/stm32-p103/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_dc_motor.h b/2.5/boards/stm32-p103/hw/hw_dc_motor.h new file mode 100644 index 00000000..f39388df --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_dc_motor.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Define fuctions which read adc value from specific device + */ + #define HW_DC_MOTOR_READ_VALUE(dev, min, max) \ + ({ \ + /* Put here the fuction that read from ADC */ \ + (void)(dev); \ + (void)(min); \ + (void)(max); \ + (0); \ + }) + +// Macro that enable the select DC motor +#define DC_MOTOR_ENABLE(dev) /* Implement me! */ +// Macro that disable the select DC motor +#define DC_MOTOR_DISABLE(dev) /* Implement me! */ + +// Macro that left the DC motor rotor float +#define DC_MOTOR_STOP_FLOAT(dev) DC_MOTOR_DISABLE(dev) +// Macro that put in short circuit DC motor supply pins +#define DC_MOTOR_STOP_BRAKED(dev) do { /* Implement me! */ } while (0) + +// Macro that set motor direction +#define DC_MOTOR_SET_DIR(dev, dir) do { /* Implement me! */ } while (0) + +#define MOTOR_DC_INIT() do { /* Implement me! */ } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_ft245rl.h b/2.5/boards/stm32-p103/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/stm32-p103/hw/hw_i2c_bitbang.h b/2.5/boards/stm32-p103/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_input.h b/2.5/boards/stm32-p103/hw/hw_input.h new file mode 100644 index 00000000..dbf3bc50 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_input.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Macro for HW_INPUT_H + * + * \author Andrea Grandi + */ + +#ifndef HW_INPUT_H +#define HW_INPUT_H + +#warning FIXME: This is an example implementation, you must implement it + +#define INPUT_INIT() do { /* implement me */} while(0) + +#endif /* HW_INPUT_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_kbd.h b/2.5/boards/stm32-p103/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_lcd_32122a.h b/2.5/boards/stm32-p103/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/stm32-p103/hw/hw_lcd_hd44.h b/2.5/boards/stm32-p103/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_led.h b/2.5/boards/stm32-p103/hw/hw_led.h new file mode 100644 index 00000000..e230efb0 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_led.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Led on/off macros for STM32-P103 board. + * + * \author Andrea Righi + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include +#include +#include + +#define LED_PIN (1 << 12) +#define LED_GPIO_BASE ((struct stm32_gpio *)GPIOC_BASE) + +#define LED_ON() \ + do { \ + stm32_gpioPinWrite(LED_GPIO_BASE, LED_PIN, 1); \ + } while (0) + +#define LED_OFF() \ + do { \ + stm32_gpioPinWrite(LED_GPIO_BASE, LED_PIN, 0); \ + } while (0) + +#define LED_INIT() \ + do { \ + /* Enable clocking on GPIOA and GPIOC */ \ + RCC->APB2ENR |= RCC_APB2_GPIOC; \ + /* Configure the LED pin as GPIO */ \ + stm32_gpioPinConfig(LED_GPIO_BASE, \ + LED_PIN, GPIO_MODE_OUT_PP, \ + GPIO_SPEED_50MHZ); \ + } while(0) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_lm75.h b/2.5/boards/stm32-p103/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/stm32-p103/hw/hw_mcp41.c b/2.5/boards/stm32-p103/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/stm32-p103/hw/hw_mcp41.h b/2.5/boards/stm32-p103/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_ntc.c b/2.5/boards/stm32-p103/hw/hw_ntc.c new file mode 100644 index 00000000..b8c56914 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id: hw_ntc.h 1359 2008-05-26 09:42:37Z asterix $ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/stm32-p103/hw/hw_ntc.h b/2.5/boards/stm32-p103/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_phase.c b/2.5/boards/stm32-p103/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_phase.h b/2.5/boards/stm32-p103/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_rit128x96.h b/2.5/boards/stm32-p103/hw/hw_rit128x96.h new file mode 100644 index 00000000..c24d1a87 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_sd.h b/2.5/boards/stm32-p103/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_sensor.h b/2.5/boards/stm32-p103/hw/hw_sensor.h new file mode 100644 index 00000000..113e468f --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_sensor.h @@ -0,0 +1,93 @@ +/** + * \file + * + * + * \brief Sensor hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SENSOR_H +#define HW_SENSOR_H + +#warning TODO:This is an example implementation, you must implement it! + +#define NUM_HOME_SENSORS 1 + + +INLINE bool hw_home_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +INLINE void hw_home_sensor_set_inverted(int sensor, bool inverted) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + (void)inverted; +} + +INLINE bool hw_level_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +INLINE void hw_level_sensor_set_inverted(int sensor, bool inverted) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + (void)inverted; +} + +INLINE bool bld_hw_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +#endif /* HW_SENSOR_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_ser.h b/2.5/boards/stm32-p103/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_sipo.h b/2.5/boards/stm32-p103/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_spi.h b/2.5/boards/stm32-p103/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/stm32-p103/hw/hw_spi_dma.h b/2.5/boards/stm32-p103/hw/hw_spi_dma.h new file mode 100644 index 00000000..e0714d43 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_spi_dma.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief SPI DMA driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_SPI_DMA_H +#define HW_SPI_DMA_H + +#define SPI_DMA_STROBE_INIT() do {/*PIOA_PER = BV(13); PIOA_OER = BV(13);*/} while(0) + +#define SPI_DMA_STROBE_ON() do {/*PIOA_CODR = BV(13);*/} while(0) +#define SPI_DMA_STROBE_OFF() do {/*PIOA_SODR = BV(13);*/} while(0) + +#endif /* HW_SPI_DMA_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_stepper.h b/2.5/boards/stm32-p103/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/stm32-p103/hw/hw_tas5706a.h b/2.5/boards/stm32-p103/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_tc520.h b/2.5/boards/stm32-p103/hw/hw_tc520.h new file mode 100644 index 00000000..3ff492d5 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_tc520.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * + * \brief TC520 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_TC520_H +#define HW_TC520_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define CE_PIN 0 +#define DV_PIN 0 +#define LOAD_PIN 0 +#define READ_PIN 0 + + +#define DV_HIGH() /* Implement me! */ +#define DV_LOW() /* Implement me! */ + +#define CE_HIGH() /* Implement me! */ +#define CE_LOW() /* Implement me! */ + +#define LOAD_HIGH() /* Implement me! */ +#define LOAD_LOW() /* Implement me! */ + +#define READ_HIGH() /* Implement me! */ +#define READ_LOW() /* Implement me! */ + +#define TC520_HW_INIT \ +do\ +{\ + /* Put here your code to init hardware */ \ +} while(0) + +#endif /* HW_TC520_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_thermo.h b/2.5/boards/stm32-p103/hw/hw_thermo.h new file mode 100644 index 00000000..6f478068 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_thermo.h @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "hw/thermo_map.h" + +#include + +#include + + +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to read current temperature */ + return 0; +} + + +/** + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to turn off the thermo device */ +} + +/** + * Based on the current temperature \a cur_temp and the target temperature \a target, + * this function turns on and off specific thermo device. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + if (target - cur_temp > 0) + { + /* + * We are leveaving the target temperature, so + * turn on the thermo device! + */ + } + else + { + /* + * Ok, we are near the target temperature, so + * turn off the thermo device! + */ + } + +} + +#define THERMO_HW_INIT _thermo_hw_init() + +/** + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + /* Init your devices here! */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_timer.h b/2.5/boards/stm32-p103/hw/hw_timer.h new file mode 100644 index 00000000..ce1b985c --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_timer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Timer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TIMER_H +#define HW_TIMER_H + +#include "cfg/cfg_timer.h" + +#if CONFIG_TIMER_STROBE + #warning TODO:This is an example implementation, you must implement it! + #define TIMER_STROBE_INIT do { /* implement me */ } while (0) + #define TIMER_STROBE_ON do { /* implement me */ } while (0) + #define TIMER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_TIMER_H */ diff --git a/2.5/boards/stm32-p103/hw/hw_tlv5618.h b/2.5/boards/stm32-p103/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/stm32-p103/hw/hw_tmp123.h b/2.5/boards/stm32-p103/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/stm32-p103/hw/kbd_map.h b/2.5/boards/stm32-p103/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/stm32-p103/hw/mcp41_map.h b/2.5/boards/stm32-p103/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/boards/stm32-p103/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/stm32-p103/hw/ntc_map.h b/2.5/boards/stm32-p103/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/stm32-p103/hw/phase_map.h b/2.5/boards/stm32-p103/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/stm32-p103/hw/pwm_map.h b/2.5/boards/stm32-p103/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/2.5/boards/stm32-p103/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/stm32-p103/hw/thermo_map.h b/2.5/boards/stm32-p103/hw/thermo_map.h new file mode 100644 index 00000000..7dbe27bc --- /dev/null +++ b/2.5/boards/stm32-p103/hw/thermo_map.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/stm32-p103/templates/.spec b/2.5/boards/stm32-p103/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/stm32-p103/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/stm32-p103/templates/empty/.spec b/2.5/boards/stm32-p103/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_adc.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_afsk.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ax25.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_battfs.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..2607d50c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 0 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_debug.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..b0136259 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_fat.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_flash25.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_gfx.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_heap.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_i2c.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_i2s.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_kbd.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_keytag.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_kfile.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lm75.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_md2.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_monitor.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_nmea.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_parser.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_phase.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_proc.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..b2c3a965 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_pwm.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ramp.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_randpool.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_sem.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ser.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_signal.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_stepper.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_thermo.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_timer.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_wdt.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/stm32-p103/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/stm32-p103/templates/empty/empty.mk b/2.5/boards/stm32-p103/templates/empty/empty.mk new file mode 100644 index 00000000..b2e86f64 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/empty.mk @@ -0,0 +1,92 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules +empty_DEBUG = 1 + +# Our target application +TRG += empty + +empty_PREFIX = "arm-none-eabi-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/stm32-p103/templates/empty + +empty_HW_PATH = boards/stm32-p103 + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/mware/event.c \ + bertos/kern/sem.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/drv/timer.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +empty_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +empty_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_STM32P103__ +empty_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_stm32.c bertos/cpu/cortex-m3/drv/clock_stm32.c +empty_PROGRAMMER_CPU = stm32 +empty_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/stm32p103_rom.ld +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_CPU = cortex-m3 +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-stm32.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/stm32-p103/templates/empty/empty_user.mk b/2.5/boards/stm32-p103/templates/empty/empty_user.mk new file mode 100644 index 00000000..4c8ed7ef --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/empty_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/stm32-p103/templates/empty/main.c b/2.5/boards/stm32-p103/templates/empty/main.c new file mode 100644 index 00000000..251b987a --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/main.c @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include + +#include + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize LED driver */ + LED_INIT(); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/stm32-p103/templates/empty/project.bertos b/2.5/boards/stm32-p103/templates/empty/project.bertos new file mode 100644 index 00000000..d0083c6f --- /dev/null +++ b/2.5/boards/stm32-p103/templates/empty/project.bertos @@ -0,0 +1,75 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'formatwr' +p24 +aS'kfile' +p25 +aS'heap' +p26 +aS'timer' +p27 +aS'debug' +p28 +asS'CPU_NAME' +p29 +VSTM32F103RB +p30 +sS'PROJECT_HW_PATH' +p31 +S'../..' +p32 +sS'PROJECT_SRC_PATH' +p33 +S'.' +p34 +sS'PRESET' +p35 +I01 +sS'OUTPUT' +p36 +(lp37 +s. diff --git a/2.5/boards/stm32-p103/templates/kernel/.spec b/2.5/boards/stm32-p103/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_adc.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..2607d50c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 0 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_debug.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..b0136259 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_fat.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_heap.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_md2.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_parser.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_phase.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_proc.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..7e64c498 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_sem.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ser.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_signal.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_timer.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/stm32-p103/templates/kernel/kernel.mk b/2.5/boards/stm32-p103/templates/kernel/kernel.mk new file mode 100644 index 00000000..2341d361 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/kernel.mk @@ -0,0 +1,93 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "arm-none-eabi-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/stm32-p103/templates/kernel + +kernel_HW_PATH = boards/stm32-p103 + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/mware/event.c \ + bertos/kern/sem.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/struct/heap.c \ + bertos/kern/monitor.c \ + bertos/drv/timer.c \ + bertos/kern/kfile.c \ + bertos/kern/proc.c \ + bertos/mware/formatwr.c \ + bertos/mware/hex.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(72000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPU_CPPASRC = bertos/cpu/cortex-m3/hw/crt_cm3.S bertos/cpu/cortex-m3/hw/vectors_cm3.S +kernel_CPU_CPPAFLAGS = -g -gdwarf-2 -mthumb -mno-thumb-interwork +kernel_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -Ibertos/cpu/cortex-m3/ -D__ARM_STM32P103__ +kernel_CPU_CSRC = bertos/cpu/cortex-m3/hw/init_cm3.c bertos/cpu/cortex-m3/drv/irq_cm3.c bertos/cpu/cortex-m3/drv/gpio_stm32.c bertos/cpu/cortex-m3/drv/clock_stm32.c +kernel_PROGRAMMER_CPU = stm32 +kernel_CPU_LDFLAGS = -mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/cortex-m3/scripts/stm32p103_rom.ld +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_CPU = cortex-m3 +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-stm32.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/stm32-p103/templates/kernel/kernel_user.mk b/2.5/boards/stm32-p103/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..6dfb4d8c --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/kernel_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/stm32-p103/templates/kernel/main.c b/2.5/boards/stm32-p103/templates/kernel/main.c new file mode 100644 index 00000000..2ccb10b1 --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/main.c @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include + +#include + +#include +#include + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize LED driver */ + LED_INIT(); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + LED_ON(); + else + LED_OFF(); + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/stm32-p103/templates/kernel/project.bertos b/2.5/boards/stm32-p103/templates/kernel/project.bertos new file mode 100644 index 00000000..0d02a03e --- /dev/null +++ b/2.5/boards/stm32-p103/templates/kernel/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V72000000 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Varm-none-eabi +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V/scratch/julian/2010q1-release-eabi-lite/src/gcc-4.4-2010q1/configure --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --target=arm-none-eabi --enable-threads --disable-libmudflap --disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs --with-gnu-as --with-gnu-ld --with-specs='%{O2:%{!fno-remove-local-statics: -fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: -fremove-local-statics}}}' --enable-languages=c,c++ --disable-shared --disable-lto --with-newlib --with-pkgversion='Sourcery G++ Lite 2010q1-188' --with-bugurl=https://support.codesourcery.com/GNUToolchain/ --disable-nls --prefix=/opt/codesourcery --with-headers=yes --with-sysroot=/opt/codesourcery/arm-none-eabi --with-build-sysroot=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi --with-gmp=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-mpfr=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-ppl=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-cloog=/scratch/julian/2010q1-release-eabi-lite/obj/host-libs-2010q1-188-arm-none-eabi-i686-pc-linux-gnu/usr --disable-libgomp --enable-poison-system-directories --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin --with-build-time-tools=/scratch/julian/2010q1-release-eabi-lite/install/arm-none-eabi/bin +p15 +sS'version' +p16 +V4.4.1 +p17 +sS'build' +p18 +VSourcery G++ Lite 2010q1-188 +p19 +sS'path' +p20 +V/opt/sourcery/bin/arm-none-eabi-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'semaphores' +p25 +aS'monitor' +p26 +aS'formatwr' +p27 +aS'debug' +p28 +aS'kfile' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VSTM32F103RB +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +s. diff --git a/2.5/boards/triface/.image.png b/2.5/boards/triface/.image.png new file mode 100644 index 0000000000000000000000000000000000000000..27e58d43ec534f83dd1db4d86f5956a7b184e23a GIT binary patch literal 49658 zcmV)QK(xP!P)Px#32;bRa{vGi!~g&e!~vBn4jTXf00(qQO+^RV1sD=I7pc-K%K!i%07*naRCwC# zy;+cK*L5X!_BrQ{IS(~YZyo?V%p3raB0-QMMTs;iiImiemRhzW{L^ZOBjgV|+R+M! zBczV-@X^+f-D-D)+Lp{{k|HIFBuEehNX)>)@bIR3HP1O`-g!9ZY=2}`y?U8hk94;L zAf&F3ip-lg^WMB?*0qSf$8ln!%!Z406?h0h{;I>fgmCO5Mf0K{a~FA03Z?oyb~oy?aI-`K5D22 zo}$7qk)@o8D7j%a-2gxxe$>(b{l7j~54Rtp>hQx4Hx9gI@EZ^WRERc(COLMr`11{|FC85;jPAhN0PP-!^_t2%;L!>ID25>p(it&y^9|iXz z+J;T-oh}l900Dyd57QHV0D*P*%fHk6jC57~|CG{!-H;F@Bu>Sy+gsc28d(Lv0Lg&a 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z8D45_x3Rop0q0umcXKM;88a*Rc#?V|AcQ1@?52ahIG~HIZ?s&{{j(NT+jBf#p-cZ= z29%`)0jB_1|K|2AX}-_JJGK#!EW`I@!P6y!gn*s#9?Z!?wq>iGf*Rm5-^$ie!qhKz z-tCiqQQJVWAp^wJS8(ANk|zYAshiOh&w5|MfDeveler Triface + +

+ + + + + + + + + + + + + + + + + + + +
CPUAVR ATmega128/ATmega1281
Clock14.7456MHz
Memory128kB Flash, 4/8kB SRAM
Peripheralstimers, ADC, UART, SPI, I²C, PWM, 8 relays output, 8 digital inputs, buzzer, interface for 125kHz RFID reader
+

+

+Triface is a board designed by Develer and is based on AVR ATmega128/ATmega1281 CPU. Visit the Triface page on BeRTOS site for more information. +

+ +''' diff --git a/2.5/boards/triface/benchmark/.spec b/2.5/boards/triface/benchmark/.spec new file mode 100644 index 00000000..18c0580d --- /dev/null +++ b/2.5/boards/triface/benchmark/.spec @@ -0,0 +1,3 @@ +name="Benchmarks" +ord=2 +description="Projects to measure different aspects of BeRTOS performance." diff --git a/2.5/boards/triface/benchmark/context_switch/.spec b/2.5/boards/triface/benchmark/context_switch/.spec new file mode 100644 index 00000000..3268cbf4 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/.spec @@ -0,0 +1,15 @@ +name = 'BeRTOS Context Switch' +description=""" +

+This benchmark measures the overhead (in us) required to deliver a +signal and switch from a low-priority process to a high-priority process. +

+

+The measure is made by the high-precision timer if supported by the +architecture. Alternatively, the time can also be measured using an external +oscilloscope connected to the board's status LED. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_adc.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_afsk.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ax25.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_battfs.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_context_switch.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_context_switch.h new file mode 100644 index 00000000..be15cf2f --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_dataflash.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_dc_motor.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_debug.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_fat.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_flash25.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_formatwr.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_gfx.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_hashtable.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_heap.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_i2c.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_i2s.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ini_reader.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_kbd.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_keytag.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_kfile.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lm75.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_md2.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_menu.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_monitor.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_nmea.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_parser.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_phase.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_pocketbus.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_proc.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_pwm.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ramp.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_randpool.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_sem.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ser.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_signal.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_spi_bitbang.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_stepper.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_tas5706a.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_thermo.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_timer.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_wdt.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/triface/benchmark/context_switch/cfg/cfg_xmodem.h b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/triface/benchmark/context_switch/context_switch.mk b/2.5/boards/triface/benchmark/context_switch/context_switch.mk new file mode 100644 index 00000000..86571ec5 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/context_switch.mk @@ -0,0 +1,89 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the context_switch_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += context_switch + +context_switch_PREFIX = "avr-" + +context_switch_SUFFIX = "" + +context_switch_SRC_PATH = boards/triface/benchmark/context_switch + +context_switch_HW_PATH = boards/triface + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CSRC INSTEAD! +context_switch_WIZARD_CSRC = \ + bertos/benchmark/context_switch.c \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/mware/event.c \ + bertos/drv/timer.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/kern/proc.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_PCSRC INSTEAD! +context_switch_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CPPASRC INSTEAD! +context_switch_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_CXXSRC INSTEAD! +context_switch_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE context_switch_USER_ASRC INSTEAD! +context_switch_WIZARD_ASRC = \ + \ + # + +context_switch_CPPFLAGS = -D'CPU_FREQ=(14745600UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(context_switch_HW_PATH) -I$(context_switch_SRC_PATH) $(context_switch_CPU_CPPFLAGS) $(context_switch_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_LDFLAGS = $(context_switch_CPU_LDFLAGS) $(context_switch_WIZARD_LDFLAGS) $(context_switch_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPAFLAGS = $(context_switch_CPU_CPPAFLAGS) $(context_switch_WIZARD_CPPAFLAGS) $(context_switch_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CSRC = $(context_switch_CPU_CSRC) $(context_switch_WIZARD_CSRC) $(context_switch_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_PCSRC = $(context_switch_CPU_PCSRC) $(context_switch_WIZARD_PCSRC) $(context_switch_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CPPASRC = $(context_switch_CPU_CPPASRC) $(context_switch_WIZARD_CPPASRC) $(context_switch_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_CXXSRC = $(context_switch_CPU_CXXSRC) $(context_switch_WIZARD_CXXSRC) $(context_switch_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_ASRC = $(context_switch_CPU_ASRC) $(context_switch_WIZARD_ASRC) $(context_switch_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +context_switch_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +context_switch_PROGRAMMER_CPU = atmega1281 +context_switch_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +context_switch_MCU = atmega1281 +context_switch_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh +context_switch_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +context_switch_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ + +include $(context_switch_SRC_PATH)/context_switch_user.mk diff --git a/2.5/boards/triface/benchmark/context_switch/context_switch_user.mk b/2.5/boards/triface/benchmark/context_switch/context_switch_user.mk new file mode 100644 index 00000000..932e591b --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/context_switch_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +context_switch_PROGRAMMER_TYPE = none +context_switch_PROGRAMMER_PORT = none + +# Files included by the user. +context_switch_USER_CSRC = \ + $(context_switch_SRC_PATH)/main.c \ + # + +# Files included by the user. +context_switch_USER_PCSRC = \ + # + +# Files included by the user. +context_switch_USER_CPPASRC = \ + # + +# Files included by the user. +context_switch_USER_CXXSRC = \ + # + +# Files included by the user. +context_switch_USER_ASRC = \ + # + +# Flags included by the user. +context_switch_USER_LDFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +context_switch_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + -O2 \ + # diff --git a/2.5/boards/triface/benchmark/context_switch/flash.log b/2.5/boards/triface/benchmark/context_switch/flash.log new file mode 100644 index 00000000..77ca57b3 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/flash.log @@ -0,0 +1,31 @@ + +avrdude: AVR device initialized and ready to accept instructions + +Reading | ################################################## | 100% 0.04s + +avrdude: Device signature = 0x1e9704 +avrdude: NOTE: FLASH memory has been specified, an erase cycle will be performed + To disable this feature, specify the -D option. +avrdude: erasing chip +avrdude: reading input file "images/context_switch.hex" +avrdude: input file images/context_switch.hex auto detected as Intel Hex +avrdude: writing flash (12988 bytes): + +Writing | ################################################## | 100% 4.11s + +avrdude: 12988 bytes of flash written +avrdude: verifying flash memory against images/context_switch.hex: +avrdude: load data flash data from input file images/context_switch.hex: +avrdude: input file images/context_switch.hex auto detected as Intel Hex +avrdude: input file images/context_switch.hex contains 12988 bytes +avrdude: reading on-chip flash data: + +Reading | ################################################## | 100% 3.07s + +avrdude: verifying ... +avrdude: 12988 bytes of flash verified + +avrdude: safemode: Fuses OK + +avrdude done. Thank you. + diff --git a/2.5/boards/triface/benchmark/context_switch/main.c b/2.5/boards/triface/benchmark/context_switch/main.c new file mode 100644 index 00000000..f190567f --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/main.c @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel context switch benchmark. + * + * This benchmark measures the overhead (in µs) required to deliver a + * signal and switch from a low-priority process to a high-priority process. + * + * The measure is made by the high-precision timer if supported by the + * architecture. Alternatively, the time can also be measured using an external + * oscilloscope connected to the board's status LED. + */ + +#include + +int main(void) +{ + context_switch(); + while (1) + { + } + + return 0; +} diff --git a/2.5/boards/triface/benchmark/context_switch/project.bertos b/2.5/boards/triface/benchmark/context_switch/project.bertos new file mode 100644 index 00000000..b5acf5c2 --- /dev/null +++ b/2.5/boards/triface/benchmark/context_switch/project.bertos @@ -0,0 +1,81 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V14745600 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vcontext_switch +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Vavr +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V../configure --prefix=/usr/local/avr-4.1.2 --target=avr --enable-languages=c --disable-nls --disable-libssp --with-dwarf2 +p15 +sVversion +p16 +V4.1.2 +p17 +sVbuild +p18 +VDeveler s.r.l. 20070824 +p19 +sVpath +p20 +V/localhome/toolchain/avr/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'formatwr' +p26 +aS'kfile' +p27 +aS'context_switch' +p28 +aS'heap' +p29 +aS'signal' +p30 +aS'timer' +p31 +asS'CPU_NAME' +p32 +VATmega1281 +p33 +sS'PROJECT_HW_PATH' +p34 +S'../..' +p35 +sS'PROJECT_SRC_PATH' +p36 +S'.' +p37 +sS'PRESET' +p38 +I01 +sS'OUTPUT' +p39 +(lp40 +s. \ No newline at end of file diff --git a/2.5/boards/triface/benchmark/kernel_footprint/.spec b/2.5/boards/triface/benchmark/kernel_footprint/.spec new file mode 100644 index 00000000..5a527bef --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/.spec @@ -0,0 +1,14 @@ +name = 'BeRTOS Kernel footprint' +description=""" +

+This benchmark measures the memory footprint of the BeRTOS kernel with a +simple minimalist user application. +

+

+The purpose of this test is to give a measure of the required space in a +generic flash memory to store a full-featured BeRTOS kernel. +

+

+For more information have a look at the BeRTOS benchmarks page. +

+""" diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_adc.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_afsk.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ax25.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_battfs.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_context_switch.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_dataflash.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_dc_motor.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_debug.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_fat.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_flash25.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_formatwr.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_gfx.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_hashtable.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_heap.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_i2c.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_i2s.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ini_reader.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_kbd.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_keytag.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_kfile.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lm75.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_md2.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_menu.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_monitor.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_nmea.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_parser.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_phase.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_pocketbus.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_proc.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_proc.h new file mode 100644 index 00000000..ab1a4680 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_pwm.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ramp.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_randpool.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_sem.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ser.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_signal.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_stepper.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_tas5706a.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_thermo.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_timer.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_wdt.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_xmodem.h b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/kernel_footprint.mk b/2.5/boards/triface/benchmark/kernel_footprint/kernel_footprint.mk new file mode 100644 index 00000000..4ab89f76 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/kernel_footprint.mk @@ -0,0 +1,88 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_footprint_user.mk file instead. +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel_footprint + +kernel_footprint_PREFIX = "avr-" + +kernel_footprint_SUFFIX = "" + +kernel_footprint_SRC_PATH = boards/triface/benchmark/kernel_footprint + +kernel_footprint_HW_PATH = boards/triface + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CSRC INSTEAD! +kernel_footprint_WIZARD_CSRC = \ + bertos/kern/signal.c \ + bertos/kern/kfile.c \ + bertos/kern/sem.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/benchmark/kernel_footprint.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_PCSRC INSTEAD! +kernel_footprint_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CPPASRC INSTEAD! +kernel_footprint_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_CXXSRC INSTEAD! +kernel_footprint_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_footprint_USER_ASRC INSTEAD! +kernel_footprint_WIZARD_ASRC = \ + \ + # + +kernel_footprint_CPPFLAGS = -D'CPU_FREQ=(14745600UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_footprint_HW_PATH) -I$(kernel_footprint_SRC_PATH) $(kernel_footprint_CPU_CPPFLAGS) $(kernel_footprint_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_LDFLAGS = $(kernel_footprint_CPU_LDFLAGS) $(kernel_footprint_WIZARD_LDFLAGS) $(kernel_footprint_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPAFLAGS = $(kernel_footprint_CPU_CPPAFLAGS) $(kernel_footprint_WIZARD_CPPAFLAGS) $(kernel_footprint_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CSRC = $(kernel_footprint_CPU_CSRC) $(kernel_footprint_WIZARD_CSRC) $(kernel_footprint_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_PCSRC = $(kernel_footprint_CPU_PCSRC) $(kernel_footprint_WIZARD_PCSRC) $(kernel_footprint_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CPPASRC = $(kernel_footprint_CPU_CPPASRC) $(kernel_footprint_WIZARD_CPPASRC) $(kernel_footprint_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_CXXSRC = $(kernel_footprint_CPU_CXXSRC) $(kernel_footprint_WIZARD_CXXSRC) $(kernel_footprint_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_ASRC = $(kernel_footprint_CPU_ASRC) $(kernel_footprint_WIZARD_ASRC) $(kernel_footprint_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_footprint_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +kernel_footprint_PROGRAMMER_CPU = atmega1281 +kernel_footprint_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +kernel_footprint_MCU = atmega1281 +kernel_footprint_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh +kernel_footprint_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +kernel_footprint_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ + +include $(kernel_footprint_SRC_PATH)/kernel_footprint_user.mk diff --git a/2.5/boards/triface/benchmark/kernel_footprint/kernel_footprint_user.mk b/2.5/boards/triface/benchmark/kernel_footprint/kernel_footprint_user.mk new file mode 100644 index 00000000..af8c4d6c --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/kernel_footprint_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_footprint_PROGRAMMER_TYPE = none +kernel_footprint_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_footprint_USER_CSRC = \ + $(kernel_footprint_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_footprint_USER_PCSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_footprint_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_footprint_USER_ASRC = \ + # + +# Flags included by the user. +kernel_footprint_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_footprint_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/triface/benchmark/kernel_footprint/main.c b/2.5/boards/triface/benchmark/kernel_footprint/main.c new file mode 100644 index 00000000..a3f11e50 --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/main.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * This benchmark measures the memory footprint[1] of the BeRTOS kernel with a + * simple minimalist user application. + * + * The purpose of this test is to give a measure of the required space in a + * generic flash memory to store a full-featured BeRTOS kernel. + * + * [1] http://en.wikipedia.org/wiki/Memory_footprint + */ + +#include + +int main(void) +{ + kernel_footprint(); + while (1) + { + } + + return 0; +} + diff --git a/2.5/boards/triface/benchmark/kernel_footprint/project.bertos b/2.5/boards/triface/benchmark/kernel_footprint/project.bertos new file mode 100644 index 00000000..970e6e2b --- /dev/null +++ b/2.5/boards/triface/benchmark/kernel_footprint/project.bertos @@ -0,0 +1,83 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V14745600 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel_footprint +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Vavr +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V../configure --prefix=/usr/local/avr-4.3.2/ --target=avr --enable-languages=c,c++ --disable-nls --disable-libssp --with-dwarf2 +p15 +sVversion +p16 +V4.3.2 +p17 +sVbuild +p18 +VGCC +p19 +sVpath +p20 +V/localhome/toolchain/avr/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'kernel' +p24 +aS'formatwr' +p25 +aS'kfile' +p26 +aS'semaphores' +p27 +aS'msg' +p28 +aS'kernel_footprint' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +asS'CPU_NAME' +p33 +VATmega1281 +p34 +sS'PROJECT_HW_PATH' +p35 +S'../..' +p36 +sS'PROJECT_SRC_PATH' +p37 +S'.' +p38 +sS'PRESET' +p39 +I01 +sS'OUTPUT' +p40 +(lp41 +s. \ No newline at end of file diff --git a/2.5/boards/triface/examples/.spec b/2.5/boards/triface/examples/.spec new file mode 100644 index 00000000..d244bbf6 --- /dev/null +++ b/2.5/boards/triface/examples/.spec @@ -0,0 +1,3 @@ +name="Examples" +ord=1 +description="Full working example projects." diff --git a/2.5/boards/triface/examples/triface/.spec b/2.5/boards/triface/examples/triface/.spec new file mode 100644 index 00000000..bf11e35e --- /dev/null +++ b/2.5/boards/triface/examples/triface/.spec @@ -0,0 +1,27 @@ +name = 'Generic I/O board' +description=""" +

Generic I/O board

+ +

Overview

+

+Triface is a generic development board designed by Develer. The board mounts an +AVR ATmega128/ATmega1281 processor and provides 8 digital input ports, 4 +analogic input ports, 8 output ports connected to relays (able to commutate a +current of 5A) and 2 RS232 UART port. +

+

+The purpose of this project is to implement an interactive shell on the UART +port to manage all the devices present on the board. +

+ +

+The user will be able to attach a terminal on the UART port and issue specific +commands to read and change the state of the various devices. +

+ +

+For schematics and up to date information on this project, +check the Triface project page +on the BeRTOS site. +

+""" diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_adc.h b/2.5/boards/triface/examples/triface/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_afsk.h b/2.5/boards/triface/examples/triface/cfg/cfg_afsk.h new file mode 100644 index 00000000..d8bc1d56 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_afsk.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_ax25.h b/2.5/boards/triface/examples/triface/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_battfs.h b/2.5/boards/triface/examples/triface/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_context_switch.h b/2.5/boards/triface/examples/triface/cfg/cfg_context_switch.h new file mode 100644 index 00000000..fe0b4f87 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_dataflash.h b/2.5/boards/triface/examples/triface/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_dc_motor.h b/2.5/boards/triface/examples/triface/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_debug.h b/2.5/boards/triface/examples/triface/cfg/cfg_debug.h new file mode 100644 index 00000000..20fec2d3 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_debug.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_fat.h b/2.5/boards/triface/examples/triface/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_flash25.h b/2.5/boards/triface/examples/triface/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_formatwr.h b/2.5/boards/triface/examples/triface/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_gfx.h b/2.5/boards/triface/examples/triface/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_hashtable.h b/2.5/boards/triface/examples/triface/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_heap.h b/2.5/boards/triface/examples/triface/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_i2c.h b/2.5/boards/triface/examples/triface/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_i2s.h b/2.5/boards/triface/examples/triface/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_ini_reader.h b/2.5/boards/triface/examples/triface/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_kbd.h b/2.5/boards/triface/examples/triface/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_keytag.h b/2.5/boards/triface/examples/triface/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_kfile.h b/2.5/boards/triface/examples/triface/cfg/cfg_kfile.h new file mode 100644 index 00000000..5f63a1ec --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 1 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_lcd_32122a.h b/2.5/boards/triface/examples/triface/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_lcd_hd44.h b/2.5/boards/triface/examples/triface/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_lm75.h b/2.5/boards/triface/examples/triface/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_md2.h b/2.5/boards/triface/examples/triface/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_menu.h b/2.5/boards/triface/examples/triface/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_monitor.h b/2.5/boards/triface/examples/triface/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_nmea.h b/2.5/boards/triface/examples/triface/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_parser.h b/2.5/boards/triface/examples/triface/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_phase.h b/2.5/boards/triface/examples/triface/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_pocketbus.h b/2.5/boards/triface/examples/triface/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_proc.h b/2.5/boards/triface/examples/triface/cfg/cfg_proc.h new file mode 100644 index 00000000..4a1deb29 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_proc.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_pwm.h b/2.5/boards/triface/examples/triface/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_ramp.h b/2.5/boards/triface/examples/triface/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_randpool.h b/2.5/boards/triface/examples/triface/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_sem.h b/2.5/boards/triface/examples/triface/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_ser.h b/2.5/boards/triface/examples/triface/cfg/cfg_ser.h new file mode 100644 index 00000000..2f6581c4 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT 0 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT 0 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_signal.h b/2.5/boards/triface/examples/triface/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_spi_bitbang.h b/2.5/boards/triface/examples/triface/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_stepper.h b/2.5/boards/triface/examples/triface/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_tas5706a.h b/2.5/boards/triface/examples/triface/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_thermo.h b/2.5/boards/triface/examples/triface/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_timer.h b/2.5/boards/triface/examples/triface/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_wdt.h b/2.5/boards/triface/examples/triface/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/triface/examples/triface/cfg/cfg_xmodem.h b/2.5/boards/triface/examples/triface/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/triface/examples/triface/cmd_ctor.h b/2.5/boards/triface/examples/triface/cmd_ctor.h new file mode 100644 index 00000000..0e38c836 --- /dev/null +++ b/2.5/boards/triface/examples/triface/cmd_ctor.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Macro for defining command for protocol. + * + * \author Marco Benelli + */ + +#ifndef CMD_CTOR_H +#define CMD_CTOR_H + +#include + +#define REGISTER_FUNCTION parser_register_cmd + +#define REGISTER_CMD(NAME) REGISTER_FUNCTION(&cmd_ ## NAME ## _template) + +#define MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS) \ +const struct CmdTemplate cmd_ ## NAME ## _template = \ +{ \ + #NAME, ARGS, RES, cmd_ ## NAME, FLAGS \ +}; + +#define MAKE_CMD(NAME, ARGS, RES, BODY, FLAGS) \ +static ResultCode cmd_ ## NAME (parms *args) \ +{ \ + return (ResultCode)BODY; \ +} \ +MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS) + +#endif // CMD_CTOR_H diff --git a/2.5/boards/triface/examples/triface/main.c b/2.5/boards/triface/examples/triface/main.c new file mode 100644 index 00000000..045e6522 --- /dev/null +++ b/2.5/boards/triface/examples/triface/main.c @@ -0,0 +1,116 @@ +/** + * \file + * + * + * \author Marco Benelli + * \author Bernie Innocenti + * \author Daniele Basile + * + * \brief Triface application. + * + * This application manage some devices, like buzzer, digital in/out or analogic input. + * To controll all devices the application provide the interactive shell + * that allow the user to send commands to the board. All commands are generate + * throuth the macro, that convert its parameters, at compile time, to C function. + * In this way is more simple to implement the new command. Other that, the application, + * automaticly, parse this new command from the shell and call the our function. + * Actually this application runs on custom hardware, that you can see the scheme on bertos + * site, this hardware is able to read the tags string that come from rfid reader and + * print this on another serial port. The main scope of this function is to create + * the automatic opendoor, reading the tag key that will pass on the rfid reader. + */ + +#include "protocol.h" + +#include "hw/hw_input.h" + +#include + +#include +#include +#include +#include +#include + +#include +#include + +static Serial fd_ser; +static Serial tag_ser; + +static void init(void) +{ + IRQ_ENABLE; + kdbg_init(); + timer_init(); + adc_init(); + buz_init(); + MCUSR = 0; + wdt_disable(); + + INPUT_INIT(); +} + +int main(void) +{ + init(); + + /* Initialize Tag serial port and data structure */ + TagPacket pkt; + + /* Open the main communication port */ + ser_init(&fd_ser, SER_UART1); + ser_setbaudrate(&fd_ser, 115200); + + /* Tag reader serial port */ + ser_init(&tag_ser, SER_UART0); + ser_setbaudrate(&tag_ser, 9600); + + /* Init the tag parser */ + keytag_init(&pkt, &fd_ser.fd, &tag_ser.fd); + + protocol_init(&fd_ser.fd); + + while (1) + { + protocol_run(&fd_ser.fd); + + uint8_t buf[CONFIG_TAG_MAX_LEN]; + int len; + /* Read the new tag, if this is avaible */ + if ((len = keytag_recv(&pkt, buf, sizeof(buf))) != EOF) + kfile_write(&fd_ser.fd, buf, len); + } + + return 0; +} + diff --git a/2.5/boards/triface/examples/triface/project.bertos b/2.5/boards/triface/examples/triface/project.bertos new file mode 100644 index 00000000..a063a203 --- /dev/null +++ b/2.5/boards/triface/examples/triface/project.bertos @@ -0,0 +1,93 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V14745600 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vtriface +p7 +sS'TOOLCHAIN' +p8 +(dp9 +Vtarget +p10 +Vavr +p11 +sVthread +p12 +Vsingle +p13 +sVconfigured +p14 +V../configure --prefix=/usr/local/avr-4.1.2 --target=avr --enable-languages=c --disable-nls --disable-libssp --with-dwarf2 +p15 +sVversion +p16 +V4.1.2 +p17 +sVbuild +p18 +VDeveler s.r.l. 20070824 +p19 +sVpath +p20 +V/localhome/toolchain/avr/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'buzzer' +p24 +aS'ser' +p25 +aS'parser' +p26 +aS'keytag' +p27 +aS'formatwr' +p28 +aS'readline' +p29 +aS'adc' +p30 +aS'sprintf' +p31 +aS'kfile' +p32 +aS'hashtable' +p33 +aS'timer' +p34 +aS'sipo' +p35 +aS'debug' +p36 +asS'CPU_NAME' +p37 +VATmega1281 +p38 +sS'PROJECT_HW_PATH' +p39 +S'../..' +p40 +sS'PROJECT_SRC_PATH' +p41 +S'.' +p42 +sS'PRESET' +p43 +I01 +sS'OUTPUT' +p44 +(lp45 +S'codelite' +p46 +as. \ No newline at end of file diff --git a/2.5/boards/triface/examples/triface/protocol.c b/2.5/boards/triface/examples/triface/protocol.c new file mode 100644 index 00000000..900531e6 --- /dev/null +++ b/2.5/boards/triface/examples/triface/protocol.c @@ -0,0 +1,383 @@ +/** + * \file + * + * + * \brief Implementation of the command protocol between the board and the host + * + * + * \author Giovanni Bajo + * \author Marco Benelli + * \author Bernie Innocenti + * \author Daniele Basile + */ + +#include "protocol.h" +#include "cmd_ctor.h" // MAKE_CMD, REGISTER_CMD +#include "verstag.h" + +#include "hw/hw_input.h" + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include + +#include +#include + +// Define the format string for ADC +#define ADC_FORMAT_STR "dddd" +#define ADC_CHANNEL_NUM 4 + +// DEBUG: set to 1 to force interactive mode +#define FORCE_INTERACTIVE 1 + +/** + * True if we are in interactive mode, false if we are in protocol mode. + * In interactive mode, commands are read through readline() (prompt, + * completion, history) without IDs, and replies/errors are sent to the serial + * output. + * In protocol mode, we implement the default protocol + */ +static bool interactive; + +/// Readline context, used for interactive mode. +static struct RLContext rl_ctx; + +static Sipo fd_sipo; + +uint8_t reg_status_dout; +/** + * Send a NAK asking the host to send the current message again. + * + * \a fd kfile handler for serial. + * \a err human-readable description of the error for debug purposes. + */ +INLINE void NAK(KFile *fd, const char *err) +{ +#ifdef _DEBUG + kfile_printf(fd, "NAK \"%s\"\r\n", err); +#else + kfile_printf(fd, "NAK\r\n"); +#endif +} + +static void protocol_prompt(KFile *fd) +{ + kfile_print(fd, ">> "); +} + +/* + * Print args on s, with format specified in t->result_fmt. + * Return number of valid arguments or -1 in case of error. + */ +static bool protocol_reply(KFile *fd, const struct CmdTemplate *t, + const parms *args) +{ + unsigned short offset = strlen(t->arg_fmt) + 1; + unsigned short nres = strlen(t->result_fmt); + + for (unsigned short i = 0; i < nres; ++i) + { + if (t->result_fmt[i] == 'd') + { + kfile_printf(fd, " %ld", args[offset+i].l); + } + else if (t->result_fmt[i] == 's') + { + kfile_printf(fd, " %s", args[offset+i].s); + } + + else + { + abort(); + } + } + kfile_printf(fd, "\r\n"); + return true; +} + +static void protocol_parse(KFile *fd, const char *buf) +{ + const struct CmdTemplate *templ; + + /* Command check. */ + templ = parser_get_cmd_template(buf); + if (!templ) + { + kfile_print(fd, "-1 Invalid command.\r\n"); + protocol_prompt(fd); + return; + } + + parms args[PARSER_MAX_ARGS]; + + /* Args Check. TODO: Handle different case. see doc/PROTOCOL . */ + if (!parser_get_cmd_arguments(buf, templ, args)) + { + kfile_print(fd, "-2 Invalid arguments.\r\n"); + protocol_prompt(fd); + return; + } + + /* Execute. */ + if(!parser_execute_cmd(templ, args)) + { + NAK(fd, "Error in executing command."); + } + if (!protocol_reply(fd, templ, args)) + { + NAK(fd, "Invalid return format."); + } + + protocol_prompt(fd); + return; +} + +void protocol_run(KFile *fd) +{ + /** + * \todo to be removed, we could probably access the serial FIFO + * directly + */ + static char linebuf[80]; + + if (!interactive) + { + kfile_gets(fd, linebuf, sizeof(linebuf)); + + // reset serial port error anyway + kfile_clearerr(fd); + + // check message minimum length + if (linebuf[0]) + { + /* If we enter lines beginning with sharp(#) + they are stripped out from commands */ + if(linebuf[0] != '#') + { + if (linebuf[0] == 0x1B && linebuf[1] == 0x1B) // ESC + { + interactive = true; + kfile_printf(fd, "Entering interactive mode\r\n"); + } + else + { + protocol_parse(fd, linebuf); + } + } + } + } + else + { + const char *buf; + + /* + * Read a line from serial. We use a temporary buffer + * because otherwise we would have to extract a message + * from the port immediately: there might not be any + * available, and one might get free while we read + * the line. We also add a fake ID at the start to + * fool the parser. + */ + buf = rl_readline(&rl_ctx); + + /* If we enter lines beginning with sharp(#) + they are stripped out from commands */ + if(buf && buf[0] != '#') + { + if (buf[0] != '\0') + { + // exit special case to immediately change serial input + if (!strcmp(buf, "exit") || !strcmp(buf, "quit")) + { + rl_clear_history(&rl_ctx); + kfile_printf(fd, "Leaving interactive mode...\r\n"); + interactive = FORCE_INTERACTIVE; + } + else + { + //TODO: remove sequence numbers + linebuf[0] = '0'; + linebuf[1] = ' '; + + strncpy(linebuf + 2, buf, sizeof(linebuf) - 3); + linebuf[sizeof(linebuf) - 1] = '\0'; + protocol_parse(fd, linebuf); + } + } + } + } +} + +/* + * Commands. + * TODO: Command declarations and definitions should be in another file(s). + * Maybe we should use CMD_HUNK_TEMPLATE. + * + */ + +MAKE_CMD(ver, "", "ddd", +({ + args[1].l = VERS_MAJOR; + args[2].l = VERS_MINOR; + args[3].l = VERS_REV; + 0; +}), 0); + +/* Sleep. Example of declaring function body directly in macro call. */ +MAKE_CMD(sleep, "d", "", +({ + timer_delay((mtime_t)args[1].l); + 0; +}), 0) + +/* Ping. */ +MAKE_CMD(ping, "", "", +({ + //Silence "args not used" warning. + (void)args; + 0; +}), 0) + +/* Dout */ +MAKE_CMD(dout, "d", "", +({ + kfile_putc((uint8_t)args[1].l, &fd_sipo.fd); + + //Store status of dout ports. + reg_status_dout = (uint8_t)args[1].l; + 0; +}), 0) + +/* rdout read the status of out ports.*/ +MAKE_CMD(rdout, "", "d", +({ + args[1].l = reg_status_dout; + 0; +}), 0) + + +/* Reset */ +MAKE_CMD(reset, "", "", +({ + //Silence "args not used" warning. + (void)args; + wdt_enable(WDTO_2S); + + /*We want to have an infinite loop that lock access on watchdog timer. + This piece of code it's equivalent to a while(true), but we have done this because + gcc generate a warning message that suggest to use "noreturn" parameter in function reset.*/ + ASSERT(args); + while(args); + 0; + +}), 0) + +/* Din */ +MAKE_CMD(din, "", "d", +({ + args[1].l = INPUT_GET(); + 0; +}), 0) + + + +/* Ain */ +MAKE_CMD(ain, "", ADC_FORMAT_STR, +({ + STATIC_ASSERT((sizeof(ADC_FORMAT_STR) - 1) == ADC_CHANNEL_NUM); + for(int i = 0; i < ADC_CHANNEL_NUM; i++) + args[i+1].l = adc_read(i); + + 0; +}), 0) + +/* Beep */ +MAKE_CMD(beep, "d", "", +({ + buz_beep(args[1].l); + 0; +}), 0) + +/* Register commands. */ +static void protocol_registerCmds(void) +{ + REGISTER_CMD(ver); + REGISTER_CMD(sleep); + REGISTER_CMD(ping); + REGISTER_CMD(dout); + //Set off all dout ports. + reg_status_dout = 0; + REGISTER_CMD(rdout); + REGISTER_CMD(reset); + REGISTER_CMD(din); + REGISTER_CMD(ain); + REGISTER_CMD(beep); +} + +/* Initialization: readline context, parser and register commands. */ +void protocol_init(KFile *fd) +{ + /* SPI Port Initialization */ + fd_sipo.load_device = TRIFACE_DOUT; + fd_sipo.bit_order = SIPO_DATAORDER_LSB; + fd_sipo.clock_pol = SIPO_START_LOW; + fd_sipo.load_pol = SIPO_LOW_TO_HIGH; + + sipo_init(&fd_sipo); + + interactive = FORCE_INTERACTIVE; + + rl_init_ctx(&rl_ctx); + //rl_setprompt(&rl_ctx, ">> "); + rl_sethook_get(&rl_ctx, (getc_hook)kfile_getc, fd); + rl_sethook_put(&rl_ctx, (putc_hook)kfile_putc, fd); + rl_sethook_match(&rl_ctx, parser_rl_match, NULL); + rl_sethook_clear(&rl_ctx, (clear_hook)kfile_clearerr,fd); + + parser_init(); + + protocol_registerCmds(); + + protocol_prompt(fd); +} diff --git a/2.5/boards/triface/examples/triface/protocol.h b/2.5/boards/triface/examples/triface/protocol.h new file mode 100644 index 00000000..8075bc87 --- /dev/null +++ b/2.5/boards/triface/examples/triface/protocol.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Implementation of the command protocol between the board and the host + * + * \author Marco Benelli + */ + + +#ifndef PROTOCOL_H +#define PROTOCOL_H + +#include + +#include + +void protocol_init(KFile *fd); +void protocol_run(KFile *fd); + +#endif // PROTOOCOL_H diff --git a/2.5/boards/triface/examples/triface/triface.mk b/2.5/boards/triface/examples/triface/triface.mk new file mode 100644 index 00000000..095c4a60 --- /dev/null +++ b/2.5/boards/triface/examples/triface/triface.mk @@ -0,0 +1,108 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the triface_user.mk file instead. +# + +# Constants automatically defined by the selected modules +triface_DEBUG = 1 + +# Our target application +TRG += triface + +triface_PREFIX = "avr-" + +triface_SUFFIX = "" + +triface_SRC_PATH = boards/triface/examples/triface + +triface_HW_PATH = boards/triface + +ifeq ($(CPU), atmega1281) + triface_hfuse = 0x98 + triface_lfuse = 0x3d + triface_efuse = 0x7f + triface_lock = 0x2f +else + triface_hfuse = 0x88 + triface_lfuse = 0xff + triface_efuse = 0xff + triface_lock = 0x2f +endif + + +# Files automatically generated by the wizard. DO NOT EDIT, USE triface_USER_CSRC INSTEAD! +triface_WIZARD_CSRC = \ + bertos/kern/kfile.c \ + bertos/mware/readline.c \ + bertos/mware/event.c \ + bertos/net/keytag.c \ + bertos/drv/sipo.c \ + bertos/cpu/avr/drv/adc_avr.c \ + bertos/struct/hashtable.c \ + bertos/mware/formatwr.c \ + bertos/mware/sprintf.c \ + bertos/drv/buzzer.c \ + bertos/drv/adc.c \ + bertos/drv/timer.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/mware/parser.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE triface_USER_PCSRC INSTEAD! +triface_WIZARD_PCSRC = \ + bertos/mware/sprintf.c \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE triface_USER_CPPASRC INSTEAD! +triface_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE triface_USER_CXXSRC INSTEAD! +triface_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE triface_USER_ASRC INSTEAD! +triface_WIZARD_ASRC = \ + \ + # + +triface_CPPFLAGS = -D'CPU_FREQ=(14745600UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(triface_HW_PATH) -I$(triface_SRC_PATH) $(triface_CPU_CPPFLAGS) $(triface_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_LDFLAGS = $(triface_CPU_LDFLAGS) $(triface_WIZARD_LDFLAGS) $(triface_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_CPPAFLAGS = $(triface_CPU_CPPAFLAGS) $(triface_WIZARD_CPPAFLAGS) $(triface_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_CSRC = $(triface_CPU_CSRC) $(triface_WIZARD_CSRC) $(triface_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_PCSRC = $(triface_CPU_PCSRC) $(triface_WIZARD_PCSRC) $(triface_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_CPPASRC = $(triface_CPU_CPPASRC) $(triface_WIZARD_CPPASRC) $(triface_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_CXXSRC = $(triface_CPU_CXXSRC) $(triface_WIZARD_CXXSRC) $(triface_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_ASRC = $(triface_CPU_ASRC) $(triface_WIZARD_ASRC) $(triface_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +triface_MCU = atmega1281 +triface_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +triface_PROGRAMMER_CPU = atmega1281 +triface_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +triface_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +triface_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +triface_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(triface_SRC_PATH)/triface_user.mk diff --git a/2.5/boards/triface/examples/triface/triface_user.mk b/2.5/boards/triface/examples/triface/triface_user.mk new file mode 100644 index 00000000..2f52da95 --- /dev/null +++ b/2.5/boards/triface/examples/triface/triface_user.mk @@ -0,0 +1,44 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +triface_PROGRAMMER_TYPE = none +triface_PROGRAMMER_PORT = none + +# Files included by the user. +triface_USER_CSRC = \ + $(triface_SRC_PATH)/main.c \ + $(triface_SRC_PATH)/protocol.c \ + # + +# Files included by the user. +triface_USER_PCSRC = \ + # + +# Files included by the user. +triface_USER_CPPASRC = \ + # + +# Files included by the user. +triface_USER_CXXSRC = \ + # + +# Files included by the user. +triface_USER_ASRC = \ + # + +# Flags included by the user. +triface_USER_LDFLAGS = \ + # + +# Flags included by the user. +triface_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +triface_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/triface/hw/hw_afsk.c b/2.5/boards/triface/hw/hw_afsk.c new file mode 100644 index 00000000..8adb432d --- /dev/null +++ b/2.5/boards/triface/hw/hw_afsk.c @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + diff --git a/2.5/boards/triface/hw/hw_afsk.h b/2.5/boards/triface/hw/hw_afsk.h new file mode 100644 index 00000000..ec9b8be2 --- /dev/null +++ b/2.5/boards/triface/hw/hw_afsk.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/2.5/boards/triface/hw/hw_buzzer.h b/2.5/boards/triface/hw/hw_buzzer.h new file mode 100644 index 00000000..a2b683ad --- /dev/null +++ b/2.5/boards/triface/hw/hw_buzzer.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \author Francesco Sacchi + * \author Andrea Grandi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#include +#include + +#define BUZZER_BIT BV(PE3) +#define IS_BUZZER_ON (PORTE & BUZZER_BIT) +#define BUZZER_HW_INIT do { DDRE |= BV(DDE3); } while (0) +#define BUZZER_ON do { PORTE |= BUZZER_BIT; } while (0) +#define BUZZER_OFF do { PORTE &= ~BUZZER_BIT; } while (0) + +#endif /* HW_BUZZER_H */ + diff --git a/2.5/boards/triface/hw/hw_dataflash.c b/2.5/boards/triface/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/2.5/boards/triface/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/2.5/boards/triface/hw/hw_dataflash.h b/2.5/boards/triface/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/2.5/boards/triface/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/2.5/boards/triface/hw/hw_dc_motor.h b/2.5/boards/triface/hw/hw_dc_motor.h new file mode 100644 index 00000000..f39388df --- /dev/null +++ b/2.5/boards/triface/hw/hw_dc_motor.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Define fuctions which read adc value from specific device + */ + #define HW_DC_MOTOR_READ_VALUE(dev, min, max) \ + ({ \ + /* Put here the fuction that read from ADC */ \ + (void)(dev); \ + (void)(min); \ + (void)(max); \ + (0); \ + }) + +// Macro that enable the select DC motor +#define DC_MOTOR_ENABLE(dev) /* Implement me! */ +// Macro that disable the select DC motor +#define DC_MOTOR_DISABLE(dev) /* Implement me! */ + +// Macro that left the DC motor rotor float +#define DC_MOTOR_STOP_FLOAT(dev) DC_MOTOR_DISABLE(dev) +// Macro that put in short circuit DC motor supply pins +#define DC_MOTOR_STOP_BRAKED(dev) do { /* Implement me! */ } while (0) + +// Macro that set motor direction +#define DC_MOTOR_SET_DIR(dev, dir) do { /* Implement me! */ } while (0) + +#define MOTOR_DC_INIT() do { /* Implement me! */ } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/2.5/boards/triface/hw/hw_ft245rl.h b/2.5/boards/triface/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/2.5/boards/triface/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/2.5/boards/triface/hw/hw_i2c_bitbang.h b/2.5/boards/triface/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/2.5/boards/triface/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/2.5/boards/triface/hw/hw_input.h b/2.5/boards/triface/hw/hw_input.h new file mode 100644 index 00000000..2a56b89f --- /dev/null +++ b/2.5/boards/triface/hw/hw_input.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Macro for HW_INPUT_H + * + * \author Andrea Grandi + */ + +#ifndef HW_INPUT_H +#define HW_INPUT_H + +#include + +/* Set pins as input and enable pull-up */ +#define INPUT_INIT_D \ + do{ \ + DDRD &= ~(BV(PD4) | BV(PD5) | BV(PD6) | BV(PD7)); \ + PORTD |= (BV(PD4) | BV(PD5) | BV(PD6) | BV(PD7)); \ + } while(0) + +#define INPUT_INIT_E \ + do{ \ + DDRE &= ~(BV(PE4) | BV(PE5) | BV(PE6) | BV(PE7)); \ + PORTE |= (BV(PE4) | BV(PE5) | BV(PE6) | BV(PE7)); \ + } while(0) + +INLINE uint8_t INPUT_GET(void) +{ + uint8_t out_d, out_e; + out_d = PIND; + out_e = PINE; + + /* Select our input (see scheme) */ + out_d >>= 4; + out_e = out_e & 0xF0; + + return (out_e | out_d); +} + +#define INPUT_INIT() \ + do { \ + INPUT_INIT_D; \ + INPUT_INIT_E; \ + } while(0) + +#endif /* HW_INPUT_H */ diff --git a/2.5/boards/triface/hw/hw_kbd.h b/2.5/boards/triface/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/2.5/boards/triface/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/2.5/boards/triface/hw/hw_lcd_32122a.h b/2.5/boards/triface/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/2.5/boards/triface/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/2.5/boards/triface/hw/hw_lcd_hd44.h b/2.5/boards/triface/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/2.5/boards/triface/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/2.5/boards/triface/hw/hw_led.h b/2.5/boards/triface/hw/hw_led.h new file mode 100644 index 00000000..d1ced6b4 --- /dev/null +++ b/2.5/boards/triface/hw/hw_led.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#define LED_ON() PORTG &= ~BV(PG4) +#define LED_OFF() PORTG |= BV(PG4) + +/* set pin PG4 as out */ +#define LED_INIT() DDRG |= BV(PG4) + +#endif /* HW_LED_H */ diff --git a/2.5/boards/triface/hw/hw_lm75.h b/2.5/boards/triface/hw/hw_lm75.h new file mode 100644 index 00000000..290dae09 --- /dev/null +++ b/2.5/boards/triface/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/2.5/boards/triface/hw/hw_mcp41.c b/2.5/boards/triface/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/2.5/boards/triface/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/2.5/boards/triface/hw/hw_mcp41.h b/2.5/boards/triface/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/2.5/boards/triface/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/2.5/boards/triface/hw/hw_ntc.c b/2.5/boards/triface/hw/hw_ntc.c new file mode 100644 index 00000000..3048725c --- /dev/null +++ b/2.5/boards/triface/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/2.5/boards/triface/hw/hw_ntc.h b/2.5/boards/triface/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/2.5/boards/triface/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/2.5/boards/triface/hw/hw_phase.c b/2.5/boards/triface/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/2.5/boards/triface/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/triface/hw/hw_phase.h b/2.5/boards/triface/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/2.5/boards/triface/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/2.5/boards/triface/hw/hw_rit128x96.h b/2.5/boards/triface/hw/hw_rit128x96.h new file mode 100644 index 00000000..c24d1a87 --- /dev/null +++ b/2.5/boards/triface/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/boards/triface/hw/hw_sd.h b/2.5/boards/triface/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/2.5/boards/triface/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/2.5/boards/triface/hw/hw_ser.h b/2.5/boards/triface/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/2.5/boards/triface/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/2.5/boards/triface/hw/hw_sipo.h b/2.5/boards/triface/hw/hw_sipo.h new file mode 100644 index 00000000..9922c052 --- /dev/null +++ b/2.5/boards/triface/hw/hw_sipo.h @@ -0,0 +1,149 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +#include + +#include + +/** + * Mapping sipo connection on board. + * See schematics for more info. + */ +typedef enum SipoMap +{ + TRIFACE_DOUT = 0, + + SIPO_CNT +} SipoMap; + + + +//Set output pin for sipo +#define SCK_OUT (DDRB |= BV(PB1)) // Shift register clock input pin +#define SOUT_OUT (DDRB |= BV(PB2)) // Serial data input pin +#define SLOAD_OUT (DDRB |= BV(PB3)) // Storage register clock input pin +#define OE_OUT (DDRG |= BV(PG3)) // Output enable pin + +//Define output level +#define SCK_HIGH (PORTB |= BV(PB1)) +#define SCK_LOW (PORTB &= ~BV(PB1)) +#define SOUT_OUT_HIGH (PORTB |= BV(PB2)) +#define SOUT_OUT_LOW (PORTB &= ~BV(PB2)) +#define SLOAD_OUT_HIGH (PORTB |= BV(PB3)) +#define SLOAD_OUT_LOW (PORTB &= ~BV(PB3)) +#define OE_LOW (PORTG &= BV(PG3)) + +/** + * Define the macros needed to set the serial input bit of SIPO device + * low or high. + */ +#define SIPO_SI_HIGH() SOUT_OUT_HIGH +#define SIPO_SI_LOW() SOUT_OUT_LOW + +/** + * Drive pin to load the bit, presented in serial-in pin, + * into sipo shift register. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do{ \ + (void)clk_pol; \ + SCK_HIGH; \ + SCK_LOW; \ + }while(0) + +/** + * Clock the content of shift register to output. + */ +#define SIPO_LOAD(device, load_pol) \ + do { \ + (void)device; \ + (void)load_pol; \ + SLOAD_OUT_HIGH; \ + SLOAD_OUT_LOW; \ + }while(0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() OE_LOW; + +/** + * Set logic level for load signal + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) \ + do { \ + (void)device; \ + if(load_pol) \ + SLOAD_OUT_HIGH; \ + else \ + SLOAD_OUT_LOW; \ + } while (0) + + +/** + * Sel logic level for clock signal + */ +#define SIPO_SET_CLK_LEVEL(clock_pol) \ + do { \ + if(clock_pol) \ + SCK_HIGH; \ + else \ + SCK_LOW; \ + } while (0) + +#define SIPO_SET_SI_LEVEL() SIPO_SI_LOW() + +/** + * Do everything needed in order to init the SIPO pins. + */ +#define SIPO_INIT_PIN() \ + do { \ + OE_OUT; \ + SOUT_OUT; \ + SCK_OUT; \ + SLOAD_OUT; \ + SIPO_ENABLE(); \ + } while(0) + + +#endif /* HW_SIPO_H */ diff --git a/2.5/boards/triface/hw/hw_spi.h b/2.5/boards/triface/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/2.5/boards/triface/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/2.5/boards/triface/hw/hw_stepper.h b/2.5/boards/triface/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/2.5/boards/triface/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/2.5/boards/triface/hw/hw_tas5706a.h b/2.5/boards/triface/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/2.5/boards/triface/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/2.5/boards/triface/hw/hw_thermo.h b/2.5/boards/triface/hw/hw_thermo.h new file mode 100644 index 00000000..6f478068 --- /dev/null +++ b/2.5/boards/triface/hw/hw_thermo.h @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "hw/thermo_map.h" + +#include + +#include + + +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to read current temperature */ + return 0; +} + + +/** + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to turn off the thermo device */ +} + +/** + * Based on the current temperature \a cur_temp and the target temperature \a target, + * this function turns on and off specific thermo device. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + if (target - cur_temp > 0) + { + /* + * We are leveaving the target temperature, so + * turn on the thermo device! + */ + } + else + { + /* + * Ok, we are near the target temperature, so + * turn off the thermo device! + */ + } + +} + +#define THERMO_HW_INIT _thermo_hw_init() + +/** + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + /* Init your devices here! */ +} + +#endif /* HW_THERMO_H */ diff --git a/2.5/boards/triface/hw/hw_tlv5618.h b/2.5/boards/triface/hw/hw_tlv5618.h new file mode 100644 index 00000000..4a2b4202 --- /dev/null +++ b/2.5/boards/triface/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/2.5/boards/triface/hw/hw_tmp123.h b/2.5/boards/triface/hw/hw_tmp123.h new file mode 100644 index 00000000..adb18588 --- /dev/null +++ b/2.5/boards/triface/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/2.5/boards/triface/hw/kbd_map.h b/2.5/boards/triface/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/2.5/boards/triface/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/boards/triface/hw/mcp41_map.h b/2.5/boards/triface/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/2.5/boards/triface/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/2.5/boards/triface/hw/ntc_map.h b/2.5/boards/triface/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/2.5/boards/triface/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/2.5/boards/triface/hw/phase_map.h b/2.5/boards/triface/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/2.5/boards/triface/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/2.5/boards/triface/hw/pwm_map.h b/2.5/boards/triface/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/2.5/boards/triface/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/2.5/boards/triface/hw/thermo_map.h b/2.5/boards/triface/hw/thermo_map.h new file mode 100644 index 00000000..7dbe27bc --- /dev/null +++ b/2.5/boards/triface/hw/thermo_map.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/2.5/boards/triface/templates/.spec b/2.5/boards/triface/templates/.spec new file mode 100644 index 00000000..07fb8eed --- /dev/null +++ b/2.5/boards/triface/templates/.spec @@ -0,0 +1,3 @@ +name = "Templates" +ord = 0 +description = "Use these as a starting point for your BeRTOS project." diff --git a/2.5/boards/triface/templates/empty/.spec b/2.5/boards/triface/templates/empty/.spec new file mode 100644 index 00000000..f3edfbc2 --- /dev/null +++ b/2.5/boards/triface/templates/empty/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_adc.h b/2.5/boards/triface/templates/empty/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_afsk.h b/2.5/boards/triface/templates/empty/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_ax25.h b/2.5/boards/triface/templates/empty/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_battfs.h b/2.5/boards/triface/templates/empty/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_context_switch.h b/2.5/boards/triface/templates/empty/cfg/cfg_context_switch.h new file mode 100644 index 00000000..be15cf2f --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_dataflash.h b/2.5/boards/triface/templates/empty/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_dc_motor.h b/2.5/boards/triface/templates/empty/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_debug.h b/2.5/boards/triface/templates/empty/cfg/cfg_debug.h new file mode 100644 index 00000000..b0136259 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_fat.h b/2.5/boards/triface/templates/empty/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_flash25.h b/2.5/boards/triface/templates/empty/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_formatwr.h b/2.5/boards/triface/templates/empty/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_gfx.h b/2.5/boards/triface/templates/empty/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_hashtable.h b/2.5/boards/triface/templates/empty/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_heap.h b/2.5/boards/triface/templates/empty/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_i2c.h b/2.5/boards/triface/templates/empty/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_i2s.h b/2.5/boards/triface/templates/empty/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_ini_reader.h b/2.5/boards/triface/templates/empty/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_kbd.h b/2.5/boards/triface/templates/empty/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_keytag.h b/2.5/boards/triface/templates/empty/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_kfile.h b/2.5/boards/triface/templates/empty/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_lcd_32122a.h b/2.5/boards/triface/templates/empty/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_lcd_hd44.h b/2.5/boards/triface/templates/empty/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_lm75.h b/2.5/boards/triface/templates/empty/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_md2.h b/2.5/boards/triface/templates/empty/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_monitor.h b/2.5/boards/triface/templates/empty/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_nmea.h b/2.5/boards/triface/templates/empty/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_parser.h b/2.5/boards/triface/templates/empty/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_phase.h b/2.5/boards/triface/templates/empty/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_pocketbus.h b/2.5/boards/triface/templates/empty/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_proc.h b/2.5/boards/triface/templates/empty/cfg/cfg_proc.h new file mode 100644 index 00000000..52b4e414 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_pwm.h b/2.5/boards/triface/templates/empty/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_ramp.h b/2.5/boards/triface/templates/empty/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_randpool.h b/2.5/boards/triface/templates/empty/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_sem.h b/2.5/boards/triface/templates/empty/cfg/cfg_sem.h new file mode 100644 index 00000000..2a6de7a9 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_ser.h b/2.5/boards/triface/templates/empty/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_signal.h b/2.5/boards/triface/templates/empty/cfg/cfg_signal.h new file mode 100644 index 00000000..e78a4519 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_spi_bitbang.h b/2.5/boards/triface/templates/empty/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_stepper.h b/2.5/boards/triface/templates/empty/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_tas5706a.h b/2.5/boards/triface/templates/empty/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_thermo.h b/2.5/boards/triface/templates/empty/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_timer.h b/2.5/boards/triface/templates/empty/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_wdt.h b/2.5/boards/triface/templates/empty/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/triface/templates/empty/cfg/cfg_xmodem.h b/2.5/boards/triface/templates/empty/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/triface/templates/empty/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/triface/templates/empty/empty.mk b/2.5/boards/triface/templates/empty/empty.mk new file mode 100644 index 00000000..eff89d9f --- /dev/null +++ b/2.5/boards/triface/templates/empty/empty.mk @@ -0,0 +1,89 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the empty_user.mk file instead. +# + +# Constants automatically defined by the selected modules +empty_DEBUG = 1 + +# Our target application +TRG += empty + +empty_PREFIX = "avr-" + +empty_SUFFIX = "" + +empty_SRC_PATH = boards/triface/templates/empty + +empty_HW_PATH = boards/triface + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CSRC INSTEAD! +empty_WIZARD_CSRC = \ + bertos/kern/kfile.c \ + bertos/kern/signal.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/kern/sem.c \ + bertos/struct/heap.c \ + bertos/mware/formatwr.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_PCSRC INSTEAD! +empty_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CPPASRC INSTEAD! +empty_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_CXXSRC INSTEAD! +empty_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE empty_USER_ASRC INSTEAD! +empty_WIZARD_ASRC = \ + \ + # + +empty_CPPFLAGS = -D'CPU_FREQ=(14745600UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(empty_HW_PATH) -I$(empty_SRC_PATH) $(empty_CPU_CPPFLAGS) $(empty_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_LDFLAGS = $(empty_CPU_LDFLAGS) $(empty_WIZARD_LDFLAGS) $(empty_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPAFLAGS = $(empty_CPU_CPPAFLAGS) $(empty_WIZARD_CPPAFLAGS) $(empty_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CSRC = $(empty_CPU_CSRC) $(empty_WIZARD_CSRC) $(empty_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_PCSRC = $(empty_CPU_PCSRC) $(empty_WIZARD_PCSRC) $(empty_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CPPASRC = $(empty_CPU_CPPASRC) $(empty_WIZARD_CPPASRC) $(empty_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_CXXSRC = $(empty_CPU_CXXSRC) $(empty_WIZARD_CXXSRC) $(empty_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_ASRC = $(empty_CPU_ASRC) $(empty_WIZARD_ASRC) $(empty_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +empty_MCU = atmega1281 +empty_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +empty_PROGRAMMER_CPU = atmega1281 +empty_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +empty_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +empty_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +empty_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(empty_SRC_PATH)/empty_user.mk diff --git a/2.5/boards/triface/templates/empty/empty_user.mk b/2.5/boards/triface/templates/empty/empty_user.mk new file mode 100644 index 00000000..4c8ed7ef --- /dev/null +++ b/2.5/boards/triface/templates/empty/empty_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +empty_PROGRAMMER_TYPE = none +empty_PROGRAMMER_PORT = none + +# Files included by the user. +empty_USER_CSRC = \ + $(empty_SRC_PATH)/main.c \ + # + +# Files included by the user. +empty_USER_PCSRC = \ + # + +# Files included by the user. +empty_USER_CPPASRC = \ + # + +# Files included by the user. +empty_USER_CXXSRC = \ + # + +# Files included by the user. +empty_USER_ASRC = \ + # + +# Flags included by the user. +empty_USER_LDFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +empty_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/triface/templates/empty/main.c b/2.5/boards/triface/templates/empty/main.c new file mode 100644 index 00000000..1b6b79a6 --- /dev/null +++ b/2.5/boards/triface/templates/empty/main.c @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Empty project. + * + * This is a minimalist project, it just initializes the hardware of the + * supported board and proposes an empty main. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); +} + +int main(void) +{ + init(); + + /* Put your code here... */ + while (1) + { + } +} diff --git a/2.5/boards/triface/templates/empty/project.bertos b/2.5/boards/triface/templates/empty/project.bertos new file mode 100644 index 00000000..68eb2f28 --- /dev/null +++ b/2.5/boards/triface/templates/empty/project.bertos @@ -0,0 +1,77 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V14745600 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vempty +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Vavr +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V../configure --prefix=/usr/local/avr-4.3.2/ --target=avr --enable-languages=c,c++ --disable-nls --disable-libssp --with-dwarf2 +p15 +sS'version' +p16 +V4.3.2 +p17 +sS'build' +p18 +VGCC +p19 +sS'path' +p20 +V/opt/avr-4.3.2/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'formatwr' +p25 +aS'debug' +p26 +aS'kfile' +p27 +aS'heap' +p28 +aS'timer' +p29 +asS'CPU_NAME' +p30 +VATmega1281 +p31 +sS'PROJECT_HW_PATH' +p32 +S'../..' +p33 +sS'PROJECT_SRC_PATH' +p34 +S'.' +p35 +sS'PRESET' +p36 +I01 +sS'OUTPUT' +p37 +(lp38 +s. \ No newline at end of file diff --git a/2.5/boards/triface/templates/kernel/.spec b/2.5/boards/triface/templates/kernel/.spec new file mode 100644 index 00000000..04a79cff --- /dev/null +++ b/2.5/boards/triface/templates/kernel/.spec @@ -0,0 +1,9 @@ +name = 'kernel preset' +advanced = True +description=""" +

+This is a minimalist kernel project: it just initializes the hardware and +creates an independent process to blink an LED, while the main loop +continues to monitor the stack utilization of all the processes. +

+""" diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_adc.h b/2.5/boards/triface/templates/kernel/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_afsk.h b/2.5/boards/triface/templates/kernel/cfg/cfg_afsk.h new file mode 100644 index 00000000..cce47c1f --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_ax25.h b/2.5/boards/triface/templates/kernel/cfg/cfg_ax25.h new file mode 100644 index 00000000..64f862f1 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_ax25.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_battfs.h b/2.5/boards/triface/templates/kernel/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_context_switch.h b/2.5/boards/triface/templates/kernel/cfg/cfg_context_switch.h new file mode 100644 index 00000000..be15cf2f --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_dataflash.h b/2.5/boards/triface/templates/kernel/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_dc_motor.h b/2.5/boards/triface/templates/kernel/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..fd9bac73 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_debug.h b/2.5/boards/triface/templates/kernel/cfg/cfg_debug.h new file mode 100644 index 00000000..b0136259 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 1 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_fat.h b/2.5/boards/triface/templates/kernel/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_flash25.h b/2.5/boards/triface/templates/kernel/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_formatwr.h b/2.5/boards/triface/templates/kernel/cfg/cfg_formatwr.h new file mode 100644 index 00000000..bac8aca7 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_gfx.h b/2.5/boards/triface/templates/kernel/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_hashtable.h b/2.5/boards/triface/templates/kernel/cfg/cfg_hashtable.h new file mode 100644 index 00000000..e4645f33 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_heap.h b/2.5/boards/triface/templates/kernel/cfg/cfg_heap.h new file mode 100644 index 00000000..dc4b1fa3 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_heap.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_i2c.h b/2.5/boards/triface/templates/kernel/cfg/cfg_i2c.h new file mode 100644 index 00000000..7df0d097 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_i2c.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_i2s.h b/2.5/boards/triface/templates/kernel/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_ini_reader.h b/2.5/boards/triface/templates/kernel/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_kbd.h b/2.5/boards/triface/templates/kernel/cfg/cfg_kbd.h new file mode 100644 index 00000000..116f3318 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_keytag.h b/2.5/boards/triface/templates/kernel/cfg/cfg_keytag.h new file mode 100644 index 00000000..8bedadf6 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_kfile.h b/2.5/boards/triface/templates/kernel/cfg/cfg_kfile.h new file mode 100644 index 00000000..0ebed7b1 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_lcd_32122a.h b/2.5/boards/triface/templates/kernel/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_lcd_hd44.h b/2.5/boards/triface/templates/kernel/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_lm75.h b/2.5/boards/triface/templates/kernel/cfg/cfg_lm75.h new file mode 100644 index 00000000..91b347ad --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_md2.h b/2.5/boards/triface/templates/kernel/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_monitor.h b/2.5/boards/triface/templates/kernel/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_nmea.h b/2.5/boards/triface/templates/kernel/cfg/cfg_nmea.h new file mode 100644 index 00000000..9249a9af --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_parser.h b/2.5/boards/triface/templates/kernel/cfg/cfg_parser.h new file mode 100644 index 00000000..572b4a24 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_parser.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + + + +#endif /* CFG_PARSER_H */ + + + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_phase.h b/2.5/boards/triface/templates/kernel/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_pocketbus.h b/2.5/boards/triface/templates/kernel/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..aa0b090b --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_proc.h b/2.5/boards/triface/templates/kernel/cfg/cfg_proc.h new file mode 100644 index 00000000..7e64c498 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_pwm.h b/2.5/boards/triface/templates/kernel/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_ramp.h b/2.5/boards/triface/templates/kernel/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_randpool.h b/2.5/boards/triface/templates/kernel/cfg/cfg_randpool.h new file mode 100644 index 00000000..83285984 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_sem.h b/2.5/boards/triface/templates/kernel/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_ser.h b/2.5/boards/triface/templates/kernel/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_signal.h b/2.5/boards/triface/templates/kernel/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_spi_bitbang.h b/2.5/boards/triface/templates/kernel/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_stepper.h b/2.5/boards/triface/templates/kernel/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_tas5706a.h b/2.5/boards/triface/templates/kernel/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_thermo.h b/2.5/boards/triface/templates/kernel/cfg/cfg_thermo.h new file mode 100644 index 00000000..2734f899 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_timer.h b/2.5/boards/triface/templates/kernel/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_wdt.h b/2.5/boards/triface/templates/kernel/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/2.5/boards/triface/templates/kernel/cfg/cfg_xmodem.h b/2.5/boards/triface/templates/kernel/cfg/cfg_xmodem.h new file mode 100644 index 00000000..38db7359 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/2.5/boards/triface/templates/kernel/kernel.mk b/2.5/boards/triface/templates/kernel/kernel.mk new file mode 100644 index 00000000..8169e703 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/kernel.mk @@ -0,0 +1,90 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the kernel_user.mk file instead. +# + +# Constants automatically defined by the selected modules +kernel_DEBUG = 1 + +# Our target application +TRG += kernel + +kernel_PREFIX = "avr-" + +kernel_SUFFIX = "" + +kernel_SRC_PATH = boards/triface/templates/kernel + +kernel_HW_PATH = boards/triface + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CSRC INSTEAD! +kernel_WIZARD_CSRC = \ + bertos/kern/kfile.c \ + bertos/kern/signal.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/kern/sem.c \ + bertos/mware/formatwr.c \ + bertos/struct/heap.c \ + bertos/kern/monitor.c \ + bertos/drv/timer.c \ + bertos/mware/event.c \ + bertos/kern/proc.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/drv/ser.c \ + bertos/mware/hex.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_PCSRC INSTEAD! +kernel_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CPPASRC INSTEAD! +kernel_WIZARD_CPPASRC = \ + bertos/cpu/avr/hw/switch_ctx_avr.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_CXXSRC INSTEAD! +kernel_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel_USER_ASRC INSTEAD! +kernel_WIZARD_ASRC = \ + \ + # + +kernel_CPPFLAGS = -D'CPU_FREQ=(14745600UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(kernel_HW_PATH) -I$(kernel_SRC_PATH) $(kernel_CPU_CPPFLAGS) $(kernel_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_LDFLAGS = $(kernel_CPU_LDFLAGS) $(kernel_WIZARD_LDFLAGS) $(kernel_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPAFLAGS = $(kernel_CPU_CPPAFLAGS) $(kernel_WIZARD_CPPAFLAGS) $(kernel_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CSRC = $(kernel_CPU_CSRC) $(kernel_WIZARD_CSRC) $(kernel_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_PCSRC = $(kernel_CPU_PCSRC) $(kernel_WIZARD_PCSRC) $(kernel_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CPPASRC = $(kernel_CPU_CPPASRC) $(kernel_WIZARD_CPPASRC) $(kernel_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_CXXSRC = $(kernel_CPU_CXXSRC) $(kernel_WIZARD_CXXSRC) $(kernel_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_ASRC = $(kernel_CPU_ASRC) $(kernel_WIZARD_ASRC) $(kernel_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel_MCU = atmega1281 +kernel_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +kernel_PROGRAMMER_CPU = atmega1281 +kernel_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +kernel_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +kernel_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +kernel_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(kernel_SRC_PATH)/kernel_user.mk diff --git a/2.5/boards/triface/templates/kernel/kernel_user.mk b/2.5/boards/triface/templates/kernel/kernel_user.mk new file mode 100644 index 00000000..6dfb4d8c --- /dev/null +++ b/2.5/boards/triface/templates/kernel/kernel_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel_PROGRAMMER_TYPE = none +kernel_PROGRAMMER_PORT = none + +# Files included by the user. +kernel_USER_CSRC = \ + $(kernel_SRC_PATH)/main.c \ + # + +# Files included by the user. +kernel_USER_PCSRC = \ + # + +# Files included by the user. +kernel_USER_CPPASRC = \ + # + +# Files included by the user. +kernel_USER_CXXSRC = \ + # + +# Files included by the user. +kernel_USER_ASRC = \ + # + +# Flags included by the user. +kernel_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +kernel_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/boards/triface/templates/kernel/main.c b/2.5/boards/triface/templates/kernel/main.c new file mode 100644 index 00000000..ff8b2f12 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/main.c @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Kernel project. + * + * This is a minimalist kernel project: it just initializes the hardware and + * creates an independent process to blink an LED, while the main loop + * continues to monitor the stack utilization of all the processes. + */ + +#include "hw/hw_led.h" + +#include + +#include +#include + +#include +#include + +#include +#include + +static Serial out; + +static void init(void) +{ + /* Enable all the interrupts */ + IRQ_ENABLE; + + /* Initialize debugging module (allow kprintf(), etc.) */ + kdbg_init(); + /* Initialize system timer */ + timer_init(); + /* Initialize UART0 */ + ser_init(&out, SER_UART0); + /* Configure UART0 to work at 115.200 bps */ + ser_setbaudrate(&out, 115200); + /* Initialize LED driver */ + LED_INIT(); + + /* + * Kernel initialization: processes (allow to create and dispatch + * processes using proc_new()). + */ + proc_init(); +} + +static void NORETURN led_process(void) +{ + int i; + + /* Periodically blink the led (toggle each 100 ms) */ + for (i = 0; ; i = !i) + { + if (i) + LED_ON(); + else + LED_OFF(); + timer_delay(100); + } +} + +int main(void) +{ + /* Hardware initialization */ + init(); + + /* Create a new child process */ + proc_new(led_process, NULL, KERN_MINSTACKSIZE * 2, NULL); + + /* + * The main process is kept to periodically report the stack + * utilization of all the processes (1 probe per second). + */ + while (1) + { + monitor_report(); + timer_delay(1000); + } +} diff --git a/2.5/boards/triface/templates/kernel/project.bertos b/2.5/boards/triface/templates/kernel/project.bertos new file mode 100644 index 00000000..472b7cb0 --- /dev/null +++ b/2.5/boards/triface/templates/kernel/project.bertos @@ -0,0 +1,85 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'../../../..' +p2 +sS'SELECTED_FREQ' +p3 +V14745600 +p4 +sS'WIZARD_VERSION' +p5 +I3 +sS'PROJECT_NAME' +p6 +Vkernel +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'target' +p10 +Vavr +p11 +sS'thread' +p12 +Vsingle +p13 +sS'configured' +p14 +V../configure --prefix=/usr/local/avr-4.3.2/ --target=avr --enable-languages=c,c++ --disable-nls --disable-libssp --with-dwarf2 +p15 +sS'version' +p16 +V4.3.2 +p17 +sS'build' +p18 +VGCC +p19 +sS'path' +p20 +V/opt/avr-4.3.2/bin/avr-gcc +p21 +ssS'ENABLED_MODULES' +p22 +(lp23 +S'ser' +p24 +aS'kernel' +p25 +aS'monitor' +p26 +aS'formatwr' +p27 +aS'semaphores' +p28 +aS'kfile' +p29 +aS'heap' +p30 +aS'signal' +p31 +aS'timer' +p32 +aS'debug' +p33 +asS'CPU_NAME' +p34 +VATmega1281 +p35 +sS'PROJECT_HW_PATH' +p36 +S'../..' +p37 +sS'PROJECT_SRC_PATH' +p38 +S'.' +p39 +sS'PRESET' +p40 +I01 +sS'OUTPUT' +p41 +(lp42 +s. \ No newline at end of file diff --git a/2.5/doc/Mainpage.online b/2.5/doc/Mainpage.online new file mode 100644 index 00000000..07a36d88 --- /dev/null +++ b/2.5/doc/Mainpage.online @@ -0,0 +1,100 @@ +/*! + + + +\mainpage + +\section overview Overview + +BeRTOS is a real-time operating system designed for building applications +for embedded systems, like reference boards, test boards, or custom boards. + +It has a modular structure: its components can be used in very different +environments, from 8-bit processor to Linux and Win32 hosted application +(for debug purpose), using a wide range of compilers. + +\section history History and Motivation + +BeRTOS was born as a extremely modular, highly optimized and fine-tuned +operating system for embedded programming. +As a result, each module has its own scope and can be used alone or in +cooperation with other modules. +It's even possible to use most of the drivers without activating the kernel module. + +We have grown it following our guidelines: simplicity and beauty. +These guidelines made it possible to evolve it in a full-featured real +time operating system, with more modularity than many other embedded OSes, +without giving up reliability and performace. + +To achieve the highest possible reusability, most BeRTOS components are +designed for fine-grained modularity and minimal external dependencies. +Most non-essential features can be configured out for applications with small +memory footprint requirements. + +\section features Features + + - multitasking kernel with IPC, semaphores, priority levels; + - a comprehensive set of generic drivers for a wide range of devices, + which can be easily customized to the actual hardware: timer, serial, + adc, ntc, pwm, stepper motors, dc motors, lcd, keyboards, buzzer, eeprom; + - full graphic subsystem for simple displays, with font support, bitmaps, + clipping, text formatting, interactive menus; + - simple console with command parser; + - readline-like support for command history; + - entropy generator and random numbers generator optimized for embedded + systems; + - checksumming and hashing functions (CRC, MD2); + - full hash-table implementation with double-hashing collision resolution; + - XMODEM protocol implementation; + - RLE compression algorithm; + +\section structure Directory Structure + +The modules are sorted in subdirectories by their category: + + - app/ : demo applications; + - bertos/algo/ : algorithms; + - bertos/cfg/ : configuration stuff; + - bertos/drv/ : hardware drivers; + - bertos/dt/ : experimental object oriented gui toolkit; + - bertos/emul/ : Qt-based emulator framework for embedded applications; + - bertos/fonts/ : fonts; + - bertos/fs/ : file system related stuff; + - bertos/gfx/ : general purpose graphics routines; + - bertos/gui/ : widgets for simple displays; + - bertos/hw/ : hardware-specific declarations; + - bertos/icons/ : conversion tool from image TXT format to LCD bitmap; + - bertos/kern/ : multitasking kernel; + - bertos/mware/ : algorithms, other standalone code; + - bertos/struct/ : containers and other data structures; + - bertos/os/ : OS-abstraction layers for hosted environments; + - doc/ : documentation; + +The top-level directory contains a few support headers that are meant to be +usable by any C/C++ embedded or hosted application. + +\section license License + +BeRTOS is provided under the term of the GNU General Public License +(see LICENSE.GPL) with following exception: + +\verbatim + +As a special exception, you may use this file as part of a free software +library without restriction. Specifically, if other files instantiate +templates or use macros or inline functions from this file, or you compile +this file and link it with other files to produce an executable, this +file does not by itself cause the resulting executable to be covered by +the GNU General Public License. This exception does not however +invalidate any other reasons why the executable file might be covered by +the GNU General Public License. + +\endverbatim + +*/ diff --git a/2.5/doc/Mainpage.snapshot b/2.5/doc/Mainpage.snapshot new file mode 100644 index 00000000..5e50e27b --- /dev/null +++ b/2.5/doc/Mainpage.snapshot @@ -0,0 +1,103 @@ +/*! + + + +\mainpage + +This documentation is generated from BeRTOS SVN. As such, it may contain modules +and/or additional documentation not present in official releases. + +\section overview Overview + +BeRTOS is a real-time operating system designed for building applications +for embedded systems, like reference boards, test boards, or custom boards. + +It has a modular structure: its components can be used in very different +environments, from 8-bit processor to Linux and Win32 hosted application +(for debug purpose), using a wide range of compilers. + +\section history History and Motivation + +BeRTOS was born as a extremely modular, highly optimized and fine-tuned +operating system for embedded programming. +As a result, each module has its own scope and can be used alone or in +cooperation with other modules. +It's even possible to use most of the drivers without activating the kernel module. + +We have grown it following our guidelines: simplicity and beauty. +These guidelines made it possible to evolve it in a full-featured real +time operating system, with more modularity than many other embedded OSes, +without giving up reliability and performace. + +To achieve the highest possible reusability, most BeRTOS components are +designed for fine-grained modularity and minimal external dependencies. +Most non-essential features can be configured out for applications with small +memory footprint requirements. + +\section features Features + + - multitasking kernel with IPC, semaphores, priority levels; + - a comprehensive set of generic drivers for a wide range of devices, + which can be easily customized to the actual hardware: timer, serial, + adc, ntc, pwm, stepper motors, dc motors, lcd, keyboards, buzzer, eeprom; + - full graphic subsystem for simple displays, with font support, bitmaps, + clipping, text formatting, interactive menus; + - simple console with command parser; + - readline-like support for command history; + - entropy generator and random numbers generator optimized for embedded + systems; + - checksumming and hashing functions (CRC, MD2); + - full hash-table implementation with double-hashing collision resolution; + - XMODEM protocol implementation; + - RLE compression algorithm; + +\section structure Directory Structure + +The modules are sorted in subdirectories by their category: + + - app/ : demo applications; + - bertos/algo/ : algorithms; + - bertos/cfg/ : configuration stuff; + - bertos/drv/ : hardware drivers; + - bertos/dt/ : experimental object oriented gui toolkit; + - bertos/emul/ : Qt-based emulator framework for embedded applications; + - bertos/fonts/ : fonts; + - bertos/fs/ : file system related stuff; + - bertos/gfx/ : general purpose graphics routines; + - bertos/gui/ : widgets for simple displays; + - bertos/hw/ : hardware-specific declarations; + - bertos/icons/ : conversion tool from image TXT format to LCD bitmap; + - bertos/kern/ : multitasking kernel; + - bertos/mware/ : algorithms, other standalone code; + - bertos/struct/ : containers and other data structures; + - bertos/os/ : OS-abstraction layers for hosted environments; + - doc/ : documentation; + +The top-level directory contains a few support headers that are meant to be +usable by any C/C++ embedded or hosted application. + +\section license License + +BeRTOS is provided under the term of the GNU General Public License +(see LICENSE.GPL) with following exception: + +\verbatim + +As a special exception, you may use this file as part of a free software +library without restriction. Specifically, if other files instantiate +templates or use macros or inline functions from this file, or you compile +this file and link it with other files to produce an executable, this +file does not by itself cause the resulting executable to be covered by +the GNU General Public License. This exception does not however +invalidate any other reasons why the executable file might be covered by +the GNU General Public License. + +\endverbatim + +*/ diff --git a/2.5/doc/README.bertos b/2.5/doc/README.bertos new file mode 100644 index 00000000..65edccce --- /dev/null +++ b/2.5/doc/README.bertos @@ -0,0 +1,102 @@ +/*! + + + +\mainpage + +\section overview Overview + +BeRTOS is a real-time operating system designed for building applications +for embedded systems, like reference boards, test boards, or custom boards. + +It has a modular structure: its components can be used in very different +environments, from 8-bit processor to Linux and Win32 hosted application +(for debug purpose), using a wide range of compilers. + +\section history History and Motivation + +BeRTOS was born as a extremely modular, highly optimized and fine-tuned +operating system for embedded programming. +As a result, each module has its own scope and can be used alone or in +cooperation with other modules. +It's even possible to use most of the drivers without activating the kernel module. + +We have grown it following our guidelines: simplicity and beauty. +These guidelines made it possible to evolve it in a full-featured real +time operating system, with more modularity than many other embedded OSes, +without giving up reliability and performace. + +To achieve the highest possible reusability, most BeRTOS components are +designed for fine-grained modularity and minimal external dependencies. +Most non-essential features can be configured out for applications with small +memory footprint requirements. + +\section features Features + + - multitasking kernel with IPC, semaphores, priority levels; + - a comprehensive set of generic drivers for a wide range of devices, + which can be easily customized to the actual hardware: timer, serial, + adc, ntc, pwm, stepper motors, dc motors, lcd, keyboards, buzzer, eeprom; + - full graphic subsystem for simple displays, with font support, bitmaps, + clipping, text formatting, interactive menus; + - simple console with command parser; + - readline-like support for command history; + - entropy generator and random numbers generator optimized for embedded + systems; + - checksumming and hashing functions (CRC, MD2); + - full hash-table implementation with double-hashing collision resolution; + - XMODEM protocol implementation; + - RLE compression algorithm; + +\section structure Directory Structure + +The modules are sorted in subdirectories by their category: + + - app/ : demo applications; + - bertos/algo/ : algorithms; + - bertos/cfg/ : configuration stuff; + - bertos/drv/ : hardware drivers; + - bertos/dt/ : experimental object oriented gui toolkit; + - bertos/emul/ : Qt-based emulator framework for embedded applications; + - bertos/fonts/ : fonts; + - bertos/fs/ : file system related stuff; + - bertos/gfx/ : general purpose graphics routines; + - bertos/gui/ : widgets for simple displays; + - bertos/hw/ : hardware-specific declarations; + - bertos/icons/ : conversion tool from image TXT format to LCD bitmap; + - bertos/kern/ : multitasking kernel; + - bertos/mware/ : algorithms, other standalone code; + - bertos/struct/ : containers and other data structures; + - bertos/os/ : OS-abstraction layers for hosted environments; + - doc/ : documentation; + +The top-level directory contains a few support headers that are meant to be +usable by any C/C++ embedded or hosted application. + +See the \ref dev_status page for information about the various drivers. + +\section license License + +BeRTOS is provided under the term of the GNU General Public License +(see LICENSE.GPL) with following exception: + +\verbatim + +As a special exception, you may use this file as part of a free software +library without restriction. Specifically, if other files instantiate +templates or use macros or inline functions from this file, or you compile +this file and link it with other files to produce an executable, this +file does not by itself cause the resulting executable to be covered by +the GNU General Public License. This exception does not however +invalidate any other reasons why the executable file might be covered by +the GNU General Public License. + +\endverbatim + +*/ diff --git a/2.5/doc/STATUS b/2.5/doc/STATUS new file mode 100644 index 00000000..c437d00d --- /dev/null +++ b/2.5/doc/STATUS @@ -0,0 +1,321 @@ +/*! + + + + + + + + +\page dev_status BeRTOS Development Status + +If you are looking for the list of BeRTOS ports or a detailed overview of all modules completeness and stability this is the right place. + +BeRTOS is quite stable (it is used in production environments) but it is also a very large project, so all of its parts may not be at the same level. + +Table of contents: + + \li \ref kernel + \li \ref compilers + \li \ref core_drivers + \li \ref internal_peripherals + \li \ref independant_drivers + \li \ref emulator + \li \ref algorithms + \li \ref graphics + \li \ref networking + \li \ref fs + \li \ref data_structures + \li \ref mware + +\section kernel Kernel +BeRTOS features a cooperative kernel with synchronization primitives. + +Embedded systems are mostly I/O bound systems. In these systems the microprocessor/microcontroller spends the most part of its computing power doing... absolutely nothing :-) + +Since the system simply waits for external events to happen we decided to implement a strong and robust cooperative kernel with very low memory footprint and high modularity. This allows the kernel to be used on a variety of different CPUs, even the smaller ones. +Currently the kernel code is very stable. + + Kernel features : + \li \link preempt.c Cooperative and preemptive \endlink round-robin scheduling. + \li \link monitor.h Stack process monitor \endlink, useful to prevent stack overflows. + \li \link msg.h Inter-process messaging system \endlink (with very low overhead). + \li \link sem.h Binary semaphores \endlink. + \li \link signal.c Signals \endlink. + +We have plans to add, as soon as possible, a preemptive scheduler , browse kernel source code to see the latest additions. + +The kernel has a port layer (a single assembly function) that needs to be reimplemented each time a new CPU is added. +Here is a list of currently available CPU family ports: + + + + + + + + + + +
CPU Family Port status
ARM stable
Atmel AVR stable
Freescale DSP56800 unmantained
Intel i196 unmantained
PowerPC \ref emulator only
Intel/AMD x86 \ref emulator only
Intel/AMD x86-64 \ref emulator only
+ +\section compilers Compilers +BeRTOS is primarily intended to be used with open source tools such as GCC, although it supports other compilers too. It is possible to develop with BeRTOS on Linux, Windows and Mac. + +For every port we have indicated the current compiler used and were to find a suitable development suite: + + + + + + + + + + + +
CPU Family Compiler Linux/Mac Toolchain Windows Toolchain
ARM GCC Sourcery G++ toolchain (open source) BeRTOS ARM IDE (open source)
ARM IAR (unmantained) none http://www.iar.com (proprietary)
AVR GCC AVR Toolchain installer (open source) BeRTOS AVR IDE (open source)
DSP56800 CodeWarrior (unmantained) none CodeWarrior (proprietary)
i196 fillme fillme fillme
PowerPC GCC use your system GCC none
x86 GCC use your system GCC http://www.mingw.org/ (open source)
x86 MSVC (unmantained) none Visual Studio (proprietary)
x86-64 GCC use your system GCC none
+ + +\section core_drivers Core Drivers +BeRTOS is not only a kernel, it aims to supply full operating system services. +To achieve this we need at least some core drivers for every CPU port. + +These drivers are: system timer , debug system and serial comm driver . + +Here is the list of CPU whose internal core drivers are supported: + + + + + + + + + + + + + + + + + + + + + +
Family CPU Core driver status
ARM AT91SAM7S64 stable
ARM AT91SAM7S128 stable
ARM AT91SAM7S256 stable
ARM AT91SAM7S512 stable
ARM AT91SAM7X128 stable
ARM AT91SAM7X256 stable
ARM AT91SAM7X512 stable
AVR ATMega8 stable
AVR ATMega32 stable
AVR ATMega64 stable
AVR ATMega103 stable
AVR ATMega128 stable
AVR ATMega168 stable
AVR ATMega1281 stable
DSP56800 all unmantained
i196 all unmantained
PowerPC all see \ref emulator
x86 all see \ref emulator
x86-64 all see \ref emulator
+ +Adding CPU support for an already present CPU family is quite simple since hardware manufacturers share peripherals design between the same CPU cores. + +\section internal_peripherals MCU Internal peripheral drivers +Since BeRTOS aims to supply full operating system services, for every CPU port we try to implement as much drivers as possible. This section covers the current development status for MCU Internal peripheral drivers. + + \li MCU family: Atmel AVR + + + + + + + + + +
Driver Status
\link adc_avr.c ADC \endlink stable
\link flash_avr.c Internal Flash \endlink stable
UART stable
SPI stable
Timer stable
\link i2c_avr.c TWI \endlink stable
+ + To get up to date informations look at the AVR drivers source code. + + \li MCU family: Atmel AT91 ARM + + + + + + + + + + +
Driver Status
UART stable
SPI stable
Timers stable
TWI beta
ADC beta
PWM beta
\link i2s_at91.h I2S \endlink digital audio bus stable
+ + To get up to date informations look at the ARM drivers source code. + + \li MCU family: Freescale DSP56800 + + Only core drivers are supported. + + \li MCU family: Intel i196 + + Only core drivers are supported. + + \li MCU family: PowerPC + + See \ref emulator. + + \li MCU family: x86 + + See \ref emulator. + + \li MCU family: x86-64 + + See \ref emulator. + +\section independant_drivers Generic CPU independent drivers +BeRTOS supplies a full set of CPU independent generic hardware drivers. To achieve this all drivers are structured to have an hardware abstraction layer (HAL) that isolate CPU specific code and makes porting to new CPU easy. +Current driver list: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Driver Status
\link adc.h ADC API \endlink stable
\link buzzer.h Buzzer \endlink stable
\link dataflash.h Atmel Dataflash \endlink stable
\link eeprom.h I2C EEPROM \endlink stable
\link flash25.h AT25Fxxx Atmel flash memories \endlink beta
\link ft245rl.h FT245RL USB to parallel converter \endlink beta
\link kbd.h Keyboard \endlink stable
\link i2c.h I2C \endlink with bitbang support stable
Displaytech 32122A Graphic LCD stable
\link dc_motor.h DC Motor with PID \endlink stable
\link lcd_text.h Alphanumeric LCD \endlink stable
\link lm75.h LM75 temperature sensor \endlink stable
\link mcp41.h MPC41 digital potentiometer \endlink stable
\link mpxx6115a.h MPxx6115A pressure sensor \endlink stable
\link ntc.h NTC \endlink stable
\link phase.h TRIAC phase partialization \endlink stable
\link pwm.h PWM API \endlink beta
\link pcf8574.h PCF85974 I2C port expander \endlink beta
\link sd.h Secure Digital card API \endlink stable
\link ser.h Serial API \endlink stable
\link spi_bitbang.h Bitbanged SPI \endlink stable
\link tas5706a.h TAS5706A \endlink digital audio DSP stable
\link tc520.h TC520 ADC \endlink obsolete
\link thermo.h Thermostat \endlink stable
\link timer.h System timer API \endlink stable
\link tmp123.h TMP123 temperature sensor \endlink stable
\link stepper.h Stepper motor with ramps \endlink stable
Watchdog beta
+ +To get up to date informations look at the drivers source code. + +\section emulator Emulator +BeRTOS features can be emulated on a common PC, check DemoApp. + +The emulator uses Qt to display emulated I/O devices in a window. It supports task +scheduling and a number of other embedded peripherals. + + + + + + + + + + + + + + +
Emulator Status
timer stable
scheduler stable
keyboard stable
graphical LCD display stable
text LCD display unmaintained
buzzer unmaintained
serial port unmaintained
flash unmaintained
debug console stable
file read/write stable
+ +\section algorithms Algorithms +In embedded programming sometimes you have to cope with protocols, security systems and things like that. +BeRTOS comes in help with a set of optimized portable algorithms: + + + + + + + + + + +
Algorithm Status
\link crc.h CRC16 \endlink stable
\link md2.c MD2 \endlink beta
\link randpool.c Cryptographically secure Random Pool \endlink beta
\link rotating_hash.h Rotating hash checksum \endlink stable
\link tea.h TEA (Tiny Encryption Algorithm) \endlink stable
\link ramp.h Stepper motor ramp generator \endlink stable
\link pid_control.h PID Controller \endlink stable
\link rle.c RLE (Run lenght en/decondig) \endlink stable
+ +To get up to date informations look at the algorithms source code. + +\section graphics Graphic subsystem +BeRTOS also features a complete graphic subsystem, suitable for generating compact yet powerful GUI. +This system is composed of several modules ranging from simple graphic primitives to complex menu management functions. + + + + + + + + + + + +
Module Status
\link bitmap.c Bitmaps manipulation \endlink stable
\link line.c Lines drawing \endlink stable
\link line.c Rectangles drawing \endlink stable
\link win.h Simple windowing system \endlink stable
Proportional and fixed size fonts stable
\link text.h Text rendering \endlink stable
\link charts.h Simple Charts \endlink stable
\link menu.h Menus \endlink stable
+ +To get up to date informations look at the source code in the directories \b gfx, \b gui or \b fonts. + +\section networking Network protocols +Since BeRTOS can also be used in very tiny systems, some simple communication protocols has been developed. + +This is the current status: + + + + + + + + +
Protocol Status
\link pocketbus.c PocketBus \endlink stable
\link keytag.c Keytag (for 125KHz transponders) \endlink stable
\link xmodem.c XModem protocol \endlink stable
\link nmea.c NMEA GPS protocol parser \endlink stable
\link afsk.c AFSK1200 modem \endlink stable
\link ax25.h AX25 data link layer protocol \endlink beta
+ +For more information take a look at network directory. + + +\section fs File system +BeRTOS supports two file systems. The first one is the mainstream \link fat.h FAT \endlink filesystem, using the FatFs library. The module is highly configurable, for example it can be compiled in read-only mode for some space saving. + +The second is \link battfs.h BattFs\endlink, a file system specifically planned for embedded platforms. The goal is to have a filesystem suitable for little flash and eeprom memories (like dataflash), reliable, robust and capable of wear-levelling the memory pages to increase its life. +The code is in beta stage. Currently you can create files, append data to them but file deletion is still not supported. Wear-levelling is achieved by rotating a page every time it is written. Plans are to add even transactions (a whole write can be performed atomically). + +File system development takes place in the fs directory. + +\section data_structures Data Structures +BeRTOS supplies common data structures, implemented and optimized for low memory footprint and speed. + + + + + + + +
Module Status
\link fifobuf.h FIFO \endlink stable
\link hashtable.h Hash table \endlink stable
\link heap.h Embedded-optimized dynamic memory allocator \endlink stable
\link list.h Lists \endlink stable
+ +\section mware Middleware +This section covers all BeRTOS modules that provide general purpose utility functions. Most of them should be moved to \ref algorithms directory. + +In the meanwhile, here is the list: + + + + + + + + +
Module Status
\link cpu/byteorder.h Integers to/from host byte-order conversion \endlink stable
\link event.h Events \endlink stable
\link except.h C++ like exception handling in C \endlink stable
\link formatwr.c Embedded-optimized printf \endlink stable
\link readline.h Command shell with history \endlink stable
\link ini_reader.h Ini file reader \endlink stable
+ +As usual, check source code for detailed reference. +*/ diff --git a/2.5/doc/TracFooter.html b/2.5/doc/TracFooter.html new file mode 100644 index 00000000..139597f9 --- /dev/null +++ b/2.5/doc/TracFooter.html @@ -0,0 +1,2 @@ + + diff --git a/2.5/doc/TracHeader.html b/2.5/doc/TracHeader.html new file mode 100644 index 00000000..139597f9 --- /dev/null +++ b/2.5/doc/TracHeader.html @@ -0,0 +1,2 @@ + + diff --git a/2.5/doc/chm-builder.py b/2.5/doc/chm-builder.py new file mode 100644 index 00000000..e6900bd8 --- /dev/null +++ b/2.5/doc/chm-builder.py @@ -0,0 +1,40 @@ +""" +To be used on windows platform only to generate BeRTOS .chm documentation. +Requires doxygen.exe and hhc.exe to be in the system PATH. +""" +from __future__ import with_statement +import os, sys + +def move(old_path, new_path): + if os.path.exists(new_path): + os.unlink(new_path) + os.rename(old_path, new_path) + + +if sys.platform != 'win32': + print "This program can be run only on a Windows machine" + sys.exit(-1) + +if len(sys.argv) < 2: + print "Usage: " + sys.argv[0] + " [custom_doxyfile]" + sys.exit(-1) + +DOC_PATH = 'doc\\offline-reference\\html\\' +toc_modifier = r"doc\chm-toc-modifier.py" +toc_file = DOC_PATH + r"index.hhc" +bertos_toc = r"bertos-toc.hhc" + + +if os.system("doxygen " + sys.argv[1]): + print "doxygen error" +if os.system(toc_modifier + " " + toc_file + " " + bertos_toc): + print "toc-modifier error" +move(bertos_toc, toc_file) + +# compile CHM +os.system(r"hhc " + DOC_PATH + "index.hhp") + +chm_target = r"bertos\bertos-doc.chm" +move(DOC_PATH + r"bertos-doc.chm", chm_target) + + diff --git a/2.5/doc/chm-toc-modifier.py b/2.5/doc/chm-toc-modifier.py new file mode 100644 index 00000000..f6239c8c --- /dev/null +++ b/2.5/doc/chm-toc-modifier.py @@ -0,0 +1,44 @@ +from __future__ import with_statement +import sys, re + +if len(sys.argv) < 1: + print "Usage: " + sys.argv[0] + " [hhc index file] [output file]" + sys.exit(-1) + +outfile = "out.hhc" +if len(sys.argv) == 3: + outfile = sys.argv[2] + +data_structures = [] + +section_start = re.compile(r"
  • .*? value=\"((File List)|(Data Structures)|(Main Page)|(Directory Hierarchy))\".*$") + +data_section = False +file_section = False + +with open(sys.argv[1], "r") as f: + with open(outfile, "w+") as out: + for line in f: + if re.search(section_start, line): + if line.find("Data Structures") != -1: + data_section = True + file_section = False + elif line.find("File List") != -1: + data_section = False + file_section = True + else: + data_section = False + file_section = False + + if data_section: + data_structures.append(line) + elif file_section: + pass + elif re.search(r"^<\/UL>$", line): + for i in data_structures: + out.write(i) + out.write(line) + else: + out.write(line) + + diff --git a/2.5/doc/doxygen.css b/2.5/doc/doxygen.css new file mode 100644 index 00000000..c7db1a8a --- /dev/null +++ b/2.5/doc/doxygen.css @@ -0,0 +1,358 @@ +BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { + font-family: Geneva, Arial, Helvetica, sans-serif; +} +BODY,TD { + font-size: 90%; +} +H1 { + text-align: center; + font-size: 160%; +} +H2 { + font-size: 120%; +} +H3 { + font-size: 100%; +} +CAPTION { font-weight: bold } +DIV.qindex { + width: 100%; + background-color: #e8eef2; + border: 1px solid #84b0c7; + text-align: center; + margin: 2px; + padding: 2px; + line-height: 140%; +} +DIV.nav { + width: 100%; + background-color: #e8eef2; + border: 1px solid #84b0c7; + text-align: center; + margin: 2px; + padding: 2px; + line-height: 140%; +} +DIV.navtab { + background-color: #e8eef2; + border: 1px solid #84b0c7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} +TD.navtab { + font-size: 70%; +} +A.qindex { + text-decoration: none; + font-weight: bold; + color: #1A419D; +} +A.qindex:visited { + text-decoration: none; + font-weight: bold; + color: #1A419D +} +A.qindex:hover { + text-decoration: none; + background-color: #ddddff; +} +A.qindexHL { + text-decoration: none; + font-weight: bold; + background-color: #6666cc; + color: #ffffff; + border: 1px double #9295C2; +} +A.qindexHL:hover { + text-decoration: none; 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+ margin-top: 12px; + margin-bottom: 6px; + font-weight: bold; +} +DIV.groupText { margin-left: 16px; font-style: italic; font-size: 90% } +BODY { + background: white; + color: black; + margin-right: 20px; + margin-left: 20px; +} +TD.indexkey { + background-color: #e8eef2; + font-weight: bold; + padding-right : 10px; + padding-top : 2px; + padding-left : 10px; + padding-bottom : 2px; + margin-left : 0px; + margin-right : 0px; + margin-top : 2px; + margin-bottom : 2px; + border: 1px solid #CCCCCC; +} +TD.indexvalue { + background-color: #e8eef2; + font-style: italic; + padding-right : 10px; + padding-top : 2px; + padding-left : 10px; + padding-bottom : 2px; + margin-left : 0px; + margin-right : 0px; + margin-top : 2px; + margin-bottom : 2px; + border: 1px solid #CCCCCC; +} +TR.memlist { + background-color: #f0f0f0; +} +P.formulaDsp { text-align: center; } +IMG.formulaDsp { } +IMG.formulaInl { vertical-align: middle; } +SPAN.keyword { color: #008000 } +SPAN.keywordtype { color: #604020 } +SPAN.keywordflow { color: #e08000 } +SPAN.comment { color: #800000 } +SPAN.preprocessor { color: #806020 } +SPAN.stringliteral { color: #002080 } +SPAN.charliteral { color: #008080 } +.mdescLeft { + padding: 0px 8px 4px 8px; + font-size: 80%; + font-style: italic; + background-color: #FAFAFA; + border-top: 1px none #E0E0E0; + border-right: 1px none #E0E0E0; + border-bottom: 1px none #E0E0E0; + border-left: 1px none #E0E0E0; + margin: 0px; +} +.mdescRight { + padding: 0px 8px 4px 8px; + font-size: 80%; + font-style: italic; + background-color: #FAFAFA; + border-top: 1px none #E0E0E0; + border-right: 1px none #E0E0E0; + border-bottom: 1px none #E0E0E0; + border-left: 1px none #E0E0E0; + margin: 0px; +} +.memItemLeft { + padding: 1px 0px 0px 8px; + margin: 4px; + border-top-width: 1px; + border-right-width: 1px; + border-bottom-width: 1px; + border-left-width: 1px; + border-top-color: #E0E0E0; + border-right-color: #E0E0E0; + border-bottom-color: #E0E0E0; + border-left-color: #E0E0E0; + border-top-style: solid; + border-right-style: none; + border-bottom-style: none; + border-left-style: none; + background-color: #FAFAFA; + font-size: 80%; +} +.memItemRight { + padding: 1px 8px 0px 8px; + margin: 4px; + border-top-width: 1px; + border-right-width: 1px; + border-bottom-width: 1px; + border-left-width: 1px; + border-top-color: #E0E0E0; + border-right-color: #E0E0E0; + border-bottom-color: #E0E0E0; + border-left-color: #E0E0E0; + border-top-style: solid; + border-right-style: none; + border-bottom-style: none; + border-left-style: none; + background-color: #FAFAFA; + font-size: 80%; +} +.memTemplItemLeft { + padding: 1px 0px 0px 8px; + margin: 4px; + border-top-width: 1px; + border-right-width: 1px; + border-bottom-width: 1px; + border-left-width: 1px; + border-top-color: #E0E0E0; + border-right-color: #E0E0E0; + border-bottom-color: #E0E0E0; + border-left-color: #E0E0E0; + border-top-style: none; + border-right-style: none; + border-bottom-style: none; + border-left-style: none; + background-color: #FAFAFA; + font-size: 80%; +} +.memTemplItemRight { + padding: 1px 8px 0px 8px; + margin: 4px; + border-top-width: 1px; + border-right-width: 1px; + border-bottom-width: 1px; + border-left-width: 1px; + border-top-color: #E0E0E0; + border-right-color: #E0E0E0; + border-bottom-color: #E0E0E0; + border-left-color: #E0E0E0; + border-top-style: none; + border-right-style: none; + border-bottom-style: none; + border-left-style: none; + background-color: #FAFAFA; + font-size: 80%; +} +.memTemplParams { + padding: 1px 0px 0px 8px; + margin: 4px; + border-top-width: 1px; + border-right-width: 1px; + border-bottom-width: 1px; + border-left-width: 1px; + border-top-color: #E0E0E0; + border-right-color: #E0E0E0; + border-bottom-color: #E0E0E0; + border-left-color: #E0E0E0; + border-top-style: solid; + border-right-style: none; + border-bottom-style: none; + border-left-style: none; + color: #606060; + background-color: #FAFAFA; + font-size: 80%; +} +.search { color: #003399; + font-weight: bold; +} +FORM.search { + margin-bottom: 0px; + margin-top: 0px; +} +INPUT.search { font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +TD.tiny { font-size: 75%; +} +a { + color: #1A41A8; +} +a:visited { + color: #2A3798; +} +.dirtab { padding: 4px; + border-collapse: collapse; + border: 1px solid #84b0c7; +} +TH.dirtab { background: #e8eef2; + font-weight: bold; +} +HR { height: 1px; + border: none; + border-top: 1px solid black; +} + +/* Style for detailed member documentation */ +.memtemplate { + font-size: 80%; + color: #606060; + font-weight: normal; +} +.memnav { + background-color: #e8eef2; + border: 1px solid #84b0c7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} +.memitem { + padding: 4px; + background-color: #eef3f5; + border-width: 1px; + border-style: solid; + border-color: #dedeee; + -moz-border-radius: 8px 8px 8px 8px; +} +.memname { + white-space: nowrap; + font-weight: bold; +} +.memdoc{ + padding-left: 10px; +} +.memproto { + background-color: #d5e1e8; + width: 100%; + border-width: 1px; + border-style: solid; + border-color: #84b0c7; + font-weight: bold; + -moz-border-radius: 8px 8px 8px 8px; +} +.paramkey { + text-align: right; +} +.paramtype { + white-space: nowrap; +} +.paramname { + color: #602020; + font-style: italic; + white-space: nowrap; +} +/* End Styling for detailed member documentation */ + +/* for the tree view */ +.ftvtree { + font-family: sans-serif; + margin:0.5em; +} +.directory { font-size: 9pt; font-weight: bold; } +.directory h3 { margin: 0px; margin-top: 1em; font-size: 11pt; } +.directory > h3 { margin-top: 0; } +.directory p { margin: 0px; white-space: nowrap; } +.directory div { display: none; margin: 0px; } +.directory img { vertical-align: -30%; } diff --git a/2.5/doc/tag-filter.py b/2.5/doc/tag-filter.py new file mode 100644 index 00000000..059d0181 --- /dev/null +++ b/2.5/doc/tag-filter.py @@ -0,0 +1,19 @@ +#!/usr/bin/env python +from __future__ import with_statement +import re, sys + +def remove_expr(regex, line): + new_line = re.sub(regex, "", line) + sys.stdout.write(new_line) + +if __name__ == "__main__": + wiz = re.compile(r"\$WIZ\$.*$") + notest = re.compile(r'notest:.*$') + with file(sys.argv[1]) as f: + for line in f: + if re.search(wiz, line) != None: + remove_expr(wiz, line) + elif re.search(notest, line) != None: + remove_expr(notest, line) + else: + sys.stdout.write(line) diff --git a/2.5/examples/demo/cfg/cfg_gfx.h b/2.5/examples/demo/cfg/cfg_gfx.h new file mode 100644 index 00000000..59dde04c --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/2.5/examples/demo/cfg/cfg_kbd.h b/2.5/examples/demo/cfg/cfg_kbd.h new file mode 100644 index 00000000..82f41d02 --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps +#define CONFIG_KBD_BEEP 1 + +/// Enable long pression handler for keys +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek +#define CONFIG_KBD_SCHED 1 + +#endif /* CFG_KBD_H */ + diff --git a/2.5/examples/demo/cfg/cfg_menu.h b/2.5/examples/demo/cfg/cfg_menu.h new file mode 100644 index 00000000..bbfa1e76 --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/2.5/examples/demo/cfg/cfg_monitor.h b/2.5/examples/demo/cfg/cfg_monitor.h new file mode 100644 index 00000000..6391b407 --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/examples/demo/cfg/cfg_proc.h b/2.5/examples/demo/cfg/cfg_proc.h new file mode 100644 index 00000000..cddfcb04 --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_proc.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2097152L + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/examples/demo/cfg/cfg_sem.h b/2.5/examples/demo/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/2.5/examples/demo/cfg/cfg_signal.h b/2.5/examples/demo/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/examples/demo/cfg/cfg_timer.h b/2.5/examples/demo/cfg/cfg_timer.h new file mode 100644 index 00000000..1cff78b8 --- /dev/null +++ b/2.5/examples/demo/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/examples/demo/demo.c b/2.5/examples/demo/demo.c new file mode 100644 index 00000000..e77eab90 --- /dev/null +++ b/2.5/examples/demo/demo.c @@ -0,0 +1,317 @@ +/** + * \file + * + * + * \brief Multifunction system test for BeRTOS modules. + * + * \author Bernie Innocenti + */ + +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +/** Default LCD bitmap */ +static Bitmap lcd_bitmap; + +/** + * Refresh the GUI. + */ +void schedule(void) +{ + lcd_gfx_qt_blitBitmap(&lcd_bitmap); + emul_idle(); +} + +/** + * Draw a pentacle in the provided bitmap. + */ +static void magic(struct Bitmap *bitmap, coord_t x, coord_t y) +{ + static const coord_t coords[] = { 120, 34, 90, 90, 30, 90, 0, 34, 60, 0, 90, 90, 0, 34, 120, 34, 30, 90, 60, 0 }; + unsigned int i; + + gfx_moveTo(bitmap, coords[countof(coords)-2]/2 + x, coords[countof(coords)-1]/3 + y); + for (i = 0; i < countof(coords); i += 2) + gfx_lineTo(bitmap, coords[i]/2 + x, coords[i+1]/3 + y); +} + +static void hello_world(Bitmap *bm) +{ + extern const Font font_ncenB18; + const Font *old_font; + + old_font = bm->font; + + gfx_bitmapClear(bm); + + /* Set big font */ + gfx_setFont(bm, &font_ncenB18); + + text_xprintf(bm, 0, 0, STYLEF_BOLD | TEXT_FILL | TEXT_CENTER, + "Hello, world!"); + schedule(); + while (1) + if (kbd_peek()) + break; + + /* Restore old font */ + gfx_setFont(bm, old_font); +} + +/** + * Show the splash screen + */ +static void bouncing_logo(Bitmap *bm) +{ + const long SPEED_SCALE = 1000; + const long GRAVITY_ACCEL = 10; + const long BOUNCE_ELASTICITY = 2; + long h = (long)(-bertos_logo.height) * SPEED_SCALE; + long speed = 1000; + + /* Repeat until logo stands still on the bottom edge */ + while (!((speed == 0) && (h == 0))) + { + /* Move */ + h += speed; + + /* Gravity acceleration */ + speed += GRAVITY_ACCEL; + + if (h > 0 && speed > 0) + { + /* Bounce */ + speed = - (speed / BOUNCE_ELASTICITY); + + } + + /* Update graphics */ + gfx_bitmapClear(bm); + gfx_blitImage(bm, + (bm->width - bertos_logo.width) / 2, + h / SPEED_SCALE, + &bertos_logo); + schedule(); + timer_delay(10); + } +} + +void win_demo(Bitmap *bm) +{ + const coord_t small_left = 45, small_top = 30, small_width = 50, small_height = 30; + const coord_t large_left = -10, large_top = 10, large_width = 85, large_height = 41; + + Window root_win, small_win, large_win; + Bitmap small_bm, large_bm; + uint8_t small_raster[RAST_SIZE(small_width, small_height)]; + uint8_t large_raster[RAST_SIZE(large_width, large_height)]; + + win_create(&root_win, bm); + + gfx_bitmapInit(&large_bm, large_raster, large_width, large_height); + win_create(&large_win, &large_bm); + win_open(&large_win, &root_win); + win_move(&large_win, large_left, large_top); + + gfx_bitmapInit(&small_bm, small_raster, small_width, small_height); + win_create(&small_win, &small_bm); + win_open(&small_win, &root_win); + win_move(&small_win, small_left, small_top); + + + coord_t x = 0, y = LCD_WIDTH / 2; + coord_t xdir = +1, ydir = -1; + coord_t xdir_large = +1; + coord_t ydir_small = +1; + int raise_counter = 0; + int i; + + for(;;) + { + /* Background animation */ + bm = root_win.bitmap; + gfx_bitmapClear(bm); + // gfx_setClipRect(bm, 0, 0, bm->width, bm->height); + // gfx_rectDraw(bm, 10, 10, bm->width-10, bm->height-10); + // gfx_setClipRect(bm, 11, 11, bm->width-11, bm->height-11); + magic(bm, x, y); + x += xdir; + y += ydir; + if (x >= bm->width) xdir = -1; + if (x <= -50) xdir = +1; + if (y >= bm->height) ydir = -1; + if (y <= -50) ydir = +1; + + bm = large_win.bitmap; + gfx_bitmapClear(bm); + for (i = 0; i < bm->height / 2; i += 2) + gfx_rectDraw(bm, 0 + i, 0 + i, bm->width - i, bm->height - i); + + /* Small window animation */ + bm = small_win.bitmap; + gfx_bitmapClear(bm); + gfx_rectDraw(bm, 0, 0, bm->width, bm->height); + gfx_line(bm, 0, 0, bm->width, bm->height); + gfx_line(bm, bm->width, 0, 0, bm->height); + + /* Move windows around */ + win_move(&large_win, large_win.geom.xmin + xdir_large, large_top); + if (large_win.geom.xmin < -20) xdir_large = +1; + if (large_win.geom.xmin > RECT_WIDTH(&root_win.geom) - 5) xdir_large = -1; + + win_move(&small_win, small_left, small_win.geom.ymin + ydir_small); + if (small_win.geom.ymin < -20) ydir_small = +1; + if (small_win.geom.ymin > RECT_HEIGHT(&root_win.geom) - 5) ydir_small = -1; + + ++raise_counter; + if (raise_counter % 997 == 0) + win_raise(&small_win); + else if (raise_counter % 731 == 0) + win_raise(&large_win); + + win_compose(&root_win); + /* Also does LCD refresh, etc. */ + if (kbd_peek()) + break; + } +} + +void proc_demo(void) +{ + proc_testRun(); +} + +void timer_demo(void) +{ + timer_testRun(); + timer_testTearDown(); +} + + +/* SETTINGS SUBMENU */ + +static struct MenuItem settings_items[] = +{ + { (const_iptr_t)"System", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Language", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Networking", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Date & Time",0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Power Saving", MIF_TOGGLE, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)0, 0, NULL, (iptr_t)0 } +}; +static struct Menu settings_menu = { settings_items, "Settings Menu", MF_STICKY | MF_SAVESEL, &lcd_bitmap, 0, lcd_gfx_qt_blitBitmap }; + + +/* MX SUBMENU */ + +static struct MenuItem mx_items[] = +{ + { (const_iptr_t)"Mouse", MIF_CHECKIT | MIF_EXCLUDE_1 | MIF_EXCLUDE_2, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Keyboard", MIF_CHECKED | MIF_CHECKIT | MIF_EXCLUDE_0 | MIF_EXCLUDE_2, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Joystick", MIF_CHECKIT | MIF_EXCLUDE_0 | MIF_EXCLUDE_1, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Autosave", MIF_CHECKED | MIF_CHECKIT | MIF_TOGGLE, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)0, 0, NULL, (iptr_t)0 } +}; + +static struct Menu mx_menu = { mx_items, (const_iptr_t)0, MF_STICKY | MF_SAVESEL, &lcd_bitmap, 0, lcd_gfx_qt_blitBitmap }; + + +/* DISPLAY SUBMENU */ + +static struct MenuItem display_items[] = +{ + { (const_iptr_t)"Background", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Colors", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Style", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)"Icon Theme", 0, (MenuHook)0, (iptr_t)0 }, + { (const_iptr_t)0, 0, NULL, (iptr_t)0 } +}; +static struct Menu display_menu = { display_items, "Display Menu", MF_SAVESEL, &lcd_bitmap, 0, lcd_gfx_qt_blitBitmap }; + + +/* MAIN MENU */ + +static struct MenuItem main_items[] = +{ + { (const_iptr_t)"Win Fly", 0, (MenuHook)win_demo, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Bounce!", 0, (MenuHook)bouncing_logo,(iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Hello World", 0, (MenuHook)hello_world, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Scheduling", 0, (MenuHook)proc_demo, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Timer Test", 0, (MenuHook)timer_demo, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Menu MX", 0, (MenuHook)menu_handle, (iptr_t)&mx_menu }, + { (const_iptr_t)"Display", 0, (MenuHook)menu_handle, (iptr_t)&display_menu }, + { (const_iptr_t)"Settings", 0, (MenuHook)menu_handle, (iptr_t)&settings_menu }, + { (const_iptr_t)0, 0, NULL, (iptr_t)0 } +}; +static struct Menu main_menu = { main_items, "Main Menu", MF_STICKY, &lcd_bitmap, 0, lcd_gfx_qt_blitBitmap }; + +#if CONFIG_KERN_HEAP +#define monitor_stack NULL +#else +static PROC_DEFINE_STACK(monitor_stack, KERN_MINSTACKSIZE); +#endif + +int main(int argc, char *argv[]) +{ + emul_init(&argc, argv); + + timer_init(); + buz_init(); + kbd_init(); + lcd_gfx_qt_init(&lcd_bitmap); + proc_init(); + monitor_start(KERN_MINSTACKSIZE, monitor_stack); + + menu_handle(&main_menu); + + timer_cleanup(); + emul_cleanup(); + return 0; +} diff --git a/2.5/examples/demo/demo.mk b/2.5/examples/demo/demo.mk new file mode 100644 index 00000000..1e687b5b --- /dev/null +++ b/2.5/examples/demo/demo.mk @@ -0,0 +1,90 @@ +# +# Copyright 2003, 2004, 2005, 2006 Develer S.r.l. (http://www.develer.com/) +# Copyright 2008 Bernie Innocenti +# +# Makefile fragment for DevLib demo application. +# +# Version: $Id: demo.mk 18234 2007-10-08 13:39:48Z rasky $ +# Author: Bernie Innocenti +# + +include bertos/fonts/fonts.mk +include bertos/emul/emul.mk + +# Set to 1 for debug builds +demo_DEBUG = 1 + +# This is an hosted application +demo_HOSTED = 1 + +# Our target application +TRG += demo + +#We want to use g++ for C source too +demo_CC=g++ + +demo_CXXSRC = \ + bertos/emul/emul.cpp \ + bertos/emul/emulwin.cpp \ + bertos/emul/emulkbd.cpp \ + bertos/drv/lcd_gfx_qt.cpp + +demo_CSRC = \ + examples/demo/demo.c \ + bertos/os/hptime.c \ + bertos/gfx/bitmap.c \ + bertos/gfx/line.c \ + bertos/gfx/win.c \ + bertos/gfx/text.c \ + bertos/gfx/text_format.c \ + bertos/gui/menu.c \ + bertos/fonts/helvB10.c \ + bertos/fonts/luBS14.c \ + bertos/fonts/ncenB18.c \ + bertos/icons/logo.c \ + bertos/drv/kbd.c \ + bertos/drv/timer.c \ + bertos/drv/timer_test.c \ + bertos/drv/buzzer.c \ + bertos/drv/ser.c \ + bertos/emul/ser_posix.c \ + bertos/emul/kfile_posix.c \ + bertos/mware/formatwr.c \ + bertos/mware/hex.c \ + bertos/mware/event.c \ + bertos/mware/observer.c \ + bertos/mware/resource.c \ + bertos/mware/sprintf.c \ + bertos/struct/heap.c \ + bertos/kern/irq.c \ + bertos/kern/proc.c \ + bertos/kern/proc_test.c \ + bertos/kern/sem.c \ + bertos/kern/signal.c \ + bertos/kern/monitor.c \ + bertos/verstag.c + +demo_CPPASRC = \ + bertos/emul/switch_ctx_emul.S + +# FIXME: maybe this junk should go in emul/emul.mk? +$(OBJDIR)/demo/bertos/emul/emulwin.o: bertos/emul/emulwin_moc.cpp +$(OBJDIR)/demo/bertos/drv/lcd_gfx_qt.o: bertos/drv/lcd_gfx_qt_moc.cpp +$(OBJDIR)/demo/bertos/drv/timer.o: bertos/emul/timer_qt_moc.cpp +$(OBJDIR)/demo/bertos/emul/emulkbd.o: bertos/emul/emulkbd_moc.cpp + +#FIXME: isn't there a way to avoid repeating the pattern rule? +bertos/emul/timer_qt_moc.cpp: bertos/emul/timer_qt.c + $(QT_MOC) -o $@ $< + + +demo_CPPAFLAGS = +demo_CFLAGS = -O0 -g3 -ggdb -Iexamples/demo $(EMUL_CFLAGS) +demo_CXXFLAGS = -O0 -g3 -ggdb -Iexamples/demo $(EMUL_CFLAGS) +demo_LDFLAGS = $(EMUL_LDFLAGS) + +# Debug stuff +ifeq ($(demo_DEBUG),0) + demo_CFLAGS += -Os + demo_CXXFLAGS += -Os +endif diff --git a/2.5/examples/demo/hw/hw_kbd.h b/2.5/examples/demo/hw/hw_kbd.h new file mode 100644 index 00000000..12f7ddd1 --- /dev/null +++ b/2.5/examples/demo/hw/hw_kbd.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + // This is specific for the demo + return (keymask_t)emul_kbdReadCols(); +} + +#endif /* HW_KBD_H */ diff --git a/2.5/examples/demo/hw/kbd_map.h b/2.5/examples/demo/hw/kbd_map.h new file mode 100644 index 00000000..deb215ef --- /dev/null +++ b/2.5/examples/demo/hw/kbd_map.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(14) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(15) /**< Fake key event for timeouts. */ +/*@}*/ + + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/examples/demo/verstag.h b/2.5/examples/demo/verstag.h new file mode 100644 index 00000000..8fb51060 --- /dev/null +++ b/2.5/examples/demo/verstag.h @@ -0,0 +1,95 @@ +/** + * \file + * + * + * \version $Id$ + * + * \author Bernie Innocenti + * + * \brief Declare application version strings + */ + +#ifndef BERTOS_VERSTAG_H +#define BERTOS_VERSTAG_H + +#ifndef CFG_ARCH_CONFIG_H + #include "cfg/cfg_arch.h" +#endif + +#define APP_NAME "BeRTOS Demo" +#define APP_DESCRIPTION "BeRTOS Multidemo Application" +#define APP_AUTHOR "Develer" +#define APP_COPYRIGHT "Copyright 2006 Develer (http://www.develer.com/)" + +#define VERS_MAJOR 0 +#define VERS_MINOR 1 +#define VERS_REV 0 +#define VERS_LETTER "" + +/** + * If _SNAPSHOT is defined, \c VERS_TAG contains the build date + * date instead of a numeric version string. + */ +#define _SNAPSHOT + +#ifdef _DEBUG + #define VERS_DBG "D" +#else + #define VERS_DBG "" +#endif + +#define __STRINGIZE(x) #x +#define _STRINGIZE(x) __STRINGIZE(x) + +/** Build application version string (i.e.: "1.7.0") */ +#define MAKE_VERS(maj,min,rev) _STRINGIZE(maj) "." _STRINGIZE(min) "." _STRINGIZE(rev) VERS_LETTER VERS_DBG +#ifdef _SNAPSHOT + #define VERS_TAG "snapshot" " " __DATE__ " " __TIME__ " " VERS_LETTER " " VERS_DBG +#else + #define VERS_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV) +#endif + +/** Build application version string suitable for MS windows resource files (i.e.: "1, 7, 0, 1") */ +#define MAKE_RCVERS(maj,min,rev,bld) _STRINGIZE(maj) ", " _STRINGIZE(min) ", " _STRINGIZE(rev) ", " _STRINGIZE(bld) +#define RCVERSION_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV) + +/** The revision string (contains VERS_TAG) */ +extern const char vers_tag[]; + +/** Sequential build number (contains VERS_BUILD) */ +extern const int vers_build_nr; +//extern const char vers_build_str[]; + +/** Hostname of the machine used to build this binary (contains VERS_HOST) */ +extern const char vers_host[]; + +#endif /* BERTOS_VERSTAG_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_debug.h b/2.5/examples/lm3s8962/cfg/cfg_debug.h new file mode 100644 index 00000000..ef7c4a75 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_debug.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_gfx.h b/2.5/examples/lm3s8962/cfg/cfg_gfx.h new file mode 100644 index 00000000..8d8b6fa2 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_gfx.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/// Enable line clipping algorithm. +#define CONFIG_GFX_CLIPPING 1 + +/// Enable text rendering in bitmaps. +#define CONFIG_GFX_TEXT 1 + +/// Enable virtual coordinate system. +#define CONFIG_GFX_VCOORDS 1 + +/// Select bitmap pixel format. +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + + +#define CONFIG_CHART_TYPE_X uint8_t ///< Type for the chart dataset +#define CONFIG_CHART_TYPE_Y uint8_t ///< Type for the chart dataset + + +/// Enable button bar behind menus +#define CONFIG_MENU_MENUBAR 0 + +/// Level Edit Timeout +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/// Menu timeout +#define CONFIG_MENU_TIMEOUT 0 + +/// Enable smooth scrolling in menus +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_GFX_H */ + diff --git a/2.5/examples/lm3s8962/cfg/cfg_heap.h b/2.5/examples/lm3s8962/cfg/cfg_heap.h new file mode 100644 index 00000000..7d080012 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_heap.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/2.5/examples/lm3s8962/cfg/cfg_kfile.h b/2.5/examples/lm3s8962/cfg/cfg_kfile.h new file mode 100644 index 00000000..1b1989c9 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_kfile.h @@ -0,0 +1,62 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 1 + +#endif /* CFG_KFILE_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_lcd.h b/2.5/examples/lm3s8962/cfg/cfg_lcd.h new file mode 100644 index 00000000..d48fa5df --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_lcd.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 0 + +/** + * LCD setting for 32122A (AVR implementation). + * $WIZ$ type = "boolean" + * $WIZ$ supports = "avr and False" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * LCD setting for 32122A (AVR implementation). + * $WIZ$ type = "boolean" + * $WIZ$ supports = "avr and False" + */ +#define CONFIG_LCD_WAIT 0 + + +#endif /* CFG_LCD_H */ + diff --git a/2.5/examples/lm3s8962/cfg/cfg_monitor.h b/2.5/examples/lm3s8962/cfg/cfg_monitor.h new file mode 100644 index 00000000..d0e24da4 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_monitor.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 1 + +#endif /* CFG_MONITOR_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_proc.h b/2.5/examples/lm3s8962/cfg/cfg_proc.h new file mode 100644 index 00000000..eb5506b4 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_proc.h @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 1 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 16384L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_sem.h b/2.5/examples/lm3s8962/cfg/cfg_sem.h new file mode 100644 index 00000000..51811da4 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_sem.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_ser.h b/2.5/examples/lm3s8962/cfg/cfg_ser.h new file mode 100644 index 00000000..91a10e0b --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_signal.h b/2.5/examples/lm3s8962/cfg/cfg_signal.h new file mode 100644 index 00000000..ce5324ec --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_signal.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/2.5/examples/lm3s8962/cfg/cfg_timer.h b/2.5/examples/lm3s8962/cfg/cfg_timer.h new file mode 100644 index 00000000..ae1a60b9 --- /dev/null +++ b/2.5/examples/lm3s8962/cfg/cfg_timer.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/2.5/examples/lm3s8962/hw/hw_kbd.h b/2.5/examples/lm3s8962/hw/hw_kbd.h new file mode 100644 index 00000000..d47d8863 --- /dev/null +++ b/2.5/examples/lm3s8962/hw/hw_kbd.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1968 keypad: hardware-specific definitions + * + * \author Andrea Righi + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include /* BV() */ +#include /* GPIO_PORTG_BASE */ +#include /* lm3s_busyWait() */ +#include /* lm3s_gpioPinConfig() / lm3s_gpioPinRead() */ +#include "hw/kbd_map.h" + +#define K_RPT_MASK (K_UP | K_DOWN | K_LEFT | K_RIGHT) + +#define KBD_HW_INIT \ + do { \ + /* Enable the peripheral clock */ \ + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOE; \ + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOF; \ + lm3s_busyWait(512); \ + lm3s_gpioPinConfig(GPIO_PORTE_BASE, \ + BV(3) | BV(2) | BV(1) | BV(0), \ + GPIO_DIR_MODE_IN, \ + GPIO_STRENGTH_2MA, \ + GPIO_PIN_TYPE_STD_WPU); \ + lm3s_gpioPinConfig(GPIO_PORTF_BASE, \ + BV(1), \ + GPIO_DIR_MODE_IN, \ + GPIO_STRENGTH_2MA, \ + GPIO_PIN_TYPE_STD_WPU); \ + } while (0) + +/** + * Read the keyboard ports and return the mask of depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + return ~(lm3s_gpioPinRead(GPIO_PORTE_BASE, + BV(3) | BV(2) | BV(1) | BV(0)) | + lm3s_gpioPinRead(GPIO_PORTF_BASE, BV(1)) << 3); + +} + +#endif /* HW_KBD_H */ diff --git a/2.5/examples/lm3s8962/hw/hw_rit128x96.h b/2.5/examples/lm3s8962/hw/hw_rit128x96.h new file mode 100644 index 00000000..27306331 --- /dev/null +++ b/2.5/examples/lm3s8962/hw/hw_rit128x96.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN BV(6) + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN BV(7) +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() \ + lm3s_gpioPinWrite(GPIO_PORTA_BASE, GPIO_OLEDDC_PIN, 0) + +/* Enter data mode */ +#define LCD_SET_DATA() \ + lm3s_gpioPinWrite(GPIO_PORTA_BASE, GPIO_OLEDDC_PIN, GPIO_OLEDDC_PIN) + +/* Send data to the display */ +#define LCD_WRITE(x) \ + { \ + uint32_t _x; \ + while (!lm3s_ssiWriteFrameNonBlocking(SSI0_BASE, x)); \ + /* Dummy read to drain the FIFO */ \ + while (!lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &_x)); \ + } +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + uint32_t dummy; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= SYSCTL_RCGC1_SSI0; + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA; + lm3s_busyWait(512); + + /* Configure the SSI0CLK SSI0FS and SSI0TX pins for SSI operation. */ + lm3s_gpioPinConfig(GPIO_PORTA_BASE, BV(2) | BV(3) | BV(5), + GPIO_DIR_MODE_HW, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU); + /* + * Configure the GPIO port pin used as a D/C# signal (data/command + * control) for OLED device, and the port pin used to enable power to + * the OLED panel. + */ + lm3s_gpioPinConfig(GPIO_PORTA_BASE, GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN, + GPIO_DIR_MODE_OUT, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD); + lm3s_gpioPinWrite(GPIO_PORTA_BASE, GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN, + GPIO_OLEDDC_PIN | GPIO_OLEDEN_PIN); + + /* Configure the SSI0 port for master mode */ + lm3s_ssiOpen(SSI0_BASE, SSI_FRF_MOTO_MODE_2, + SSI_MODE_MASTER, CPU_FREQ / 2, 8); + + /* Drain the SSI RX FIFO */ + while (lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &dummy)); +} + +#endif /* HW_RIT128x96_H */ diff --git a/2.5/examples/lm3s8962/hw/kbd_map.h b/2.5/examples/lm3s8962/hw/kbd_map.h new file mode 100644 index 00000000..5493410c --- /dev/null +++ b/2.5/examples/lm3s8962/hw/kbd_map.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \author Andrea Righi + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_LEFT BV(2) +#define K_RIGHT BV(3) +#define K_OK BV(4) +#define K_CANCEL BV(8) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/2.5/examples/lm3s8962/lm3s8962.c b/2.5/examples/lm3s8962/lm3s8962.c new file mode 100644 index 00000000..d9f0c49d --- /dev/null +++ b/2.5/examples/lm3s8962/lm3s8962.c @@ -0,0 +1,366 @@ +/** + * \file + * + * + * \brief LM3S8962 Cortex-M3 testcase + * + * \author Andrea Righi + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cfg/compiler.h" +#include "cfg/cfg_gfx.h" + +#include "hw/hw_rit128x96.h" + +#define PROC_STACK_SIZE KERN_MINSTACKSIZE * 2 + +#if CONFIG_KERN_HEAP +#define hp_stack NULL +#define lp_stack NULL +#define ser_stack NULL +#define led_stack NULL +#else +static PROC_DEFINE_STACK(hp_stack, PROC_STACK_SIZE); +static PROC_DEFINE_STACK(lp_stack, PROC_STACK_SIZE); +static PROC_DEFINE_STACK(ser_stack, PROC_STACK_SIZE); +static PROC_DEFINE_STACK(led_stack, PROC_STACK_SIZE); +#endif + +extern Font font_gohu; +static uint8_t raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]; +static Bitmap lcd_bitmap; + +#define KEY_MASK (K_UP | K_DOWN | K_LEFT | K_RIGHT | K_OK) + +static Process *hp_proc, *lp_proc, *led_proc; +static hptime_t start, end; + +static Serial ser_port; + +static void led_init(void) +{ + /* Enable the GPIO port that is used for the on-board LED */ + SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOF; + /* + * Perform a dummy read to insert a few cycles delay before enabling + * the peripheral. + */ + (void)SYSCTL_RCGC2_R; + /* Enable the GPIO pin for the LED */ + GPIO_PORTF_DIR_R = 0x01; + GPIO_PORTF_DEN_R = 0x01; +} + +INLINE void led_on(void) +{ + GPIO_PORTF_DATA_R |= 0x01; +} + +INLINE void led_off(void) +{ + GPIO_PORTF_DATA_R &= ~0x01; +} + +static bool led_blinking; + +static void NORETURN led_process(void) +{ + int i; + + for (i = 0; ; i++) + { + if (!led_blinking) + { + led_off(); + sig_wait(SIG_USER0); + } + if (i & 1) + led_on(); + else + led_off(); + timer_delay(50); + } +} + +static void led_test(UNUSED_ARG(Bitmap *, bm)) +{ + led_blinking = !led_blinking; + sig_send(led_proc, SIG_USER0); +} + +static void bouncing_logo(Bitmap *bm) +{ + const long SPEED_SCALE = 1000; + const long GRAVITY_ACCEL = 100; + const long BOUNCE_ELASTICITY = 1; + long h = (long)(-bertos_logo.height) * SPEED_SCALE; + long speed = 0, i; + + for (i = 0; ; i++) + { + /* Move */ + h += speed; + + /* Gravity acceleration */ + speed += GRAVITY_ACCEL; + + if (h > 0 && speed > 0) + { + /* Bounce */ + speed = -(speed / BOUNCE_ELASTICITY); + + } + /* Update graphics */ + gfx_bitmapClear(bm); + gfx_blitImage(bm, + (LCD_WIDTH - bertos_logo.width) / 2, + (LCD_HEIGHT - bertos_logo.height) / 2 + h / SPEED_SCALE, + &bertos_logo); + text_xprintf(bm, 7, 0, TEXT_FILL | TEXT_CENTER, "Press SELECT to quit"); + rit128x96_blitBitmap(bm); + timer_delay(15); + if (kbd_peek() & KEY_MASK) + break; + } +} + +static void screen_saver(Bitmap *bm) +{ + int x1, y1, x2, y2; + int i; + + for (i = 0; ; i++) + { + x1 = i % LCD_WIDTH; + y1 = i % LCD_HEIGHT; + + x2 = LCD_WIDTH - i % LCD_WIDTH; + y2 = LCD_HEIGHT - i % LCD_HEIGHT; + + gfx_bitmapClear(bm); + gfx_rectDraw(bm, x1, y1, x2, y2); + rit128x96_blitBitmap(bm); + if (kbd_peek() & KEY_MASK) + break; + } +} + +INLINE hptime_t get_hp_ticks(void) +{ + return (TIMER_HW_CNT - timer_hw_hpread()) + + timer_clock_unlocked() * TIMER_HW_CNT; +} + +static void NORETURN hp_process(void) +{ + while (1) + { + sig_wait(SIG_USER0); + end = get_hp_ticks(); + timer_delay(100); + sig_send(lp_proc, SIG_USER0); + } +} + +static void NORETURN lp_process(void) +{ + while (1) + { + start = get_hp_ticks(); + sig_send(hp_proc, SIG_USER0); + sig_wait(SIG_USER0); + } +} + +static void res_process(void) +{ + const char spinner[] = {'/', '-', '\\', '|'}; + int i; + char c; + + for (i = 0; ; i++) + { + /* Show context switch (in clock cycles) */ + c = spinner[i % countof(spinner)]; + text_xprintf(&lcd_bitmap, 3, 0, TEXT_CENTER | TEXT_FILL, "%c Context switch %c", c, c); + text_xprintf(&lcd_bitmap, 5, 0, TEXT_FILL, " %lu clock cycles", end - start); + /* Show context switch (in usec) */ + text_xprintf(&lcd_bitmap, 6, 0, TEXT_FILL, + " %lu.%lu usec", + ((end - start) * 1000000) / CPU_FREQ, + ((end - start) * (100000000 / CPU_FREQ)) % 100); + rit128x96_blitBitmap(&lcd_bitmap); + timer_delay(5); + if (kbd_peek() & KEY_MASK) + break; + } +} + +static void context_switch_test(Bitmap *bm) +{ + gfx_bitmapClear(bm); + text_xprintf(bm, 0, 0, TEXT_FILL, + "CPU: Cortex-M3 %luMHz", CPU_FREQ / 1000000); + rit128x96_blitBitmap(bm); + text_xprintf(bm, 1, 0, TEXT_FILL, "Board: LM3S8962 EVB"); + rit128x96_blitBitmap(bm); + + res_process(); +} + +static void uptime(Bitmap *bm) +{ + extern const Font font_luBS14; + const Font *old_font; + + old_font = bm->font; + + /* Set big font */ + gfx_bitmapClear(bm); + gfx_setFont(bm, &font_luBS14); + text_xprintf(bm, 0, 0, TEXT_FILL | TEXT_CENTER, "Uptime"); + while (1) + { + ticks_t clock = ticks_to_ms(timer_clock_unlocked()); + + /* Display uptime (in ticks) */ + text_xprintf(&lcd_bitmap, 2, 0, TEXT_FILL | TEXT_CENTER, + "%lu", clock / 1000); + rit128x96_blitBitmap(bm); + timer_delay(5); + if (kbd_peek() & KEY_MASK) + break; + } + gfx_setFont(bm, old_font); +} + +static void NORETURN soft_reset(Bitmap * bm) +{ + extern const Font font_luBS14; + int i; + + /* Set big font */ + gfx_bitmapClear(bm); + gfx_setFont(bm, &font_luBS14); + for (i = 5; i; --i) + { + text_xprintf(bm, 2, 0, TEXT_FILL | TEXT_CENTER, "%d", i); + rit128x96_blitBitmap(bm); + timer_delay(1000); + } + text_xprintf(bm, 2, 0, TEXT_FILL | TEXT_CENTER, "REBOOT"); + rit128x96_blitBitmap(bm); + timer_delay(1000); + + /* Perform a software reset request */ + HWREG(NVIC_APINT) = NVIC_APINT_VECTKEY | NVIC_APINT_SYSRESETREQ; + UNREACHABLE(); +} + +static void NORETURN ser_process(void) +{ + char buf[32]; + int i; + + ser_init(&ser_port, SER_UART0); + ser_setbaudrate(&ser_port, 115200); + + /* BeRTOS terminal */ + for (i = 0; ; i++) + { + kfile_printf(&ser_port.fd, "\n\r[%03d] BeRTOS:~$ ", i); + kfile_gets_echo(&ser_port.fd, buf, sizeof(buf), true); + kfile_printf(&ser_port.fd, "%s", buf); + } +} + +static struct MenuItem main_items[] = +{ + { (const_iptr_t)"LED blinking", 0, (MenuHook)led_test, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Bouncing logo", 0, (MenuHook)bouncing_logo, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Screen saver demo", 0, (MenuHook)screen_saver, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Scheduling test", 0, (MenuHook)context_switch_test, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Show uptime", 0, (MenuHook)uptime, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)"Reboot", 0, (MenuHook)soft_reset, (iptr_t)&lcd_bitmap }, + { (const_iptr_t)0, 0, NULL, (iptr_t)0 } +}; +static struct Menu main_menu = { main_items, "BeRTOS", MF_STICKY | MF_SAVESEL, &lcd_bitmap, 0, rit128x96_blitBitmap }; + +int main(void) +{ + IRQ_ENABLE; + kdbg_init(); + + kputs("Init LED.."); + led_init(); + kputs("Done.\n"); + kputs("Init Timer.."); + timer_init(); + kputs("Done.\n"); + kputs("Init Process.."); + proc_init(); + kputs("Done.\n"); + + kputs("Init OLED display.."); + rit128x96_init(); + gfx_bitmapInit(&lcd_bitmap, raster, LCD_WIDTH, LCD_HEIGHT); + gfx_setFont(&lcd_bitmap, &font_gohu); + rit128x96_blitBitmap(&lcd_bitmap); + kputs("Done.\n"); + kputs("Init Keypad.."); + kbd_init(); + kputs("Done.\n"); + hp_proc = proc_new(hp_process, NULL, PROC_STACK_SIZE, hp_stack); + lp_proc = proc_new(lp_process, NULL, PROC_STACK_SIZE, lp_stack); + led_proc = proc_new(led_process, NULL, PROC_STACK_SIZE, led_stack); + /* Open a dummy echo terminal on UART0 */ + proc_new(ser_process, NULL, PROC_STACK_SIZE, ser_stack); + + proc_setPri(hp_proc, 2); + proc_setPri(lp_proc, 1); + while (1) + { + menu_handle(&main_menu); + cpu_relax(); + } +} diff --git a/2.5/examples/lm3s8962/lm3s8962.mk b/2.5/examples/lm3s8962/lm3s8962.mk new file mode 100644 index 00000000..c01fcf9c --- /dev/null +++ b/2.5/examples/lm3s8962/lm3s8962.mk @@ -0,0 +1,79 @@ +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Andrea Righi +# + +# Set to 1 for debug builds +lm3s8962_DEBUG = 0 + +include bertos/fonts/fonts.mk + +# Our target application +TRG += lm3s8962 + +lm3s8962_CSRC = \ + examples/lm3s8962/lm3s8962.c \ + bertos/gfx/bitmap.c \ + bertos/gfx/line.c \ + bertos/gfx/win.c \ + bertos/gfx/text.c \ + bertos/gfx/text_format.c \ + bertos/gui/menu.c \ + bertos/fonts/gohu.c \ + bertos/fonts/luBS14.c \ + bertos/icons/logo.c \ + bertos/mware/formatwr.c \ + bertos/mware/hex.c \ + bertos/mware/sprintf.c \ + bertos/mware/event.c \ + bertos/struct/heap.c \ + bertos/drv/timer.c \ + bertos/drv/ser.c \ + bertos/drv/kbd.c \ + bertos/drv/lcd_rit128x96.c \ + bertos/kern/kfile.c \ + bertos/kern/monitor.c \ + bertos/kern/proc_test.c \ + bertos/kern/proc.c \ + bertos/kern/signal.c \ + bertos/cpu/cortex-m3/drv/gpio_lm3s.c \ + bertos/cpu/cortex-m3/drv/clock_lm3s.c \ + bertos/cpu/cortex-m3/drv/ser_lm3s.c \ + bertos/cpu/cortex-m3/drv/kdebug_lm3s.c \ + bertos/cpu/cortex-m3/drv/ssi_lm3s.c \ + bertos/cpu/cortex-m3/drv/timer_cm3.c \ + bertos/cpu/cortex-m3/drv/irq_cm3.c \ + bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \ + bertos/cpu/cortex-m3/hw/init_cm3.c + +lm3s8962_CPPASRC = \ + bertos/cpu/cortex-m3/hw/vectors_cm3.S \ + bertos/cpu/cortex-m3/hw/crt_cm3.S \ + # + +# This is an hosted application +lm3s8962_PREFIX = arm-none-eabi- + +lm3s8962_CPPAFLAGS = -mthumb -mno-thumb-interwork +lm3s8962_CPPFLAGS = -D'ARCH=0' -D__ARM_LM3S8962__ -D'CPU_FREQ=(50000000L)' -D'WIZ_AUTOGEN' -mthumb -mno-thumb-interwork -Iexamples/lm3s8962 -Ibertos/cpu/cortex-m3 -fno-strict-aliasing -fwrapv +lm3s8962_LDFLAGS = -nostartfiles -T bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld -Wl,--no-warn-mismatch -mthumb -mno-thumb-interwork + +lm3s8962_CPU = cortex-m3 + +lm3s8962_PROGRAMMER_CPU = lm3s +lm3s8962_PROGRAMMER_TYPE = luminary +lm3s8962_FLASH_SCRIPT = bertos/prg_scripts/arm/flash-lm3s.sh +lm3s8962_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +lm3s8962_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +lm3s8962_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh + +ifeq ($(lm3s8962_DEBUG),0) + # Production options + lm3s8962_CFLAGS += -O2 -fomit-frame-pointer + lm3s8962_CXXFLAGS += -O2 -fomit-frame-pointer +else + # Debug options + lm3s8962_CPPAFLAGS += -g -gdwarf-2 + lm3s8962_CPPFLAGS += -O0 -g3 -gdwarf-2 -fverbose-asm +endif diff --git a/2.5/examples/randpool/randpool_demo.c b/2.5/examples/randpool/randpool_demo.c new file mode 100644 index 00000000..3010cd10 --- /dev/null +++ b/2.5/examples/randpool/randpool_demo.c @@ -0,0 +1,251 @@ +/** + * \file + * + * + * \brief Test function for randpool API. + * + * This program return a rand number generate from randpool function. + * For use randpool function you need a souce of entropy. In this + * program you can choose from: + * - /dev/random + * - /dev/urandom + * - /dev/input/mouse0 + * + * There are 3 mode of output: + * - binmode: program generate a sequenze of random byte. + * - Matrix of random number for octave program. + * - Vector of random number for octave program. + * + * \version $Id$ + * \author Daniele Basile + */ + +/*#* + *#* $Log$ + *#* Revision 1.1 2007/02/15 18:17:51 asterix + *#* Add randpool test program. + *#* + *#*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define LEN 256 //Size of buffer containing a random number. +#define SAMPLE 1000 //Defoult number of byte that put in entropy pool. + +int main (int argc, char *argv[]) +{ + EntropyPool pool; + uint8_t ch; + uint8_t buff[LEN]; + FILE *pdev; + int opt = getopt (argc, argv, "murh"); + int samp = SAMPLE; + int round = 10; + int mode = 0; + int pass = 0; + + timer_init(); + + randpool_init(&pool, NULL, 0); //Init a entropy pool. + + /* + * Chose a source of entropy. + */ + switch(opt) + { + case 'm': + { + pdev = fopen("/dev/input/mouse0", "r"); + break; + } + case 'u': + { + pdev = fopen("/dev/urandom", "r"); + break; + } + case 'r': + { + pdev = fopen("/dev/random", "r"); + break; + } + case 'h': + { + } + default: + { + printf("\n"); + printf("\n"); + printf("randpool_demo [OPTION] [SAMPLE] [ROUND] [MODE]\n"); + printf("\n"); + printf("OPTION:\n"); + printf(" -r /dev/random\n"); + printf(" -u /dev/urandom\n"); + printf(" -m /dev/input/mouse0\n"); + printf("\n"); + printf("SAMPLE:\n"); + printf(" num number of entropy byte to put in etropy pool.\n"); + printf("\n"); + printf("ROUND:\n"); + printf(" num number call of randpool_get function.\n"); + printf("\n"); + printf("MODE:\n"); + printf(" 0 binmode\n"); + printf(" 1 vector mode\n"); + printf(" 2 matrix mode\n"); + printf("\n"); + printf("Test program of randpool API.\n"); + printf("This program create an entropy pool of 256byte, and fill it\n"); + printf("with entropy from a exsternal source. This source can be:\n"); + printf(" - /dev/random (option: -r)\n"); + printf(" - /dev/urandom (option: -u)\n"); + printf(" - /dev/input/mouse0 (option: -m)\n"); + printf("\n"); + printf("Once the pool is full, program call a randpool_get ROUND time,\n"); + printf("printing on STDOUT random value, in accord with a select mode.\n"); + printf("The mode are:\n"); + printf(" - binmode: program print on STDOUT random byte. (option: 0 (defaul mode)\n"); + printf(" - vector mode: program print on STDOUT a ROUND vector of random value.\n"); + printf(" The output is format for octave program. (option: 1)\n"); + printf(" - matrix mode: program print on STDOUT a matrix of random value.\n"); + printf(" The output is format for octave program. (option: 2)\n"); + printf("\n"); + exit(1); + } + + } + + /* + * + */ + if(argc > 2) + { + if(argv[2]) + samp = atoi(argv[2]); //Number of byte take from entropy source + if(argv[3]) + round = atoi(argv[3]); //Number of time we call randpool_get. + if(argv[4]) + { + switch(atoi(argv[4])) + { + case 1: + { + mode = 1; + printf("# Created by Asterix.\n"); + printf("# name: __nargin__\n"); + printf("# type: scalar\n"); + printf("0\n"); + break; + } + case 2: + { + mode = 2; + printf("# Created by Asterix.\n"); + printf("# name: __nargin__\n"); + printf("# type: scalar\n"); + printf("0\n"); + break; + } + default: + { + break; + } + + } + + } + + } + + /* + * Add byte to entropy pool from a source of entropy. + */ + for(int i = 0; i < samp; i++) + { + + ch = fgetc(pdev); + randpool_add(&pool, &ch, sizeof(ch)); + + } + + fclose(pdev); + + + for(int k = 0; k < round; k++) + { + switch(mode) + { + case 1: + { + printf("\n"); + printf("\n# name: vet%d",k); + printf("\n# type: matrix"); + printf("\n# rows: 1"); + printf("\n# columns: %d\n", LEN); + pass = 1; + break; + } + case 2: + { + printf("\n"); + printf("\n# name: randMatrix"); + printf("\n# type: matrix"); + printf("\n# rows: %d",round); + printf("\n# columns: %d\n", LEN); + pass = 1; + mode = 0; + break; + } + } + + randpool_get(&pool, buff, LEN); + + if(pass) + { + for(int j = 0; j < LEN; j++) + { + printf("%d ", buff[j]); + } + printf("\n"); + } + else + fwrite(buff, sizeof(uint8_t), LEN, stdout); + } + + +} + diff --git a/2.5/examples/randpool/randpool_demo.mk b/2.5/examples/randpool/randpool_demo.mk new file mode 100644 index 00000000..4c0d738d --- /dev/null +++ b/2.5/examples/randpool/randpool_demo.mk @@ -0,0 +1,39 @@ +# +# $Id$ +# Copyright 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile fragment for DevLib randpool_demo application. +# +# Author: Daniele Basile +# +# $Log$ +# Revision 1.1 2007/02/15 18:17:51 asterix +# Add randpool test program. +# +# + + +# Set to 1 for debug builds +randpool_demo_DEBUG = 0 + +randpool_demo_HOSTED = 1 + +# Our target application +TRG += randpool_demo + +randpool_demo_CSRC = \ + examples/randpool/randpool_demo.c \ + algos/randpool.c \ + algos/md2.c \ + drv/timer.c \ + os/hptime.c + +randpool_demo_CFLAGS = -O0 -D'ARCH=0' -Iexamples/randpool/ -Iexamples/randpool/hw + +# Debug stuff +ifeq ($(randpool_demo_DEBUG),1) + randpool_demo_CFLAGS += -D_DEBUG + randpool_demo_PCSRC += drv/kdebug.c +endif + diff --git a/2.5/examples/test/armtest.mk b/2.5/examples/test/armtest.mk new file mode 100644 index 00000000..d338aa55 --- /dev/null +++ b/2.5/examples/test/armtest.mk @@ -0,0 +1,32 @@ +# +# $Id: armtest.mk 18234 2007-10-08 13:39:48Z rasky $ +# Copyright 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile fragment for DevLib armtest application. +# +# Author: Bernie Innocenti +# +# + +# Set to 1 for debug builds +armtest_DEBUG = 1 + +# Our target application +TRG += armtest + +#include arm c and asm sources +include ./examples/test/arm_src.mk + +armtest_CSRC = $(arm_CSRC) examples/test/empty_main.c + +armtest_CPPASRC = $(arm_ASRC) + +armtest_PREFIX = arm-none-eabi- + +armtest_CPPAFLAGS = -O0 -g -gdwarf-2 -g +armtest_CPPFLAGS = -O0 -D'ARCH=ARCH_NIGHTTEST' -D__ARM_AT91SAM7S256__ -D'CPU_FREQ=(48023000UL)' -D'WIZ_AUTOGEN' -g3 -gdwarf-2 -fverbose-asm -Iexamples/test -Ibertos/cpu/arm +armtest_LDFLAGS = -nostartfiles -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld -Wl,--no-warn-mismatch + +armtest_CPU = arm7tdmi + diff --git a/2.5/examples/test/avrtest.mk b/2.5/examples/test/avrtest.mk new file mode 100644 index 00000000..d1f93e60 --- /dev/null +++ b/2.5/examples/test/avrtest.mk @@ -0,0 +1,32 @@ +# +# $Id: avrtest.mk,v 1.3 2006/06/12 21:37:02 marco Exp $ +# Copyright 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile fragment for DevLib avrtest application. +# +# Author: Bernie Innocenti +# + + + +# Set to 1 for debug builds +avrtest_DEBUG = 1 + +# Our target application +TRG += avrtest + +avrtest_MCU = atmega64 + +#include avr c and asm sources +include examples/test/avr_src.mk + +avrtest_CSRC = $(avr_CSRC) examples/test/empty_main.c + +avrtest_CPPASRC = $(avr_ASRC) + +avrtest_PCSRC += bertos/mware/formatwr.c + +avrtest_PREFIX = avr- +avrtest_CPPFLAGS = -D'ARCH=ARCH_NIGHTTEST' -D'CPU_FREQ=(12288000UL)' -D'WIZ_AUTOGEN' -Iexamples/test -Ibertos/cpu/avr +avrtest_CFLAGS = -Os -mcall-prologues -fno-strict-aliasing diff --git a/2.5/examples/test/empty_main.c b/2.5/examples/test/empty_main.c new file mode 100644 index 00000000..66a8e4ad --- /dev/null +++ b/2.5/examples/test/empty_main.c @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +int main(void) +{ + for(;;) + { + } + + return 0; +} diff --git a/2.5/spec/at91sam7s-ek/at91sam7s-ek.bdef b/2.5/spec/at91sam7s-ek/at91sam7s-ek.bdef new file mode 100644 index 00000000..7ce27080 --- /dev/null +++ b/2.5/spec/at91sam7s-ek/at91sam7s-ek.bdef @@ -0,0 +1,48 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Settings and definitions for the AT91SAM7S-EK board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# List of the BeRTOS's supported cpu. +BOARD_CPU_CORE = "at91sam7s256" + +# On this board the following drivers are supported. +BOARD_DRV = [ "adc", "kdebug", "pwm", "ser", "timer", "twi" ] + diff --git a/2.5/test/afsk_test.au b/2.5/test/afsk_test.au new file mode 100644 index 0000000000000000000000000000000000000000..7b12ce8d9841b4a0bd0c82a41627e3e429242bea GIT binary patch literal 167000 zcma&O1$>p)vObJE6e!Z-!QG2XuoxafLI@C7;;!@iChl&;Lx|(S10hIox8e@PDU{;! zJ@f9s={@(J`@cD-%-+l1wZ>=GynCpdqeY!Mb$+Q+FIpY2UY$C9{y)IF_3PEIU%y_x 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configuration options. +# This is useful in nightly test to test all possible configurations. + +# A whitelist of options that should not be enabled is supplied. + +import sys +import re + +# Options that should be left disabled +whitelist = [ + 'CONFIG_BATTFS_SHUFFLE_FREE_PAGES', + 'CONFIG_FAT_FS_READONLY', + 'CONFIG_INTERNAL_COMMANDS', + 'CONFIG_KERN_IRQ', + 'CONFIG_KERN_HEAP', + 'CONFIG_KERN_PREEMPT', + 'RAMP_USE_FLOATING_POINT', + 'CONFIG_SER_HWHANDSHAKE', + 'CONFIG_KDEBUG_PORT', +] + +tests = [ + '#define T_0 0\n', + '#define T_1 0\n', + ' #define T_2 0 \n', + '#define T_3 0 /* */\n', + '#define T_4 0/* */\n', +] +no_tests = [ + '#define T_1 0A\n', + '#define T_1 0x0A/* */\n', + '#define T_1 0UL /* */\n', + '#define T_1 0UL/* */\n', +] +pattern = r'\s*#define\s+(\w+)\s+(0)(?:\s+|/|$)' + +def f(match): + if match.group(1) in whitelist: + return match.group(0) + else: + data = match.group(0) + sx = match.start(2) - match.start(0) + ex = match.end(2) - match.end(0) + return data[:sx] + '1' + data[ex:] + +if len(sys.argv) == 1: + for t in tests: + print t, re.subn(pattern, f, t)[0] + print '-' * 42 + for t in no_tests: + print t, re.subn(pattern, f, t)[0] +else: + data = file(sys.argv[1]).read() + data, count = re.subn(pattern, f, data) + if count: + file(sys.argv[1], 'w').write(data) diff --git a/2.5/test/gen_mk_src.sh b/2.5/test/gen_mk_src.sh new file mode 100755 index 00000000..820e3917 --- /dev/null +++ b/2.5/test/gen_mk_src.sh @@ -0,0 +1,60 @@ +#!/bin/bash +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# Nighlty test for BeRTOS. +# +# Author Daniele Basile + +#Bertos dir, write with escape char for sed regrepx +BERTOS_DIR_RE="\\.\\/bertos" + +#Test script dir, where are test script +TEST_SCRIPT_DIR="test" + +#Test directory, where are the test makefile +TEST_APP_DIR="examples/test/" + +if [ $# \< 1 ] ; then + printf "You must specify a cpu target!\n\n" + printf "EXAMPLE:\n $0 \n\n" + + exit 1 +fi + +#Get list of source for selected cpu target +CSRC=`${TEST_SCRIPT_DIR}/get_source_list.sh $1 c` +ASRC=`${TEST_SCRIPT_DIR}/get_source_list.sh $1 S` +#ASRC= + +#kdebug must added to skip list because it is compiled two times and the linker fail. +CSRC=`echo $CSRC | sed -e "s/${BERTOS_DIR_RE}\\/drv\\/kdebug\\.c//g"` + +printf "#This makefile was generate automatically.\n\n" > ${TEST_APP_DIR}/$1_src.mk +printf "${1}_CSRC = $CSRC\n\n" >> ${TEST_APP_DIR}/$1_src.mk +printf "${1}_ASRC = $ASRC\n\n" >> ${TEST_APP_DIR}/$1_src.mk + diff --git a/2.5/test/get_source_list.sh b/2.5/test/get_source_list.sh new file mode 100755 index 00000000..41f99ca6 --- /dev/null +++ b/2.5/test/get_source_list.sh @@ -0,0 +1,95 @@ +#!/bin/bash +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# Nighlty test for BeRTOS. +# +# Author Daniele Basile + +#Directories +BERTOS_DIR="./bertos" +COPY_DIR="./bertos.saved" +CPU_DIR="${BERTOS_DIR}/cpu" + +#Directory to exclude +OS_DIR="${BERTOS_DIR}/os" +EMUL_DIR="${BERTOS_DIR}/emul" +WIZARD_DIR="./wizard" +APP_DIR="./examples ./boards" +FAT_DIR="${BERTOS_DIR}/fs/fatfs" +NMEA_DIR="${BERTOS_DIR}/net/nmeap" + +if [ $# \< 2 ] ; then + printf "You must specify a cpu target, and source file type!\n" + printf "EXAMPLE:\n $0 \n\n" + + exit 1 +fi +CPU_TARGET=$1 +EXCLUDE_DIRS="$COPY_DIR $CPU_DIR $APP_DIR $OS_DIR $WIZARD_DIR $EMUL_DIR $FAT_DIR $NMEA_DIR" +EXCLUDE_CMD="\.svn -prune " +for i in $EXCLUDE_DIRS; do + EXCLUDE_CMD="$EXCLUDE_CMD -o -path $i -prune "; +done + +#Create a list of source file without a cpu specific source +GEN_SRC=`find . \( -name $EXCLUDE_CMD \) -o -name *.${2} -print | xargs` + +#Select c and asm sources for selected cpu target +TRG_SRC=`find ${CPU_DIR}/$CPU_TARGET -name \.svn -prune -o -name *.${2} -print | xargs` + +#Generate a list of all source for each cpu +SRC_ALL=${GEN_SRC}" "${TRG_SRC} + +# Find the files that contain the string +# NOTEST +# or +# NOTEST all +# and put them in a list + +NOTEST="notest:" +for src in $SRC_ALL ; +do + grep -P "$NOTEST\s*$CPU_TARGET" $src 2>&1 > /dev/null + if [ $? -eq 0 ] ; then + EXCLUDE_LIST="$EXCLUDE_LIST $src" + fi + grep -P "$NOTEST\s*all" $src 2>&1 > /dev/null + if [ $? -eq 0 ] ; then + EXCLUDE_LIST="$EXCLUDE_LIST $src" + fi +done + +# Remove the exclude list files from the sources to be +# compiled +for src in $EXCLUDE_LIST ; +do + SRC_ALL=`echo $SRC_ALL | sed -e "s;$src;;g"` +done + +printf "${SRC_ALL}" + diff --git a/2.5/test/ini_reader_file.ini b/2.5/test/ini_reader_file.ini new file mode 100644 index 00000000..606c439c --- /dev/null +++ b/2.5/test/ini_reader_file.ini @@ -0,0 +1,16 @@ +[First] +String=noot +Val=1 +Empty= +#comment + +[Second] +Val = 2 +String = mies +Long key = "long value" +comment = line with #comment +#comment=3 + +[Long section with spaces] +value = long value +no_new_line = value \ No newline at end of file diff --git a/2.5/test/log_nightly_test.sh b/2.5/test/log_nightly_test.sh new file mode 100755 index 00000000..fa3ffb10 --- /dev/null +++ b/2.5/test/log_nightly_test.sh @@ -0,0 +1,83 @@ +#!/bin/bash +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# Nighlty test for BeRTOS. +# +# Author Daniele Basile + +LOG_FILE="out" +DISPLAY_LINE="0" +HIDE_WARNING="TODO" +SHOW_MSG='warning|error' + + +if [ $# = 1 ] ; then + printf "Use the default settings.\n" +else + for i in "$@" ; + do + case $i in + "-file") + LOG_FILE=$2 + ;; + + "-hide") + HIDE_WARNING=$2 + ;; + "-show") + SHOW_MSG=$2 + shift + ;; + "-n") + echo "n" $2 + DISPLAY_LINE=$2 + ;; + esac + + #skip to next srgument + shift + done + +fi + +printf "Current settings:\n" +printf "Log file: "${LOG_FILE}"\n" +printf "Show message: "${SHOW_MSG}"\n" +printf "Hide warning message: "${HIDE_WARNING}"\n" +printf "Display line around to warning/error message: "${DISPLAY_LINE}"\n" + +if [ $DISPLAY_LINE = 0 ] ; then + GREP_ARGS="" +else + GREP_ARGS="-n"${DISPLAY_LINE} +fi + + +tail -f ${LOG_FILE} | grep -v ${HIDE_WARNING} | sed -e "s/^/vi /" | sed -e "s/:/ +/" | grep $GREP_ARGS -E ${SHOW_MSG} + + diff --git a/2.5/test/nightly_test.sh b/2.5/test/nightly_test.sh new file mode 100755 index 00000000..afe17321 --- /dev/null +++ b/2.5/test/nightly_test.sh @@ -0,0 +1,90 @@ +#!/bin/bash +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# Nighlty test for BeRTOS. +# +# Author Daniele Basile + +#Makefile test directory +MAKEFILE_TEST_DIR="." +TEST_DIR="test" +BERTOS_DIR="bertos/" +BERTOS_DIR_BAK="bertos.saved" +OPTS=1 +if [ $# = 1 ] ; then + if [ $1 = "-h" ] ; then + printf "Nightly test help.\n" + printf "\t--no-silent disable the silent of the TODO/FIXME warning messages.\n" + exit 1 + elif [ $1 = "--no-silent" ] ; then + OPTS=0 + fi +fi + +if [ $OPTS = 1 ] ; then +#Copy BeRTOS sources +printf "Starting nightlytest..\n" + printf "Silent mode enabled: removing the TODO/FIXME messages.\n" + cp -R $BERTOS_DIR $BERTOS_DIR_BAK || exit 1 + + #Strip away TODOs and FIXME + find $BERTOS_DIR -name "*.[ch]" | xargs perl -p -i -e 's/^\s*#warning\s*(TODO|FIXME).*//g;' + CFG_LIST=`find $BERTOS_DIR/cfg -name "cfg_*.h"` + for i in $CFG_LIST ; + do + $TEST_DIR/enablecfg.py $i + done +fi + +#Cpu targets that we want to test +TRG="avr arm" + +for i in $TRG ; +do + ${TEST_DIR}/gen_mk_src.sh $i +done + +#Clean and launch make on all +make -f ${MAKEFILE_TEST_DIR}/Makefile.test clean +make -f ${MAKEFILE_TEST_DIR}/Makefile.test +RET=$? +if [ $OPTS = 1 ] ; then + #Restore original sources + if [ -d $BERTOS_DIR_BAK ] ; then + printf "Exiting from nightly..\n" + rm -rf $BERTOS_DIR + mv $BERTOS_DIR_BAK $BERTOS_DIR + else + printf "Unable to restore backup copy\n" + exit 1 + fi +fi + +printf "Nightly test done.\n\n" +exit $RET + diff --git a/2.5/test/parselog.py b/2.5/test/parselog.py new file mode 100755 index 00000000..53506262 --- /dev/null +++ b/2.5/test/parselog.py @@ -0,0 +1,47 @@ +#!/usr/bin/env python +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# Author Francesco Sacchi + +import sys + +f = file(sys.argv[1]) +warn_suppress_cnt = 0 +for line in f: + if "__FILTER_NEXT_WARNING__" in line: + warn_suppress_cnt += 2 + + if "warning" in line: + if warn_suppress_cnt == 0: + print line, + else: + warn_suppress_cnt -= 1 + + if "error" in line: + print line, + diff --git a/2.5/test/parsetest.py b/2.5/test/parsetest.py new file mode 100755 index 00000000..326bd3ff --- /dev/null +++ b/2.5/test/parsetest.py @@ -0,0 +1,47 @@ +#!/usr/bin/python +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# Parser for unittest. +# +# Author Lorenzo "Mandingo" Mancini +# Author Francesco Sacchi + + +from __future__ import with_statement +import sys +import os + +TOKEN = "$test$:" +with open(sys.argv[1]) as f: + for line in f: + idx = line.find(TOKEN) + if idx != -1: + cmd = line[idx + len(TOKEN):].strip() + if os.system(cmd) != 0: + sys.exit(1) + sys.exit(0) diff --git a/2.5/test/run_tests.sh b/2.5/test/run_tests.sh new file mode 100755 index 00000000..916be6ba --- /dev/null +++ b/2.5/test/run_tests.sh @@ -0,0 +1,109 @@ +#!/bin/bash +# +# Copyright 2005 Develer S.r.l. (http://www.develer.com/) +# Copyright 2008 Bernie Innocenti +# +# Version: $Id$ +# Author: Bernie Innocenti +# + +# Testsuite output level: +# 0 - quiet +# 1 - progress output +# 2 - build warnings +# 3 - execution output +# 4 - build commands +VERBOSE=${VERBOSE:-1} + +CC=gcc +#FIXME: -Ibertos/emul should not be needed +CFLAGS="-W -Wall -Wextra -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings -Wsign-compare -Wmissing-noreturn \ +-O0 -g3 -ggdb -Ibertos -Ibertos/emul -std=gnu99 -fno-builtin -D_DEBUG -DARCH=(ARCH_EMUL|ARCH_UNITTEST) \ +-DCPU_FREQ=(12288000UL) -ffunction-sections -fdata-sections -Wl,--gc-sections" + +CXX=g++ +CXXFLAGS="$CFLAGS" + +TESTS=${TESTS:-`find . \ + \( -name .svn -prune -o -name .git -prune -o -name .hg -prune \) \ + -o -name "*_test.c" -print` } + +TESTOUT="testout" +SRC_LIST=" + bertos/algo/ramp.c + bertos/drv/kdebug.c + bertos/drv/timer.c + bertos/fs/battfs.c + bertos/kern/kfile.c + bertos/kern/monitor.c + bertos/kern/proc.c + bertos/kern/signal.c + bertos/kern/sem.c + bertos/kern/preempt.c + bertos/mware/event.c + bertos/mware/formatwr.c + bertos/mware/hex.c + bertos/mware/sprintf.c + bertos/os/hptime.c + bertos/struct/kfile_fifo.c + bertos/struct/heap.c + bertos/struct/hashtable.c + bertos/fs/fatfs/ff.c + bertos/emul/diskio_emul.c + bertos/fs/fat.c + bertos/emul/switch_ctx_emul.S + bertos/mware/ini_reader.c + bertos/emul/kfile_posix.c + bertos/algo/crc_ccitt.c + bertos/algo/crc.c + bertos/struct/kfile_mem.c + bertos/net/ax25.c + bertos/net/afsk.c + bertos/net/nmeap/src/nmeap01.c + bertos/net/nmea.c + bertos/cfg/kfile_debug.c +" + +buildout='/dev/null' +runout='/dev/null' +[ "$VERBOSE" -ge 2 ] && buildout='/dev/stdout' +[ "$VERBOSE" -ge 3 ] && runout='/dev/stdout' + +# Needed to get build/exec result code rather than tee's +set -o pipefail + +rm -rf "${TESTOUT}.old" +if [ -d "${TESTOUT}" ] ; then + mv -f "${TESTOUT}" "$TESTOUT.old" +fi +mkdir -p "$TESTOUT" + +for src in $TESTS; do + name="`basename $src | sed -e 's/\.cpp$//' -e 's/\.c$//'`" + testdir="./$TESTOUT/$name" + cfgdir="$testdir/cfg" + mkdir -p "$cfgdir" + exe="$testdir/$name" + + PREPARECMD="test/parsetest.py $src" + BUILDCMD="$CC -I$testdir $CFLAGS $src $SRC_LIST -o $exe" + export testdir name cfgdir + + [ $VERBOSE -gt 0 ] && echo "Preparing $name..." + [ $VERBOSE -gt 4 ] && echo " $PREPARECMD" + if $PREPARECMD 2>&1 | tee >$buildout $testdir/$name.prep; then + [ $VERBOSE -gt 0 ] && echo "Building $name..." + [ $VERBOSE -gt 4 ] && echo " $BUILDCMD" + if $BUILDCMD 2>&1 | tee >$buildout $testdir/$name.build; then + [ $VERBOSE -gt 0 ] && echo "Running $name..." + if ! $exe 2>&1 | tee >$runout $testdir/$name.out; then + echo "FAILED [RUN]: $name" + fi + else + echo "FAILED [BUILD]: $name" + fi + else + echo "FAILED [PREPARING]: $name" + fi +done + diff --git a/2.5/wizard/BBoardPage.py b/2.5/wizard/BBoardPage.py new file mode 100644 index 00000000..843562a7 --- /dev/null +++ b/2.5/wizard/BBoardPage.py @@ -0,0 +1,146 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of bertos. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +from BWizardPage import BWizardPage + +from BCpuPage import BCpuPage + +import const +import qvariant_converter +from bertos_utils import presetList, _cmp + +class BBoardPage(BWizardPage): + """ + Initial page of the alternative route. Permit to select one of the + predefined projects for supported board. + """ + + def __init__(self): + BWizardPage.__init__(self, const.UI_LOCATION + "/board_select.ui") + self.setTitle(self.tr("Select your development board")) + + ## Overloaded QWizardPage methods ## + + def isComplete(self): + """ + Overload of the QWizardPage isComplete method. + """ + if self.selected: + preset_path = qvariant_converter.getDict(self.selected.data(Qt.UserRole)) + preset_path = qvariant_converter.getStringDict(preset_path["info"]) + preset_path = preset_path["path"] + self.setProjectInfo("PROJECT_BOARD", preset_path) + self.setProjectInfo("PROJECT_FROM_PRESET", True) + self.setProjectInfo("PRESET_LOADED", False) + return True + else: + return False + + def nextId(self): + wizard = self.wizard() + if not self.projectInfo("PROJECT_FROM_PRESET"): + return wizard.pageIndex(BCpuPage) + else: + return QWizardPage.nextId(self) + + #### + + ## Overloaded BWizardPage methods ## + + def setupUi(self): + """ + Overload of the BWizardPage setupUi method. + """ + pass + + def connectSignals(self): + """ + Overload of the BWizardPage connectSignals method. + """ + self.connect(self.pageContent.boardList, SIGNAL("currentItemChanged(QListWidgetItem*,QListWidgetItem*)"), self.updateUi) + self.connect(self.pageContent.boardList, SIGNAL("currentItemChanged(QListWidgetItem*,QListWidgetItem*)"), self, SIGNAL("completeChanged()")) + self.connect(self.pageContent.customButton, SIGNAL("clicked()"), self.customButtonClicked) + + def reloadData(self, previous_id=None): + """ + Overload of the BWizardPage reloadData method. + """ + self.project.loadProjectPresets() + preset_list = self.projectInfo("PRESET_TREE") + preset_list = preset_list["children"] + preset_list = sorted(preset_list.values(), _cmp) + self.setItems(preset_list) + + #### + + ## Slots ## + + def updateUi(self): + if self.selected: + info_dict = qvariant_converter.getDict(self.selected.data(Qt.UserRole)) + info_dict = qvariant_converter.getStringDict(info_dict["info"]) + description = info_dict.get("description", "") + path = unicode(QUrl.fromLocalFile(info_dict["path"]).toString()) + description = description.replace("$path", path) + self.pageContent.descriptionArea.setHtml(description) + + def customButtonClicked(self): + self.setProjectInfo("PROJECT_FROM_PRESET", False) + self.wizard().next() + + #### + + def setItems(self, preset_list): + self.pageContent.boardList.clear() + selected_board = self.projectInfo("PROJECT_BOARD") + for item_data in preset_list: + item_name = item_data["info"].get("name", item_data["info"]["filename"]) + item_icon = os.path.join(item_data["info"]["path"], const.PREDEFINED_BOARD_ICON_FILE) + if not os.path.exists(item_icon): + item_icon = const.PREDEFINED_BOARD_DEFAULT_ICON + item = QListWidgetItem(QIcon(item_icon), item_name) + item.setData(Qt.UserRole, qvariant_converter.convertDict(item_data)) + self.pageContent.boardList.addItem(item) + if selected_board and selected_board == item_data["info"]["path"]: + self.pageContent.boardList.setCurrentItem(item) + + @property + def selected(self): + return self.pageContent.boardList.currentItem() diff --git a/2.5/wizard/BCpuPage.py b/2.5/wizard/BCpuPage.py new file mode 100644 index 00000000..001e5fc0 --- /dev/null +++ b/2.5/wizard/BCpuPage.py @@ -0,0 +1,186 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + + +from BWizardPage import * +import bertos_utils +import qvariant_converter + +from const import * + +class BCpuPage(BWizardPage): + """ + Page of the wizard that permits to choose the cpu from the supported ones. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/cpu_select.ui") + self.setTitle(self.tr("Select the CPU on your board")) + self.freq_modified = False + + ## Overloaded QWizardPage methods ## + + def isComplete(self): + """ + Overload of the QWizardPage isComplete method. + """ + if self.pageContent.cpuList.currentRow() != -1: + self.pageContent.frequencyLabel.setVisible(True) + self.pageContent.frequencySpinBox.setVisible(True) + infos = qvariant_converter.getDict(self.pageContent.cpuList.currentItem().data(Qt.UserRole)) + for key, value in infos.items(): + if key in CPU_DEF: + if type(CPU_DEF[key]) == list: + infos[key] = qvariant_converter.getStringList(value) + if type(CPU_DEF[key]) == str or type(CPU_DEF) == unicode: + infos[key] = qvariant_converter.getString(value) + elif key.startswith(MK_PARAM_ID): + infos[key] = qvariant_converter.getString(value) + else: + del infos[key] + self.setProjectInfo("CPU_INFOS", infos) + self.setProjectInfo("CPU_NAME", unicode(self.pageContent.cpuList.currentItem().text())) + self.setProjectInfo("SELECTED_FREQ", unicode(long(self.pageContent.frequencySpinBox.value()))) + tag_dict = self.projectInfo("ALL_CPU_TAGS") + for tag in tag_dict: + if tag in infos["CPU_TAGS"] + [infos["CPU_NAME"], infos["TOOLCHAIN"]]: + tag_dict[tag] = True + else: + tag_dict[tag] = False + self.setProjectInfo("ALL_CPU_TAGS", tag_dict) + return True + else: + return False + + #### + + ## Overloaded BWizardPage methods ## + + def setupUi(self): + """ + Overload of the BWizardPage setupUi method. + """ + self.pageContent.cpuList.setSortingEnabled(True) + self.pageContent.frequencyLabel.setVisible(False) + self.pageContent.frequencySpinBox.setVisible(False) + preset_advanced = self.projectInfo("PRESET_ADVANCED_CONFIG") + if preset_advanced: + self.pageContent.cpuList.setEnabled(False) + + def connectSignals(self): + """ + Overload of the BWizardPage connectSignals method. + """ + self.connect(self.pageContent.cpuList, SIGNAL("currentItemChanged(QListWidgetItem *, QListWidgetItem*)"), self.rowChanged) + self.connect(self.pageContent.frequencySpinBox, SIGNAL("editingFinished()"), self.freqChanged) + + def reloadData(self, previous_id=None): + """ + Overload of the BWizardPage reloadData method. + """ + try: + QApplication.instance().setOverrideCursor(Qt.WaitCursor) + self.project.loadSourceTree() + self.populateCpuList() + cpu_name = self.projectInfo("CPU_NAME") + selected_freq = self.projectInfo("SELECTED_FREQ") + self.setupUi() + if cpu_name: + self.selectItem(cpu_name) + if selected_freq: + self.setFrequency(selected_freq) + self.freq_modified = True + finally: + QApplication.instance().restoreOverrideCursor() + self.emit(SIGNAL("completeChanged()")) + + #### + + ## Slots ## + + def rowChanged(self): + """ + Slot called when the user select an entry from the cpu list. + """ + if self.pageContent.cpuList.currentItem(): + description = qvariant_converter.getDict(self.pageContent.cpuList.currentItem().data(Qt.UserRole))["CPU_DESC"] + description = qvariant_converter.getStringList(description) + if not self.freq_modified: + # Retrieve the default cpu frequency when the value isn't already modified + current_freq = qvariant_converter.getDict(self.pageContent.cpuList.currentItem().data(Qt.UserRole))["CPU_DEFAULT_FREQ"] + current_freq = qvariant_converter.getString(current_freq) + current_freq = long(current_freq.replace("U", "").replace("L", "")) + self.pageContent.frequencySpinBox.setValue(long(current_freq)) + self.pageContent.descriptionLabel.setText("
    ".join(description)) + self.pageContent.descriptionLabel.setVisible(True) + self.emit(SIGNAL("completeChanged()")) + + def freqChanged(self): + """ + Slot called when the user change the frequency value. + """ + self.freq_modified = True + self.emit(SIGNAL("completeChanged()")) + + #### + + def populateCpuList(self): + """ + Fills the cpu list. + """ + self.pageContent.cpuList.clear() + self.pageContent.cpuList.setCurrentItem(None) + infos = self.project.getCpuInfos() + tag_list = bertos_utils.getTagSet(infos) + # Create, fill and store the dict with the tags + tag_dict = {} + for element in tag_list: + tag_dict[element] = False + self.setProjectInfo("ALL_CPU_TAGS", tag_dict) + for cpu in infos: + item = QListWidgetItem(cpu["CPU_NAME"]) + item.setData(Qt.UserRole, qvariant_converter.convertDict(cpu)) + self.pageContent.cpuList.addItem(item) + + def selectItem(self, cpu): + """ + Selects the given cpu from the list. + """ + elements = self.pageContent.cpuList.findItems(cpu, Qt.MatchCaseSensitive) + if len(elements) == 1: + self.pageContent.cpuList.setCurrentItem(elements[0]) + + def setFrequency(self, frequency): + self.pageContent.frequencySpinBox.setValue(long(frequency)) diff --git a/2.5/wizard/BCreationPage.py b/2.5/wizard/BCreationPage.py new file mode 100644 index 00000000..d91fbc61 --- /dev/null +++ b/2.5/wizard/BCreationPage.py @@ -0,0 +1,130 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtGui import * + +from BWizardPage import * +import bertos_utils + +from const import * + +class BCreationPage(BWizardPage): + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/project_creation.ui") + self.setTitle(self.tr("Project summary")) + self.setSubTitle(self.tr("Your project is ready to be created. Review your selections and press the \"Create\" button")) + self._completed = False + + ## Overloaded BWizardPage methods ## + + def connectSignals(self): + self.connect(self.pageContent.codeliteCheckBox, SIGNAL("stateChanged(int)"), self.codelitePluginChanged) + + def setupUi(self): + summary = self.pageContent.summaryTree + summary.setHeaderHidden(True) + summary.setColumnCount(1) + self.pageContent.codeliteCheckBox.setChecked("codelite" not in self.plugins()) + self.codelitePluginChanged() + self.setButtonText(QWizard.NextButton, self.tr("Create")) + + def reloadData(self, previous_id=None): + self.setupUi() + self.pageContent.summaryTree.clear() + top_level = [] + folder_title = QTreeWidgetItem(QStringList([self.tr("Project folder")])) + folder_item = QTreeWidgetItem(folder_title, QStringList([os.path.normpath(self.projectInfo("PROJECT_PATH"))])) + top_level.append(folder_title) + version_title = QTreeWidgetItem(QStringList([self.tr("BeRTOS version")])) + sources_path = self.projectInfo("BERTOS_PATH") + version = QTreeWidgetItem(version_title, QStringList([self.tr("version: ") + bertos_utils.bertosVersion(sources_path)])) + source_path = QTreeWidgetItem(version_title, QStringList([self.tr("path: ") + os.path.normpath(sources_path)])) + top_level.append(version_title) + cpu_title = QTreeWidgetItem(QStringList([self.tr("CPU")])) + cpu_name = QTreeWidgetItem(cpu_title, QStringList([self.tr("cpu name: ") + self.projectInfo("CPU_NAME")])) + cpu_freq = QTreeWidgetItem(cpu_title, QStringList([self.tr("frequency: ") + self.projectInfo("SELECTED_FREQ") + "Hz"])) + top_level.append(cpu_title) + toolchain_title = QTreeWidgetItem(QStringList([self.tr("Toolchain")])) + toolchain_info = self.projectInfo("TOOLCHAIN") + if "target" in toolchain_info: + toolchain_target = QTreeWidgetItem(toolchain_title, QStringList([self.tr("target: " + toolchain_info["target"].strip())])) + version = "" + if "version" in toolchain_info: + version += "version: " + "GCC " + toolchain_info["version"].strip() + " " + if "build" in toolchain_info: + version += "(" + toolchain_info["build"].strip() + ")" + if "version" in toolchain_info: + toolchain_target = QTreeWidgetItem(toolchain_title, QStringList([version])) + toolchain_path = QTreeWidgetItem(toolchain_title, QStringList([self.tr("path: " + os.path.normpath(toolchain_info["path"]))])) + top_level.append(toolchain_title) + module_title = QTreeWidgetItem(QStringList([self.tr("Selected modules")])) + configurations = self.projectInfo("CONFIGURATIONS") + module_categories = {} + for module, information in self.projectInfo("MODULES").items(): + if information["enabled"]: + if information["category"] not in module_categories: + module_categories[information["category"]] = [] + moduleItem = QTreeWidgetItem(QStringList([module + " - " + information["description"]])) + module_categories[information["category"]].append(moduleItem) + if len(information["configuration"]) > 0: + for start, property in configurations[information["configuration"]]["paramlist"]: + # If the final char of the brief is a dot (".") removes it. + brief = configurations[information["configuration"]][property]["brief"] + if brief[-1] == ".": + brief = brief[:-1] + configuration_item = QTreeWidgetItem(moduleItem, QStringList([brief + ": " + configurations[information["configuration"]][property]["value"]])) + for key, value in module_categories.items(): + category_item = QTreeWidgetItem(module_title, QStringList([key])) + category_item.addChildren(value) + top_level.append(module_title) + self.pageContent.summaryTree.insertTopLevelItems(0, top_level) + for item in top_level: + self.pageContent.summaryTree.expandItem(item) + + #### + + ## Slots ## + + def codelitePluginChanged(self): + if not self.pageContent.codeliteCheckBox.isChecked(): + output = ["codelite"] + else: + output= [] + self.setProjectInfo("OUTPUT", output) + + #### \ No newline at end of file diff --git a/2.5/wizard/BEditingDialog.py b/2.5/wizard/BEditingDialog.py new file mode 100644 index 00000000..cd468efd --- /dev/null +++ b/2.5/wizard/BEditingDialog.py @@ -0,0 +1,249 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import sys +import os + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +from bertos_utils import bertosVersion, getToolchainName +from BToolchainPage import BToolchainPage +from BVersionPage import BVersionPage + +from BProject import BProject + +import qvariant_converter +from BModulePage import BModulePage +import bertos_utils + +class BEditingDialog(QDialog): + + def __init__(self, parent=None): + QDialog.__init__(self, parent) + self.setupUi() + self.connectSignals() + self.module_page.reloadData() + self.setFrequency() + + def setupUi(self): + layout = QVBoxLayout() + self.module_page = BModulePage() + layout.addWidget(self.module_page) + frequency_layout = QHBoxLayout() + frequency_layout.addWidget(QLabel(self.tr("CPU frequency"))) + self.cpu_frequency_spinbox = QDoubleSpinBox() + self.cpu_frequency_spinbox.setSuffix("Hz") + self.cpu_frequency_spinbox.setRange(1, 1000000000) + self.cpu_frequency_spinbox.setSingleStep(1000) + self.cpu_frequency_spinbox.setDecimals(0) + frequency_layout.addWidget(self.cpu_frequency_spinbox) + frequency_layout.addStretch() + layout.addLayout(frequency_layout) + button_layout = QHBoxLayout() + self.advanced_button = QToolButton() + self.setupMenu() + self.advanced_button.setMenu(self.menu) + self.advanced_button.setPopupMode(QToolButton.InstantPopup) + self.advanced_button.setText(self.tr("Advanced")) + button_layout.addWidget(self.advanced_button) + button_layout.addStretch() + self.cancel_button = QPushButton(self.tr("Cancel")) + button_layout.addWidget(self.cancel_button) + self.apply_button = QPushButton(self.tr("Apply")) + button_layout.addWidget(self.apply_button) + layout.addLayout(button_layout) + self.setLayout(layout) + self.setWindowTitle(self.tr("Edit \"%1\" project").arg(os.path.basename(self.module_page.projectInfo("PROJECT_PATH")))) + self.setWindowIcon(QIcon(":/images/appicon.png")) + + def setupMenu(self): + self.menu = QMenu(self.tr("Advanced options")) + self.change_toolchain = QAction(self.tr("Change toolchain"), self) + self.change_bertos_version = QAction(self.tr("Change BeRTOS version"), self) + self.menu.addAction(self.change_toolchain) + self.menu.addAction(self.change_bertos_version) + + def connectSignals(self): + self.connect(self.change_toolchain, SIGNAL("triggered(bool)"), self.changeToolchain) + self.connect(self.change_bertos_version, SIGNAL("triggered(bool)"), self.changeBertosVersion) + self.connect(self.apply_button, SIGNAL("clicked()"), self.apply) + self.connect(self.cancel_button, SIGNAL("clicked()"), self.reject) + self.connect(self.cpu_frequency_spinbox, SIGNAL("valueChanged(double)"), self.frequencyChanged) + + def setFrequency(self): + frequency = long(self.module_page.projectInfo("SELECTED_FREQ")) + self.cpu_frequency_spinbox.setValue(frequency) + + def frequencyChanged(self, frequency): + frequency = unicode(long(frequency)) + self.module_page.setProjectInfo("SELECTED_FREQ", frequency) + + def changeToolchain(self): + dialog = BToolchainDialog() + if dialog.exec_(): + toolchain = qvariant_converter.getStringDict(dialog.toolchain_page.currentItem().data(Qt.UserRole)) + dialog.toolchain_page.setProjectInfo("TOOLCHAIN", toolchain) + + def changeBertosVersion(self): + current_version = self.module_page.projectInfo("BERTOS_PATH") + dialog = BVersionDialog() + if dialog.exec_(): + version = qvariant_converter.getString(dialog.version_page.currentItem().data(Qt.UserRole)) + if QMessageBox.question( + dialog.version_page, + self.tr("BeRTOS version update"), + self.tr("Changing the BeRTOS version will destroy all the modification done on the BeRTOS sources"), + QMessageBox.Ok | QMessageBox.Cancel + ) == QMessageBox.Ok: + try: + qApp.setOverrideCursor(QCursor(Qt.WaitCursor)) + dialog.version_page.setProjectInfo("BERTOS_PATH", version) + dialog.version_page.setProjectInfo("OLD_BERTOS_PATH", current_version) + enabled_modules = bertos_utils.enabledModules(dialog.version_page.project) + old_configuration = dialog.version_page.projectInfo("CONFIGURATIONS") + dialog.version_page.project.loadSourceTree() + QApplication.instance().project.reloadCpuInfo() + QApplication.instance().project.loadModuleData() + new_configuration = dialog.version_page.projectInfo("CONFIGURATIONS") + merged_configuration = {} + for conf in new_configuration: + if conf in old_configuration: + configuration = bertos_utils.updateConfigurationValues(new_configuration[conf], old_configuration[conf]) + else: + configuration = new_configuration[conf] + merged_configuration[conf] = configuration + dialog.version_page.setProjectInfo("CONFIGURATIONS", merged_configuration) + dialog.version_page.project.setEnabledModules(enabled_modules) + self.module_page.fillModuleTree() + finally: + qApp.restoreOverrideCursor() + else: + # Rollback version to the previous selected one. + dialog.version_page.setProjectInfo("BERTOS_PATH", current_version) + + def apply(self): + try: + qApp.setOverrideCursor(QCursor(Qt.WaitCursor)) + QApplication.instance().project.createBertosProject() + finally: + qApp.restoreOverrideCursor() + self.accept() + + def toolchains(self): + return self.module_page.toolchains() + + def currentToolchain(self): + return self.module_page.projectInfo("TOOLCHAIN") + + def setCurrentToolchain(self, toolchain): + self.module_page.setProjectInfo("TOOLCHAIN", toolchain) + + def versions(self): + return self.module_page.versions() + + def currentVersion(self): + return self.module_page.projectInfo("BERTOS_PATH") + + def setCurrentVersion(self, version): + self.module_page.setProjectInfo("BERTOS_PATH", version) + +class BToolchainDialog(QDialog): + def __init__(self): + QDialog.__init__(self) + self.setWindowIcon(QIcon(":/images/appicon.png")) + layout = QVBoxLayout() + toolchain_page = BToolchainPage() + current_toolchain = toolchain_page.projectInfo("TOOLCHAIN") + toolchain_page.reloadData() + # TODO: to be moved in BToolchainPage + for toolchain_row in range(toolchain_page.pageContent.toolchainList.count()): + toolchain = qvariant_converter.getStringDict(toolchain_page.pageContent.toolchainList.item(toolchain_row).data(Qt.UserRole)) + if current_toolchain and toolchain["path"] == current_toolchain["path"]: + toolchain_page.pageContent.toolchainList.setCurrentRow(toolchain_row) + toolchain_page.selectionChanged() + break + self.toolchain_page = toolchain_page + layout.addWidget(toolchain_page) + button_layout = QHBoxLayout() + button_layout.addStretch() + cancel_button = QPushButton(self.tr("Cancel")) + button_layout.addWidget(cancel_button) + ok_button = QPushButton(self.tr("Ok")) + button_layout.addWidget(ok_button) + self.connect(cancel_button, SIGNAL("clicked()"), self.reject) + layout.addLayout(button_layout) + self.setLayout(layout) + self.connect(ok_button, SIGNAL("clicked()"), self.accept) + self.setWindowTitle(self.tr("Change toolchain")) + +class BVersionDialog(QDialog): + def __init__(self): + QDialog.__init__(self) + self.setWindowIcon(QIcon(":/images/appicon.png")) + layout = QVBoxLayout() + version_page = BVersionPage(edit=True) + version_page.reloadData() + self.version_page = version_page + layout.addWidget(version_page) + button_layout = QHBoxLayout() + button_layout.addStretch() + cancel_button = QPushButton(self.tr("Cancel")) + button_layout.addWidget(cancel_button) + ok_button = QPushButton(self.tr("Ok")) + button_layout.addWidget(ok_button) + self.connect(cancel_button, SIGNAL("clicked()"), self.reject) + layout.addLayout(button_layout) + self.setLayout(layout) + self.connect(ok_button, SIGNAL("clicked()"), self.accept) + current_version = version_page.projectInfo("BERTOS_PATH") + self.setWindowTitle(self.tr("Change BeRTOS version")) + + +def main(): + if len(sys.argv) > 1: + project_file = sys.argv[1] + else: + print "Invalid usage: use project_file" + sys.exit() + app = QApplication([]) + app.project = BProject(project_file) + app.settings = QSettings("Develer", "Bertos Configurator") + dialog = BEditingDialog() + dialog.show() + sys.exit(app.exec_()) + +if __name__ == "__main__": + main() diff --git a/2.5/wizard/BFinalPage.py b/2.5/wizard/BFinalPage.py new file mode 100644 index 00000000..66a300fa --- /dev/null +++ b/2.5/wizard/BFinalPage.py @@ -0,0 +1,120 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtGui import * + +from BWizardPage import * +import bertos_utils + +from const import * + +class BFinalPage(BWizardPage): + """ + Last page of the wizard. It creates the project and show a success message. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/final_page.ui") + self.setTitle(self.tr("Project created successfully!")) + + ## Overloaded BWizardPage methods ## + + def reloadData(self, previous_id=None): + self.setVisible(False) + """ + Overload of the BWizardPage reloadData method. + """ + try: + QApplication.instance().setOverrideCursor(Qt.WaitCursor) + try: + # This operation can throw WindowsError, if the directory is + # locked. + self.project.createBertosProject() + except OSError, e: + QMessageBox.critical( + self, + self.tr("Error removing destination directory"), + self.tr("Error removing the destination directory. This directory or a file in it is in use by another user or application.\nClose the application which is using the directory and retry.")) + self.wizard().back() + return + finally: + QApplication.instance().restoreOverrideCursor() + self.setVisible(True) + self._plugin_dict = {} + if os.name == "nt": + output = self.projectInfo("OUTPUT") + import winreg_importer + command_lines = winreg_importer.getCommandLines() + self.setProjectInfo("COMMAND_LINES", command_lines) + layout = QVBoxLayout() + for plugin in output: + if plugin in command_lines: + module = bertos_utils.loadPlugin(plugin) + check = QCheckBox(self.tr("Open project in %s" %module.PLUGIN_NAME)) + if len(output) == 1: + check.setCheckState(Qt.Checked) + else: + check.setCheckState(Qt.Unchecked) + layout.addWidget(check) + self._plugin_dict[check] = plugin + widget = QWidget() + widget.setLayout(layout) + if len(self._plugin_dict) > 0: + self.pageContent.scrollArea.setVisible(True) + self.pageContent.scrollArea.setWidget(widget) + for plugin in self._plugin_dict: + self.connect(plugin, SIGNAL("stateChanged(int)"), self.modeChecked) + self.modeChecked() + + def setupUi(self): + """ + Overload of the BWizardPage setupUi method. + """ + self.pageContent.scrollArea.setVisible(False) + + #### + + ## Slots ## + + def modeChecked(self): + to_be_opened = [] + for check, plugin in self._plugin_dict.items(): + if check.checkState() == Qt.Checked: + to_be_opened.append(plugin) + self.setProjectInfo("TO_BE_OPENED", to_be_opened) + + #### diff --git a/2.5/wizard/BFolderPage.py b/2.5/wizard/BFolderPage.py new file mode 100644 index 00000000..9944677c --- /dev/null +++ b/2.5/wizard/BFolderPage.py @@ -0,0 +1,167 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtGui import * +from BWizardPage import * +import bertos_utils + +from BCpuPage import BCpuPage +from BBoardPage import BBoardPage + +from const import * + +class BFolderPage(BWizardPage): + """ + Initial page of the wizard. Permit to select the project name and the directory + where the project will be created. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/dir_select.ui") + self.setTitle(self.tr("Select the project name")) + self.initializeAttributes() + + ## Overloaded QWizardPage methods ## + + def isComplete(self): + """ + Overload of the QWizardPage isComplete method. + """ + self.setDefaultFolder(self._destination_folder) + if self.pageContent.projectPath.text() != "None": + self.setProjectInfo("PROJECT_PATH", unicode(self.pageContent.projectPath.text())) + self.setProjectInfo("PROJECT_NAME", os.path.basename(unicode(self.pageContent.projectPath.text()))) + self.setProjectInfo("PROJECT_SRC_PATH", os.path.join(self.projectInfo("PROJECT_PATH"), self.projectInfo("PROJECT_NAME"))) + self.setProjectInfo("PROJECT_HW_PATH", os.path.join(self.projectInfo("PROJECT_PATH"), self.projectInfo("PROJECT_NAME"))) + return True + else: + return False + + #### + + ## Overloaded BWizardPage methods ## + + def setupUi(self): + """ + Overload of the BWizardPage setupUi method. + """ + self.pageContent.warningLabel.setVisible(False) + + def connectSignals(self): + """ + Overload of the BWizardPage connectSignals method. + """ + self.connect(self.pageContent.nameEdit, SIGNAL("textChanged(const QString)"), self.nameChanged) + self.connect(self.pageContent.directoryEdit, SIGNAL("textChanged(const QString)"), self.directoryChanged) + self.connect(self.pageContent.directoryButton, SIGNAL("clicked()"), self.selectDirectory) + # self.connect(self.pageContent.customButton, SIGNAL("toggled(bool)"), self.isComplete) + + #### + + ## Slots ## + + def nameChanged(self, name): + """ + Slot called when the project name is changed manually by the user. + """ + try: + name = unicode(name).encode("ascii") + except UnicodeEncodeError: + name = self._project_name + self.pageContent.nameEdit.setText(name) + self._project_name = unicode(name).replace(" ", "_") + self.setProjectPath() + + def directoryChanged(self, directory): + """ + Slot called when the project folder is changed manually by the user. + """ + try: + directory = unicode(directory).encode("ascii") + except UnicodeEncodeError: + directory = self._destination_folder + self.pageContent.directoryEdit.setText(directory) + self._destination_folder = directory + self.setProjectPath() + + def selectDirectory(self): + """ + Slot called when the project folder is changed using the file dialog. + """ + directory = unicode(QFileDialog.getExistingDirectory(self, self.tr("Open Directory"), self.pageContent.directoryEdit.text(), QFileDialog.ShowDirsOnly)) + if len(directory) > 0: + self.pageContent.directoryEdit.setText(QDir.toNativeSeparators(directory)) + + #### + + def initializeAttributes(self): + """ + Initializes the page attributes to the default values. + """ + self._project_name = "" + stored_folder = self.defaultFolder() + if stored_folder != "": + self._destination_folder = stored_folder + elif os.name == "nt": + from win32com.shell import shell, shellcon + self._destination_folder = shell.SHGetFolderPath(0, shellcon.CSIDL_PERSONAL, 0, 0) + del shell + del shellcon + else: + self._destination_folder = os.path.expanduser("~") + self.pageContent.directoryEdit.setText(self._destination_folder) + + def setProjectPath(self): + """ + Analyzes the page attributes and generates the path string. + """ + if self._destination_folder != "" and self._project_name <> "": + if not self._destination_folder.endswith(os.sep): + self._destination_folder += os.sep + self.pageContent.projectPath.setText(QDir.toNativeSeparators(self._destination_folder + self._project_name)) + if os.path.exists(self._destination_folder + self._project_name): + self.pageContent.warningLabel.setVisible(True) + self.pageContent.warningLabel.setText(self.tr("Warning: the selected directory exists, \ + it will be destroyed with all contained subdirectories and files...")) + else: + self.pageContent.warningLabel.setVisible(False) + self.pageContent.warningLabel.setText("") + else: + self.pageContent.projectPath.setText("None") + self.pageContent.warningLabel.setVisible(False) + self.pageContent.warningLabel.setText("") + self.emit(SIGNAL("completeChanged()")) diff --git a/2.5/wizard/BIntroPage.py b/2.5/wizard/BIntroPage.py new file mode 100644 index 00000000..02ca9469 --- /dev/null +++ b/2.5/wizard/BIntroPage.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id: BFolderPage.py 2669 2009-04-25 07:58:45Z duplo $ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtGui import * +from BWizardPage import * + +from const import * + +class BIntroPage(BWizardPage): + """ + Initial page of the wizard. Permit to select the project name and the directory + where the project will be created. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/intro_page.ui") + self.setTitle(self.tr("Welcome in BeRTOS Wizard!")) + pixmap = self.pageContent.imageLabel.pixmap() + self.pageContent.imageLabel.setPixmap(pixmap.scaled(300, 400, Qt.KeepAspectRatio)) + + ## Overloaded QWizardPage methods ## + + def isComplete(self): + """ + Overload of the QWizardPage isComplete method. + """ + return True + + #### \ No newline at end of file diff --git a/2.5/wizard/BModulePage.py b/2.5/wizard/BModulePage.py new file mode 100644 index 00000000..6e40c7f1 --- /dev/null +++ b/2.5/wizard/BModulePage.py @@ -0,0 +1,594 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtCore import * +from PyQt4.QtGui import * +from BWizardPage import * +import bertos_utils + +from bertos_utils import SupportedException +from DefineException import * +from const import * + +class BModulePage(BWizardPage): + """ + Page of the wizard that permits to select and configurate the BeRTOS modules. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/module_select.ui") + self.setTitle(self.tr("Configure the BeRTOS modules")) + self._control_group = QControlGroup() + ## special connection needed for the QControlGroup + self.connect(self._control_group, SIGNAL("stateChanged"), self.saveValue) + + ## Overloaded BWizardPage methods ## + + def setupUi(self): + """ + Overload of BWizardPage setupUi method. + """ + self.pageContent.moduleTree.clear() + self.pageContent.moduleTree.setHeaderHidden(True) + self.pageContent.propertyTable.horizontalHeader().setResizeMode(QHeaderView.Stretch) + self.pageContent.propertyTable.horizontalHeader().setVisible(False) + self.pageContent.propertyTable.verticalHeader().setResizeMode(QHeaderView.ResizeToContents) + self.pageContent.propertyTable.verticalHeader().setVisible(False) + self.pageContent.propertyTable.setColumnCount(2) + self.pageContent.propertyTable.setRowCount(0) + self.pageContent.moduleLabel.setVisible(False) + self.pageContent.warningLabel.setVisible(False) + + def connectSignals(self): + """ + Overload of the BWizardPage connectSignals method. + """ + self.connect(self.pageContent.moduleTree, SIGNAL("itemPressed(QTreeWidgetItem*, int)"), self.fillPropertyTable) + self.connect(self.pageContent.moduleTree, SIGNAL("itemPressed(QTreeWidgetItem*, int)"), self.moduleClicked) + self.connect(self.pageContent.moduleTree, SIGNAL("itemChanged(QTreeWidgetItem*, int)"), self.dependencyCheck) + + def reloadData(self, previous_id=None): + """ + Overload of the BWizardPage reloadData method. + """ + # Check if the user are approaching this page from the previous or the + # next one. + if previous_id is None or previous_id < self.wizard().currentId(): + try: + QApplication.instance().setOverrideCursor(Qt.WaitCursor) + self.setupUi() + self.loadModuleData() + self.fillModuleTree() + finally: + QApplication.instance().restoreOverrideCursor() + + #### + + ## Slots ## + + def moduleClicked(self, item, column): + self.setBold(item, False) + + def fillPropertyTable(self): + """ + Slot called when the user selects a module from the module tree. + Fills the property table using the configuration parameters defined in + the source tree. + """ + module = self.currentModule() + if module: + try: + supported = bertos_utils.isSupported(self.project, module=module) + except SupportedException, e: + self.exceptionOccurred(self.tr("Error evaluating \"%1\" for module %2").arg(e.support_string).arg(module)) + supported = True + self._control_group.clear() + configuration = self.projectInfo("MODULES")[module]["configuration"] + module_description = self.projectInfo("MODULES")[module]["description"] + self.pageContent.moduleLabel.setText(module_description) + self.pageContent.moduleLabel.setVisible(True) + if not supported: + self.pageContent.warningLabel.setVisible(True) + selected_cpu = self.projectInfo("CPU_NAME") + self.pageContent.warningLabel.setText(self.tr("Warning: the selected module, \ + is not completely supported by the %1.").arg(selected_cpu)) + else: + self.pageContent.warningLabel.setVisible(False) + self.pageContent.propertyTable.clear() + self.pageContent.propertyTable.setRowCount(0) + if configuration != "": + configurations = self.projectInfo("CONFIGURATIONS")[configuration] + param_list = sorted(configurations["paramlist"]) + index = 0 + for i, property in param_list: + if "type" in configurations[property]["informations"] and configurations[property]["informations"]["type"] == "autoenabled": + # Doesn't show the hidden fields + continue + try: + param_supported = bertos_utils.isSupported(self.project, property_id=(configuration, property)) + except SupportedException, e: + self.exceptionOccurred(self.tr("Error evaluating \"%1\" for parameter %2").arg(e.support_string).arg(property)) + param_supported = True + if not param_supported: + # Doesn't show the unsupported parameters + continue + # Set the row count to the current index + 1 + self.pageContent.propertyTable.setRowCount(index + 1) + item = QTableWidgetItem(configurations[property]["brief"]) + item.setFlags(item.flags() & ~Qt.ItemIsSelectable) + item.setToolTip(property) + item.setData(Qt.UserRole, qvariant_converter.convertString(property)) + self.pageContent.propertyTable.setItem(index, 0, item) + if "type" in configurations[property]["informations"] and configurations[property]["informations"]["type"] == "boolean": + self.insertCheckBox(index, configurations[property]["value"]) + elif "type" in configurations[property]["informations"] and configurations[property]["informations"]["type"] == "enum": + self.insertComboBox(index, configurations[property]["value"], configurations[property]["informations"]["value_list"]) + elif "type" in configurations[property]["informations"] and configurations[property]["informations"]["type"] == "int": + self.insertSpinBox(index, configurations[property]["value"], configurations[property]["informations"]) + else: + # Not defined type, rendered as a text field + self.pageContent.propertyTable.setItem(index, 1, QTableWidgetItem(configurations[property]["value"])) + index += 1 + if self.pageContent.propertyTable.rowCount() == 0: + module_label = self.pageContent.moduleLabel.text() + module_label += "\n\nNo configuration needed." + self.pageContent.moduleLabel.setText(module_label) + else: + self.pageContent.moduleLabel.setText("") + self.pageContent.moduleLabel.setVisible(False) + self.pageContent.propertyTable.clear() + self.pageContent.propertyTable.setRowCount(0) + + def dependencyCheck(self, item): + """ + Checks the dependencies of the module associated with the given item. + """ + checked = False + module = unicode(item.text(0)) + if item.checkState(0) == Qt.Checked: + self.moduleSelected(module) + else: + self.moduleUnselected(module) + self.removeFileDependencies(module) + + def showPropertyDescription(self): + """ + Slot called when the property selection changes. Shows the description + of the selected property. + """ + self.resetPropertyDescription() + configurations = self.currentModuleConfigurations() + if self.currentProperty() in configurations: + description = configurations[self.currentProperty()]["brief"] + name = self.currentProperty() + self.currentPropertyItem().setText(description + "\n" + name) + + def saveValue(self, index): + """ + Slot called when the user modifies one of the configuration parameters. + It stores the new value.""" + property = qvariant_converter.getString(self.pageContent.propertyTable.item(index, 0).data(Qt.UserRole)) + configuration = self.projectInfo("MODULES")[self.currentModule()]["configuration"] + configurations = self.projectInfo("CONFIGURATIONS") + if "type" not in configurations[configuration][property]["informations"] or configurations[configuration][property]["informations"]["type"] == "int": + configurations[configuration][property]["value"] = unicode(int(self.pageContent.propertyTable.cellWidget(index, 1).value())) + elif configurations[configuration][property]["informations"]["type"] == "enum": + configurations[configuration][property]["value"] = unicode(self.pageContent.propertyTable.cellWidget(index, 1).currentText()) + elif configurations[configuration][property]["informations"]["type"] == "boolean": + if self.pageContent.propertyTable.cellWidget(index, 1).isChecked(): + configurations[configuration][property]["value"] = "1" + else: + configurations[configuration][property]["value"] = "0" + self.setProjectInfo("CONFIGURATIONS", configurations) + if self.moduleItem(self.currentModule()).checkState(0) == Qt.Checked: + self.dependencyCheck(self.moduleItem(self.currentModule())) + + #### + + def loadModuleData(self): + """ + Loads the module data. + """ + # Do not load the module data again when the Wizard is in editing mode + # or when it's working on a preset. + if not self.project.edit and not self.project.from_preset: + # Load the module data every time so that if the user changed the cpu + # the right configurations are picked up. + try: + self.project.loadModuleData() + except ModuleDefineException, e: + self.exceptionOccurred(self.tr("Error parsing line '%2' in file %1").arg(e.path).arg(e.line)) + except EnumDefineException, e: + self.exceptionOccurred(self.tr("Error parsing line '%2' in file %1").arg(e.path).arg(e.line)) + except ConfigurationDefineException, e: + self.exceptionOccurred(self.tr("Error parsing line '%2' in file %1").arg(e.path).arg(e.line)) + + def fillModuleTree(self): + """ + Fills the module tree with the module entries separated in categories. + """ + self.pageContent.moduleTree.clear() + modules = self.projectInfo("MODULES") + if not modules: + return + categories = {} + for module, information in modules.items(): + if information["category"] not in categories: + categories[information["category"]] = [] + categories[information["category"]].append(module) + for category, module_list in categories.items(): + item = QTreeWidgetItem(QStringList([category])) + for module in module_list: + enabled = modules[module]["enabled"] + module_item = QTreeWidgetItem(item, QStringList([module])) + try: + supported = bertos_utils.isSupported(self.project, module=module) + except SupportedException, e: + self.exceptionOccurred(self.tr("Error evaluating \"%1\" for module %2").arg(e.support_string).arg(module)) + supported = True + if not supported: + module_item.setForeground(0, QBrush(QColor(Qt.red))) + if enabled: + module_item.setCheckState(0, Qt.Checked) + else: + module_item.setCheckState(0, Qt.Unchecked) + self.pageContent.moduleTree.addTopLevelItem(item) + self.pageContent.moduleTree.sortItems(0, Qt.AscendingOrder) + self.fillPropertyTable() + + def insertCheckBox(self, index, value): + """ + Inserts in the table at index a checkbox for a boolean property setted + to value. + """ + check_box = QCheckBox() + self.pageContent.propertyTable.setCellWidget(index, 1, check_box) + if value == "1": + check_box.setChecked(True) + else: + check_box.setChecked(False) + self._control_group.addControl(index, check_box) + + def insertComboBox(self, index, value, value_list): + """ + Inserts in the table at index a combobox for an enum property setted + to value. + """ + try: + enum = self.projectInfo("LISTS")[value_list] + combo_box = QComboBox() + self.pageContent.propertyTable.setCellWidget(index, 1, combo_box) + for i, element in enumerate(enum): + combo_box.addItem(element) + if element == value: + combo_box.setCurrentIndex(i) + self._control_group.addControl(index, combo_box) + except KeyError: + self.exceptionOccurred(self.tr("Define list \"%1\" not found. Check definition files.").arg(value_list)) + self.pageContent.propertyTable.setItem(index, 1, QTableWidgetItem(value)) + + def insertSpinBox(self, index, value, informations): + """ + Inserts in the table at index a spinbox for an int, a long or an unsigned + long property setted to value. + """ + # int, long or undefined type property + spin_box = None + if bertos_utils.isLong(informations) or bertos_utils.isUnsignedLong(informations): + spin_box = QDoubleSpinBox() + spin_box.setDecimals(0) + else: + spin_box = QSpinBox() + self.pageContent.propertyTable.setCellWidget(index, 1, spin_box) + minimum = -32768 + maximum = 32767 + suff = "" + if bertos_utils.isLong(informations): + minimum = -2147483648 + maximum = 2147483647 + suff = "L" + elif bertos_utils.isUnsigned(informations): + minimum = 0 + maximum = 65535 + suff = "U" + elif bertos_utils.isUnsignedLong(informations): + minimum = 0 + maximum = 4294967295 + suff = "UL" + if "min" in informations: + minimum = int(informations["min"]) + if "max" in informations: + maximum = int(informations["max"]) + spin_box.setRange(minimum, maximum) + spin_box.setSuffix(suff) + spin_box.setValue(int(value.replace("L", "").replace("U", ""))) + self._control_group.addControl(index, spin_box) + + + def currentModule(self): + """ + Retuns the current module name. + """ + current_module = self.pageContent.moduleTree.currentItem() + # return only the child items + if current_module and current_module.parent(): + return unicode(current_module.text(0)) + else: + return None + + def moduleItem(self, module): + for top_level_index in range(self.pageContent.moduleTree.topLevelItemCount()): + top_level_item = self.pageContent.moduleTree.topLevelItem(top_level_index) + for child_index in range(top_level_item.childCount()): + child_item = top_level_item.child(child_index) + if unicode(child_item.text(0)) == module: + return child_item + return None + + def currentModuleConfigurations(self): + """ + Returns the current module configuration. + """ + return self.configurations(self.currentModule()) + + def currentProperty(self): + """ + Rerturns the current property from the property table. + """ + return qvariant_converter.getString(self.pageContent.propertyTable.item(self.pageContent.propertyTable.currentRow(), 0).data(Qt.UserRole)) + + def currentPropertyItem(self): + """ + Returns the QTableWidgetItem of the current property. + """ + return self.pageContent.propertyTable.item(self.pageContent.propertyTable.currentRow(), 0) + + def configurations(self, module): + """ + Returns the configuration for the selected module. + """ + configuration = [] + if module: + # On linux platform it seems that the behaviour of the focus + # changing is a bit different from the mac one. So if module is + # None then no configurations should be returned. + configuration = self.projectInfo("MODULES")[module]["configuration"] + if len(configuration) > 0: + return self.projectInfo("CONFIGURATIONS")[configuration] + else: + return {} + + def resetPropertyDescription(self): + """ + Resets the label for each property table entry. + """ + for index in range(self.pageContent.propertyTable.rowCount()): + property_name = qvariant_converter.getString(self.pageContent.propertyTable.item(index, 0).data(Qt.UserRole)) + # Awful solution! Needed because if the user change the module, the selection changed... + if property_name not in self.currentModuleConfigurations(): + break + self.pageContent.propertyTable.item(index, 0).setText(self.currentModuleConfigurations()[property_name]['brief']) + + def setBold(self, item, bold): + self.pageContent.moduleTree.blockSignals(True) + font = item.font(0) + font.setBold(bold) + item.setFont(0, font) + self.pageContent.moduleTree.blockSignals(False) + + def moduleSelected(self, selectedModule): + """ + Resolves the selection dependencies. + """ + try: + qApp.setOverrideCursor(Qt.WaitCursor) + modules = self.projectInfo("MODULES") + modules[selectedModule]["enabled"] = True + self.setProjectInfo("MODULES", modules) + depends = self.projectInfo("MODULES")[selectedModule]["depends"] + unsatisfied = [] + if self.pageContent.automaticFix.isChecked(): + unsatisfied = self.selectDependencyCheck(selectedModule) + if len(unsatisfied) > 0: + for module in unsatisfied: + modules = self.projectInfo("MODULES") + modules[module]["enabled"] = True + for category in range(self.pageContent.moduleTree.topLevelItemCount()): + item = self.pageContent.moduleTree.topLevelItem(category) + for child in range(item.childCount()): + if unicode(item.child(child).text(0)) in unsatisfied: + self.setBold(item.child(child), True) + self.setBold(item, True) + item.child(child).setCheckState(0, Qt.Checked) + finally: + qApp.restoreOverrideCursor() + + def moduleUnselected(self, unselectedModule): + """ + Resolves the unselection dependencies. + """ + try: + qApp.setOverrideCursor(Qt.WaitCursor) + modules = self.projectInfo("MODULES") + modules[unselectedModule]["enabled"] = False + self.setProjectInfo("MODULES", modules) + unsatisfied = [] + unsatisfied_params = [] + if self.pageContent.automaticFix.isChecked(): + unsatisfied, unsatisfied_params = self.unselectDependencyCheck(unselectedModule) + if len(unsatisfied) > 0 or len(unsatisfied_params) > 0: + message = [] + heading = self.tr("The module %1 is needed by").arg(unselectedModule) + message.append(heading) + module_list = ", ".join(unsatisfied) + param_list = ", ".join(["%s (%s)" %(param_name, module) for module, param_name in unsatisfied_params]) + if module_list: + message.append(QString(module_list)) + if module_list and param_list: + message.append(self.tr("and by")) + if param_list: + message.append(QString(param_list)) + message_str = QStringList(message).join(" ") + message_str.append(self.tr("\n\nDo you want to automatically fix these conflicts?")) + qApp.restoreOverrideCursor() + choice = QMessageBox.warning(self, self.tr("Dependency error"), message_str, QMessageBox.Yes | QMessageBox.No, QMessageBox.Yes) + qApp.setOverrideCursor(Qt.WaitCursor) + if choice == QMessageBox.Yes: + for module in unsatisfied: + modules = self.projectInfo("MODULES") + modules[module]["enabled"] = False + for category in range(self.pageContent.moduleTree.topLevelItemCount()): + item = self.pageContent.moduleTree.topLevelItem(category) + for child in range(item.childCount()): + if unicode(item.child(child).text(0)) in unsatisfied: + item.child(child).setCheckState(0, Qt.Unchecked) + for module, param in unsatisfied_params: + configuration_file = self.projectInfo("MODULES")[module]["configuration"] + configurations = self.projectInfo("CONFIGURATIONS") + configurations[configuration_file][param]["value"] = "0" + self.setProjectInfo("CONFIGURATIONS", configurations) + finally: + qApp.restoreOverrideCursor() + + def selectDependencyCheck(self, module): + """ + Returns the list of unsatisfied dependencies after a selection. + """ + unsatisfied = set() + modules = self.projectInfo("MODULES") + files = self.projectInfo("FILES") + configurations = self.projectInfo("CONFIGURATIONS").get(modules[module]["configuration"], {"paramlist": ()}) + conditional_deps = () + for i, param_name in configurations["paramlist"]: + information = configurations[param_name] + if information["informations"]["type"] == "boolean" and \ + information["value"] != "0" and \ + "conditional_deps" in information["informations"]: + + conditional_deps += information["informations"]["conditional_deps"] + + for dependency in modules[module]["depends"] + conditional_deps: + if dependency in modules and not modules[dependency]["enabled"]: + unsatisfied |= set([dependency]) + if dependency not in unsatisfied: + unsatisfied |= self.selectDependencyCheck(dependency) + if dependency not in modules: + if dependency in files: + files[dependency] += 1 + else: + files[dependency] = 1 + self.setProjectInfo("FILES", files) + return unsatisfied + + def unselectDependencyCheck(self, dependency): + """ + Returns the list of unsatisfied dependencies after an unselection. + """ + unsatisfied = set() + unsatisfied_params = set() + modules = self.projectInfo("MODULES") + for module, informations in modules.items(): + configurations = self.projectInfo("CONFIGURATIONS").get(informations["configuration"], {"paramlist": ()}) + conditional_deps = {} + for i, param_name in configurations["paramlist"]: + information = configurations[param_name] + if information["informations"]["type"] == "boolean" and information["value"] != "0" and "conditional_deps" in information["informations"]: + for dep in information["informations"]["conditional_deps"]: + if not dep in conditional_deps: + conditional_deps[dep] = [] + conditional_deps[dep].append((module, param_name)) + if dependency in informations["depends"] and informations["enabled"]: + unsatisfied |= set([module]) + if dependency not in unsatisfied: + tmp = self.unselectDependencyCheck(module) + unsatisfied |= tmp[0] + unsatisfied_params |= tmp[1] + if dependency in conditional_deps: + unsatisfied_params |= set(conditional_deps[dependency]) + return unsatisfied, unsatisfied_params + + def removeFileDependencies(self, module): + """ + Removes the files dependencies of the given module. + """ + modules = self.projectInfo("MODULES") + files = self.projectInfo("FILES") + dependencies = modules[module]["depends"] + for dependency in dependencies: + if dependency in files: + files[dependency] -= 1 + if files[dependency] == 0: + del files[dependency] + self.setProjectInfo("FILES", files) + +class QControlGroup(QObject): + """ + Simple class that permit to connect different signals of different widgets + with a slot that emit a signal. Permits to group widget and to understand which of + them has sent the signal. + """ + + def __init__(self): + QObject.__init__(self) + self._controls = {} + + def addControl(self, id, control): + """ + Add a control. + """ + self._controls[id] = control + if type(control) == QCheckBox: + self.connect(control, SIGNAL("stateChanged(int)"), lambda: self.stateChanged(id)) + elif type(control) == QSpinBox: + self.connect(control, SIGNAL("valueChanged(int)"), lambda: self.stateChanged(id)) + elif type(control) == QComboBox: + self.connect(control, SIGNAL("currentIndexChanged(int)"), lambda: self.stateChanged(id)) + elif type(control) == QDoubleSpinBox: + self.connect(control, SIGNAL("valueChanged(double)"), lambda: self.stateChanged(id)) + + def clear(self): + """ + Remove all the controls. + """ + self._controls = {} + + def stateChanged(self, id): + """ + Slot called when the value of one of the stored widget changes. It emits + another signal. + """ + self.emit(SIGNAL("stateChanged"), id) diff --git a/2.5/wizard/BOpenPage.py b/2.5/wizard/BOpenPage.py new file mode 100644 index 00000000..50063c98 --- /dev/null +++ b/2.5/wizard/BOpenPage.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os +import pickle + +from PyQt4.QtGui import * +from PyQt4.QtCore import * + +from BWizardPage import * +import bertos_utils + +from const import * + +class BOpenPage(BWizardPage): + """ + Initial page of the wizard. Permit to select the project name and the directory + where the project will be created. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/project_select.ui") + self.setTitle(self.tr("Open an existing BeRTOS project")) + + ## Overloaded BWizardPage methods ## + + def reloadData(self, previous_id=None): + """ + Overload of the BWizardPage reloadData method. + """ + project = unicode(QFileDialog.getOpenFileName(self, self.tr("Open project file"), os.path.expanduser("~"), self.tr("Project file (project.bertos)"))) + if project == "": + QApplication.instance().quit() + else: + QApplication.instance().project = pickle.loads(open(project, "r").read()) + self.pageContent.nameLabel.setText(os.path.basename(project.replace(os.sep + "project.bertos", ""))) + self.pageContent.dirLabel.setText(project) + + #### + diff --git a/2.5/wizard/BProject.py b/2.5/wizard/BProject.py new file mode 100644 index 00000000..366e9a75 --- /dev/null +++ b/2.5/wizard/BProject.py @@ -0,0 +1,635 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os +import fnmatch +import copy +import pickle +import shutil +import copytree + +import DefineException + +from LoadException import VersionException, ToolchainException + +import const + +from bertos_utils import ( + # Utility functions + isBertosDir, getTagSet, getInfos, updateConfigurationValues, + loadConfigurationInfos, loadDefineLists, loadModuleDefinition, + getCommentList, sub, + + # Project creation functions + projectFileGenerator, versionFileGenerator, loadPlugin, + mergeSources, + + # Custom exceptions + ParseError, SupportedException + ) +import bertos_utils + +from compatibility import updateProject + +class BProject(object): + """ + Simple class for store and retrieve project informations. + """ + + def __init__(self, project_file="", info_dict={}): + self.infos = {} + self._cached_queries = {} + self.edit = False + if project_file: + self.edit = True + self.loadBertosProject(project_file, info_dict) + + #--- Load methods (methods that loads data into project) ------------------# + + def loadBertosProject(self, project_file, info_dict): + project_dir = os.path.dirname(project_file) + project_data = pickle.loads(open(project_file, "r").read()) + updateProject(project_data) + # If PROJECT_NAME is not defined it use the directory name as PROJECT_NAME + # NOTE: this can throw an Exception if the user has changed the directory containing the project + self.infos["PROJECT_NAME"] = project_data.get("PROJECT_NAME", os.path.basename(project_dir)) + self.infos["PROJECT_PATH"] = os.path.dirname(project_file) + project_src_path = os.path.join(project_dir, project_data.get("PROJECT_SRC_PATH", project_data["PROJECT_NAME"])) + if project_src_path: + self.infos["PROJECT_SRC_PATH"] = project_src_path + + else: + # In projects created with older versions of the Wizard this metadata doesn't exist + self.infos["PROJECT_SRC_PATH"] = os.path.join(self.infos["PROJECT_PATH"], self.infos["PROJECT_NAME"]) + self.infos["PROJECT_HW_PATH"] = os.path.join(self.infos["PROJECT_PATH"], project_data.get("PROJECT_HW_PATH", self.infos["PROJECT_PATH"])) + + linked_sources_path = project_data["BERTOS_PATH"] + sources_abspath = os.path.abspath(os.path.join(project_dir, linked_sources_path)) + project_data["BERTOS_PATH"] = sources_abspath + + self._loadBertosSourceStuff(project_data["BERTOS_PATH"], info_dict.get("BERTOS_PATH", None)) + + self.infos["PRESET"] = project_data.get("PRESET", False) + + # For those projects that don't have a VERSION file create a dummy one. + if not isBertosDir(project_dir) and not self.is_preset: + version_file = open(os.path.join(const.DATA_DIR, "vtemplates/VERSION"), "r").read() + open(os.path.join(project_dir, "VERSION"), "w").write(version_file.replace("$version", "").strip()) + + self.loadSourceTree() + self._loadCpuStuff(project_data["CPU_NAME"], project_data["SELECTED_FREQ"]) + self._loadToolchainStuff(project_data["TOOLCHAIN"], info_dict.get("TOOLCHAIN", None)) + self.infos["OUTPUT"] = project_data["OUTPUT"] + self.loadModuleData(True) + self.setEnabledModules(project_data["ENABLED_MODULES"]) + + def _loadBertosSourceStuff(self, sources_path, forced_version=None): + if forced_version: + sources_path = forced_version + if os.path.exists(sources_path): + self.infos["BERTOS_PATH"] = sources_path + else: + raise VersionException(self) + + def _loadCpuStuff(self, cpu_name, cpu_frequency): + self.infos["CPU_NAME"] = cpu_name + cpu_info = self.getCpuInfos() + for cpu in cpu_info: + if cpu["CPU_NAME"] == cpu_name: + self.infos["CPU_INFOS"] = cpu + break + tag_list = getTagSet(cpu_info) + # Create, fill and store the dict with the tags + tag_dict = {} + for element in tag_list: + tag_dict[element] = False + infos = self.info("CPU_INFOS") + for tag in tag_dict: + if tag in infos["CPU_TAGS"] + [infos["CPU_NAME"], infos["TOOLCHAIN"]]: + tag_dict[tag] = True + else: + tag_dict[tag] = False + self.infos["ALL_CPU_TAGS"] = tag_dict + self.infos["SELECTED_FREQ"] = cpu_frequency + + def _loadToolchainStuff(self, toolchain, forced_toolchain=None): + toolchain = toolchain + if forced_toolchain: + toolchain = forced_toolchain + if os.path.exists(toolchain["path"]): + self.infos["TOOLCHAIN"] = toolchain + else: + raise ToolchainException(self) + + def loadProjectFromPreset(self, preset): + """ + Load a project from a preset. + NOTE: this is a stub. + """ + project_file = os.path.join(preset, "project.bertos") + project_data = pickle.loads(open(project_file, "r").read()) + self.loadSourceTree() + self._loadCpuStuff(project_data["CPU_NAME"], project_data["SELECTED_FREQ"]) + + # NOTE: this is a HACK!!! + # TODO: find a better way to reuse loadModuleData + preset_project_name = project_data.get("PROJECT_NAME", os.path.basename(preset)) + preset_prj_src_path = os.path.join(preset, project_data.get("PROJECT_SRC_PATH", os.path.join(preset, preset_project_name))) + preset_prj_hw_path = os.path.join(preset, project_data.get("PROJECT_HW_PATH", preset)) + + old_project_name = self.infos["PROJECT_NAME"] + old_project_path = self.infos["PROJECT_PATH"] + old_project_src_path = self.infos["PROJECT_SRC_PATH"] + old_project_hw_path = self.infos["PROJECT_HW_PATH"] + + self.infos["PROJECT_NAME"] = preset_project_name + self.infos["PROJECT_PATH"] = preset + self.infos["PROJECT_SRC_PATH"] = preset_prj_src_path + self.infos["PROJECT_HW_PATH"] = preset_prj_hw_path + + self.loadModuleData(True) + self.setEnabledModules(project_data["ENABLED_MODULES"]) + + self.infos["PROJECT_NAME"] = old_project_name + self.infos["PROJECT_PATH"] = old_project_path + self.infos["PROJECT_SRC_PATH"] = old_project_src_path + self.infos["PROJECT_HW_PATH"] = old_project_hw_path + # End of the ugly HACK! + + self.infos["PRESET_NAME"] = preset_project_name + self.infos["PRESET_PATH"] = preset + self.infos["PRESET_SRC_PATH"] = preset_prj_src_path + self.infos["PRESET_HW_PATH"] = preset_prj_hw_path + + def loadProjectPresets(self): + """ + Load the default presets (into the const.PREDEFINED_BOARDS_DIR). + """ + # NOTE: this method does nothing (for now). + preset_path = os.path.join(self.infos["BERTOS_PATH"], const.PREDEFINED_BOARDS_DIR) + preset_tree = {"children": []} + if os.path.exists(preset_path): + preset_tree = self._loadProjectPresetTree(preset_path) + self.infos["PRESET_TREE"] = preset_tree + + def _loadProjectPresetTree(self, path): + _tree = {} + _tree["info"] = self._loadPresetInfo(os.path.join(path, const.PREDEFINED_BOARD_SPEC_FILE)) + _tree["info"]["filename"] = os.path.basename(path) + _tree["info"]["path"] = path + _tree["children"] = {} + entries = set(os.listdir(path)) + for entry in entries: + _path = os.path.join(path, entry) + if os.path.isdir(_path): + sub_entries = set(os.listdir(_path)) + if const.PREDEFINED_BOARD_SPEC_FILE in sub_entries: + _tree["children"][_path] = self._loadProjectPresetTree(_path) + # Add into the info dict the dir type (dir/project) + if _tree["children"]: + _tree["info"]["type"] = "dir" + else: + _tree["info"]["type"] = "project" + return _tree + + def _loadPresetInfo(self, preset_spec_file): + D = {} + try: + execfile(preset_spec_file, {}, D) + except IOError, e: + pass + return D + + def loadModuleData(self, edit=False): + module_info_dict = {} + list_info_dict = {} + configuration_info_dict = {} + file_dict = {} + for filename, path in self.findDefinitions("*.h") + self.findDefinitions("*.c") + self.findDefinitions("*.s") + self.findDefinitions("*.S"): + comment_list = getCommentList(open(path + "/" + filename, "r").read()) + if len(comment_list) > 0: + module_info = {} + configuration_info = {} + try: + to_be_parsed, module_dict = loadModuleDefinition(comment_list[0]) + except ParseError, err: + raise DefineException.ModuleDefineException(path, err.line_number, err.line) + for module, information in module_dict.items(): + if "depends" not in information: + information["depends"] = () + information["depends"] += (filename.split(".")[0],) + information["category"] = os.path.basename(path) + + # Hack to remove 'bertos/' from the configuration file path. + # + # The new module information format substitute paths like 'bertos/cfg/config_file.h' + # with the relative path into the bertos directory ('cfg/config_file.h') + information["configuration"] = information["configuration"].replace("bertos/", "") + information["hw"] = [hw.replace("bertos/", "") for hw in information["hw"]] + + if "configuration" in information and len(information["configuration"]): + configuration = module_dict[module]["configuration"] + try: + cfg_file_path = os.path.join(self.bertos_srcdir, configuration) + configuration_info[configuration] = loadConfigurationInfos(cfg_file_path) + except ParseError, err: + raise DefineException.ConfigurationDefineException(cfg_file_path, err.line_number, err.line) + if edit: + try: + path = self.infos["PROJECT_SRC_PATH"] + cfg_file_path = os.path.join(path, configuration) + configuration_info[configuration] = updateConfigurationValues(configuration_info[configuration], loadConfigurationInfos(cfg_file_path)) + except ParseError, err: + raise DefineException.ConfigurationDefineException(cfg_file_path, err.line_number, err.line) + except IOError, err: + # The wizard can't find the file, use the default configuration + pass + module_info_dict.update(module_dict) + configuration_info_dict.update(configuration_info) + if to_be_parsed: + try: + list_dict = loadDefineLists(comment_list[1:]) + list_info_dict.update(list_dict) + except ParseError, err: + raise DefineException.EnumDefineException(path, err.line_number, err.line) + for tag in self.infos["CPU_INFOS"]["CPU_TAGS"]: + for filename, path in self.findDefinitions("*_" + tag + ".h"): + comment_list = getCommentList(open(path + "/" + filename, "r").read()) + list_info_dict.update(loadDefineLists(comment_list)) + self.infos["MODULES"] = module_info_dict + self.infos["LISTS"] = list_info_dict + self.infos["CONFIGURATIONS"] = configuration_info_dict + self.infos["FILES"] = file_dict + + def loadSourceTree(self): + """ + Index BeRTOS source and load it in memory. + """ + # Index only the BERTOS_PATH/bertos content + bertos_sources_dir = os.path.join(self.info("BERTOS_PATH"), "bertos") + file_dict = {} + if os.path.exists(bertos_sources_dir): + for element in os.walk(bertos_sources_dir): + for f in element[2]: + file_dict[f] = file_dict.get(f, []) + [element[0]] + self.infos["FILE_DICT"] = file_dict + + def reloadCpuInfo(self): + for cpu_info in self.getCpuInfos(): + if cpu_info["CPU_NAME"] == self.infos["CPU_NAME"]: + self.infos["CPU_INFOS"] = cpu_info + + #-------------------------------------------------------------------------# + + def createBertosProject(self): + # NOTE: Temporary hack. + if self.edit: + self._editBertosProject() + else: + if not self.from_preset: + self._newCustomBertosProject() + else: + self._newBertosProjectFromPreset() + + def _newBertosProject(self): + for directory in (self.maindir, self.srcdir, self.prjdir, self.cfgdir, self.hwdir): + self._createDirectory(directory) + # Write the project file + self._writeProjectFile(os.path.join(self.maindir, "project.bertos")) + # VERSION file + self._writeVersionFile(os.path.join(self.maindir, "VERSION")) + # Destination makefile + self._writeMakefile() + # Copy the sources + self._copySources(self.bertos_maindir, self.srcdir) + # Set properly the autoenabled parameters + self._setupAutoenabledParameters() + # Copy all the configuration files + self._writeCfgFiles(self.bertos_srcdir, self.cfgdir) + # Destination wizard mk file + self._writeWizardMkFile() + + def _newCustomBertosProject(self): + # Create/write/copy the common things + self._newBertosProject() + # Copy the clean hw files + self._createDirectory(self.hwdir) + # Copy all the hw files + self._writeHwFiles(self.bertos_srcdir, self.hwdir) + # Destination user mk file + self._writeUserMkFile() + # Destination main.c file + self._writeMainFile(self.prjdir + "/main.c") + # Create project files for selected plugins + self._createProjectFiles() + + def _newBertosProjectFromPreset(self): + # Create/write/copy the common things + self._newBertosProject() + + # Copy all the files and dirs except cfg/hw/*.mk + self._writeCustomSrcFiles() + + # Copy the hw files + self._writeAllPresetHwFiles(self.src_hwdir, self.hwdir) + + # Copyt the new *_user.mk file + self._writeUserMkFileFromPreset() + + # Create project files for selected plugins + self._createProjectFiles() + + def _editBertosProject(self): + # Write the project file + self._writeProjectFile(os.path.join(self.maindir, "project.bertos")) + if not self.is_preset: + # Generate this files only if the project isn't a preset + # VERSION file + self._writeVersionFile(os.path.join(self.maindir, "VERSION")) + # Destination makefile + self._writeMakefile() + # Merge sources + self._mergeSources(self.bertos_maindir, self.srcdir, self.old_srcdir) + # Copy all the hw files + self._writeHwFiles(self.bertos_srcdir, self.hwdir) + # Destination wizard mk file + self._writeWizardMkFile() + # Set properly the autoenabled parameters + self._setupAutoenabledParameters() + # Copy all the configuration files + self._writeCfgFiles(self.bertos_srcdir, self.cfgdir) + if not self.is_preset: + # Create project files for selected plugins only if the project isn't a preset + self._createProjectFiles() + + def _createProjectFiles(self): + # Files for selected plugins + relevants_files = {} + for plugin in self.infos["OUTPUT"]: + module = loadPlugin(plugin) + relevants_files[plugin] = module.createProject(self) + self.infos["RELEVANT_FILES"] = relevants_files + + def _writeVersionFile(self, filename): + if not self.edit or self.old_srcdir: + version_file = open(os.path.join(const.DATA_DIR, "vtemplates/VERSION"), "r").read() + open(filename, "w").write(versionFileGenerator(self, version_file)) + + def _writeProjectFile(self, filename): + f = open(filename, "w") + f.write(projectFileGenerator(self)) + f.close() + + def _writeMakefile(self): + bertos_utils.makefileGenerator(self) + + def _writeUserMkFile(self): + bertos_utils.userMkGenerator(self) + + def _writeUserMkFileFromPreset(self): + bertos_utils.userMkGeneratorFromPreset(self) + + def _writeWizardMkFile(self): + bertos_utils.mkGenerator(self) + + def _writeMainFile(self, filename): + main = open(os.path.join(const.DATA_DIR, "srctemplates/main.c"), "r").read() + open(filename, "w").write(main) + + def _writeHwFiles(self, source_dir, destination_dir): + for module, information in self.infos["MODULES"].items(): + for hwfile in information["hw"]: + if hwfile == "": + continue + string = open(source_dir + "/" + hwfile, "r").read() + hwfile_path = destination_dir + "/" + os.path.basename(hwfile) + if not self.edit or not os.path.exists(hwfile_path): + # If not in editing mode it copies all the hw files. If in + # editing mode it copies only the files that don't exist yet + open(os.path.join(destination_dir,os.path.basename(hwfile)), "w").write(string) + + def _writeAllPresetHwFiles(self, source_dir, destination_dir): + """ + Copy all but directories contained into the preset hw directory. + It's needed because some presets need custom hw files not defined with + Wizard directives into modules... + """ + source_dir = os.path.join(source_dir, "hw") + for f in os.listdir(source_dir): + abspath = os.path.join(source_dir, f) + if not os.path.isdir(abspath): + # Exlude directories from the copy! + hw_file = open(os.path.join(source_dir, f), 'r').read() + open(os.path.join(destination_dir, f), 'w').write(hw_file) + + def _writeCfgFiles(self, source_dir, destination_dir): + for configuration, information in self.infos["CONFIGURATIONS"].items(): + string = open(source_dir + "/" + configuration, "r").read() + for start, parameter in information["paramlist"]: + infos = information[parameter] + value = infos["value"] + if "unsigned" in infos["informations"] and infos["informations"]["unsigned"]: + value += "U" + if "long" in infos["informations"] and infos["informations"]["long"]: + value += "L" + string = sub(string, parameter, value) + f = open(os.path.join(destination_dir, os.path.basename(configuration)), "w") + f.write(string) + f.close() + + def _writeCustomSrcFiles(self): + origin = self.infos["PRESET_SRC_PATH"] + # Files to be ignored (all project files, cfg dir, wizard mk file, all global ignored dirs) + project_related_stuff = ( + "cfg", + "hw", + self.infos["PRESET_NAME"] + ".mk", + self.infos["PRESET_NAME"] + "_user.mk", + "project.bertos", + self.infos["PRESET_NAME"] + ".project", + self.infos["PRESET_NAME"] + ".workspace", + ) + const.IGNORE_LIST + for element in os.listdir(origin): + if element not in project_related_stuff: + full_path = os.path.join(origin, element) + if os.path.isdir(full_path): + copytree.copytree(full_path, os.path.join(self.prjdir, element), ignore_list=const.IGNORE_LIST) + else: + shutil.copy(full_path, self.prjdir) + + def _setupAutoenabledParameters(self): + for module, information in self.infos["MODULES"].items(): + if "configuration" in information and information["configuration"] != "": + configurations = self.infos["CONFIGURATIONS"] + configuration = configurations[information["configuration"]] + for start, parameter in configuration["paramlist"]: + if "type" in configuration[parameter]["informations"] and configuration[parameter]["informations"]["type"] == "autoenabled": + configuration[parameter]["value"] = "1" if information["enabled"] else "0" + self.infos["CONFIGURATIONS"] = configurations + + # Project related properties + @property + def maindir(self): + return self.infos.get("PROJECT_PATH", None) + + @property + def srcdir(self): + if self.maindir: + return os.path.join(self.maindir, "bertos") + else: + return None + + @property + def prjdir(self): + return self.infos.get("PROJECT_SRC_PATH", None) + + @property + def hwdir(self): + if self.prjdir: + return os.path.join(self.prjdir, "hw") + else: + return None + + @property + def cfgdir(self): + if self.prjdir: + return os.path.join(self.prjdir, "cfg") + else: + return None + + @property + def old_srcdir(self): + return self.infos.get("OLD_BERTOS_PATH", None) + + # BeRTOS sources related properties + @property + def bertos_maindir(self): + return self.infos.get("BERTOS_PATH", None) + + @property + def bertos_srcdir(self): + if self.bertos_maindir: + return os.path.join(self.bertos_maindir, "bertos") + else: + return None + + @property + def src_hwdir(self): + if self.from_preset: + return os.path.join(self.infos["PRESET_PATH"], self.infos["PRESET_HW_PATH"]) + else: + return self.bertos_maindir + + @property + def from_preset(self): + return self.infos.get("PROJECT_FROM_PRESET", False) + + @property + def is_preset(self): + return self.infos.get("PRESET", False) + + def _createDirectory(self, directory): + if not directory: + return + if os.path.isdir(directory): + shutil.rmtree(directory, True) + os.makedirs(directory) + + def _copySources(self, origin, destination): + # If not in editing mode it copies all the bertos sources in the /bertos subdirectory of the project + shutil.rmtree(destination, True) + copytree.copytree(origin + "/bertos", destination, ignore_list=const.IGNORE_LIST) + + def _mergeSources(self, origin, destination, old_sources_dir): + if old_sources_dir: + mergeSources(destination, origin, old_sources_dir) + + def setInfo(self, key, value): + """ + Store the given value with the name key. + """ + self.infos[key] = value + + def info(self, key, default=None): + """ + Retrieve the value associated with the name key. + """ + if key in self.infos: + return copy.deepcopy(self.infos[key]) + return default + + def getCpuInfos(self): + cpuInfos = [] + for definition in self.findDefinitions(const.CPU_DEFINITION): + cpuInfos.append(getInfos(definition)) + return cpuInfos + + def searchFiles(self, filename): + file_dict = self.infos["FILE_DICT"] + return [(filename, dirname) for dirname in file_dict.get(filename, [])] + + def findDefinitions(self, ftype): + # Maintain a cache for every scanned BERTOS_PATH + definitions_dict = self._cached_queries.get(self.infos["BERTOS_PATH"], {}) + definitions = definitions_dict.get(ftype, None) + if definitions is not None: + return definitions + file_dict = self.infos["FILE_DICT"] + definitions = [] + for filename in file_dict: + if fnmatch.fnmatch(filename, ftype): + definitions += [(filename, dirname) for dirname in file_dict.get(filename, [])] + + # If no cache for the current BERTOS_PATH create an empty one + if not definitions_dict: + self._cached_queries[self.infos["BERTOS_PATH"]] = {} + # Fill the empty cache with the result + self._cached_queries[self.infos["BERTOS_PATH"]][ftype] = definitions + return definitions + + def setEnabledModules(self, enabled_modules): + modules = self.infos["MODULES"] + files = {} + for module, information in modules.items(): + information["enabled"] = module in enabled_modules + if information["enabled"]: + for dependency in information["depends"]: + if not dependency in modules: + files[dependency] = files.get(dependency, 0) + 1 + self.infos["MODULES"] = modules + self.infos["FILES"] = files + + def __repr__(self): + return "%s" %(id(self), repr(self.infos)) diff --git a/2.5/wizard/BProjectPresets.py b/2.5/wizard/BProjectPresets.py new file mode 100644 index 00000000..9afed4f4 --- /dev/null +++ b/2.5/wizard/BProjectPresets.py @@ -0,0 +1,218 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of slimqc. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4 import uic + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +from BWizardPage import BWizardPage + +from BCreationPage import BCreationPage +from BToolchainPage import BToolchainPage + +from bertos_utils import _cmp +from toolchain_manager import ToolchainManager + +import const +import qvariant_converter + +class BProjectPresetsPage(QWidget): + def __init__(self, preset_data, parent=None): + QWidget.__init__(self, parent) + self.pageContent = uic.loadUi(os.path.join(const.DATA_DIR, const.UI_LOCATION, "preset_page.ui"), None) + self.project = QApplication.instance().project + self.settings = QApplication.instance().settings + self.preset_data = preset_data + layout = QVBoxLayout() + layout.addWidget(self.pageContent) + self.setLayout(layout) + self.setupUi() + self.connectSignals() + + def setupUi(self): + self.pageContent.presetList.clear() + self.pageContent.categoryDescription.setText(self.preset_data["info"].get("description", "")) + for preset in sorted(self.preset_data["children"].values(), _cmp): + item_name = preset["info"].get("name", preset["info"]["filename"]) + item_icon = os.path.join(preset["info"]["path"], const.PREDEFINED_BOARD_ICON_FILE) + if not os.path.exists(item_icon): + item_icon = const.PREDEFINED_BOARD_DEFAULT_PROJECT_ICON + item_icon = QIcon(item_icon) + item = QListWidgetItem(item_icon, item_name) + item.setData(Qt.UserRole, qvariant_converter.convertString(preset["info"]["path"])) + self.pageContent.presetList.addItem(item) + self.pageContent.presetList.setCurrentRow(0) + self.updateUi() + + def connectSignals(self): + self.connect(self.pageContent.presetList, SIGNAL("currentItemChanged(QListWidgetItem *, QListWidgetItem*)"), self.updateUi) + self.connect(self.pageContent.presetList, SIGNAL("currentItemChanged(QListWidgetItem *, QListWidgetItem*)"), self, SIGNAL("completeChanged()")) + + def updateUi(self): + if self.selected: + preset_path = qvariant_converter.getString(self.selected.data(Qt.UserRole)) + preset = self.preset_data["children"][preset_path] + description = preset["info"].get("description", "") + path = unicode(QUrl.fromLocalFile(preset_path).toString()) + description = description.replace("$path", path) + self.pageContent.descriptionArea.setHtml(description) + + @property + def selected(self): + return self.pageContent.presetList.currentItem() + + +class BProjectPresets(BWizardPage): + def __init__(self): + BWizardPage.__init__(self, const.UI_LOCATION + "/project_presets.ui") + + ## Overloaded QWizardPage methods ## + + def isComplete(self): + preset_path = self.selected_path + if preset_path: + self.setProjectInfo("PROJECT_PRESET", preset_path) + self.setProjectInfo("BASE_MODE", not self.advanced) + return True + else: + self.setProjectInfo("PROJECT_PRESET", None) + return False + + def validatePage(self): + """ + This hack permits to load the preset once, when the user go press the + Next button. + """ + preset_path = self.selected_path + try: + QApplication.instance().setOverrideCursor(Qt.WaitCursor) + self.project.loadProjectFromPreset(preset_path) + self.setProjectInfo("PRESET_LOADED", True) + finally: + QApplication.instance().restoreOverrideCursor() + # Return always True, this is a fake validation. + return True + + def nextId(self): + """ + Overload of the QWizardPage nextId method. + """ + # Route to Toolchain page if the user select advanced + # or to Output page if the user select base + if self.advanced: + return self.wizard().pageIndex(BToolchainPage) + else: + cpu_info = self.projectInfo("CPU_INFOS") + if cpu_info: + target = cpu_info["TOOLCHAIN"] + # Try to find a suitable toolchain automatically + tm = ToolchainManager() + suitable_toolchains = tm.suitableToolchains(target) + if len(suitable_toolchains) == 1: + toolchain = suitable_toolchains.pop() + toolchain_info = tm._validateToolchain(toolchain) + toolchain_info["path"] = toolchain + self.setProjectInfo("TOOLCHAIN", toolchain_info) + return self.wizard().pageIndex(BCreationPage) + else: + return self.wizard().pageIndex(BToolchainPage) + else: + # It seems that the nextId method is called before the + # reloadData one (that is called after the page changing. + # + # TODO: fix this awful code lines + target = None + return self.wizard().pageIndex(BToolchainPage) + + #### + + ## Overloaded BWizardPage methods ## + + def reloadData(self, previous_id=None): + if not self.projectInfo("PRESET_LOADED"): + preset_path = self.projectInfo("PROJECT_BOARD") + preset_tree = self.projectInfo("PRESET_TREE") + preset_list = preset_tree["children"][preset_path]["children"] + preset_list = sorted(preset_list.values(), _cmp) + self.setTitle(self.tr("Select the project template for %1").arg(preset_tree["children"][preset_path]["info"].get("name", preset_tree["children"][preset_path]["info"]["filename"]))) + self.setupTabs(preset_list) + + def connectSignals(self): + self.connect(self.pageContent.boardTabWidget, SIGNAL("currentChanged(int)"), self, SIGNAL("completeChanged()")) + + #### + + ## Slots ## + #### + + def setupTabs(self, preset_list): + self.pageContent.boardTabWidget.clear() + for preset in preset_list: + icon = os.path.join(preset["info"]["path"], ".icon.png") + preset_page = BProjectPresetsPage(preset) + if os.path.exists(icon): + self.pageContent.boardTabWidget.addTab(preset_page, QIcon(icon), preset["info"].get("name", preset["info"]["filename"])) + else: + self.pageContent.boardTabWidget.addTab(preset_page, preset["info"].get("name", preset["info"]["filename"])) + self.connect(preset_page, SIGNAL("completeChanged()"), self, SIGNAL("completeChanged()")) + + @property + def advanced(self): + if self.selected_data: + return self.selected_data["info"].get("advanced", False) + else: + return None + + @property + def selected_path(self): + current_widget = self.pageContent.boardTabWidget.currentWidget() + preset_path = None + if current_widget: + current_item = current_widget.pageContent.presetList.currentItem() + if current_item: + preset_path = current_item.data(Qt.UserRole) + preset_path = qvariant_converter.getString(preset_path) + return preset_path + + @property + def selected_data(self): + if self.selected_path: + current_widget = self.pageContent.boardTabWidget.currentWidget() + return current_widget.preset_data["children"][self.selected_path] + else: + return None diff --git a/2.5/wizard/BStartPage.py b/2.5/wizard/BStartPage.py new file mode 100644 index 00000000..2d633f80 --- /dev/null +++ b/2.5/wizard/BStartPage.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +from PyQt4.QtCore import * +from PyQt4.QtGui import * +import PyQt4.uic as uic + +from const import * + +class BStartPage(QDialog): + + def __init__(self): + QDialog.__init__(self) + self.setupUi() + self.connectSignals() + self.setWindowTitle(self.tr("Create or edit a BeRTOS project")) + self.initializeButtons() + + def setupUi(self): + self.content = uic.loadUi(UI_LOCATION + "/start.ui", None) + self.setWindowIcon(QIcon(":/images/appicon.png")) + layout = QVBoxLayout() + layout.addWidget(self.content) + self.setLayout(layout) + + def connectSignals(self): + self.connect(self.content.newButton, SIGNAL("clicked()"), self.newProject) + self.connect(self.content.editButton, SIGNAL("clicked()"), self.editProject) + + def initializeButtons(self): + self.button_group = QButtonGroup() + self.button_group.addButton(self.content.newButton) + self.button_group.addButton(self.content.editButton) + self.button_group.setExclusive(True) + + def newProject(self): + self.close() + self.emit(SIGNAL("newProject")) + + def editProject(self): + self.close() + self.emit(SIGNAL("editProject")) diff --git a/2.5/wizard/BToolchainPage.py b/2.5/wizard/BToolchainPage.py new file mode 100644 index 00000000..914ebf80 --- /dev/null +++ b/2.5/wizard/BToolchainPage.py @@ -0,0 +1,281 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os +import collections + +from BWizardPage import * +from BCreationPage import BCreationPage + +import BToolchainSearch +import bertos_utils +import qvariant_converter + +from toolchain_manager import ToolchainManager + +from const import * + +class BToolchainPage(BWizardPage): + """ + Page of the wizard that permits to choose the toolchain to use for the + project. + """ + + def __init__(self): + BWizardPage.__init__(self, UI_LOCATION + "/toolchain_select.ui") + self.setTitle(self.tr("Select toolchain")) + self.setSubTitle(self.tr("You can look for more toolchains in your system by pressing the \"Search\" button, or manually add them with the \"+\" button")) + self._valid_items = [] + self._toolchain_manager = ToolchainManager() + + ## Overloaded QWizardPage methods. ## + + def isComplete(self): + """ + Overload of the QWizard isComplete method. + """ + if self.pageContent.toolchainList.currentRow() != -1: + self.setProjectInfo("TOOLCHAIN", + qvariant_converter.getStringDict(self.pageContent.toolchainList.currentItem().data(Qt.UserRole))) + return True + else: + return False + + def nextId(self): + """ + Overload of the QWizardPage nextId method. + """ + # Route to Output page if it's a predefined easy project. + if self.projectInfo("PROJECT_FROM_PRESET") and self.projectInfo("BASE_MODE"): + return self.wizard().pageIndex(BCreationPage) + else: + return QWizardPage.nextId(self) + + #### + + ## Overloaded BWizardPage methods. ## + + def setupUi(self): + """ + Sets up the user interface. + """ + self.pageContent.infoLabel.setVisible(False) + + def connectSignals(self): + """ + Connects the signals with the related slots. + """ + self.connect(self.pageContent.toolchainList, SIGNAL("currentItemChanged(QListWidgetItem *, QListWidgetItem*)"), self.selectionChanged) + self.connect(self.pageContent.addButton, SIGNAL("clicked()"), self.addToolchain) + self.connect(self.pageContent.removeButton, SIGNAL("clicked()"), self.removeToolchain) + self.connect(self.pageContent.searchButton, SIGNAL("clicked()"), self.searchToolchain) + self.connect(self.pageContent.checkButton, SIGNAL("clicked()"), self.validateAllToolchains) + + def reloadData(self, previous_id=None): + """ + Overload of the BWizard reloadData method. + """ + if previous_id is None or previous_id < self.wizard().currentId(): + self._clearList() + self.setupUi() + self._populateToolchainList() + if len(self._valid_items) >= 1: + self.pageContent.toolchainList.setCurrentItem(self._valid_items[0]) + + #### + + ## Slots ## + + def selectionChanged(self): + """ + Slot called when the user click on an entry of the toolchain list. + """ + if self.pageContent.toolchainList.currentRow() != -1: + infos = collections.defaultdict(lambda: unicode("not defined")) + infos.update(qvariant_converter.getStringDict(self.pageContent.toolchainList.currentItem().data(Qt.UserRole))) + self.pageContent.infoLabel.setText("GCC " + infos["version"] + " (" + infos["build"] + ")\nTarget: " + infos["target"] + "\nPath: " + os.path.normpath(infos["path"])) + self.pageContent.infoLabel.setVisible(True) + if self.isDefaultToolchain(infos): + self.disableRemoveButton() + else: + self.enableRemoveButton() + self.emit(SIGNAL("completeChanged()")) + + def addToolchain(self): + """ + Slot called when the user adds manually a toolchain. + """ + sel_toolchain = unicode(QFileDialog.getOpenFileName(self, self.tr("Choose the toolchain"), "")) + if sel_toolchain != "": + item = QListWidgetItem(sel_toolchain) + item.setData(Qt.UserRole, qvariant_converter.convertStringDict({"path": sel_toolchain})) + self.pageContent.toolchainList.addItem(item) + self._toolchain_manager.addToolchain(sel_toolchain) + + def removeToolchain(self): + """ + Slot called when the user removes manually a toolchain. + """ + if self.pageContent.toolchainList.currentRow() != -1: + item = self.pageContent.toolchainList.takeItem(self.pageContent.toolchainList.currentRow()) + toolchain = qvariant_converter.getStringDict(item.data(Qt.UserRole))["path"] + self._toolchain_manager.removeToolchain(toolchain) + + def searchToolchain(self): + """ + Slot called when the user clicks on the 'search' button. It opens the + toolchain search dialog. + """ + search = BToolchainSearch.BToolchainSearch() + self.connect(search, SIGNAL("accepted()"), self._search) + search.exec_() + + def validateAllToolchains(self): + """ + Slot called when the user clicks on the validate button. It starts the + toolchain validation procedure for all the toolchains. + """ + try: + QApplication.instance().setOverrideCursor(Qt.WaitCursor) + for i in range(self.pageContent.toolchainList.count()): + self.validateToolchain(i) + finally: + QApplication.instance().restoreOverrideCursor() + + #### + + def _populateToolchainList(self): + """ + Fills the toolchain list with the toolchains stored in the QSettings. + """ + self.pageContent.toolchainList.clear() + self._valid_items = [] + toolchains = self._toolchain_manager.predefined_toolchains + self._toolchain_manager.toolchains + sel_toolchain = self.projectInfo("TOOLCHAIN") + for key, value in toolchains: + if os.path.exists(key): + item = QListWidgetItem(key) + item_data = {"path":key} + if value: + item_data.update(value) + item.setData(Qt.UserRole, qvariant_converter.convertStringDict(item_data)) + self.pageContent.toolchainList.addItem(item) + if sel_toolchain and sel_toolchain["path"] == key: + self.pageContent.toolchainList.setCurrentItem(item) + if value is not None: + self.validateToolchain(self.pageContent.toolchainList.row(item)) + + def currentToolchain(self): + selected_toolchain = qvariant_converter.getStringDict(self.pageContent.toolchainList.currentItem().data(Qt.UserRole)) + return selected_toolchain + + def _clearList(self): + """ + Removes all the toolchain from the list. + """ + self.pageContent.toolchainList.clear() + + def _search(self): + """ + Searches for toolchains in the stored directories, and stores them in the + QSettings. + """ + dir_list = self.searchDirList() + if self.pathSearch(): + dir_list += [element for element in bertos_utils.getSystemPath()] + _toolchain_dict = self._toolchain_manager.storedToolchainDict() + toolchain_list = bertos_utils.findToolchains(dir_list) + for toolchain in toolchain_list: + self._toolchain_manager.addToolchain(toolchain, _toolchain_dict.get(toolchain, False)) + self._populateToolchainList() + self.showMessage(self.tr("Toolchain search result."), self.tr("%1 toolchains found").arg(len(toolchain_list))) + + def _validItem(self, index, infos): + """ + Sets the item at index as a valid item and associates the given info to it. + """ + item = self.pageContent.toolchainList.item(index) + new_data = qvariant_converter.getStringDict(self.pageContent.toolchainList.item(index).data(Qt.UserRole)) + new_data.update(infos) + item.setData(Qt.UserRole, qvariant_converter.convertStringDict(new_data)) + needed = self.projectInfo("CPU_INFOS") + if "target" in infos and infos["target"].find(needed["TOOLCHAIN"]) != -1: + item.setIcon(QIcon(":/images/ok.png")) + self._valid_items.append(item) + else: + item.setIcon(QIcon(":/images/warning.png")) + if "version" in infos and "target" in infos: + item.setText("GCC " + infos["version"] + " - " + infos["target"].strip()) + + def _invalidItem(self, index): + """ + Sets the item at index as an invalid item. + """ + item = self.pageContent.toolchainList.item(index) + item.setIcon(QIcon(":/images/error.png")) + + def validateToolchain(self, i): + """ + Toolchain validation procedure. + """ + filename = qvariant_converter.getStringDict(self.pageContent.toolchainList.item(i).data(Qt.UserRole))["path"] + info = self._toolchain_manager.validateToolchain(filename) + + # Add the item in the list with the appropriate associate data. + if info: + self._validItem(i, info) + else: + self._invalidItem(i) + + def isDefaultToolchain(self, toolchain): + """ + Returns True if the given toolchain is one of the default toolchains. + """ + return toolchain["path"] in self._toolchain_manager._predefined_toolchain_set + + def disableRemoveButton(self): + """ + Disable the remove button. + """ + self.pageContent.removeButton.setEnabled(False) + + def enableRemoveButton(self): + """ + Enable the remove button. + """ + self.pageContent.removeButton.setEnabled(True) + + def currentItem(self): + return self.pageContent.toolchainList.currentItem() diff --git a/2.5/wizard/BToolchainSearch.py b/2.5/wizard/BToolchainSearch.py new file mode 100644 index 00000000..e76157a8 --- /dev/null +++ b/2.5/wizard/BToolchainSearch.py @@ -0,0 +1,134 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtCore import * +from PyQt4.QtGui import * +import PyQt4.uic as uic + +import qvariant_converter + +import const + +class BToolchainSearch(QDialog): + """ + Dialog that permits to choice the settings for the toolchain search procedure. + """ + + def __init__(self): + QDialog.__init__(self) + self._setupUi() + self._connectSignals() + self.setWindowTitle(self.tr("Toolchain search page")) + + def _setupUi(self): + """ + Sets up the user interface. + """ + self.content = uic.loadUi(os.path.join(const.DATA_DIR, const.UI_LOCATION, "toolchain_search.ui"), None) + layout = QVBoxLayout() + layout.addWidget(self.content) + self.setLayout(layout) + self._populateDirList() + self._setPathSearch() + self._setSearchButton() + + def _connectSignals(self): + """ + Connects the signals with the related slots. + """ + self.connect(self.content.pathBox, SIGNAL("stateChanged(int)"), self._stateChanged) + self.connect(self.content.addButton, SIGNAL("clicked()"), self._addDir) + self.connect(self.content.removeButton, SIGNAL("clicked()"), self._removeDir) + self.connect(self.content.cancelButton, SIGNAL("clicked()"), self.reject) + self.connect(self.content.searchButton, SIGNAL("clicked()"), self.accept) + + def _setSearchButton(self): + """ + Toggles the 'searchButton' evaluating the settings. + """ + self.content.searchButton.setDefault(True) + self.content.searchButton.setEnabled(self.content.pathBox.isChecked() or self.content.customDirList.count() != 0) + + def _populateDirList(self): + """ + Fills the dir list with the directories stored in the QSettings. + """ + search_dir_list = qvariant_converter.getStringList(QApplication.instance().settings.value("search_dir_list")) + for element in search_dir_list: + item = QListWidgetItem(element) + self.content.customDirList.addItem(item) + + def _setPathSearch(self): + """ + Sets the path search checkbox to the stored value. + """ + pathSearch = qvariant_converter.getBool(QApplication.instance().settings.value(QString("path_search"))) + self.content.pathBox.setChecked(pathSearch) + + def _stateChanged(self, state): + """ + Slot called when the path search checkbox state changes. Stores the value in the QSettings. + """ + QApplication.instance().settings.setValue(QString("path_search"), QVariant(state != 0)) + self._setSearchButton() + + def _addDir(self): + """ + Slot called when the user adds a dir. + """ + directory = QFileDialog.getExistingDirectory(self, self.tr("Open Directory"), "", QFileDialog.ShowDirsOnly) + if not directory.isEmpty(): + directory = unicode(directory) + item = QListWidgetItem(directory) + self.content.customDirList.addItem(item) + search_dir_list = qvariant_converter.getStringList(QApplication.instance().settings.value("search_dir_list")) + search_dir_list = set(search_dir_list + [directory]) + QApplication.instance().settings.setValue(QString("search_dir_list"), qvariant_converter.convertStringList(list(search_dir_list))) + self._setSearchButton() + + def _removeDir(self): + """ + Slot called when the user removes a dir. + """ + if self.content.customDirList.currentRow() != -1: + item = self.content.customDirList.takeItem(self.content.customDirList.currentRow()) + search_dir_list = qvariant_converter.getStringList(QApplication.instance().settings.value(QString("search_dir_list"))) + search_dir_list = set(search_dir_list) + search_dir_list.remove(unicode(item.text())) + QApplication.instance().settings.setValue(QString("search_dir_list"), qvariant_converter.convertStringList(list(search_dir_list))) + self._setSearchButton() + diff --git a/2.5/wizard/BVersionPage.py b/2.5/wizard/BVersionPage.py new file mode 100644 index 00000000..addc2960 --- /dev/null +++ b/2.5/wizard/BVersionPage.py @@ -0,0 +1,259 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtGui import * +from BWizardPage import * +import bertos_utils +import qvariant_converter + +from const import * + +class BVersionPage(BWizardPage): + """ + Page of the wizard that permits to choose which BeRTOS version the user wants + to use. This page show some pieces of information about the version. + """ + + def __init__(self, edit=False): + self._edit = edit + BWizardPage.__init__(self, UI_LOCATION + "/bertos_versions.ui") + self.setTitle(self.tr("Select BeRTOS version")) + self.setSubTitle(self.tr("Your project will be created with the specified BeRTOS version")) + + ## Overloaded QWizardPage methods ## + + def isComplete(self): + """ + Overload of the QWizardPage isComplete method. + """ + if self.pageContent.versionList.currentRow() != -1: + sources_path = qvariant_converter.getString(self.pageContent.versionList.currentItem().data(Qt.UserRole)) + # Remove the trailing slash + if sources_path.endswith(os.sep): + sources_path = sources_path[:-1] + self.setProjectInfo("BERTOS_PATH", sources_path) + return True + else: + return False + + #### + + ## Overloaded BWizardPage methods ## + + def connectSignals(self): + """ + Overload of the BWizardPage connectSignals method. + """ + self.connect(self.pageContent.versionList, SIGNAL("currentItemChanged(QListWidgetItem *, QListWidgetItem*)"), self.rowChanged) + self.connect(self.pageContent.addButton, SIGNAL("clicked()"), self.addVersion) + self.connect(self.pageContent.removeButton, SIGNAL("clicked()"), self.removeVersion) + # Fake signal connection for the update button + self.connect(self.pageContent.updateButton, SIGNAL("clicked()"), self.updateClicked) + + def reloadData(self, previous_id=None): + """ + Overload of the BWizardPage reloadData method. + """ + self.resetVersionList() + self.pageContent.versionList.setCurrentRow(-1) + self.fillVersionList() + + def setupUi(self): + """ + Overload of the BWizardPage setupUi method. + """ + self.pageContent.updateButton.setVisible(False) + + #### + + ## Slots ## + + def addVersion(self): + """ + Slot called when the user add a BeRTOS version. + """ + directory = QFileDialog.getExistingDirectory(self, self.tr("Choose a directory"), "", QFileDialog.ShowDirsOnly | QFileDialog.DontResolveSymlinks) + if not directory.isEmpty(): + self.storeVersion(unicode(directory)) + self.pageContent.versionList.clear() + self.fillVersionList() + self.emit(SIGNAL("completeChanged()")) + + def removeVersion(self): + """ + Slot called when the user remove a BeRTOS version. + """ + item = self.pageContent.versionList.takeItem(self.pageContent.versionList.currentRow()) + if item: + self.deleteVersion(qvariant_converter.getString(item.data(Qt.UserRole))) + self.emit(SIGNAL("completeChanged()")) + + def rowChanged(self): + """ + Slot called when the user select an entry from the version list. + """ + if self.isDefaultVersion(self.currentVersion()): + self.disableRemoveButton() + else: + self.enableRemoveButton() + self.emit(SIGNAL("completeChanged()")) + + def updateClicked(self): + """ + Slot called when the user clicks on the 'update' button. It checks for + update (TO BE IMPLEMENTED). + """ + pass + + #### + + def storeVersion(self, directory): + """ + Stores the directory selected by the user in the QSettings. + """ + versions = self.versions() + versions = set(versions + [directory]) + self.setVersions(list(versions)) + + def deleteVersion(self, directory): + """ + Removes the given directory from the QSettings. + """ + versions = [os.path.normpath(path) for path in self.versions()] + versions.remove(os.path.normpath(directory)) + self.setVersions(versions) + + def resetVersionList(self): + """ + Remove all the version entries from the list. + """ + self.pageContent.versionList.clear() + + def insertListElement(self, directory): + """ + Inserts the given directory in the version list and returns the + inserted item. + """ + if bertos_utils.isBertosDir(directory): + item = QListWidgetItem(QIcon(":/images/ok.png"), bertos_utils.bertosVersion(directory) + " (\"" + os.path.normpath(directory) + "\")") + item.setData(Qt.UserRole, qvariant_converter.convertString(directory)) + self.pageContent.versionList.addItem(item) + return item + elif len(directory) > 0: + item = QListWidgetItem(QIcon(":/images/warning.png"), "UNKNOWN" + " (\"" + os.path.normpath(directory) + "\")") + item.setData(Qt.UserRole, qvariant_converter.convertString(directory)) + self.pageContent.versionList.addItem(item) + return item + + def fillVersionList(self): + """ + Fills the version list with all the BeRTOS versions founded in the QSettings. + """ + versions = set([]) + if os.name == "nt": + import winreg_importer + versions |= set([os.path.normpath(dir) for dir in winreg_importer.getBertosDirs()]) + versions |= set([os.path.normpath(dir) for dir in self.versions()]) + selected = self.projectInfo("BERTOS_PATH") + for directory in versions: + item = self.insertListElement(directory) + if selected and selected == directory: + self.setCurrentItem(item) + if not selected: + latest_version_item = self.latestVersionItem() + if latest_version_item: + self.setCurrentItem(latest_version_item) + + def disableRemoveButton(self): + """ + Disable the Remove button. + """ + self.pageContent.removeButton.setEnabled(False) + + def enableRemoveButton(self): + """ + Enable the Remove button. + """ + self.pageContent.removeButton.setEnabled(True) + + def latestVersionItem(self): + """ + Returns the latest BeRTOS version founded. + """ + latest_version_item = None + for index in range(self.pageContent.versionList.count()): + item = self.pageContent.versionList.item(index) + if not latest_version_item: + latest_version_item = item + version = item.text().split(" (")[0] + latest = latest_version_item.text().split(" (")[0] + if version != "UNKNOWN" and version > latest: + latest_version_item = item + return latest_version_item + + def setCurrentItem(self, item): + """ + Select the given item in the version list. + """ + self.pageContent.versionList.setCurrentItem(item) + + def currentItem(self): + """ + Returns the current selected item. + """ + return self.pageContent.versionList.currentItem() + + def currentVersion(self): + """ + Return the path of the selected version. + """ + current = self.currentItem() + if current: + return qvariant_converter.getString(current.data(Qt.UserRole)) + else: + return None + + def isDefaultVersion(self, version): + """ + Returns True if the given version is one of the default versions. + """ + if os.name == "nt": + import winreg_importer + if version in winreg_importer.getBertosDirs(): + return True + return False + diff --git a/2.5/wizard/BWizard.py b/2.5/wizard/BWizard.py new file mode 100644 index 00000000..7e96ee49 --- /dev/null +++ b/2.5/wizard/BWizard.py @@ -0,0 +1,99 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import copy + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +try: + from version import wizard_version +except ImportError: + wizard_version = "sandbox" + +class BWizard(QWizard): + """ + Main class of the wizard. It adds the pages automatically. + """ + + def __init__(self, page_list): + self._current = None + QWizard.__init__(self) + geometry = QApplication.instance().settings.value("geometry", QVariant()).toRect() + self.setGeometry(geometry) + self.setWindowTitle(self.tr("Create a BeRTOS project - rev.%1").arg(wizard_version)) + self.setWindowIcon(QIcon(":/images/appicon.png")) + self.setOption(QWizard.DisabledBackButtonOnLastPage, True) + self.addPages(page_list) + self.connectSignals() + + def addPages(self, page_list): + """ + Adds the pages in the wizard. + """ + self._page_dict = {} + for i, page in enumerate(page_list): + self._page_dict[page] = i + self.setPage(i, page()) + + def pageIndex(self, page_class): + return self._page_dict[page_class] + + def connectSignals(self): + """ + Connects the signals with the related slots. + """ + self.connect(self, SIGNAL("currentIdChanged(int)"), self.pageChanged) + + def pageChanged(self, pageId): + """ + Slot called when the user change the current page. It calls the reloadData + method of the next page. + """ + page = self.page(pageId) + if page: + page.reloadData(previous_id= self._current) + self._current = pageId + + def project(self): + """ + Returns the BProject associated with the wizard. + """ + return copy.deepcopy(QApplication.instance().project) + + def done(self, result): + geometry = self.geometry() + QApplication.instance().settings.setValue("geometry", QVariant(geometry)) + QWizard.done(self, result) diff --git a/2.5/wizard/BWizardPage.py b/2.5/wizard/BWizardPage.py new file mode 100644 index 00000000..f86e09c4 --- /dev/null +++ b/2.5/wizard/BWizardPage.py @@ -0,0 +1,211 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtCore import * +from PyQt4.QtGui import * +from PyQt4 import uic + +import qvariant_converter + +import const + +class BWizardPage(QWizardPage): + """ + Base class for all the wizard pages. It has the utility method used in all + the pages. A wizard page class need to extend this class. + """ + + def __init__(self, wizardGui, parent = None): + QWizardPage.__init__(self, parent) + self.pageContent = uic.loadUi(os.path.join(const.DATA_DIR, wizardGui), None) + layout = QVBoxLayout() + layout.addWidget(self.pageContent) + self.setLayout(layout) + self.setupUi() + self.connectSignals() + + def exceptionOccurred(self, message): + """ + Simple message box showing method. + """ + QMessageBox.critical(self, self.tr("Error occurred"), message, QMessageBox.Ok, QMessageBox.NoButton) + + def showMessage(self, title, message): + """ + Show an information message box with title and message. + """ + QMessageBox.information(self, title, message) + + ## BProject interaction methods ## + + def setProjectInfo(self, key, value): + """ + Stores the given value in the BProject class associating it with the given + key. + """ + QApplication.instance().project.setInfo(key, value) + + def projectInfo(self, key): + """ + Retrieves the information associated with the given key. + """ + return QApplication.instance().project.info(key) + + @property + def project(self): + """ + Returns the BProject instance. + """ + return QApplication.instance().project + + #### + + ## QSettings interaction methods ## + + def settingsStore(self, key, value): + """ + Stores the given value in the QSettings associated with the given key. + """ + QApplication.instance().settings.setValue(QString(key), value) + + def settingsRetrieve(self, key): + """ + Retrieves the value associated to key in the QSettings. Note that this + Value is a QVariant and neet to be converted in a standard type. + """ + return QApplication.instance().settings.value(QString(key), QVariant()) + + def plugins(self): + """ + Returns the list of actived plugins. + """ + return qvariant_converter.getStringList(self.settingsRetrieve("plugins")) + + def setPlugins(self, plugins): + """ + Stores the given list of actived plugins. + """ + self.settingsStore("plugins", qvariant_converter.convertStringList(plugins)) + + def versions(self): + """ + Returns the version list from the QSettings. + """ + return qvariant_converter.getStringList(self.settingsRetrieve("versions")) + + def setVersions(self, versions): + """ + Stores the given versions in the QSettings. + """ + self.settingsStore("versions", qvariant_converter.convertStringList(versions)) + + def searchDirList(self): + """ + Returns the search dir list from the QSettings. + """ + return qvariant_converter.getStringList(self.settingsRetrieve("search_dir_list")) + + def setSearchDirList(self, search_dir_list): + """ + Stores the search dir list in the QSettings. + """ + self.settingsStore("search_dir_list", qvariant_converter.convertStringList(search_dir_list)) + + def pathSearch(self): + """ + Returns the value of path search from the QSettings. + """ + return qvariant_converter.getBool(self.settingsRetrieve("path_search")) + + def setPathSearch(self, path_search): + """ + Stores the path search value in the QSettings. + """ + self.settingsStore("path_search", qvariant_converter.convertBool(path_search)) + + def toolchains(self): + """ + Returns the toolchains stored in the QSettings. + """ + return qvariant_converter.getBoolDict(self.settingsRetrieve("toolchains")) + + def setToolchains(self, toolchains): + """ + Stores the toolchains in the QSettings. + """ + self.settingsStore("toolchains", qvariant_converter.convertBoolDict(toolchains)) + + def defaultFolder(self): + """ + Returns the default save folder stored in the QSettings. + """ + return qvariant_converter.getString(self.settingsRetrieve("folder")) + + def setDefaultFolder(self, folder): + """ + Stores the default save folder in the QSettings. + """ + self.settingsStore("folder", qvariant_converter.convertString(folder)) + + #### + + ## Methodo to be implemented in child classes when needed ## + + def reloadData(self, previous_id=None): + """ + Method called before the page is loaded. The pages that need to use this + method have to implement it. + """ + pass + + def setupUi(self): + """ + Method called automatically during the initialization of the wizard page. + It set up the interface. Pages that need to use this method have to + implement it. + """ + pass + + def connectSignals(self): + """ + Method called automatically during the initialization of the wizard page. + It connects the signals and the slots. The pages that need to use this + method have to implement it. + """ + pass + + #### diff --git a/2.5/wizard/DefineException.py b/2.5/wizard/DefineException.py new file mode 100644 index 00000000..7f4548f8 --- /dev/null +++ b/2.5/wizard/DefineException.py @@ -0,0 +1,68 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + + +class DefineException(Exception): + """ + Exception raised when an error occurs parsing the module informations. + """ + def __init__(self, path, line_number, line): + self.path = path + self.line_number = line_number + self.line = line + + def __str__(self): + return repr(self.path) + +class ModuleDefineException(DefineException): + """ + Exception raised when an error occurs parsing the module informations. + """ + def __init__(self, path, line_number, line): + super(ModuleDefineException, self).__init__(path, line_number, line) + +class EnumDefineException(DefineException): + """ + Exception raised when an error occurs parsing the enum informations. + """ + def __init__(self, path, line_number, line): + super(EnumDefineException, self).__init__(path, line_number, line) + +class ConfigurationDefineException(DefineException): + """ + Exception raised when an error occurs parsing the configuration parameter informations. + """ + def __init__(self, path, line_number, line): + super(ConfigurationDefineException, self).__init__(path, line_number, line) diff --git a/2.5/wizard/LoadException.py b/2.5/wizard/LoadException.py new file mode 100644 index 00000000..99b30c9f --- /dev/null +++ b/2.5/wizard/LoadException.py @@ -0,0 +1,42 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id: DefineException.py 2645 2009-04-23 09:28:13Z duplo $ +# +# Author: Lorenzo Berni +# + +class ToolchainException(Exception): + def __init__(self, partial_project): + self.partial_project = partial_project + +class VersionException(Exception): + def __init__(self, partial_project): + self.partial_project = partial_project diff --git a/2.5/wizard/_wizard_version.py b/2.5/wizard/_wizard_version.py new file mode 100644 index 00000000..57b67c8d --- /dev/null +++ b/2.5/wizard/_wizard_version.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + + +# This variable contains the wizard version. This will be stored into the +# project files to let the Wizard know how to use them. +# Previous versions: +# 0 - the project file doesn't contain the version number. +# When the current Wizard is opening project done with this version of +# the Wizard it has to change the original SOURCES_PATH to the local path +# 1 - SOURCES_PATH used instead of BERTOS_PATH +# 2 - Use the old makefile templates (into /mktemplates/old) and the old logic +# Instead of the new one. +# 3 - Current version. + + +# NOTE: Change this variable may cause the wizard to not work properly. +WIZARD_VERSION = 3 diff --git a/2.5/wizard/bertos.py b/2.5/wizard/bertos.py new file mode 100755 index 00000000..38b7224c --- /dev/null +++ b/2.5/wizard/bertos.py @@ -0,0 +1,135 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os +import sys +from distutils.dep_util import newer + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +import exception_handler + +from BProject import BProject + +from BWizard import BWizard + +from BIntroPage import BIntroPage +from BFolderPage import BFolderPage +from BBoardPage import BBoardPage +from BProjectPresets import BProjectPresets +from BOpenPage import BOpenPage +from BVersionPage import BVersionPage +from BCpuPage import BCpuPage +from BToolchainPage import BToolchainPage +from BModulePage import BModulePage +from BCreationPage import BCreationPage +from BFinalPage import BFinalPage + +from BEditingDialog import BEditingDialog, BVersionDialog, BToolchainDialog + +from const import DATA_DIR + +from LoadException import VersionException, ToolchainException + +def newProject(): + QApplication.instance().project = BProject() + page_list = [BIntroPage, BFolderPage, BVersionPage, BBoardPage, BProjectPresets, BCpuPage, BToolchainPage, BModulePage, BCreationPage, BFinalPage] + wizard = BWizard(page_list) + wizard.show() + wizard.exec_() + project = QApplication.instance().project + to_be_opened = project.info("TO_BE_OPENED") + command_lines = project.info("COMMAND_LINES") + relevant_files = project.info("RELEVANT_FILES") + if to_be_opened: + for ide in to_be_opened: + command_line = command_lines[ide] + relevant_file = relevant_files[ide] + QProcess.startDetached(command_line, [relevant_file,]) + sys.exit() + +def editProject(project_file): + info_dict = {} + while(True): + # Empty project is the default fallback. + QApplication.instance().project = BProject() + try: + QApplication.instance().project = BProject(project_file, info_dict) + except VersionException: + QMessageBox.critical( + None, + QObject().tr("BeRTOS version not found!"), + QObject().tr("The selected BeRTOS version was not found, please select another one...") + ) + dialog = BVersionDialog() + if dialog.exec_(): + version = dialog.version_page.currentVersion() + info_dict["BERTOS_PATH"] = version + continue + except ToolchainException, exc: + QMessageBox.critical( + None, + QObject().tr("Toolchain not found!"), + QObject().tr("The selected toolchain was not found, please select another one...") + ) + QApplication.instance().project = exc.partial_project + dialog = BToolchainDialog() + if dialog.exec_(): + toolchain = dialog.toolchain_page.currentToolchain() + info_dict["TOOLCHAIN"] = toolchain + continue + break + dialog = BEditingDialog() + dialog.exec_() + +def main(): + app = QApplication(sys.argv) + app.settings = QSettings("Develer", "Bertos Configurator") + # Development utility lines, to be removed for production + datadir = DATA_DIR + qrc, rcc = os.path.join(datadir, 'bertos.qrc'), os.path.join(datadir, 'bertos.rcc') + if not (hasattr(sys, "frozen") and sys.frozen) and newer(qrc, rcc): + os.system("rcc -binary %s -o %s" %(qrc, rcc)) + QResource.registerResource(rcc) + if len(sys.argv) == 3 and sys.argv[1] == "--edit": + editProject(os.path.abspath(sys.argv[2])) + else: + newProject() + + +if __name__ == '__main__': + main() + diff --git a/2.5/wizard/bertos.qrc b/2.5/wizard/bertos.qrc new file mode 100644 index 00000000..e7376c7f --- /dev/null +++ b/2.5/wizard/bertos.qrc @@ -0,0 +1,18 @@ + + + images/filenew.png + images/fileopen.png + images/listremove.png + images/listadd.png + images/ok.png + images/warning.png + images/error.png + images/folderopen.png + images/appicon.png + images/logo.png + images/default_dir_icon.png + images/default_project_icon.png + images/default_board_image.png + images/default_board_icon.png + + diff --git a/2.5/wizard/bertos_utils.py b/2.5/wizard/bertos_utils.py new file mode 100644 index 00000000..dffa2ab8 --- /dev/null +++ b/2.5/wizard/bertos_utils.py @@ -0,0 +1,666 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os +import fnmatch +import glob +import re +import shutil +# Use custom copytree function +import copytree +import relpath +import pickle + +import const +import plugins +import DefineException + +from _wizard_version import WIZARD_VERSION + +from LoadException import VersionException, ToolchainException + +def _cmp(x, y): + result = cmp(x["info"].get('ord', 0), y["info"].get('ord', 0)) + if result == 0: + result = cmp( + x["info"].get("name", x["info"]["filename"]).lower(), + y["info"].get("name", y["info"]["filename"]).lower() + ) + return result + +def isBertosDir(directory): + return os.path.exists(directory + "/VERSION") + +def bertosVersion(directory): + return open(directory + "/VERSION").readline().strip() + +def enabledModules(project_info): + enabled_modules = [] + for name, module in project_info.info("MODULES").items(): + if module["enabled"]: + enabled_modules.append(name) + return enabled_modules + +def presetList(directory): + """ + Return the list of the preset found in the selected BeRTOS Version. + """ + abspath = os.path.join(directory, const.PREDEFINED_BOARDS_DIR) + preset_list = dict([ + (os.path.join(abspath, preset_dir), presetInfo(os.path.join(abspath, preset_dir))) + for preset_dir in os.listdir(os.path.join(directory, const.PREDEFINED_BOARDS_DIR)) + ]) + return preset_list + +def presetInfo(preset_dir): + """ + Return the preset-relevant info contined into the project_file. + """ + preset_info = pickle.loads(open(os.path.join(preset_dir, "project.bertos"), "r").read()) + try: + description = open(os.path.join(preset_dir, "description"), "r").read() + except IOError: + # No description file found. + description = "" + relevant_info = { + "CPU_NAME": preset_info.get("CPU_NAME"), + "SELECTED_FREQ": preset_info.get("SELECTED_FREQ"), + "WIZARD_VERSION": preset_info.get("WIZARD_VERSION", None), + "PRESET_NAME": preset_info.get("PROJECT_NAME"), + "PRESET_DESCRIPTION": description.decode("utf-8"), + } + return relevant_info + +def mergeSources(srcdir, new_sources, old_sources): + # The current mergeSources function provide only a raw copy of the sources in the + # created project. + # + # TODO: implement the three way merge algorithm + # + shutil.rmtree(srcdir, True) + copytree.copytree(os.path.join(new_sources, "bertos"), srcdir, ignore_list=const.IGNORE_LIST) + +def projectFileGenerator(project_info): + directory = project_info.info("PROJECT_PATH") + project_data = {} + enabled_modules = [] + for module, information in project_info.info("MODULES").items(): + if information["enabled"]: + enabled_modules.append(module) + project_data["ENABLED_MODULES"] = enabled_modules + if project_info.info("PRESET"): + # For presets save again the BERTOS_PATH into project file + project_data["PRESET"] = True + project_data["BERTOS_PATH"] = relpath.relpath(project_info.info("BERTOS_PATH"), directory) + elif project_info.edit: + # If in editing mode the BERTOS_PATH is maintained + project_data["BERTOS_PATH"] = relpath.relpath(project_info.info("BERTOS_PATH"), directory) + else: + # Use the local BeRTOS version instead of the original one + # project_data["BERTOS_PATH"] = project_info.info("BERTOS_PATH") + project_data["BERTOS_PATH"] = "." + project_data["PROJECT_NAME"] = project_info.info("PROJECT_NAME", os.path.basename(directory)) + project_src_relpath = relpath.relpath(project_info.info("PROJECT_SRC_PATH"), directory) + project_data["PROJECT_SRC_PATH"] = project_src_relpath + project_data["TOOLCHAIN"] = project_info.info("TOOLCHAIN") + project_data["CPU_NAME"] = project_info.info("CPU_NAME") + project_data["SELECTED_FREQ"] = project_info.info("SELECTED_FREQ") + project_data["OUTPUT"] = project_info.info("OUTPUT") + project_data["WIZARD_VERSION"] = WIZARD_VERSION + project_data["PRESET"] = project_info.info("PRESET") + project_data["PROJECT_HW_PATH"] = relpath.relpath(project_info.info("PROJECT_HW_PATH"), directory) + return pickle.dumps(project_data) + +def loadPlugin(plugin): + """ + Returns the given plugin module. + """ + return getattr(__import__("plugins", {}, {}, [plugin]), plugin) + +def versionFileGenerator(project_info, version_file): + version = bertosVersion(project_info.info("BERTOS_PATH")) + return version_file.replace('$version', version) + +def userMkGeneratorFromPreset(project_info): + project_name = project_info.info("PROJECT_NAME") + preset_path = project_info.info("PRESET_PATH") + preset_name = project_info.info("PRESET_NAME") + preset_src_dir = project_info.info("PRESET_SRC_PATH") + makefile = open(os.path.join(preset_path, preset_src_dir, "%s_user.mk" %preset_name), 'r').read() + destination = os.path.join(project_info.prjdir, "%s_user.mk" %project_info.info("PROJECT_NAME")) + # Temporary code. + # TODO: write it using regular expressions to secure this function + makefile = makefile.replace(preset_name + "_", project_name + "_") + open(destination, "w").write(makefile) + +def userMkGenerator(project_info): + makefile = open(os.path.join(const.DATA_DIR, "mktemplates/template_user.mk"), "r").read() + destination = os.path.join(project_info.prjdir, os.path.basename(project_info.prjdir) + "_user.mk") + # Deadly performances loss was here :( + mk_data = {} + mk_data["$pname"] = os.path.basename(project_info.info("PROJECT_PATH")) + mk_data["$ppath"] = relpath.relpath(project_info.info("PROJECT_SRC_PATH"), project_info.info("PROJECT_PATH")) + mk_data["$main"] = "/".join(["$(%s_SRC_PATH)" %project_info.info("PROJECT_NAME"), "main.c"]) + for key in mk_data: + makefile = makefile.replace(key, mk_data[key]) + open(destination, "w").write(makefile) + +def mkGenerator(project_info): + """ + Generates the mk file for the current project. + """ + makefile = open(os.path.join(const.DATA_DIR, "mktemplates/template.mk"), "r").read() + destination = os.path.join(project_info.prjdir, os.path.basename(project_info.prjdir) + ".mk") + mk_data = {} + mk_data["$pname"] = project_info.info("PROJECT_NAME") + mk_data["$ppath"] = relpath.relpath(project_info.info("PROJECT_SRC_PATH"), project_info.info("PROJECT_PATH")) + mk_data["$cpuclockfreq"] = project_info.info("SELECTED_FREQ") + cpu_mk_parameters = [] + for key, value in project_info.info("CPU_INFOS").items(): + if key.startswith(const.MK_PARAM_ID): + cpu_mk_parameters.append("%s = %s" %(key.replace("MK", mk_data["$pname"]), value)) + mk_data["$cpuparameters"] = "\n".join(cpu_mk_parameters) + mk_data["$csrc"], mk_data["$pcsrc"], mk_data["$cppasrc"], mk_data["$cxxsrc"], mk_data["$asrc"], mk_data["$constants"] = csrcGenerator(project_info) + mk_data["$prefix"] = replaceSeparators(project_info.info("TOOLCHAIN")["path"].split("gcc")[0]) + mk_data["$suffix"] = replaceSeparators(project_info.info("TOOLCHAIN")["path"].split("gcc")[1]) + mk_data["$hwpath"] = relpath.relpath(project_info.info("PROJECT_HW_PATH"), project_info.info("PROJECT_PATH")) + for key in mk_data: + makefile = makefile.replace(key, mk_data[key]) + open(destination, "w").write(makefile) + +def makefileGenerator(project_info): + """ + Generate the Makefile for the current project. + """ + makefile = open(os.path.join(const.DATA_DIR, "mktemplates/Makefile"), "r").read() + destination = os.path.join(project_info.maindir, "Makefile") + # TODO write a general function that works for both the mk file and the Makefile + mk_data = {} + mk_data["$pname"] = project_info.info("PROJECT_NAME") + mk_data["$ppath"] = relpath.relpath(project_info.info("PROJECT_SRC_PATH"), project_info.info("PROJECT_PATH")) + for key in mk_data: + makefile = makefile.replace(key, mk_data[key]) + open(destination, "w").write(makefile) + +def csrcGenerator(project_info): + modules = project_info.info("MODULES") + files = project_info.info("FILES") + if "harvard" in project_info.info("CPU_INFOS")["CPU_TAGS"]: + harvard = True + else: + harvard = False + # file to be included in CSRC variable + csrc = [] + # file to be included in PCSRC variable + pcsrc = [] + # files to be included in CPPASRC variable + cppasrc = [] + # files to be included in CXXSRC variable + cxxsrc = [] + # files to be included in ASRC variable + asrc = [] + # constants to be included at the beginning of the makefile + constants = {} + for module, information in modules.items(): + module_files = set([]) + dependency_files = set([]) + # assembly sources + asm_files = set([]) + hwdir = os.path.basename(project_info.info("PROJECT_PATH")) + "/hw" + if information["enabled"]: + if "constants" in information: + constants.update(information["constants"]) + cfiles, sfiles = findModuleFiles(module, project_info) + module_files |= set(cfiles) + asm_files |= set(sfiles) + for file in information["hw"]: + if file.endswith(".c"): + module_files |= set([hwdir + "/" + os.path.basename(file)]) + for file_dependency in information["depends"] + tuple(files.keys()): + dependencyCFiles, dependencySFiles = findModuleFiles(file_dependency, project_info) + dependency_files |= set(dependencyCFiles) + asm_files |= set(dependencySFiles) + for file in module_files: + if not harvard or information.get("harvard", "both") == "both": + csrc.append(file) + if harvard and "harvard" in information: + pcsrc.append(file) + for file in dependency_files: + csrc.append(file) + for file in project_info.info("CPU_INFOS")["C_SRC"]: + csrc.append(file) + for file in project_info.info("CPU_INFOS")["PC_SRC"]: + pcsrc.append(file) + for file in asm_files: + cppasrc.append(file) + for file in project_info.info("CPU_INFOS")["CPPA_SRC"]: + cppasrc.append(file) + for file in project_info.info("CPU_INFOS")["CXX_SRC"]: + cxxsrc.append(file) + for file in project_info.info("CPU_INFOS")["ASRC"]: + asrc.append(file) + csrc = set(csrc) + csrc = " \\\n\t".join(csrc) + " \\" + pcsrc = set(pcsrc) + pcsrc = " \\\n\t".join(pcsrc) + " \\" + cppasrc = set(cppasrc) + cppasrc = " \\\n\t".join(cppasrc) + " \\" + cxxsrc = set(cxxsrc) + cxxsrc = " \\\n\t".join(cxxsrc) + " \\" + asrc = set(asrc) + asrc = " \\\n\t".join(asrc) + " \\" + constants = "\n".join([os.path.basename(project_info.info("PROJECT_PATH")) + "_" + key + " = " + unicode(value) for key, value in constants.items()]) + return csrc, pcsrc, cppasrc, cxxsrc, asrc, constants + +def findModuleFiles(module, project_info): + # Find the files related to the selected module + cfiles = [] + sfiles = [] + # .c files related to the module and the cpu architecture + for filename, path in project_info.searchFiles(module + ".c"): + path = path.replace(project_info.info("BERTOS_PATH") + os.sep, "") + path = replaceSeparators(path) + cfiles.append(path + "/" + filename) + # .s files related to the module and the cpu architecture + for filename, path in project_info.searchFiles(module + ".s") + \ + project_info.searchFiles(module + ".S"): + path = path.replace(project_info.info("BERTOS_PATH") + os.sep, "") + path = replaceSeparators(path) + sfiles.append(path + "/" + filename) + # .c and .s files related to the module and the cpu tags + tags = project_info.info("CPU_INFOS")["CPU_TAGS"] + + # Awful, but secure check for version + # TODO: split me in a method/function + try: + version_string = bertosVersion(project_info.info("BERTOS_PATH")) + version_list = [int(i) for i in version_string.split()[1].split('.')] + except ValueError: + # If the version file hasn't a valid version number assume it's an older + # project. + version_list = [0, 0] + if version_list < [2, 5]: + # For older versions of BeRTOS add the toolchain to the tags + tags.append(project_info.info("CPU_INFOS")["TOOLCHAIN"]) + + for tag in tags: + for filename, path in project_info.searchFiles(module + "_" + tag + ".c"): + path = path.replace(project_info.info("BERTOS_PATH") + os.sep, "") + if os.sep != "/": + path = replaceSeparators(path) + cfiles.append(path + "/" + filename) + for filename, path in project_info.searchFiles(module + "_" + tag + ".s") + \ + project_info.searchFiles(module + "_" + tag + ".S"): + path = path.replace(project_info.info("BERTOS_PATH") + os.sep, "") + path = replaceSeparators(path) + sfiles.append(path + "/" + filename) + return cfiles, sfiles + +def replaceSeparators(path): + """ + Replace the separators in the given path with unix standard separator. + """ + if os.sep != "/": + path = path.replace(os.sep, "/") + return path + +def getSystemPath(): + path = os.environ["PATH"] + if os.name == "nt": + path = path.split(";") + else: + path = path.split(":") + return path + +def findToolchains(path_list): + toolchains = [] + for element in path_list: + for toolchain in glob.glob(element+ "/" + const.GCC_NAME): + toolchains.append(toolchain) + return list(set(toolchains)) + +def getToolchainInfo(output): + info = {} + expr = re.compile("Target: .*") + target = expr.findall(output) + if len(target) == 1: + info["target"] = target[0].split("Target: ")[1] + expr = re.compile("gcc version [0-9,.]*") + version = expr.findall(output) + if len(version) == 1: + info["version"] = version[0].split("gcc version ")[1] + expr = re.compile("gcc version [0-9,.]* \(.*\)") + build = expr.findall(output) + if len(build) == 1: + build = build[0].split("gcc version ")[1] + build = build[build.find("(") + 1 : build.find(")")] + info["build"] = build + expr = re.compile("Configured with: .*") + configured = expr.findall(output) + if len(configured) == 1: + info["configured"] = configured[0].split("Configured with: ")[1] + expr = re.compile("Thread model: .*") + thread = expr.findall(output) + if len(thread) == 1: + info["thread"] = thread[0].split("Thread model: ")[1] + return info + +def getToolchainName(toolchain_info): + name = "GCC " + toolchain_info["version"] + " - " + toolchain_info["target"].strip() + return name + +def getTagSet(cpu_info): + tag_set = set([]) + for cpu in cpu_info: + tag_set |= set([cpu["CPU_NAME"]]) + tag_set |= set(cpu["CPU_TAGS"]) + tag_set |= set([cpu["TOOLCHAIN"]]) + return tag_set + + +def getInfos(definition): + D = {} + D.update(const.CPU_DEF) + def include(filename, dict = D, directory=definition[1]): + execfile(directory + "/" + filename, {}, D) + D["include"] = include + include(definition[0], D) + D["CPU_NAME"] = definition[0].split(".")[0] + D["DEFINITION_PATH"] = definition[1] + "/" + definition[0] + del D["include"] + return D + +def getCommentList(string): + comment_list = re.findall(r"/\*{2}\s*([^*]*\*(?:[^/*][^*]*\*+)*)/", string) + comment_list = [re.findall(r"^\s*\* *(.*?)$", comment, re.MULTILINE) for comment in comment_list] + return comment_list + +def loadModuleDefinition(first_comment): + to_be_parsed = False + module_definition = {} + for num, line in enumerate(first_comment): + index = line.find("$WIZ$") + if index != -1: + to_be_parsed = True + try: + exec line[index + len("$WIZ$ "):] in {}, module_definition + except: + raise ParseError(num, line[index:]) + elif line.find("\\brief") != -1: + module_definition["module_description"] = line[line.find("\\brief") + len("\\brief "):] + module_dict = {} + if "module_name" in module_definition: + module_name = module_definition[const.MODULE_DEFINITION["module_name"]] + del module_definition[const.MODULE_DEFINITION["module_name"]] + module_dict[module_name] = {} + if const.MODULE_DEFINITION["module_depends"] in module_definition: + depends = module_definition[const.MODULE_DEFINITION["module_depends"]] + del module_definition[const.MODULE_DEFINITION["module_depends"]] + if type(depends) == str: + depends = (depends,) + module_dict[module_name]["depends"] = depends + else: + module_dict[module_name]["depends"] = () + if const.MODULE_DEFINITION["module_configuration"] in module_definition: + module_dict[module_name]["configuration"] = module_definition[const.MODULE_DEFINITION["module_configuration"]] + del module_definition[const.MODULE_DEFINITION["module_configuration"]] + else: + module_dict[module_name]["configuration"] = "" + if "module_description" in module_definition: + module_dict[module_name]["description"] = module_definition["module_description"] + del module_definition["module_description"] + if const.MODULE_DEFINITION["module_harvard"] in module_definition: + harvard = module_definition[const.MODULE_DEFINITION["module_harvard"]] + module_dict[module_name]["harvard"] = harvard + del module_definition[const.MODULE_DEFINITION["module_harvard"]] + if const.MODULE_DEFINITION["module_hw"] in module_definition: + hw = module_definition[const.MODULE_DEFINITION["module_hw"]] + del module_definition[const.MODULE_DEFINITION["module_hw"]] + if type(hw) == str: + hw = (hw, ) + module_dict[module_name]["hw"] = hw + else: + module_dict[module_name]["hw"] = () + if const.MODULE_DEFINITION["module_supports"] in module_definition: + supports = module_definition[const.MODULE_DEFINITION["module_supports"]] + del module_definition[const.MODULE_DEFINITION["module_supports"]] + module_dict[module_name]["supports"] = supports + module_dict[module_name]["constants"] = module_definition + module_dict[module_name]["enabled"] = False + return to_be_parsed, module_dict + +def isSupported(project, module=None, property_id=None): + if not module and property_id: + item = project.info("CONFIGURATIONS")[property_id[0]][property_id[1]]["informations"] + else: + item = project.info("MODULES")[module] + tag_dict = project.info("ALL_CPU_TAGS") + if "supports" in item: + support_string = item["supports"] + supported = {} + try: + exec "supported = " + support_string in tag_dict, supported + except: + raise SupportedException(support_string) + return supported["supported"] + else: + return True + +def loadDefineLists(comment_list): + define_list = {} + for comment in comment_list: + for num, line in enumerate(comment): + index = line.find("$WIZ$") + if index != -1: + try: + exec line[index + len("$WIZ$ "):] in {}, define_list + except: + raise ParseError(num, line[index:]) + for key, value in define_list.items(): + if type(value) == str: + define_list[key] = (value,) + return define_list + +def getDescriptionInformations(comment): + """ + Take the doxygen comment and strip the wizard informations, returning the tuple + (comment, wizard_information) + """ + brief = "" + description = "" + information = {} + for num, line in enumerate(comment): + index = line.find("$WIZ$") + if index != -1: + if len(brief) == 0: + brief += line[:index].strip() + else: + description += " " + line[:index] + try: + exec line[index + len("$WIZ$ "):] in {}, information + except: + raise ParseError(num, line[index:]) + else: + if len(brief) == 0: + brief += line.strip() + else: + description += " " + line + description = description.strip() + return brief.strip(), description.strip(), information + +def getDefinitionBlocks(text): + """ + Take a text and return a list of tuple (description, name-value). + """ + block = [] + block_tmp = re.finditer(r"/\*{2}\s*([^*]*\*(?:[^/*][^*]*\*+)*)/\s*#define\s+((?:[^/]*?/?)+)\s*?(?:/{2,3}[^<].*?)?$", text, re.MULTILINE) + for match in block_tmp: + # Only the first element is needed + comment = match.group(1) + define = match.group(2) + start = match.start() + block.append(([re.findall(r"^\s*\* *(.*?)$", line, re.MULTILINE)[0] for line in comment.splitlines()], define, start)) + for match in re.finditer(r"/{3}\s*([^<].*?)\s*#define\s+((?:[^/]*?/?)+)\s*?(?:/{2,3}[^<].*?)?$", text, re.MULTILINE): + comment = match.group(1) + define = match.group(2) + start = match.start() + block.append(([comment], define, start)) + for match in re.finditer(r"#define\s*(.*?)\s*/{3}<\s*(.+?)\s*?(?:/{2,3}[^<].*?)?$", text, re.MULTILINE): + comment = match.group(2) + define = match.group(1) + start = match.start() + block.append(([comment], define, start)) + return block + +def formatParamNameValue(text): + """ + Take the given string and return a tuple with the name of the parameter in the first position + and the value in the second. + """ + block = re.findall("\s*([^\s]+)\s*(.+?)\s*$", text, re.MULTILINE) + return block[0] + +def loadConfigurationInfos(path): + """ + Return the module configurations found in the given file as a dict with the + parameter name as key and a dict containig the fields above as value: + "value": the value of the parameter + "description": the description of the parameter + "informations": a dict containig optional informations: + "type": "int" | "boolean" | "enum" + "min": the minimum value for integer parameters + "max": the maximum value for integer parameters + "long": boolean indicating if the num is a long + "unsigned": boolean indicating if the num is an unsigned + "value_list": the name of the enum for enum parameters + "conditional_deps": the list of conditional dependencies for boolean parameters + """ + configuration_infos = {} + configuration_infos["paramlist"] = [] + for comment, define, start in getDefinitionBlocks(open(path, "r").read()): + name, value = formatParamNameValue(define) + brief, description, informations = getDescriptionInformations(comment) + configuration_infos["paramlist"].append((start, name)) + configuration_infos[name] = {} + configuration_infos[name]["value"] = value + configuration_infos[name]["informations"] = informations + if not "type" in configuration_infos[name]["informations"]: + configuration_infos[name]["informations"]["type"] = findParameterType(configuration_infos[name]) + if ("type" in configuration_infos[name]["informations"] and + configuration_infos[name]["informations"]["type"] == "int" and + configuration_infos[name]["value"].find("L") != -1): + configuration_infos[name]["informations"]["long"] = True + configuration_infos[name]["value"] = configuration_infos[name]["value"].replace("L", "") + if ("type" in configuration_infos[name]["informations"] and + configuration_infos[name]["informations"]["type"] == "int" and + configuration_infos[name]["value"].find("U") != -1): + configuration_infos[name]["informations"]["unsigned"] = True + configuration_infos[name]["value"] = configuration_infos[name]["value"].replace("U", "") + if "conditional_deps" in configuration_infos[name]["informations"]: + if (type(configuration_infos[name]["informations"]["conditional_deps"]) == str or + type(configuration_infos[name]["informations"]["conditional_deps"]) == unicode): + configuration_infos[name]["informations"]["conditional_deps"] = (configuration_infos[name]["informations"]["conditional_deps"], ) + elif type(configuration_infos[name]["informations"]["conditional_deps"]) == tuple: + pass + else: + configuration_infos[name]["informations"]["conditional_deps"] = () + configuration_infos[name]["description"] = description + configuration_infos[name]["brief"] = brief + return configuration_infos + +def updateConfigurationValues(def_conf, user_conf): + for param in def_conf["paramlist"]: + if param[1] in user_conf and "value" in user_conf[param[1]]: + def_conf[param[1]]["value"] = user_conf[param[1]]["value"] + return def_conf + +def findParameterType(parameter): + if "value_list" in parameter["informations"]: + return "enum" + if "min" in parameter["informations"] or "max" in parameter["informations"] or re.match(r"^\d+U?L?$", parameter["value"]) != None: + return "int" + +def sub(string, parameter, value): + """ + Substitute the given value at the given parameter define in the given string + """ + return re.sub(r"(?P#define\s+" + parameter + r"\s+)([^\s]+)", r"\g" + value, string) + +def isInt(informations): + """ + Return True if the value is a simple int. + """ + if ("long" not in informatios or not informations["long"]) and ("unsigned" not in informations or informations["unsigned"]): + return True + else: + return False + +def isLong(informations): + """ + Return True if the value is a long. + """ + if "long" in informations and informations["long"] and "unsigned" not in informations: + return True + else: + return False + +def isUnsigned(informations): + """ + Return True if the value is an unsigned. + """ + if "unsigned" in informations and informations["unsigned"] and "long" not in informations: + return True + else: + return False + +def isUnsignedLong(informations): + """ + Return True if the value is an unsigned long. + """ + if "unsigned" in informations and "long" in informations and informations["unsigned"] and informations["long"]: + return True + else: + return False + +class ParseError(Exception): + def __init__(self, line_number, line): + Exception.__init__(self) + self.line_number = line_number + self.line = line + +class SupportedException(Exception): + def __init__(self, support_string): + Exception.__init__(self) + self.support_string = support_string diff --git a/2.5/wizard/build_resources.sh b/2.5/wizard/build_resources.sh new file mode 100755 index 00000000..e988a1f8 --- /dev/null +++ b/2.5/wizard/build_resources.sh @@ -0,0 +1,36 @@ +#!/usr/bin/env sh +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id:$ +# +# Author: Lorenzo Berni +# + +rcc -binary bertos.qrc -o bertos.rcc diff --git a/2.5/wizard/cltemplates/bertos.project b/2.5/wizard/cltemplates/bertos.project new file mode 100644 index 00000000..ae430531 --- /dev/null +++ b/2.5/wizard/cltemplates/bertos.project @@ -0,0 +1,66 @@ + + +$filelist + + + + + + + + + + + +source $initscript + + +shell sleep 2 + + + + + + + make clean + make + + + + None + $(WorkspacePath) + + + + + + + + + + + + + + + + + + + + + make clean + make + + + + None + $(WorkspacePath) + + + + + + + + diff --git a/2.5/wizard/cltemplates/bertos.workspace b/2.5/wizard/cltemplates/bertos.workspace new file mode 100644 index 00000000..4b9d7957 --- /dev/null +++ b/2.5/wizard/cltemplates/bertos.workspace @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/2.5/wizard/compatibility.py b/2.5/wizard/compatibility.py new file mode 100644 index 00000000..bf05c093 --- /dev/null +++ b/2.5/wizard/compatibility.py @@ -0,0 +1,102 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of slimqc. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import const +import os +from bertos_utils import replaceSeparators, csrcGenerator + +def _userMkGenerator(project_info): + makefile = open(os.path.join(const.DATA_DIR, "mktemplates/old/template.mk"), "r").read() + destination = os.path.join(project_info.prjdir, os.path.basename(project_info.prjdir) + ".mk") + # Deadly performances loss was here :( + mk_data = {} + mk_data["$pname"] = os.path.basename(project_info.info("PROJECT_PATH")) + mk_data["$main"] = os.path.basename(project_info.info("PROJECT_PATH")) + "/main.c" + for key in mk_data: + makefile = makefile.replace(key, mk_data[key]) + open(destination, "w").write(makefile) + +def _mkGenerator(project_info): + """ + Generates the mk file for the current project. + """ + makefile = open(os.path.join(const.DATA_DIR, "mktemplates/old/template_wiz.mk"), "r").read() + destination = os.path.join(project_info.prjdir, os.path.basename(project_info.prjdir) + "_wiz.mk") + mk_data = {} + mk_data["$pname"] = project_info.info("PROJECT_NAME") + mk_data["$cpuclockfreq"] = project_info.info("SELECTED_FREQ") + cpu_mk_parameters = [] + for key, value in project_info.info("CPU_INFOS").items(): + if key.startswith(const.MK_PARAM_ID): + cpu_mk_parameters.append("%s = %s" %(key.replace("MK", mk_data["$pname"]), value)) + mk_data["$cpuparameters"] = "\n".join(cpu_mk_parameters) + mk_data["$csrc"], mk_data["$pcsrc"], mk_data["$cppasrc"], mk_data["$cxxsrc"], mk_data["$asrc"], mk_data["$constants"] = csrcGenerator(project_info) + mk_data["$prefix"] = replaceSeparators(project_info.info("TOOLCHAIN")["path"].split("gcc")[0]) + mk_data["$suffix"] = replaceSeparators(project_info.info("TOOLCHAIN")["path"].split("gcc")[1]) + mk_data["$main"] = os.path.basename(project_info.info("PROJECT_PATH")) + "/main.c" + for key in mk_data: + makefile = makefile.replace(key, mk_data[key]) + open(destination, "w").write(makefile) + +def _makefileGenerator(project_info): + """ + Generate the Makefile for the current project. + """ + makefile = open(os.path.join(const.DATA_DIR, "mktemplates/old/Makefile"), "r").read() + destination = os.path.join(project_info.maindir, "Makefile") + # TODO write a general function that works for both the mk file and the Makefile + makefile = makefile.replace("$pname", project_info.info("PROJECT_NAME")) + open(destination, "w").write(makefile) + +def updateProject(project_data): + """ + Update incrementally the project_data loaded from a BeRTOS Wizard project + file. + """ + wizard_version = project_data.get("WIZARD_VERSION", 0) + if wizard_version < 1: + # Ignore the BERTOS_PATH inside the project file for older project + project_data["SOURCES_PATH"] = project_dir + if wizard_version < 2: + # Use SOURCES_PATH instead of BERTOS_PATH for backward compatibility + project_data["BERTOS_PATH"] = project_data["SOURCES_PATH"] + if wizard_version < 3: + # Use older makefile templates and generators using monkey patching + import bertos_utils + bertos_utils.mkGenerator = _mkGenerator + bertos_utils.userMkGenerator = _userMkGenerator + bertos_utils.makefileGenerator = _makefileGenerator + return project_data + diff --git a/2.5/wizard/const.py b/2.5/wizard/const.py new file mode 100644 index 00000000..863f45da --- /dev/null +++ b/2.5/wizard/const.py @@ -0,0 +1,112 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os, sys + +_tmp = sys.argv[0] +if os.path.islink(_tmp): + _tmp = os.readlink(_tmp) +DATA_DIR = os.path.dirname(os.path.abspath(_tmp)) +del _tmp + +PREDEFINED_BOARDS_DIR = 'boards' +PREDEFINED_BOARD_SPEC_FILE = '.spec' +PREDEFINED_BOARD_ICON_FILE = '.icon.png' +PREDEFINED_BOARD_IMAGE_FILE = '.image.png' + +# Predefined icons in resouces +PREDEFINED_BOARD_DEFAULT_DIR_ICON = ':images/default_dir_icon.png' +PREDEFINED_BOARD_DEFAULT_PROJECT_ICON = ':images/default_project_icon.png' +PREDEFINED_BOARD_DEFAULT_ICON = ':images/default_board_icon.png' +PREDEFINED_BOARD_DEFAULT_IMAGE = ':images/default_board_image.png' +# PREDEFINED_BOARD_SPEC_INFO = { +# 'name': , +# 'description': , +# } + +CPU_DEF = { + "CPU_NAME": "", + "CPU_DIR": "", + "DEFINITION_PATH": "", + "TOOLCHAIN": "", + "CPU_TAGS": [], + "CPPA_SRC" : [], + "CXX_SRC": [], + "ASRC": [], + "C_SRC": [], + "PC_SRC" : [], + "CPU_DESC" : [], + "CPU_DEFAULT_FREQ": "1000000", + "GDB_INIT_SCRIPT": "", +} + +TOOLCHAIN_ITEMS = ("ld", "as") + +CPU_DEFINITION = "*.cdef" + +GCC_NAME = "*gcc*" + +MODULE_CONFIGURATION = "cfg_*.h" + +UI_LOCATION = "ui" + +EXTENSION_FILTER = ( + ".c", + ".cpp", + ".cxx", + ".h", + ".c++", + ".ld", + ".S", + ".mk", + "Makefile", +) + +IGNORE_LIST = ( + ".svn", + "CVS", + ".git", +) + +MODULE_DEFINITION = { + "module_name": "module_name", + "module_configuration": "module_configuration", + "module_depends": "module_depends", + "module_harvard": "module_harvard", + "module_hw": "module_hw", + "module_supports": "module_supports", +} + +MK_PARAM_ID = "MK_" diff --git a/2.5/wizard/copytree.py b/2.5/wizard/copytree.py new file mode 100644 index 00000000..7ca8b7ea --- /dev/null +++ b/2.5/wizard/copytree.py @@ -0,0 +1,84 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os +import sys +import fnmatch +from shutil import * + +del copytree + +def copytree(src, dst, symlinks=False, ignore_list=[]): + """ + Reimplementation of the shutil.copytree function that use ignore_list. + ignore_list is a list containing patterns to ignore during the copy. + """ + names = os.listdir(src) + os.makedirs(dst) + errors = [] + for name in names: + srcname = os.path.join(src, name) + dstname = os.path.join(dst, name) + try: + ignored = False + for ignore in ignore_list: + if fnmatch.fnmatch(name, ignore): + ignored = True + break + if ignored: + continue + if symlinks and os.path.islink(srcname): + linkto = os.readlink(srcname) + os.symlink(linkto, dstname) + elif os.path.isdir(srcname): + copytree(srcname, dstname, symlinks, ignore_list) + else: + copy2(srcname, dstname) + # XXX What about devices, sockets etc.? + except (IOError, os.error), why: + errors.append((srcname, dstname, str(why))) + # catch the Error from the recursive copytree so that we can + # continue with other files + except Error, err: + errors.extend(err.args[0]) + try: + copystat(src, dst) + except WindowsError: + # can't copy file access times on Windows + pass + except OSError, why: + errors.extend((src, dst, str(why))) + if errors: + raise Error, errors diff --git a/2.5/wizard/create_preset.py b/2.5/wizard/create_preset.py new file mode 100755 index 00000000..8cdd662b --- /dev/null +++ b/2.5/wizard/create_preset.py @@ -0,0 +1,160 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of slimqc. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2010 Develer S.r.l. (http://www.develer.com/) +# +# Author: Francesco Sacchi +# + +import pickle +import sys +import os +import shutil +import pprint +import glob +import re + +def remove(path): + if os.path.isdir(path): + shutil.rmtree(path, ignore_errors=True) + else: + try: + os.remove(path) + except OSError: + pass + +def findPath(start, target): + pa = start + while pa != "/": + pa = os.path.abspath(pa + "/..") + if os.path.exists(pa + "/" + target): + return os.path.relpath(pa, start) + +if len(sys.argv) < 3: + print "Usage: %s " % sys.argv[0] + exit(0) + +prj_dir = sys.argv[1] +preset_dir = sys.argv[2] + +if not os.path.exists(prj_dir + "/project.bertos"): + print "%s does not seem a Wizard created project." % prj_dir + exit(1) + +p = open(prj_dir + "/project.bertos") +s = pickle.load(p) +if s["WIZARD_VERSION"] < 3: + print "Project version too old." + exit(1) +pname = s["PROJECT_NAME"] +preset_dir += pname + +#find hw/ path for the board +hw_path = findPath(preset_dir, "hw") +if not hw_path: + print "hw/ path not found in parent directories of %s" % preset_dir + exit(1) + +#find bertos/ path +bertos_path = findPath(preset_dir, "bertos") +if not bertos_path: + print "bertos/ path not found in parent directories of %s" % preset_dir + exit(1) + +#Copy the project and remove unneeded files. +shutil.copytree(prj_dir, preset_dir) +remove(preset_dir + "/bertos") +remove(preset_dir + "/images") +remove(preset_dir + "/obj") +remove(preset_dir + "/Makefile") +remove(preset_dir + "/buildrev.h") +remove(preset_dir + "/VERSION") +remove(preset_dir + "/" + pname + ".project") +remove(preset_dir + "/" + pname + ".workspace") + +#Flatten project sources. +#A wizard created project called pname +#usually has the following structure: +# +#pname +# | +# +- +# | +# +-bertos +# | +# +-pname +# | +# + +# +#This has been done in order to have the chance to +#add multiple projects sharing the same bertos version. +#After the copy and after removing the bertos tree inside the +#project, the double pname directory is redundant, so we move +#all pname sources into the parent directory +l = glob.glob(preset_dir + "/" + pname + "/*") +for f in l: + shutil.move(f, preset_dir) + +#Remove the now empty project src dir and the hw/ dir. +#hw files are located in parent directories and are common +#for all projects on the same board. +remove(preset_dir + "/" + pname) +remove(preset_dir + "/hw") + +assert(os.path.exists(preset_dir + "/" + hw_path + "/hw")) +assert(os.path.exists(preset_dir + "/" + bertos_path + "/bertos")) + +#Update wizard project info. +#A preset is still a Wizard-editable project +#but has its bertos/ and hw/ dirs shared with +#others. +s["BERTOS_PATH"] = bertos_path +s["PROJECT_HW_PATH"] = hw_path +s["PROJECT_SRC_PATH"] = "." +s["PRESET"] = True +pprint.pprint(s) +p = open(preset_dir + "/project.bertos", "w") +pickle.dump(s, p) + +#Create a .spec file in order to make this preset visible in the Wizard +open(preset_dir + "/.spec", "w").write("name = '%s preset'" % pname) + +bertos_path = os.path.abspath(preset_dir + "/" + bertos_path) +hw_path = os.path.abspath(preset_dir + "/" + hw_path) + +src_path = os.path.relpath(preset_dir, bertos_path) +hw_path = os.path.relpath(hw_path, bertos_path) + +#Update project makefiles adapting them to the new directory layout +mk = open(preset_dir + "/" + pname + ".mk").read() +mk = re.sub(r"(%s_SRC_PATH\s*=\s*).*" % pname, r"\1%s" % src_path, mk) +mk = re.sub(r"(%s_HW_PATH\s*=\s*).*" % pname, r"\1%s" % hw_path, mk) + +#remove absolute path from toolchain +mk = re.sub(r'(%s_PREFIX\s*=\s*").*?([^/]*")' % pname, r'\1\2', mk) +open(preset_dir + "/" + pname + ".mk", "w").write(mk) diff --git a/2.5/wizard/exception_handler.py b/2.5/wizard/exception_handler.py new file mode 100644 index 00000000..9e54fa69 --- /dev/null +++ b/2.5/wizard/exception_handler.py @@ -0,0 +1,69 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id: const.py 2907 2009-09-08 14:02:04Z duplo $ +# +# Author: Lorenzo Berni +# + +import sys +import os +import traceback + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +def _excepthook(exc_type, exc_value, exc_traceback): + project_dir = QApplication.instance().project.info("PROJECT_PATH") + if not project_dir: + project_dir = os.getcwd() + file_name = os.path.join(project_dir, "wizard_error.log") + if os.path.exists(file_name): + content = open(file_name, "r").read() + else: + content = "" + if not os.path.exists(os.path.dirname(file_name)): + os.makedirs(os.path.dirname(file_name)) + f = open(file_name, "w") + message = "\n".join(traceback.format_exception(exc_type, exc_value, exc_traceback)) + f.write(message) + f.write(">"*80 + "\n") + f.write(content) + f.close() + print>>sys.stderr, message + QMessageBox.critical( + None, + "Exception occurred", + "An exception is occurred. Please attach the '%s' file to the support request." %os.path.abspath(file_name), + ) + QApplication.instance().quit() + +sys.excepthook = _excepthook + diff --git a/2.5/wizard/images/appicon.png b/2.5/wizard/images/appicon.png new file mode 100755 index 0000000000000000000000000000000000000000..eaeed5e8ac245133af447dcea745aa6a02f38478 GIT binary patch literal 908 zcmV;719SX|P)_Fye2+Od&)qj`rk&k6FLUbC&bxD)Ip2HFIrrRYEzk2*n9V8)C<*w_1=u;ybgRAa z@4(w~PYv(1!YSaB<*C7*72X{n0Uz);E=z=+ljA)-ix)s)^V%0a`dMrUQMGaITYs%I zIjwWR9M|(j<$$g>{*{jN%E!I#{I7^p95t0>n19dv#On*rjh`6|L7<^6vO%4Phz8V z@(z$KL)f&@3piia-_GaPO8hy*nn(k^fb(To`RBE>=f~ju&`1%AQ+~ZrW+(Ph{By#d z!phgf`DQqO2;<}A3ZPO+)k&!|oZkuOlM7BfS`X)2;d~XwSM%;viEZYPu*xWv+u;0B z-xT_=b6^AbT4-m3%BY>s2L#ml7Z|?dUl862`lf08EF^@2OXU?%$D#AxH?iE zAWNP92#$e!#`HPhB$y~hKo52P8Q2KUgAN^WpdKW^SP=sLQRg3n&ETdnUITW3VMP~^ zgHbpg1kJv&fnW{iOO12^U7!Wb14-k(>AXWx$pW->f=2FG{k9lf0#ge0-F6=qhzFnn zob@GkIamk|fC}jX$XUufX9a%^-gEF zfD^lp@7UGZuBTE2kUarw+2IafE53v-gJ6_&0s3Y~m!I1KCw61t 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zWBzBxygSqMc~~|Z>$38M$$*jT)s&4N+L1U zIKWVVc*)=MfG=oKx{|v2#ypbOApz%9X0L8vXUl$y7_ls;fPmsH3V@MX%w%0Wq&yfz zEMY1Su1K<$mh97FG(`fr4GzZ5GO&hmU%kj~cty7P=B;<1)>g_KHgg}kvwvpQs0{qOVW zOgQVXX@qShg8!?4IuDs +# + +# Set to 1 for verbose build output, 0 for terse output +V := 0 + +default: all + +include bertos/config.mk + +include $ppath/$pname.mk + +include bertos/rules.mk diff --git a/2.5/wizard/mktemplates/old/Makefile b/2.5/wizard/mktemplates/old/Makefile new file mode 100644 index 00000000..d266fc9f --- /dev/null +++ b/2.5/wizard/mktemplates/old/Makefile @@ -0,0 +1,17 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Lorenzo Berni +# + +# Set to 1 for verbose build output, 0 for terse output +V := 0 + +default: all + +include bertos/config.mk + +include $pname/$pname.mk + +include bertos/rules.mk diff --git a/2.5/wizard/mktemplates/old/template.mk b/2.5/wizard/mktemplates/old/template.mk new file mode 100644 index 00000000..4e1b8440 --- /dev/null +++ b/2.5/wizard/mktemplates/old/template.mk @@ -0,0 +1,51 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile template for BeRTOS wizard. +# +# Author: Lorenzo Berni +# +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +$pname_PROGRAMMER_TYPE = none +$pname_PROGRAMMER_PORT = none + +# Files included by the user. +$pname_USER_CSRC = \ + $main \ + # + +# Files included by the user. +$pname_USER_PCSRC = \ + # + +# Files included by the user. +$pname_USER_CPPASRC = \ + # + +# Files included by the user. +$pname_USER_CXXSRC = \ + # + +# Files included by the user. +$pname_USER_ASRC = \ + # + +# Flags included by the user. +$pname_USER_LDFLAGS = \ + # + +# Flags included by the user. +$pname_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +$pname_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # + +# Include the mk file generated by the wizard +include $pname/$pname_wiz.mk diff --git a/2.5/wizard/mktemplates/old/template_wiz.mk b/2.5/wizard/mktemplates/old/template_wiz.mk new file mode 100644 index 00000000..8edc07c5 --- /dev/null +++ b/2.5/wizard/mktemplates/old/template_wiz.mk @@ -0,0 +1,71 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile template for BeRTOS wizard. +# +# Author: Lorenzo Berni +# +# + +# Constants automatically defined by the selected modules +$constants + +# Our target application +TRG += $pname + +$pname_PREFIX = "$prefix" + +$pname_SUFFIX = "$suffix" + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_CSRC INSTEAD! +$pname_WIZARD_CSRC = \ + $csrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_PCSRC INSTEAD! +$pname_WIZARD_PCSRC = \ + $pcsrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_CPPASRC INSTEAD! +$pname_WIZARD_CPPASRC = \ + $cppasrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_CXXSRC INSTEAD! +$pname_WIZARD_CXXSRC = \ + $cxxsrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_ASRC INSTEAD! +$pname_WIZARD_ASRC = \ + $asrc + # + +$pname_CPPFLAGS = -D'CPU_FREQ=($cpuclockfreqUL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$pname/ $($pname_CPU_CPPFLAGS) $($pname_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_LDFLAGS = $($pname_CPU_LDFLAGS) $($pname_WIZARD_LDFLAGS) $($pname_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CPPAFLAGS = $($pname_CPU_CPPAFLAGS) $($pname_WIZARD_CPPAFLAGS) $($pname_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CSRC = $($pname_CPU_CSRC) $($pname_WIZARD_CSRC) $($pname_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_PCSRC = $($pname_CPU_PCSRC) $($pname_WIZARD_PCSRC) $($pname_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CPPASRC = $($pname_CPU_CPPASRC) $($pname_WIZARD_CPPASRC) $($pname_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CXXSRC = $($pname_CPU_CXXSRC) $($pname_WIZARD_CXXSRC) $($pname_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_ASRC = $($pname_CPU_ASRC) $($pname_WIZARD_ASRC) $($pname_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$cpuparameters diff --git a/2.5/wizard/mktemplates/template.mk b/2.5/wizard/mktemplates/template.mk new file mode 100644 index 00000000..ef9d934d --- /dev/null +++ b/2.5/wizard/mktemplates/template.mk @@ -0,0 +1,72 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the $pname_user.mk file instead. +# + +# Constants automatically defined by the selected modules +$constants + +# Our target application +TRG += $pname + +$pname_PREFIX = "$prefix" + +$pname_SUFFIX = "$suffix" + +$pname_SRC_PATH = $ppath + +$pname_HW_PATH = $hwpath + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_CSRC INSTEAD! +$pname_WIZARD_CSRC = \ + $csrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_PCSRC INSTEAD! +$pname_WIZARD_PCSRC = \ + $pcsrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_CPPASRC INSTEAD! +$pname_WIZARD_CPPASRC = \ + $cppasrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_CXXSRC INSTEAD! +$pname_WIZARD_CXXSRC = \ + $cxxsrc + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE $pname_USER_ASRC INSTEAD! +$pname_WIZARD_ASRC = \ + $asrc + # + +$pname_CPPFLAGS = -D'CPU_FREQ=($cpuclockfreqUL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$($pname_HW_PATH) -I$($pname_SRC_PATH) $($pname_CPU_CPPFLAGS) $($pname_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_LDFLAGS = $($pname_CPU_LDFLAGS) $($pname_WIZARD_LDFLAGS) $($pname_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CPPAFLAGS = $($pname_CPU_CPPAFLAGS) $($pname_WIZARD_CPPAFLAGS) $($pname_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CSRC = $($pname_CPU_CSRC) $($pname_WIZARD_CSRC) $($pname_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_PCSRC = $($pname_CPU_PCSRC) $($pname_WIZARD_PCSRC) $($pname_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CPPASRC = $($pname_CPU_CPPASRC) $($pname_WIZARD_CPPASRC) $($pname_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_CXXSRC = $($pname_CPU_CXXSRC) $($pname_WIZARD_CXXSRC) $($pname_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$pname_ASRC = $($pname_CPU_ASRC) $($pname_WIZARD_ASRC) $($pname_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +$cpuparameters + +include $($pname_SRC_PATH)/$pname_user.mk diff --git a/2.5/wizard/mktemplates/template_user.mk b/2.5/wizard/mktemplates/template_user.mk new file mode 100644 index 00000000..d0a87242 --- /dev/null +++ b/2.5/wizard/mktemplates/template_user.mk @@ -0,0 +1,43 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +$pname_PROGRAMMER_TYPE = none +$pname_PROGRAMMER_PORT = none + +# Files included by the user. +$pname_USER_CSRC = \ + $main \ + # + +# Files included by the user. +$pname_USER_PCSRC = \ + # + +# Files included by the user. +$pname_USER_CPPASRC = \ + # + +# Files included by the user. +$pname_USER_CXXSRC = \ + # + +# Files included by the user. +$pname_USER_ASRC = \ + # + +# Flags included by the user. +$pname_USER_LDFLAGS = \ + # + +# Flags included by the user. +$pname_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +$pname_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/2.5/wizard/plugins/__init__.py b/2.5/wizard/plugins/__init__.py new file mode 100644 index 00000000..7a95eaf4 --- /dev/null +++ b/2.5/wizard/plugins/__init__.py @@ -0,0 +1,39 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# +import codelite + +__all__ = ["codelite"] + +plugin_list = ["codelite"] diff --git a/2.5/wizard/plugins/codelite.py b/2.5/wizard/plugins/codelite.py new file mode 100644 index 00000000..16388233 --- /dev/null +++ b/2.5/wizard/plugins/codelite.py @@ -0,0 +1,120 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +import const + +## Plugin interface ## + +PLUGIN_NAME = "CodeLite" + +PLUGIN_DESCRIPTION = "Create CodeLite project files" + +def createProject(project_info): + """ + Function that creates codelite projects and return the project relevant file. + """ + directory = project_info.info("PROJECT_PATH") + prjdir = directory + os.sep + os.path.basename(directory) + workspace = codeliteWorkspaceGenerator(project_info) + open(directory + os.sep + os.path.basename(prjdir) + ".workspace", "w").write(workspace) + project = codeliteProjectGenerator(project_info) + open(directory + os.sep + os.path.basename(prjdir) + ".project", "w").write(project) + return directory + os.sep + os.path.basename(prjdir) + ".workspace" + +#### + +def clFiles(file_dict, directory): + """ + Creates the list of the lines for the files founded in file_dict, using + directory as the base folder. + """ + filelist = [] + # Do not create an empty VDir. + # TODO: this is *really* ugly, but an empty VDir is worse + if directory: + filelist.append("" %os.path.basename(directory)) + for f in file_dict[directory]["files"]: + filelist.append("" %os.path.join(directory, f)) + for d in file_dict[directory]["dirs"]: + filelist += clFiles(file_dict, os.path.join(directory, d)) + if directory: + filelist.append("") + return filelist + +def findSources(path): + """ + Analyzes the directory tree from path and return a dict with filename and + path. + """ + if not path.endswith(os.sep): + path += os.sep + file_dict = {} + for root, dirs, files in os.walk(path): + if root.find("svn") == -1: + file_dict[root.replace(path, "")] = {"dirs": [], "files": []} + for dir in dirs: + # TODO: place the directory name in a constant file. + if dir.find("svn") == -1 and dir != "images" and dir != "obj" and dir != "doc": + file_dict[root.replace(path, "")]["dirs"].append(dir) + for file in files: + if file.endswith(const.EXTENSION_FILTER) and file != "buildrev.h": + file_dict[root.replace(path, "")]["files"].append(file) + return file_dict + +def codeliteProjectGenerator(project_info): + """ + Returns the string rapresenting the codelite project. + """ + template = open(os.path.join(const.DATA_DIR, "cltemplates/bertos.project"), "r").read() + filelist = "\n".join(clFiles(findSources(project_info.info("PROJECT_PATH")), "")) + debugger_path = project_info.info("TOOLCHAIN")["path"].replace("gcc", "gdb") + init_script = project_info.info("CPU_INFOS")["GDB_INIT_SCRIPT"] + template = template.replace("$filelist", filelist) + project_name = os.path.basename(project_info.info("PROJECT_PATH")) + template = template.replace("$project", project_name) + template = template.replace("$debuggerpath", debugger_path) + template = template.replace("$initscript", init_script) + return template + +def codeliteWorkspaceGenerator(project_info): + """ + Returns the string rapresentig the codelite workspace. + """ + template = open(os.path.join(const.DATA_DIR, "cltemplates/bertos.workspace"), "r").read() + project_name = os.path.basename(project_info.info("PROJECT_PATH")) + template = template.replace("$project", project_name) + return template diff --git a/2.5/wizard/qvariant_converter.py b/2.5/wizard/qvariant_converter.py new file mode 100644 index 00000000..8ff5be3c --- /dev/null +++ b/2.5/wizard/qvariant_converter.py @@ -0,0 +1,48 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +from PyQt4.QtCore import PYQT_VERSION_STR + +# Choose the right version of the qvariant_converter module. It's awful, +# I know, but this is the only solution in order to mantain compatibility +# with older PyQt4 version. +if PYQT_VERSION_STR <= "4.4.3": + from qvariant_converter_old import * +elif "4.4.3" < PYQT_VERSION_STR < "4.5": + from qvariant_converter_4_4 import * +elif "4.5" <= PYQT_VERSION_STR < "4.6": + from qvariant_converter_4_5 import * +else: + from qvariant_converter_4_6 import * diff --git a/2.5/wizard/qvariant_converter_4_4.py b/2.5/wizard/qvariant_converter_4_4.py new file mode 100644 index 00000000..fc7c93cd --- /dev/null +++ b/2.5/wizard/qvariant_converter_4_4.py @@ -0,0 +1,92 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +from PyQt4.QtCore import * + +def getString(qvariant): + string = unicode(qvariant.toString()) + return string + +def convertString(string): + return QVariant(string) + +def getStringList(qvariant): + string_list = [unicode(string) for string in qvariant.toStringList()] + return string_list + +def convertStringList(string_list): + return QVariant(QStringList(string_list)) + +def getStringDict(qvariant): + dict_str_str = {} + for key, value in qvariant.toMap().items(): + dict_str_str[unicode(key)] = unicode(value.toString()) + return dict_str_str + +def convertStringDict(string_dict): + result_dict = {} + for key, value in string_dict.items(): + result_dict[QString(key)] = QString(value) + return QVariant(result_dict) + +def getBool(qvariant): + return qvariant.toBool() + +def convertBool(boolean): + return QVariant(boolean) + +def getBoolDict(qvariant): + dict_str_bool = {} + for key, value in qvariant.toMap().items(): + dict_str_bool[unicode(key)] = value.toBool() + return dict_str_bool + +def convertBoolDict(dict_str_bool): + result_dict = {} + for key, value in dict_str_bool.items(): + result_dict[QString(key)] = value + return QVariant(result_dict) + +def getDict(qvariant): + dict_str_variant = {} + for key, value in qvariant.toMap().items(): + dict_str_variant[unicode(key)] = value + return dict_str_variant + +def convertDict(dict_str_variant): + result_dict = {} + for key, value in dict_str_variant.items(): + result_dict[QString(key)] = value + return QVariant(result_dict) diff --git a/2.5/wizard/qvariant_converter_4_5.py b/2.5/wizard/qvariant_converter_4_5.py new file mode 100644 index 00000000..99c1474f --- /dev/null +++ b/2.5/wizard/qvariant_converter_4_5.py @@ -0,0 +1,105 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of bertos. +# +# Slimqc is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +from PyQt4.QtCore import * + +def getString(qvariant): + if type(qvariant) != QVariant: + return qvariant + string = unicode(qvariant.toString()) + return string + +def convertString(string): + return QVariant(string) + +def getStringList(qvariant): + if type(qvariant) != QVariant: + return qvariant + string_list = [unicode(string) for string in qvariant.toStringList()] + return string_list + +def convertStringList(string_list): + return QVariant(QStringList(string_list)) + +def getStringDict(qvariant): + dict_str_str = {} + try: + for key, value in qvariant.toPyObject().items(): + dict_str_str[unicode(key)] = unicode(value) + except: + pass + return dict_str_str + +def convertStringDict(string_dict): + result_dict = {} + for key, value in string_dict.items(): + result_dict[QString(key)] = QString(value) + return QVariant(result_dict) + +def getBool(qvariant): + return qvariant.toBool() + +def convertBool(boolean): + return QVariant(boolean) + +def getBoolDict(qvariant): + dict_str_bool = {} + try: + for key, value in qvariant.toPyObject().items(): + dict_str_bool[unicode(key)] = value.toBool() + except: + pass + return dict_str_bool + +def convertBoolDict(dict_str_bool): + result_dict = {} + for key, value in dict_str_bool.items(): + result_dict[QString(key)] = QVariant(value) + return QVariant(result_dict) + +def getDict(qvariant): + dict_str_variant = {} + try: + for key, value in qvariant.toPyObject().items(): + dict_str_variant[unicode(key)] = value + except: + pass + return dict_str_variant + +def convertDict(dict_str_variant): + result_dict = {} + for key, value in dict_str_variant.items(): + result_dict[QString(key)] = value + return QVariant(result_dict) diff --git a/2.5/wizard/qvariant_converter_4_6.py b/2.5/wizard/qvariant_converter_4_6.py new file mode 100644 index 00000000..b67d2058 --- /dev/null +++ b/2.5/wizard/qvariant_converter_4_6.py @@ -0,0 +1,103 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of bertos. +# +# Slimqc is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +from PyQt4.QtCore import * + +def getString(qvariant): + if type(qvariant) != QVariant: + return qvariant + string = unicode(qvariant.toString()) + return string + +def convertString(string): + return QVariant(string) + +def getStringList(qvariant): + if type(qvariant) == QVariant: + tmp = qvariant.toPyObject() + else: + tmp = qvariant + string_list = [] + if tmp: + string_list = [unicode(string) for string in tmp] + return string_list + +def convertStringList(string_list): + return QVariant(string_list) + +def getStringDict(qvariant): + dict_str_str = {} + try: + for key, value in qvariant.toPyObject().items(): + dict_str_str[unicode(key)] = unicode(value) + except: + pass + return dict_str_str + +def convertStringDict(string_dict): + return QVariant(string_dict) + +def getBool(qvariant): + return qvariant.toBool() + +def convertBool(boolean): + return QVariant(boolean) + +def getBoolDict(qvariant): + dict_str_bool = {} + try: + for key, value in qvariant.toPyObject().items(): + dict_str_bool[unicode(key)] = value + except: + pass + return dict_str_bool + +def convertBoolDict(dict_str_bool): + return QVariant(dict_str_bool) + +def getDict(qvariant): + dict_str_variant = {} + try: + for key, value in qvariant.toMap().items(): + dict_str_variant[unicode(key)] = value + except: + pass + return dict_str_variant + +def convertDict(dict_str_variant): + result_dict = {} + for key, value in dict_str_variant.items(): + result_dict[QString(key)] = QVariant(value) + return QVariant(result_dict) diff --git a/2.5/wizard/qvariant_converter_old.py b/2.5/wizard/qvariant_converter_old.py new file mode 100644 index 00000000..1b3b9d9c --- /dev/null +++ b/2.5/wizard/qvariant_converter_old.py @@ -0,0 +1,108 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +""" +Awful module for the conversion from python types to qvariant, for make the wizard compatible with older version of pyqt (<= 4.4.3) +""" + +from PyQt4.QtCore import * +import pickle + +def getString(qvariant): + if type(qvariant) == str or type(qvariant) == unicode: + string = qvariant + else: + string = unicode(qvariant.toString()) + return string + +def convertString(string): + return QVariant(string) + +def getStringList(qvariant): + string_list = [] + if type(qvariant) == list: + string_list = qvariant + else: + for element in qvariant.toStringList(): + string_list.append(unicode(element)) + return string_list + +def convertStringList(string_list): + result = [] + for element in string_list: + result.append(QString(element)) + return QVariant(QStringList(result)) + +def getStringDict(qvariant): + a = str(qvariant.toByteArray()) + if len(a) == 0: + dict_str_str = {} + else: + dict_str_str = pickle.loads(a) + return dict_str_str + +def convertStringDict(dict_str_str): + a = pickle.dumps(dict_str_str) + return QVariant(QByteArray(a)) + +def getBool(qvariant): + return qvariant.toBool() + +def convertBool(boolean): + return QVariant(boolean) + +def getBoolDict(qvariant): + a = str(qvariant.toByteArray()) + if len(a) == 0: + dict_str_bool = {} + else: + dict_str_bool = pickle.loads(a) + return dict_str_bool + +def convertBoolDict(dict_str_bool): + a = pickle.dumps(dict_str_bool) + return QVariant(QByteArray(a)) + +def getDict(qvariant): + a = str(qvariant.toByteArray()) + if len(a) == 0: + dict_str_bool = {} + else: + dict_str_bool = pickle.loads(a) + return dict_str_bool + +def convertDict(dict_str_variant): + a = pickle.dumps(dict_str_variant) + return QVariant(QByteArray(a)) diff --git a/2.5/wizard/relpath.py b/2.5/wizard/relpath.py new file mode 100644 index 00000000..045f6173 --- /dev/null +++ b/2.5/wizard/relpath.py @@ -0,0 +1,89 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import sys + +if sys.version_info < (2, 6, 0): + from os.path import * + def _posix_relpath(path, start="."): + """Return a relative version of a path""" + + if not path: + raise ValueError("no path specified") + + start_list = abspath(start).split(sep) + path_list = abspath(path).split(sep) + + # Work out how much of the filepath is shared by start and path. + i = len(commonprefix([start_list, path_list])) + + rel_list = [pardir] * (len(start_list)-i) + path_list[i:] + if not rel_list: + return curdir + return join(*rel_list) + + def _nt_relpath(path, start="."): + """Return a relative version of a path""" + + if not path: + raise ValueError("no path specified") + start_list = abspath(start).split(sep) + path_list = abspath(path).split(sep) + if start_list[0].lower() != path_list[0].lower(): + unc_path, rest = splitunc(path) + unc_start, rest = splitunc(start) + if bool(unc_path) ^ bool(unc_start): + raise ValueError("Cannot mix UNC and non-UNC paths (%s and %s)" + % (path, start)) + else: + raise ValueError("path is on drive %s, start on drive %s" + % (path_list[0], start_list[0])) + # Work out how much of the filepath is shared by start and path. + for i in range(min(len(start_list), len(path_list))): + if start_list[i].lower() != path_list[i].lower(): + break + else: + i += 1 + + rel_list = [pardir] * (len(start_list)-i) + path_list[i:] + if not rel_list: + return curdir + return join(*rel_list) + + import posixpath + posixpath.relpath = _posix_relpath + import ntpath + ntpath.relpath = _nt_relpath +from os.path import relpath diff --git a/2.5/wizard/srctemplates/main.c b/2.5/wizard/srctemplates/main.c new file mode 100644 index 00000000..7ecafb86 --- /dev/null +++ b/2.5/wizard/srctemplates/main.c @@ -0,0 +1,20 @@ +// Emtpy main.c file generated by the wizard +#include + +static void init(void) +{ + IRQ_ENABLE; + // insert initialization calls here +} + +int main(void) +{ + init(); + while (1) + { + // your code goes here + } + + return 0; +} + diff --git a/2.5/wizard/test/testCpuTagsImport.py b/2.5/wizard/test/testCpuTagsImport.py new file mode 100644 index 00000000..df7491a1 --- /dev/null +++ b/2.5/wizard/test/testCpuTagsImport.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import sys +import os + + +sys.path.append("../") + +import BProject +from bertos_utils import * + +def main(): + p = BProject.BProject() + p.setInfo("BERTOS_PATH", "../../") + p.loadSourceTree() + info = p.getCpuInfos() + tags = getTagSet(info) + print tags + + +if __name__ == '__main__': + main() + diff --git a/2.5/wizard/test/testLoadProjectPresets.py b/2.5/wizard/test/testLoadProjectPresets.py new file mode 100644 index 00000000..7167f39d --- /dev/null +++ b/2.5/wizard/test/testLoadProjectPresets.py @@ -0,0 +1,53 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import sys +import os + + +sys.path.append("../") + +import BProject +from bertos_utils import * + +def main(): + p = BProject.BProject() + p.setInfo("BERTOS_PATH", "../../") + p.loadProjectPresets() + + +if __name__ == '__main__': + main() + diff --git a/2.5/wizard/test/testModulePage.py b/2.5/wizard/test/testModulePage.py new file mode 100644 index 00000000..6b355984 --- /dev/null +++ b/2.5/wizard/test/testModulePage.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import sys +import os + +from PyQt4.QtGui import * + +# Add the wizard class path in the path for the testing module +sys.path.append("../") + +import BProject +import BModulePage +import bertos_utils + +# Add a custom UI_LOCATION constant +BModulePage.UI_LOCATION = "../ui" + +def main(): + app = QApplication([]) + app.project = BProject.BProject() + page = BModulePage.BModulePage() + page.setProjectInfo("BERTOS_PATH", "../../") + page.setProjectInfo("CPU_INFOS", {"TOOLCHAIN": "avr", "CPU_TAGS": []}) + page.project().loadSourceTree() + page.reloadData() + page.show() + app.exec_() + +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/2.5/wizard/toolchain_manager.py b/2.5/wizard/toolchain_manager.py new file mode 100755 index 00000000..6b6f359e --- /dev/null +++ b/2.5/wizard/toolchain_manager.py @@ -0,0 +1,134 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtCore import * +from PyQt4.QtGui import * + +import qvariant_converter +from toolchain_validation import validateToolchain + + +class ToolchainManager(object): + def __init__(self): + self._app_settings = QApplication.instance().settings + + def validateToolchain(self, toolchain): + toolchains = self.storedToolchainDict() + if toolchain in toolchains: + toolchains[toolchain] = True + self.setStoredToolchainDict(toolchains) + return self._validateToolchain(toolchain) + elif toolchain in self._predefined_toolchain_set: + return self._validateToolchain(toolchain) + else: + return None + + def _validateToolchain(self, toolchain): + """ + Returns information about the toolchain located in path + "toolchain". If the toolchain is not recognized, or it doesn't + exists anymore a empty dict is returned. + + Example of toolchain information dict: + { + "target": "arm", + "version": "4.0.6", + "build": None, + "configured": None, + "thread": None, + } + """ + return validateToolchain(toolchain) + + def addToolchain(self, toolchain, validated=False): + if toolchain not in self.predefined_toolchains: + toolchains = self.storedToolchainDict() + toolchains[toolchain] = validated + self.setStoredToolchainDict(toolchains) + + def removeToolchain(self, toolchain): + toolchains = self.storedToolchainDict() + if toolchain in toolchains: + del toolchains[toolchain] + self.setStoredToolchainDict(toolchains) + + def storedToolchainDict(self): + toolchains = self._app_settings.value("toolchains", QVariant()) + toolchains = qvariant_converter.getBoolDict(toolchains) + return toolchains + + def setStoredToolchainDict(self, toolchain_dict): + toolchains = qvariant_converter.convertBoolDict(toolchain_dict) + self._app_settings.setValue("toolchains", toolchains) + + @property + def toolchains(self): + toolchains = [] + toolchain_dict = self.storedToolchainDict() + for toolchain, validated in toolchain_dict.items(): + if validated: + information = self._validateToolchain(toolchain) + else: + information = None + toolchains.append((toolchain, information)) + return toolchains + + @property + def predefined_toolchains(self): + toolchains = [] + stored_toolchains = self._predefined_toolchain_set + for toolchain in stored_toolchains: + toolchains.append((toolchain, self._validateToolchain(toolchain))) + return toolchains + + @property + def _predefined_toolchain_set(self): + stored_toolchains = set() + if os.name == "nt": + import winreg_importer + stored_toolchains |= set(winreg_importer.getBertosToolchains()) + return stored_toolchains + + def suitableToolchains(self, target): + toolchains = self.toolchains + suitable_toolchains = [] + for name, info in toolchains: + t = info.get("target", None) + if t and t.find(target) != -1: + suitable_toolchains.append(name) + return suitable_toolchains + diff --git a/2.5/wizard/toolchain_validation.py b/2.5/wizard/toolchain_validation.py new file mode 100644 index 00000000..e6386ee6 --- /dev/null +++ b/2.5/wizard/toolchain_validation.py @@ -0,0 +1,62 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id$ +# +# Author: Lorenzo Berni +# + +import os + +from PyQt4.QtCore import * + +import bertos_utils + +from const import TOOLCHAIN_ITEMS + +def validateToolchain(toolchain): + if not os.path.exists(toolchain): + return {} + for tool in TOOLCHAIN_ITEMS: + if not os.path.exists(toolchain.replace("gcc", tool)): + return {} + validation_process = QProcess() + validation_process.start(toolchain, ["-v"]) + validation_process.waitForStarted(1000) + if validation_process.waitForFinished(200): + description = unicode(validation_process.readAllStandardError()) + info = bertos_utils.getToolchainInfo(description) + if len(info) >= 4: + return info + else: + return {} + else: + validation_process.kill() + return {} diff --git a/2.5/wizard/ui/bertos_versions.ui b/2.5/wizard/ui/bertos_versions.ui new file mode 100644 index 00000000..59a10373 --- /dev/null +++ b/2.5/wizard/ui/bertos_versions.ui @@ -0,0 +1,137 @@ + + + Form + + + + 0 + 0 + 445 + 371 + + + + + 0 + 0 + + + + Form + + + + + + + + + 300 + 100 + + + + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + + + + + + :/images/listadd.png:/images/listadd.png + + + + 16 + 16 + + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + - + + + + :/images/listremove.png:/images/listremove.png + + + + 16 + 16 + + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + + 0 + 26 + + + + + 16777215 + 26 + + + + Update + + + + + + + + + + + + + + diff --git a/2.5/wizard/ui/board_select.ui b/2.5/wizard/ui/board_select.ui new file mode 100644 index 00000000..fd1e48f0 --- /dev/null +++ b/2.5/wizard/ui/board_select.ui @@ -0,0 +1,72 @@ + + + Form + + + + 0 + 0 + 558 + 364 + + + + Form + + + + + + + + + + + 0 + 0 + + + + + 200 + 0 + + + + + 200 + 16777215 + + + + + + + + + + + + <p><strong>Custom board project </strong>- select me when your board is not present into the list above.</p> + + + I have a custom board... + + + + + + + + + + + true + + + + + + + + diff --git a/2.5/wizard/ui/cpu_select.ui b/2.5/wizard/ui/cpu_select.ui new file mode 100644 index 00000000..a6cbce36 --- /dev/null +++ b/2.5/wizard/ui/cpu_select.ui @@ -0,0 +1,119 @@ + + + Form + + + + 0 + 0 + 579 + 452 + + + + + 0 + 0 + + + + Form + + + + + + + + + 200 + 0 + + + + + 200 + 16777215 + + + + + + + + + + QFrame::StyledPanel + + + QFrame::Raised + + + + + + Select a CPU from the list... + + + Qt::AlignLeading|Qt::AlignLeft|Qt::AlignTop + + + + + + + + + + + + + + + + CPU frequency: + + + frequencySpinBox + + + + + + + Hz + + + 0 + + + 1.000000000000000 + + + 1000000000.000000000000000 + + + 1000.000000000000000 + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + + + + diff --git a/2.5/wizard/ui/dir_select.ui b/2.5/wizard/ui/dir_select.ui new file mode 100644 index 00000000..030ef286 --- /dev/null +++ b/2.5/wizard/ui/dir_select.ui @@ -0,0 +1,175 @@ + + + Form + + + + 0 + 0 + 558 + 314 + + + + + 0 + 0 + + + + Form + + + + + + + + Project Name + + + + + + + + 300 + 0 + + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + Destination directory + + + + + + + + 300 + 0 + + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + + 26 + 26 + + + + + + + + :/images/folderopen.png:/images/folderopen.png + + + + 26 + 26 + + + + + + + + + + + + + 110 + 16777215 + + + + Project directory: + + + + + + + None + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + + + Qt::Vertical + + + + 20 + 159 + + + + + + + + + + + true + + + + + + + + + + diff --git a/2.5/wizard/ui/final_page.ui b/2.5/wizard/ui/final_page.ui new file mode 100644 index 00000000..e004b08e --- /dev/null +++ b/2.5/wizard/ui/final_page.ui @@ -0,0 +1,87 @@ + + + Form + + + + 0 + 0 + 584 + 321 + + + + Form + + + + + + + + + 0 + 0 + + + + + + + :/images/ok.png + + + + + + + QFrame::Plain + + + <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0//EN" "http://www.w3.org/TR/REC-html40/strict.dtd"> +<html><head><meta name="qrichtext" content="1" /><style type="text/css"> +p, li { white-space: pre-wrap; } +</style></head><body style=" font-family:'Lucida Grande'; font-size:13pt; font-weight:400; font-style:normal;"> +<p align="center" style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;"><span style=" font-weight:600;">Project created successfully!</span></p> +<p align="center" style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">You can now start developing your application.</p></body></html> + + + Qt::RichText + + + true + + + + + + + + + + 0 + 0 + + + + true + + + + + 0 + 0 + 556 + 76 + + + + + + + + + + + + diff --git a/2.5/wizard/ui/intro_page.ui b/2.5/wizard/ui/intro_page.ui new file mode 100644 index 00000000..28e22426 --- /dev/null +++ b/2.5/wizard/ui/intro_page.ui @@ -0,0 +1,100 @@ + + + Form + + + + 0 + 0 + 455 + 345 + + + + Form + + + + + + + 0 + 0 + + + + + 0 + 0 + + + + + 16777215 + 16777215 + + + + + + + :/images/logo.png + + + false + + + Qt::AlignCenter + + + + + + + + 0 + 0 + + + + + 429 + 200 + + + + <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0//EN" "http://www.w3.org/TR/REC-html40/strict.dtd"> +<html><head><meta name="qrichtext" content="1" /><style type="text/css"> +p, li { white-space: pre-wrap; } +</style></head><body> +<p>Quickly <span style="font-weight:600;">create and modify</span> your projects with the graphical wizard, with a step-by-step procedure:</p> +<ol><li><span style=" font-weight:600;">Select</span> which BeRTOS version you want to use in your project;</li> +<li><span style=" font-weight:600;">Choose</span> Toolchain or microcontroller you want to use;</li> +<li><span style=" font-weight:600;">Insert</span> the modules needed by your application directly from the graphical interface;</li> +<li><span style=" font-weight:600;">Generate</span> a project ready for CodeLite o GNU Make!</li></ol></body></html> + + + true + + + + + + + Qt::Vertical + + + + 20 + 10 + + + + + + + + + + + diff --git a/2.5/wizard/ui/module_select.ui b/2.5/wizard/ui/module_select.ui new file mode 100644 index 00000000..be0fb92d --- /dev/null +++ b/2.5/wizard/ui/module_select.ui @@ -0,0 +1,133 @@ + + + Form + + + + 0 + 0 + 572 + 409 + + + + + 0 + 0 + + + + Form + + + + + + + + + 200 + 0 + + + + + 200 + 16777215 + + + + + + + + + 175 + 0 + + + + + 175 + 16777215 + + + + Automatically fix +dependecies + + + true + + + + + + + + + + + Qt::Vertical + + + + + + + + + + + + + + + + + + + 200 + 0 + + + + QAbstractItemView::NoEditTriggers + + + true + + + QAbstractItemView::SingleSelection + + + QAbstractItemView::SelectRows + + + false + + + true + + + false + + + + + + + + + + true + + + + + + + + + + diff --git a/2.5/wizard/ui/preset_page.ui b/2.5/wizard/ui/preset_page.ui new file mode 100644 index 00000000..0da7fc65 --- /dev/null +++ b/2.5/wizard/ui/preset_page.ui @@ -0,0 +1,55 @@ + + + Form + + + + 0 + 0 + 551 + 485 + + + + Form + + + + + + + + + + + + + + + + 200 + 0 + + + + + 200 + 16777215 + + + + + + + + true + + + + + + + + + + diff --git a/2.5/wizard/ui/project_creation.ui b/2.5/wizard/ui/project_creation.ui new file mode 100644 index 00000000..23f45a3d --- /dev/null +++ b/2.5/wizard/ui/project_creation.ui @@ -0,0 +1,33 @@ + + + Form + + + + 0 + 0 + 402 + 336 + + + + Form + + + + + + + + + Do not create Codelite project files + + + + + + + + + + diff --git a/2.5/wizard/ui/project_presets.ui b/2.5/wizard/ui/project_presets.ui new file mode 100644 index 00000000..2925c82c --- /dev/null +++ b/2.5/wizard/ui/project_presets.ui @@ -0,0 +1,28 @@ + + + Form + + + + 0 + 0 + 501 + 403 + + + + Form + + + + + + -1 + + + + + + + + diff --git a/2.5/wizard/ui/project_select.ui b/2.5/wizard/ui/project_select.ui new file mode 100644 index 00000000..36995c61 --- /dev/null +++ b/2.5/wizard/ui/project_select.ui @@ -0,0 +1,72 @@ + + + Form + + + + 0 + 0 + 397 + 143 + + + + Form + + + + + + QLayout::SetDefaultConstraint + + + + + + 0 + 0 + + + + Project name: + + + + + + + + 0 + 0 + + + + Project folder: + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/2.5/wizard/ui/start.ui b/2.5/wizard/ui/start.ui new file mode 100644 index 00000000..844c6ba6 --- /dev/null +++ b/2.5/wizard/ui/start.ui @@ -0,0 +1,131 @@ + + + Form + + + + 0 + 0 + 358 + 311 + + + + Form + + + + + + + + + + + 128 + 128 + + + + + 128 + 128 + + + + + + + + :/images/filenew.png:/images/filenew.png + + + + 128 + 128 + + + + false + + + false + + + + + + + + + Create a new BeRTOS project + + + + + + + + + + + Qt::Horizontal + + + + + + + + + + 128 + 128 + + + + + 128 + 128 + + + + + + + + :/images/fileopen.png:/images/fileopen.png + + + + 128 + 128 + + + + false + + + + + + + + + Edit an existent BeRTOS project + + + + + + + + + + + + + + + + diff --git a/2.5/wizard/ui/toolchain_search.ui b/2.5/wizard/ui/toolchain_search.ui new file mode 100644 index 00000000..b0e038c7 --- /dev/null +++ b/2.5/wizard/ui/toolchain_search.ui @@ -0,0 +1,149 @@ + + + Form + + + + 0 + 0 + 618 + 372 + + + + Form + + + + + + + 0 + 0 + + + + Search in the system PATH + + + + + + + Additional search directories: + + + + + + + 200 + 0 + + + + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + + + + + :/images/listadd.png:/images/listadd.png + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + + + + + :/images/listremove.png:/images/listremove.png + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + Cancel + + + + + + + Search + + + + + + + + + + + + diff --git a/2.5/wizard/ui/toolchain_select.ui b/2.5/wizard/ui/toolchain_select.ui new file mode 100644 index 00000000..b9223fee --- /dev/null +++ b/2.5/wizard/ui/toolchain_select.ui @@ -0,0 +1,135 @@ + + + Form + + + + 0 + 0 + 643 + 459 + + + + Form + + + + + + + 200 + 0 + + + + + + + + + + + true + + + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + + + + + :/images/listadd.png:/images/listadd.png + + + + 16 + 16 + + + + + + + + + 26 + 26 + + + + + 26 + 26 + + + + + + + + :/images/listremove.png:/images/listremove.png + + + + 16 + 16 + + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + Get information on toolchains + + + Validate + + + + + + + Search... + + + + + + + + + + + + diff --git a/2.5/wizard/vtemplates/VERSION b/2.5/wizard/vtemplates/VERSION new file mode 100644 index 00000000..a767b192 --- /dev/null +++ b/2.5/wizard/vtemplates/VERSION @@ -0,0 +1 @@ +$version [local copy] diff --git a/2.5/wizard/winreg_importer.py b/2.5/wizard/winreg_importer.py new file mode 100644 index 00000000..b7981cc4 --- /dev/null +++ b/2.5/wizard/winreg_importer.py @@ -0,0 +1,87 @@ +#!/usr/bin/env python +# encoding: utf-8 +# +# This file is part of BeRTOS. +# +# Bertos is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# As a special exception, you may use this file as part of a free software +# library without restriction. Specifically, if other files instantiate +# templates or use macros or inline functions from this file, or you compile +# this file and link it with other files to produce an executable, this +# file does not by itself cause the resulting executable to be covered by +# the GNU General Public License. This exception does not however +# invalidate any other reasons why the executable file might be covered by +# the GNU General Public License. +# +# Copyright 2008 Develer S.r.l. (http://www.develer.com/) +# +# $Id: qvariant_converter.py 2506 2009-04-15 08:29:07Z duplo $ +# +# Author: Lorenzo Berni +# + +from _winreg import * + +# Open the registry keys. When the keys don't exist it do nothing +try: + DIR_KEY = OpenKey(HKEY_LOCAL_MACHINE, "SOFTWARE\Develer\BeRTOS SDK\BeRTOS Dirs") +except WindowsError: + DIR_KEY = None + +try: + TOOLCHAIN_KEY = OpenKey(HKEY_LOCAL_MACHINE, "SOFTWARE\Develer\BeRTOS SDK\Toolchain Executables") +except WindowsError: + TOOLCHAIN_KEY = None + +try: + CLI_KEY = OpenKey(HKEY_LOCAL_MACHINE, "SOFTWARE\Develer\BeRTOS SDK\Ide Command Lines") +except WindowsError: + CLI_KEY = None + +def getBertosDirs(): + """ + Returns the path of the BeRTOS versions installed by the BeRTOS SDK installer. + """ + return getFromRegistry(DIR_KEY).values() + +def getBertosToolchains(): + """ + Returns the path of the executables of the toolchains installed by the BeRTOS + SDK installer. + """ + return getFromRegistry(TOOLCHAIN_KEY).values() + +def getCommandLines(): + """ + Returns the command lines to launch in order to open the selected IDE. + """ + return getFromRegistry(CLI_KEY) + +def getFromRegistry(key): + """ + Returns the value of all the named values of the given key. + """ + index = 0 + items = {} + if key: + while True: + try: + item = EnumValue(key, index) + items[item[0]] = item[1] + index += 1 + except WindowsError: + break + return items \ No newline at end of file -- 2.25.1

    • +Arduino Duemilanove® is an AVR based board. Visit http://www.arduino.cc for more information. +