From 531b8fef8fb5921071f879b682c0bf90f82f5224 Mon Sep 17 00:00:00 2001
From: asterix <asterix@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Fri, 12 Dec 2008 16:37:24 +0000
Subject: [PATCH] Add sam7 cpu settings.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@2026 38d2e660-2303-0410-9eaa-f027e97ec537
---
 .../scripts/openocd_new_at91sam7_ftdi_rom.cfg | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/bertos/cpu/arm/scripts/openocd_new_at91sam7_ftdi_rom.cfg b/bertos/cpu/arm/scripts/openocd_new_at91sam7_ftdi_rom.cfg
index e0bc29b3..ff137cc9 100644
--- a/bertos/cpu/arm/scripts/openocd_new_at91sam7_ftdi_rom.cfg
+++ b/bertos/cpu/arm/scripts/openocd_new_at91sam7_ftdi_rom.cfg
@@ -44,6 +44,25 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
 
+$_TARGETNAME configure -event reset-init { 
+        # disable watchdog
+        mww 0xfffffd44 0x00008000       
+        # enable user reset
+        mww 0xfffffd08 0xa5000001       
+        # CKGR_MOR : enable the main oscillator
+        mww 0xfffffc20 0x00000601       
+        sleep 10
+        # CKGR_PLLR: 96.1097 MHz
+        mww 0xfffffc2c 0x00481c0e       
+        sleep 10
+        # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+        mww 0xfffffc30 0x00000007       
+        sleep 10
+        # MC_FMR: flash mode (FWS=1,FMCN=60)
+        mww 0xffffff60 0x003c0100       
+        sleep 100
+}
+
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank <driver> <base> <size> <chip_width> <bus_width>
-- 
2.25.1