From 5b7ff7a2a2262648f53d0027b8718a06b6d4de34 Mon Sep 17 00:00:00 2001 From: asterix Date: Wed, 3 Dec 2008 16:23:56 +0000 Subject: [PATCH] Add local cfg. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1969 38d2e660-2303-0410-9eaa-f027e97ec537 --- examples/at91sam7s/cfg/cfg_ser.h | 128 +++++++++++++++++++++++++++++ examples/at91sam7s/cfg/cfg_timer.h | 55 +++++++++++++ 2 files changed, 183 insertions(+) create mode 100644 examples/at91sam7s/cfg/cfg_ser.h create mode 100644 examples/at91sam7s/cfg/cfg_timer.h diff --git a/examples/at91sam7s/cfg/cfg_ser.h b/examples/at91sam7s/cfg/cfg_ser.h new file mode 100644 index 00000000..719658b2 --- /dev/null +++ b/examples/at91sam7s/cfg/cfg_ser.h @@ -0,0 +1,128 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ +/// Serial settings +#define CONFIG_SER_PORT 0 +#define CONFIG_SER_BAUDRATE 115200 + +/// Spi settings +#define CONFIG_SPI_PORT 0 +#define CONFIG_SPI_BAUDRATE 5000000UL + + +/// [bytes] Size of the outbound FIFO buffer for port 0. +#define CONFIG_UART0_TXBUFSIZE 32 + +/// [bytes] Size of the inbound FIFO buffer for port 0. +#define CONFIG_UART0_RXBUFSIZE 32 + +/// [bytes] Size of the outbound FIFO buffer for port 1. +#define CONFIG_UART1_TXBUFSIZE 32 + +/// [bytes] Size of the inbound FIFO buffer for port 1. +#define CONFIG_UART1_RXBUFSIZE 32 + + +/// [bytes] Size of the outbound FIFO buffer for SPI port (AVR only) +#define CONFIG_SPI_TXBUFSIZE 32 + +/// [bytes] Size of the inbound FIFO buffer for SPI port (AVR only) +#define CONFIG_SPI_RXBUFSIZE 32 + +/// [bytes] Size of the outbound FIFO buffer for SPI port 0. +#define CONFIG_SPI0_TXBUFSIZE 32 + +/// [bytes] Size of the inbound FIFO buffer for SPI port 0. +#define CONFIG_SPI0_RXBUFSIZE 32 + +/// [bytes] Size of the outbound FIFO buffer for SPI port 1. +#define CONFIG_SPI1_TXBUFSIZE 32 + +/// [bytes] Size of the inbound FIFO buffer for SPI port 1. +#define CONFIG_SPI1_RXBUFSIZE 32 + +/// SPI data order (AVR only). +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/// SPI clock division factor (AVR only). +#define CONFIG_SPI_CLOCK_DIV 16 + +/// SPI clock polarity: 0 = normal low, 1 = normal high (AVR only). +#define CONFIG_SPI_CLOCK_POL 0 + +/// SPI clock phase: 0 = sample on first edge, 1 = sample on second clock edge (AVR only). +#define CONFIG_SPI_CLOCK_PHASE 0 + +/// Default transmit timeout (ms). Set to -1 to disable timeout support. +#define CONFIG_SER_TXTIMEOUT -1 + +/// Default receive timeout (ms). Set to -1 to disable timeout support. +#define CONFIG_SER_RXTIMEOUT -1 + +/// Use RTS/CTS handshake +#define CONFIG_SER_HWHANDSHAKE 0 + +/// Default baud rate (set to 0 to disable). +#define CONFIG_SER_DEFBAUDRATE 0 + +/// Enable ser_gets() and ser_gets_echo(). +#define CONFIG_SER_GETS 0 + +/// Enable second serial port in emulator. +#define CONFIG_EMUL_UART1 0 + +/** + * Transmit always something on serial port 0 TX + * to avoid interference when sending burst of data, + * using AVR multiprocessor serial mode + */ +#define CONFIG_SER_TXFILL 0 + +/// For serial debug. +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/examples/at91sam7s/cfg/cfg_timer.h b/examples/at91sam7s/cfg/cfg_timer.h new file mode 100644 index 00000000..9d8357ef --- /dev/null +++ b/examples/at91sam7s/cfg/cfg_timer.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/// Hardware timer selection for drv/timer.c +#define CONFIG_TIMER TIMER_DEFAULT + +/// Debug timer interrupt using a strobe pin. +#define CONFIG_TIMER_STROBE 0 + +/// Enable asynchronous timers +#define CONFIG_TIMER_EVENTS 1 + +/// Support hi-res timer_usleep() +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ -- 2.25.1