From 5d844d5cb1191db2d80d8e61504a8a43068f4d49 Mon Sep 17 00:00:00 2001 From: batt Date: Mon, 12 Apr 2010 21:24:07 +0000 Subject: [PATCH] LPC2xxx: Add Vectored Interrupt Controller (VIC) driver. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3417 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/arm/drv/vic_lpc2.c | 51 +++++++++++++++++++++ bertos/cpu/arm/drv/vic_lpc2.h | 78 ++++++++++++++++++++++++++++++++ bertos/cpu/arm/hw/init_lpc2.c | 8 ++++ bertos/cpu/arm/hw/vectors_lpc2.S | 7 ++- 4 files changed, 143 insertions(+), 1 deletion(-) create mode 100644 bertos/cpu/arm/drv/vic_lpc2.c create mode 100644 bertos/cpu/arm/drv/vic_lpc2.h diff --git a/bertos/cpu/arm/drv/vic_lpc2.c b/bertos/cpu/arm/drv/vic_lpc2.c new file mode 100644 index 00000000..066e7fee --- /dev/null +++ b/bertos/cpu/arm/drv/vic_lpc2.c @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Vectored Interrupt Controller VIC driver. + * + * notest:arm + */ +#include "vic_lpc2.h" +#include + + +void NORETURN vic_defaultHandler(void) +{ + IRQ_DISABLE; + LOG_ERR("Unhandled IRQ\n" + "VICIRQStatus %08lX\n" + "VICFIQStatus %08lX\n", VICIRQStatus, VICFIQStatus); + while (1) + PAUSE; +} diff --git a/bertos/cpu/arm/drv/vic_lpc2.h b/bertos/cpu/arm/drv/vic_lpc2.h new file mode 100644 index 00000000..22a2bda7 --- /dev/null +++ b/bertos/cpu/arm/drv/vic_lpc2.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Vectored Interrupt Controller VIC driver. + */ + +#ifndef DRV_VIC_LPC2_H +#define DRV_VIC_LPC2_H + +#include +#include + +#if CPU_ARM_LPC2378 + #include + #define vic_vector(i) (*(&VICVectAddr0 + i)) + #define vic_priority(i) (*(&VICVectCntl0 + i)) + #define VIC_SRC_CNT 32 + #define vic_enable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnable = BV(i); } while (0) + #define vic_disable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnClr = BV(i); } while (0) + + typedef void vic_handler_t(void); + void vic_defaultHandler(void); + + INLINE void vic_init(void) + { + IRQ_DISABLE; + /* Assign all sources to IRQ (not to FIQ) */ + VICIntSelect = 0; + /* Disable all sw interrupts */ + VICSoftIntClr = 0xFFFFFFFF; + /* Disable all interrupts */ + VICIntEnClr = 0xFFFFFFFF; + + for (int i = 0; i < VIC_SRC_CNT; i++) + vic_vector(i) = (reg32_t)vic_defaultHandler; + } + + INLINE void vic_setVector(int id, vic_handler_t *handler) + { + ASSERT(id < VIC_SRC_CNT); + vic_vector(id) = (reg32_t)handler; + } +#else + #error Unknown CPU +#endif + +#endif /* DRV_VIC_LPC2_H */ diff --git a/bertos/cpu/arm/hw/init_lpc2.c b/bertos/cpu/arm/hw/init_lpc2.c index f08d2a32..033216d1 100644 --- a/bertos/cpu/arm/hw/init_lpc2.c +++ b/bertos/cpu/arm/hw/init_lpc2.c @@ -36,6 +36,7 @@ * notest:arm */ #include +#include #include #if CPU_FREQ != 72000000UL @@ -119,3 +120,10 @@ void __init1(void) /* Memory accelerator module fully enabled */ MAMCR = 0x02; } + +void __init2(void); + +void __init2(void) +{ + vic_init(); +} diff --git a/bertos/cpu/arm/hw/vectors_lpc2.S b/bertos/cpu/arm/hw/vectors_lpc2.S index d5568fb9..1e6d3eb4 100644 --- a/bertos/cpu/arm/hw/vectors_lpc2.S +++ b/bertos/cpu/arm/hw/vectors_lpc2.S @@ -35,6 +35,7 @@ * \brief NXP LPC2xxx interrupt vectors. */ +#include #include "cfg/cfg_arch.h" #if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) /* Avoid errors during nigthly test */ @@ -54,8 +55,12 @@ __vectors: ldr pc, _prefetch_abort /* Prefetch abort */ ldr pc, _data_abort /* Data abort */ .word 0xb9205f88 /* In LPX2xxx, this location holds the checksum of the previous vectors */ - +#if CPU_ARM_LPC2378 + ldr pc, [pc, #-0x120] /* Use VIC */ +#else + #warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030 ldr pc, [pc, #-0xFF0] /* Use VIC */ +#endif ldr pc, _fiq /* Fast interrupt request */ _init: .word __init -- 2.25.1