From 6e0b59dab1ec92a0911eb5e8ebde34d96bb4739d Mon Sep 17 00:00:00 2001 From: asterix Date: Wed, 19 May 2010 13:11:34 +0000 Subject: [PATCH] Update boards projects. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3728 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cfg/cfg_gfx.h | 42 ++--- bertos/drv/lcd_gfx_hwtest.c | 2 - bertos/gfx/gfx.h | 35 +++- bertos/gfx/text.h | 1 - bertos/gui/leveledit.c | 2 +- bertos/gui/menu.c | 10 ++ bertos/gui/menu.h | 4 + .../examples/aprs/cfg/cfg_lcd_32122a.h | 63 +++++++ .../aprs/cfg/{cfg_lcd.h => cfg_lcd_hd44.h} | 17 -- boards/arduino/hw/hw_lcd.h | 156 ----------------- boards/arduino/hw/hw_lcd_32122a.h | 155 +++++++++++++++++ .../hw/hw_lcd.h => arduino/hw/hw_lcd_hd44.h} | 19 +-- .../context_switch/cfg/cfg_lcd_32122a.h | 63 +++++++ .../context_switch/cfg/cfg_lcd_hd44.h} | 17 -- .../kernel_footprint/cfg/cfg_lcd_32122a.h | 63 +++++++ .../cfg/cfg_lcd_hd44.h} | 17 -- .../examples/sd_fat/cfg/cfg_lcd_32122a.h | 63 +++++++ .../sd_fat/cfg/cfg_lcd_hd44.h} | 17 -- boards/at91sam7x-ek/hw/hw_lcd_32122a.h | 155 +++++++++++++++++ .../hw/hw_lcd_hd44.h} | 19 +-- .../benchmark/context_switch/cfg/cfg_lcd.h | 72 -------- .../context_switch/cfg/cfg_lcd_32122a.h | 63 +++++++ .../context_switch/cfg/cfg_lcd_hd44.h | 55 ++++++ .../benchmark/kernel_footprint/cfg/cfg_lcd.h | 72 -------- .../kernel_footprint/cfg/cfg_lcd_32122a.h | 63 +++++++ .../kernel_footprint/cfg/cfg_lcd_hd44.h | 55 ++++++ boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd.h | 72 -------- .../examples/gps/cfg/cfg_lcd_32122a.h | 63 +++++++ .../examples/gps/cfg/cfg_lcd_hd44.h | 55 ++++++ boards/ek-lm3s1968/hw/hw_lcd_32122a.h | 155 +++++++++++++++++ .../hw/{hw_lcd.h => hw_lcd_hd44.h} | 19 +-- .../benchmark/context_switch/cfg/cfg_lcd.h | 72 -------- .../context_switch/cfg/cfg_lcd_32122a.h | 63 +++++++ .../context_switch/cfg/cfg_lcd_hd44.h | 55 ++++++ .../benchmark/kernel_footprint/cfg/cfg_lcd.h | 72 -------- .../kernel_footprint/cfg/cfg_lcd_32122a.h | 63 +++++++ .../kernel_footprint/cfg/cfg_lcd_hd44.h | 55 ++++++ boards/ek-lpc-p2378/hw/hw_lcd_32122a.h | 155 +++++++++++++++++ .../hw/{hw_lcd.h => hw_lcd_hd44.h} | 25 +-- .../benchmark/context_switch/cfg/cfg_lcd.h | 72 -------- .../context_switch/cfg/cfg_lcd_32122a.h | 63 +++++++ .../context_switch/cfg/cfg_lcd_hd44.h | 55 ++++++ .../benchmark/kernel_footprint/cfg/cfg_lcd.h | 72 -------- .../kernel_footprint/cfg/cfg_lcd_32122a.h | 63 +++++++ .../kernel_footprint/cfg/cfg_lcd_hd44.h | 55 ++++++ boards/triface/examples/triface/cfg/cfg_lcd.h | 72 -------- .../examples/triface/cfg/cfg_lcd_32122a.h | 63 +++++++ .../examples/triface/cfg/cfg_lcd_hd44.h | 55 ++++++ boards/triface/hw/hw_lcd_32122a.h | 155 +++++++++++++++++ boards/triface/hw/hw_lcd_hd44.h | 157 ++++++++++++++++++ 50 files changed, 2228 insertions(+), 878 deletions(-) create mode 100644 boards/arduino/examples/aprs/cfg/cfg_lcd_32122a.h rename boards/arduino/examples/aprs/cfg/{cfg_lcd.h => cfg_lcd_hd44.h} (84%) delete mode 100644 boards/arduino/hw/hw_lcd.h create mode 100644 boards/arduino/hw/hw_lcd_32122a.h rename boards/{at91sam7x-ek/hw/hw_lcd.h => arduino/hw/hw_lcd_hd44.h} (94%) create mode 100644 boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h rename boards/at91sam7x-ek/{examples/sd_fat/cfg/cfg_lcd.h => benchmark/context_switch/cfg/cfg_lcd_hd44.h} (84%) create mode 100644 boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h rename boards/at91sam7x-ek/benchmark/{context_switch/cfg/cfg_lcd.h => kernel_footprint/cfg/cfg_lcd_hd44.h} (84%) create mode 100644 boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h rename boards/at91sam7x-ek/{benchmark/kernel_footprint/cfg/cfg_lcd.h => examples/sd_fat/cfg/cfg_lcd_hd44.h} (84%) create mode 100644 boards/at91sam7x-ek/hw/hw_lcd_32122a.h rename boards/{triface/hw/hw_lcd.h => at91sam7x-ek/hw/hw_lcd_hd44.h} (94%) delete mode 100644 boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd.h create mode 100644 boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h create mode 100644 boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h delete mode 100644 boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd.h create mode 100644 boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h create mode 100644 boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h delete mode 100644 boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd.h create mode 100644 boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h create mode 100644 boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h create mode 100644 boards/ek-lm3s1968/hw/hw_lcd_32122a.h rename boards/ek-lm3s1968/hw/{hw_lcd.h => hw_lcd_hd44.h} (94%) delete mode 100644 boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd.h create mode 100644 boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h create mode 100644 boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h delete mode 100644 boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd.h create mode 100644 boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h create mode 100644 boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h create mode 100644 boards/ek-lpc-p2378/hw/hw_lcd_32122a.h rename boards/ek-lpc-p2378/hw/{hw_lcd.h => hw_lcd_hd44.h} (92%) delete mode 100644 boards/triface/benchmark/context_switch/cfg/cfg_lcd.h create mode 100644 boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h create mode 100644 boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h delete mode 100644 boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd.h create mode 100644 boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h create mode 100644 boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h delete mode 100644 boards/triface/examples/triface/cfg/cfg_lcd.h create mode 100644 boards/triface/examples/triface/cfg/cfg_lcd_32122a.h create mode 100644 boards/triface/examples/triface/cfg/cfg_lcd_hd44.h create mode 100644 boards/triface/hw/hw_lcd_32122a.h create mode 100644 boards/triface/hw/hw_lcd_hd44.h diff --git a/bertos/cfg/cfg_gfx.h b/bertos/cfg/cfg_gfx.h index 8d8b6fa2..63454016 100644 --- a/bertos/cfg/cfg_gfx.h +++ b/bertos/cfg/cfg_gfx.h @@ -32,43 +32,37 @@ * * \brief Configuration file for GFX module. * - * \version $Id$ - * * \author Daniele Basile */ #ifndef CFG_GFX_H #define CFG_GFX_H -/// Enable line clipping algorithm. + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ #define CONFIG_GFX_CLIPPING 1 -/// Enable text rendering in bitmaps. +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ #define CONFIG_GFX_TEXT 1 -/// Enable virtual coordinate system. +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ #define CONFIG_GFX_VCOORDS 1 -/// Select bitmap pixel format. +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ #define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB - -#define CONFIG_CHART_TYPE_X uint8_t ///< Type for the chart dataset -#define CONFIG_CHART_TYPE_Y uint8_t ///< Type for the chart dataset - - -/// Enable button bar behind menus -#define CONFIG_MENU_MENUBAR 0 - -/// Level Edit Timeout -#define CONFIG_LEVELEDIT_TIMEOUT 0 - -/// Menu timeout -#define CONFIG_MENU_TIMEOUT 0 - -/// Enable smooth scrolling in menus -#define CONFIG_MENU_SMOOTH 1 - - #endif /* CFG_GFX_H */ diff --git a/bertos/drv/lcd_gfx_hwtest.c b/bertos/drv/lcd_gfx_hwtest.c index 7c1d5282..c07be270 100644 --- a/bertos/drv/lcd_gfx_hwtest.c +++ b/bertos/drv/lcd_gfx_hwtest.c @@ -32,8 +32,6 @@ * * \brief dot-matrix LCD test. * - * \version $Id$ - * * \author Bernie Innocenti * */ diff --git a/bertos/gfx/gfx.h b/bertos/gfx/gfx.h index eeef5bc7..ebcf9c8d 100644 --- a/bertos/gfx/gfx.h +++ b/bertos/gfx/gfx.h @@ -1,15 +1,42 @@ /** * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/arduino/examples/aprs/cfg/cfg_lcd.h b/boards/arduino/examples/aprs/cfg/cfg_lcd_hd44.h similarity index 84% rename from boards/arduino/examples/aprs/cfg/cfg_lcd.h rename to boards/arduino/examples/aprs/cfg/cfg_lcd_hd44.h index 903ae9aa..78f1f20b 100644 --- a/boards/arduino/examples/aprs/cfg/cfg_lcd.h +++ b/boards/arduino/examples/aprs/cfg/cfg_lcd_hd44.h @@ -32,8 +32,6 @@ * * \brief Configuration file for lcd display module. * - * \version $Id$ - * * \author Daniele Basile */ @@ -53,20 +51,5 @@ */ #define CONFIG_LCD_ADDRESS_FAST 1 -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - #endif /* CFG_LCD_H */ diff --git a/boards/arduino/hw/hw_lcd.h b/boards/arduino/hw/hw_lcd.h deleted file mode 100644 index 3a206a0f..00000000 --- a/boards/arduino/hw/hw_lcd.h +++ /dev/null @@ -1,156 +0,0 @@ -/** - * \file - * - * - * \brief LCD low-level hardware macros - * - * \version $Id$ - * - * \author Bernie Innocenti - * \author Stefano Fedrigo - * - */ - -#ifndef HW_LCD_H -#define HW_LCD_H - -#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ -#include /* BV() */ -#include - -#include -#include -#include - -#warning TODO:This is an example implementation, you must implement it! - -/** - * \name LCD I/O pins/ports - * @{ - */ -#define LCD_RS /* Implement me! */ -#define LCD_RW /* Implement me! */ -#define LCD_E /* Implement me! */ -#define LCD_DB0 /* Implement me! */ -#define LCD_DB1 /* Implement me! */ -#define LCD_DB2 /* Implement me! */ -#define LCD_DB3 /* Implement me! */ -#define LCD_DB4 /* Implement me! */ -#define LCD_DB5 /* Implement me! */ -#define LCD_DB6 /* Implement me! */ -#define LCD_DB7 /* Implement me! */ -/*@}*/ - -/** - * \name DB high nibble (DB[4-7]) - * @{ - */ - -#if CONFIG_LCD_4BIT - #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) - #define LCD_SHIFT 4 -#else - #define LCD_MASK (uint8_t)0xff - #define LCD_SHIFT 0 -#endif -/*@}*/ - -/** - * \name LCD bus control macros - * @{ - */ -#define LCD_CLR_RS /* Implement me! */ -#define LCD_SET_RS /* Implement me! */ -#define LCD_CLR_RD /* Implement me! */ -#define LCD_SET_RD /* Implement me! */ -#define LCD_CLR_E /* Implement me! */ -#define LCD_SET_E /* Implement me! */ - -#if CONFIG_LCD_4BIT - #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ - #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ - #define LCD_READ_H ( 0 /* Implement me! */ ) - #define LCD_READ_L ( 0 /* Implement me! */ ) -#else - #define LCD_WRITE(x) ((void)x)/* Implement me! */ - #define LCD_READ (0 /* Implement me! */ ) -#endif -/*@}*/ - -/** Set data bus direction to output (write to display) */ -#define LCD_DB_OUT /* Implement me! */ - -/** Set data bus direction to input (read from display) */ -#define LCD_DB_IN /* Implement me! */ - -/** Delay for write (Enable pulse width, 220ns) */ -#define LCD_DELAY_WRITE \ - do { \ - NOP; \ - NOP; \ - NOP; \ - NOP; \ - NOP; \ - } while (0) - -/** Delay for read (Data ouput delay time, 120ns) */ -#define LCD_DELAY_READ \ - do { \ - NOP; \ - NOP; \ - NOP; \ - NOP; \ - } while (0) - - -INLINE void lcd_bus_init(void) -{ - cpu_flags_t flags; - IRQ_SAVE_DISABLE(flags); - - /* - * Here set bus pin! - * to init a lcd device. - * - */ - - /* - * Data bus is in output state most of the time: - * LCD r/w functions assume it is left in output state - */ - LCD_DB_OUT; - - - IRQ_RESTORE(flags); -} - -#endif /* HW_LCD_H */ diff --git a/boards/arduino/hw/hw_lcd_32122a.h b/boards/arduino/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/boards/arduino/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/boards/at91sam7x-ek/hw/hw_lcd.h b/boards/arduino/hw/hw_lcd_hd44.h similarity index 94% rename from boards/at91sam7x-ek/hw/hw_lcd.h rename to boards/arduino/hw/hw_lcd_hd44.h index 21b64d4e..dfebbcab 100644 --- a/boards/at91sam7x-ek/hw/hw_lcd.h +++ b/boards/arduino/hw/hw_lcd_hd44.h @@ -33,23 +33,18 @@ * * \brief LCD low-level hardware macros * - * \version $Id$ - * * \author Bernie Innocenti * \author Stefano Fedrigo * */ -#ifndef HW_LCD_H -#define HW_LCD_H +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H -#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ -#include /* BV() */ -#include +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ -#include -#include #include +#include #warning TODO:This is an example implementation, you must implement it! @@ -117,7 +112,6 @@ /** Set data bus direction to input (read from display) */ #define LCD_DB_IN /* Implement me! */ - /** Delay for write (Enable pulse width, 220ns) */ #define LCD_DELAY_WRITE \ do { \ @@ -138,7 +132,8 @@ } while (0) -INLINE void lcd_bus_init(void) + +INLINE void lcd_hd44_hw_bus_init(void) { cpu_flags_t flags; IRQ_SAVE_DISABLE(flags); @@ -159,4 +154,4 @@ INLINE void lcd_bus_init(void) IRQ_RESTORE(flags); } -#endif /* HW_LCD_H */ +#endif /* HW_LCD_HD44_H */ diff --git a/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd.h b/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h similarity index 84% rename from boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd.h rename to boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h index 903ae9aa..78f1f20b 100644 --- a/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd.h +++ b/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -32,8 +32,6 @@ * * \brief Configuration file for lcd display module. * - * \version $Id$ - * * \author Daniele Basile */ @@ -53,20 +51,5 @@ */ #define CONFIG_LCD_ADDRESS_FAST 1 -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - #endif /* CFG_LCD_H */ diff --git a/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd.h b/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h similarity index 84% rename from boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd.h rename to boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h index 903ae9aa..78f1f20b 100644 --- a/boards/at91sam7x-ek/benchmark/context_switch/cfg/cfg_lcd.h +++ b/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -32,8 +32,6 @@ * * \brief Configuration file for lcd display module. * - * \version $Id$ - * * \author Daniele Basile */ @@ -53,20 +51,5 @@ */ #define CONFIG_LCD_ADDRESS_FAST 1 -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - #endif /* CFG_LCD_H */ diff --git a/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h b/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd.h b/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_hd44.h similarity index 84% rename from boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd.h rename to boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_hd44.h index 903ae9aa..78f1f20b 100644 --- a/boards/at91sam7x-ek/benchmark/kernel_footprint/cfg/cfg_lcd.h +++ b/boards/at91sam7x-ek/examples/sd_fat/cfg/cfg_lcd_hd44.h @@ -32,8 +32,6 @@ * * \brief Configuration file for lcd display module. * - * \version $Id$ - * * \author Daniele Basile */ @@ -53,20 +51,5 @@ */ #define CONFIG_LCD_ADDRESS_FAST 1 -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - #endif /* CFG_LCD_H */ diff --git a/boards/at91sam7x-ek/hw/hw_lcd_32122a.h b/boards/at91sam7x-ek/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/boards/at91sam7x-ek/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/boards/triface/hw/hw_lcd.h b/boards/at91sam7x-ek/hw/hw_lcd_hd44.h similarity index 94% rename from boards/triface/hw/hw_lcd.h rename to boards/at91sam7x-ek/hw/hw_lcd_hd44.h index 21b64d4e..dfebbcab 100644 --- a/boards/triface/hw/hw_lcd.h +++ b/boards/at91sam7x-ek/hw/hw_lcd_hd44.h @@ -33,23 +33,18 @@ * * \brief LCD low-level hardware macros * - * \version $Id$ - * * \author Bernie Innocenti * \author Stefano Fedrigo * */ -#ifndef HW_LCD_H -#define HW_LCD_H +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H -#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ -#include /* BV() */ -#include +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ -#include -#include #include +#include #warning TODO:This is an example implementation, you must implement it! @@ -117,7 +112,6 @@ /** Set data bus direction to input (read from display) */ #define LCD_DB_IN /* Implement me! */ - /** Delay for write (Enable pulse width, 220ns) */ #define LCD_DELAY_WRITE \ do { \ @@ -138,7 +132,8 @@ } while (0) -INLINE void lcd_bus_init(void) + +INLINE void lcd_hd44_hw_bus_init(void) { cpu_flags_t flags; IRQ_SAVE_DISABLE(flags); @@ -159,4 +154,4 @@ INLINE void lcd_bus_init(void) IRQ_RESTORE(flags); } -#endif /* HW_LCD_H */ +#endif /* HW_LCD_HD44_H */ diff --git a/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd.h b/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/ek-lm3s1968/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd.h b/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/ek-lm3s1968/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd.h b/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h b/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h b/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/ek-lm3s1968/examples/gps/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/ek-lm3s1968/hw/hw_lcd_32122a.h b/boards/ek-lm3s1968/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/boards/ek-lm3s1968/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/boards/ek-lm3s1968/hw/hw_lcd.h b/boards/ek-lm3s1968/hw/hw_lcd_hd44.h similarity index 94% rename from boards/ek-lm3s1968/hw/hw_lcd.h rename to boards/ek-lm3s1968/hw/hw_lcd_hd44.h index 21b64d4e..dfebbcab 100644 --- a/boards/ek-lm3s1968/hw/hw_lcd.h +++ b/boards/ek-lm3s1968/hw/hw_lcd_hd44.h @@ -33,23 +33,18 @@ * * \brief LCD low-level hardware macros * - * \version $Id$ - * * \author Bernie Innocenti * \author Stefano Fedrigo * */ -#ifndef HW_LCD_H -#define HW_LCD_H +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H -#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ -#include /* BV() */ -#include +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ -#include -#include #include +#include #warning TODO:This is an example implementation, you must implement it! @@ -117,7 +112,6 @@ /** Set data bus direction to input (read from display) */ #define LCD_DB_IN /* Implement me! */ - /** Delay for write (Enable pulse width, 220ns) */ #define LCD_DELAY_WRITE \ do { \ @@ -138,7 +132,8 @@ } while (0) -INLINE void lcd_bus_init(void) + +INLINE void lcd_hd44_hw_bus_init(void) { cpu_flags_t flags; IRQ_SAVE_DISABLE(flags); @@ -159,4 +154,4 @@ INLINE void lcd_bus_init(void) IRQ_RESTORE(flags); } -#endif /* HW_LCD_H */ +#endif /* HW_LCD_HD44_H */ diff --git a/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd.h b/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/ek-lpc-p2378/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd.h b/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/ek-lpc-p2378/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/ek-lpc-p2378/hw/hw_lcd_32122a.h b/boards/ek-lpc-p2378/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/boards/ek-lpc-p2378/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/boards/ek-lpc-p2378/hw/hw_lcd.h b/boards/ek-lpc-p2378/hw/hw_lcd_hd44.h similarity index 92% rename from boards/ek-lpc-p2378/hw/hw_lcd.h rename to boards/ek-lpc-p2378/hw/hw_lcd_hd44.h index a760b7cf..dfebbcab 100644 --- a/boards/ek-lpc-p2378/hw/hw_lcd.h +++ b/boards/ek-lpc-p2378/hw/hw_lcd_hd44.h @@ -33,23 +33,18 @@ * * \brief LCD low-level hardware macros * - * \version $Id: hw_lcd.h 2506 2009-04-15 08:29:07Z duplo $ - * * \author Bernie Innocenti * \author Stefano Fedrigo * */ -#ifndef HW_LCD_H -#define HW_LCD_H +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H -#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ -#include /* BV() */ -#include +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ -#include -#include #include +#include #warning TODO:This is an example implementation, you must implement it! @@ -95,6 +90,12 @@ #define LCD_CLR_E /* Implement me! */ #define LCD_SET_E /* Implement me! */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + #if CONFIG_LCD_4BIT #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ @@ -111,7 +112,6 @@ /** Set data bus direction to input (read from display) */ #define LCD_DB_IN /* Implement me! */ - /** Delay for write (Enable pulse width, 220ns) */ #define LCD_DELAY_WRITE \ do { \ @@ -132,7 +132,8 @@ } while (0) -INLINE void lcd_bus_init(void) + +INLINE void lcd_hd44_hw_bus_init(void) { cpu_flags_t flags; IRQ_SAVE_DISABLE(flags); @@ -153,4 +154,4 @@ INLINE void lcd_bus_init(void) IRQ_RESTORE(flags); } -#endif /* HW_LCD_H */ +#endif /* HW_LCD_HD44_H */ diff --git a/boards/triface/benchmark/context_switch/cfg/cfg_lcd.h b/boards/triface/benchmark/context_switch/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/triface/benchmark/context_switch/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h b/boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/triface/benchmark/context_switch/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h b/boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/triface/benchmark/context_switch/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd.h b/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h b/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h b/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/triface/benchmark/kernel_footprint/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/triface/examples/triface/cfg/cfg_lcd.h b/boards/triface/examples/triface/cfg/cfg_lcd.h deleted file mode 100644 index 903ae9aa..00000000 --- a/boards/triface/examples/triface/cfg/cfg_lcd.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for lcd display module. - * - * \version $Id$ - * - * \author Daniele Basile - */ - -#ifndef CFG_LCD_H -#define CFG_LCD_H - -/** - * Use 4 bit addressing mode. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_4BIT 0 - -/** - * Use a table to speed up LCD memory addressing. - * This will use about 100 bytes of RAM. - * $WIZ$ type = "boolean" - */ -#define CONFIG_LCD_ADDRESS_FAST 1 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_SOFTINT_REFRESH 0 - -/** - * LCD setting for 32122A (AVR implementation). - * $WIZ$ type = "boolean" - * $WIZ$ supports = "avr and False" - */ -#define CONFIG_LCD_WAIT 1 - - -#endif /* CFG_LCD_H */ - diff --git a/boards/triface/examples/triface/cfg/cfg_lcd_32122a.h b/boards/triface/examples/triface/cfg/cfg_lcd_32122a.h new file mode 100644 index 00000000..5a9b3ca7 --- /dev/null +++ b/boards/triface/examples/triface/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/boards/triface/examples/triface/cfg/cfg_lcd_hd44.h b/boards/triface/examples/triface/cfg/cfg_lcd_hd44.h new file mode 100644 index 00000000..78f1f20b --- /dev/null +++ b/boards/triface/examples/triface/cfg/cfg_lcd_hd44.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +#endif /* CFG_LCD_H */ + diff --git a/boards/triface/hw/hw_lcd_32122a.h b/boards/triface/hw/hw_lcd_32122a.h new file mode 100644 index 00000000..6ec29c5c --- /dev/null +++ b/boards/triface/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/boards/triface/hw/hw_lcd_hd44.h b/boards/triface/hw/hw_lcd_hd44.h new file mode 100644 index 00000000..dfebbcab --- /dev/null +++ b/boards/triface/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ -- 2.25.1