From 6fffd0614f75137e8fed424c87835d4e7d478ef7 Mon Sep 17 00:00:00 2001 From: asterix Date: Tue, 10 Jan 2012 15:06:56 +0000 Subject: [PATCH] Merge branch 'dev' git-svn-id: https://src.develer.com/svnoss/bertos/trunk@5223 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cfg/cfg_eth.h | 9 ++ bertos/cpu/arm/drv/eth_at91.c | 120 +++++++++++------- bertos/cpu/arm/drv/eth_at91.h | 83 ++++++------ bertos/drv/dm9161a.h | 51 ++++++++ bertos/drv/dp83848i.h | 51 ++++++++ bertos/drv/eth.h | 8 +- bertos/drv/phy.h | 65 ++++++++++ bertos/hw/hw_eth.h | 4 +- .../arduino-mega_context_switch/cfg/cfg_eth.h | 9 ++ .../cfg/cfg_eth.h | 9 ++ .../examples/arduino-mega_aprs/cfg/cfg_eth.h | 9 ++ .../arduino-mega_empty/cfg/cfg_eth.h | 9 ++ .../arduino-mega_kernel/cfg/cfg_eth.h | 9 ++ .../arduino_context_switch/cfg/cfg_eth.h | 9 ++ .../arduino_kernel_footprint/cfg/cfg_eth.h | 9 ++ .../examples/arduino_aprs/cfg/cfg_eth.h | 9 ++ .../templates/arduino_empty/cfg/cfg_eth.h | 9 ++ .../templates/arduino_kernel/cfg/cfg_eth.h | 9 ++ .../at91sam7s-ek_context_switch/cfg/cfg_eth.h | 9 ++ .../cfg/cfg_eth.h | 9 ++ .../at91sam7s-ek_empty/cfg/cfg_eth.h | 9 ++ .../at91sam7s-ek_kernel/cfg/cfg_eth.h | 9 ++ .../at91sam7x-ek_context_switch/cfg/cfg_eth.h | 9 ++ .../cfg/cfg_eth.h | 9 ++ .../at91sam7x-ek_sd_fat/cfg/cfg_eth.h | 9 ++ .../at91sam7x-ek_tcp_server/cfg/cfg_eth.h | 9 ++ boards/at91sam7x-ek/hw/hw_eth.h | 9 +- .../at91sam7x-ek_empty/cfg/cfg_eth.h | 9 ++ .../at91sam7x-ek_kernel/cfg/cfg_eth.h | 9 ++ .../lpc-p2378_kernel_footprint/cfg/cfg_eth.h | 9 ++ .../sam3n-ek_kernel_footprint/cfg/cfg_eth.h | 9 ++ .../examples/sam3n-ek_display/cfg/cfg_eth.h | 9 ++ .../templates/sam3n-ek_empty/cfg/cfg_eth.h | 9 ++ .../templates/sam3n-ek_kernel/cfg/cfg_eth.h | 9 ++ .../examples/sam3x-ek_codec/cfg/cfg_eth.h | 9 ++ .../examples/sam3x-ek_display/cfg/cfg_eth.h | 9 ++ .../sam3x-ek_http_server/cfg/cfg_eth.h | 9 ++ .../sam3x-ek_sd_bootloader/cfg/cfg_eth.h | 9 ++ .../sam3x-ek_tcp_server/cfg/cfg_eth.h | 9 ++ .../templates/sam3x-ek_empty/cfg/cfg_eth.h | 9 ++ .../stm32-p103_context_switch/cfg/cfg_eth.h | 9 ++ .../stm32-p103_kernel_footprint/cfg/cfg_eth.h | 9 ++ .../templates/stm32-p103_empty/cfg/cfg_eth.h | 9 ++ .../templates/stm32-p103_kernel/cfg/cfg_eth.h | 9 ++ .../triface_context_switch/cfg/cfg_eth.h | 9 ++ .../triface_kernel_footprint/cfg/cfg_eth.h | 9 ++ boards/triface/examples/triface/cfg/cfg_eth.h | 9 ++ .../templates/triface_empty/cfg/cfg_eth.h | 9 ++ .../templates/triface_kernel/cfg/cfg_eth.h | 9 ++ 49 files changed, 666 insertions(+), 94 deletions(-) create mode 100644 bertos/drv/dm9161a.h create mode 100644 bertos/drv/dp83848i.h create mode 100644 bertos/drv/phy.h diff --git a/bertos/cfg/cfg_eth.h b/bertos/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/bertos/cfg/cfg_eth.h +++ b/bertos/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/bertos/cpu/arm/drv/eth_at91.c b/bertos/cpu/arm/drv/eth_at91.c index 4f19fca1..cac5da26 100644 --- a/bertos/cpu/arm/drv/eth_at91.c +++ b/bertos/cpu/arm/drv/eth_at91.c @@ -121,7 +121,7 @@ static DECLARE_ISR(emac_irqHandler) * * \return Contents of the specified register. */ -static uint16_t phy_hw_read(reg8_t reg) +static uint16_t phy_hw_read(uint8_t reg) { // PHY read command. EMAC_MAN = EMAC_SOF | EMAC_RW_READ | (NIC_PHY_ADDR << EMAC_PHYA_SHIFT) @@ -141,7 +141,7 @@ static uint16_t phy_hw_read(reg8_t reg) * \param reg PHY register number. * \param val Value to write. */ -static void phy_hw_write(reg8_t reg, uint16_t val) +static void phy_hw_write(uint8_t reg, uint16_t val) { // PHY write command. EMAC_MAN = EMAC_SOF | EMAC_RW_WRITE | (NIC_PHY_ADDR << EMAC_PHYA_SHIFT) @@ -152,79 +152,109 @@ static void phy_hw_write(reg8_t reg, uint16_t val) cpu_relax(); } -static int emac_reset(void) +INLINE void phy_manageEnable(bool en) { - uint16_t phy_cr; - - // Enable devices - PMC_PCER = BV(PIOA_ID); - PMC_PCER = BV(PIOB_ID); - PMC_PCER = BV(EMAC_ID); - - // Disable RMII and TESTMODE by disabling pull-ups. - PIOB_PUDR = BV(PHY_COL_RMII_BIT) | BV(PHY_RXDV_TESTMODE_BIT); - - // Disable PHY power down. - PIOB_PER = BV(PHY_PWRDN_BIT); - PIOB_OER = BV(PHY_PWRDN_BIT); - PIOB_CODR = BV(PHY_PWRDN_BIT); + if (en) + { + /* Enable management port. */ + EMAC_NCR |= BV(EMAC_MPE); + EMAC_NCFGR |= EMAC_CLK_HCLK_32; + } + else + { + /* Disable management port */ + EMAC_NCR &= ~BV(EMAC_MPE); + } +} - // Toggle external hardware reset pin. +INLINE void phy_resetPulse(void) +{ + /* Toggle external hardware reset pin. */ RSTC_MR = RSTC_KEY | (1 << RSTC_ERSTL_SHIFT) | BV(RSTC_URSTEN); RSTC_CR = RSTC_KEY | BV(RSTC_EXTRST); while ((RSTC_SR & BV(RSTC_NRSTL)) == 0) cpu_relax(); +} + +INLINE void phy_pinThreeState(void) +{ + PIOB_PUDR = PHY_MII_PINS; + PIOB_ODR = PHY_MII_PINS; + PIOB_PER = PHY_MII_PINS; +} - // Configure MII port. +INLINE void phy_pinGpio(void) +{ + PIOB_PUDR = PHY_MII_PINS; + PIOB_OWER = PHY_MII_PINS; + PIOB_OER = PHY_MII_PINS; + PIOB_PER = PHY_MII_PINS; +} + +INLINE void phy_pinMac(void) +{ + PIOB_ODR = PHY_MII_PINS; + PIOB_OWDR = PHY_MII_PINS; PIOB_ASR = PHY_MII_PINS; PIOB_BSR = 0; + PIOB_PUDR = PHY_MII_PINS; PIOB_PDR = PHY_MII_PINS; +} - // Enable receive and transmit clocks. - EMAC_USRIO = BV(EMAC_CLKEN); +INLINE void phy_pinSet(uint32_t state) +{ + PIOB_ODSR = state; +} + +#define AUTONEGOTIATION_TIMEOUT 5000 + +static void emac_reset(void) +{ + /* Enable devices */ + PMC_PCER = BV(EMAC_ID); - // Enable management port. - EMAC_NCR |= BV(EMAC_MPE); - EMAC_NCFGR |= EMAC_CLK_HCLK_32; + /* Enable receive and transmit clocks. */ + EMAC_USRIO = BV(EMAC_CLKEN); - // Set local MAC address. + /* Set local MAC address. */ EMAC_SA1L = (mac_addr[3] << 24) | (mac_addr[2] << 16) | (mac_addr[1] << 8) | mac_addr[0]; EMAC_SA1H = (mac_addr[5] << 8) | mac_addr[4]; + phy_manageEnable(true); - // Wait for PHY ready - timer_delay(255); + PHY_HW_INIT(); - // Clear MII isolate. - phy_hw_read(NIC_PHY_BMCR); - phy_cr = phy_hw_read(NIC_PHY_BMCR); + PHY_INIT(); + phy_pinMac(); + + /* Clear MII isolate. */ + uint16_t phy_cr = phy_hw_read(NIC_PHY_BMCR); phy_cr &= ~NIC_PHY_BMCR_ISOLATE; phy_hw_write(NIC_PHY_BMCR, phy_cr); - phy_cr = phy_hw_read(NIC_PHY_BMCR); - - LOG_INFO("%s: PHY ID %#04x %#04x\n", - __func__, - phy_hw_read(NIC_PHY_ID1), phy_hw_read(NIC_PHY_ID2)); + uint32_t phy_id = phy_hw_read(NIC_PHY_ID1) << 16 + | phy_hw_read(NIC_PHY_ID2); + ASSERT((phy_id & 0xFFFFFFF0) == (NIC_PHY_ID & 0xFFFFFFF0)); + LOG_INFO("PHY ID %#08lx\n", phy_id); - // Wait for auto negotiation completed. - phy_hw_read(NIC_PHY_BMSR); - for (;;) + ticks_t start = timer_clock(); + /* Wait for auto negotiation completed. */ + while (1) { if (phy_hw_read(NIC_PHY_BMSR) & NIC_PHY_BMSR_ANCOMPL) break; cpu_relax(); + if (timer_clock() - start > ms_to_ticks(AUTONEGOTIATION_TIMEOUT)) + { + LOG_ERR("Autonegotiation timeout\n"); + break; + } } - - // Disable management port. - EMAC_NCR &= ~BV(EMAC_MPE); - - return 0; } -static int emac_start(void) +static void emac_start(void) { uint32_t addr; int i; @@ -256,8 +286,6 @@ static int emac_start(void) /* Enable receiver, transmitter and statistics. */ EMAC_NCR |= BV(EMAC_TE) | BV(EMAC_RE) | BV(EMAC_WESTAT); - - return 0; } ssize_t eth_putFrame(const uint8_t *buf, size_t len) diff --git a/bertos/cpu/arm/drv/eth_at91.h b/bertos/cpu/arm/drv/eth_at91.h index 41fb4dce..72e86be3 100644 --- a/bertos/cpu/arm/drv/eth_at91.h +++ b/bertos/cpu/arm/drv/eth_at91.h @@ -39,9 +39,8 @@ #ifndef ETH_AT91_H #define ETH_AT91_H -// Settings and definition for DAVICOM 9161A +// Settings and definition for PHY registers // \{ -#define NIC_PHY_ADDR 31 //Registry definition #define NIC_PHY_BMCR 0x00 // Basic mode control register. @@ -66,48 +65,44 @@ #define NIC_PHY_ANLPAR 0x05 // Auto negotiation link partner availability register. #define NIC_PHY_ANER 0x06 // Auto negotiation expansion register. -// Pin definition for DAVICOM 9161A -// See schematic for at91sam7x-ek evalution board -#define PHY_TXCLK_ISOLATE_BIT 0 -#define PHY_REFCLK_XT2_BIT 0 -#define PHY_TXEN_BIT 1 -#define PHY_TXD0_BIT 2 -#define PHY_TXD1_BIT 3 -#define PHY_CRS_AD4_BIT 4 -#define PHY_RXD0_AD0_BIT 5 -#define PHY_RXD1_AD1_BIT 6 -#define PHY_RXER_RXD4_RPTR_BIT 7 -#define PHY_MDC_BIT 8 -#define PHY_MDIO_BIT 9 -#define PHY_TXD2_BIT 10 -#define PHY_TXD3_BIT 11 -#define PHY_TXER_TXD4_BIT 12 -#define PHY_RXD2_AD2_BIT 13 -#define PHY_RXD3_AD3_BIT 14 -#define PHY_RXDV_TESTMODE_BIT 15 -#define PHY_COL_RMII_BIT 16 -#define PHY_RXCLK_10BTSER_BIT 17 -#define PHY_PWRDN_BIT 18 -#define PHY_MDINTR_BIT 26 - -#define PHY_MII_PINS BV(PHY_REFCLK_XT2_BIT) \ - | BV(PHY_TXEN_BIT) \ - | BV(PHY_TXD0_BIT) \ - | BV(PHY_TXD1_BIT) \ - | BV(PHY_CRS_AD4_BIT) \ - | BV(PHY_RXD0_AD0_BIT) \ - | BV(PHY_RXD1_AD1_BIT) \ - | BV(PHY_RXER_RXD4_RPTR_BIT) \ - | BV(PHY_MDC_BIT) \ - | BV(PHY_MDIO_BIT) \ - | BV(PHY_TXD2_BIT) \ - | BV(PHY_TXD3_BIT) \ - | BV(PHY_TXER_TXD4_BIT) \ - | BV(PHY_RXD2_AD2_BIT) \ - | BV(PHY_RXD3_AD3_BIT) \ - | BV(PHY_RXDV_TESTMODE_BIT) \ - | BV(PHY_COL_RMII_BIT) \ - | BV(PHY_RXCLK_10BTSER_BIT) +/* Pin definition MII/RMII PHY interdace */ +#define PHY_TXCLK_BIT BV(0) +#define PHY_TXEN_BIT BV(1) +#define PHY_TXD0_BIT BV(2) +#define PHY_TXD1_BIT BV(3) +#define PHY_CRS_BIT BV(4) +#define PHY_RXD0_BIT BV(5) +#define PHY_RXD1_BIT BV(6) +#define PHY_RXER_BIT BV(7) +#define PHY_MDC_BIT BV(8) +#define PHY_MDIO_BIT BV(9) +#define PHY_TXD2_BIT BV(10) +#define PHY_TXD3_BIT BV(11) +#define PHY_TXER_BIT BV(12) +#define PHY_RXD2_BIT BV(13) +#define PHY_RXD3_BIT BV(14) +#define PHY_RXDV_BIT BV(15) +#define PHY_COL_BIT BV(16) +#define PHY_RXCLK_BIT BV(17) + +#define PHY_MII_PINS \ + ( PHY_TXEN_BIT \ + | PHY_TXD0_BIT \ + | PHY_TXD1_BIT \ + | PHY_CRS_BIT \ + | PHY_RXD0_BIT \ + | PHY_RXD1_BIT \ + | PHY_RXER_BIT \ + | PHY_MDC_BIT \ + | PHY_MDIO_BIT \ + | PHY_TXD2_BIT \ + | PHY_TXD3_BIT \ + | PHY_TXER_BIT \ + | PHY_RXD2_BIT \ + | PHY_RXD3_BIT \ + | PHY_RXDV_BIT \ + | PHY_COL_BIT \ + | PHY_RXCLK_BIT) // \} #define EMAC_TX_BUFSIZ 1518 //!!! Don't change this diff --git a/bertos/drv/dm9161a.h b/bertos/drv/dm9161a.h new file mode 100644 index 00000000..87d20c13 --- /dev/null +++ b/bertos/drv/dm9161a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Definition for Davicom DM9161A ethernet phy. + * + * \author Francesco Sacchi + */ + +#ifndef DM9161A_H +#define DM9161A_H + +#define NIC_PHY_ADDR 31 +#define NIC_PHY_ID 0x0181b8a0 + +#define PHY_INIT() \ + do { \ + phy_pinGpio(); \ + /* Disable RMII and TESTMODE */ \ + phy_pinSet(PHY_MII_PINS & ~(PHY_COL_BIT | PHY_RXDV_BIT)); \ + phy_resetPulse(); \ + } while (0) +#endif /* DM9161A_H */ diff --git a/bertos/drv/dp83848i.h b/bertos/drv/dp83848i.h new file mode 100644 index 00000000..a64908b2 --- /dev/null +++ b/bertos/drv/dp83848i.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Definition for Natial DP83848I ethernet phy. + * + * \author Francesco Sacchi + */ + +#ifndef DP83848I_H +#define DP83848I_H + +#define NIC_PHY_ADDR 1 +#define NIC_PHY_ID 0x20005C90 + +#define PHY_INIT() \ + do { \ + /* Use defaults */ \ + phy_pinThreeState(); \ + phy_resetPulse(); \ + } while (0) + +#endif /* DP83848I_H */ diff --git a/bertos/drv/eth.h b/bertos/drv/eth.h index 786e7979..ed241383 100644 --- a/bertos/drv/eth.h +++ b/bertos/drv/eth.h @@ -44,14 +44,18 @@ #define DRV_ETH_H #include "hw/hw_eth.h" +#include "cfg/cfg_eth.h" + +#include + #include + #define ETH_ADDR_LEN 6 #define ETH_HEAD_LEN 14 #define ETH_DATA_LEN 1500 #define ETH_FRAME_LEN (ETH_HEAD_LEN + ETH_DATA_LEN) - -#define ETH_TYPE_IP 0x0800 +#define ETH_TYPE_IP 0x0800 typedef union Ethernet { diff --git a/bertos/drv/phy.h b/bertos/drv/phy.h new file mode 100644 index 00000000..21c3a524 --- /dev/null +++ b/bertos/drv/phy.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief PHY chip interface. + * + * $WIZ$ + */ + +#ifndef DRV_PHY_H +#define DRV_PHY_H + +#include + +/** + * \name Supported PHY chip. + * + * List of supported PHY chip. + * + * $WIZ$ phy_chip_list = "DAVICOM_DM9161A", "NATIONAL_DP3848I" + * \{ + */ +#define DAVICOM_DM9161A 0 +#define NATIONAL_DP3848I 1 +/** \} */ + +#if CONFIG_PHY_CHIP == DAVICOM_DM9161A + #include +#elif CONFIG_PHY_CHIP == NATIONAL_DP3848I + #include +#else + #error No supported PHY chip was select. +#endif + +#endif /* DRV_PHY_H */ diff --git a/bertos/hw/hw_eth.h b/bertos/hw/hw_eth.h index 71c2ac89..5007ad11 100644 --- a/bertos/hw/hw_eth.h +++ b/bertos/hw/hw_eth.h @@ -41,4 +41,6 @@ extern uint8_t mac_addr[6]; -#endif // HW_ETH_H +#define PHY_HW_INIT() do { /* Implement me! */ } while (0) + +#endif /* HW_ETH_H */ diff --git a/boards/arduino-mega/benchmark/arduino-mega_context_switch/cfg/cfg_eth.h b/boards/arduino-mega/benchmark/arduino-mega_context_switch/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino-mega/benchmark/arduino-mega_context_switch/cfg/cfg_eth.h +++ b/boards/arduino-mega/benchmark/arduino-mega_context_switch/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino-mega/benchmark/arduino-mega_kernel_footprint/cfg/cfg_eth.h b/boards/arduino-mega/benchmark/arduino-mega_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino-mega/benchmark/arduino-mega_kernel_footprint/cfg/cfg_eth.h +++ b/boards/arduino-mega/benchmark/arduino-mega_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino-mega/examples/arduino-mega_aprs/cfg/cfg_eth.h b/boards/arduino-mega/examples/arduino-mega_aprs/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino-mega/examples/arduino-mega_aprs/cfg/cfg_eth.h +++ b/boards/arduino-mega/examples/arduino-mega_aprs/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino-mega/templates/arduino-mega_empty/cfg/cfg_eth.h b/boards/arduino-mega/templates/arduino-mega_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino-mega/templates/arduino-mega_empty/cfg/cfg_eth.h +++ b/boards/arduino-mega/templates/arduino-mega_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino-mega/templates/arduino-mega_kernel/cfg/cfg_eth.h b/boards/arduino-mega/templates/arduino-mega_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino-mega/templates/arduino-mega_kernel/cfg/cfg_eth.h +++ b/boards/arduino-mega/templates/arduino-mega_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino/benchmark/arduino_context_switch/cfg/cfg_eth.h b/boards/arduino/benchmark/arduino_context_switch/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino/benchmark/arduino_context_switch/cfg/cfg_eth.h +++ b/boards/arduino/benchmark/arduino_context_switch/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino/benchmark/arduino_kernel_footprint/cfg/cfg_eth.h b/boards/arduino/benchmark/arduino_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino/benchmark/arduino_kernel_footprint/cfg/cfg_eth.h +++ b/boards/arduino/benchmark/arduino_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino/examples/arduino_aprs/cfg/cfg_eth.h b/boards/arduino/examples/arduino_aprs/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino/examples/arduino_aprs/cfg/cfg_eth.h +++ b/boards/arduino/examples/arduino_aprs/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino/templates/arduino_empty/cfg/cfg_eth.h b/boards/arduino/templates/arduino_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino/templates/arduino_empty/cfg/cfg_eth.h +++ b/boards/arduino/templates/arduino_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/arduino/templates/arduino_kernel/cfg/cfg_eth.h b/boards/arduino/templates/arduino_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/arduino/templates/arduino_kernel/cfg/cfg_eth.h +++ b/boards/arduino/templates/arduino_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7s-ek/benchmark/at91sam7s-ek_context_switch/cfg/cfg_eth.h b/boards/at91sam7s-ek/benchmark/at91sam7s-ek_context_switch/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7s-ek/benchmark/at91sam7s-ek_context_switch/cfg/cfg_eth.h +++ b/boards/at91sam7s-ek/benchmark/at91sam7s-ek_context_switch/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7s-ek/benchmark/at91sam7s-ek_kernel_footprint/cfg/cfg_eth.h b/boards/at91sam7s-ek/benchmark/at91sam7s-ek_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7s-ek/benchmark/at91sam7s-ek_kernel_footprint/cfg/cfg_eth.h +++ b/boards/at91sam7s-ek/benchmark/at91sam7s-ek_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7s-ek/templates/at91sam7s-ek_empty/cfg/cfg_eth.h b/boards/at91sam7s-ek/templates/at91sam7s-ek_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7s-ek/templates/at91sam7s-ek_empty/cfg/cfg_eth.h +++ b/boards/at91sam7s-ek/templates/at91sam7s-ek_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7s-ek/templates/at91sam7s-ek_kernel/cfg/cfg_eth.h b/boards/at91sam7s-ek/templates/at91sam7s-ek_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7s-ek/templates/at91sam7s-ek_kernel/cfg/cfg_eth.h +++ b/boards/at91sam7s-ek/templates/at91sam7s-ek_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7x-ek/benchmark/at91sam7x-ek_context_switch/cfg/cfg_eth.h b/boards/at91sam7x-ek/benchmark/at91sam7x-ek_context_switch/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7x-ek/benchmark/at91sam7x-ek_context_switch/cfg/cfg_eth.h +++ b/boards/at91sam7x-ek/benchmark/at91sam7x-ek_context_switch/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_eth.h b/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_eth.h +++ b/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7x-ek/examples/at91sam7x-ek_sd_fat/cfg/cfg_eth.h b/boards/at91sam7x-ek/examples/at91sam7x-ek_sd_fat/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7x-ek/examples/at91sam7x-ek_sd_fat/cfg/cfg_eth.h +++ b/boards/at91sam7x-ek/examples/at91sam7x-ek_sd_fat/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7x-ek/examples/at91sam7x-ek_tcp_server/cfg/cfg_eth.h b/boards/at91sam7x-ek/examples/at91sam7x-ek_tcp_server/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7x-ek/examples/at91sam7x-ek_tcp_server/cfg/cfg_eth.h +++ b/boards/at91sam7x-ek/examples/at91sam7x-ek_tcp_server/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7x-ek/hw/hw_eth.h b/boards/at91sam7x-ek/hw/hw_eth.h index 71c2ac89..fd4f7922 100644 --- a/boards/at91sam7x-ek/hw/hw_eth.h +++ b/boards/at91sam7x-ek/hw/hw_eth.h @@ -41,4 +41,11 @@ extern uint8_t mac_addr[6]; -#endif // HW_ETH_H +#define PHY_HW_INIT() \ + do { \ + PIOB_OER = BV(18); \ + PIOB_CODR = BV(18); \ + PIOB_PER = BV(18); \ + } while (0) + +#endif /* HW_ETH_H */ diff --git a/boards/at91sam7x-ek/templates/at91sam7x-ek_empty/cfg/cfg_eth.h b/boards/at91sam7x-ek/templates/at91sam7x-ek_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7x-ek/templates/at91sam7x-ek_empty/cfg/cfg_eth.h +++ b/boards/at91sam7x-ek/templates/at91sam7x-ek_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/at91sam7x-ek/templates/at91sam7x-ek_kernel/cfg/cfg_eth.h b/boards/at91sam7x-ek/templates/at91sam7x-ek_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/at91sam7x-ek/templates/at91sam7x-ek_kernel/cfg/cfg_eth.h +++ b/boards/at91sam7x-ek/templates/at91sam7x-ek_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/lpc-p2378/benchmark/lpc-p2378_kernel_footprint/cfg/cfg_eth.h b/boards/lpc-p2378/benchmark/lpc-p2378_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/lpc-p2378/benchmark/lpc-p2378_kernel_footprint/cfg/cfg_eth.h +++ b/boards/lpc-p2378/benchmark/lpc-p2378_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3n-ek/benchmark/sam3n-ek_kernel_footprint/cfg/cfg_eth.h b/boards/sam3n-ek/benchmark/sam3n-ek_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3n-ek/benchmark/sam3n-ek_kernel_footprint/cfg/cfg_eth.h +++ b/boards/sam3n-ek/benchmark/sam3n-ek_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3n-ek/examples/sam3n-ek_display/cfg/cfg_eth.h b/boards/sam3n-ek/examples/sam3n-ek_display/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3n-ek/examples/sam3n-ek_display/cfg/cfg_eth.h +++ b/boards/sam3n-ek/examples/sam3n-ek_display/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3n-ek/templates/sam3n-ek_empty/cfg/cfg_eth.h b/boards/sam3n-ek/templates/sam3n-ek_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3n-ek/templates/sam3n-ek_empty/cfg/cfg_eth.h +++ b/boards/sam3n-ek/templates/sam3n-ek_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3n-ek/templates/sam3n-ek_kernel/cfg/cfg_eth.h b/boards/sam3n-ek/templates/sam3n-ek_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3n-ek/templates/sam3n-ek_kernel/cfg/cfg_eth.h +++ b/boards/sam3n-ek/templates/sam3n-ek_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3x-ek/examples/sam3x-ek_codec/cfg/cfg_eth.h b/boards/sam3x-ek/examples/sam3x-ek_codec/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3x-ek/examples/sam3x-ek_codec/cfg/cfg_eth.h +++ b/boards/sam3x-ek/examples/sam3x-ek_codec/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3x-ek/examples/sam3x-ek_display/cfg/cfg_eth.h b/boards/sam3x-ek/examples/sam3x-ek_display/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3x-ek/examples/sam3x-ek_display/cfg/cfg_eth.h +++ b/boards/sam3x-ek/examples/sam3x-ek_display/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3x-ek/examples/sam3x-ek_http_server/cfg/cfg_eth.h b/boards/sam3x-ek/examples/sam3x-ek_http_server/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3x-ek/examples/sam3x-ek_http_server/cfg/cfg_eth.h +++ b/boards/sam3x-ek/examples/sam3x-ek_http_server/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3x-ek/examples/sam3x-ek_sd_bootloader/cfg/cfg_eth.h b/boards/sam3x-ek/examples/sam3x-ek_sd_bootloader/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3x-ek/examples/sam3x-ek_sd_bootloader/cfg/cfg_eth.h +++ b/boards/sam3x-ek/examples/sam3x-ek_sd_bootloader/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3x-ek/examples/sam3x-ek_tcp_server/cfg/cfg_eth.h b/boards/sam3x-ek/examples/sam3x-ek_tcp_server/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3x-ek/examples/sam3x-ek_tcp_server/cfg/cfg_eth.h +++ b/boards/sam3x-ek/examples/sam3x-ek_tcp_server/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/sam3x-ek/templates/sam3x-ek_empty/cfg/cfg_eth.h b/boards/sam3x-ek/templates/sam3x-ek_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/sam3x-ek/templates/sam3x-ek_empty/cfg/cfg_eth.h +++ b/boards/sam3x-ek/templates/sam3x-ek_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/stm32-p103/benchmark/stm32-p103_context_switch/cfg/cfg_eth.h b/boards/stm32-p103/benchmark/stm32-p103_context_switch/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/stm32-p103/benchmark/stm32-p103_context_switch/cfg/cfg_eth.h +++ b/boards/stm32-p103/benchmark/stm32-p103_context_switch/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/stm32-p103/benchmark/stm32-p103_kernel_footprint/cfg/cfg_eth.h b/boards/stm32-p103/benchmark/stm32-p103_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/stm32-p103/benchmark/stm32-p103_kernel_footprint/cfg/cfg_eth.h +++ b/boards/stm32-p103/benchmark/stm32-p103_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/stm32-p103/templates/stm32-p103_empty/cfg/cfg_eth.h b/boards/stm32-p103/templates/stm32-p103_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/stm32-p103/templates/stm32-p103_empty/cfg/cfg_eth.h +++ b/boards/stm32-p103/templates/stm32-p103_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/stm32-p103/templates/stm32-p103_kernel/cfg/cfg_eth.h b/boards/stm32-p103/templates/stm32-p103_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/stm32-p103/templates/stm32-p103_kernel/cfg/cfg_eth.h +++ b/boards/stm32-p103/templates/stm32-p103_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_eth.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_eth.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eth.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eth.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/triface/examples/triface/cfg/cfg_eth.h b/boards/triface/examples/triface/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/triface/examples/triface/cfg/cfg_eth.h +++ b/boards/triface/examples/triface/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/triface/templates/triface_empty/cfg/cfg_eth.h b/boards/triface/templates/triface_empty/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/triface/templates/triface_empty/cfg/cfg_eth.h +++ b/boards/triface/templates/triface_empty/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ diff --git a/boards/triface/templates/triface_kernel/cfg/cfg_eth.h b/boards/triface/templates/triface_kernel/cfg/cfg_eth.h index a3788081..0934e3d6 100644 --- a/boards/triface/templates/triface_kernel/cfg/cfg_eth.h +++ b/boards/triface/templates/triface_kernel/cfg/cfg_eth.h @@ -54,4 +54,13 @@ */ #define ETH_LOG_FORMAT LOG_FMT_TERSE +/** + * Select the supported phy chip. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "phy_chip_list" + */ +#define CONFIG_PHY_CHIP DAVICOM_DM9161A + + #endif /* CFG_ETH_H */ -- 2.25.1