From 7ca1a1009ba230b93dac43a62a46fdd985450366 Mon Sep 17 00:00:00 2001 From: asterix Date: Thu, 15 Jul 2010 16:48:06 +0000 Subject: [PATCH] Add first implemtation of i2c for lpc23xx. git-svn-id: https://src.develer.com/svnoss/bertos/branches/i2c@4031 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/arm/drv/i2c_lpc2.c | 189 ++++++++++++++++++++++++++++++++++ 1 file changed, 189 insertions(+) create mode 100644 bertos/cpu/arm/drv/i2c_lpc2.c diff --git a/bertos/cpu/arm/drv/i2c_lpc2.c b/bertos/cpu/arm/drv/i2c_lpc2.c new file mode 100644 index 00000000..9d68348a --- /dev/null +++ b/bertos/cpu/arm/drv/i2c_lpc2.c @@ -0,0 +1,189 @@ +/** + * \file + * + * + * \brief Driver for the LPC23xx I2C (implementation) + * + */ + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + +#include +#include // BV() +#include + +#include +#include + +#include +#include +#include /* vic_handler_t */ + +#include + + +/* + * + */ +#if 0 + /* I2C 0 */ + #define I2C I2C0_MASTER_BASE + #define SYSCTL_RCGC1_I2C SYSCTL_RCGC1_I2C0 + #define SYSCTL_RCGC2_GPIO SYSCTL_RCGC2_GPIOB + #define GPIO_I2C_SCL_PIN GPIO_I2C0_SCL_PIN + #define GPIO_I2C_SDA_PIN GPIO_I2C0_SDA_PIN + #define GPIO_PORT_BASE GPIO_PORTB_BASE +#else + /* I2C 1 */ + #define I2C I2C1_MASTER_BASE + #define SYSCTL_RCGC1_I2C SYSCTL_RCGC1_I2C1 + #define SYSCTL_RCGC2_GPIO SYSCTL_RCGC2_GPIOA + #define GPIO_I2C_SCL_PIN GPIO_I2C1_SCL_PIN + #define GPIO_I2C_SDA_PIN GPIO_I2C1_SDA_PIN + #define GPIO_PORT_BASE GPIO_PORTA_BASE +#endif + + +/** + * Send START condition and select slave for write. + * \c id is the device id comprehensive of address left shifted by 1. + * The LSB of \c id is ignored and reset to 0 for write operation. + * + * \return true on success, false otherwise. + */ +bool i2c_builtin_start_w(uint8_t id) +{ + + return true; +} + + +/** + * Send START condition and select slave for read. + * \c id is the device id comprehensive of address left shifted by 1. + * The LSB of \c id is ignored and set to 1 for read operation. + * + * \return true on success, false otherwise. + */ +bool i2c_builtin_start_r(uint8_t id) +{ + + return true; +} + + +void i2c_builtin_stop(void) +{ +} + + +bool i2c_builtin_put(const uint8_t data) +{ + (void)data; + return true; +} + + +int i2c_builtin_get(bool ack) +{ + (void)ack; + return 0; +} + +/* + * With this function is allowed only the atomic write. + */ +bool i2c_send(const void *_buf, size_t count) +{ + const uint8_t *buf = (const uint8_t *)_buf; + + + return true; +} + +/** + * In order to read bytes from the i2c we should make some tricks. + */ +bool i2c_recv(void *_buf, size_t count) +{ + + return true; +} + +MOD_DEFINE(i2c); + +#define I2C_PCONP PCONP_PCI2C0 +#define I2C_CONSET I20CONSET +#define I2C_CONCLR I20CONCLR +#define I2C_SCLH I20SCLH +#define I2C_SCLL I20SCLL + + +/** + * Initialize I2C module. + */ +void i2c_builtin_init(void) +{ + PCONP |= BV(I2C_PCONP); // enable I2C0 clock + + #if (CONFIG_I2C_FREQ > 400000) + #error i2c frequency is to hight. + #endif + + I2C_CONCLR = BV(I2CON_I2ENC); + + // Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL) + // value of I2SCLH and I2SCLL must be different + + PCLKSEL0 |= I2C0_PCLK_DIV8; + I2C_SCLH = (((CPU_FREQ / 8) / CONFIG_I2C_FREQ) / 2) + 1; + I2C_SCLL = (((CPU_FREQ / 8) / CONFIG_I2C_FREQ) / 2); + + ASSERT(I2C_SCLH > 4 || I2C_SCLL > 4); + + //I2CState = I2C_IDLE; + + // Assign pins to SCL and SDA (P0_27, P0_28) + PINSEL0 |= BV(27) | BV(28); + + // Enable I2C + I2C_CONSET = BV(I2CON_I2EN); + I2C_CONCLR |= BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC); + +kprintf("h%ld l%ld\n", I2C_SCLH, I2C_SCLL); + + MOD_INIT(i2c); +} -- 2.25.1