From 8977f775a3e4d275867f846dc94f9fb644b84491 Mon Sep 17 00:00:00 2001 From: lottaviano Date: Wed, 4 May 2011 12:59:49 +0000 Subject: [PATCH] Detect code for STM32F100RB CPU (cortex-m3 family) added. Signed-off-by: Matteo Silvestri Signed-off-by: Andrea Scalise git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4873 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/cortex-m3/io/stm32.h | 6 +-- .../cpu/cortex-m3/scripts/stm32f100rb_rom.ld | 51 +++++++++++++++++++ bertos/cpu/detect.h | 13 ++++- 3 files changed, 65 insertions(+), 5 deletions(-) create mode 100644 bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld diff --git a/bertos/cpu/cortex-m3/io/stm32.h b/bertos/cpu/cortex-m3/io/stm32.h index 49ee9b1a..38cf2d1c 100644 --- a/bertos/cpu/cortex-m3/io/stm32.h +++ b/bertos/cpu/cortex-m3/io/stm32.h @@ -56,7 +56,7 @@ #define GPIO_USART1_RX_PIN BV(10) #define GPIO_USART2_TX_PIN BV(2) #define GPIO_USART2_RX_PIN BV(3) -#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE +#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB #define GPIO_USART1_TX_PIN BV(9) #define GPIO_USART1_RX_PIN BV(10) #define GPIO_USART2_TX_PIN BV(2) @@ -70,7 +70,7 @@ #if CPU_CM3_STM32F101C4 #define GPIO_I2C1_SCL_PIN BV(6) #define GPIO_I2C1_SDA_PIN BV(7) -#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE +#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB #define GPIO_I2C1_SCL_PIN BV(6) #define GPIO_I2C1_SDA_PIN BV(7) #define GPIO_I2C2_SCL_PIN BV(10) @@ -79,7 +79,7 @@ #error No i2c pins are defined for select cpu #endif -#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE +#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB #define FLASH_PAGE_SIZE 1024 #else #error No embedded definition for select cpu diff --git a/bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld new file mode 100644 index 00000000..06a894a6 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \author Andrea Scalise + * \Signed-off-by Matteo Silvestri + * + * \brief Script for STM32VLDiscovery Cortex-M3 board. + * + */ + + +/* + * Define memory configuration for STM32F100RB + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 128k + ram(rwx) : org = 0x20000000, len = 8k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index 739d3f61..045824c1 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -206,6 +206,14 @@ #define CPU_CM3_LM3S8962 0 #endif + #if defined (__ARM_STM32F100RB__) + #define CPU_CM3_STM32 1 + #define CPU_CM3_STM32F100RB 1 + #define CPU_NAME "STM32F100RB" + #else + #define CPU_CM3_STM32F100RB 0 + #endif + #if defined (__ARM_STM32F101C4__) #define CPU_CM3_STM32 1 #define CPU_CM3_STM32F101C4 1 @@ -295,7 +303,7 @@ #define CPU_CM3_STM32 0 #define CPU_CM3_SAM3 0 #elif defined (CPU_CM3_STM32) - #if CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1 + #if CPU_CM3_STM32F100RB + CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1 #error STM32 Cortex-M3 CPU configuration error #endif #define CPU_CM3_LM3S 0 @@ -328,9 +336,10 @@ #define CPU_CM3_LM3S8962 0 #define CPU_CM3_STM32 0 + #define CPU_CM3_STM32F100RB 0 #define CPU_CM3_STM32F103RB 0 #define CPU_CM3_STM32F101C4 0 - #define CPU_CM3_STM32F103RE 0 + #define CPU_CM3_STM32F103RE 0 #define CPU_CM3_SAM3 0 #define CPU_CM3_SAM3N 0 -- 2.25.1