From 8ba40b07b125a53d66052fa6a00d902f47bf0905 Mon Sep 17 00:00:00 2001 From: asterix Date: Tue, 28 Sep 2010 07:56:57 +0000 Subject: [PATCH] Add first adc implementation module for lm3s. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4320 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/cortex-m3/drv/adc_lm3s.c | 168 ++++++++++++++++++++++++++++ bertos/cpu/cortex-m3/drv/adc_lm3s.h | 70 ++++++++++++ 2 files changed, 238 insertions(+) create mode 100644 bertos/cpu/cortex-m3/drv/adc_lm3s.c create mode 100644 bertos/cpu/cortex-m3/drv/adc_lm3s.h diff --git a/bertos/cpu/cortex-m3/drv/adc_lm3s.c b/bertos/cpu/cortex-m3/drv/adc_lm3s.c new file mode 100644 index 00000000..144b95d6 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_lm3s.c @@ -0,0 +1,168 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * This ADC module should be use both whit kernel or none. + * If you are using a kernel, the adc drive does not wait the finish of + * conversion but use a singal every time a required conversion are + * ended. This signal wake up a process that return a result of + * conversion. Otherwise, if you not use a kernl, this module wait + * whit a loop the finishing of conversion. + * + * + * \author Daniele Basile + */ + + +#include "adc_lm3s.h" + +#include + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" + +#include +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include +#include +#include + +#include + + +#if CONFIG_KERN + #include + + #include + #include + + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_USER0 + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + static DECLARE_ISR(adc_conversion_end_irq) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + + /* Clear the status bit */ + } + + static void adc_enable_irq(void) + { + /* Register the IRQ handler */ + //sysirq_setHandler(ADC_IRQHANDLER, adc_conversion_end_irq); + } + +#endif /* CONFIG_KERN */ + +/** + * Select mux channel \a ch. + * Generally the stm32 cpu family allow us to program the order + * of adc channel that we want to read. + * In this driver implementation we put as fist channel to read the + * select ones. + */ +void adc_hw_select_ch(uint8_t ch) +{ + /* We sample only from one channel */ +} + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADC_DRDY bit is done. + */ +uint16_t adc_hw_read(void) +{ + #if CONFIG_KERN + /* Ensure ADC is not already in use by another process */ + ASSERT(adc_process == NULL); + adc_process = proc_current(); + #endif + + /* Start convertion */ + adc->CR2 |= CR2_EXTTRIG_SWSTRT_SET; + + #if CONFIG_KERN + /* Ensure IRQs enabled. */ + IRQ_ASSERT_ENABLED(); + sig_wait(SIG_ADC_COMPLETE); + + /* Prevent race condition in case of preemptive kernel */ + + MEMORY_BARRIER; + adc_process = NULL; + return ret; + #else + /* Wait in polling until conversion is done */ + //while (!(adc->SR & BV(SR_EOC))); + + /* Return the last converted data */ + return 0; + #endif +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + + + + + #if CONFIG_KERN + adc_enable_irq(); + #endif +} diff --git a/bertos/cpu/cortex-m3/drv/adc_lm3s.h b/bertos/cpu/cortex-m3/drv/adc_lm3s.h new file mode 100644 index 00000000..ae677c54 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_lm3s.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_ADC_LM3S_H +#define DRV_ADC_LM3S_H + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#define ADC_MUX_MAXCH 17 //Max number of channel for ADC. +#define ADC_BITS 10 //Bit resolution for ADC converter. + +/** + * Define PIO controller for enable ADC function. + * \{ + */ + +/*\}*/ + +/** + * Init the ADC pins. + * Implement it if necessary. + */ +#define ADC_INIT_PINS() \ + do { \ + } while (0) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_LM3S_H */ -- 2.25.1