From 8c634de12fc219460e899e8977651e3781a7e104 Mon Sep 17 00:00:00 2001 From: lottaviano Date: Fri, 11 Feb 2011 10:28:28 +0000 Subject: [PATCH] Updated default crystal and CPU frequency. The previous crystal value didn't exist. Fixed default CPU frequency and crystal value. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4696 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/arm/hw/crtat91sam7_rom.S | 8 ++++---- bertos/cpu/arm/hw/init_at91.c | 10 +++++----- bertos/cpu/arm/hw/pll_at91.h | 2 +- bertos/cpu/arm/info/at91sam7.common | 2 +- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/bertos/cpu/arm/hw/crtat91sam7_rom.S b/bertos/cpu/arm/hw/crtat91sam7_rom.S index 0282785d..51635fde 100644 --- a/bertos/cpu/arm/hw/crtat91sam7_rom.S +++ b/bertos/cpu/arm/hw/crtat91sam7_rom.S @@ -73,18 +73,18 @@ #include "cfg/cfg_arch.h" -#if CPU_FREQ != 48023000L +#if CPU_FREQ != 48054857L /* Avoid errors on nightly test */ #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) - #warning Clock registers set for 48.023MHz operation, revise following code if you want a different clock. + #warning Clock registers set for 48.055MHz operation, revise following code if you want a different clock. #endif #endif #if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X /* - * With a 18.420MHz cristal, master clock is: - * (((18.420 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023MHz + * With a 18.432MHz cristal, master clock is: + * (((18.432 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055MHz */ #define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */ #define PLL_DIV_VAL 14 diff --git a/bertos/cpu/arm/hw/init_at91.c b/bertos/cpu/arm/hw/init_at91.c index 1bba1c22..fc7ffaf4 100644 --- a/bertos/cpu/arm/hw/init_at91.c +++ b/bertos/cpu/arm/hw/init_at91.c @@ -41,19 +41,19 @@ #define USE_FIXED_PLL 1 -#define XTAL_FREQ 18420000UL +#define XTAL_FREQ 18432000UL #if USE_FIXED_PLL - #if CPU_FREQ != 48023000L + #if CPU_FREQ != 48054857L /* Avoid errors on nightly test */ #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) - #warning Clock registers set for 48.023MHz operation, revise following code if you want a different clock. + #warning Clock registers set for 48.055MHz operation, revise following code if you want a different clock. #endif #endif /* - * With a 18.420MHz cristal, master clock is: - * (((18.420 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023MHz + * With a 18.432MHz cristal, master clock is: + * (((18.432 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055MHz */ #define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */ #define PLL_DIV_VAL 14 diff --git a/bertos/cpu/arm/hw/pll_at91.h b/bertos/cpu/arm/hw/pll_at91.h index 50f4a0c4..9bf05f82 100644 --- a/bertos/cpu/arm/hw/pll_at91.h +++ b/bertos/cpu/arm/hw/pll_at91.h @@ -141,7 +141,7 @@ int main(int argc, char *argv[]) { int32_t m, d, k; - PLL_CALC(18420000, 48023000, &m, &d, &k); + PLL_CALC(18432000, 48054857, &m, &d, &k); if (__builtin_constant_p(m) && __builtin_constant_p(k) && __builtin_constant_p(d)) printf("SUCCESS -- compile time evaluation\n"); diff --git a/bertos/cpu/arm/info/at91sam7.common b/bertos/cpu/arm/info/at91sam7.common index 0026de91..beefc0e6 100644 --- a/bertos/cpu/arm/info/at91sam7.common +++ b/bertos/cpu/arm/info/at91sam7.common @@ -61,7 +61,7 @@ MK_PROGRAMMER_CPU = "at91sam7" MK_CPU = CORE_CPU # CPU default clock frequency -CPU_DEFAULT_FREQ = "48023000UL" +CPU_DEFAULT_FREQ = "48054857UL" # Special CPU related tags. CPU_TAGS = ["at91", CORE_CPU, TOOLCHAIN] -- 2.25.1