From 94bc960505bdef2792b8a2eb5d5500549e520e7d Mon Sep 17 00:00:00 2001
From: batt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Tue, 22 Dec 2009 14:24:56 +0000
Subject: [PATCH] Enable PIO clock by default on AT91SAM7 CPUs.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3124 38d2e660-2303-0410-9eaa-f027e97ec537
---
 bertos/cpu/arm/hw/crtat91sam7_rom.S | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/bertos/cpu/arm/hw/crtat91sam7_rom.S b/bertos/cpu/arm/hw/crtat91sam7_rom.S
index c5317847..0597f4a8 100644
--- a/bertos/cpu/arm/hw/crtat91sam7_rom.S
+++ b/bertos/cpu/arm/hw/crtat91sam7_rom.S
@@ -108,6 +108,7 @@
 	#define WDT_WDDIS            (1 << 15)
 
 	#define PMC_BASE            0xFFFFFC00
+	#define PMC_PCER_OFF        0x00000010
 	#define PMC_SR_OFF          0x00000068
 	#define PMC_MCKR_OFF        0x00000030
 	#define PMC_MOSCS             (1 << 0)
@@ -118,6 +119,14 @@
 	#define PMC_PRES_MASK       0x0000001C
 	#define PMC_PRES_CLK_2      0x00000004
 
+	#if CPU_ARM_SAM7S_LARGE
+		#define PMC_PIO_CLK_EN (1 << 2)
+	#elif CPU_ARM_SAM7X
+		#define PMC_PIO_CLK_EN ((1 << 2) | (1 << 3))
+	#else
+		#error CPU non supported
+	#endif
+
 	#define CKGR_MOR_OFF        0x00000020
 	#define CKGR_PLLR_OFF       0x0000002C
 	#define CKGR_MOSCEN           (1 << 0)
@@ -346,6 +355,15 @@ _41:
          */
         ldr     r13, =__stack_end
 
+
+	/*
+	 * Enable clock for PIO(s)
+	 */
+        ldr     r1, =PMC_BASE
+        mov     r0, #PMC_PIO_CLK_EN
+        str     r0, [r1, #PMC_PCER_OFF]
+
+
         /*
          * Jump to main
          */
-- 
2.25.1