From 9550884ef08501d68bda54d7ed3f41ccc24694eb Mon Sep 17 00:00:00 2001
From: arighi <arighi@38d2e660-2303-0410-9eaa-f027e97ec537>
Date: Tue, 4 May 2010 08:55:07 +0000
Subject: [PATCH] CM3: unify architecture initialization routine for all the
 Cortex-M3 processors.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3604 38d2e660-2303-0410-9eaa-f027e97ec537
---
 bertos/cpu/cortex-m3/hw/{init_lm3s.c => init_cm3.c} | 13 ++++++++++---
 bertos/cpu/cortex-m3/info/cm3.common                |  2 +-
 examples/develgps/develgps.mk                       |  2 +-
 examples/lm3s1968/lm3s1968.mk                       |  2 +-
 examples/lm3s8962/lm3s8962.mk                       |  2 +-
 5 files changed, 14 insertions(+), 7 deletions(-)
 rename bertos/cpu/cortex-m3/hw/{init_lm3s.c => init_cm3.c} (96%)

diff --git a/bertos/cpu/cortex-m3/hw/init_lm3s.c b/bertos/cpu/cortex-m3/hw/init_cm3.c
similarity index 96%
rename from bertos/cpu/cortex-m3/hw/init_lm3s.c
rename to bertos/cpu/cortex-m3/hw/init_cm3.c
index 0c0a05b7..079f08a3 100644
--- a/bertos/cpu/cortex-m3/hw/init_lm3s.c
+++ b/bertos/cpu/cortex-m3/hw/init_cm3.c
@@ -43,9 +43,15 @@
 #include <cpu/irq.h> /* IRQ_DISABLE */
 #include <cpu/types.h>
 #include <drv/irq_cm3.h>
+#include "switch_ctx_cm3.h"
+
+#if CPU_CM3_LM3S
 #include <drv/clock_lm3s.h>
 #include <io/lm3s.h>
-#include "switch_ctx_cm3.h"
+#elif CPU_CM3_STM32
+#include <drv/clock_stm32.h>
+#include <io/stm32.h>
+#endif
 
 extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end;
 
@@ -59,6 +65,7 @@ void __init2(void)
 	 */
 	IRQ_DISABLE;
 
+#if CPU_CM3_LM3S
 	/*
 	 * PLL may not function properly at default LDO setting.
 	 *
@@ -79,9 +86,9 @@ void __init2(void)
 	 */
 	if (REVISION_IS_A1 | REVISION_IS_A2)
 		HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V;
-
+#endif
 	/* Set the appropriate clocking configuration */
-	clock_set_rate();
+	clock_init();
 
 	/* Initialize IRQ vector table in RAM */
 	sysirq_init();
diff --git a/bertos/cpu/cortex-m3/info/cm3.common b/bertos/cpu/cortex-m3/info/cm3.common
index 23dfe2a3..380a02b5 100644
--- a/bertos/cpu/cortex-m3/info/cm3.common
+++ b/bertos/cpu/cortex-m3/info/cm3.common
@@ -78,4 +78,4 @@ MK_CPU_LDFLAGS = "-mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-misma
 
 # CRT files.
 MK_CPU_CPPASRC = HW_DIR + "crt_cm3.S " + HW_DIR + "vectors_cm3.S "
-MK_CPU_CSRC = HW_DIR + "init_lm3s.c " + DRV_DIR + "irq_cm3.c "
+MK_CPU_CSRC = HW_DIR + "init_cm3.c " + DRV_DIR + "irq_cm3.c "
diff --git a/examples/develgps/develgps.mk b/examples/develgps/develgps.mk
index b1415b7c..08a87f66 100644
--- a/examples/develgps/develgps.mk
+++ b/examples/develgps/develgps.mk
@@ -50,7 +50,7 @@ develgps_CSRC = \
 	bertos/cpu/cortex-m3/drv/timer_cm3.c \
 	bertos/cpu/cortex-m3/drv/irq_cm3.c \
 	bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \
-	bertos/cpu/cortex-m3/hw/init_lm3s.c
+	bertos/cpu/cortex-m3/hw/init_cm3.c
 
 develgps_CPPASRC = \
 	bertos/cpu/cortex-m3/hw/vectors_cm3.S \
diff --git a/examples/lm3s1968/lm3s1968.mk b/examples/lm3s1968/lm3s1968.mk
index fc4622f3..d93a6c1b 100644
--- a/examples/lm3s1968/lm3s1968.mk
+++ b/examples/lm3s1968/lm3s1968.mk
@@ -50,7 +50,7 @@ lm3s1968_CSRC = \
 	bertos/cpu/cortex-m3/drv/timer_cm3.c \
 	bertos/cpu/cortex-m3/drv/irq_cm3.c \
 	bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \
-	bertos/cpu/cortex-m3/hw/init_lm3s.c
+	bertos/cpu/cortex-m3/hw/init_cm3.c
 
 lm3s1968_CPPASRC = \
 	bertos/cpu/cortex-m3/hw/vectors_cm3.S \
diff --git a/examples/lm3s8962/lm3s8962.mk b/examples/lm3s8962/lm3s8962.mk
index c4ae958f..9e7ade13 100644
--- a/examples/lm3s8962/lm3s8962.mk
+++ b/examples/lm3s8962/lm3s8962.mk
@@ -45,7 +45,7 @@ lm3s8962_CSRC = \
 	bertos/cpu/cortex-m3/drv/timer_cm3.c \
 	bertos/cpu/cortex-m3/drv/irq_cm3.c \
 	bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c \
-	bertos/cpu/cortex-m3/hw/init_lm3s.c
+	bertos/cpu/cortex-m3/hw/init_cm3.c
 
 lm3s8962_CPPASRC = \
 	bertos/cpu/cortex-m3/hw/vectors_cm3.S \
-- 
2.25.1