From 968518a4f64ffaac3c9ee92eada8c753a81b7988 Mon Sep 17 00:00:00 2001 From: aleph Date: Sun, 13 Feb 2011 12:12:05 +0000 Subject: [PATCH] Add SAM3X8 support: linker script, cpu detection, wizard CPU definition git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4701 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cpu/cortex-m3/info/SAM3X8.cdef | 65 ++++++++++++++++++++++ bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld | 49 ++++++++++++++++ bertos/cpu/detect.h | 22 +++++++- 3 files changed, 134 insertions(+), 2 deletions(-) create mode 100644 bertos/cpu/cortex-m3/info/SAM3X8.cdef create mode 100644 bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld diff --git a/bertos/cpu/cortex-m3/info/SAM3X8.cdef b/bertos/cpu/cortex-m3/info/SAM3X8.cdef new file mode 100644 index 00000000..dfd9a872 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/SAM3X8.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info definitions for Cortex-M3-based Atmel SAM3X8 cpu. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Stefano Fedrigo +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "sam3" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-sam3.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "84000000UL" + +# Special CPU related tags. +CPU_TAGS += ["sam3"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "clock_sam3.c " + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_SAM3X8__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "sam3x8_rom.ld" diff --git a/bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld b/bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld new file mode 100644 index 00000000..17676137 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Linker script for Atmel SAM3N4 Cortex M3 processor. + * + */ + +/* + * Memory configuration for SAM3X8. + */ +MEMORY +{ + rom(rx) : org = 0x0, len = 512k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index e14ca222..41b190f5 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -231,6 +231,7 @@ #define CPU_CM3_SAM3U 0 #define CPU_CM3_SAM3N2 0 #define CPU_CM3_SAM3N1 0 + #define CPU_CM3_SAM3X 0 #else #define CPU_CM3_SAM3N4 0 #endif @@ -243,6 +244,7 @@ #define CPU_CM3_SAM3N 0 #define CPU_CM3_SAM3U 0 + #define CPU_CM3_SAM3X 0 #else #define CPU_CM3_SAM3S4 0 #endif @@ -255,10 +257,24 @@ #define CPU_CM3_SAM3N 0 #define CPU_CM3_SAM3S 0 + #define CPU_CM3_SAM3X 0 #else #define CPU_CM3_SAM3U4 0 #endif + #if defined (__ARM_SAM3X8__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3X 1 + #define CPU_CM3_SAM3X8 1 + #define CPU_NAME "SAM3X8" + + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3S 0 + #define CPU_CM3_SAM3U 0 + #else + #define CPU_CM3_SAM3X8 0 + #endif + #if defined (CPU_CM3_LM3S) #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1 #error Luminary Cortex-M3 CPU configuration error @@ -272,10 +288,10 @@ #define CPU_CM3_LM3S 0 #define CPU_CM3_SAM3 0 #elif defined (CPU_CM3_SAM3) - #if CPU_CM3_SAM3N + 0 != 1 + #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1 #error SAM3 Cortex-M3 CPU configuration error #endif - #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + 0 != 1 + #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1 #error SAM3 Cortex-M3 CPU configuration error #endif #define CPU_CM3_LM3S 0 @@ -305,6 +321,8 @@ #define CPU_CM3_SAM3 0 #define CPU_CM3_SAM3N 0 #define CPU_CM3_SAM3N4 0 + #define CPU_CM3_SAM3X 0 + #define CPU_CM3_SAM3X8 0 #endif #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ -- 2.25.1