From b6f9eb45c14010b05db137970a893e9588e8e762 Mon Sep 17 00:00:00 2001 From: asterix Date: Mon, 1 Dec 2008 13:16:01 +0000 Subject: [PATCH] Use cfg_ser.h to sets serial port. Use appropriate name to boot serial port. Reformat. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1946 38d2e660-2303-0410-9eaa-f027e97ec537 --- examples/triface/boot/cfg/cfg_boot.h | 47 ---------------------------- examples/triface/boot/cfg/cfg_ser.h | 38 +++++++++++----------- examples/triface/boot/main.c | 13 ++++---- 3 files changed, 25 insertions(+), 73 deletions(-) delete mode 100644 examples/triface/boot/cfg/cfg_boot.h diff --git a/examples/triface/boot/cfg/cfg_boot.h b/examples/triface/boot/cfg/cfg_boot.h deleted file mode 100644 index 72deb0c7..00000000 --- a/examples/triface/boot/cfg/cfg_boot.h +++ /dev/null @@ -1,47 +0,0 @@ -/** - * \file - * - * - * \brief Configuration file for boot module. - * - * \version $Id$ - * - * \author Manuele Fanelli - */ - -#ifndef CFG_BOOT_H -#define CFG_BOOT_H - -#define CONFIG_SER_HOSTPORT 1 ///< Triface comunication host port - -#define CONFIG_SER_HOSTPORTBAUDRATE 115200 ///< Serial host port baudrate - -#endif /* CFG_BOOT_H */ diff --git a/examples/triface/boot/cfg/cfg_ser.h b/examples/triface/boot/cfg/cfg_ser.h index eb11a4cb..e651d307 100644 --- a/examples/triface/boot/cfg/cfg_ser.h +++ b/examples/triface/boot/cfg/cfg_ser.h @@ -35,59 +35,59 @@ * \version $Id$ * * \author Daniele Basile - */ + */ #ifndef CFG_SER_H #define CFG_SER_H /// Kdebug console on debug unit -#define CONFIG_TRIFACE_PORT 0 +#define CONFIG_BOOT_PORT 1 /// Baud-rate for the kdebug console -#define CONFIG_TRIFACE_BAUDRATE 115200 +#define CONFIG_BOOT_BAUDRATE 115200 -/// [bytes] Size of the outbound FIFO buffer for port 0. +/// [bytes] Size of the outbound FIFO buffer for port 0. #define CONFIG_UART0_TXBUFSIZE 32 -/// [bytes] Size of the inbound FIFO buffer for port 0. +/// [bytes] Size of the inbound FIFO buffer for port 0. #define CONFIG_UART0_RXBUFSIZE 64 -/// [bytes] Size of the outbound FIFO buffer for port 1. +/// [bytes] Size of the outbound FIFO buffer for port 1. #define CONFIG_UART1_TXBUFSIZE 32 -/// [bytes] Size of the inbound FIFO buffer for port 1. +/// [bytes] Size of the inbound FIFO buffer for port 1. #define CONFIG_UART1_RXBUFSIZE 64 -/// [bytes] Size of the outbound FIFO buffer for SPI port (AVR only) +/// [bytes] Size of the outbound FIFO buffer for SPI port (AVR only) #define CONFIG_SPI_TXBUFSIZE 32 -/// [bytes] Size of the inbound FIFO buffer for SPI port (AVR only) +/// [bytes] Size of the inbound FIFO buffer for SPI port (AVR only) #define CONFIG_SPI_RXBUFSIZE 32 -/// [bytes] Size of the outbound FIFO buffer for SPI port 0. +/// [bytes] Size of the outbound FIFO buffer for SPI port 0. #define CONFIG_SPI0_TXBUFSIZE 32 -/// [bytes] Size of the inbound FIFO buffer for SPI port 0. +/// [bytes] Size of the inbound FIFO buffer for SPI port 0. #define CONFIG_SPI0_RXBUFSIZE 32 -/// [bytes] Size of the outbound FIFO buffer for SPI port 1. +/// [bytes] Size of the outbound FIFO buffer for SPI port 1. #define CONFIG_SPI1_TXBUFSIZE 32 -/// [bytes] Size of the inbound FIFO buffer for SPI port 1. +/// [bytes] Size of the inbound FIFO buffer for SPI port 1. #define CONFIG_SPI1_RXBUFSIZE 32 -/// SPI data order (AVR only). +/// SPI data order (AVR only). #define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST -/// SPI clock division factor (AVR only). +/// SPI clock division factor (AVR only). #define CONFIG_SPI_CLOCK_DIV 16 -/// SPI clock polarity: 0 = normal low, 1 = normal high (AVR only). +/// SPI clock polarity: 0 = normal low, 1 = normal high (AVR only). #define CONFIG_SPI_CLOCK_POL 0 -/// SPI clock phase: 0 = sample on first edge, 1 = sample on second clock edge (AVR only). +/// SPI clock phase: 0 = sample on first edge, 1 = sample on second clock edge (AVR only). #define CONFIG_SPI_CLOCK_PHASE 0 /// Default transmit timeout (ms). Set to -1 to disable timeout support. @@ -96,13 +96,13 @@ /// Default receive timeout (ms). Set to -1 to disable timeout support. #define CONFIG_SER_RXTIMEOUT 100 -/// Use RTS/CTS handshake +/// Use RTS/CTS handshake #define CONFIG_SER_HWHANDSHAKE 0 /// Default baud rate (set to 0 to disable). #define CONFIG_SER_DEFBAUDRATE 0 -/// Enable second serial port in emulator. +/// Enable second serial port in emulator. #define CONFIG_EMUL_UART1 0 /** diff --git a/examples/triface/boot/main.c b/examples/triface/boot/main.c index dc105baf..f4f05c43 100644 --- a/examples/triface/boot/main.c +++ b/examples/triface/boot/main.c @@ -46,19 +46,19 @@ * \author Daniele Basile */ +#include "hw/hw_boot.h" +#include "cfg/cfg_ser.h" + #include + #include #include #include /* BV() */ -#include #include #include #include -#include "hw/hw_boot.h" -#include "cfg/cfg_boot.h" - #include int main(void) @@ -77,11 +77,10 @@ int main(void) kdbg_init(); timer_init(); - /* Open the main communication port */ - ser_init(&ser, CONFIG_SER_HOSTPORT); - ser_setbaudrate(&ser, CONFIG_SER_HOSTPORTBAUDRATE); + ser_init(&ser, CONFIG_BOOT_PORT); + ser_setbaudrate(&ser, CONFIG_BOOT_BAUDRATE); xmodem_recv(&ser, &flash.fd); kfile_close(&flash.fd); -- 2.25.1