From e20ef58e930f87b527795830660b7084ac5e22a1 Mon Sep 17 00:00:00 2001 From: arighi Date: Sat, 9 Oct 2010 14:36:29 +0000 Subject: [PATCH] msp430: kdebug driver enhancement This patch allows for more control over the UART's module clock source and frequency within the debug driver. Signed-off-by: Mohamed Tarek git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4416 38d2e660-2303-0410-9eaa-f027e97ec537 --- bertos/cfg/cfg_debug.h | 16 +++++++++ bertos/cpu/msp430/drv/kdebug_msp430.c | 40 +++++++++++++++-------- bertos/cpu/msp430/drv/kdebug_msp430.h | 47 +++++++++++++++++++++++++++ 3 files changed, 90 insertions(+), 13 deletions(-) create mode 100644 bertos/cpu/msp430/drv/kdebug_msp430.h diff --git a/bertos/cfg/cfg_debug.h b/bertos/cfg/cfg_debug.h index 7ea52a0b..10639848 100644 --- a/bertos/cfg/cfg_debug.h +++ b/bertos/cfg/cfg_debug.h @@ -51,4 +51,20 @@ */ #define CONFIG_KDEBUG_BAUDRATE 115200UL +/** + * Clock source for the UART module. You need to write the code to reprogram the respective clock at the required frequency in your project before calling kdbg_init(). + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "kdbg_clk_src" + * $WIZ$ supports = "msp430" + */ +#define CONFIG_KDEBUG_CLOCK_SOURCE KDBG_UART_SMCLK + +/** + * Clock frequency. (Only if different from MCLK's frequency, otherwise leave it zero) + * $WIZ$ type = "int"; min = 0 + * $WIZ$ supports = "msp430" + */ +#define CONFIG_KDEBUG_CLOCK_FREQ 0UL + #endif /* CFG_DEBUG_H */ diff --git a/bertos/cpu/msp430/drv/kdebug_msp430.c b/bertos/cpu/msp430/drv/kdebug_msp430.c index b263efca..7e5a11bd 100644 --- a/bertos/cpu/msp430/drv/kdebug_msp430.c +++ b/bertos/cpu/msp430/drv/kdebug_msp430.c @@ -36,11 +36,13 @@ * \author Mohamed Tarek */ -#include /* for CPU_FREQ */ -#include "hw/hw_ser.h" /* bus macros overrides */ +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* bus macros overrides */ #include "cfg/cfg_debug.h" -#include /* for DIV_ROUND */ +#include /* for DIV_ROUND */ + +#include "kdebug_msp430.h" /* for UART clock source definitions */ #include #include @@ -102,20 +104,32 @@ IE = (old); \ } while(0) +#if CONFIG_KDEBUG_CLOCK_FREQ + #define KDBG_MSP430_FREQ CONFIG_KDEBUG_CLOCK_FREQ +#else + #define KDBG_MSP430_FREQ CPU_FREQ +#endif + typedef uint8_t kdbg_irqsave_t; INLINE void kdbg_hw_init(void) { - /* Assume SMCLK = MCLK = DCO = CPU_FREQ */ - /* Compute the baud rate */ - uint16_t quot = DIV_ROUND(CPU_FREQ, CONFIG_KDEBUG_BAUDRATE); - KDBG_MSP430_UART_PINS_INIT(); // Configure USCI TX/RX pins - UCCTL1 |= UCSSEL_2; // use SMCLK - UCBR0 = quot & 0xFF; + /* Compute the clock prescaler for the desired baudrate */ + uint16_t quot = DIV_ROUND(KDBG_MSP430_FREQ, CONFIG_KDEBUG_BAUDRATE); + KDBG_MSP430_UART_PINS_INIT(); // Configure USCI TX/RX pins + +#if (CONFIG_KDEBUG_CLOCK_SOURCE == KDBG_UART_SMCLK) + UCCTL1 |= UCSSEL_SMCLK; +#else + UCCTL1 |= UCSSEL_ACLK; +#endif + + UCBR0 = quot & 0xFF; // Setup clock prescaler for the UART UCBR1 = quot >> 8; - UCMCTL = UCBRS0; // No Modulation - UCCTL0 = 0; // Default UART settings (8N1) - UCCTL1 &= ~UCSWRST; // Initialize USCI state machine - KDBG_MASK_IRQ(IE2); // Disable USCI interrupts + + UCMCTL = UCBRS0; // No Modulation + UCCTL0 = 0; // Default UART settings (8N1) + UCCTL1 &= ~UCSWRST; // Initialize USCI state machine + KDBG_MASK_IRQ(IE2); // Disable USCI interrupts } diff --git a/bertos/cpu/msp430/drv/kdebug_msp430.h b/bertos/cpu/msp430/drv/kdebug_msp430.h new file mode 100644 index 00000000..496f3ce4 --- /dev/null +++ b/bertos/cpu/msp430/drv/kdebug_msp430.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief MSP430 debug support (implementation). + * + * \author Mohamed Tarek + */ + +#include "cfg/cfg_debug.h" + +/** + * UART Clock source. + * + * $WIZ$ kdbg_clk_src = "KDBG_UART_ACLK", "KDBG_UART_SMCLK" + */ +#define KDBG_UART_ACLK 0 +#define KDBG_UART_SMCLK 1 -- 2.25.1