X-Git-Url: https://codewiz.org/gitweb?p=bertos.git;a=blobdiff_plain;f=boards%2Fat91sam7x-ek%2Fbenchmark%2Fat91sam7x-ek_kernel_footprint%2Fcfg%2Fcfg_adc.h;h=62ee6ed73f34bc223e71e3c0d47003c48fc3b704;hp=90aeb7bdfd13119341ca045ebf4d4ccb117eaa7c;hb=242d8ea69e730f74b25ae3e1e8897ea61b81c250;hpb=48f658cb2360654d8ae4e17adf660dbea5a9e72e

diff --git a/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_adc.h b/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_adc.h
index 90aeb7bd..62ee6ed7 100644
--- a/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_adc.h
+++ b/boards/at91sam7x-ek/benchmark/at91sam7x-ek_kernel_footprint/cfg/cfg_adc.h
@@ -56,9 +56,12 @@
 
 /**
  * Clock Frequency for ADC conversion.
+ * This frequency will be rounded down to an integer
+ * submultiple of CPU_FREQ.
  *
  * $WIZ$ type = "int"
  * $WIZ$ supports = "at91"
+ * $WIZ$ max = 5000000
  */
 #define CONFIG_ADC_CLOCK        4800000UL
 
@@ -66,16 +69,16 @@
  * Minimum time for starting up a conversion [us].
  *
  * $WIZ$ type = "int"
- * $WIZ$ min = 0
+ * $WIZ$ min = 20
  * $WIZ$ supports = "at91"
  */
 #define CONFIG_ADC_STARTUP_TIME 20
 
 /**
- * Minimum time for sample and hold [us].
+ * Minimum time for sample and hold [ns].
  *
  * $WIZ$ type = "int"
- * $WIZ$ min = 0
+ * $WIZ$ min = 600
  * $WIZ$ supports = "at91"
  */
 #define CONFIG_ADC_SHTIME       834
@@ -106,4 +109,41 @@
  */
 #define CONFIG_ADC_STROBE  0
 
+
+/**
+ * Start up timer[s] = startup value / ADCClock [Hz]
+ *
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "sam3_adc_sut"
+ * $WIZ$ supports = "sam3"
+ */
+#define CONFIG_ADC_SUT         ADC_SUT512
+
+/**
+ * Analog Settling Time[s] = settling value / ADCClock[Hz]
+ *
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "sam3_adc_stt"
+ * $WIZ$ supports = "sam3"
+ */
+#define CONFIG_ADC_STTLING     ADC_AST17
+
+/**
+ * Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz]
+ *
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 0
+ * $WIZ$ supports = "sam3"
+ */
+#define CONFIG_ADC_TRACKTIM    0
+
+/**
+ * Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz]
+ *
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 0
+ * $WIZ$ supports = "sam3"
+ */
+#define CONFIG_ADC_TRANSFER    1
+
 #endif /* CFG_ADC_H */