From: Daniele Basile Date: Fri, 13 Jan 2012 17:41:45 +0000 (+0100) Subject: Update some triface preset. X-Git-Url: https://codewiz.org/gitweb?p=bertos.git;a=commitdiff_plain;h=56f2c002c50338f23f1b969ba51a43b0eb24f3da Update some triface preset. --- diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_adc.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_adc.h index df2587be..62ee6ed7 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_adc.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_adc.h @@ -109,4 +109,41 @@ */ #define CONFIG_ADC_STROBE 0 + +/** + * Start up timer[s] = startup value / ADCClock [Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_sut" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_SUT ADC_SUT512 + +/** + * Analog Settling Time[s] = settling value / ADCClock[Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_stt" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_STTLING ADC_AST17 + +/** + * Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRACKTIM 0 + +/** + * Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRANSFER 1 + #endif /* CFG_ADC_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_dac.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_dac.h new file mode 100644 index 00000000..1ae1e984 --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_dac.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for DAC module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DAC_H +#define CFG_DAC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DAC_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DAC_LOG_FORMAT LOG_FMT_TERSE + +/** + * DAC Refresh Period = 1024*REFRESH/DACC Clock + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 65536 + */ +#define CONFIG_DAC_REFRESH 16 + +/** + * DAC Startup Time Selection. + * see datasheet table. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 63 + */ +#define CONFIG_DAC_STARTUP 0 + +/** + * DAC Trigger Selection. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3x_dac_tc" + * $WIZ$ supports = "sam3x" + */ +#define CONFIG_DAC_TIMER DACC_TRGSEL_TIO_CH0 + +#endif /* CFG_DAC_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_eeprom.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_eeprom.h new file mode 100644 index 00000000..b56c1f9c --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_eeprom.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the Eeprom module. + * + * \author Daniele Basile + */ + +#ifndef CFG_EEPROM_H +#define CFG_EEPROM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define EEPROM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define EEPROM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Check this to disable Eeprom deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_EEPROM_DISABLE_OLD_API 0 + +#endif /* CFG_EEPROM_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_http.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_http.h new file mode 100644 index 00000000..0aba5f02 --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_http.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the HTTP module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HTTP_H +#define CFG_HTTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define HTTP_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define HTTP_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Default start page to load + * + * $WIZ$ type = "str" + */ +#define HTTP_DEFAULT_PAGE "index.htm" + +#endif /* CFG_HTTP_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_i2s.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_i2s.h index 6657157e..934da1b9 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_i2s.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_i2s.h @@ -34,11 +34,28 @@ * * * \author Luca Ottaviano + * \author Daniele Basile */ #ifndef CFG_I2S_H #define CFG_I2S_H +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + /** * Length of each play buffer. * @@ -56,19 +73,65 @@ #define CONFIG_SAMPLE_FREQ 44100UL /** - * Module logging level. + * Sample bits per channel. * - * $WIZ$ type = "enum" - * $WIZ$ value_list = "log_level" + * $WIZ$ type = "int" + * * $WIZ$ min = 8 + * $WIZ$ max = 32 */ -#define I2S_LOG_LEVEL LOG_LVL_INFO +#define CONFIG_WORD_BIT_SIZE 16 /** - * Module logging format. + * Number of channel. * - * $WIZ$ type = "enum" - * $WIZ$ value_list = "log_format" + * $WIZ$ type = "int" */ -#define I2S_LOG_FORMAT LOG_FMT_TERSE +#define CONFIG_CHANNEL_NUM 2 + +/** + * Size of trasmit start delay + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 255 + */ +#define CONFIG_DELAY 0 + +/** + * Generate frame sync every 2 x CONFIG_PERIOD bits (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 512 + */ +#define CONFIG_PERIOD 15 + +/** + * Number of words transmitted in frame + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 16 + */ +#define CONFIG_WORD_PER_FRAME 1 + +/** + * Size of Synchro data register (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 15 + */ +#define CONFIG_FRAME_SYNC_SIZE 15 + + +/** + * Extra Size of Synchro data register (CONFIG_FRAME_SYNC_SIZE + CONFIG_EXTRA_FRAME_SYNC_SIZE * 16 + 1) (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 15 + */ +#define CONFIG_EXTRA_FRAME_SYNC_SIZE 0 #endif /* CFG_I2S_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_ini_reader.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_ini_reader.h index d0be4389..048139a4 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_ini_reader.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_ini_reader.h @@ -45,4 +45,10 @@ */ #define CONFIG_INI_MAX_LINE_LEN 64 +/** + * Make case insensitive comparisons. + * $WIZ$ type = "boolean" + */ +#define CONFIG_INI_CASE_INSENSITIVE 0 + #endif /* CFG_INI_READER_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_led_7seg.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_led_7seg.h new file mode 100644 index 00000000..d854b11d --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_led_7seg.h @@ -0,0 +1,80 @@ +/** + * \file cfg_led_7seg.h + * + * + * \brief Configuration file for led 7 segment display. + * + * \author Fabio Bizzi + * + * \addtogroup SevenSegDisplay 7 Segments LED Displays Driver + * \{ + * + */ + +#ifndef CFG_LED_7SEG_H +#define CFG_LED_7SEG_H + +/** + * Use a Common Cathode display. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LED_7SEG_CCAT 0 + +/** + * Number of digit present in the LED display. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + * $WIZ$ max = 8 + */ +#define CONFIG_LED_7SEG_DIGIT 4 + +/** + * Max lenght of the string to be displayed. + * $WIZ$ type = "int" + * $WIZ$ min = 16 + * $WIZ$ max = 255 + */ +#define CONFIG_LED_7SEG_STRLEN 255 + +/** + * Default scrolling speed (ms * CONFIG_LED_7SEG_RTIME). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_SSPEED 10 + +/** + * Default refresh time (ms). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_RTIME 5 + +#endif /* CFG_LED_7SEG_H */ + /** \} */ //defgroup drivers + diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_lwip.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_lwip.h index b6b55f65..73acb913 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_lwip.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_lwip.h @@ -1206,6 +1206,13 @@ * $WIZ$ type = "boolean" */ #define LWIP_SOCKET 1 +#if LWIP_SOCKET + /* + * The sockets.c file requires this macro to be defined to really + * set errno on errors. + */ + #define ERRNO +#endif /** * Enable BSD-style sockets functions names. diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_nand.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_nand.h new file mode 100644 index 00000000..bd3b2623 --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_nand.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Configuration file for NAND driver module. + */ + +#ifndef CFG_NAND_H +#define CFG_NAND_H + +/** + * Page data size + * + * Size of the data section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_DATA_SIZE 2048 + +/** + * Page spare area size + * + * Size of the spare section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_SPARE_SIZE 64 + +/** + * Pages per block + * + * Number of pages in a erase block. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_PAGES_PER_BLOCK 64 + +/** + * Number of blocks + * + * Total number of erase blocks in one NAND chip. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_BLOCK 2048 + +/** + * Number of reserved blocks + * + * Blocks reserved for remapping defective NAND blocks. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_REMAP_BLOCKS 128 + +/** + * NAND operations timeout + * + * How many milliseconds the cpu waits for + * completion of NAND operations. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_TMOUT 100 + +/** + * Module logging level + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_NAND_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_NAND_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_NAND_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_proc.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_proc.h index ab1a4680..92c95a69 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_proc.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_proc.h @@ -74,6 +74,12 @@ */ #define CONFIG_KERN_PRI 1 +/** + * Priority-inheritance protocol. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI_INHERIT 0 + /** * Dynamic memory allocation for processes. * $WIZ$ type = "boolean" diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_pwm.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_pwm.h index 595189e6..68d62837 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_pwm.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_pwm.h @@ -53,4 +53,12 @@ */ #define PWM_LOG_FORMAT LOG_FMT_VERBOSE +/** + * Enable the OLD pwm API. + * Not recommended for new projects. + * + * $WIZ$ type = "boolean" + */ +#define CFG_PWM_ENABLE_OLD_API 1 + #endif /* CFG_PWM_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_random.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_random.h new file mode 100644 index 00000000..5e3afdff --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_random.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the "random" module + */ + +#ifndef CFG_RANDOM_H +#define CFG_RANDOM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define RANDOM_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define RANDOM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Random security level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "random_level" + */ +#define RANDOM_SECURITY_LEVEL RANDOM_SECURITY_MINIMUM + +#endif /* CFG_RANDOM_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_sd.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_sd.h index 8c40f827..ac2abb1d 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_sd.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_sd.h @@ -63,6 +63,14 @@ */ #define CONFIG_SD_AUTOASSIGN_FAT 1 +/** + * SD bus mode. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sd_mode" + */ +#define CONFIG_SD_MODE SD_SPI_MODE + /** * Enable backward compatibility for sd_init(). * If enabled, sd_init() will allocate internally an Sd context, diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_ser.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_ser.h index 91a10e0b..ec113e52 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_ser.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_ser.h @@ -44,6 +44,13 @@ * Edit these define for your project. */ +/** + * Enable port 0 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega" + */ +#define CONFIG_UART0_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 0 [bytes]. * $WIZ$ type = "int" @@ -58,11 +65,18 @@ */ #define CONFIG_UART0_RXBUFSIZE 32 +/** + * Enable port 1 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega" + */ +#define CONFIG_UART1_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + * $WIZ$ supports = "lm3s or lpc2 or xmega or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_TXBUFSIZE 32 @@ -70,15 +84,22 @@ * Size of the inbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + * $WIZ$ supports = "lm3s or lpc2 or xmega or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_RXBUFSIZE 32 +/** + * Enable port 2 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and (not xmegad4)" + */ +#define CONFIG_UART2_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 2 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2" + * $WIZ$ supports = "lm3s or lpc2 or (xmega and not xmegad4)" */ #define CONFIG_UART2_TXBUFSIZE 32 @@ -86,15 +107,22 @@ * Size of the inbound FIFO buffer for port 2 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2" + * $WIZ$ supports = "lm3s or lpc2 or (xmega and not xmegad4)" */ #define CONFIG_UART2_RXBUFSIZE 32 +/** + * Enable port 3 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART3_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 3 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lpc2" + * $WIZ$ supports = "lpc2 or xmega and not xmegad4" */ #define CONFIG_UART3_TXBUFSIZE 32 @@ -102,16 +130,107 @@ * Size of the inbound FIFO buffer for port 3 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lpc2" + * $WIZ$ supports = "lpc2 or xmega and not xmegad4" */ #define CONFIG_UART3_RXBUFSIZE 32 +/** + * Enable port 4 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 4 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 4 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_RXBUFSIZE 32 + +/** + * Enable port 5 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 5 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 5 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_RXBUFSIZE 32 + +/** + * Enable port 6 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 6 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 6 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_RXBUFSIZE 32 + +/** + * Enable port 7 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 7 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 7 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_RXBUFSIZE 32 /** * Size of the outbound FIFO buffer for SPI port [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_TXBUFSIZE 32 @@ -119,7 +238,7 @@ * Size of the inbound FIFO buffer for SPI port [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_RXBUFSIZE 32 @@ -160,14 +279,14 @@ * * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_order_bit" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST /** * SPI clock division factor. * $WIZ$ type = "int" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_DIV 16 @@ -175,7 +294,7 @@ * SPI clock polarity: normal low or normal high. * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_spi_pol" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW @@ -184,7 +303,7 @@ * sample on second clock edge. * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_spi_phase" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_tftp.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_tftp.h new file mode 100644 index 00000000..36cc622c --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_tftp.h @@ -0,0 +1,20 @@ +#ifndef CFG_TFTP_H +#define CFG_TFTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define TFTP_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define TFTP_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_TFTP_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_usb.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_usb.h index e5a282b1..dbfd6fe1 100644 --- a/boards/triface/benchmark/triface_context_switch/cfg/cfg_usb.h +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_usb.h @@ -61,4 +61,25 @@ */ #define CONFIG_USB_BUFSIZE 64 +/** + * Maximum number of USB device interfaces (default = 1). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_USB_INTERFACE_MAX 1 + +/** + * Maximum number of allocated endpoints (0 = auto). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_USB_EP_MAX 0 + +/** + * Maximum packet size of the control endpoint 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 8 + */ +#define CONFIG_EP0_MAX_SIZE 8 + #endif /* CFG_USB_H */ diff --git a/boards/triface/benchmark/triface_context_switch/cfg/cfg_wm8731.h b/boards/triface/benchmark/triface_context_switch/cfg/cfg_wm8731.h new file mode 100644 index 00000000..76280b65 --- /dev/null +++ b/boards/triface/benchmark/triface_context_switch/cfg/cfg_wm8731.h @@ -0,0 +1,133 @@ +/** + * \file + * + * + * \brief Configuration file for the WM8731 module. + * + * \author Daniele Basile + */ + +#ifndef CFG_WM8731_H +#define CFG_WM8731_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define WM8731_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define WM8731_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Digital control: ADC High pass filter + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_DAPC 0 + + +/** + * Digital control: De-emphasis control + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_deemp" + */ +#define CONFIG_WM8731_DEEMP WM8731_DEEMP_DISABLE + +/** + * Digital control: DAC soft mute control + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_DACMU 0 + + +/** + * Analog control: Microphone boost + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_MICBOOST 0 + +/** + * Analog control: Microphone/Line Input select to ADC + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_insel" + */ +#define CONFIG_WM8731_INSEL WM8731_INSEL_MIC + + +/** + * Analog control: out selector + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_bypass" + */ +#define CONFIG_WM8731_BYPASS WM8731_DACSEL + +/** + * Analog control: Side tone attenuation + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_sideatt" + */ +#define CONFIG_WM8731_SIDEATT WM8731_SIDEATT_6dB + + +/** + * Digital Audio interface format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_fmt" + */ +#define CONFIG_WM8731_INTERFACE_FORMAT WM8731_FORMAT_I2S + +/** + * Digital Audio data bit length. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_databit" + */ +#define CONFIG_WM8731_IWL_BITS WM8731_IWL_16_BIT + +/** + * Enable Master mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_MS 0 + + +/** + * Data sampling rate, refer to datasheet for this value. + * $WIZ$ type = "hex" + */ +#define CONFIG_WM8731_SAMPLING_RATES 0x6 + +#endif /* CFG_WM8731_H */ diff --git a/boards/triface/benchmark/triface_context_switch/project.bertos b/boards/triface/benchmark/triface_context_switch/project.bertos index 9597ac67..918317c3 100644 --- a/boards/triface/benchmark/triface_context_switch/project.bertos +++ b/boards/triface/benchmark/triface_context_switch/project.bertos @@ -19,30 +19,30 @@ p8 (dp9 S'path' p10 -V/usr/local/toolchain/avr/bin/avr-gcc +V/usr/bin/avr-gcc p11 -ssS'PROJECT_SRC_PATH_FROM_MAKEFILE' +ssS'PROJECT_HW_PATH_FROM_MAKEFILE' p12 -Vboards/triface/benchmark/triface_context_switch +Vboards/triface p13 sS'ENABLED_MODULES' p14 (lp15 -S'signal' +S'context_switch' p16 -aS'kernel' +aS'formatwr' p17 -aS'ser' +aS'heap' p18 -aS'kfile' +aS'kernel' p19 -aS'context_switch' +aS'kfile' p20 -aS'timer' +aS'ser' p21 -aS'formatwr' +aS'signal' p22 -aS'heap' +aS'timer' p23 asS'CPU_NAME' p24 @@ -59,9 +59,9 @@ p29 sS'PRESET' p30 I01 -sS'PROJECT_HW_PATH_FROM_MAKEFILE' +sS'PROJECT_SRC_PATH_FROM_MAKEFILE' p31 -Vboards/triface +Vboards/triface/benchmark/triface_context_switch p32 sS'OUTPUT' p33 diff --git a/boards/triface/benchmark/triface_context_switch/triface_context_switch.mk b/boards/triface/benchmark/triface_context_switch/triface_context_switch.mk index a748bf16..bbf96645 100644 --- a/boards/triface/benchmark/triface_context_switch/triface_context_switch.mk +++ b/boards/triface/benchmark/triface_context_switch/triface_context_switch.mk @@ -9,7 +9,7 @@ # Our target application TRG += triface_context_switch -triface_context_switch_PREFIX = "avr-" +triface_context_switch_PREFIX = "/usr/bin/avr-" triface_context_switch_SUFFIX = "" @@ -20,17 +20,19 @@ triface_context_switch_HW_PATH = boards/triface # Files automatically generated by the wizard. DO NOT EDIT, USE triface_context_switch_USER_CSRC INSTEAD! triface_context_switch_WIZARD_CSRC = \ bertos/benchmark/context_switch.c \ - bertos/mware/event.c \ - bertos/struct/heap.c \ - bertos/io/kfile.c \ - bertos/mware/formatwr.c \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/cpu/avr/drv/ser_mega.c \ bertos/cpu/avr/drv/timer_avr.c \ + bertos/cpu/avr/drv/timer_mega.c \ + bertos/drv/ser.c \ bertos/drv/timer.c \ - bertos/kern/signal.c \ + bertos/io/kfile.c \ bertos/kern/proc.c \ - bertos/cpu/avr/drv/ser_avr.c \ - bertos/drv/ser.c \ + bertos/kern/signal.c \ + bertos/mware/event.c \ + bertos/mware/formatwr.c \ bertos/mware/hex.c \ + bertos/struct/heap.c \ # # Files automatically generated by the wizard. DO NOT EDIT, USE triface_context_switch_USER_PCSRC INSTEAD! diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_adc.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_adc.h index df2587be..62ee6ed7 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_adc.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_adc.h @@ -109,4 +109,41 @@ */ #define CONFIG_ADC_STROBE 0 + +/** + * Start up timer[s] = startup value / ADCClock [Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_sut" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_SUT ADC_SUT512 + +/** + * Analog Settling Time[s] = settling value / ADCClock[Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_stt" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_STTLING ADC_AST17 + +/** + * Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRACKTIM 0 + +/** + * Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRANSFER 1 + #endif /* CFG_ADC_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_dac.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_dac.h new file mode 100644 index 00000000..1ae1e984 --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_dac.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for DAC module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DAC_H +#define CFG_DAC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DAC_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DAC_LOG_FORMAT LOG_FMT_TERSE + +/** + * DAC Refresh Period = 1024*REFRESH/DACC Clock + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 65536 + */ +#define CONFIG_DAC_REFRESH 16 + +/** + * DAC Startup Time Selection. + * see datasheet table. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 63 + */ +#define CONFIG_DAC_STARTUP 0 + +/** + * DAC Trigger Selection. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3x_dac_tc" + * $WIZ$ supports = "sam3x" + */ +#define CONFIG_DAC_TIMER DACC_TRGSEL_TIO_CH0 + +#endif /* CFG_DAC_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eeprom.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eeprom.h new file mode 100644 index 00000000..b56c1f9c --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_eeprom.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the Eeprom module. + * + * \author Daniele Basile + */ + +#ifndef CFG_EEPROM_H +#define CFG_EEPROM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define EEPROM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define EEPROM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Check this to disable Eeprom deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_EEPROM_DISABLE_OLD_API 0 + +#endif /* CFG_EEPROM_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_http.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_http.h new file mode 100644 index 00000000..0aba5f02 --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_http.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the HTTP module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HTTP_H +#define CFG_HTTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define HTTP_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define HTTP_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Default start page to load + * + * $WIZ$ type = "str" + */ +#define HTTP_DEFAULT_PAGE "index.htm" + +#endif /* CFG_HTTP_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_i2s.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_i2s.h index 6657157e..934da1b9 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_i2s.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_i2s.h @@ -34,11 +34,28 @@ * * * \author Luca Ottaviano + * \author Daniele Basile */ #ifndef CFG_I2S_H #define CFG_I2S_H +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + /** * Length of each play buffer. * @@ -56,19 +73,65 @@ #define CONFIG_SAMPLE_FREQ 44100UL /** - * Module logging level. + * Sample bits per channel. * - * $WIZ$ type = "enum" - * $WIZ$ value_list = "log_level" + * $WIZ$ type = "int" + * * $WIZ$ min = 8 + * $WIZ$ max = 32 */ -#define I2S_LOG_LEVEL LOG_LVL_INFO +#define CONFIG_WORD_BIT_SIZE 16 /** - * Module logging format. + * Number of channel. * - * $WIZ$ type = "enum" - * $WIZ$ value_list = "log_format" + * $WIZ$ type = "int" */ -#define I2S_LOG_FORMAT LOG_FMT_TERSE +#define CONFIG_CHANNEL_NUM 2 + +/** + * Size of trasmit start delay + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 255 + */ +#define CONFIG_DELAY 0 + +/** + * Generate frame sync every 2 x CONFIG_PERIOD bits (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 512 + */ +#define CONFIG_PERIOD 15 + +/** + * Number of words transmitted in frame + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 16 + */ +#define CONFIG_WORD_PER_FRAME 1 + +/** + * Size of Synchro data register (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 15 + */ +#define CONFIG_FRAME_SYNC_SIZE 15 + + +/** + * Extra Size of Synchro data register (CONFIG_FRAME_SYNC_SIZE + CONFIG_EXTRA_FRAME_SYNC_SIZE * 16 + 1) (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 15 + */ +#define CONFIG_EXTRA_FRAME_SYNC_SIZE 0 #endif /* CFG_I2S_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ini_reader.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ini_reader.h index d0be4389..048139a4 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ini_reader.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ini_reader.h @@ -45,4 +45,10 @@ */ #define CONFIG_INI_MAX_LINE_LEN 64 +/** + * Make case insensitive comparisons. + * $WIZ$ type = "boolean" + */ +#define CONFIG_INI_CASE_INSENSITIVE 0 + #endif /* CFG_INI_READER_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_led_7seg.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_led_7seg.h new file mode 100644 index 00000000..d854b11d --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_led_7seg.h @@ -0,0 +1,80 @@ +/** + * \file cfg_led_7seg.h + * + * + * \brief Configuration file for led 7 segment display. + * + * \author Fabio Bizzi + * + * \addtogroup SevenSegDisplay 7 Segments LED Displays Driver + * \{ + * + */ + +#ifndef CFG_LED_7SEG_H +#define CFG_LED_7SEG_H + +/** + * Use a Common Cathode display. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LED_7SEG_CCAT 0 + +/** + * Number of digit present in the LED display. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + * $WIZ$ max = 8 + */ +#define CONFIG_LED_7SEG_DIGIT 4 + +/** + * Max lenght of the string to be displayed. + * $WIZ$ type = "int" + * $WIZ$ min = 16 + * $WIZ$ max = 255 + */ +#define CONFIG_LED_7SEG_STRLEN 255 + +/** + * Default scrolling speed (ms * CONFIG_LED_7SEG_RTIME). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_SSPEED 10 + +/** + * Default refresh time (ms). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_RTIME 5 + +#endif /* CFG_LED_7SEG_H */ + /** \} */ //defgroup drivers + diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_lwip.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_lwip.h index b6b55f65..73acb913 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_lwip.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_lwip.h @@ -1206,6 +1206,13 @@ * $WIZ$ type = "boolean" */ #define LWIP_SOCKET 1 +#if LWIP_SOCKET + /* + * The sockets.c file requires this macro to be defined to really + * set errno on errors. + */ + #define ERRNO +#endif /** * Enable BSD-style sockets functions names. diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_nand.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_nand.h new file mode 100644 index 00000000..bd3b2623 --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_nand.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Configuration file for NAND driver module. + */ + +#ifndef CFG_NAND_H +#define CFG_NAND_H + +/** + * Page data size + * + * Size of the data section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_DATA_SIZE 2048 + +/** + * Page spare area size + * + * Size of the spare section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_SPARE_SIZE 64 + +/** + * Pages per block + * + * Number of pages in a erase block. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_PAGES_PER_BLOCK 64 + +/** + * Number of blocks + * + * Total number of erase blocks in one NAND chip. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_BLOCK 2048 + +/** + * Number of reserved blocks + * + * Blocks reserved for remapping defective NAND blocks. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_REMAP_BLOCKS 128 + +/** + * NAND operations timeout + * + * How many milliseconds the cpu waits for + * completion of NAND operations. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_TMOUT 100 + +/** + * Module logging level + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_NAND_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_NAND_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_NAND_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_proc.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_proc.h index ab1a4680..92c95a69 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_proc.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_proc.h @@ -74,6 +74,12 @@ */ #define CONFIG_KERN_PRI 1 +/** + * Priority-inheritance protocol. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI_INHERIT 0 + /** * Dynamic memory allocation for processes. * $WIZ$ type = "boolean" diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_pwm.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_pwm.h index 595189e6..68d62837 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_pwm.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_pwm.h @@ -53,4 +53,12 @@ */ #define PWM_LOG_FORMAT LOG_FMT_VERBOSE +/** + * Enable the OLD pwm API. + * Not recommended for new projects. + * + * $WIZ$ type = "boolean" + */ +#define CFG_PWM_ENABLE_OLD_API 1 + #endif /* CFG_PWM_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_random.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_random.h new file mode 100644 index 00000000..5e3afdff --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_random.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the "random" module + */ + +#ifndef CFG_RANDOM_H +#define CFG_RANDOM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define RANDOM_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define RANDOM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Random security level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "random_level" + */ +#define RANDOM_SECURITY_LEVEL RANDOM_SECURITY_MINIMUM + +#endif /* CFG_RANDOM_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_sd.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_sd.h index 8c40f827..ac2abb1d 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_sd.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_sd.h @@ -63,6 +63,14 @@ */ #define CONFIG_SD_AUTOASSIGN_FAT 1 +/** + * SD bus mode. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sd_mode" + */ +#define CONFIG_SD_MODE SD_SPI_MODE + /** * Enable backward compatibility for sd_init(). * If enabled, sd_init() will allocate internally an Sd context, diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ser.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ser.h index 91a10e0b..ec113e52 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ser.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_ser.h @@ -44,6 +44,13 @@ * Edit these define for your project. */ +/** + * Enable port 0 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega" + */ +#define CONFIG_UART0_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 0 [bytes]. * $WIZ$ type = "int" @@ -58,11 +65,18 @@ */ #define CONFIG_UART0_RXBUFSIZE 32 +/** + * Enable port 1 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega" + */ +#define CONFIG_UART1_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + * $WIZ$ supports = "lm3s or lpc2 or xmega or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_TXBUFSIZE 32 @@ -70,15 +84,22 @@ * Size of the inbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + * $WIZ$ supports = "lm3s or lpc2 or xmega or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_RXBUFSIZE 32 +/** + * Enable port 2 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and (not xmegad4)" + */ +#define CONFIG_UART2_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 2 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2" + * $WIZ$ supports = "lm3s or lpc2 or (xmega and not xmegad4)" */ #define CONFIG_UART2_TXBUFSIZE 32 @@ -86,15 +107,22 @@ * Size of the inbound FIFO buffer for port 2 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2" + * $WIZ$ supports = "lm3s or lpc2 or (xmega and not xmegad4)" */ #define CONFIG_UART2_RXBUFSIZE 32 +/** + * Enable port 3 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART3_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 3 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lpc2" + * $WIZ$ supports = "lpc2 or xmega and not xmegad4" */ #define CONFIG_UART3_TXBUFSIZE 32 @@ -102,16 +130,107 @@ * Size of the inbound FIFO buffer for port 3 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lpc2" + * $WIZ$ supports = "lpc2 or xmega and not xmegad4" */ #define CONFIG_UART3_RXBUFSIZE 32 +/** + * Enable port 4 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 4 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 4 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_RXBUFSIZE 32 + +/** + * Enable port 5 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 5 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 5 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_RXBUFSIZE 32 + +/** + * Enable port 6 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 6 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 6 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_RXBUFSIZE 32 + +/** + * Enable port 7 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 7 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 7 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_RXBUFSIZE 32 /** * Size of the outbound FIFO buffer for SPI port [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_TXBUFSIZE 32 @@ -119,7 +238,7 @@ * Size of the inbound FIFO buffer for SPI port [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_RXBUFSIZE 32 @@ -160,14 +279,14 @@ * * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_order_bit" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST /** * SPI clock division factor. * $WIZ$ type = "int" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_DIV 16 @@ -175,7 +294,7 @@ * SPI clock polarity: normal low or normal high. * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_spi_pol" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW @@ -184,7 +303,7 @@ * sample on second clock edge. * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_spi_phase" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_tftp.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_tftp.h new file mode 100644 index 00000000..36cc622c --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_tftp.h @@ -0,0 +1,20 @@ +#ifndef CFG_TFTP_H +#define CFG_TFTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define TFTP_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define TFTP_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_TFTP_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_usb.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_usb.h index e5a282b1..dbfd6fe1 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_usb.h +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_usb.h @@ -61,4 +61,25 @@ */ #define CONFIG_USB_BUFSIZE 64 +/** + * Maximum number of USB device interfaces (default = 1). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_USB_INTERFACE_MAX 1 + +/** + * Maximum number of allocated endpoints (0 = auto). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_USB_EP_MAX 0 + +/** + * Maximum packet size of the control endpoint 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 8 + */ +#define CONFIG_EP0_MAX_SIZE 8 + #endif /* CFG_USB_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_wm8731.h b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_wm8731.h new file mode 100644 index 00000000..76280b65 --- /dev/null +++ b/boards/triface/benchmark/triface_kernel_footprint/cfg/cfg_wm8731.h @@ -0,0 +1,133 @@ +/** + * \file + * + * + * \brief Configuration file for the WM8731 module. + * + * \author Daniele Basile + */ + +#ifndef CFG_WM8731_H +#define CFG_WM8731_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define WM8731_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define WM8731_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Digital control: ADC High pass filter + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_DAPC 0 + + +/** + * Digital control: De-emphasis control + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_deemp" + */ +#define CONFIG_WM8731_DEEMP WM8731_DEEMP_DISABLE + +/** + * Digital control: DAC soft mute control + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_DACMU 0 + + +/** + * Analog control: Microphone boost + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_MICBOOST 0 + +/** + * Analog control: Microphone/Line Input select to ADC + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_insel" + */ +#define CONFIG_WM8731_INSEL WM8731_INSEL_MIC + + +/** + * Analog control: out selector + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_bypass" + */ +#define CONFIG_WM8731_BYPASS WM8731_DACSEL + +/** + * Analog control: Side tone attenuation + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_sideatt" + */ +#define CONFIG_WM8731_SIDEATT WM8731_SIDEATT_6dB + + +/** + * Digital Audio interface format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_fmt" + */ +#define CONFIG_WM8731_INTERFACE_FORMAT WM8731_FORMAT_I2S + +/** + * Digital Audio data bit length. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_databit" + */ +#define CONFIG_WM8731_IWL_BITS WM8731_IWL_16_BIT + +/** + * Enable Master mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_MS 0 + + +/** + * Data sampling rate, refer to datasheet for this value. + * $WIZ$ type = "hex" + */ +#define CONFIG_WM8731_SAMPLING_RATES 0x6 + +#endif /* CFG_WM8731_H */ diff --git a/boards/triface/benchmark/triface_kernel_footprint/project.bertos b/boards/triface/benchmark/triface_kernel_footprint/project.bertos index cb3bac28..2fda6dee 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/project.bertos +++ b/boards/triface/benchmark/triface_kernel_footprint/project.bertos @@ -19,32 +19,32 @@ p8 (dp9 S'path' p10 -V/usr/local/toolchain/avr/bin/avr-gcc +V/usr/bin/avr-gcc p11 -ssS'PROJECT_SRC_PATH_FROM_MAKEFILE' +ssS'PROJECT_HW_PATH_FROM_MAKEFILE' p12 -Vboards/triface/benchmark/triface_kernel_footprint +Vboards/triface p13 sS'ENABLED_MODULES' p14 (lp15 -S'signal' +S'formatwr' p16 -aS'kernel' +aS'heap' p17 -aS'kfile' +aS'kernel' p18 -aS'timer' +aS'kernel_footprint' p19 -aS'formatwr' +aS'kfile' p20 aS'msg' p21 aS'semaphores' p22 -aS'kernel_footprint' +aS'signal' p23 -aS'heap' +aS'timer' p24 asS'CPU_NAME' p25 @@ -61,9 +61,9 @@ p30 sS'PRESET' p31 I01 -sS'PROJECT_HW_PATH_FROM_MAKEFILE' +sS'PROJECT_SRC_PATH_FROM_MAKEFILE' p32 -Vboards/triface +Vboards/triface/benchmark/triface_kernel_footprint p33 sS'OUTPUT' p34 diff --git a/boards/triface/benchmark/triface_kernel_footprint/triface_kernel_footprint.mk b/boards/triface/benchmark/triface_kernel_footprint/triface_kernel_footprint.mk index 5f041552..360a8d1b 100644 --- a/boards/triface/benchmark/triface_kernel_footprint/triface_kernel_footprint.mk +++ b/boards/triface/benchmark/triface_kernel_footprint/triface_kernel_footprint.mk @@ -9,7 +9,7 @@ # Our target application TRG += triface_kernel_footprint -triface_kernel_footprint_PREFIX = "avr-" +triface_kernel_footprint_PREFIX = "/usr/bin/avr-" triface_kernel_footprint_SUFFIX = "" @@ -19,17 +19,18 @@ triface_kernel_footprint_HW_PATH = boards/triface # Files automatically generated by the wizard. DO NOT EDIT, USE triface_kernel_footprint_USER_CSRC INSTEAD! triface_kernel_footprint_WIZARD_CSRC = \ - bertos/mware/event.c \ - bertos/kern/sem.c \ - bertos/struct/heap.c \ - bertos/io/kfile.c \ - bertos/mware/formatwr.c \ + bertos/benchmark/kernel_footprint.c \ bertos/cpu/avr/drv/timer_avr.c \ + bertos/cpu/avr/drv/timer_mega.c \ bertos/drv/timer.c \ - bertos/kern/signal.c \ + bertos/io/kfile.c \ bertos/kern/proc.c \ - bertos/benchmark/kernel_footprint.c \ + bertos/kern/sem.c \ + bertos/kern/signal.c \ + bertos/mware/event.c \ + bertos/mware/formatwr.c \ bertos/mware/hex.c \ + bertos/struct/heap.c \ # # Files automatically generated by the wizard. DO NOT EDIT, USE triface_kernel_footprint_USER_PCSRC INSTEAD! diff --git a/boards/triface/examples/triface/cfg/cfg_http.h b/boards/triface/examples/triface/cfg/cfg_http.h new file mode 100644 index 00000000..0aba5f02 --- /dev/null +++ b/boards/triface/examples/triface/cfg/cfg_http.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the HTTP module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HTTP_H +#define CFG_HTTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define HTTP_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define HTTP_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Default start page to load + * + * $WIZ$ type = "str" + */ +#define HTTP_DEFAULT_PAGE "index.htm" + +#endif /* CFG_HTTP_H */ diff --git a/boards/triface/examples/triface/cfg/cfg_i2s.h b/boards/triface/examples/triface/cfg/cfg_i2s.h index 6657157e..934da1b9 100644 --- a/boards/triface/examples/triface/cfg/cfg_i2s.h +++ b/boards/triface/examples/triface/cfg/cfg_i2s.h @@ -34,11 +34,28 @@ * * * \author Luca Ottaviano + * \author Daniele Basile */ #ifndef CFG_I2S_H #define CFG_I2S_H +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + /** * Length of each play buffer. * @@ -56,19 +73,65 @@ #define CONFIG_SAMPLE_FREQ 44100UL /** - * Module logging level. + * Sample bits per channel. * - * $WIZ$ type = "enum" - * $WIZ$ value_list = "log_level" + * $WIZ$ type = "int" + * * $WIZ$ min = 8 + * $WIZ$ max = 32 */ -#define I2S_LOG_LEVEL LOG_LVL_INFO +#define CONFIG_WORD_BIT_SIZE 16 /** - * Module logging format. + * Number of channel. * - * $WIZ$ type = "enum" - * $WIZ$ value_list = "log_format" + * $WIZ$ type = "int" */ -#define I2S_LOG_FORMAT LOG_FMT_TERSE +#define CONFIG_CHANNEL_NUM 2 + +/** + * Size of trasmit start delay + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 255 + */ +#define CONFIG_DELAY 0 + +/** + * Generate frame sync every 2 x CONFIG_PERIOD bits (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 512 + */ +#define CONFIG_PERIOD 15 + +/** + * Number of words transmitted in frame + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 16 + */ +#define CONFIG_WORD_PER_FRAME 1 + +/** + * Size of Synchro data register (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 15 + */ +#define CONFIG_FRAME_SYNC_SIZE 15 + + +/** + * Extra Size of Synchro data register (CONFIG_FRAME_SYNC_SIZE + CONFIG_EXTRA_FRAME_SYNC_SIZE * 16 + 1) (zero based) + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 15 + */ +#define CONFIG_EXTRA_FRAME_SYNC_SIZE 0 #endif /* CFG_I2S_H */ diff --git a/boards/triface/examples/triface/cfg/cfg_ini_reader.h b/boards/triface/examples/triface/cfg/cfg_ini_reader.h index d0be4389..048139a4 100644 --- a/boards/triface/examples/triface/cfg/cfg_ini_reader.h +++ b/boards/triface/examples/triface/cfg/cfg_ini_reader.h @@ -45,4 +45,10 @@ */ #define CONFIG_INI_MAX_LINE_LEN 64 +/** + * Make case insensitive comparisons. + * $WIZ$ type = "boolean" + */ +#define CONFIG_INI_CASE_INSENSITIVE 0 + #endif /* CFG_INI_READER_H */ diff --git a/boards/triface/examples/triface/cfg/cfg_sd.h b/boards/triface/examples/triface/cfg/cfg_sd.h index 8c40f827..ac2abb1d 100644 --- a/boards/triface/examples/triface/cfg/cfg_sd.h +++ b/boards/triface/examples/triface/cfg/cfg_sd.h @@ -63,6 +63,14 @@ */ #define CONFIG_SD_AUTOASSIGN_FAT 1 +/** + * SD bus mode. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sd_mode" + */ +#define CONFIG_SD_MODE SD_SPI_MODE + /** * Enable backward compatibility for sd_init(). * If enabled, sd_init() will allocate internally an Sd context, diff --git a/boards/triface/examples/triface/cfg/cfg_ser.h b/boards/triface/examples/triface/cfg/cfg_ser.h index 2f6581c4..47c9e444 100644 --- a/boards/triface/examples/triface/cfg/cfg_ser.h +++ b/boards/triface/examples/triface/cfg/cfg_ser.h @@ -44,6 +44,13 @@ * Edit these define for your project. */ +/** + * Enable port 0 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega" + */ +#define CONFIG_UART0_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 0 [bytes]. * $WIZ$ type = "int" @@ -58,11 +65,18 @@ */ #define CONFIG_UART0_RXBUFSIZE 32 +/** + * Enable port 1 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega" + */ +#define CONFIG_UART1_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + * $WIZ$ supports = "lm3s or lpc2 or xmega or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_TXBUFSIZE 32 @@ -70,15 +84,22 @@ * Size of the inbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + * $WIZ$ supports = "lm3s or lpc2 or xmega or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_RXBUFSIZE 32 +/** + * Enable port 2 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and (not xmegad4)" + */ +#define CONFIG_UART2_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 2 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2" + * $WIZ$ supports = "lm3s or lpc2 or (xmega and not xmegad4)" */ #define CONFIG_UART2_TXBUFSIZE 32 @@ -86,15 +107,22 @@ * Size of the inbound FIFO buffer for port 2 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lm3s or lpc2" + * $WIZ$ supports = "lm3s or lpc2 or (xmega and not xmegad4)" */ #define CONFIG_UART2_RXBUFSIZE 32 +/** + * Enable port 3 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART3_ENABLED 1 + /** * Size of the outbound FIFO buffer for port 3 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lpc2" + * $WIZ$ supports = "lpc2 or xmega and not xmegad4" */ #define CONFIG_UART3_TXBUFSIZE 32 @@ -102,16 +130,107 @@ * Size of the inbound FIFO buffer for port 3 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "lpc2" + * $WIZ$ supports = "lpc2 or xmega and not xmegad4" */ #define CONFIG_UART3_RXBUFSIZE 32 +/** + * Enable port 4 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 4 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 4 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmega and not xmegad4" + */ +#define CONFIG_UART4_RXBUFSIZE 32 + +/** + * Enable port 5 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 5 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 5 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART5_RXBUFSIZE 32 + +/** + * Enable port 6 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 6 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 6 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1 or xmegaa3" + */ +#define CONFIG_UART6_RXBUFSIZE 32 + +/** + * Enable port 7 + * $WIZ$ type = "boolean" + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_ENABLED 1 + +/** + * Size of the outbound FIFO buffer for port 7 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 7 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "xmegaa1" + */ +#define CONFIG_UART7_RXBUFSIZE 32 /** * Size of the outbound FIFO buffer for SPI port [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_TXBUFSIZE 32 @@ -119,7 +238,7 @@ * Size of the inbound FIFO buffer for SPI port [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_RXBUFSIZE 32 @@ -160,14 +279,14 @@ * * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_order_bit" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST /** * SPI clock division factor. * $WIZ$ type = "int" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_DIV 16 @@ -175,7 +294,7 @@ * SPI clock polarity: normal low or normal high. * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_spi_pol" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW @@ -184,7 +303,7 @@ * sample on second clock edge. * $WIZ$ type = "enum" * $WIZ$ value_list = "ser_spi_phase" - * $WIZ$ supports = "avr" + * $WIZ$ supports = "avr and not xmega" */ #define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE diff --git a/boards/triface/examples/triface/cfg/cfg_wm8731.h b/boards/triface/examples/triface/cfg/cfg_wm8731.h new file mode 100644 index 00000000..76280b65 --- /dev/null +++ b/boards/triface/examples/triface/cfg/cfg_wm8731.h @@ -0,0 +1,133 @@ +/** + * \file + * + * + * \brief Configuration file for the WM8731 module. + * + * \author Daniele Basile + */ + +#ifndef CFG_WM8731_H +#define CFG_WM8731_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define WM8731_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define WM8731_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Digital control: ADC High pass filter + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_DAPC 0 + + +/** + * Digital control: De-emphasis control + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_deemp" + */ +#define CONFIG_WM8731_DEEMP WM8731_DEEMP_DISABLE + +/** + * Digital control: DAC soft mute control + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_DACMU 0 + + +/** + * Analog control: Microphone boost + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_MICBOOST 0 + +/** + * Analog control: Microphone/Line Input select to ADC + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_insel" + */ +#define CONFIG_WM8731_INSEL WM8731_INSEL_MIC + + +/** + * Analog control: out selector + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_bypass" + */ +#define CONFIG_WM8731_BYPASS WM8731_DACSEL + +/** + * Analog control: Side tone attenuation + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_sideatt" + */ +#define CONFIG_WM8731_SIDEATT WM8731_SIDEATT_6dB + + +/** + * Digital Audio interface format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_fmt" + */ +#define CONFIG_WM8731_INTERFACE_FORMAT WM8731_FORMAT_I2S + +/** + * Digital Audio data bit length. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "wm8731_databit" + */ +#define CONFIG_WM8731_IWL_BITS WM8731_IWL_16_BIT + +/** + * Enable Master mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_WM8731_MS 0 + + +/** + * Data sampling rate, refer to datasheet for this value. + * $WIZ$ type = "hex" + */ +#define CONFIG_WM8731_SAMPLING_RATES 0x6 + +#endif /* CFG_WM8731_H */ diff --git a/boards/triface/examples/triface/project.bertos b/boards/triface/examples/triface/project.bertos index f8a8aa53..73a03230 100644 --- a/boards/triface/examples/triface/project.bertos +++ b/boards/triface/examples/triface/project.bertos @@ -21,9 +21,9 @@ S'path' p10 Vavr-gcc p11 -ssS'PROJECT_SRC_PATH_FROM_MAKEFILE' +ssS'PROJECT_HW_PATH_FROM_MAKEFILE' p12 -Vboards/triface/examples/triface +Vboards/triface p13 sS'ENABLED_MODULES' p14 @@ -69,9 +69,9 @@ p34 sS'PRESET' p35 I01 -sS'PROJECT_HW_PATH_FROM_MAKEFILE' +sS'PROJECT_SRC_PATH_FROM_MAKEFILE' p36 -Vboards/triface +Vboards/triface/examples/triface p37 sS'OUTPUT' p38 diff --git a/boards/triface/examples/triface/triface.mk b/boards/triface/examples/triface/triface.mk index 64e70d93..27d428e7 100644 --- a/boards/triface/examples/triface/triface.mk +++ b/boards/triface/examples/triface/triface.mk @@ -17,18 +17,6 @@ triface_SRC_PATH = boards/triface/examples/triface triface_HW_PATH = boards/triface -ifeq ($(CPU), atmega1281) - triface_hfuse = 0x98 - triface_lfuse = 0x3d - triface_efuse = 0x7f - triface_lock = 0x2f -else - triface_hfuse = 0x88 - triface_lfuse = 0xff - triface_efuse = 0xff - triface_lock = 0x2f -endif - # Files automatically generated by the wizard. DO NOT EDIT, USE triface_USER_CSRC INSTEAD! triface_WIZARD_CSRC = \ bertos/cpu/avr/drv/adc_avr.c \