From 1d10dbcdf05ceaf77f1f6a394e6ee63050d6c89a Mon Sep 17 00:00:00 2001 From: lottaviano Date: Thu, 10 Sep 2009 12:45:28 +0000 Subject: [PATCH] Add kernel flash size benchmark. git-svn-id: https://src.develer.com/svnoss/bertos/trunk@2926 38d2e660-2303-0410-9eaa-f027e97ec537 --- Makefile | 1 + examples/benchmark/README | 7 + .../benchmark/kernel-only_arm/cfg/cfg_adc.h | 110 +++++++ .../kernel-only_arm/cfg/cfg_battfs.h | 68 ++++ .../kernel-only_arm/cfg/cfg_dataflash.h | 56 ++++ .../kernel-only_arm/cfg/cfg_dc_motor.h | 67 ++++ .../benchmark/kernel-only_arm/cfg/cfg_debug.h | 55 ++++ .../benchmark/kernel-only_arm/cfg/cfg_fat.h | 140 ++++++++ .../kernel-only_arm/cfg/cfg_flash25.h | 52 +++ .../kernel-only_arm/cfg/cfg_formatwr.h | 57 ++++ .../benchmark/kernel-only_arm/cfg/cfg_i2c.h | 90 +++++ .../benchmark/kernel-only_arm/cfg/cfg_i2s.h | 75 +++++ .../kernel-only_arm/cfg/cfg_ini_reader.h | 49 +++ .../benchmark/kernel-only_arm/cfg/cfg_kbd.h | 59 ++++ .../benchmark/kernel-only_arm/cfg/cfg_kfile.h | 62 ++++ .../benchmark/kernel-only_arm/cfg/cfg_lcd.h | 72 ++++ .../benchmark/kernel-only_arm/cfg/cfg_md2.h | 54 +++ .../kernel-only_arm/cfg/cfg_monitor.h | 48 +++ .../benchmark/kernel-only_arm/cfg/cfg_phase.h | 56 ++++ .../kernel-only_arm/cfg/cfg_pocketbus.h | 50 +++ .../benchmark/kernel-only_arm/cfg/cfg_proc.h | 102 ++++++ .../benchmark/kernel-only_arm/cfg/cfg_pwm.h | 57 ++++ .../benchmark/kernel-only_arm/cfg/cfg_ramp.h | 116 +++++++ .../kernel-only_arm/cfg/cfg_randpool.h | 56 ++++ .../benchmark/kernel-only_arm/cfg/cfg_sem.h | 48 +++ .../benchmark/kernel-only_arm/cfg/cfg_ser.h | 192 +++++++++++ .../kernel-only_arm/cfg/cfg_signal.h | 48 +++ .../kernel-only_arm/cfg/cfg_spi_bitbang.h | 52 +++ .../kernel-only_arm/cfg/cfg_stepper.h | 70 ++++ .../kernel-only_arm/cfg/cfg_tas5706a.h | 51 +++ .../kernel-only_arm/cfg/cfg_thermo.h | 58 ++++ .../benchmark/kernel-only_arm/cfg/cfg_timer.h | 68 ++++ .../benchmark/kernel-only_arm/cfg/cfg_wdt.h | 48 +++ .../kernel-only_arm/cfg/cfg_xmodem.h | 67 ++++ .../benchmark/kernel-only_arm/hw/hw_buzzer.h | 52 +++ .../kernel-only_arm/hw/hw_dataflash.c | 126 +++++++ .../kernel-only_arm/hw/hw_dataflash.h | 48 +++ .../kernel-only_arm/hw/hw_dc_motor.h | 85 +++++ .../benchmark/kernel-only_arm/hw/hw_ft245rl.h | 65 ++++ .../kernel-only_arm/hw/hw_i2c_bitbang.h | 66 ++++ .../benchmark/kernel-only_arm/hw/hw_kbd.h | 72 ++++ .../benchmark/kernel-only_arm/hw/hw_lcd.h | 156 +++++++++ .../benchmark/kernel-only_arm/hw/hw_mcp41.c | 53 +++ .../benchmark/kernel-only_arm/hw/hw_mcp41.h | 75 +++++ .../benchmark/kernel-only_arm/hw/hw_ntc.c | 46 +++ .../benchmark/kernel-only_arm/hw/hw_ntc.h | 136 ++++++++ .../benchmark/kernel-only_arm/hw/hw_phase.c | 46 +++ .../benchmark/kernel-only_arm/hw/hw_phase.h | 80 +++++ examples/benchmark/kernel-only_arm/hw/hw_sd.h | 53 +++ .../benchmark/kernel-only_arm/hw/hw_ser.h | 53 +++ .../benchmark/kernel-only_arm/hw/hw_sipo.h | 109 ++++++ .../benchmark/kernel-only_arm/hw/hw_spi.h | 115 +++++++ .../benchmark/kernel-only_arm/hw/hw_stepper.h | 309 ++++++++++++++++++ .../kernel-only_arm/hw/hw_tas5706a.h | 65 ++++ .../benchmark/kernel-only_arm/hw/hw_thermo.h | 182 +++++++++++ .../benchmark/kernel-only_arm/hw/kbd_map.h | 71 ++++ .../benchmark/kernel-only_arm/hw/mcp41_map.h | 59 ++++ .../benchmark/kernel-only_arm/hw/ntc_map.h | 61 ++++ .../benchmark/kernel-only_arm/hw/phase_map.h | 58 ++++ .../benchmark/kernel-only_arm/hw/pwm_map.h | 61 ++++ .../benchmark/kernel-only_arm/hw/thermo_map.h | 70 ++++ .../kernel-only_arm/kernel-only_arm.mk | 49 +++ .../kernel-only_arm/kernel-only_arm_wiz.mk | 83 +++++ examples/benchmark/kernel-only_arm/main.c | 42 +++ 64 files changed, 4807 insertions(+) create mode 100644 examples/benchmark/README create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_adc.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_battfs.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_dataflash.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_dc_motor.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_debug.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_fat.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_flash25.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_formatwr.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_i2c.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_i2s.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_ini_reader.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_kbd.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_kfile.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_lcd.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_md2.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_monitor.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_phase.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_pocketbus.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_proc.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_pwm.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_ramp.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_randpool.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_sem.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_ser.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_signal.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_spi_bitbang.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_stepper.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_tas5706a.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_thermo.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_timer.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_wdt.h create mode 100644 examples/benchmark/kernel-only_arm/cfg/cfg_xmodem.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_buzzer.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_dataflash.c create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_dataflash.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_dc_motor.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_ft245rl.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_i2c_bitbang.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_kbd.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_lcd.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_mcp41.c create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_mcp41.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_ntc.c create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_ntc.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_phase.c create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_phase.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_sd.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_ser.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_sipo.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_spi.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_stepper.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_tas5706a.h create mode 100644 examples/benchmark/kernel-only_arm/hw/hw_thermo.h create mode 100644 examples/benchmark/kernel-only_arm/hw/kbd_map.h create mode 100644 examples/benchmark/kernel-only_arm/hw/mcp41_map.h create mode 100644 examples/benchmark/kernel-only_arm/hw/ntc_map.h create mode 100644 examples/benchmark/kernel-only_arm/hw/phase_map.h create mode 100644 examples/benchmark/kernel-only_arm/hw/pwm_map.h create mode 100644 examples/benchmark/kernel-only_arm/hw/thermo_map.h create mode 100644 examples/benchmark/kernel-only_arm/kernel-only_arm.mk create mode 100644 examples/benchmark/kernel-only_arm/kernel-only_arm_wiz.mk create mode 100644 examples/benchmark/kernel-only_arm/main.c diff --git a/Makefile b/Makefile index 2346223a..8dd8cc4c 100644 --- a/Makefile +++ b/Makefile @@ -18,5 +18,6 @@ include examples/demo/demo.mk #include examples/at91sam7/at91sam7s.mk #include examples/at91sam7/at91sam7x.mk #include examples/triface/triface.mk +#include examples/benchmark/kernel-only_arm/kernel-only_arm.mk include bertos/rules.mk diff --git a/examples/benchmark/README b/examples/benchmark/README new file mode 100644 index 00000000..fba1a625 --- /dev/null +++ b/examples/benchmark/README @@ -0,0 +1,7 @@ +In this directory there are a couple of projects useful to measure various +BeRTOS features. Not all the projects are meaningful programs, for example +flash occupation benchmarks just call once most or all functions of a module +just to let the compiler generate the corresponding code. + +Below there's a description of single projects: + - kernel-only_arm/: priority kernel, signals, message queues. diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_adc.h b/examples/benchmark/kernel-only_arm/cfg/cfg_adc.h new file mode 100644 index 00000000..dd65e134 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_adc.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + +#endif /* CFG_ADC_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_battfs.h b/examples/benchmark/kernel-only_arm/cfg/cfg_battfs.h new file mode 100644 index 00000000..fb438a08 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_battfs.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_dataflash.h b/examples/benchmark/kernel-only_arm/cfg/cfg_dataflash.h new file mode 100644 index 00000000..8bd7828a --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_dataflash.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_dc_motor.h b/examples/benchmark/kernel-only_arm/cfg/cfg_dc_motor.h new file mode 100644 index 00000000..409badda --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_dc_motor.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DC_MOTOR_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_debug.h b/examples/benchmark/kernel-only_arm/cfg/cfg_debug.h new file mode 100644 index 00000000..f7596ca1 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_debug.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +#endif /* CFG_DEBUG_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_fat.h b/examples/benchmark/kernel-only_arm/cfg/cfg_fat.h new file mode 100644 index 00000000..d418b783 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_fat.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * \version $Id$ + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_flash25.h b/examples/benchmark/kernel-only_arm/cfg/cfg_flash25.h new file mode 100644 index 00000000..f7ff219b --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_flash25.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_formatwr.h b/examples/benchmark/kernel-only_arm/cfg/cfg_formatwr.h new file mode 100644 index 00000000..13966536 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_formatwr.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_NOFLOAT + + +#endif /* CFG_FORMATWR_H */ + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_i2c.h b/examples/benchmark/kernel-only_arm/cfg/cfg_i2c.h new file mode 100644 index 00000000..af36e6b6 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_i2c.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * I2C backend the driver should use. + * + * I2C_BACKEND_BUILTIN: Use (if present) the builtin i2c hardware. + * I2C_BACKEND_BITBANG: Use the emulated bitbang driver. + * \see drv/i2c.h for more information. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "i2c_backend" + */ +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_i2s.h b/examples/benchmark/kernel-only_arm/cfg/cfg_i2s.h new file mode 100644 index 00000000..52fa8848 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_i2s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_ini_reader.h b/examples/benchmark/kernel-only_arm/cfg/cfg_ini_reader.h new file mode 100644 index 00000000..702c78ee --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_ini_reader.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_kbd.h b/examples/benchmark/kernel-only_arm/cfg/cfg_kbd.h new file mode 100644 index 00000000..b2fb51e7 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_kbd.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 1 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_kfile.h b/examples/benchmark/kernel-only_arm/cfg/cfg_kfile.h new file mode 100644 index 00000000..291a3881 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_kfile.h @@ -0,0 +1,62 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_lcd.h b/examples/benchmark/kernel-only_arm/cfg/cfg_lcd.h new file mode 100644 index 00000000..903ae9aa --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_lcd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +/** + * LCD setting for 32122A (AVR implementation). + * $WIZ$ type = "boolean" + * $WIZ$ supports = "avr and False" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * LCD setting for 32122A (AVR implementation). + * $WIZ$ type = "boolean" + * $WIZ$ supports = "avr and False" + */ +#define CONFIG_LCD_WAIT 1 + + +#endif /* CFG_LCD_H */ + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_md2.h b/examples/benchmark/kernel-only_arm/cfg/cfg_md2.h new file mode 100644 index 00000000..22ec7dbe --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_md2.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_monitor.h b/examples/benchmark/kernel-only_arm/cfg/cfg_monitor.h new file mode 100644 index 00000000..ffe17c07 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_monitor.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_phase.h b/examples/benchmark/kernel-only_arm/cfg/cfg_phase.h new file mode 100644 index 00000000..57202930 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_phase.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_pocketbus.h b/examples/benchmark/kernel-only_arm/cfg/cfg_pocketbus.h new file mode 100644 index 00000000..687e535d --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_pocketbus.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +#endif /* CFG_POCKETBUS_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_proc.h b/examples/benchmark/kernel-only_arm/cfg/cfg_proc.h new file mode 100644 index 00000000..6c3263fe --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_proc.h @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 1 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Dynamic memory allocation for processes. + * + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Preemptive process scheduling. WARNING: Experimental, still incomplete! + * + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 47 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_pwm.h b/examples/benchmark/kernel-only_arm/cfg/cfg_pwm.h new file mode 100644 index 00000000..6627ee2d --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_pwm.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PWM_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_ramp.h b/examples/benchmark/kernel-only_arm/cfg/cfg_ramp.h new file mode 100644 index 00000000..1aeb8a89 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_ramp.h @@ -0,0 +1,116 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_randpool.h b/examples/benchmark/kernel-only_arm/cfg/cfg_randpool.h new file mode 100644 index 00000000..8828c492 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_randpool.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Turn on or off timer support in Randpool. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_sem.h b/examples/benchmark/kernel-only_arm/cfg/cfg_sem.h new file mode 100644 index 00000000..86ed110d --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_sem.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 1 + +#endif /* CFG_SEM_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_ser.h b/examples/benchmark/kernel-only_arm/cfg/cfg_ser.h new file mode 100644 index 00000000..81332806 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_ser.h @@ -0,0 +1,192 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_signal.h b/examples/benchmark/kernel-only_arm/cfg/cfg_signal.h new file mode 100644 index 00000000..ed85119b --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_signal.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \version $Id$ + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 1 + +#endif /* CFG_SIGNAL_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_spi_bitbang.h b/examples/benchmark/kernel-only_arm/cfg/cfg_spi_bitbang.h new file mode 100644 index 00000000..6e9a96bc --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_spi_bitbang.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_stepper.h b/examples/benchmark/kernel-only_arm/cfg/cfg_stepper.h new file mode 100644 index 00000000..e086065c --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_stepper.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_tas5706a.h b/examples/benchmark/kernel-only_arm/cfg/cfg_tas5706a.h new file mode 100644 index 00000000..e1112c0f --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_tas5706a.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \version $Id$ + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_thermo.h b/examples/benchmark/kernel-only_arm/cfg/cfg_thermo.h new file mode 100644 index 00000000..e68c6371 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_thermo.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_timer.h b/examples/benchmark/kernel-only_arm/cfg/cfg_timer.h new file mode 100644 index 00000000..edf6a6fb --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_timer.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 0 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_wdt.h b/examples/benchmark/kernel-only_arm/cfg/cfg_wdt.h new file mode 100644 index 00000000..9f4caae9 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_wdt.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/examples/benchmark/kernel-only_arm/cfg/cfg_xmodem.h b/examples/benchmark/kernel-only_arm/cfg/cfg_xmodem.h new file mode 100644 index 00000000..eb8897f4 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/cfg/cfg_xmodem.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/examples/benchmark/kernel-only_arm/hw/hw_buzzer.h b/examples/benchmark/kernel-only_arm/hw/hw_buzzer.h new file mode 100644 index 00000000..858ecbfb --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_buzzer.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_dataflash.c b/examples/benchmark/kernel-only_arm/hw/hw_dataflash.c new file mode 100644 index 00000000..844dd922 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_dataflash.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/examples/benchmark/kernel-only_arm/hw/hw_dataflash.h b/examples/benchmark/kernel-only_arm/hw/hw_dataflash.h new file mode 100644 index 00000000..5254446b --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_dataflash.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_dc_motor.h b/examples/benchmark/kernel-only_arm/hw/hw_dc_motor.h new file mode 100644 index 00000000..8b8dd4b4 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_dc_motor.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +typedef enum MotorDCMap +{ + + /* Put here motor dc declaration */ + MOTOR_DC_CNT + +} MotorDCMap; + +/* + * Init all pin and device to manage dc motor. + */ +#define MOTOR_DC_INIT() \ + do { \ + /* Implement me! */ \ + } while (0) + + +/* + * Enable DC motor. + */ +#define DC_MOTOR_ENABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Disable DC motor. + */ +#define DC_MOTOR_DISABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Set direction for DC motor. + */ +#define DC_MOTOR_SET_DIR(dev, dir) \ + do { \ + /* Implement me! */ \ + } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_ft245rl.h b/examples/benchmark/kernel-only_arm/hw/hw_ft245rl.h new file mode 100644 index 00000000..cc0c8193 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_ft245rl.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/examples/benchmark/kernel-only_arm/hw/hw_i2c_bitbang.h b/examples/benchmark/kernel-only_arm/hw/hw_i2c_bitbang.h new file mode 100644 index 00000000..4822af7c --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_i2c_bitbang.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + +#endif /* HW_I2C_BITBANG_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_kbd.h b/examples/benchmark/kernel-only_arm/hw/hw_kbd.h new file mode 100644 index 00000000..9ca228cb --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_kbd.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_lcd.h b/examples/benchmark/kernel-only_arm/hw/hw_lcd.h new file mode 100644 index 00000000..3a206a0f --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_lcd.h @@ -0,0 +1,156 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \version $Id$ + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_H +#define HW_LCD_H + +#include "cfg/cfg_lcd.h" /* CONFIG_LCD_4BIT */ +#include /* BV() */ +#include + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +INLINE void lcd_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_mcp41.c b/examples/benchmark/kernel-only_arm/hw/hw_mcp41.c new file mode 100644 index 00000000..dc2a051c --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_mcp41.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/examples/benchmark/kernel-only_arm/hw/hw_mcp41.h b/examples/benchmark/kernel-only_arm/hw/hw_mcp41.h new file mode 100644 index 00000000..645b6dac --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_mcp41.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_ntc.c b/examples/benchmark/kernel-only_arm/hw/hw_ntc.c new file mode 100644 index 00000000..3048725c --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_ntc.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/examples/benchmark/kernel-only_arm/hw/hw_ntc.h b/examples/benchmark/kernel-only_arm/hw/hw_ntc.h new file mode 100644 index 00000000..49152a45 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_ntc.h @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \version $Id$ + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_phase.c b/examples/benchmark/kernel-only_arm/hw/hw_phase.c new file mode 100644 index 00000000..54509ef3 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_phase.c @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_phase.h b/examples/benchmark/kernel-only_arm/hw/hw_phase.h new file mode 100644 index 00000000..7649e702 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_phase.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_sd.h b/examples/benchmark/kernel-only_arm/hw/hw_sd.h new file mode 100644 index 00000000..d15b5506 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_sd.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * \version $Id$ + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_ser.h b/examples/benchmark/kernel-only_arm/hw/hw_ser.h new file mode 100644 index 00000000..2489c433 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_ser.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_sipo.h b/examples/benchmark/kernel-only_arm/hw/hw_sipo.h new file mode 100644 index 00000000..3371c2c0 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_sipo.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * \version $Id$ + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_spi.h b/examples/benchmark/kernel-only_arm/hw/hw_spi.h new file mode 100644 index 00000000..04e4893a --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_spi.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \version $Id$ + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/examples/benchmark/kernel-only_arm/hw/hw_stepper.h b/examples/benchmark/kernel-only_arm/hw/hw_stepper.h new file mode 100644 index 00000000..13141124 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_stepper.h @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * \version $Id$ + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/examples/benchmark/kernel-only_arm/hw/hw_tas5706a.h b/examples/benchmark/kernel-only_arm/hw/hw_tas5706a.h new file mode 100644 index 00000000..d1e1a2e6 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_tas5706a.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/hw_thermo.h b/examples/benchmark/kernel-only_arm/hw/hw_thermo.h new file mode 100644 index 00000000..bbfc9dde --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/hw_thermo.h @@ -0,0 +1,182 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \version $Id$ + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "thermo_map.h" +#include "ntc_map.h" + +#include +#include + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* Put here convertion function to temperature size */ + break; + + /* Put here your thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + +/*! + * This function should return the timeout for reaching the + * target temperature. + */ +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* return ms_to_ticks(60000); */ + break; + + /* Put here a time out for select thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + + +/*! + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + return ntc_read(dev); +} + + +/*! + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + phase_setPower(TRIAC_TEST, 0); + break; + + /* Put here a thermo device to turn off */ + + default: + ASSERT(0); + } + +} + + +/*! + * Based on the current temperature \a cur_temp and the target temperature \a target, this function turns on and off specific + * triac channel and handles the freezer alarm. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + deg_t dist = target - cur_temp; + //kprintf("dev[%d], dist[%d]\n", dev, dist); + + switch(dev) + { + case THERMO_TEST: + if (dist > 0) + { + /* phase_setPower(TRIAC_TEST, dist * PID_TEST_K); */ + } + else + { + /* phase_setPower(TRIAC_TEST, 0); */ + } + break; + + /* Put here an other thermo device */ + + default: + ASSERT(0); + } +} + + +#define THERMO_HW_INIT _thermo_hw_init() + +/*! + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + ASSERT(phase_initialized); + ASSERT(ntc_initialized); + + phase_setPower(TRIAC_TEST, 0); + + /* Add here the other thermo device */ +} + +#endif /* HW_THERMO_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/kbd_map.h b/examples/benchmark/kernel-only_arm/hw/kbd_map.h new file mode 100644 index 00000000..ffe14311 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/kbd_map.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/mcp41_map.h b/examples/benchmark/kernel-only_arm/hw/mcp41_map.h new file mode 100644 index 00000000..6646391c --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/mcp41_map.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/ntc_map.h b/examples/benchmark/kernel-only_arm/hw/ntc_map.h new file mode 100644 index 00000000..505f1c31 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/ntc_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * \version $Id$ + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/phase_map.h b/examples/benchmark/kernel-only_arm/hw/phase_map.h new file mode 100644 index 00000000..7436e5e8 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/phase_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/pwm_map.h b/examples/benchmark/kernel-only_arm/hw/pwm_map.h new file mode 100644 index 00000000..723da2f1 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/pwm_map.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * \version $Id$ + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/examples/benchmark/kernel-only_arm/hw/thermo_map.h b/examples/benchmark/kernel-only_arm/hw/thermo_map.h new file mode 100644 index 00000000..4376076a --- /dev/null +++ b/examples/benchmark/kernel-only_arm/hw/thermo_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \version $Id$ + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +typedef uint8_t thermostatus_t; + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT, +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/examples/benchmark/kernel-only_arm/kernel-only_arm.mk b/examples/benchmark/kernel-only_arm/kernel-only_arm.mk new file mode 100644 index 00000000..c9e1806f --- /dev/null +++ b/examples/benchmark/kernel-only_arm/kernel-only_arm.mk @@ -0,0 +1,49 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile template for BeRTOS wizard. +# +# Author: Lorenzo Berni +# +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +kernel-only_arm_PROGRAMMER_TYPE = none +kernel-only_arm_PROGRAMMER_PORT = none + +# Files included by the user. +kernel-only_arm_USER_CSRC = \ + examples/benchmark/kernel-only_arm/main.c \ + bertos/mware/event.c \ + # + +# Files included by the user. +kernel-only_arm_USER_PCSRC = \ + # + +# Files included by the user. +kernel-only_arm_USER_CPPASRC = \ + # + +# Files included by the user. +kernel-only_arm_USER_CXXSRC = \ + # + +# Files included by the user. +kernel-only_arm_USER_ASRC = \ + # + +# Flags included by the user. +kernel-only_arm_USER_LDFLAGS = \ + # + +# Flags included by the user. +kernel-only_arm_USER_CPPAFLAGS = -Os + +# Flags included by the user. +kernel-only_arm_USER_CPPFLAGS = -Os \ + # + +# Include the mk file generated by the wizard +include examples/benchmark/kernel-only_arm/kernel-only_arm_wiz.mk diff --git a/examples/benchmark/kernel-only_arm/kernel-only_arm_wiz.mk b/examples/benchmark/kernel-only_arm/kernel-only_arm_wiz.mk new file mode 100644 index 00000000..7394432b --- /dev/null +++ b/examples/benchmark/kernel-only_arm/kernel-only_arm_wiz.mk @@ -0,0 +1,83 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile template for BeRTOS wizard. +# +# Author: Lorenzo Berni +# +# + +# Constants automatically defined by the selected modules + + +# Our target application +TRG += kernel-only_arm + +kernel-only_arm_PREFIX = "arm-none-eabi-" + +kernel-only_arm_SUFFIX = "" + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel-only_arm_USER_CSRC INSTEAD! +kernel-only_arm_WIZARD_CSRC = \ + bertos/kern/coop.c \ + bertos/kern/proc.c \ + bertos/kern/sem.c \ + bertos/kern/signal.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel-only_arm_USER_PCSRC INSTEAD! +kernel-only_arm_WIZARD_PCSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel-only_arm_USER_CPPASRC INSTEAD! +kernel-only_arm_WIZARD_CPPASRC = \ + bertos/cpu/arm/hw/switch_ctx_arm.S \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel-only_arm_USER_CXXSRC INSTEAD! +kernel-only_arm_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE kernel-only_arm_USER_ASRC INSTEAD! +kernel-only_arm_WIZARD_ASRC = \ + \ + # + +kernel-only_arm_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -Iexamples/benchmark/kernel-only_arm/ $(kernel-only_arm_CPU_CPPFLAGS) $(kernel-only_arm_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_LDFLAGS = $(kernel-only_arm_CPU_LDFLAGS) $(kernel-only_arm_WIZARD_LDFLAGS) $(kernel-only_arm_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_CPPAFLAGS = $(kernel-only_arm_CPU_CPPAFLAGS) $(kernel-only_arm_WIZARD_CPPAFLAGS) $(kernel-only_arm_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_CSRC = $(kernel-only_arm_CPU_CSRC) $(kernel-only_arm_WIZARD_CSRC) $(kernel-only_arm_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_PCSRC = $(kernel-only_arm_CPU_PCSRC) $(kernel-only_arm_WIZARD_PCSRC) $(kernel-only_arm_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_CPPASRC = $(kernel-only_arm_CPU_CPPASRC) $(kernel-only_arm_WIZARD_CPPASRC) $(kernel-only_arm_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_CXXSRC = $(kernel-only_arm_CPU_CXXSRC) $(kernel-only_arm_WIZARD_CXXSRC) $(kernel-only_arm_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_ASRC = $(kernel-only_arm_CPU_ASRC) $(kernel-only_arm_WIZARD_ASRC) $(kernel-only_arm_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +kernel-only_arm_CPU_CPPAFLAGS = -O0 -g -gdwarf-2 -g -gen-debug +kernel-only_arm_CPU_CPPFLAGS = -O0 -g3 -gdwarf-2 -fverbose-asm -Ibertos/cpu/arm/ -D__ARM_AT91SAM7X256__ +kernel-only_arm_PROGRAMMER_CPU = at91sam7 +kernel-only_arm_STOPFLASH_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel-only_arm_CPU = arm7tdmi +kernel-only_arm_STOPDEBUG_SCRIPT = bertos/prg_scripts/arm/stopopenocd.sh +kernel-only_arm_CPU_CPPASRC = bertos/cpu/arm/hw/crtat91sam7_rom.S +kernel-only_arm_DEBUG_SCRIPT = bertos/prg_scripts/arm/debug.sh +kernel-only_arm_CPU_LDFLAGS = -nostartfiles -Wl,--no-warn-mismatch -T bertos/cpu/arm/scripts/at91sam7_256_rom.ld +kernel-only_arm_FLASH_SCRIPT = bertos/prg_scripts/arm/flash.sh diff --git a/examples/benchmark/kernel-only_arm/main.c b/examples/benchmark/kernel-only_arm/main.c new file mode 100644 index 00000000..1c81b565 --- /dev/null +++ b/examples/benchmark/kernel-only_arm/main.c @@ -0,0 +1,42 @@ +// Emtpy main.c file generated by the wizard +#include +#include +#include +#include + +MsgPort in_port; + +static void init(void) +{ + IRQ_ENABLE; + proc_init(); +} + +static cpu_stack_t proc1_stack[500]; + +static void proc1_main(void) +{ + +} + +int main(void) +{ + init(); + // generate code for process + struct Process *p = proc_new(proc1_main, 0, sizeof(proc1_stack), proc1_stack); + proc_setPri(p, 5); + proc_yield(); + // generate code for msg + Msg msg; + msg_initPort(&in_port, event_createSignal(p, SIG_USER1)); + msg_put(&in_port, &msg); + msg_peek(&in_port); + Msg *msg_re = msg_get(&in_port); + msg_reply(msg_re); + // generate code for signals + sig_signal(p, SIG_USER0); + sig_wait(SIG_USER0); + + return 0; +} + -- 2.25.1