#ifndef DRV_HSMCI_SAM3_H
#define DRV_HSMCI_SAM3_H
-#include <io/cm3.h>
#include <cfg/macros.h>
+#include <cfg/debug.h>
+
+#include <io/cm3.h>
#define CMD8_V_RANGE_CHECK_PAT 0xAA
#define CMD8_V_RANGE_27V_36V (0x100 | CMD8_V_RANGE_CHECK_PAT)
SD_OCR_VDD_31_32 | \
SD_OCR_VDD_32_33)
+#define HSMCI_CHECK_BUSY() \
+ do { \
+ cpu_relax(); \
+ } while (!(HSMCI_SR & BV(HSMCI_SR_NOTBUSY)))
+
+
+#define HSMCI_INIT_SPEED 400000
+
typedef struct Hsmci
{
} Hsmci;
-void hsmci_readResp(void *resp, size_t len);
+INLINE void hsmci_enableIrq(void)
+{
+ HSMCI_IER = BV(HSMCI_IER_RTOE);
+}
+
+INLINE void hsmci_disableIrq(void)
+{
+ HSMCI_IDR = BV(HSMCI_IER_RTOE);
+}
+
+INLINE void hsmci_setBusWidth(size_t len)
+{
+ int sdcsel= 0;
+ if (len == 4)
+ sdcsel = 2;
+ if (len == 8)
+ sdcsel = 3;
+
+ HSMCI_SDCR = (sdcsel << HSMCI_SDCR_SDCBUS_SHIFT) & HSMCI_SDCR_SDCBUS_MASK;
+}
+
+void hsmci_readResp(uint32_t *resp, size_t len);
bool hsmci_sendCmd(uint8_t index, uint32_t argument, uint32_t reply_type);
+void hsmci_prgRxDMA(uint32_t *buf, size_t word_num, size_t blk_size);
+void hsmci_prgTxDMA(uint32_t *buf, size_t word_num, size_t blk_size);
+void hsmci_waitTransfer(void);
+
+void hsmci_setSpeed(uint32_t data_rate, int flag);
+
+
+
+
void hsmci_init(Hsmci *hsmci);
#endif /* DRV_HSMCI_SAM3_H */