* Define PIO controller for enable ADC function.
* \{
*/
-#if CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
#define ADC_PIO_DISABLE PIOB_PDR
#define ADC_PIO_EN_FUNC PIOB_ASR
-#elif CPU_ARM_AT91SAM7S256
+#elif CPU_ARM_SAM7S_LARGE
#define ADC_PIO_DISABLE PIOA_PDR
#define ADC_PIO_EN_FUNC PIOA_BSR
*
* - Disable GPIO on USART0 tx/rx pins
*/
- #if !CPU_ARM_AT91SAM7S256 && !CPU_ARM_AT91SAM7X256 && !CPU_ARM_AT91SAM7X128
+ #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X
#warning Check USART0 pins!
#endif
#define SER_UART0_BUS_TXINIT do { \
*
* - Disable GPIO on USART1 tx/rx pins
*/
- #if !CPU_ARM_AT91SAM7S256 && !CPU_ARM_AT91SAM7X256 && !CPU_ARM_AT91SAM7X128
+ #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X
#warning Check USART1 pins!
#endif
#define SER_UART1_BUS_TXINIT do { \
#define SER_SPI0_BUS_TXCLOSE
#endif
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
#ifndef SER_SPI1_BUS_TXINIT
/**
static unsigned char spi0_txbuffer[CONFIG_SPI0_TXBUFSIZE];
static unsigned char spi0_rxbuffer[CONFIG_SPI0_RXBUFSIZE];
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
static unsigned char spi1_txbuffer[CONFIG_SPI1_TXBUFSIZE];
static unsigned char spi1_rxbuffer[CONFIG_SPI1_RXBUFSIZE];
#endif
static void uart0_irq_dispatcher(void);
static void uart1_irq_dispatcher(void);
static void spi0_irq_handler(void);
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
static void spi1_irq_handler(void);
#endif
/*
SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
}
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
/* SPI driver */
static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
{
C99INIT(txStart, spi0_starttx),
C99INIT(txSending, tx_sending),
};
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
static const struct SerialHardwareVT SPI1_VT =
{
C99INIT(init, spi1_init),
},
C99INIT(sending, false),
},
- #if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+ #if CPU_ARM_SAM7X
{
C99INIT(hw, /**/) {
C99INIT(table, &SPI1_VT),
}
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
/**
* SPI1 interrupt handler
*/
SER_UART0,
SER_UART1,
SER_SPI0,
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
+#if CPU_ARM_SAM7X
SER_SPI1,
#endif
SER_CNT /**< Number of serial ports */
#endif
-#if CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X
/**
* With a 18.420MHz cristal, master clock is:
* (((18.420 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023MHz
--- /dev/null
+#
+#-*- coding: utf-8 -*-
+#
+# \file
+# <!--
+# This file is part of BeRTOS.
+#
+# Bertos is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+# As a special exception, you may use this file as part of a free software
+# library without restriction. Specifically, if other files instantiate
+# templates or use macros or inline functions from this file, or you compile
+# this file and link it with other files to produce an executable, this
+# file does not by itself cause the resulting executable to be covered by
+# the GNU General Public License. This exception does not however
+# invalidate any other reasons why the executable file might be covered by
+# the GNU General Public License.
+#
+# Copyright 2008 Develer S.r.l. (http://www.develer.com/)
+#
+# -->
+#
+# Cpu info of the AT91SAM7S512.
+#
+# This file contain all info for the BeRTOS wizard.
+#
+# \author Daniele Basile <asterix@develer.com>
+#
+#
+
+# Import the common settings for the AT91SAM7 family.
+include("at91sam7.common")
+
+# Short description of the cpu.
+CPU_DESC += [ "512 Kbytes internal flash memory",
+ "64 Kbytes internal SRAM memory" ]
+
+# GCC flags for this cpu.
+CPP_FLAGS += [ "-D__ARM_AT91SAM7S512__" ]
+LD_FLAGS += [ "-T " + SCRIPT_DIR + "at91sam7_512_rom.ld" ]
+
--- /dev/null
+#
+#-*- coding: utf-8 -*-
+#
+# \file
+# <!--
+# This file is part of BeRTOS.
+#
+# Bertos is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+# As a special exception, you may use this file as part of a free software
+# library without restriction. Specifically, if other files instantiate
+# templates or use macros or inline functions from this file, or you compile
+# this file and link it with other files to produce an executable, this
+# file does not by itself cause the resulting executable to be covered by
+# the GNU General Public License. This exception does not however
+# invalidate any other reasons why the executable file might be covered by
+# the GNU General Public License.
+#
+# Copyright 2008 Develer S.r.l. (http://www.develer.com/)
+#
+# -->
+#
+# Cpu info of the AT91SAM7S64.
+#
+# This file contain all info for the BeRTOS wizard.
+#
+# \author Daniele Basile <asterix@develer.com>
+#
+#
+
+# Import the common settings for the AT91SAM7 family.
+include("at91sam7.common")
+
+# Short description of the cpu.
+CPU_DESC += [ "64 Kbytes internal flash memory",
+ "16 Kbytes internal SRAM memory" ]
+
+# GCC flags for this cpu.
+CPP_FLAGS += [ "-D__ARM_AT91SAM7S64__" ]
+LD_FLAGS += [ "-T " + SCRIPT_DIR + "at91sam7_64_rom.ld" ]
+
--- /dev/null
+#
+#-*- coding: utf-8 -*-
+#
+# \file
+# <!--
+# This file is part of BeRTOS.
+#
+# Bertos is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+# As a special exception, you may use this file as part of a free software
+# library without restriction. Specifically, if other files instantiate
+# templates or use macros or inline functions from this file, or you compile
+# this file and link it with other files to produce an executable, this
+# file does not by itself cause the resulting executable to be covered by
+# the GNU General Public License. This exception does not however
+# invalidate any other reasons why the executable file might be covered by
+# the GNU General Public License.
+#
+# Copyright 2008 Develer S.r.l. (http://www.develer.com/)
+#
+# -->
+#
+# Cpu info of the AT91SAM7X512.
+#
+# This file contain all info for the BeRTOS wizard.
+#
+# \author Daniele Basile <asterix@develer.com>
+#
+#
+
+# Import the common settings for the AT91SAM7 family.
+include("at91sam7.common")
+
+# Short description of the cpu.
+CPU_DESC += [ "512 Kbytes internal flash memory",
+ "64 Kbytes internal SRAM memory" ]
+
+# GCC flags for this cpu.
+CPP_FLAGS += [ "-D__ARM_AT91SAM7X512__" ]
+LD_FLAGS += [ "-T " + SCRIPT_DIR + "at91sam7_512_rom.ld" ]
+
#include <cpu/detect.h>
-#if CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X
#include "at91sam7.h"
#else
#define TWI_GACC 0x00000020 ///< General call access.
*/
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7X
#define TWI_OVRE 6 ///< Overrun error.
#define TWI_UNRE 7 ///< Underrun error.
#endif
#include <cfg/compiler.h>
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7S256
+#if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE
#define FLASH_BASE 0x100000UL
#define RAM_BASE 0x200000UL
#define VREG_BASE 0xFFFFFD60 ///< Voltage regulator mode controller base address.
#define MC_BASE 0xFFFFFF00 ///< Memory controller base.
- #if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+ #if CPU_ARM_SAM7X
#define CAN_BASE 0xFFFD0000 ///< PWM controller base address.
#define EMAC_BASE 0xFFFDC000 ///< Ethernet MAC address.
#define SPI0_BASE 0xFFFE0000 ///< SPI0 base address.
#define PIOB_BASE 0xFFFFF600 ///< PIO base address.
#endif
- #if CPU_ARM_AT91SAM7S256
+ #if CPU_ARM_SAM7S_LARGE
#define SPI_BASE 0xFFFE0000 ///< SPI0 base address.
#endif
* Peripheral Identifiers and Interrupts
*\{
*/
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE
#define FIQ_ID 0 ///< Fast interrupt ID.
#define SYSC_ID 1 ///< System controller interrupt.
#define US0_ID 6 ///< USART 0 ID.
#define IRQ0_ID 30 ///< External interrupt 0 ID.
#define IRQ1_ID 31 ///< External interrupt 1 ID.
- #if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+ #if CPU_ARM_SAM7X
#define PIOA_ID 2 ///< Parallel A I/O controller ID.
#define PIOB_ID 3 ///< Parallel B I/O controller ID.
#define SPI0_ID 4 ///< Serial peripheral interface 0 ID.
#endif
- #if CPU_ARM_AT91SAM7S256
+ #if CPU_ARM_SAM7S_LARGE
#define PIOA_ID 2 ///< Parallel I/O controller ID.
/* ID 3 is reserved */
#define ADC_ID 4 ///< Analog to digital converter ID.
* USART & DEBUG pin names
*\{
*/
-#if CPU_ARM_AT91SAM7S256
+#if CPU_ARM_SAM7S_LARGE
#define RXD0 5
#define TXD0 6
#define RXD1 21
#define TXD1 22
#define DTXD 10
#define DRXD 9
-#elif CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#elif CPU_ARM_SAM7X
#define RXD0 0 // PA0
#define TXD0 1 // PA1
#define RXD1 5 // PA5
* SPI pins name
*\{
*/
-#if CPU_ARM_AT91SAM7S256
+#if CPU_ARM_SAM7S_LARGE
#define SPI0_NPCS0 11 // Same as NSS pin.
#define SPI0_MISO 12
#define SPI0_MOSI 13
#define SPI0_SPCK 14
-#elif CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#elif CPU_ARM_SAM7X
#define SPI0_NPCS0 12 // Same as NSS pin. PA12
#define SPI0_NPCS1 13 // PA13
#define SPI0_NPCS2 14 // PA14
* Timer counter pins definition.
*\{
*/
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7X
#define TIOA0 23 // PB23
#define TIOB0 24 // PB24
#define TIOA1 25 // PB25
#define TIO_PIO_PDR PIOB_PDR
#define TIO_PIO_ABSR PIOB_ASR
-#elif CPU_ARM_AT91SAM7S256
+#elif CPU_ARM_SAM7S_LARGE
#define TIOA0 0 // PA0
#define TIOB0 1 // PA1
#define TIOA1 15 // PA15
* PWM pins definition.
*\{
*/
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7X
#define PWM0 19 // PB19
#define PWM1 20 // PB20
#define PWM2 21 // PB21
#define PWM_PIO_OER PIOB_OER
#define PWM_PIO_ABSR PIOB_ASR
-#elif CPU_ARM_AT91SAM7S256
+#elif CPU_ARM_SAM7S_LARGE
#define PWM0 11 // PA11
#define PWM1 12 // PA12
#define PWM2 13 // PA13
* TWI pins definition.
*\{
*/
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7X
#define TWD 10
#define TWCK 11
-#elif CPU_ARM_AT91SAM7S256
+#elif CPU_ARM_SAM7S_LARGE
#define TWD 3 //PA3
#define TWCK 4 //PA4
* ADC pins definition.
*\{
*/
-#if CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128
+#if CPU_ARM_SAM7X
#define ADTRG 18 // PB18
#define AD0 23 // PB27
#define AD1 24 // PB28
#define AD2 25 // PB29
#define AD3 26 // PB30
-#elif CPU_ARM_AT91SAM7S256
+#elif CPU_ARM_SAM7S_LARGE
#define ADTRG 18 // PA8
#define AD0 0 // PA17
#define AD1 1 // PA18
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ *
+ * \brief Script linker for Atmel AT91SAM7_512 family processors.
+ *
+ */
+
+
+ENTRY(_init)
+SEARCH_DIR(.)
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+/*
+ * Define memory configuration for AT91SAM7_512 family
+ */
+MEMORY
+{
+ rom(rx) : org = 0x00100000, len = 512k
+ ram(rwx) : org = 0x00200000, len = 64k
+}
+
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+/*
+ * Allocate section memory
+ */
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors));
+ . = ALIGN (4);
+ KEEP(*(.init));
+ . = ALIGN (4);
+ *(.rodata .rodata.*);
+ . = ALIGN (4);
+ *(.text .text.*);
+ . = ALIGN (4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ } > ram
+
+ _etext = .;
+ PROVIDE (__etext = .);
+
+ .data : AT (_etext)
+ {
+ PROVIDE (__data_start = .);
+ *(.data .data.*)
+ . = ALIGN (4);
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss .bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+ } > ram
+
+ /*
+ * Allocated stack at the end of bss section.
+ * Data heap is allocate at end of stack.
+ */
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+
+ PROVIDE (__stack_end = .);
+
+ PROVIDE (__heap_start = .);
+}
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ *
+ * \brief Script linker for Atmel AT91SAM7_512 family processors.
+ *
+ */
+
+
+ENTRY(_init)
+SEARCH_DIR(.)
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+/*
+ * Define memory configuration for AT91SAM7_512 family
+ */
+MEMORY
+{
+ rom(rx) : org = 0x00100000, len = 512k
+ ram(rwx) : org = 0x00200000, len = 64k
+}
+
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+/*
+ * Allocate section memory
+ */
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors));
+ . = ALIGN (4);
+ KEEP(*(.init));
+ . = ALIGN (4);
+ *(.rodata .rodata.*);
+ . = ALIGN (4);
+ *(.text .text.*);
+ . = ALIGN (4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ } > rom
+
+ _etext = .;
+ PROVIDE (__etext = .);
+
+ .data : AT (_etext)
+ {
+ PROVIDE (__data_start = .);
+ *(.data .data.*)
+ . = ALIGN (4);
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss .bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+ } > ram
+
+ /*
+ * Allocated stack at the end of bss section.
+ * Data heap is allocate at end of stack.
+ */
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+
+ PROVIDE (__stack_end = .);
+
+ PROVIDE (__heap_start = .);
+}
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ *
+ * \brief Script linker for Atmel AT91SAM7_64 family processors.
+ *
+ */
+
+
+ENTRY(_init)
+SEARCH_DIR(.)
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+/*
+ * Define memory configuration for AT91SAM7_64 family
+ */
+MEMORY
+{
+ rom(rx) : org = 0x00100000, len = 64k
+ ram(rwx) : org = 0x00200000, len = 16k
+}
+
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+/*
+ * Allocate section memory
+ */
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors));
+ . = ALIGN (4);
+ KEEP(*(.init));
+ . = ALIGN (4);
+ *(.rodata .rodata.*);
+ . = ALIGN (4);
+ *(.text .text.*);
+ . = ALIGN (4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ } > ram
+
+ _etext = .;
+ PROVIDE (__etext = .);
+
+ .data : AT (_etext)
+ {
+ PROVIDE (__data_start = .);
+ *(.data .data.*)
+ . = ALIGN (4);
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss .bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+ } > ram
+
+ /*
+ * Allocated stack at the end of bss section.
+ * Data heap is allocate at end of stack.
+ */
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+
+ PROVIDE (__stack_end = .);
+
+ PROVIDE (__heap_start = .);
+}
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \version $Id: sysirq_at91.c 18273 2007-10-11 14:53:02Z batt $
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ *
+ * \brief Script linker for Atmel AT91SAM7_64 family processors.
+ *
+ */
+
+
+ENTRY(_init)
+SEARCH_DIR(.)
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+
+/*
+ * Define memory configuration for AT91SAM7_64 family
+ */
+MEMORY
+{
+ rom(rx) : org = 0x00100000, len = 64k
+ ram(rwx) : org = 0x00200000, len = 16k
+}
+
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+/*
+ * Allocate section memory
+ */
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors));
+ . = ALIGN (4);
+ KEEP(*(.init));
+ . = ALIGN (4);
+ *(.rodata .rodata.*);
+ . = ALIGN (4);
+ *(.text .text.*);
+ . = ALIGN (4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ } > rom
+
+ _etext = .;
+ PROVIDE (__etext = .);
+
+ .data : AT (_etext)
+ {
+ PROVIDE (__data_start = .);
+ *(.data .data.*)
+ . = ALIGN (4);
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss .bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+ } > ram
+
+ /*
+ * Allocated stack at the end of bss section.
+ * Data heap is allocate at end of stack.
+ */
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+
+ PROVIDE (__stack_end = .);
+
+ PROVIDE (__heap_start = .);
+}
#if defined(__ARM_AT91SAM7S64__)
#define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7S_LARGE 1
#define CPU_ARM_AT91SAM7S64 1
#else
#define CPU_ARM_AT91SAM7S64 0
#if defined(__ARM_AT91SAM7S128__)
#define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7S_LARGE 1
#define CPU_ARM_AT91SAM7S128 1
#else
#define CPU_ARM_AT91SAM7S128 0
#if defined(__ARM_AT91SAM7S256__)
#define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7S_LARGE 1
#define CPU_ARM_AT91SAM7S256 1
#else
#define CPU_ARM_AT91SAM7S256 0
#endif
+ #if defined(__ARM_AT91SAM7S512__)
+ #define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7S_LARGE 1
+ #define CPU_ARM_AT91SAM7S512 1
+ #else
+ #define CPU_ARM_AT91SAM7S512 0
+ #endif
+
// AT91SAM7X core family
#if defined(__ARM_AT91SAM7X128__)
#define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7X 1
#define CPU_ARM_AT91SAM7X128 1
#else
#define CPU_ARM_AT91SAM7X128 0
#if defined(__ARM_AT91SAM7X256__)
#define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7X 1
#define CPU_ARM_AT91SAM7X256 1
#else
#define CPU_ARM_AT91SAM7X256 0
#endif
+
+ #if defined(__ARM_AT91SAM7X512__)
+ #define CPU_ARM_AT91 1
+ #define CPU_ARM_SAM7X 1
+ #define CPU_ARM_AT91SAM7X512 1
+ #else
+ #define CPU_ARM_AT91SAM7X512 0
+ #endif
+
#if defined (__ARM_LM3S1968__)
#define CPU_ARM_LM3S 1
#define CPU_ARM_LM3S1968 1
#define CPU_ARM_LM3S1968 0
#endif
+ #if !defined(CPU_ARM_SAM7S_LARGE)
+ #define CPU_ARM_SAM7S_LARGE 0
+ #endif
+
+ #if !defined(CPU_ARM_SAM7X)
+ #define CPU_ARM_SAM7X 0
+ #endif
#if defined(CPU_ARM_AT91)
#if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
+ CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
- + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 != 1
+ + CPU_ARM_AT91SAM7S512 \
+ + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
+ + CPU_ARM_AT91SAM7X512 != 1
#error ARM CPU configuration error
#endif
#define CPU_ARM_LM3S 0
#define CPU_ARM_AT91 0
#define CPU_ARM_LM3S 0
+ /* SAM7 sub-families */
+ #define CPU_ARM_SAM7S_LARGE 0
+ #define CPU_ARM_SAM7X 0
+
/* ARM CPUs */
#define CPU_ARM_AT91SAM7S32 0
#define CPU_ARM_AT91SAM7S64 0
#define CPU_ARM_AT91SAM7S128 0
#define CPU_ARM_AT91SAM7S256 0
+ #define CPU_ARM_AT91SAM7S512 0
#define CPU_ARM_AT91SAM7X128 0
#define CPU_ARM_AT91SAM7X256 0
+ #define CPU_ARM_AT91SAM7X512 0
#define CPU_ARM_LM3S1968 0
#endif
projects / bertos.git / commitdiff