Add full support for AT91SAM7S64, AT91SAM7S128, AT91SAM7S512, AT91SAM7X512.
[bertos.git] / bertos / cpu / detect.h
1 /**
2  * \file
3  * <!--
4  * This file is part of BeRTOS.
5  *
6  * Bertos is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  *
20  * As a special exception, you may use this file as part of a free software
21  * library without restriction.  Specifically, if other files instantiate
22  * templates or use macros or inline functions from this file, or you compile
23  * this file and link it with other files to produce an executable, this
24  * file does not by itself cause the resulting executable to be covered by
25  * the GNU General Public License.  This exception does not however
26  * invalidate any other reasons why the executable file might be covered by
27  * the GNU General Public License.
28  *
29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30  * Copyright 2004 Giovanni Bajo
31  *
32  * -->
33  *
34  * \brief CPU detection through special preprocessor macros
35  */
36 #ifndef CPU_DETECT_H
37 #define CPU_DETECT_H
38
39 #if defined(__arm__) /* GCC */ \
40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
41         #define CPU_ARM                 1
42         #define CPU_ID                  arm
43
44         // AT91SAM7S core family
45         #if defined(__ARM_AT91SAM7S32__)
46                 #define CPU_ARM_AT91         1
47                 #define CPU_ARM_AT91SAM7S32  1
48         #else
49                 #define CPU_ARM_AT91SAM7S32  0
50         #endif
51
52         #if defined(__ARM_AT91SAM7S64__)
53                 #define CPU_ARM_AT91         1
54                 #define CPU_ARM_SAM7S_LARGE  1
55                 #define CPU_ARM_AT91SAM7S64  1
56         #else
57                 #define CPU_ARM_AT91SAM7S64  0
58         #endif
59
60         #if defined(__ARM_AT91SAM7S128__)
61                 #define CPU_ARM_AT91         1
62                 #define CPU_ARM_SAM7S_LARGE  1
63                 #define CPU_ARM_AT91SAM7S128 1
64         #else
65                 #define CPU_ARM_AT91SAM7S128 0
66         #endif
67
68         #if defined(__ARM_AT91SAM7S256__)
69                 #define CPU_ARM_AT91         1
70                 #define CPU_ARM_SAM7S_LARGE  1
71                 #define CPU_ARM_AT91SAM7S256 1
72         #else
73                 #define CPU_ARM_AT91SAM7S256 0
74         #endif
75
76         #if defined(__ARM_AT91SAM7S512__)
77                 #define CPU_ARM_AT91         1
78                 #define CPU_ARM_SAM7S_LARGE  1
79                 #define CPU_ARM_AT91SAM7S512 1
80         #else
81                 #define CPU_ARM_AT91SAM7S512 0
82         #endif
83
84         // AT91SAM7X core family
85         #if defined(__ARM_AT91SAM7X128__)
86                 #define CPU_ARM_AT91         1
87                 #define CPU_ARM_SAM7X        1
88                 #define CPU_ARM_AT91SAM7X128 1
89         #else
90                 #define CPU_ARM_AT91SAM7X128 0
91         #endif
92
93         #if defined(__ARM_AT91SAM7X256__)
94                 #define CPU_ARM_AT91         1
95                 #define CPU_ARM_SAM7X        1
96                 #define CPU_ARM_AT91SAM7X256 1
97         #else
98                 #define CPU_ARM_AT91SAM7X256 0
99         #endif
100
101
102         #if defined(__ARM_AT91SAM7X512__)
103                 #define CPU_ARM_AT91         1
104                 #define CPU_ARM_SAM7X        1
105                 #define CPU_ARM_AT91SAM7X512 1
106         #else
107                 #define CPU_ARM_AT91SAM7X512 0
108         #endif
109
110         #if defined (__ARM_LM3S1968__)
111                 #define CPU_ARM_LM3S        1
112                 #define CPU_ARM_LM3S1968    1
113         #else
114                 #define CPU_ARM_LM3S1968    0
115         #endif
116
117         #if !defined(CPU_ARM_SAM7S_LARGE)
118                 #define CPU_ARM_SAM7S_LARGE 0
119         #endif
120
121         #if !defined(CPU_ARM_SAM7X)
122                 #define CPU_ARM_SAM7X 0
123         #endif
124
125
126         #if defined(CPU_ARM_AT91)
127                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
128                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
129                 + CPU_ARM_AT91SAM7S512 \
130                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
131                 + CPU_ARM_AT91SAM7X512 != 1
132                         #error ARM CPU configuration error
133                 #endif
134                 #define CPU_ARM_LM3S        0
135
136         #elif defined (CPU_ARM_LM3S)
137                 #if CPU_ARM_LM3S1968 + 0 != 1
138                         #error Luminary ARM CPU configuration error
139                 #endif
140                 #define CPU_ARM_AT91        0
141         /* #elif Add other ARM families here */
142         #else
143                 #define CPU_ARM_AT91        0
144                 #define CPU_ARM_LM3S        0
145         #endif
146
147
148         #if CPU_ARM_AT91 + CPU_ARM_LM3S + 0 /* Add other ARM families here */ != 1
149                 #error ARM CPU configuration error
150         #endif
151 #else
152         #define CPU_ARM                 0
153
154         /* ARM Families */
155         #define CPU_ARM_AT91            0
156         #define CPU_ARM_LM3S            0
157
158         /* SAM7 sub-families */
159         #define CPU_ARM_SAM7S_LARGE     0
160         #define CPU_ARM_SAM7X           0
161
162         /* ARM CPUs */
163         #define CPU_ARM_AT91SAM7S32     0
164         #define CPU_ARM_AT91SAM7S64     0
165         #define CPU_ARM_AT91SAM7S128    0
166         #define CPU_ARM_AT91SAM7S256    0
167         #define CPU_ARM_AT91SAM7S512    0
168         #define CPU_ARM_AT91SAM7X128    0
169         #define CPU_ARM_AT91SAM7X256    0
170         #define CPU_ARM_AT91SAM7X512    0
171
172         #define CPU_ARM_LM3S1968        0
173 #endif
174
175 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
176         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
177         #warning Assuming CPU is I196
178         #define CPU_I196                1
179         #define CPU_ID                  i196
180 #else
181         #define CPU_I196                0
182 #endif
183
184 #if defined(__i386__) /* GCC */ \
185         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
186         #define CPU_X86                 1
187         #define CPU_X86_32              1
188         #define CPU_X86_64              0
189         #define CPU_ID                  x86
190 #elif defined(__x86_64__) /* GCC */ \
191         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
192         #define CPU_X86                 1
193         #define CPU_X86_32              0
194         #define CPU_X86_64              1
195         #define CPU_ID                  x86
196 #else
197         #define CPU_X86                 0
198         #define CPU_I386                0
199         #define CPU_X86_64              0
200 #endif
201
202 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
203         #define CPU_PPC                 1
204         #define CPU_ID                  ppc
205         #if defined(_ARCH_PPC)
206                 #define CPU_PPC32       1
207         #else
208                 #define CPU_PPC32       0
209         #endif
210         #if defined(_ARCH_PPC64)
211                 #define CPU_PPC64       1
212         #else
213                 #define CPU_PPC64       0
214         #endif
215 #else
216         #define CPU_PPC                 0
217         #define CPU_PPC32               0
218         #define CPU_PPC64               0
219 #endif
220
221 #if defined(__m56800E__) || defined(__m56800__)
222         #define CPU_DSP56K              1
223         #define CPU_ID                  dsp56k
224 #else
225         #define CPU_DSP56K              0
226 #endif
227
228 #if defined (__AVR__)
229         #define CPU_AVR                 1
230         #define CPU_ID                  avr
231
232         #if defined(__AVR_ATmega32__)
233                 #define CPU_AVR_ATMEGA32    1
234         #else
235                 #define CPU_AVR_ATMEGA32    0
236         #endif
237
238         #if defined(__AVR_ATmega64__)
239                 #define CPU_AVR_ATMEGA64    1
240         #else
241                 #define CPU_AVR_ATMEGA64    0
242         #endif
243
244         #if defined(__AVR_ATmega103__)
245                 #define CPU_AVR_ATMEGA103   1
246         #else
247                 #define CPU_AVR_ATMEGA103   0
248         #endif
249
250         #if defined(__AVR_ATmega128__)
251                 #define CPU_AVR_ATMEGA128   1
252         #else
253                 #define CPU_AVR_ATMEGA128   0
254         #endif
255
256         #if defined(__AVR_ATmega8__)
257                 #define CPU_AVR_ATMEGA8     1
258         #else
259                 #define CPU_AVR_ATMEGA8     0
260         #endif
261
262         #if defined(__AVR_ATmega168__)
263                 #define CPU_AVR_ATMEGA168   1
264         #else
265                 #define CPU_AVR_ATMEGA168   0
266         #endif
267
268         #if defined(__AVR_ATmega1281__)
269                 #define CPU_AVR_ATMEGA1281  1
270         #else
271                 #define CPU_AVR_ATMEGA1281  0
272         #endif
273
274         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
275           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1
276                 #error AVR CPU configuration error
277         #endif
278 #else
279         #define CPU_AVR                 0
280         #define CPU_AVR_ATMEGA8         0
281         #define CPU_AVR_ATMEGA168       0
282         #define CPU_AVR_ATMEGA32        0
283         #define CPU_AVR_ATMEGA64        0
284         #define CPU_AVR_ATMEGA103       0
285         #define CPU_AVR_ATMEGA128       0
286         #define CPU_AVR_ATMEGA1281      0
287 #endif
288
289
290 /* Self-check for the detection: only one CPU must be detected */
291 #if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
292         #error Unknown CPU
293 #elif !defined(CPU_ID)
294         #error CPU_ID not defined
295 #elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
296         #error Internal CPU configuration error
297 #endif
298
299
300 #endif /* CPU_DETECT_H */