bertos/cpu/cortex-m3/drv/flash_sam3.c

   1 /**
   2  * \file
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   9  * (at your option) any later version.
  10  *
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  14  * GNU General Public License for more details.
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  19  *
  20  * As a special exception, you may use this file as part of a free software
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  25  * the GNU General Public License.  This exception does not however
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  27  * the GNU General Public License.
  28  *
  29  * Copyright 2011 Develer S.r.l. (http://www.develer.com/)
  30  *
  31  * -->
  32  *
  33  * \author Daniele Basile <asterix@develer.com>
  34  *
  35  * \brief SAM3 Internal flash read/write driver.
  36  *
  37  *
  38  */
  39
  40 #include "flash_sam3.h"
  41
  42 #include "cfg/cfg_emb_flash.h"
  43 #include <cfg/macros.h>
  44
  45 // Define log settings for cfg/log.h
  46 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
  47 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
  48 #include <cfg/log.h>
  49
  50 #include <cpu/irq.h>
  51 #include <cpu/attr.h>
  52 #include <cpu/power.h>
  53
  54 #include <io/kfile.h>
  55 #include <io/kblock.h>
  56 #include <io/cm3.h>
  57
  58 #include <drv/timer.h>
  59 #include <drv/flash.h>
  60
  61 #include <string.h>
  62
  63
  64 struct FlashHardware
  65 {
  66         uint8_t status;
  67 };
  68
  69
  70 /**
  71  * Really send the flash write command.
  72  *
  73  * \note This function has to be placed in RAM because
  74  *       executing code from flash while a writing process
  75  *       is in progress is forbidden.
  76  */
  77 RAM_FUNC NOINLINE static void write_page_bank(uint32_t page)
  78 {
  79         // Send the 'write page' command
  80         EEFC0_FCR = EEFC_FCR_FKEY | EFC_FCR_FCMD_EWP | EEFC_FCR_FARG(page);
  81
  82         // Wait for the end of command
  83         while(!(EEFC0_FSR & BV(EEFC_FSR_FRDY)))
  84         {
  85                 //NOP;
  86         }
  87 }
  88
  89 #if FLASH_BANKS_NUM > 1
  90 RAM_FUNC NOINLINE static void write_page_bank1(uint32_t page)
  91 {
  92         // Send the 'write page' command
  93         EEFC1_FCR = EEFC_FCR_FKEY | EFC_FCR_FCMD_EWP | EEFC_FCR_FARG(page);
  94
  95         // Wait for the end of command
  96         while(!(EEFC1_FSR & BV(EEFC_FSR_FRDY)))
  97         {
  98                 //NOP;
  99         }
 100 }
 101 #endif
 102
 103
 104 /**
 105  * Send write command.
 106  *
 107  * After WR command cpu write bufferd page into flash memory.
 108  *
 109  */
 110 INLINE void flash_sendWRcmd(uint32_t page)
 111 {
 112         cpu_flags_t flags;
 113
 114         #if FLASH_BANKS_NUM > 1
 115         if (page >= FLASH_PAGES_FOR_BANK)
 116         {
 117                 page &= 0x3FF;
 118                 LOG_INFO("Writing page %ld...\n", page);
 119
 120                 IRQ_SAVE_DISABLE(flags);
 121                 write_page_bank1(page);
 122                 IRQ_RESTORE(flags);
 123         }
 124         else
 125         #endif
 126         {
 127                 LOG_INFO("Writing page %ld...\n", page);
 128
 129                 IRQ_SAVE_DISABLE(flags);
 130                 write_page_bank(page);
 131                 IRQ_RESTORE(flags);
 132         }
 133
 134
 135         LOG_INFO("Done\n");
 136 }
 137
 138 static size_t sam3_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
 139 {
 140         memcpy(buf, (void *)(idx * blk->blk_size +  FLASH_BASE + offset), size);
 141         return size;
 142 }
 143
 144 static size_t sam3_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
 145 {
 146         ASSERT(offset == 0);
 147         ASSERT(size == blk->blk_size);
 148
 149         uint32_t *addr = (uint32_t *)(idx * blk->blk_size +  FLASH_BASE);
 150         const uint8_t *buf = (const uint8_t *)_buf;
 151
 152         while (size)
 153         {
 154                 uint32_t data = (*(buf + 3) << 24) |
 155                                                 (*(buf + 2) << 16) |
 156                                                 (*(buf + 1) << 8)  |
 157                                                 *buf;
 158                 *addr = data;
 159
 160                 size -= 4;
 161                 buf += 4;
 162                 addr++;
 163         }
 164
 165         flash_sendWRcmd(idx);
 166
 167         Flash *fls = FLASH_CAST(blk);
 168         uint32_t status = (uint32_t)&EEFC0_FSR;
 169         #if FLASH_BANKS_NUM > 1
 170                 if (idx > FLASH_PAGES_FOR_BANK)
 171                 {
 172                         status = (uint32_t)&EEFC1_FSR;
 173                 }
 174         #endif
 175
 176         if(status & BV(EEFC_FSR_FCMDE))
 177         {
 178                 fls->hw->status |= FLASH_WR_ERR;
 179                 LOG_ERR("flash not erased..\n");
 180                 return 0;
 181         }
 182
 183         if(status & BV(EEFC_FSR_FLOCKE))
 184         {
 185                 fls->hw->status |= FLASH_WR_PROTECT;
 186                 LOG_ERR("wr protect..\n");
 187                 return 0;
 188         }
 189
 190         return blk->blk_size;
 191 }
 192
 193
 194 static int sam3_flash_error(struct KBlock *blk)
 195 {
 196         Flash *fls = FLASH_CAST(blk);
 197         return fls->hw->status;
 198 }
 199
 200 static void sam3_flash_clearerror(struct KBlock *blk)
 201 {
 202         Flash *fls = FLASH_CAST(blk);
 203         fls->hw->status = 0;
 204 }
 205
 206 static const KBlockVTable flash_sam3_buffered_vt =
 207 {
 208         .readDirect = sam3_flash_readDirect,
 209         .writeDirect = sam3_flash_writeDirect,
 210
 211         .readBuf = kblock_swReadBuf,
 212         .writeBuf = kblock_swWriteBuf,
 213         .load = kblock_swLoad,
 214         .store = kblock_swStore,
 215
 216         .error = sam3_flash_error,
 217         .clearerr = sam3_flash_clearerror,
 218 };
 219
 220 static const KBlockVTable flash_sam3_unbuffered_vt =
 221 {
 222         .readDirect = sam3_flash_readDirect,
 223         .writeDirect = sam3_flash_writeDirect,
 224
 225         .error = sam3_flash_error,
 226         .clearerr = sam3_flash_clearerror,
 227 };
 228
 229 static struct FlashHardware flash_sam3_hw;
 230 static uint8_t flash_buf[FLASH_PAGE_SIZE_BYTES];
 231
 232 static void common_init(Flash *fls)
 233 {
 234         memset(fls, 0, sizeof(*fls));
 235         DB(fls->blk.priv.type = KBT_FLASH);
 236
 237         fls->hw = &flash_sam3_hw;
 238
 239         fls->blk.blk_size = FLASH_PAGE_SIZE_BYTES;
 240         fls->blk.blk_cnt = FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES;
 241 }
 242
 243 void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags))
 244 {
 245         common_init(fls);
 246         fls->blk.priv.vt = &flash_sam3_buffered_vt;
 247         fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
 248         fls->blk.priv.buf = flash_buf;
 249
 250         /* Load the first block in the cache */
 251         memcpy(fls->blk.priv.buf, (void *)(FLASH_BASE), fls->blk.blk_size);
 252 }
 253
 254 void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags))
 255 {
 256         common_init(fls);
 257         fls->blk.priv.vt = &flash_sam3_unbuffered_vt;
 258 }
 259