bertos/cpu/irq.h

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  30  * Copyright 2004 Giovanni Bajo
  31  *
  32  * -->
  33  *
  34  * \brief CPU-specific IRQ definitions.
  35  *
  36  * \author Giovanni Bajo <rasky@develer.com>
  37  * \author Bernie Innocenti <bernie@codewiz.org>
  38  * \author Stefano Fedrigo <aleph@develer.com>
  39  * \author Francesco Sacchi <batt@develer.com>
  40  */
  41 #ifndef CPU_IRQ_H
  42 #define CPU_IRQ_H
  43
  44 #include "detect.h"
  45 #include "types.h"
  46
  47 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
  48
  49 #include <cfg/compiler.h> /* for uintXX_t */
  50 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
  51
  52 #if CPU_I196
  53         #define IRQ_DISABLE             disable_interrupt()
  54         #define IRQ_ENABLE              enable_interrupt()
  55 #elif CPU_X86
  56
  57         /* Get IRQ_* definitions from the hosting environment. */
  58         #include <cfg/os.h>
  59         #if OS_EMBEDDED
  60                 #define IRQ_DISABLE             FIXME
  61                 #define IRQ_ENABLE              FIXME
  62                 #define IRQ_SAVE_DISABLE(x)     FIXME
  63                 #define IRQ_RESTORE(x)          FIXME
  64         #endif /* OS_EMBEDDED */
  65
  66
  67 #elif CPU_ARM
  68
  69         #ifdef __IAR_SYSTEMS_ICC__
  70
  71                 #include <inarm.h>
  72
  73                 #if __CPU_MODE__ == 1 /* Thumb */
  74                         /* Use stubs */
  75                         extern cpu_flags_t get_CPSR(void);
  76                         extern void set_CPSR(cpu_flags_t flags);
  77                 #else
  78                         #define get_CPSR __get_CPSR
  79                         #define set_CPSR __set_CPSR
  80                 #endif
  81
  82                 #define IRQ_DISABLE __disable_interrupt()
  83                 #define IRQ_ENABLE  __enable_interrupt()
  84
  85                 #define IRQ_SAVE_DISABLE(x) \
  86                 do { \
  87                         (x) = get_CPSR(); \
  88                         __disable_interrupt(); \
  89                 } while (0)
  90
  91                 #define IRQ_RESTORE(x) \
  92                 do { \
  93                         set_CPSR(x); \
  94                 } while (0)
  95
  96                 #define IRQ_ENABLED() \
  97                         ((bool)(get_CPSR() & 0xb0))
  98
  99         #else /* !__IAR_SYSTEMS_ICC__ */
 100
 101                 #define IRQ_DISABLE \
 102                 do { \
 103                         asm volatile ( \
 104                                 "mrs r0, cpsr\n\t" \
 105                                 "orr r0, r0, #0xc0\n\t" \
 106                                 "msr cpsr_c, r0" \
 107                                 ::: "r0" \
 108                         ); \
 109                 } while (0)
 110
 111                 #define IRQ_ENABLE \
 112                 do { \
 113                         asm volatile ( \
 114                                 "mrs r0, cpsr\n\t" \
 115                                 "bic r0, r0, #0xc0\n\t" \
 116                                 "msr cpsr_c, r0" \
 117                                 ::: "r0" \
 118                         ); \
 119                 } while (0)
 120
 121                 #define IRQ_SAVE_DISABLE(x) \
 122                 do { \
 123                         asm volatile ( \
 124                                 "mrs %0, cpsr\n\t" \
 125                                 "orr r0, %0, #0xc0\n\t" \
 126                                 "msr cpsr_c, r0" \
 127                                 : "=r" (x) \
 128                                 : /* no inputs */ \
 129                                 : "r0" \
 130                         ); \
 131                 } while (0)
 132
 133                 #define IRQ_RESTORE(x) \
 134                 do { \
 135                         asm volatile ( \
 136                                 "msr cpsr_c, %0" \
 137                                 : /* no outputs */ \
 138                                 : "r" (x) \
 139                         ); \
 140                 } while (0)
 141
 142                 #define CPU_READ_FLAGS() \
 143                 ({ \
 144                         cpu_flags_t sreg; \
 145                         asm volatile ( \
 146                                 "mrs %0, cpsr\n\t" \
 147                                 : "=r" (sreg) \
 148                                 : /* no inputs */ \
 149                         ); \
 150                         sreg; \
 151                 })
 152
 153                 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
 154
 155                 #if CONFIG_KERN_PREEMPT
 156                         EXTERN_C void asm_irq_switch_context(void);
 157
 158                         /**
 159                          * At the beginning of any ISR immediately ajust the
 160                          * return address and store all the caller-save
 161                          * registers (the ISR may change these registers that
 162                          * are shared with the user-context).
 163                          */
 164                         #define IRQ_ENTRY() asm volatile ( \
 165                                                 "sub    lr, lr, #4\n\t" \
 166                                                 "stmfd  sp!, {r0-r3, ip, lr}\n\t")
 167                         #define IRQ_EXIT()  asm volatile ( \
 168                                                 "b      asm_irq_switch_context\n\t")
 169                         /**
 170                          * Function attribute to declare an interrupt service
 171                          * routine.
 172                          *
 173                          * An ISR function must be declared as naked because we
 174                          * want to add our IRQ_ENTRY() prologue and IRQ_EXIT()
 175                          * epilogue code to handle the context switch and save
 176                          * all the registers (not only the callee-save).
 177                          *
 178                          */
 179                         #define ISR_FUNC __attribute__((naked))
 180
 181                         /**
 182                          * The compiler cannot establish which
 183                          * registers actually need to be saved, because
 184                          * the interrupt can happen at any time, so the
 185                          * "normal" prologue and epilogue used for a
 186                          * generic function call are not suitable for
 187                          * the ISR.
 188                          *
 189                          * Using a naked function has the drawback that
 190                          * the stack is not automatically adjusted at
 191                          * this point, like a "normal" function call.
 192                          *
 193                          * So, an ISR can _only_ contain other function
 194                          * calls and they can't use the stack in any
 195                          * other way.
 196                          *
 197                          * NOTE: we need to explicitly disable IRQs after
 198                          * IRQ_ENTRY(), because the IRQ status flag is not
 199                          * masked by the hardware and an IRQ ack inside the ISR
 200                          * may cause the triggering of another IRQ before
 201                          * exiting from the current ISR.
 202                          *
 203                          * The respective IRQ_ENABLE is not necessary, because
 204                          * IRQs will be automatically re-enabled when restoring
 205                          * the context of the user task.
 206                          */
 207                         #define DECLARE_ISR_CONTEXT_SWITCH(func)        \
 208                                 void ISR_FUNC func(void);               \
 209                                 static void __isr_##func(void);         \
 210                                 void ISR_FUNC func(void)                \
 211                                 {                                       \
 212                                         IRQ_ENTRY();                    \
 213                                         IRQ_DISABLE;                    \
 214                                         __isr_##func();                 \
 215                                         IRQ_EXIT();                     \
 216                                 }                                       \
 217                                 static void __isr_##func(void)
 218                         /**
 219                          * Interrupt service routine prototype: can be used for
 220                          * forward declarations.
 221                          */
 222                         #define ISR_PROTO_CONTEXT_SWITCH(func)  \
 223                                 void ISR_FUNC func(void)
 224                         /**
 225                          * With task priorities enabled each ISR is used a point to
 226                          * check if we need to perform a context switch.
 227                          *
 228                          * Instead, without priorities a context switch can occur only
 229                          * when the running task expires its time quantum. In this last
 230                          * case, the context switch can only occur in the timer
 231                          * ISR, that must be always declared with the
 232                          * DECLARE_ISR_CONTEXT_SWITCH() macro.
 233                          */
 234                         #if CONFIG_KERN_PRI
 235                                 #define DECLARE_ISR(func) \
 236                                         DECLARE_ISR_CONTEXT_SWITCH(func)
 237
 238                                 #define ISR_PROTO(func) \
 239                                         ISR_PROTO_CONTEXT_SWITCH(func)
 240                         #endif /* !CONFIG_KERN_PRI */
 241                 #endif /* CONFIG_KERN_PREEMPT */
 242
 243                 #ifndef DECLARE_ISR
 244                         #define DECLARE_ISR(func) \
 245                                 void __attribute__((interrupt)) func(void)
 246                 #endif
 247                 #ifndef DECLARE_ISR_CONTEXT_SWITCH
 248                         #define DECLARE_ISR_CONTEXT_SWITCH(func) \
 249                                 void __attribute__((interrupt)) func(void)
 250                 #endif
 251                 #ifndef ISR_PROTO
 252                         #define ISR_PROTO(func) \
 253                                 void __attribute__((interrupt)) func(void)
 254                 #endif
 255                 #ifndef ISR_PROTO_CONTEXT_SWITCH
 256                         #define ISR_PROTO_CONTEXT_SWITCH(func)  \
 257                                 void __attribute__((interrupt)) func(void)
 258                 #endif
 259
 260         #endif /* !__IAR_SYSTEMS_ICC_ */
 261
 262 #elif CPU_PPC
 263
 264         /* Get IRQ_* definitions from the hosting environment. */
 265         #include <cfg/os.h>
 266         #if OS_EMBEDDED
 267                 #define IRQ_DISABLE         FIXME
 268                 #define IRQ_ENABLE          FIXME
 269                 #define IRQ_SAVE_DISABLE(x) FIXME
 270                 #define IRQ_RESTORE(x)      FIXME
 271                 #define IRQ_ENABLED()       FIXME
 272         #endif /* OS_EMBEDDED */
 273
 274 #elif CPU_DSP56K
 275
 276         #define IRQ_DISABLE             do { asm(bfset #0x0200,SR); asm(nop); } while (0)
 277         #define IRQ_ENABLE              do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
 278
 279         #define IRQ_SAVE_DISABLE(x)  \
 280                 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
 281         #define IRQ_RESTORE(x)  \
 282                 do { (void)x; asm(move x,SR); } while (0)
 283
 284         static inline bool irq_running(void)
 285         {
 286                 extern void *user_sp;
 287                 return !!user_sp;
 288         }
 289         #define IRQ_RUNNING() irq_running()
 290
 291         static inline bool irq_enabled(void)
 292         {
 293                 uint16_t x;
 294                 asm(move SR,x);
 295                 return !(x & 0x0200);
 296         }
 297         #define IRQ_ENABLED() irq_enabled()
 298
 299 #elif CPU_AVR
 300
 301         #define IRQ_DISABLE   asm volatile ("cli" ::)
 302         #define IRQ_ENABLE    asm volatile ("sei" ::)
 303
 304         #define IRQ_SAVE_DISABLE(x) \
 305         do { \
 306                 __asm__ __volatile__( \
 307                         "in %0,__SREG__\n\t" \
 308                         "cli" \
 309                         : "=r" (x) : /* no inputs */ : "cc" \
 310                 ); \
 311         } while (0)
 312
 313         #define IRQ_RESTORE(x) \
 314         do { \
 315                 __asm__ __volatile__( \
 316                         "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
 317                 ); \
 318         } while (0)
 319
 320         #define IRQ_ENABLED() \
 321         ({ \
 322                 uint8_t sreg; \
 323                 __asm__ __volatile__( \
 324                         "in %0,__SREG__\n\t" \
 325                         : "=r" (sreg)  /* no inputs & no clobbers */ \
 326                 ); \
 327                 (bool)(sreg & 0x80); \
 328         })
 329         #if CONFIG_KERN_PREEMPT
 330                 #define DECLARE_ISR_CONTEXT_SWITCH(vect)                \
 331                         INLINE void __isr_##vect(void);                 \
 332                         ISR(vect)                                       \
 333                         {                                               \
 334                                 __isr_##vect();                         \
 335                                 IRQ_PREEMPT_HANDLER();                  \
 336                         }                                               \
 337                         INLINE void __isr_##vect(void)
 338
 339                 /**
 340                  * With task priorities enabled each ISR is used a point to
 341                  * check if we need to perform a context switch.
 342                  *
 343                  * Instead, without priorities a context switch can occur only
 344                  * when the running task expires its time quantum. In this last
 345                  * case, the context switch can only occur in the timer ISR,
 346                  * that must be always declared with the
 347                  * DECLARE_ISR_CONTEXT_SWITCH() macro.
 348                  */
 349                 #if CONFIG_KERN_PRI
 350                         #define DECLARE_ISR(func) \
 351                                 DECLARE_ISR_CONTEXT_SWITCH(func)
 352                         /**
 353                          * Interrupt service routine prototype: can be used for
 354                          * forward declarations.
 355                          */
 356                         #define ISR_PROTO(func) \
 357                                 ISR_PROTO_CONTEXT_SWITCH(func)
 358                 #endif /* !CONFIG_KERN_PRI */
 359         #endif
 360
 361         #ifndef ISR_PROTO
 362                 #define ISR_PROTO(vect) ISR(vect)
 363         #endif
 364         #ifndef DECLARE_ISR
 365                 #define DECLARE_ISR(vect) ISR(vect)
 366         #endif
 367         #ifndef DECLARE_ISR_CONTEXT_SWITCH
 368                 #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
 369         #endif
 370         #ifndef ISR_PROTO_CONTEXT_SWITCH
 371                 #define ISR_PROTO_CONTEXT_SWITCH(func) ISR(vect)
 372         #endif
 373
 374 #else
 375         #error No CPU_... defined.
 376 #endif
 377
 378 #ifdef IRQ_RUNNING
 379         /// Ensure callee is running within an interrupt
 380         #define ASSERT_IRQ_CONTEXT()  ASSERT(IRQ_RUNNING())
 381
 382         /// Ensure callee is not running within an interrupt
 383         #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
 384 #else
 385         #define ASSERT_USER_CONTEXT()  do {} while(0)
 386         #define ASSERT_IRQ_CONTEXT()   do {} while(0)
 387 #endif
 388
 389 #ifdef IRQ_ENABLED
 390         /// Ensure interrupts are enabled
 391         #define IRQ_ASSERT_ENABLED()  ASSERT(IRQ_ENABLED())
 392
 393         /// Ensure interrupts are not enabled
 394         #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
 395 #else
 396         #define IRQ_ASSERT_ENABLED() do {} while(0)
 397         #define IRQ_ASSERT_DISABLED() do {} while(0)
 398 #endif
 399
 400
 401 #ifndef IRQ_PREEMPT_HANDLER
 402         #if CONFIG_KERN_PREEMPT
 403                 /**
 404                  * Handle preemptive context switch inside timer IRQ.
 405                  */
 406                 INLINE void IRQ_PREEMPT_HANDLER(void)
 407                 {
 408                         if (proc_needPreempt())
 409                                 proc_preempt();
 410                 }
 411         #else
 412                 #define IRQ_PREEMPT_HANDLER() /* Nothing */
 413         #endif
 414 #endif
 415
 416 /**
 417  * Execute \a CODE atomically with respect to interrupts.
 418  *
 419  * \see IRQ_SAVE_DISABLE IRQ_RESTORE
 420  */
 421 #define ATOMIC(CODE) \
 422         do { \
 423                 cpu_flags_t __flags; \
 424                 IRQ_SAVE_DISABLE(__flags); \
 425                 CODE; \
 426                 IRQ_RESTORE(__flags); \
 427         } while (0)
 428
 429 #endif /* CPU_IRQ_H */