bertos/cpu/irq.h

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  30  * Copyright 2004 Giovanni Bajo
  31  *
  32  * -->
  33  *
  34  * \brief CPU-specific IRQ definitions.
  35  *
  36  * \author Giovanni Bajo <rasky@develer.com>
  37  * \author Bernie Innocenti <bernie@codewiz.org>
  38  * \author Stefano Fedrigo <aleph@develer.com>
  39  * \author Francesco Sacchi <batt@develer.com>
  40  */
  41 #ifndef CPU_IRQ_H
  42 #define CPU_IRQ_H
  43
  44 #include "detect.h"
  45 #include "types.h"
  46
  47 #include <cfg/compiler.h> /* for uintXX_t */
  48
  49 #if CPU_I196
  50         #define IRQ_DISABLE             disable_interrupt()
  51         #define IRQ_ENABLE              enable_interrupt()
  52 #elif CPU_X86
  53
  54         /* Get IRQ_* definitions from the hosting environment. */
  55         #include <cfg/os.h>
  56         #if OS_EMBEDDED
  57                 #define IRQ_DISABLE             FIXME
  58                 #define IRQ_ENABLE              FIXME
  59                 #define IRQ_SAVE_DISABLE(x)     FIXME
  60                 #define IRQ_RESTORE(x)          FIXME
  61         #endif /* OS_EMBEDDED */
  62
  63 #elif CPU_ARM
  64
  65         #ifdef __IAR_SYSTEMS_ICC__
  66
  67                 #include <inarm.h>
  68
  69                 #if __CPU_MODE__ == 1 /* Thumb */
  70                         /* Use stubs */
  71                         extern cpuflags_t get_CPSR(void);
  72                         extern void set_CPSR(cpuflags_t flags);
  73                 #else
  74                         #define get_CPSR __get_CPSR
  75                         #define set_CPSR __set_CPSR
  76                 #endif
  77
  78                 #define IRQ_DISABLE __disable_interrupt()
  79                 #define IRQ_ENABLE  __enable_interrupt()
  80
  81                 #define IRQ_SAVE_DISABLE(x) \
  82                 do { \
  83                         (x) = get_CPSR(); \
  84                         __disable_interrupt(); \
  85                 } while (0)
  86
  87                 #define IRQ_RESTORE(x) \
  88                 do { \
  89                         set_CPSR(x); \
  90                 } while (0)
  91
  92                 #define IRQ_ENABLED() \
  93                         ((bool)(get_CPSR() & 0xb0))
  94
  95                 #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
  96
  97         #else /* !__IAR_SYSTEMS_ICC__ */
  98
  99                 #define IRQ_DISABLE \
 100                 do { \
 101                         asm volatile ( \
 102                                 "mrs r0, cpsr\n\t" \
 103                                 "orr r0, r0, #0xc0\n\t" \
 104                                 "msr cpsr_c, r0" \
 105                                 ::: "r0" \
 106                         ); \
 107                 } while (0)
 108
 109                 #define IRQ_ENABLE \
 110                 do { \
 111                         asm volatile ( \
 112                                 "mrs r0, cpsr\n\t" \
 113                                 "bic r0, r0, #0xc0\n\t" \
 114                                 "msr cpsr_c, r0" \
 115                                 ::: "r0" \
 116                         ); \
 117                 } while (0)
 118
 119                 #define IRQ_SAVE_DISABLE(x) \
 120                 do { \
 121                         asm volatile ( \
 122                                 "mrs %0, cpsr\n\t" \
 123                                 "orr r0, %0, #0xc0\n\t" \
 124                                 "msr cpsr_c, r0" \
 125                                 : "=r" (x) \
 126                                 : /* no inputs */ \
 127                                 : "r0" \
 128                         ); \
 129                 } while (0)
 130
 131                 #define IRQ_RESTORE(x) \
 132                 do { \
 133                         asm volatile ( \
 134                                 "msr cpsr_c, %0" \
 135                                 : /* no outputs */ \
 136                                 : "r" (x) \
 137                         ); \
 138                 } while (0)
 139
 140                 #define CPU_READ_FLAGS() \
 141                 ({ \
 142                         cpuflags_t sreg; \
 143                         asm volatile ( \
 144                                 "mrs %0, cpsr\n\t" \
 145                                 : "=r" (sreg) \
 146                                 : /* no inputs */ \
 147                         ); \
 148                         sreg; \
 149                 })
 150
 151                 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
 152
 153         #endif /* !__IAR_SYSTEMS_ICC_ */
 154
 155 #elif CPU_PPC
 156
 157         /* Get IRQ_* definitions from the hosting environment. */
 158         #include <cfg/os.h>
 159         #if OS_EMBEDDED
 160                 #define IRQ_DISABLE         FIXME
 161                 #define IRQ_ENABLE          FIXME
 162                 #define IRQ_SAVE_DISABLE(x) FIXME
 163                 #define IRQ_RESTORE(x)      FIXME
 164                 #define IRQ_ENABLED()       FIXME
 165         #endif /* OS_EMBEDDED */
 166
 167 #elif CPU_DSP56K
 168
 169         #define BREAKPOINT              asm(debug)
 170         #define IRQ_DISABLE             do { asm(bfset #0x0200,SR); asm(nop); } while (0)
 171         #define IRQ_ENABLE              do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
 172
 173         #define IRQ_SAVE_DISABLE(x)  \
 174                 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
 175         #define IRQ_RESTORE(x)  \
 176                 do { (void)x; asm(move x,SR); } while (0)
 177
 178         static inline bool irq_running(void)
 179         {
 180                 extern void *user_sp;
 181                 return !!user_sp;
 182         }
 183         #define IRQ_RUNNING() irq_running()
 184
 185         static inline bool irq_enabled(void)
 186         {
 187                 uint16_t x;
 188                 asm(move SR,x);
 189                 return !(x & 0x0200);
 190         }
 191         #define IRQ_ENABLED() irq_enabled()
 192
 193 #elif CPU_AVR
 194
 195         #define IRQ_DISABLE   asm volatile ("cli" ::)
 196         #define IRQ_ENABLE    asm volatile ("sei" ::)
 197
 198         #define IRQ_SAVE_DISABLE(x) \
 199         do { \
 200                 __asm__ __volatile__( \
 201                         "in %0,__SREG__\n\t" \
 202                         "cli" \
 203                         : "=r" (x) : /* no inputs */ : "cc" \
 204                 ); \
 205         } while (0)
 206
 207         #define IRQ_RESTORE(x) \
 208         do { \
 209                 __asm__ __volatile__( \
 210                         "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
 211                 ); \
 212         } while (0)
 213
 214         #define IRQ_ENABLED() \
 215         ({ \
 216                 uint8_t sreg; \
 217                 __asm__ __volatile__( \
 218                         "in %0,__SREG__\n\t" \
 219                         : "=r" (sreg)  /* no inputs & no clobbers */ \
 220                 ); \
 221                 (bool)(sreg & 0x80); \
 222         })
 223 #else
 224         #error No CPU_... defined.
 225 #endif
 226
 227 #ifndef IRQ_ENTRY
 228         #define IRQ_ENTRY() /* NOP */
 229 #endif
 230
 231 #ifndef IRQ_EXIT
 232         #define IRQ_EXIT() /* NOP */
 233 #endif
 234
 235 #ifdef IRQ_RUNNING
 236         /// Ensure callee is running within an interrupt
 237         #define ASSERT_IRQ_CONTEXT()  ASSERT(IRQ_RUNNING())
 238
 239         /// Ensure callee is not running within an interrupt
 240         #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
 241 #else
 242         #define ASSERT_USER_CONTEXT()  do {} while(0)
 243         #define ASSERT_IRQ_CONTEXT()   do {} while(0)
 244 #endif
 245
 246 #ifdef IRQ_ENABLED
 247         /// Ensure interrupts are enabled
 248         #define ASSERT_IRQ_ENABLED()  ASSERT(IRQ_ENABLED())
 249
 250         /// Ensure interrupts are not enabled
 251         #define ASSERT_IRQ_DISABLED() ASSERT(IRQ_ENABLED())
 252 #else
 253         #define ASSERT_IRQ_ENABLED() do {} while(0)
 254         #define ASSERT_IRQ_DISABLED() do {} while(0)
 255 #endif
 256
 257 /**
 258  * Execute \a CODE atomically with respect to interrupts.
 259  *
 260  * \see IRQ_SAVE_DISABLE IRQ_RESTORE
 261  */
 262 #define ATOMIC(CODE) \
 263         do { \
 264                 cpuflags_t __flags; \
 265                 IRQ_SAVE_DISABLE(__flags); \
 266                 CODE; \
 267                 IRQ_RESTORE(__flags); \
 268         } while (0)
 269
 270
 271 #ifndef BREAKPOINT
 272 #define BREAKPOINT /* nop */
 273 #endif
 274
 275
 276 #endif /* CPU_IRQ_H */